1 /*
2  * QEMU LSI SAS1068 Host Bus Adapter emulation
3  * Endianness conversion for MPI data structures
4  *
5  * Copyright (c) 2016 Red Hat, Inc.
6  *
7  * Authors: Paolo Bonzini <pbonzini@redhat.com>
8  *
9  * This library is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU Lesser General Public
11  * License as published by the Free Software Foundation; either
12  * version 2 of the License, or (at your option) any later version.
13  *
14  * This library is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17  * Lesser General Public License for more details.
18  *
19  * You should have received a copy of the GNU Lesser General Public
20  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
21  */
22 
23 #include "qemu/osdep.h"
24 #include "hw/pci/pci.h"
25 #include "sysemu/dma.h"
26 #include "hw/pci/msi.h"
27 #include "qemu/iov.h"
28 #include "hw/scsi/scsi.h"
29 #include "scsi/constants.h"
30 #include "trace.h"
31 
32 #include "mptsas.h"
33 #include "mpi.h"
34 
mptsas_fix_sgentry_endianness(MPISGEntry * sge)35 static void mptsas_fix_sgentry_endianness(MPISGEntry *sge)
36 {
37     sge->FlagsLength = le32_to_cpu(sge->FlagsLength);
38     if (sge->FlagsLength & MPI_SGE_FLAGS_64_BIT_ADDRESSING) {
39         sge->u.Address64 = le64_to_cpu(sge->u.Address64);
40     } else {
41         sge->u.Address32 = le32_to_cpu(sge->u.Address32);
42     }
43 }
44 
mptsas_fix_sgentry_endianness_reply(MPISGEntry * sge)45 static void mptsas_fix_sgentry_endianness_reply(MPISGEntry *sge)
46 {
47     if (sge->FlagsLength & MPI_SGE_FLAGS_64_BIT_ADDRESSING) {
48         sge->u.Address64 = cpu_to_le64(sge->u.Address64);
49     } else {
50         sge->u.Address32 = cpu_to_le32(sge->u.Address32);
51     }
52     sge->FlagsLength = cpu_to_le32(sge->FlagsLength);
53 }
54 
mptsas_fix_scsi_io_endianness(MPIMsgSCSIIORequest * req)55 void mptsas_fix_scsi_io_endianness(MPIMsgSCSIIORequest *req)
56 {
57     req->MsgContext = le32_to_cpu(req->MsgContext);
58     req->Control = le32_to_cpu(req->Control);
59     req->DataLength = le32_to_cpu(req->DataLength);
60     req->SenseBufferLowAddr = le32_to_cpu(req->SenseBufferLowAddr);
61 }
62 
mptsas_fix_scsi_io_reply_endianness(MPIMsgSCSIIOReply * reply)63 void mptsas_fix_scsi_io_reply_endianness(MPIMsgSCSIIOReply *reply)
64 {
65     reply->MsgContext = cpu_to_le32(reply->MsgContext);
66     reply->IOCStatus = cpu_to_le16(reply->IOCStatus);
67     reply->IOCLogInfo = cpu_to_le32(reply->IOCLogInfo);
68     reply->TransferCount = cpu_to_le32(reply->TransferCount);
69     reply->SenseCount = cpu_to_le32(reply->SenseCount);
70     reply->ResponseInfo = cpu_to_le32(reply->ResponseInfo);
71     reply->TaskTag = cpu_to_le16(reply->TaskTag);
72 }
73 
mptsas_fix_scsi_task_mgmt_endianness(MPIMsgSCSITaskMgmt * req)74 void mptsas_fix_scsi_task_mgmt_endianness(MPIMsgSCSITaskMgmt *req)
75 {
76     req->MsgContext = le32_to_cpu(req->MsgContext);
77     req->TaskMsgContext = le32_to_cpu(req->TaskMsgContext);
78 }
79 
mptsas_fix_scsi_task_mgmt_reply_endianness(MPIMsgSCSITaskMgmtReply * reply)80 void mptsas_fix_scsi_task_mgmt_reply_endianness(MPIMsgSCSITaskMgmtReply *reply)
81 {
82     reply->MsgContext = cpu_to_le32(reply->MsgContext);
83     reply->IOCStatus = cpu_to_le16(reply->IOCStatus);
84     reply->IOCLogInfo = cpu_to_le32(reply->IOCLogInfo);
85     reply->TerminationCount = cpu_to_le32(reply->TerminationCount);
86 }
87 
mptsas_fix_ioc_init_endianness(MPIMsgIOCInit * req)88 void mptsas_fix_ioc_init_endianness(MPIMsgIOCInit *req)
89 {
90     req->MsgContext = le32_to_cpu(req->MsgContext);
91     req->ReplyFrameSize = le16_to_cpu(req->ReplyFrameSize);
92     req->HostMfaHighAddr = le32_to_cpu(req->HostMfaHighAddr);
93     req->SenseBufferHighAddr = le32_to_cpu(req->SenseBufferHighAddr);
94     req->ReplyFifoHostSignalingAddr =
95         le32_to_cpu(req->ReplyFifoHostSignalingAddr);
96     mptsas_fix_sgentry_endianness(&req->HostPageBufferSGE);
97     req->MsgVersion = le16_to_cpu(req->MsgVersion);
98     req->HeaderVersion = le16_to_cpu(req->HeaderVersion);
99 }
100 
mptsas_fix_ioc_init_reply_endianness(MPIMsgIOCInitReply * reply)101 void mptsas_fix_ioc_init_reply_endianness(MPIMsgIOCInitReply *reply)
102 {
103     reply->MsgContext = cpu_to_le32(reply->MsgContext);
104     reply->IOCStatus = cpu_to_le16(reply->IOCStatus);
105     reply->IOCLogInfo = cpu_to_le32(reply->IOCLogInfo);
106 }
107 
mptsas_fix_ioc_facts_endianness(MPIMsgIOCFacts * req)108 void mptsas_fix_ioc_facts_endianness(MPIMsgIOCFacts *req)
109 {
110     req->MsgContext = le32_to_cpu(req->MsgContext);
111 }
112 
mptsas_fix_ioc_facts_reply_endianness(MPIMsgIOCFactsReply * reply)113 void mptsas_fix_ioc_facts_reply_endianness(MPIMsgIOCFactsReply *reply)
114 {
115     reply->MsgVersion = cpu_to_le16(reply->MsgVersion);
116     reply->HeaderVersion = cpu_to_le16(reply->HeaderVersion);
117     reply->MsgContext = cpu_to_le32(reply->MsgContext);
118     reply->IOCExceptions = cpu_to_le16(reply->IOCExceptions);
119     reply->IOCStatus = cpu_to_le16(reply->IOCStatus);
120     reply->IOCLogInfo = cpu_to_le32(reply->IOCLogInfo);
121     reply->ReplyQueueDepth = cpu_to_le16(reply->ReplyQueueDepth);
122     reply->RequestFrameSize = cpu_to_le16(reply->RequestFrameSize);
123     reply->ProductID = cpu_to_le16(reply->ProductID);
124     reply->CurrentHostMfaHighAddr = cpu_to_le32(reply->CurrentHostMfaHighAddr);
125     reply->GlobalCredits = cpu_to_le16(reply->GlobalCredits);
126     reply->CurrentSenseBufferHighAddr =
127         cpu_to_le32(reply->CurrentSenseBufferHighAddr);
128     reply->CurReplyFrameSize = cpu_to_le16(reply->CurReplyFrameSize);
129     reply->FWImageSize = cpu_to_le32(reply->FWImageSize);
130     reply->IOCCapabilities = cpu_to_le32(reply->IOCCapabilities);
131     reply->HighPriorityQueueDepth = cpu_to_le16(reply->HighPriorityQueueDepth);
132     mptsas_fix_sgentry_endianness_reply(&reply->HostPageBufferSGE);
133     reply->ReplyFifoHostSignalingAddr =
134         cpu_to_le32(reply->ReplyFifoHostSignalingAddr);
135 }
136 
mptsas_fix_config_endianness(MPIMsgConfig * req)137 void mptsas_fix_config_endianness(MPIMsgConfig *req)
138 {
139     req->ExtPageLength = le16_to_cpu(req->ExtPageLength);
140     req->MsgContext = le32_to_cpu(req->MsgContext);
141     req->PageAddress = le32_to_cpu(req->PageAddress);
142     mptsas_fix_sgentry_endianness(&req->PageBufferSGE);
143 }
144 
mptsas_fix_config_reply_endianness(MPIMsgConfigReply * reply)145 void mptsas_fix_config_reply_endianness(MPIMsgConfigReply *reply)
146 {
147     reply->ExtPageLength = cpu_to_le16(reply->ExtPageLength);
148     reply->MsgContext = cpu_to_le32(reply->MsgContext);
149     reply->IOCStatus = cpu_to_le16(reply->IOCStatus);
150     reply->IOCLogInfo = cpu_to_le32(reply->IOCLogInfo);
151 }
152 
mptsas_fix_port_facts_endianness(MPIMsgPortFacts * req)153 void mptsas_fix_port_facts_endianness(MPIMsgPortFacts *req)
154 {
155     req->MsgContext = le32_to_cpu(req->MsgContext);
156 }
157 
mptsas_fix_port_facts_reply_endianness(MPIMsgPortFactsReply * reply)158 void mptsas_fix_port_facts_reply_endianness(MPIMsgPortFactsReply *reply)
159 {
160     reply->MsgContext = cpu_to_le32(reply->MsgContext);
161     reply->IOCStatus = cpu_to_le16(reply->IOCStatus);
162     reply->IOCLogInfo = cpu_to_le32(reply->IOCLogInfo);
163     reply->MaxDevices = cpu_to_le16(reply->MaxDevices);
164     reply->PortSCSIID = cpu_to_le16(reply->PortSCSIID);
165     reply->ProtocolFlags = cpu_to_le16(reply->ProtocolFlags);
166     reply->MaxPostedCmdBuffers = cpu_to_le16(reply->MaxPostedCmdBuffers);
167     reply->MaxPersistentIDs = cpu_to_le16(reply->MaxPersistentIDs);
168     reply->MaxLanBuckets = cpu_to_le16(reply->MaxLanBuckets);
169 }
170 
mptsas_fix_port_enable_endianness(MPIMsgPortEnable * req)171 void mptsas_fix_port_enable_endianness(MPIMsgPortEnable *req)
172 {
173     req->MsgContext = le32_to_cpu(req->MsgContext);
174 }
175 
mptsas_fix_port_enable_reply_endianness(MPIMsgPortEnableReply * reply)176 void mptsas_fix_port_enable_reply_endianness(MPIMsgPortEnableReply *reply)
177 {
178     reply->MsgContext = cpu_to_le32(reply->MsgContext);
179     reply->IOCStatus = cpu_to_le16(reply->IOCStatus);
180     reply->IOCLogInfo = cpu_to_le32(reply->IOCLogInfo);
181 }
182 
mptsas_fix_event_notification_endianness(MPIMsgEventNotify * req)183 void mptsas_fix_event_notification_endianness(MPIMsgEventNotify *req)
184 {
185     req->MsgContext = le32_to_cpu(req->MsgContext);
186 }
187 
mptsas_fix_event_notification_reply_endianness(MPIMsgEventNotifyReply * reply)188 void mptsas_fix_event_notification_reply_endianness(MPIMsgEventNotifyReply *reply)
189 {
190     int length = reply->EventDataLength;
191     int i;
192 
193     reply->EventDataLength = cpu_to_le16(reply->EventDataLength);
194     reply->MsgContext = cpu_to_le32(reply->MsgContext);
195     reply->IOCStatus = cpu_to_le16(reply->IOCStatus);
196     reply->IOCLogInfo = cpu_to_le32(reply->IOCLogInfo);
197     reply->Event = cpu_to_le32(reply->Event);
198     reply->EventContext = cpu_to_le32(reply->EventContext);
199 
200     /* Really depends on the event kind.  This will do for now.  */
201     for (i = 0; i < length; i++) {
202         reply->Data[i] = cpu_to_le32(reply->Data[i]);
203     }
204 }
205 
206