1 /* DO NOT EDIT THIS FILE 2 * Automatically generated by generate-cdef-headers.xsl 3 * DO NOT EDIT THIS FILE 4 */ 5 6 #ifndef __BFIN_CDEF_ADSP_BF561_proc__ 7 #define __BFIN_CDEF_ADSP_BF561_proc__ 8 9 #include "../mach-common/ADSP-EDN-core_cdef.h" 10 11 #include "../mach-common/ADSP-EDN-DUAL-CORE-extended_cdef.h" 12 13 #define pSRAM_BASE_ADDR ((uint32_t volatile *)SRAM_BASE_ADDR) 14 #define bfin_read_SRAM_BASE_ADDR() bfin_read32(SRAM_BASE_ADDR) 15 #define bfin_write_SRAM_BASE_ADDR(val) bfin_write32(SRAM_BASE_ADDR, val) 16 #define pDMEM_CONTROL ((uint32_t volatile *)DMEM_CONTROL) 17 #define bfin_read_DMEM_CONTROL() bfin_read32(DMEM_CONTROL) 18 #define bfin_write_DMEM_CONTROL(val) bfin_write32(DMEM_CONTROL, val) 19 #define pDCPLB_STATUS ((uint32_t volatile *)DCPLB_STATUS) 20 #define bfin_read_DCPLB_STATUS() bfin_read32(DCPLB_STATUS) 21 #define bfin_write_DCPLB_STATUS(val) bfin_write32(DCPLB_STATUS, val) 22 #define pDCPLB_FAULT_ADDR ((void * volatile *)DCPLB_FAULT_ADDR) 23 #define bfin_read_DCPLB_FAULT_ADDR() bfin_readPTR(DCPLB_FAULT_ADDR) 24 #define bfin_write_DCPLB_FAULT_ADDR(val) bfin_writePTR(DCPLB_FAULT_ADDR, val) 25 #define pDCPLB_ADDR0 ((uint32_t volatile *)DCPLB_ADDR0) 26 #define bfin_read_DCPLB_ADDR0() bfin_read32(DCPLB_ADDR0) 27 #define bfin_write_DCPLB_ADDR0(val) bfin_write32(DCPLB_ADDR0, val) 28 #define pDCPLB_ADDR1 ((uint32_t volatile *)DCPLB_ADDR1) 29 #define bfin_read_DCPLB_ADDR1() bfin_read32(DCPLB_ADDR1) 30 #define bfin_write_DCPLB_ADDR1(val) bfin_write32(DCPLB_ADDR1, val) 31 #define pDCPLB_ADDR2 ((uint32_t volatile *)DCPLB_ADDR2) 32 #define bfin_read_DCPLB_ADDR2() bfin_read32(DCPLB_ADDR2) 33 #define bfin_write_DCPLB_ADDR2(val) bfin_write32(DCPLB_ADDR2, val) 34 #define pDCPLB_ADDR3 ((uint32_t volatile *)DCPLB_ADDR3) 35 #define bfin_read_DCPLB_ADDR3() bfin_read32(DCPLB_ADDR3) 36 #define bfin_write_DCPLB_ADDR3(val) bfin_write32(DCPLB_ADDR3, val) 37 #define pDCPLB_ADDR4 ((uint32_t volatile *)DCPLB_ADDR4) 38 #define bfin_read_DCPLB_ADDR4() bfin_read32(DCPLB_ADDR4) 39 #define bfin_write_DCPLB_ADDR4(val) bfin_write32(DCPLB_ADDR4, val) 40 #define pDCPLB_ADDR5 ((uint32_t volatile *)DCPLB_ADDR5) 41 #define bfin_read_DCPLB_ADDR5() bfin_read32(DCPLB_ADDR5) 42 #define bfin_write_DCPLB_ADDR5(val) bfin_write32(DCPLB_ADDR5, val) 43 #define pDCPLB_ADDR6 ((uint32_t volatile *)DCPLB_ADDR6) 44 #define bfin_read_DCPLB_ADDR6() bfin_read32(DCPLB_ADDR6) 45 #define bfin_write_DCPLB_ADDR6(val) bfin_write32(DCPLB_ADDR6, val) 46 #define pDCPLB_ADDR7 ((uint32_t volatile *)DCPLB_ADDR7) 47 #define bfin_read_DCPLB_ADDR7() bfin_read32(DCPLB_ADDR7) 48 #define bfin_write_DCPLB_ADDR7(val) bfin_write32(DCPLB_ADDR7, val) 49 #define pDCPLB_ADDR8 ((uint32_t volatile *)DCPLB_ADDR8) 50 #define bfin_read_DCPLB_ADDR8() bfin_read32(DCPLB_ADDR8) 51 #define bfin_write_DCPLB_ADDR8(val) bfin_write32(DCPLB_ADDR8, val) 52 #define pDCPLB_ADDR9 ((uint32_t volatile *)DCPLB_ADDR9) 53 #define bfin_read_DCPLB_ADDR9() bfin_read32(DCPLB_ADDR9) 54 #define bfin_write_DCPLB_ADDR9(val) bfin_write32(DCPLB_ADDR9, val) 55 #define pDCPLB_ADDR10 ((uint32_t volatile *)DCPLB_ADDR10) 56 #define bfin_read_DCPLB_ADDR10() bfin_read32(DCPLB_ADDR10) 57 #define bfin_write_DCPLB_ADDR10(val) bfin_write32(DCPLB_ADDR10, val) 58 #define pDCPLB_ADDR11 ((uint32_t volatile *)DCPLB_ADDR11) 59 #define bfin_read_DCPLB_ADDR11() bfin_read32(DCPLB_ADDR11) 60 #define bfin_write_DCPLB_ADDR11(val) bfin_write32(DCPLB_ADDR11, val) 61 #define pDCPLB_ADDR12 ((uint32_t volatile *)DCPLB_ADDR12) 62 #define bfin_read_DCPLB_ADDR12() bfin_read32(DCPLB_ADDR12) 63 #define bfin_write_DCPLB_ADDR12(val) bfin_write32(DCPLB_ADDR12, val) 64 #define pDCPLB_ADDR13 ((uint32_t volatile *)DCPLB_ADDR13) 65 #define bfin_read_DCPLB_ADDR13() bfin_read32(DCPLB_ADDR13) 66 #define bfin_write_DCPLB_ADDR13(val) bfin_write32(DCPLB_ADDR13, val) 67 #define pDCPLB_ADDR14 ((uint32_t volatile *)DCPLB_ADDR14) 68 #define bfin_read_DCPLB_ADDR14() bfin_read32(DCPLB_ADDR14) 69 #define bfin_write_DCPLB_ADDR14(val) bfin_write32(DCPLB_ADDR14, val) 70 #define pDCPLB_ADDR15 ((uint32_t volatile *)DCPLB_ADDR15) 71 #define bfin_read_DCPLB_ADDR15() bfin_read32(DCPLB_ADDR15) 72 #define bfin_write_DCPLB_ADDR15(val) bfin_write32(DCPLB_ADDR15, val) 73 #define pDCPLB_DATA0 ((uint32_t volatile *)DCPLB_DATA0) 74 #define bfin_read_DCPLB_DATA0() bfin_read32(DCPLB_DATA0) 75 #define bfin_write_DCPLB_DATA0(val) bfin_write32(DCPLB_DATA0, val) 76 #define pDCPLB_DATA1 ((uint32_t volatile *)DCPLB_DATA1) 77 #define bfin_read_DCPLB_DATA1() bfin_read32(DCPLB_DATA1) 78 #define bfin_write_DCPLB_DATA1(val) bfin_write32(DCPLB_DATA1, val) 79 #define pDCPLB_DATA2 ((uint32_t volatile *)DCPLB_DATA2) 80 #define bfin_read_DCPLB_DATA2() bfin_read32(DCPLB_DATA2) 81 #define bfin_write_DCPLB_DATA2(val) bfin_write32(DCPLB_DATA2, val) 82 #define pDCPLB_DATA3 ((uint32_t volatile *)DCPLB_DATA3) 83 #define bfin_read_DCPLB_DATA3() bfin_read32(DCPLB_DATA3) 84 #define bfin_write_DCPLB_DATA3(val) bfin_write32(DCPLB_DATA3, val) 85 #define pDCPLB_DATA4 ((uint32_t volatile *)DCPLB_DATA4) 86 #define bfin_read_DCPLB_DATA4() bfin_read32(DCPLB_DATA4) 87 #define bfin_write_DCPLB_DATA4(val) bfin_write32(DCPLB_DATA4, val) 88 #define pDCPLB_DATA5 ((uint32_t volatile *)DCPLB_DATA5) 89 #define bfin_read_DCPLB_DATA5() bfin_read32(DCPLB_DATA5) 90 #define bfin_write_DCPLB_DATA5(val) bfin_write32(DCPLB_DATA5, val) 91 #define pDCPLB_DATA6 ((uint32_t volatile *)DCPLB_DATA6) 92 #define bfin_read_DCPLB_DATA6() bfin_read32(DCPLB_DATA6) 93 #define bfin_write_DCPLB_DATA6(val) bfin_write32(DCPLB_DATA6, val) 94 #define pDCPLB_DATA7 ((uint32_t volatile *)DCPLB_DATA7) 95 #define bfin_read_DCPLB_DATA7() bfin_read32(DCPLB_DATA7) 96 #define bfin_write_DCPLB_DATA7(val) bfin_write32(DCPLB_DATA7, val) 97 #define pDCPLB_DATA8 ((uint32_t volatile *)DCPLB_DATA8) 98 #define bfin_read_DCPLB_DATA8() bfin_read32(DCPLB_DATA8) 99 #define bfin_write_DCPLB_DATA8(val) bfin_write32(DCPLB_DATA8, val) 100 #define pDCPLB_DATA9 ((uint32_t volatile *)DCPLB_DATA9) 101 #define bfin_read_DCPLB_DATA9() bfin_read32(DCPLB_DATA9) 102 #define bfin_write_DCPLB_DATA9(val) bfin_write32(DCPLB_DATA9, val) 103 #define pDCPLB_DATA10 ((uint32_t volatile *)DCPLB_DATA10) 104 #define bfin_read_DCPLB_DATA10() bfin_read32(DCPLB_DATA10) 105 #define bfin_write_DCPLB_DATA10(val) bfin_write32(DCPLB_DATA10, val) 106 #define pDCPLB_DATA11 ((uint32_t volatile *)DCPLB_DATA11) 107 #define bfin_read_DCPLB_DATA11() bfin_read32(DCPLB_DATA11) 108 #define bfin_write_DCPLB_DATA11(val) bfin_write32(DCPLB_DATA11, val) 109 #define pDCPLB_DATA12 ((uint32_t volatile *)DCPLB_DATA12) 110 #define bfin_read_DCPLB_DATA12() bfin_read32(DCPLB_DATA12) 111 #define bfin_write_DCPLB_DATA12(val) bfin_write32(DCPLB_DATA12, val) 112 #define pDCPLB_DATA13 ((uint32_t volatile *)DCPLB_DATA13) 113 #define bfin_read_DCPLB_DATA13() bfin_read32(DCPLB_DATA13) 114 #define bfin_write_DCPLB_DATA13(val) bfin_write32(DCPLB_DATA13, val) 115 #define pDCPLB_DATA14 ((uint32_t volatile *)DCPLB_DATA14) 116 #define bfin_read_DCPLB_DATA14() bfin_read32(DCPLB_DATA14) 117 #define bfin_write_DCPLB_DATA14(val) bfin_write32(DCPLB_DATA14, val) 118 #define pDCPLB_DATA15 ((uint32_t volatile *)DCPLB_DATA15) 119 #define bfin_read_DCPLB_DATA15() bfin_read32(DCPLB_DATA15) 120 #define bfin_write_DCPLB_DATA15(val) bfin_write32(DCPLB_DATA15, val) 121 #define pDTEST_COMMAND ((uint32_t volatile *)DTEST_COMMAND) 122 #define bfin_read_DTEST_COMMAND() bfin_read32(DTEST_COMMAND) 123 #define bfin_write_DTEST_COMMAND(val) bfin_write32(DTEST_COMMAND, val) 124 #define pDTEST_DATA0 ((uint32_t volatile *)DTEST_DATA0) 125 #define bfin_read_DTEST_DATA0() bfin_read32(DTEST_DATA0) 126 #define bfin_write_DTEST_DATA0(val) bfin_write32(DTEST_DATA0, val) 127 #define pDTEST_DATA1 ((uint32_t volatile *)DTEST_DATA1) 128 #define bfin_read_DTEST_DATA1() bfin_read32(DTEST_DATA1) 129 #define bfin_write_DTEST_DATA1(val) bfin_write32(DTEST_DATA1, val) 130 #define pIMEM_CONTROL ((uint32_t volatile *)IMEM_CONTROL) 131 #define bfin_read_IMEM_CONTROL() bfin_read32(IMEM_CONTROL) 132 #define bfin_write_IMEM_CONTROL(val) bfin_write32(IMEM_CONTROL, val) 133 #define pICPLB_STATUS ((uint32_t volatile *)ICPLB_STATUS) 134 #define bfin_read_ICPLB_STATUS() bfin_read32(ICPLB_STATUS) 135 #define bfin_write_ICPLB_STATUS(val) bfin_write32(ICPLB_STATUS, val) 136 #define pICPLB_FAULT_ADDR ((uint32_t volatile *)ICPLB_FAULT_ADDR) 137 #define bfin_read_ICPLB_FAULT_ADDR() bfin_read32(ICPLB_FAULT_ADDR) 138 #define bfin_write_ICPLB_FAULT_ADDR(val) bfin_write32(ICPLB_FAULT_ADDR, val) 139 #define pICPLB_ADDR0 ((uint32_t volatile *)ICPLB_ADDR0) 140 #define bfin_read_ICPLB_ADDR0() bfin_read32(ICPLB_ADDR0) 141 #define bfin_write_ICPLB_ADDR0(val) bfin_write32(ICPLB_ADDR0, val) 142 #define pICPLB_ADDR1 ((uint32_t volatile *)ICPLB_ADDR1) 143 #define bfin_read_ICPLB_ADDR1() bfin_read32(ICPLB_ADDR1) 144 #define bfin_write_ICPLB_ADDR1(val) bfin_write32(ICPLB_ADDR1, val) 145 #define pICPLB_ADDR2 ((uint32_t volatile *)ICPLB_ADDR2) 146 #define bfin_read_ICPLB_ADDR2() bfin_read32(ICPLB_ADDR2) 147 #define bfin_write_ICPLB_ADDR2(val) bfin_write32(ICPLB_ADDR2, val) 148 #define pICPLB_ADDR3 ((uint32_t volatile *)ICPLB_ADDR3) 149 #define bfin_read_ICPLB_ADDR3() bfin_read32(ICPLB_ADDR3) 150 #define bfin_write_ICPLB_ADDR3(val) bfin_write32(ICPLB_ADDR3, val) 151 #define pICPLB_ADDR4 ((uint32_t volatile *)ICPLB_ADDR4) 152 #define bfin_read_ICPLB_ADDR4() bfin_read32(ICPLB_ADDR4) 153 #define bfin_write_ICPLB_ADDR4(val) bfin_write32(ICPLB_ADDR4, val) 154 #define pICPLB_ADDR5 ((uint32_t volatile *)ICPLB_ADDR5) 155 #define bfin_read_ICPLB_ADDR5() bfin_read32(ICPLB_ADDR5) 156 #define bfin_write_ICPLB_ADDR5(val) bfin_write32(ICPLB_ADDR5, val) 157 #define pICPLB_ADDR6 ((uint32_t volatile *)ICPLB_ADDR6) 158 #define bfin_read_ICPLB_ADDR6() bfin_read32(ICPLB_ADDR6) 159 #define bfin_write_ICPLB_ADDR6(val) bfin_write32(ICPLB_ADDR6, val) 160 #define pICPLB_ADDR7 ((uint32_t volatile *)ICPLB_ADDR7) 161 #define bfin_read_ICPLB_ADDR7() bfin_read32(ICPLB_ADDR7) 162 #define bfin_write_ICPLB_ADDR7(val) bfin_write32(ICPLB_ADDR7, val) 163 #define pICPLB_ADDR8 ((uint32_t volatile *)ICPLB_ADDR8) 164 #define bfin_read_ICPLB_ADDR8() bfin_read32(ICPLB_ADDR8) 165 #define bfin_write_ICPLB_ADDR8(val) bfin_write32(ICPLB_ADDR8, val) 166 #define pICPLB_ADDR9 ((uint32_t volatile *)ICPLB_ADDR9) 167 #define bfin_read_ICPLB_ADDR9() bfin_read32(ICPLB_ADDR9) 168 #define bfin_write_ICPLB_ADDR9(val) bfin_write32(ICPLB_ADDR9, val) 169 #define pICPLB_ADDR10 ((uint32_t volatile *)ICPLB_ADDR10) 170 #define bfin_read_ICPLB_ADDR10() bfin_read32(ICPLB_ADDR10) 171 #define bfin_write_ICPLB_ADDR10(val) bfin_write32(ICPLB_ADDR10, val) 172 #define pICPLB_ADDR11 ((uint32_t volatile *)ICPLB_ADDR11) 173 #define bfin_read_ICPLB_ADDR11() bfin_read32(ICPLB_ADDR11) 174 #define bfin_write_ICPLB_ADDR11(val) bfin_write32(ICPLB_ADDR11, val) 175 #define pICPLB_ADDR12 ((uint32_t volatile *)ICPLB_ADDR12) 176 #define bfin_read_ICPLB_ADDR12() bfin_read32(ICPLB_ADDR12) 177 #define bfin_write_ICPLB_ADDR12(val) bfin_write32(ICPLB_ADDR12, val) 178 #define pICPLB_ADDR13 ((uint32_t volatile *)ICPLB_ADDR13) 179 #define bfin_read_ICPLB_ADDR13() bfin_read32(ICPLB_ADDR13) 180 #define bfin_write_ICPLB_ADDR13(val) bfin_write32(ICPLB_ADDR13, val) 181 #define pICPLB_ADDR14 ((uint32_t volatile *)ICPLB_ADDR14) 182 #define bfin_read_ICPLB_ADDR14() bfin_read32(ICPLB_ADDR14) 183 #define bfin_write_ICPLB_ADDR14(val) bfin_write32(ICPLB_ADDR14, val) 184 #define pICPLB_ADDR15 ((uint32_t volatile *)ICPLB_ADDR15) 185 #define bfin_read_ICPLB_ADDR15() bfin_read32(ICPLB_ADDR15) 186 #define bfin_write_ICPLB_ADDR15(val) bfin_write32(ICPLB_ADDR15, val) 187 #define pICPLB_DATA0 ((uint32_t volatile *)ICPLB_DATA0) 188 #define bfin_read_ICPLB_DATA0() bfin_read32(ICPLB_DATA0) 189 #define bfin_write_ICPLB_DATA0(val) bfin_write32(ICPLB_DATA0, val) 190 #define pICPLB_DATA1 ((uint32_t volatile *)ICPLB_DATA1) 191 #define bfin_read_ICPLB_DATA1() bfin_read32(ICPLB_DATA1) 192 #define bfin_write_ICPLB_DATA1(val) bfin_write32(ICPLB_DATA1, val) 193 #define pICPLB_DATA2 ((uint32_t volatile *)ICPLB_DATA2) 194 #define bfin_read_ICPLB_DATA2() bfin_read32(ICPLB_DATA2) 195 #define bfin_write_ICPLB_DATA2(val) bfin_write32(ICPLB_DATA2, val) 196 #define pICPLB_DATA3 ((uint32_t volatile *)ICPLB_DATA3) 197 #define bfin_read_ICPLB_DATA3() bfin_read32(ICPLB_DATA3) 198 #define bfin_write_ICPLB_DATA3(val) bfin_write32(ICPLB_DATA3, val) 199 #define pICPLB_DATA4 ((uint32_t volatile *)ICPLB_DATA4) 200 #define bfin_read_ICPLB_DATA4() bfin_read32(ICPLB_DATA4) 201 #define bfin_write_ICPLB_DATA4(val) bfin_write32(ICPLB_DATA4, val) 202 #define pICPLB_DATA5 ((uint32_t volatile *)ICPLB_DATA5) 203 #define bfin_read_ICPLB_DATA5() bfin_read32(ICPLB_DATA5) 204 #define bfin_write_ICPLB_DATA5(val) bfin_write32(ICPLB_DATA5, val) 205 #define pICPLB_DATA6 ((uint32_t volatile *)ICPLB_DATA6) 206 #define bfin_read_ICPLB_DATA6() bfin_read32(ICPLB_DATA6) 207 #define bfin_write_ICPLB_DATA6(val) bfin_write32(ICPLB_DATA6, val) 208 #define pICPLB_DATA7 ((uint32_t volatile *)ICPLB_DATA7) 209 #define bfin_read_ICPLB_DATA7() bfin_read32(ICPLB_DATA7) 210 #define bfin_write_ICPLB_DATA7(val) bfin_write32(ICPLB_DATA7, val) 211 #define pICPLB_DATA8 ((uint32_t volatile *)ICPLB_DATA8) 212 #define bfin_read_ICPLB_DATA8() bfin_read32(ICPLB_DATA8) 213 #define bfin_write_ICPLB_DATA8(val) bfin_write32(ICPLB_DATA8, val) 214 #define pICPLB_DATA9 ((uint32_t volatile *)ICPLB_DATA9) 215 #define bfin_read_ICPLB_DATA9() bfin_read32(ICPLB_DATA9) 216 #define bfin_write_ICPLB_DATA9(val) bfin_write32(ICPLB_DATA9, val) 217 #define pICPLB_DATA10 ((uint32_t volatile *)ICPLB_DATA10) 218 #define bfin_read_ICPLB_DATA10() bfin_read32(ICPLB_DATA10) 219 #define bfin_write_ICPLB_DATA10(val) bfin_write32(ICPLB_DATA10, val) 220 #define pICPLB_DATA11 ((uint32_t volatile *)ICPLB_DATA11) 221 #define bfin_read_ICPLB_DATA11() bfin_read32(ICPLB_DATA11) 222 #define bfin_write_ICPLB_DATA11(val) bfin_write32(ICPLB_DATA11, val) 223 #define pICPLB_DATA12 ((uint32_t volatile *)ICPLB_DATA12) 224 #define bfin_read_ICPLB_DATA12() bfin_read32(ICPLB_DATA12) 225 #define bfin_write_ICPLB_DATA12(val) bfin_write32(ICPLB_DATA12, val) 226 #define pICPLB_DATA13 ((uint32_t volatile *)ICPLB_DATA13) 227 #define bfin_read_ICPLB_DATA13() bfin_read32(ICPLB_DATA13) 228 #define bfin_write_ICPLB_DATA13(val) bfin_write32(ICPLB_DATA13, val) 229 #define pICPLB_DATA14 ((uint32_t volatile *)ICPLB_DATA14) 230 #define bfin_read_ICPLB_DATA14() bfin_read32(ICPLB_DATA14) 231 #define bfin_write_ICPLB_DATA14(val) bfin_write32(ICPLB_DATA14, val) 232 #define pICPLB_DATA15 ((uint32_t volatile *)ICPLB_DATA15) 233 #define bfin_read_ICPLB_DATA15() bfin_read32(ICPLB_DATA15) 234 #define bfin_write_ICPLB_DATA15(val) bfin_write32(ICPLB_DATA15, val) 235 #define pITEST_COMMAND ((uint32_t volatile *)ITEST_COMMAND) 236 #define bfin_read_ITEST_COMMAND() bfin_read32(ITEST_COMMAND) 237 #define bfin_write_ITEST_COMMAND(val) bfin_write32(ITEST_COMMAND, val) 238 #define pITEST_DATA0 ((uint32_t volatile *)ITEST_DATA0) 239 #define bfin_read_ITEST_DATA0() bfin_read32(ITEST_DATA0) 240 #define bfin_write_ITEST_DATA0(val) bfin_write32(ITEST_DATA0, val) 241 #define pITEST_DATA1 ((uint32_t volatile *)ITEST_DATA1) 242 #define bfin_read_ITEST_DATA1() bfin_read32(ITEST_DATA1) 243 #define bfin_write_ITEST_DATA1(val) bfin_write32(ITEST_DATA1, val) 244 #define pSICA_SWRST ((uint16_t volatile *)SICA_SWRST) 245 #define bfin_read_SICA_SWRST() bfin_read16(SICA_SWRST) 246 #define bfin_write_SICA_SWRST(val) bfin_write16(SICA_SWRST, val) 247 #define pSICA_SYSCR ((uint16_t volatile *)SICA_SYSCR) 248 #define bfin_read_SICA_SYSCR() bfin_read16(SICA_SYSCR) 249 #define bfin_write_SICA_SYSCR(val) bfin_write16(SICA_SYSCR, val) 250 #define pSICA_RVECT ((uint16_t volatile *)SICA_RVECT) 251 #define bfin_read_SICA_RVECT() bfin_read16(SICA_RVECT) 252 #define bfin_write_SICA_RVECT(val) bfin_write16(SICA_RVECT, val) 253 #define pSICA_IMASK0 ((uint32_t volatile *)SICA_IMASK0) 254 #define bfin_read_SICA_IMASK0() bfin_read32(SICA_IMASK0) 255 #define bfin_write_SICA_IMASK0(val) bfin_write32(SICA_IMASK0, val) 256 #define pSICA_IMASK1 ((uint32_t volatile *)SICA_IMASK1) 257 #define bfin_read_SICA_IMASK1() bfin_read32(SICA_IMASK1) 258 #define bfin_write_SICA_IMASK1(val) bfin_write32(SICA_IMASK1, val) 259 #define pSICA_ISR0 ((uint32_t volatile *)SICA_ISR0) 260 #define bfin_read_SICA_ISR0() bfin_read32(SICA_ISR0) 261 #define bfin_write_SICA_ISR0(val) bfin_write32(SICA_ISR0, val) 262 #define pSICA_ISR1 ((uint32_t volatile *)SICA_ISR1) 263 #define bfin_read_SICA_ISR1() bfin_read32(SICA_ISR1) 264 #define bfin_write_SICA_ISR1(val) bfin_write32(SICA_ISR1, val) 265 #define pSICA_IWR0 ((uint32_t volatile *)SICA_IWR0) 266 #define bfin_read_SICA_IWR0() bfin_read32(SICA_IWR0) 267 #define bfin_write_SICA_IWR0(val) bfin_write32(SICA_IWR0, val) 268 #define pSICA_IWR1 ((uint32_t volatile *)SICA_IWR1) 269 #define bfin_read_SICA_IWR1() bfin_read32(SICA_IWR1) 270 #define bfin_write_SICA_IWR1(val) bfin_write32(SICA_IWR1, val) 271 #define pSICA_IAR0 ((uint32_t volatile *)SICA_IAR0) 272 #define bfin_read_SICA_IAR0() bfin_read32(SICA_IAR0) 273 #define bfin_write_SICA_IAR0(val) bfin_write32(SICA_IAR0, val) 274 #define pSICA_IAR1 ((uint32_t volatile *)SICA_IAR1) 275 #define bfin_read_SICA_IAR1() bfin_read32(SICA_IAR1) 276 #define bfin_write_SICA_IAR1(val) bfin_write32(SICA_IAR1, val) 277 #define pSICA_IAR2 ((uint32_t volatile *)SICA_IAR2) 278 #define bfin_read_SICA_IAR2() bfin_read32(SICA_IAR2) 279 #define bfin_write_SICA_IAR2(val) bfin_write32(SICA_IAR2, val) 280 #define pSICA_IAR3 ((uint32_t volatile *)SICA_IAR3) 281 #define bfin_read_SICA_IAR3() bfin_read32(SICA_IAR3) 282 #define bfin_write_SICA_IAR3(val) bfin_write32(SICA_IAR3, val) 283 #define pSICA_IAR4 ((uint32_t volatile *)SICA_IAR4) 284 #define bfin_read_SICA_IAR4() bfin_read32(SICA_IAR4) 285 #define bfin_write_SICA_IAR4(val) bfin_write32(SICA_IAR4, val) 286 #define pSICA_IAR5 ((uint32_t volatile *)SICA_IAR5) 287 #define bfin_read_SICA_IAR5() bfin_read32(SICA_IAR5) 288 #define bfin_write_SICA_IAR5(val) bfin_write32(SICA_IAR5, val) 289 #define pSICA_IAR6 ((uint32_t volatile *)SICA_IAR6) 290 #define bfin_read_SICA_IAR6() bfin_read32(SICA_IAR6) 291 #define bfin_write_SICA_IAR6(val) bfin_write32(SICA_IAR6, val) 292 #define pSICA_IAR7 ((uint32_t volatile *)SICA_IAR7) 293 #define bfin_read_SICA_IAR7() bfin_read32(SICA_IAR7) 294 #define bfin_write_SICA_IAR7(val) bfin_write32(SICA_IAR7, val) 295 #define pSICB_SWRST ((uint16_t volatile *)SICB_SWRST) 296 #define bfin_read_SICB_SWRST() bfin_read16(SICB_SWRST) 297 #define bfin_write_SICB_SWRST(val) bfin_write16(SICB_SWRST, val) 298 #define pSICB_SYSCR ((uint16_t volatile *)SICB_SYSCR) 299 #define bfin_read_SICB_SYSCR() bfin_read16(SICB_SYSCR) 300 #define bfin_write_SICB_SYSCR(val) bfin_write16(SICB_SYSCR, val) 301 #define pSICB_RVECT ((uint16_t volatile *)SICB_RVECT) 302 #define bfin_read_SICB_RVECT() bfin_read16(SICB_RVECT) 303 #define bfin_write_SICB_RVECT(val) bfin_write16(SICB_RVECT, val) 304 #define pSICB_IMASK0 ((uint32_t volatile *)SICB_IMASK0) 305 #define bfin_read_SICB_IMASK0() bfin_read32(SICB_IMASK0) 306 #define bfin_write_SICB_IMASK0(val) bfin_write32(SICB_IMASK0, val) 307 #define pSICB_IMASK1 ((uint32_t volatile *)SICB_IMASK1) 308 #define bfin_read_SICB_IMASK1() bfin_read32(SICB_IMASK1) 309 #define bfin_write_SICB_IMASK1(val) bfin_write32(SICB_IMASK1, val) 310 #define pSICB_ISR0 ((uint32_t volatile *)SICB_ISR0) 311 #define bfin_read_SICB_ISR0() bfin_read32(SICB_ISR0) 312 #define bfin_write_SICB_ISR0(val) bfin_write32(SICB_ISR0, val) 313 #define pSICB_ISR1 ((uint32_t volatile *)SICB_ISR1) 314 #define bfin_read_SICB_ISR1() bfin_read32(SICB_ISR1) 315 #define bfin_write_SICB_ISR1(val) bfin_write32(SICB_ISR1, val) 316 #define pSICB_IWR0 ((uint32_t volatile *)SICB_IWR0) 317 #define bfin_read_SICB_IWR0() bfin_read32(SICB_IWR0) 318 #define bfin_write_SICB_IWR0(val) bfin_write32(SICB_IWR0, val) 319 #define pSICB_IWR1 ((uint32_t volatile *)SICB_IWR1) 320 #define bfin_read_SICB_IWR1() bfin_read32(SICB_IWR1) 321 #define bfin_write_SICB_IWR1(val) bfin_write32(SICB_IWR1, val) 322 #define pSICB_IAR0 ((uint32_t volatile *)SICB_IAR0) 323 #define bfin_read_SICB_IAR0() bfin_read32(SICB_IAR0) 324 #define bfin_write_SICB_IAR0(val) bfin_write32(SICB_IAR0, val) 325 #define pSICB_IAR1 ((uint32_t volatile *)SICB_IAR1) 326 #define bfin_read_SICB_IAR1() bfin_read32(SICB_IAR1) 327 #define bfin_write_SICB_IAR1(val) bfin_write32(SICB_IAR1, val) 328 #define pSICB_IAR2 ((uint32_t volatile *)SICB_IAR2) 329 #define bfin_read_SICB_IAR2() bfin_read32(SICB_IAR2) 330 #define bfin_write_SICB_IAR2(val) bfin_write32(SICB_IAR2, val) 331 #define pSICB_IAR3 ((uint32_t volatile *)SICB_IAR3) 332 #define bfin_read_SICB_IAR3() bfin_read32(SICB_IAR3) 333 #define bfin_write_SICB_IAR3(val) bfin_write32(SICB_IAR3, val) 334 #define pSICB_IAR4 ((uint32_t volatile *)SICB_IAR4) 335 #define bfin_read_SICB_IAR4() bfin_read32(SICB_IAR4) 336 #define bfin_write_SICB_IAR4(val) bfin_write32(SICB_IAR4, val) 337 #define pSICB_IAR5 ((uint32_t volatile *)SICB_IAR5) 338 #define bfin_read_SICB_IAR5() bfin_read32(SICB_IAR5) 339 #define bfin_write_SICB_IAR5(val) bfin_write32(SICB_IAR5, val) 340 #define pSICB_IAR6 ((uint32_t volatile *)SICB_IAR6) 341 #define bfin_read_SICB_IAR6() bfin_read32(SICB_IAR6) 342 #define bfin_write_SICB_IAR6(val) bfin_write32(SICB_IAR6, val) 343 #define pSICB_IAR7 ((uint32_t volatile *)SICB_IAR7) 344 #define bfin_read_SICB_IAR7() bfin_read32(SICB_IAR7) 345 #define bfin_write_SICB_IAR7(val) bfin_write32(SICB_IAR7, val) 346 #define pPPI0_CONTROL ((uint16_t volatile *)PPI0_CONTROL) 347 #define bfin_read_PPI0_CONTROL() bfin_read16(PPI0_CONTROL) 348 #define bfin_write_PPI0_CONTROL(val) bfin_write16(PPI0_CONTROL, val) 349 #define pPPI0_STATUS ((uint16_t volatile *)PPI0_STATUS) 350 #define bfin_read_PPI0_STATUS() bfin_read16(PPI0_STATUS) 351 #define bfin_write_PPI0_STATUS(val) bfin_write16(PPI0_STATUS, val) 352 #define pPPI0_DELAY ((uint16_t volatile *)PPI0_DELAY) 353 #define bfin_read_PPI0_DELAY() bfin_read16(PPI0_DELAY) 354 #define bfin_write_PPI0_DELAY(val) bfin_write16(PPI0_DELAY, val) 355 #define pPPI0_COUNT ((uint16_t volatile *)PPI0_COUNT) 356 #define bfin_read_PPI0_COUNT() bfin_read16(PPI0_COUNT) 357 #define bfin_write_PPI0_COUNT(val) bfin_write16(PPI0_COUNT, val) 358 #define pPPI0_FRAME ((uint16_t volatile *)PPI0_FRAME) 359 #define bfin_read_PPI0_FRAME() bfin_read16(PPI0_FRAME) 360 #define bfin_write_PPI0_FRAME(val) bfin_write16(PPI0_FRAME, val) 361 #define pPPI1_CONTROL ((uint16_t volatile *)PPI1_CONTROL) 362 #define bfin_read_PPI1_CONTROL() bfin_read16(PPI1_CONTROL) 363 #define bfin_write_PPI1_CONTROL(val) bfin_write16(PPI1_CONTROL, val) 364 #define pPPI1_STATUS ((uint16_t volatile *)PPI1_STATUS) 365 #define bfin_read_PPI1_STATUS() bfin_read16(PPI1_STATUS) 366 #define bfin_write_PPI1_STATUS(val) bfin_write16(PPI1_STATUS, val) 367 #define pPPI1_DELAY ((uint16_t volatile *)PPI1_DELAY) 368 #define bfin_read_PPI1_DELAY() bfin_read16(PPI1_DELAY) 369 #define bfin_write_PPI1_DELAY(val) bfin_write16(PPI1_DELAY, val) 370 #define pPPI1_COUNT ((uint16_t volatile *)PPI1_COUNT) 371 #define bfin_read_PPI1_COUNT() bfin_read16(PPI1_COUNT) 372 #define bfin_write_PPI1_COUNT(val) bfin_write16(PPI1_COUNT, val) 373 #define pPPI1_FRAME ((uint16_t volatile *)PPI1_FRAME) 374 #define bfin_read_PPI1_FRAME() bfin_read16(PPI1_FRAME) 375 #define bfin_write_PPI1_FRAME(val) bfin_write16(PPI1_FRAME, val) 376 #define pTBUFCTL ((uint32_t volatile *)TBUFCTL) 377 #define bfin_read_TBUFCTL() bfin_read32(TBUFCTL) 378 #define bfin_write_TBUFCTL(val) bfin_write32(TBUFCTL, val) 379 #define pTBUFSTAT ((uint32_t volatile *)TBUFSTAT) 380 #define bfin_read_TBUFSTAT() bfin_read32(TBUFSTAT) 381 #define bfin_write_TBUFSTAT(val) bfin_write32(TBUFSTAT, val) 382 #define pTBUF ((uint32_t volatile *)TBUF) 383 #define bfin_read_TBUF() bfin_read32(TBUF) 384 #define bfin_write_TBUF(val) bfin_write32(TBUF, val) 385 #define pPFCTL ((uint32_t volatile *)PFCTL) 386 #define bfin_read_PFCTL() bfin_read32(PFCTL) 387 #define bfin_write_PFCTL(val) bfin_write32(PFCTL, val) 388 #define pPFCNTR0 ((uint32_t volatile *)PFCNTR0) 389 #define bfin_read_PFCNTR0() bfin_read32(PFCNTR0) 390 #define bfin_write_PFCNTR0(val) bfin_write32(PFCNTR0, val) 391 #define pPFCNTR1 ((uint32_t volatile *)PFCNTR1) 392 #define bfin_read_PFCNTR1() bfin_read32(PFCNTR1) 393 #define bfin_write_PFCNTR1(val) bfin_write32(PFCNTR1, val) 394 #define pSRAM_BASE_ADDR_CORE_A ((uint32_t volatile *)SRAM_BASE_ADDR_CORE_A) 395 #define bfin_read_SRAM_BASE_ADDR_CORE_A() bfin_read32(SRAM_BASE_ADDR_CORE_A) 396 #define bfin_write_SRAM_BASE_ADDR_CORE_A(val) bfin_write32(SRAM_BASE_ADDR_CORE_A, val) 397 #define pSRAM_BASE_ADDR_CORE_B ((uint32_t volatile *)SRAM_BASE_ADDR_CORE_B) 398 #define bfin_read_SRAM_BASE_ADDR_CORE_B() bfin_read32(SRAM_BASE_ADDR_CORE_B) 399 #define bfin_write_SRAM_BASE_ADDR_CORE_B(val) bfin_write32(SRAM_BASE_ADDR_CORE_B, val) 400 #define pEVT_OVERRIDE ((uint32_t volatile *)EVT_OVERRIDE) 401 #define bfin_read_EVT_OVERRIDE() bfin_read32(EVT_OVERRIDE) 402 #define bfin_write_EVT_OVERRIDE(val) bfin_write32(EVT_OVERRIDE, val) 403 #define pUART_THR ((uint16_t volatile *)UART_THR) 404 #define bfin_read_UART_THR() bfin_read16(UART_THR) 405 #define bfin_write_UART_THR(val) bfin_write16(UART_THR, val) 406 #define pUART_RBR ((uint16_t volatile *)UART_RBR) 407 #define bfin_read_UART_RBR() bfin_read16(UART_RBR) 408 #define bfin_write_UART_RBR(val) bfin_write16(UART_RBR, val) 409 #define pUART_DLL ((uint16_t volatile *)UART_DLL) 410 #define bfin_read_UART_DLL() bfin_read16(UART_DLL) 411 #define bfin_write_UART_DLL(val) bfin_write16(UART_DLL, val) 412 #define pUART_DLH ((uint16_t volatile *)UART_DLH) 413 #define bfin_read_UART_DLH() bfin_read16(UART_DLH) 414 #define bfin_write_UART_DLH(val) bfin_write16(UART_DLH, val) 415 #define pUART_IER ((uint16_t volatile *)UART_IER) 416 #define bfin_read_UART_IER() bfin_read16(UART_IER) 417 #define bfin_write_UART_IER(val) bfin_write16(UART_IER, val) 418 #define pUART_IIR ((uint16_t volatile *)UART_IIR) 419 #define bfin_read_UART_IIR() bfin_read16(UART_IIR) 420 #define bfin_write_UART_IIR(val) bfin_write16(UART_IIR, val) 421 #define pUART_LCR ((uint16_t volatile *)UART_LCR) 422 #define bfin_read_UART_LCR() bfin_read16(UART_LCR) 423 #define bfin_write_UART_LCR(val) bfin_write16(UART_LCR, val) 424 #define pUART_MCR ((uint16_t volatile *)UART_MCR) 425 #define bfin_read_UART_MCR() bfin_read16(UART_MCR) 426 #define bfin_write_UART_MCR(val) bfin_write16(UART_MCR, val) 427 #define pUART_LSR ((uint16_t volatile *)UART_LSR) 428 #define bfin_read_UART_LSR() bfin_read16(UART_LSR) 429 #define bfin_write_UART_LSR(val) bfin_write16(UART_LSR, val) 430 #define pUART_MSR ((uint16_t volatile *)UART_MSR) 431 #define bfin_read_UART_MSR() bfin_read16(UART_MSR) 432 #define bfin_write_UART_MSR(val) bfin_write16(UART_MSR, val) 433 #define pUART_SCR ((uint16_t volatile *)UART_SCR) 434 #define bfin_read_UART_SCR() bfin_read16(UART_SCR) 435 #define bfin_write_UART_SCR(val) bfin_write16(UART_SCR, val) 436 #define pUART_GCTL ((uint16_t volatile *)UART_GCTL) 437 #define bfin_read_UART_GCTL() bfin_read16(UART_GCTL) 438 #define bfin_write_UART_GCTL(val) bfin_write16(UART_GCTL, val) 439 #define pUART_GBL ((uint16_t volatile *)UART_GBL) 440 #define bfin_read_UART_GBL() bfin_read16(UART_GBL) 441 #define bfin_write_UART_GBL(val) bfin_write16(UART_GBL, val) 442 #define pEBIU_AMGCTL ((uint16_t volatile *)EBIU_AMGCTL) 443 #define bfin_read_EBIU_AMGCTL() bfin_read16(EBIU_AMGCTL) 444 #define bfin_write_EBIU_AMGCTL(val) bfin_write16(EBIU_AMGCTL, val) 445 #define pEBIU_AMBCTL0 ((uint32_t volatile *)EBIU_AMBCTL0) 446 #define bfin_read_EBIU_AMBCTL0() bfin_read32(EBIU_AMBCTL0) 447 #define bfin_write_EBIU_AMBCTL0(val) bfin_write32(EBIU_AMBCTL0, val) 448 #define pEBIU_AMBCTL1 ((uint32_t volatile *)EBIU_AMBCTL1) 449 #define bfin_read_EBIU_AMBCTL1() bfin_read32(EBIU_AMBCTL1) 450 #define bfin_write_EBIU_AMBCTL1(val) bfin_write32(EBIU_AMBCTL1, val) 451 #define pEBIU_SDGCTL ((uint32_t volatile *)EBIU_SDGCTL) 452 #define bfin_read_EBIU_SDGCTL() bfin_read32(EBIU_SDGCTL) 453 #define bfin_write_EBIU_SDGCTL(val) bfin_write32(EBIU_SDGCTL, val) 454 #define pEBIU_SDBCTL ((uint32_t volatile *)EBIU_SDBCTL) 455 #define bfin_read_EBIU_SDBCTL() bfin_read32(EBIU_SDBCTL) 456 #define bfin_write_EBIU_SDBCTL(val) bfin_write32(EBIU_SDBCTL, val) 457 #define pEBIU_SDRRC ((uint16_t volatile *)EBIU_SDRRC) 458 #define bfin_read_EBIU_SDRRC() bfin_read16(EBIU_SDRRC) 459 #define bfin_write_EBIU_SDRRC(val) bfin_write16(EBIU_SDRRC, val) 460 #define pEBIU_SDSTAT ((uint16_t volatile *)EBIU_SDSTAT) 461 #define bfin_read_EBIU_SDSTAT() bfin_read16(EBIU_SDSTAT) 462 #define bfin_write_EBIU_SDSTAT(val) bfin_write16(EBIU_SDSTAT, val) 463 464 #endif /* __BFIN_CDEF_ADSP_BF561_proc__ */ 465