1 /* 2 * (C) Copyright 2005-2008 3 * Samsung Electronics, 4 * Kyungmin Park <kyungmin.park@samsung.com> 5 * 6 * Configuration settings for the 2420 Samsung Apollon board. 7 * 8 * See file CREDITS for list of people who contributed to this 9 * project. 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License as 13 * published by the Free Software Foundation; either version 2 of 14 * the License, or (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24 * MA 02111-1307 USA 25 */ 26 27 #ifndef __CONFIG_H 28 #define __CONFIG_H 29 30 /* 31 * High Level Configuration Options 32 */ 33 #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */ 34 #define CONFIG_OMAP 1 /* in a TI OMAP core */ 35 #define CONFIG_OMAP2420 1 /* which is in a 2420 */ 36 #define CONFIG_OMAP2420_APOLLON 1 37 #define CONFIG_APOLLON 1 38 #define CONFIG_APOLLON_PLUS 1 /* If you have apollon plus 1.x */ 39 40 /* Clock config to target*/ 41 #define PRCM_CONFIG_I 1 42 /* #define PRCM_CONFIG_II 1 */ 43 44 /* Boot method */ 45 /* uncomment if you use NOR boot */ 46 /* #define CONFIG_SYS_NOR_BOOT 1 */ 47 48 /* uncomment if you use NOR on CS3 */ 49 /* #define CONFIG_SYS_USE_NOR 1 */ 50 51 #ifdef CONFIG_SYS_NOR_BOOT 52 #undef CONFIG_SYS_USE_NOR 53 #define CONFIG_SYS_USE_NOR 1 54 #endif 55 56 /* uncommnet if you want to use UBI */ 57 #define CONFIG_SYS_USE_UBI 58 59 #include <asm/arch/omap2420.h> /* get chip and board defs */ 60 61 #define V_SCLK 12000000 62 63 /* input clock of PLL */ 64 /* the OMAP2420 H4 has 12MHz, 13MHz, or 19.2Mhz crystal input */ 65 #define CONFIG_SYS_CLK_FREQ V_SCLK 66 67 #undef CONFIG_USE_IRQ /* no support for IRQs */ 68 #define CONFIG_MISC_INIT_R 69 70 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 71 #define CONFIG_SETUP_MEMORY_TAGS 1 72 #define CONFIG_INITRD_TAG 1 73 #define CONFIG_REVISION_TAG 1 74 75 /* 76 * Size of malloc() pool 77 */ 78 #define CONFIG_ENV_SIZE SZ_128K /* Total Size of Environment Sector */ 79 #define CONFIG_ENV_SIZE_FLEX SZ_256K 80 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_1M) 81 /* bytes reserved for initial data */ 82 #define CONFIG_SYS_GBL_DATA_SIZE 128 83 84 /* 85 * Hardware drivers 86 */ 87 88 /* 89 * SMC91c96 Etherent 90 */ 91 #define CONFIG_NET_MULTI 92 #define CONFIG_LAN91C96 93 #define CONFIG_LAN91C96_BASE (APOLLON_CS1_BASE+0x300) 94 #define CONFIG_LAN91C96_EXT_PHY 95 96 /* 97 * NS16550 Configuration 98 */ 99 #define V_NS16550_CLK (48000000) /* 48MHz (APLL96/2) */ 100 101 #define CONFIG_SYS_NS16550 102 #define CONFIG_SYS_NS16550_SERIAL 103 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 104 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK /* 3MHz (1.5MHz*2) */ 105 #define CONFIG_SYS_NS16550_COM1 OMAP2420_UART1 106 107 /* 108 * select serial console configuration 109 */ 110 #define CONFIG_SERIAL1 1 /* UART1 on H4 */ 111 112 /* allow to overwrite serial and ethaddr */ 113 #define CONFIG_ENV_OVERWRITE 114 #define CONFIG_CONS_INDEX 1 115 #define CONFIG_BAUDRATE 115200 116 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 117 118 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ 119 #include <config_cmd_default.h> 120 121 #define CONFIG_CMD_DHCP 122 #define CONFIG_CMD_DIAG 123 #define CONFIG_CMD_ONENAND 124 125 #ifdef CONFIG_SYS_USE_UBI 126 #define CONFIG_CMD_JFFS2 127 #define CONFIG_CMD_UBI 128 #define CONFIG_RBTREE 129 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 130 #define CONFIG_MTD_PARTITIONS 131 #endif 132 133 #undef CONFIG_CMD_SOURCE 134 135 #ifndef CONFIG_SYS_USE_NOR 136 # undef CONFIG_CMD_FLASH 137 # undef CONFIG_CMD_IMLS 138 #endif 139 140 #define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT 141 142 #define CONFIG_BOOTDELAY 1 143 144 #define CONFIG_NETMASK 255.255.255.0 145 #define CONFIG_IPADDR 192.168.116.25 146 #define CONFIG_SERVERIP 192.168.116.1 147 #define CONFIG_BOOTFILE "uImage" 148 #define CONFIG_ETHADDR 00:0E:99:00:24:20 149 150 #ifdef CONFIG_APOLLON_PLUS 151 #define CONFIG_SYS_MEM "mem=64M" 152 #else 153 #define CONFIG_SYS_MEM "mem=128" 154 #endif 155 156 #ifdef CONFIG_SYS_USE_UBI 157 #define CONFIG_SYS_UBI "ubi.mtd=4" 158 #else 159 #define CONFIG_SYS_UBI "" 160 #endif 161 162 #define CONFIG_BOOTARGS "root=/dev/nfs rw " CONFIG_SYS_MEM \ 163 " console=ttyS0,115200n8" \ 164 " ip=192.168.116.25:192.168.116.1:192.168.116.1:255.255.255.0:" \ 165 "apollon:eth0:off nfsroot=/tftpboot/nfsroot profile=2 " \ 166 CONFIG_SYS_UBI 167 168 #define CONFIG_EXTRA_ENV_SETTINGS \ 169 "Image=tftp 0x80008000 Image; go 0x80008000\0" \ 170 "zImage=tftp 0x80180000 zImage; go 0x80180000\0" \ 171 "uImage=tftp 0x80180000 uImage; bootm 0x80180000\0" \ 172 "uboot=tftp 0x80008000 u-boot.bin; go 0x80008000\0" \ 173 "xloader=tftp 0x80180000 x-load.bin; " \ 174 " cp.w 0x80180000 0x00000400 0x1000; go 0x00000400\0" \ 175 "syncmode50=mw.w 0x1e442 0xc0c4; mw 0x6800a060 0xe30d1201\0" \ 176 "syncmode=mw.w 0x1e442 0xe0f4; mw 0x6800a060 0xe30d1201\0" \ 177 "norboot=cp32 0x18040000 0x80008000 0x200000; go 0x80008000\0" \ 178 "oneboot=onenand read 0x80008000 0x40000 0x200000; go 0x80008000\0" \ 179 "onesyncboot=run syncmode oneboot\0" \ 180 "updateb=tftp 0x80180000 u-boot-onenand.bin; " \ 181 " onenand erase 0x0 0x20000; onenand write 0x80180000 0x0 0x20000\0" \ 182 "ubi=setenv bootargs ${bootargs} ubi.mtd=4 ${mtdparts}; run uImage\0" \ 183 "bootcmd=run uboot\0" 184 185 /* 186 * Miscellaneous configurable options 187 */ 188 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 189 #define CONFIG_SYS_PROMPT "Apollon # " 190 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 191 /* Print Buffer Size */ 192 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 193 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 194 /* Boot Argument Buffer Size */ 195 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 196 /* memtest works on */ 197 #define CONFIG_SYS_MEMTEST_START (OMAP2420_SDRC_CS0) 198 #define CONFIG_SYS_MEMTEST_END (OMAP2420_SDRC_CS0+SZ_31M) 199 200 /* default load address */ 201 #define CONFIG_SYS_LOAD_ADDR (OMAP2420_SDRC_CS0) 202 203 /* The 2420 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) 204 * or by 32KHz clk, or from external sig. This rate is divided by a local 205 * divisor. 206 */ 207 #define CONFIG_SYS_TIMERBASE OMAP2420_GPT2 208 #define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ 209 #define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) 210 211 /*----------------------------------------------------------------------- 212 * Stack sizes 213 * 214 * The stack sizes are set up in start.S using the settings below 215 */ 216 #define CONFIG_STACKSIZE SZ_128K /* regular stack */ 217 #ifdef CONFIG_USE_IRQ 218 # define CONFIG_STACKSIZE_IRQ SZ_4K /* IRQ stack */ 219 # define CONFIG_STACKSIZE_FIQ SZ_4K /* FIQ stack */ 220 #endif 221 222 /*----------------------------------------------------------------------- 223 * Physical Memory Map 224 */ 225 #define CONFIG_NR_DRAM_BANKS 1 /* CS1 may or may not be populated */ 226 #define PHYS_SDRAM_1 OMAP2420_SDRC_CS0 227 #define PHYS_SDRAM_1_SIZE SZ_128M 228 #define PHYS_SDRAM_2 OMAP2420_SDRC_CS1 229 230 /*----------------------------------------------------------------------- 231 * FLASH and environment organization 232 */ 233 #ifdef CONFIG_SYS_USE_NOR 234 /* OneNAND boot, NOR has CS3, But NOR has CS0 when NOR boot */ 235 # define CONFIG_SYS_FLASH_BASE 0x18000000 236 # define CONFIG_SYS_MAX_FLASH_BANKS 1 237 # define CONFIG_SYS_MAX_FLASH_SECT 1024 238 /*----------------------------------------------------------------------- 239 * CFI FLASH driver setup 240 */ 241 /* Flash memory is CFI compliant */ 242 # define CONFIG_SYS_FLASH_CFI 1 243 # define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */ 244 /* Use buffered writes (~10x faster) */ 245 /* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 */ 246 /* Use h/w sector protection*/ 247 # define CONFIG_SYS_FLASH_PROTECTION 1 248 249 #else /* !CONFIG_SYS_USE_NOR */ 250 # define CONFIG_SYS_NO_FLASH 1 251 #endif /* CONFIG_SYS_USE_NOR */ 252 253 /* OneNAND boot, OneNAND has CS0, NOR boot ONeNAND has CS2 */ 254 #define CONFIG_SYS_ONENAND_BASE 0x00000000 255 #define CONFIG_SYS_MONITOR_LEN SZ_256K /* U-Boot image size */ 256 #define CONFIG_ENV_IS_IN_ONENAND 1 257 #define CONFIG_ENV_ADDR 0x00020000 258 #define CONFIG_ENV_ADDR_FLEX 0x00040000 259 260 #ifdef CONFIG_SYS_USE_UBI 261 #define CONFIG_CMD_MTDPARTS 262 #define MTDIDS_DEFAULT "onenand0=onenand" 263 #define MTDPARTS_DEFAULT "mtdparts=onenand:128k(bootloader)," \ 264 "128k(params)," \ 265 "2m(kernel)," \ 266 "16m(rootfs)," \ 267 "32m(fs)," \ 268 "-(ubifs)" 269 #endif 270 271 #endif /* __CONFIG_H */ 272