1 /** @file 2 DebugSupport protocol and supporting definitions as defined in the UEFI2.4 3 specification. 4 5 The DebugSupport protocol is used by source level debuggers to abstract the 6 processor and handle context save and restore operations. 7 8 Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> 9 Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR> 10 11 This program and the accompanying materials are licensed and made available under 12 the terms and conditions of the BSD License that accompanies this distribution. 13 The full text of the license may be found at 14 http://opensource.org/licenses/bsd-license.php. 15 16 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 17 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 18 19 **/ 20 21 #ifndef __DEBUG_SUPPORT_H__ 22 #define __DEBUG_SUPPORT_H__ 23 24 FILE_LICENCE ( BSD3 ); 25 26 #include <ipxe/efi/IndustryStandard/PeImage.h> 27 28 typedef struct _EFI_DEBUG_SUPPORT_PROTOCOL EFI_DEBUG_SUPPORT_PROTOCOL; 29 30 /// 31 /// Debug Support protocol {2755590C-6F3C-42FA-9EA4-A3BA543CDA25}. 32 /// 33 #define EFI_DEBUG_SUPPORT_PROTOCOL_GUID \ 34 { \ 35 0x2755590C, 0x6F3C, 0x42FA, {0x9E, 0xA4, 0xA3, 0xBA, 0x54, 0x3C, 0xDA, 0x25 } \ 36 } 37 38 /// 39 /// Processor exception to be hooked. 40 /// All exception types for IA32, X64, Itanium and EBC processors are defined. 41 /// 42 typedef INTN EFI_EXCEPTION_TYPE; 43 44 /// 45 /// IA-32 processor exception types. 46 /// 47 #define EXCEPT_IA32_DIVIDE_ERROR 0 48 #define EXCEPT_IA32_DEBUG 1 49 #define EXCEPT_IA32_NMI 2 50 #define EXCEPT_IA32_BREAKPOINT 3 51 #define EXCEPT_IA32_OVERFLOW 4 52 #define EXCEPT_IA32_BOUND 5 53 #define EXCEPT_IA32_INVALID_OPCODE 6 54 #define EXCEPT_IA32_DOUBLE_FAULT 8 55 #define EXCEPT_IA32_INVALID_TSS 10 56 #define EXCEPT_IA32_SEG_NOT_PRESENT 11 57 #define EXCEPT_IA32_STACK_FAULT 12 58 #define EXCEPT_IA32_GP_FAULT 13 59 #define EXCEPT_IA32_PAGE_FAULT 14 60 #define EXCEPT_IA32_FP_ERROR 16 61 #define EXCEPT_IA32_ALIGNMENT_CHECK 17 62 #define EXCEPT_IA32_MACHINE_CHECK 18 63 #define EXCEPT_IA32_SIMD 19 64 65 /// 66 /// FXSAVE_STATE. 67 /// FP / MMX / XMM registers (see fxrstor instruction definition). 68 /// 69 typedef struct { 70 UINT16 Fcw; 71 UINT16 Fsw; 72 UINT16 Ftw; 73 UINT16 Opcode; 74 UINT32 Eip; 75 UINT16 Cs; 76 UINT16 Reserved1; 77 UINT32 DataOffset; 78 UINT16 Ds; 79 UINT8 Reserved2[10]; 80 UINT8 St0Mm0[10], Reserved3[6]; 81 UINT8 St1Mm1[10], Reserved4[6]; 82 UINT8 St2Mm2[10], Reserved5[6]; 83 UINT8 St3Mm3[10], Reserved6[6]; 84 UINT8 St4Mm4[10], Reserved7[6]; 85 UINT8 St5Mm5[10], Reserved8[6]; 86 UINT8 St6Mm6[10], Reserved9[6]; 87 UINT8 St7Mm7[10], Reserved10[6]; 88 UINT8 Xmm0[16]; 89 UINT8 Xmm1[16]; 90 UINT8 Xmm2[16]; 91 UINT8 Xmm3[16]; 92 UINT8 Xmm4[16]; 93 UINT8 Xmm5[16]; 94 UINT8 Xmm6[16]; 95 UINT8 Xmm7[16]; 96 UINT8 Reserved11[14 * 16]; 97 } EFI_FX_SAVE_STATE_IA32; 98 99 /// 100 /// IA-32 processor context definition. 101 /// 102 typedef struct { 103 UINT32 ExceptionData; 104 EFI_FX_SAVE_STATE_IA32 FxSaveState; 105 UINT32 Dr0; 106 UINT32 Dr1; 107 UINT32 Dr2; 108 UINT32 Dr3; 109 UINT32 Dr6; 110 UINT32 Dr7; 111 UINT32 Cr0; 112 UINT32 Cr1; /* Reserved */ 113 UINT32 Cr2; 114 UINT32 Cr3; 115 UINT32 Cr4; 116 UINT32 Eflags; 117 UINT32 Ldtr; 118 UINT32 Tr; 119 UINT32 Gdtr[2]; 120 UINT32 Idtr[2]; 121 UINT32 Eip; 122 UINT32 Gs; 123 UINT32 Fs; 124 UINT32 Es; 125 UINT32 Ds; 126 UINT32 Cs; 127 UINT32 Ss; 128 UINT32 Edi; 129 UINT32 Esi; 130 UINT32 Ebp; 131 UINT32 Esp; 132 UINT32 Ebx; 133 UINT32 Edx; 134 UINT32 Ecx; 135 UINT32 Eax; 136 } EFI_SYSTEM_CONTEXT_IA32; 137 138 /// 139 /// x64 processor exception types. 140 /// 141 #define EXCEPT_X64_DIVIDE_ERROR 0 142 #define EXCEPT_X64_DEBUG 1 143 #define EXCEPT_X64_NMI 2 144 #define EXCEPT_X64_BREAKPOINT 3 145 #define EXCEPT_X64_OVERFLOW 4 146 #define EXCEPT_X64_BOUND 5 147 #define EXCEPT_X64_INVALID_OPCODE 6 148 #define EXCEPT_X64_DOUBLE_FAULT 8 149 #define EXCEPT_X64_INVALID_TSS 10 150 #define EXCEPT_X64_SEG_NOT_PRESENT 11 151 #define EXCEPT_X64_STACK_FAULT 12 152 #define EXCEPT_X64_GP_FAULT 13 153 #define EXCEPT_X64_PAGE_FAULT 14 154 #define EXCEPT_X64_FP_ERROR 16 155 #define EXCEPT_X64_ALIGNMENT_CHECK 17 156 #define EXCEPT_X64_MACHINE_CHECK 18 157 #define EXCEPT_X64_SIMD 19 158 159 /// 160 /// FXSAVE_STATE. 161 /// FP / MMX / XMM registers (see fxrstor instruction definition). 162 /// 163 typedef struct { 164 UINT16 Fcw; 165 UINT16 Fsw; 166 UINT16 Ftw; 167 UINT16 Opcode; 168 UINT64 Rip; 169 UINT64 DataOffset; 170 UINT8 Reserved1[8]; 171 UINT8 St0Mm0[10], Reserved2[6]; 172 UINT8 St1Mm1[10], Reserved3[6]; 173 UINT8 St2Mm2[10], Reserved4[6]; 174 UINT8 St3Mm3[10], Reserved5[6]; 175 UINT8 St4Mm4[10], Reserved6[6]; 176 UINT8 St5Mm5[10], Reserved7[6]; 177 UINT8 St6Mm6[10], Reserved8[6]; 178 UINT8 St7Mm7[10], Reserved9[6]; 179 UINT8 Xmm0[16]; 180 UINT8 Xmm1[16]; 181 UINT8 Xmm2[16]; 182 UINT8 Xmm3[16]; 183 UINT8 Xmm4[16]; 184 UINT8 Xmm5[16]; 185 UINT8 Xmm6[16]; 186 UINT8 Xmm7[16]; 187 // 188 // NOTE: UEFI 2.0 spec definition as follows. 189 // 190 UINT8 Reserved11[14 * 16]; 191 } EFI_FX_SAVE_STATE_X64; 192 193 /// 194 /// x64 processor context definition. 195 /// 196 typedef struct { 197 UINT64 ExceptionData; 198 EFI_FX_SAVE_STATE_X64 FxSaveState; 199 UINT64 Dr0; 200 UINT64 Dr1; 201 UINT64 Dr2; 202 UINT64 Dr3; 203 UINT64 Dr6; 204 UINT64 Dr7; 205 UINT64 Cr0; 206 UINT64 Cr1; /* Reserved */ 207 UINT64 Cr2; 208 UINT64 Cr3; 209 UINT64 Cr4; 210 UINT64 Cr8; 211 UINT64 Rflags; 212 UINT64 Ldtr; 213 UINT64 Tr; 214 UINT64 Gdtr[2]; 215 UINT64 Idtr[2]; 216 UINT64 Rip; 217 UINT64 Gs; 218 UINT64 Fs; 219 UINT64 Es; 220 UINT64 Ds; 221 UINT64 Cs; 222 UINT64 Ss; 223 UINT64 Rdi; 224 UINT64 Rsi; 225 UINT64 Rbp; 226 UINT64 Rsp; 227 UINT64 Rbx; 228 UINT64 Rdx; 229 UINT64 Rcx; 230 UINT64 Rax; 231 UINT64 R8; 232 UINT64 R9; 233 UINT64 R10; 234 UINT64 R11; 235 UINT64 R12; 236 UINT64 R13; 237 UINT64 R14; 238 UINT64 R15; 239 } EFI_SYSTEM_CONTEXT_X64; 240 241 /// 242 /// Itanium Processor Family Exception types. 243 /// 244 #define EXCEPT_IPF_VHTP_TRANSLATION 0 245 #define EXCEPT_IPF_INSTRUCTION_TLB 1 246 #define EXCEPT_IPF_DATA_TLB 2 247 #define EXCEPT_IPF_ALT_INSTRUCTION_TLB 3 248 #define EXCEPT_IPF_ALT_DATA_TLB 4 249 #define EXCEPT_IPF_DATA_NESTED_TLB 5 250 #define EXCEPT_IPF_INSTRUCTION_KEY_MISSED 6 251 #define EXCEPT_IPF_DATA_KEY_MISSED 7 252 #define EXCEPT_IPF_DIRTY_BIT 8 253 #define EXCEPT_IPF_INSTRUCTION_ACCESS_BIT 9 254 #define EXCEPT_IPF_DATA_ACCESS_BIT 10 255 #define EXCEPT_IPF_BREAKPOINT 11 256 #define EXCEPT_IPF_EXTERNAL_INTERRUPT 12 257 // 258 // 13 - 19 reserved 259 // 260 #define EXCEPT_IPF_PAGE_NOT_PRESENT 20 261 #define EXCEPT_IPF_KEY_PERMISSION 21 262 #define EXCEPT_IPF_INSTRUCTION_ACCESS_RIGHTS 22 263 #define EXCEPT_IPF_DATA_ACCESS_RIGHTS 23 264 #define EXCEPT_IPF_GENERAL_EXCEPTION 24 265 #define EXCEPT_IPF_DISABLED_FP_REGISTER 25 266 #define EXCEPT_IPF_NAT_CONSUMPTION 26 267 #define EXCEPT_IPF_SPECULATION 27 268 // 269 // 28 reserved 270 // 271 #define EXCEPT_IPF_DEBUG 29 272 #define EXCEPT_IPF_UNALIGNED_REFERENCE 30 273 #define EXCEPT_IPF_UNSUPPORTED_DATA_REFERENCE 31 274 #define EXCEPT_IPF_FP_FAULT 32 275 #define EXCEPT_IPF_FP_TRAP 33 276 #define EXCEPT_IPF_LOWER_PRIVILEGE_TRANSFER_TRAP 34 277 #define EXCEPT_IPF_TAKEN_BRANCH 35 278 #define EXCEPT_IPF_SINGLE_STEP 36 279 // 280 // 37 - 44 reserved 281 // 282 #define EXCEPT_IPF_IA32_EXCEPTION 45 283 #define EXCEPT_IPF_IA32_INTERCEPT 46 284 #define EXCEPT_IPF_IA32_INTERRUPT 47 285 286 /// 287 /// IPF processor context definition. 288 /// 289 typedef struct { 290 // 291 // The first reserved field is necessary to preserve alignment for the correct 292 // bits in UNAT and to insure F2 is 16 byte aligned. 293 // 294 UINT64 Reserved; 295 UINT64 R1; 296 UINT64 R2; 297 UINT64 R3; 298 UINT64 R4; 299 UINT64 R5; 300 UINT64 R6; 301 UINT64 R7; 302 UINT64 R8; 303 UINT64 R9; 304 UINT64 R10; 305 UINT64 R11; 306 UINT64 R12; 307 UINT64 R13; 308 UINT64 R14; 309 UINT64 R15; 310 UINT64 R16; 311 UINT64 R17; 312 UINT64 R18; 313 UINT64 R19; 314 UINT64 R20; 315 UINT64 R21; 316 UINT64 R22; 317 UINT64 R23; 318 UINT64 R24; 319 UINT64 R25; 320 UINT64 R26; 321 UINT64 R27; 322 UINT64 R28; 323 UINT64 R29; 324 UINT64 R30; 325 UINT64 R31; 326 327 UINT64 F2[2]; 328 UINT64 F3[2]; 329 UINT64 F4[2]; 330 UINT64 F5[2]; 331 UINT64 F6[2]; 332 UINT64 F7[2]; 333 UINT64 F8[2]; 334 UINT64 F9[2]; 335 UINT64 F10[2]; 336 UINT64 F11[2]; 337 UINT64 F12[2]; 338 UINT64 F13[2]; 339 UINT64 F14[2]; 340 UINT64 F15[2]; 341 UINT64 F16[2]; 342 UINT64 F17[2]; 343 UINT64 F18[2]; 344 UINT64 F19[2]; 345 UINT64 F20[2]; 346 UINT64 F21[2]; 347 UINT64 F22[2]; 348 UINT64 F23[2]; 349 UINT64 F24[2]; 350 UINT64 F25[2]; 351 UINT64 F26[2]; 352 UINT64 F27[2]; 353 UINT64 F28[2]; 354 UINT64 F29[2]; 355 UINT64 F30[2]; 356 UINT64 F31[2]; 357 358 UINT64 Pr; 359 360 UINT64 B0; 361 UINT64 B1; 362 UINT64 B2; 363 UINT64 B3; 364 UINT64 B4; 365 UINT64 B5; 366 UINT64 B6; 367 UINT64 B7; 368 369 // 370 // application registers 371 // 372 UINT64 ArRsc; 373 UINT64 ArBsp; 374 UINT64 ArBspstore; 375 UINT64 ArRnat; 376 377 UINT64 ArFcr; 378 379 UINT64 ArEflag; 380 UINT64 ArCsd; 381 UINT64 ArSsd; 382 UINT64 ArCflg; 383 UINT64 ArFsr; 384 UINT64 ArFir; 385 UINT64 ArFdr; 386 387 UINT64 ArCcv; 388 389 UINT64 ArUnat; 390 391 UINT64 ArFpsr; 392 393 UINT64 ArPfs; 394 UINT64 ArLc; 395 UINT64 ArEc; 396 397 // 398 // control registers 399 // 400 UINT64 CrDcr; 401 UINT64 CrItm; 402 UINT64 CrIva; 403 UINT64 CrPta; 404 UINT64 CrIpsr; 405 UINT64 CrIsr; 406 UINT64 CrIip; 407 UINT64 CrIfa; 408 UINT64 CrItir; 409 UINT64 CrIipa; 410 UINT64 CrIfs; 411 UINT64 CrIim; 412 UINT64 CrIha; 413 414 // 415 // debug registers 416 // 417 UINT64 Dbr0; 418 UINT64 Dbr1; 419 UINT64 Dbr2; 420 UINT64 Dbr3; 421 UINT64 Dbr4; 422 UINT64 Dbr5; 423 UINT64 Dbr6; 424 UINT64 Dbr7; 425 426 UINT64 Ibr0; 427 UINT64 Ibr1; 428 UINT64 Ibr2; 429 UINT64 Ibr3; 430 UINT64 Ibr4; 431 UINT64 Ibr5; 432 UINT64 Ibr6; 433 UINT64 Ibr7; 434 435 // 436 // virtual registers - nat bits for R1-R31 437 // 438 UINT64 IntNat; 439 440 } EFI_SYSTEM_CONTEXT_IPF; 441 442 /// 443 /// EBC processor exception types. 444 /// 445 #define EXCEPT_EBC_UNDEFINED 0 446 #define EXCEPT_EBC_DIVIDE_ERROR 1 447 #define EXCEPT_EBC_DEBUG 2 448 #define EXCEPT_EBC_BREAKPOINT 3 449 #define EXCEPT_EBC_OVERFLOW 4 450 #define EXCEPT_EBC_INVALID_OPCODE 5 ///< Opcode out of range. 451 #define EXCEPT_EBC_STACK_FAULT 6 452 #define EXCEPT_EBC_ALIGNMENT_CHECK 7 453 #define EXCEPT_EBC_INSTRUCTION_ENCODING 8 ///< Malformed instruction. 454 #define EXCEPT_EBC_BAD_BREAK 9 ///< BREAK 0 or undefined BREAK. 455 #define EXCEPT_EBC_STEP 10 ///< To support debug stepping. 456 /// 457 /// For coding convenience, define the maximum valid EBC exception. 458 /// 459 #define MAX_EBC_EXCEPTION EXCEPT_EBC_STEP 460 461 /// 462 /// EBC processor context definition. 463 /// 464 typedef struct { 465 UINT64 R0; 466 UINT64 R1; 467 UINT64 R2; 468 UINT64 R3; 469 UINT64 R4; 470 UINT64 R5; 471 UINT64 R6; 472 UINT64 R7; 473 UINT64 Flags; 474 UINT64 ControlFlags; 475 UINT64 Ip; 476 } EFI_SYSTEM_CONTEXT_EBC; 477 478 479 480 /// 481 /// ARM processor exception types. 482 /// 483 #define EXCEPT_ARM_RESET 0 484 #define EXCEPT_ARM_UNDEFINED_INSTRUCTION 1 485 #define EXCEPT_ARM_SOFTWARE_INTERRUPT 2 486 #define EXCEPT_ARM_PREFETCH_ABORT 3 487 #define EXCEPT_ARM_DATA_ABORT 4 488 #define EXCEPT_ARM_RESERVED 5 489 #define EXCEPT_ARM_IRQ 6 490 #define EXCEPT_ARM_FIQ 7 491 492 /// 493 /// For coding convenience, define the maximum valid ARM exception. 494 /// 495 #define MAX_ARM_EXCEPTION EXCEPT_ARM_FIQ 496 497 /// 498 /// ARM processor context definition. 499 /// 500 typedef struct { 501 UINT32 R0; 502 UINT32 R1; 503 UINT32 R2; 504 UINT32 R3; 505 UINT32 R4; 506 UINT32 R5; 507 UINT32 R6; 508 UINT32 R7; 509 UINT32 R8; 510 UINT32 R9; 511 UINT32 R10; 512 UINT32 R11; 513 UINT32 R12; 514 UINT32 SP; 515 UINT32 LR; 516 UINT32 PC; 517 UINT32 CPSR; 518 UINT32 DFSR; 519 UINT32 DFAR; 520 UINT32 IFSR; 521 UINT32 IFAR; 522 } EFI_SYSTEM_CONTEXT_ARM; 523 524 525 /// 526 /// AARCH64 processor exception types. 527 /// 528 #define EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS 0 529 #define EXCEPT_AARCH64_IRQ 1 530 #define EXCEPT_AARCH64_FIQ 2 531 #define EXCEPT_AARCH64_SERROR 3 532 533 /// 534 /// For coding convenience, define the maximum valid ARM exception. 535 /// 536 #define MAX_AARCH64_EXCEPTION EXCEPT_AARCH64_SERROR 537 538 typedef struct { 539 // General Purpose Registers 540 UINT64 X0; 541 UINT64 X1; 542 UINT64 X2; 543 UINT64 X3; 544 UINT64 X4; 545 UINT64 X5; 546 UINT64 X6; 547 UINT64 X7; 548 UINT64 X8; 549 UINT64 X9; 550 UINT64 X10; 551 UINT64 X11; 552 UINT64 X12; 553 UINT64 X13; 554 UINT64 X14; 555 UINT64 X15; 556 UINT64 X16; 557 UINT64 X17; 558 UINT64 X18; 559 UINT64 X19; 560 UINT64 X20; 561 UINT64 X21; 562 UINT64 X22; 563 UINT64 X23; 564 UINT64 X24; 565 UINT64 X25; 566 UINT64 X26; 567 UINT64 X27; 568 UINT64 X28; 569 UINT64 FP; // x29 - Frame pointer 570 UINT64 LR; // x30 - Link Register 571 UINT64 SP; // x31 - Stack pointer 572 573 // FP/SIMD Registers 574 UINT64 V0[2]; 575 UINT64 V1[2]; 576 UINT64 V2[2]; 577 UINT64 V3[2]; 578 UINT64 V4[2]; 579 UINT64 V5[2]; 580 UINT64 V6[2]; 581 UINT64 V7[2]; 582 UINT64 V8[2]; 583 UINT64 V9[2]; 584 UINT64 V10[2]; 585 UINT64 V11[2]; 586 UINT64 V12[2]; 587 UINT64 V13[2]; 588 UINT64 V14[2]; 589 UINT64 V15[2]; 590 UINT64 V16[2]; 591 UINT64 V17[2]; 592 UINT64 V18[2]; 593 UINT64 V19[2]; 594 UINT64 V20[2]; 595 UINT64 V21[2]; 596 UINT64 V22[2]; 597 UINT64 V23[2]; 598 UINT64 V24[2]; 599 UINT64 V25[2]; 600 UINT64 V26[2]; 601 UINT64 V27[2]; 602 UINT64 V28[2]; 603 UINT64 V29[2]; 604 UINT64 V30[2]; 605 UINT64 V31[2]; 606 607 UINT64 ELR; // Exception Link Register 608 UINT64 SPSR; // Saved Processor Status Register 609 UINT64 FPSR; // Floating Point Status Register 610 UINT64 ESR; // Exception syndrome register 611 UINT64 FAR; // Fault Address Register 612 } EFI_SYSTEM_CONTEXT_AARCH64; 613 614 615 /// 616 /// Universal EFI_SYSTEM_CONTEXT definition. 617 /// 618 typedef union { 619 EFI_SYSTEM_CONTEXT_EBC *SystemContextEbc; 620 EFI_SYSTEM_CONTEXT_IA32 *SystemContextIa32; 621 EFI_SYSTEM_CONTEXT_X64 *SystemContextX64; 622 EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf; 623 EFI_SYSTEM_CONTEXT_ARM *SystemContextArm; 624 EFI_SYSTEM_CONTEXT_AARCH64 *SystemContextAArch64; 625 } EFI_SYSTEM_CONTEXT; 626 627 // 628 // DebugSupport callback function prototypes 629 // 630 631 /** 632 Registers and enables an exception callback function for the specified exception. 633 634 @param ExceptionType Exception types in EBC, IA-32, x64, or IPF. 635 @param SystemContext Exception content. 636 637 **/ 638 typedef 639 VOID 640 (EFIAPI *EFI_EXCEPTION_CALLBACK)( 641 IN EFI_EXCEPTION_TYPE ExceptionType, 642 IN OUT EFI_SYSTEM_CONTEXT SystemContext 643 ); 644 645 /** 646 Registers and enables the on-target debug agent's periodic entry point. 647 648 @param SystemContext Exception content. 649 650 **/ 651 typedef 652 VOID 653 (EFIAPI *EFI_PERIODIC_CALLBACK)( 654 IN OUT EFI_SYSTEM_CONTEXT SystemContext 655 ); 656 657 /// 658 /// Machine type definition 659 /// 660 typedef enum { 661 IsaIa32 = IMAGE_FILE_MACHINE_I386, ///< 0x014C 662 IsaX64 = IMAGE_FILE_MACHINE_X64, ///< 0x8664 663 IsaIpf = IMAGE_FILE_MACHINE_IA64, ///< 0x0200 664 IsaEbc = IMAGE_FILE_MACHINE_EBC, ///< 0x0EBC 665 IsaArm = IMAGE_FILE_MACHINE_ARMTHUMB_MIXED, ///< 0x01c2 666 IsaAArch64 = IMAGE_FILE_MACHINE_ARM64 ///< 0xAA64 667 } EFI_INSTRUCTION_SET_ARCHITECTURE; 668 669 670 // 671 // DebugSupport member function definitions 672 // 673 674 /** 675 Returns the maximum value that may be used for the ProcessorIndex parameter in 676 RegisterPeriodicCallback() and RegisterExceptionCallback(). 677 678 @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance. 679 @param MaxProcessorIndex Pointer to a caller-allocated UINTN in which the maximum supported 680 processor index is returned. 681 682 @retval EFI_SUCCESS The function completed successfully. 683 684 **/ 685 typedef 686 EFI_STATUS 687 (EFIAPI *EFI_GET_MAXIMUM_PROCESSOR_INDEX)( 688 IN EFI_DEBUG_SUPPORT_PROTOCOL *This, 689 OUT UINTN *MaxProcessorIndex 690 ); 691 692 /** 693 Registers a function to be called back periodically in interrupt context. 694 695 @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance. 696 @param ProcessorIndex Specifies which processor the callback function applies to. 697 @param PeriodicCallback A pointer to a function of type PERIODIC_CALLBACK that is the main 698 periodic entry point of the debug agent. 699 700 @retval EFI_SUCCESS The function completed successfully. 701 @retval EFI_ALREADY_STARTED Non-NULL PeriodicCallback parameter when a callback 702 function was previously registered. 703 @retval EFI_OUT_OF_RESOURCES System has insufficient memory resources to register new callback 704 function. 705 706 **/ 707 typedef 708 EFI_STATUS 709 (EFIAPI *EFI_REGISTER_PERIODIC_CALLBACK)( 710 IN EFI_DEBUG_SUPPORT_PROTOCOL *This, 711 IN UINTN ProcessorIndex, 712 IN EFI_PERIODIC_CALLBACK PeriodicCallback 713 ); 714 715 /** 716 Registers a function to be called when a given processor exception occurs. 717 718 @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance. 719 @param ProcessorIndex Specifies which processor the callback function applies to. 720 @param ExceptionCallback A pointer to a function of type EXCEPTION_CALLBACK that is called 721 when the processor exception specified by ExceptionType occurs. 722 @param ExceptionType Specifies which processor exception to hook. 723 724 @retval EFI_SUCCESS The function completed successfully. 725 @retval EFI_ALREADY_STARTED Non-NULL PeriodicCallback parameter when a callback 726 function was previously registered. 727 @retval EFI_OUT_OF_RESOURCES System has insufficient memory resources to register new callback 728 function. 729 730 **/ 731 typedef 732 EFI_STATUS 733 (EFIAPI *EFI_REGISTER_EXCEPTION_CALLBACK)( 734 IN EFI_DEBUG_SUPPORT_PROTOCOL *This, 735 IN UINTN ProcessorIndex, 736 IN EFI_EXCEPTION_CALLBACK ExceptionCallback, 737 IN EFI_EXCEPTION_TYPE ExceptionType 738 ); 739 740 /** 741 Invalidates processor instruction cache for a memory range. Subsequent execution in this range 742 causes a fresh memory fetch to retrieve code to be executed. 743 744 @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance. 745 @param ProcessorIndex Specifies which processor's instruction cache is to be invalidated. 746 @param Start Specifies the physical base of the memory range to be invalidated. 747 @param Length Specifies the minimum number of bytes in the processor's instruction 748 cache to invalidate. 749 750 @retval EFI_SUCCESS The function completed successfully. 751 752 **/ 753 typedef 754 EFI_STATUS 755 (EFIAPI *EFI_INVALIDATE_INSTRUCTION_CACHE)( 756 IN EFI_DEBUG_SUPPORT_PROTOCOL *This, 757 IN UINTN ProcessorIndex, 758 IN VOID *Start, 759 IN UINT64 Length 760 ); 761 762 /// 763 /// This protocol provides the services to allow the debug agent to register 764 /// callback functions that are called either periodically or when specific 765 /// processor exceptions occur. 766 /// 767 struct _EFI_DEBUG_SUPPORT_PROTOCOL { 768 /// 769 /// Declares the processor architecture for this instance of the EFI Debug Support protocol. 770 /// 771 EFI_INSTRUCTION_SET_ARCHITECTURE Isa; 772 EFI_GET_MAXIMUM_PROCESSOR_INDEX GetMaximumProcessorIndex; 773 EFI_REGISTER_PERIODIC_CALLBACK RegisterPeriodicCallback; 774 EFI_REGISTER_EXCEPTION_CALLBACK RegisterExceptionCallback; 775 EFI_INVALIDATE_INSTRUCTION_CACHE InvalidateInstructionCache; 776 }; 777 778 extern EFI_GUID gEfiDebugSupportProtocolGuid; 779 780 #endif 781