1 // AMD PCscsi boot support.
2 //
3 // Copyright (C) 2012 Red Hat Inc.
4 //
5 // Authors:
6 // Paolo Bonzini <pbonzini@redhat.com>
7 //
8 // based on lsi-scsi.c which is written by:
9 // Gerd Hoffman <kraxel@redhat.com>
10 //
11 // This file may be distributed under the terms of the GNU LGPLv3 license.
12
13 #include "biosvar.h" // GET_GLOBALFLAT
14 #include "block.h" // struct drive_s
15 #include "blockcmd.h" // scsi_drive_setup
16 #include "config.h" // CONFIG_*
17 #include "fw/paravirt.h" // runningOnQEMU
18 #include "malloc.h" // free
19 #include "output.h" // dprintf
20 #include "pcidevice.h" // foreachpci
21 #include "pci_ids.h" // PCI_DEVICE_ID
22 #include "pci_regs.h" // PCI_VENDOR_ID
23 #include "stacks.h" // run_thread
24 #include "std/disk.h" // DISK_RET_SUCCESS
25 #include "string.h" // memset
26 #include "util.h" // usleep
27
28 #define ESP_TCLO 0x00
29 #define ESP_TCMID 0x04
30 #define ESP_FIFO 0x08
31 #define ESP_CMD 0x0c
32 #define ESP_WBUSID 0x10
33 #define ESP_TCHI 0x38
34
35 #define ESP_RSTAT 0x10
36 #define ESP_RINTR 0x14
37 #define ESP_RFLAGS 0x1c
38
39 #define ESP_DMA_CMD 0x40
40 #define ESP_DMA_STC 0x44
41 #define ESP_DMA_SPA 0x48
42 #define ESP_DMA_WBC 0x4c
43 #define ESP_DMA_WAC 0x50
44 #define ESP_DMA_STAT 0x54
45 #define ESP_DMA_SMDLA 0x58
46 #define ESP_DMA_WMAC 0x58c
47
48 #define ESP_CMD_DMA 0x80
49 #define ESP_CMD_RESET 0x02
50 #define ESP_CMD_TI 0x10
51 #define ESP_CMD_ICCS 0x11
52 #define ESP_CMD_SELATN 0x42
53
54 #define ESP_STAT_DI 0x01
55 #define ESP_STAT_CD 0x02
56 #define ESP_STAT_MSG 0x04
57 #define ESP_STAT_TC 0x10
58
59 #define ESP_INTR_DC 0x20
60
61 struct esp_lun_s {
62 struct drive_s drive;
63 struct pci_device *pci;
64 u32 iobase;
65 u8 target;
66 u8 lun;
67 };
68
69 static void
esp_scsi_dma(u32 iobase,u32 buf,u32 len,int read)70 esp_scsi_dma(u32 iobase, u32 buf, u32 len, int read)
71 {
72 outb(len & 0xff, iobase + ESP_TCLO);
73 outb((len >> 8) & 0xff, iobase + ESP_TCMID);
74 outb((len >> 16) & 0xff, iobase + ESP_TCHI);
75 outl(buf, iobase + ESP_DMA_SPA);
76 outl(len, iobase + ESP_DMA_STC);
77 outb(read ? 0x83 : 0x03, iobase + ESP_DMA_CMD);
78 }
79
80 int
esp_scsi_process_op(struct disk_op_s * op)81 esp_scsi_process_op(struct disk_op_s *op)
82 {
83 if (!CONFIG_ESP_SCSI)
84 return DISK_RET_EBADTRACK;
85 struct esp_lun_s *llun_gf =
86 container_of(op->drive_fl, struct esp_lun_s, drive);
87 u16 target = GET_GLOBALFLAT(llun_gf->target);
88 u16 lun = GET_GLOBALFLAT(llun_gf->lun);
89 u8 cdbcmd[16];
90 int blocksize = scsi_fill_cmd(op, cdbcmd, sizeof(cdbcmd));
91 if (blocksize < 0)
92 return default_process_op(op);
93 u32 iobase = GET_GLOBALFLAT(llun_gf->iobase);
94 int i, state;
95 u8 status;
96
97 outb(target, iobase + ESP_WBUSID);
98
99 /*
100 * We need to pass the LUN at the beginning of the command, and the FIFO
101 * is only 16 bytes, so we cannot support 16-byte CDBs. The alternative
102 * would be to use DMA for the 17-byte command too, which is quite
103 * overkill.
104 */
105 outb(lun, iobase + ESP_FIFO);
106 cdbcmd[1] &= 0x1f;
107 cdbcmd[1] |= lun << 5;
108 for (i = 0; i < 12; i++)
109 outb(cdbcmd[i], iobase + ESP_FIFO);
110 outb(ESP_CMD_SELATN, iobase + ESP_CMD);
111
112 for (state = 0;;) {
113 u8 stat = inb(iobase + ESP_RSTAT);
114
115 /* Detect disconnected device. */
116 if (state == 0 && (inb(iobase + ESP_RINTR) & ESP_INTR_DC)) {
117 return DISK_RET_ENOTREADY;
118 }
119
120 /* HBA reads command, clears CD, sets TC -> do DMA if needed. */
121 if (state == 0 && (stat & ESP_STAT_TC)) {
122 state++;
123 if (op->count && blocksize) {
124 /* Data phase. */
125 u32 count = (u32)op->count * blocksize;
126 esp_scsi_dma(iobase, (u32)op->buf_fl, count, scsi_is_read(op));
127 outb(ESP_CMD_TI | ESP_CMD_DMA, iobase + ESP_CMD);
128 continue;
129 }
130 }
131
132 /* At end of DMA TC is set again -> complete command. */
133 if (state == 1 && (stat & ESP_STAT_TC)) {
134 state++;
135 outb(ESP_CMD_ICCS, iobase + ESP_CMD);
136 continue;
137 }
138
139 /* Finally read data from the message in phase. */
140 if (state == 2 && (stat & ESP_STAT_MSG)) {
141 state++;
142 status = inb(iobase + ESP_FIFO);
143 inb(iobase + ESP_FIFO);
144 break;
145 }
146 usleep(5);
147 }
148
149 if (status == 0) {
150 return DISK_RET_SUCCESS;
151 }
152
153 return DISK_RET_EBADTRACK;
154 }
155
156 static void
esp_scsi_init_lun(struct esp_lun_s * llun,struct pci_device * pci,u32 iobase,u8 target,u8 lun)157 esp_scsi_init_lun(struct esp_lun_s *llun, struct pci_device *pci, u32 iobase,
158 u8 target, u8 lun)
159 {
160 memset(llun, 0, sizeof(*llun));
161 llun->drive.type = DTYPE_ESP_SCSI;
162 llun->drive.cntl_id = pci->bdf;
163 llun->pci = pci;
164 llun->target = target;
165 llun->lun = lun;
166 llun->iobase = iobase;
167 }
168
169 static int
esp_scsi_add_lun(u32 lun,struct drive_s * tmpl_drv)170 esp_scsi_add_lun(u32 lun, struct drive_s *tmpl_drv)
171 {
172 struct esp_lun_s *tmpl_llun =
173 container_of(tmpl_drv, struct esp_lun_s, drive);
174 struct esp_lun_s *llun = malloc_fseg(sizeof(*llun));
175 if (!llun) {
176 warn_noalloc();
177 return -1;
178 }
179 esp_scsi_init_lun(llun, tmpl_llun->pci, tmpl_llun->iobase,
180 tmpl_llun->target, lun);
181
182 char *name = znprintf(MAXDESCSIZE, "esp %pP %d:%d",
183 llun->pci, llun->target, llun->lun);
184 boot_lchs_find_scsi_device(llun->pci, llun->target, llun->lun,
185 &(llun->drive.lchs));
186 int prio = bootprio_find_scsi_device(llun->pci, llun->target, llun->lun);
187 int ret = scsi_drive_setup(&llun->drive, name, prio);
188 free(name);
189 if (ret)
190 goto fail;
191 return 0;
192
193 fail:
194 free(llun);
195 return -1;
196 }
197
198 static void
esp_scsi_scan_target(struct pci_device * pci,u32 iobase,u8 target)199 esp_scsi_scan_target(struct pci_device *pci, u32 iobase, u8 target)
200 {
201 struct esp_lun_s llun0;
202
203 esp_scsi_init_lun(&llun0, pci, iobase, target, 0);
204
205 scsi_rep_luns_scan(&llun0.drive, esp_scsi_add_lun);
206 }
207
208 static void
init_esp_scsi(void * data)209 init_esp_scsi(void *data)
210 {
211 struct pci_device *pci = data;
212 u32 iobase = pci_enable_iobar(pci, PCI_BASE_ADDRESS_0);
213 if (!iobase)
214 return;
215 pci_enable_busmaster(pci);
216
217 dprintf(1, "found esp at %pP, io @ %x\n", pci, iobase);
218
219 // reset
220 outb(ESP_CMD_RESET, iobase + ESP_CMD);
221
222 int i;
223 for (i = 0; i <= 7; i++)
224 esp_scsi_scan_target(pci, iobase, i);
225 }
226
227 void
esp_scsi_setup(void)228 esp_scsi_setup(void)
229 {
230 ASSERT32FLAT();
231 if (!CONFIG_ESP_SCSI || !runningOnQEMU())
232 return;
233
234 dprintf(3, "init esp\n");
235
236 struct pci_device *pci;
237 foreachpci(pci) {
238 if (pci->vendor != PCI_VENDOR_ID_AMD
239 || pci->device != PCI_DEVICE_ID_AMD_SCSI)
240 continue;
241 run_thread(init_esp_scsi, pci);
242 }
243 }
244