1 /*
2 * Copyright 2007 Freescale Semiconductor, Inc.
3 *
4 * (C) Copyright 2000
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26 #include <common.h>
27 #include <libfdt.h>
28 #include <fdt_support.h>
29 #include <asm/processor.h>
30
31 extern void ft_qe_setup(void *blob);
32
33 DECLARE_GLOBAL_DATA_PTR;
34
35 #if defined(CONFIG_BOOTCOUNT_LIMIT) && defined(CONFIG_MPC8360)
36 #include <asm/immap_qe.h>
37
fdt_fixup_muram(void * blob)38 void fdt_fixup_muram (void *blob)
39 {
40 ulong data[2];
41
42 data[0] = 0;
43 data[1] = QE_MURAM_SIZE - 2 * sizeof(unsigned long);
44 do_fixup_by_compat(blob, "fsl,qe-muram-data", "reg",
45 data, sizeof (data), 0);
46 }
47 #endif
48
ft_cpu_setup(void * blob,bd_t * bd)49 void ft_cpu_setup(void *blob, bd_t *bd)
50 {
51 immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
52 int spridr = immr->sysconf.spridr;
53
54 /*
55 * delete crypto node if not on an E-processor
56 * initial revisions of the MPC834xE/6xE have the original SEC 2.0.
57 * EA revisions got the SEC uprevved to 2.4 but since the default device
58 * tree contains SEC 2.0 properties we uprev them here.
59 */
60 if (!IS_E_PROCESSOR(spridr))
61 fdt_fixup_crypto_node(blob, 0);
62 else if (IS_E_PROCESSOR(spridr) &&
63 (SPR_FAMILY(spridr) == SPR_834X_FAMILY ||
64 SPR_FAMILY(spridr) == SPR_836X_FAMILY) &&
65 REVID_MAJOR(spridr) >= 2)
66 fdt_fixup_crypto_node(blob, 0x0204);
67
68 #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
69 defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) ||\
70 defined(CONFIG_HAS_ETH4) || defined(CONFIG_HAS_ETH5)
71 fdt_fixup_ethernet(blob);
72 #ifdef CONFIG_MPC8313
73 /*
74 * mpc8313e erratum IPIC1 swapped TSEC interrupt ID numbers on rev. 1
75 * h/w (see AN3545). The base device tree in use has rev. 1 ID numbers,
76 * so if on Rev. 2 (and higher) h/w, we fix them up here
77 */
78 if (REVID_MAJOR(immr->sysconf.spridr) >= 2) {
79 int nodeoffset, path;
80 const char *prop;
81
82 nodeoffset = fdt_path_offset(blob, "/aliases");
83 if (nodeoffset >= 0) {
84 #if defined(CONFIG_HAS_ETH0)
85 prop = fdt_getprop(blob, nodeoffset, "ethernet0", NULL);
86 if (prop) {
87 u32 tmp[] = { 32, 0x8, 33, 0x8, 34, 0x8 };
88
89 path = fdt_path_offset(blob, prop);
90 prop = fdt_getprop(blob, path, "interrupts", 0);
91 if (prop)
92 fdt_setprop(blob, path, "interrupts",
93 &tmp, sizeof(tmp));
94 }
95 #endif
96 #if defined(CONFIG_HAS_ETH1)
97 prop = fdt_getprop(blob, nodeoffset, "ethernet1", NULL);
98 if (prop) {
99 u32 tmp[] = { 35, 0x8, 36, 0x8, 37, 0x8 };
100
101 path = fdt_path_offset(blob, prop);
102 prop = fdt_getprop(blob, path, "interrupts", 0);
103 if (prop)
104 fdt_setprop(blob, path, "interrupts",
105 &tmp, sizeof(tmp));
106 }
107 #endif
108 }
109 }
110 #endif
111 #endif
112
113 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
114 "timebase-frequency", (bd->bi_busfreq / 4), 1);
115 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
116 "bus-frequency", bd->bi_busfreq, 1);
117 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
118 "clock-frequency", gd->core_clk, 1);
119 do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
120 "bus-frequency", bd->bi_busfreq, 1);
121 do_fixup_by_compat_u32(blob, "fsl,soc",
122 "bus-frequency", bd->bi_busfreq, 1);
123 do_fixup_by_compat_u32(blob, "fsl,soc",
124 "clock-frequency", bd->bi_busfreq, 1);
125 do_fixup_by_compat_u32(blob, "fsl,immr",
126 "bus-frequency", bd->bi_busfreq, 1);
127 do_fixup_by_compat_u32(blob, "fsl,immr",
128 "clock-frequency", bd->bi_busfreq, 1);
129 #ifdef CONFIG_QE
130 ft_qe_setup(blob);
131 #endif
132
133 #ifdef CONFIG_SYS_NS16550
134 do_fixup_by_compat_u32(blob, "ns16550",
135 "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
136 #endif
137
138 fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
139
140 #if defined(CONFIG_BOOTCOUNT_LIMIT)
141 fdt_fixup_muram (blob);
142 #endif
143 }
144