1 /* 2 * AMIRIX.h: AMIRIX specific config options 3 * 4 * Author : Frank Smith (smith at amirix dot com) 5 * 6 * Derived from : other configuration header files in this tree 7 * 8 * This software may be used and distributed according to the terms of 9 * the GNU General Public License (GPL) version 2, incorporated herein by 10 * reference. Drivers based on or derived from this code fall under the GPL 11 * and must retain the authorship, copyright and this license notice. This 12 * file is not a complete program and may only be used when the entire 13 * program is licensed under the GPL. 14 * 15 */ 16 17 #ifndef __CONFIG_H 18 #define __CONFIG_H 19 20 /* 21 * High Level Configuration Options 22 * (easy to change) 23 */ 24 25 #define CONFIG_405 1 /* This is a PPC405 CPU */ 26 #define CONFIG_4xx 1 /* ...member of PPC4xx family */ 27 28 #define CONFIG_AP1000 1 /* ...on an AP1000 board */ 29 30 #define CONFIG_PCI 1 31 32 #define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */ 33 #define CONFIG_SYS_PROMPT "0> " 34 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 35 36 #define CONFIG_COMMAND_EDIT 1 37 #define CONFIG_COMPLETE_ADDRESSES 1 38 39 #define CONFIG_ENV_IS_IN_FLASH 1 40 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 41 42 #ifdef CONFIG_ENV_IS_IN_NVRAM 43 #undef CONFIG_ENV_IS_IN_FLASH 44 #else 45 #ifdef CONFIG_ENV_IS_IN_FLASH 46 #undef CONFIG_ENV_IS_IN_NVRAM 47 #endif 48 #endif 49 50 #define CONFIG_BAUDRATE 57600 51 #define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */ 52 53 #define CONFIG_BOOTCOMMAND "" /* autoboot command */ 54 55 /* Size (bytes) of interrupt driven serial port buffer. 56 * Set to 0 to use polling instead of interrupts. 57 * Setting to 0 will also disable RTS/CTS handshaking. 58 */ 59 #undef CONFIG_SERIAL_SOFTWARE_FIFO 60 61 #define CONFIG_BOOTARGS "console=ttyS0,57600" 62 63 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ 64 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ 65 66 67 /* 68 * BOOTP options 69 */ 70 #define CONFIG_BOOTP_BOOTFILESIZE 71 #define CONFIG_BOOTP_BOOTPATH 72 #define CONFIG_BOOTP_GATEWAY 73 #define CONFIG_BOOTP_HOSTNAME 74 75 /* 76 * Command line configuration. 77 */ 78 #include <config_cmd_default.h> 79 80 #define CONFIG_CMD_ASKENV 81 #define CONFIG_CMD_DHCP 82 #define CONFIG_CMD_ELF 83 #define CONFIG_CMD_IRQ 84 #define CONFIG_CMD_MVENV 85 #define CONFIG_CMD_PCI 86 #define CONFIG_CMD_PING 87 88 89 #undef CONFIG_WATCHDOG /* watchdog disabled */ 90 91 #define CONFIG_SYS_CLK_FREQ 30000000 92 93 #define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */ 94 95 /* 96 * Miscellaneous configurable options 97 */ 98 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 99 #if defined(CONFIG_CMD_KGDB) 100 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 101 #else 102 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 103 #endif 104 /* usually: (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) */ 105 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+4+16) /* Print Buffer Size */ 106 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 107 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 108 109 #define CONFIG_SYS_ALT_MEMTEST 1 110 #define CONFIG_SYS_MEMTEST_START 0x00400000 /* memtest works on */ 111 #define CONFIG_SYS_MEMTEST_END 0x01000000 /* 4 ... 16 MB in DRAM */ 112 113 /* 114 * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1. 115 * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31. 116 * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value. 117 * The Linux BASE_BAUD define should match this configuration. 118 * baseBaud = cpuClock/(uartDivisor*16) 119 * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock, 120 * set Linux BASE_BAUD to 403200. 121 */ 122 #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */ 123 #undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */ 124 125 #define CONFIG_SYS_NS16550_CLK 40000000 126 #define CONFIG_SYS_DUART_CHAN 0 127 #define CONFIG_SYS_NS16550_COM1 (0x4C000000 + 0x1000) 128 #define CONFIG_SYS_NS16550_COM2 (0x4C800000 + 0x1000) 129 #define CONFIG_SYS_NS16550_REG_SIZE 4 130 #define CONFIG_SYS_NS16550 1 131 #define CONFIG_SYS_INIT_CHAN1 1 132 #define CONFIG_SYS_INIT_CHAN2 0 133 134 /* The following table includes the supported baudrates */ 135 #define CONFIG_SYS_BAUDRATE_TABLE \ 136 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 137 138 #define CONFIG_SYS_LOAD_ADDR 0x00200000 /* default load address */ 139 #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ 140 141 #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ 142 143 /*----------------------------------------------------------------------- 144 * Start addresses for the final memory configuration 145 * (Set up by the startup code) 146 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 147 */ 148 #define CONFIG_SYS_SDRAM_BASE 0x00000000 149 #define CONFIG_SYS_FLASH_BASE 0x20000000 150 #define CONFIG_SYS_MONITOR_BASE TEXT_BASE 151 #define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */ 152 #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ 153 154 /* 155 * For booting Linux, the board info and command line data 156 * have to be in the first 8 MB of memory, since this is 157 * the maximum mapped by the Linux kernel during initialization. 158 */ 159 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ 160 /*----------------------------------------------------------------------- 161 * FLASH organization 162 */ 163 #define CONFIG_SYS_FLASH_CFI 1 164 #define CONFIG_SYS_PROGFLASH_BASE CONFIG_SYS_FLASH_BASE 165 #define CONFIG_SYS_CONFFLASH_BASE 0x24000000 166 167 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ 168 #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ 169 170 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ 171 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ 172 173 #define CONFIG_SYS_FLASH_PROTECTION 1 /* use hardware protection */ 174 175 /* BEG ENVIRONNEMENT FLASH */ 176 #ifdef CONFIG_ENV_IS_IN_FLASH 177 #define CONFIG_ENV_OFFSET 0x00040000 /* Offset of Environment Sector */ 178 #define CONFIG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */ 179 #define CONFIG_ENV_SECT_SIZE 0x20000 /* see README - env sector total size */ 180 #endif 181 /* END ENVIRONNEMENT FLASH */ 182 /*----------------------------------------------------------------------- 183 * NVRAM organization 184 */ 185 #define CONFIG_SYS_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */ 186 #define CONFIG_SYS_NVRAM_SIZE 0x1ff8 /* NVRAM size */ 187 188 #ifdef CONFIG_ENV_IS_IN_NVRAM 189 #define CONFIG_ENV_SIZE 0x1000 /* Size of Environment vars */ 190 #define CONFIG_ENV_ADDR \ 191 (CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE) /* Env */ 192 #endif 193 194 /* 195 * Init Memory Controller: 196 * 197 * BR0/1 and OR0/1 (FLASH) 198 */ 199 200 #define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */ 201 #define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */ 202 203 /* Configuration Port location */ 204 #define CONFIG_PORT_ADDR 0xF0000500 205 206 /*----------------------------------------------------------------------- 207 * Definitions for initial stack pointer and data area (in DPRAM) 208 */ 209 210 #define CONFIG_SYS_INIT_RAM_ADDR 0x400000 /* inside of SDRAM */ 211 #define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */ 212 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ 213 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) 214 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 215 216 /*----------------------------------------------------------------------- 217 * Definitions for Serial Presence Detect EEPROM address 218 * (to get SDRAM settings) 219 */ 220 #define SPD_EEPROM_ADDRESS 0x50 221 222 /* 223 * Internal Definitions 224 * 225 * Boot Flags 226 */ 227 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ 228 #define BOOTFLAG_WARM 0x02 /* Software reboot */ 229 230 #if defined(CONFIG_CMD_KGDB) 231 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ 232 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ 233 #endif 234 235 /* JFFS2 stuff */ 236 237 #define CONFIG_SYS_JFFS2_FIRST_BANK 0 238 #define CONFIG_SYS_JFFS2_NUM_BANKS 1 239 #define CONFIG_SYS_JFFS2_FIRST_SECTOR 1 240 241 #define CONFIG_NET_MULTI 242 #define CONFIG_E1000 243 244 #define CONFIG_SYS_ETH_DEV_FN 0x0800 245 #define CONFIG_SYS_ETH_IOBASE 0x31000000 246 #define CONFIG_SYS_ETH_MEMBASE 0x32000000 247 248 #endif /* __CONFIG_H */ 249