1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) 2020 Marvell International Ltd.
4  *
5  * Defines some GPIO information used in multiple places
6  */
7 
8 #ifndef __CVMX_HELPER_GPIO_H__
9 #define __CVMX_HELPER_GPIO_H__
10 
11 #define CVMX_GPIO_NAME_LEN 32 /** Length of name */
12 
13 enum cvmx_gpio_type {
14 	CVMX_GPIO_PIN_OCTEON,  /** GPIO pin is directly connected to OCTEON */
15 	CVMX_GPIO_PIN_PCA953X, /** GPIO pin is NXP PCA953X compat chip */
16 	CVMX_GPIO_PIN_PCA957X,
17 	CVMX_GPIO_PIN_PCF857X, /** GPIO pin is NXP PCF857X compat chip */
18 	CVMX_GPIO_PIN_PCA9698, /** GPIO pin is NXP PCA9698 compat chip */
19 	CVMX_GPIO_PIN_CS4343,  /** Inphi/Cortina CS4343 GPIO pins */
20 	CVMX_GPIO_PIN_OTHER,   /** GPIO pin is something else */
21 };
22 
23 enum cvmx_gpio_operation {
24 	CVMX_GPIO_OP_CONFIG,	  /** Initial configuration of the GPIO pin */
25 	CVMX_GPIO_OP_SET,	  /** Set pin */
26 	CVMX_GPIO_OP_CLEAR,	  /** Clear pin */
27 	CVMX_GPIO_OP_READ,	  /** Read pin */
28 	CVMX_GPIO_OP_TOGGLE,	  /** Toggle pin */
29 	CVMX_GPIO_OP_BLINK_START, /** Put in blink mode (if supported) */
30 	CVMX_GPIO_OP_BLINK_STOP,  /** Takes the pin out of blink mode */
31 	CVMX_GPIO_OP_SET_LINK,	  /** Put in link monitoring mode */
32 	CVMX_GPIO_OP_SET_ACT,	  /** Put in RX activity mode */
33 };
34 
35 /**
36  * Inphi CS4343 output source select values for the GPIO_GPIOX output_src_sel.
37  */
38 enum cvmx_inphi_cs4343_gpio_gpio_output_src_sel {
39 	GPIO_SEL_DRIVE = 0,	/** Value of GPIOX_DRIVE */
40 	GPIO_SEL_DELAY = 1,	/** Drive delayed */
41 	GPIO_SEL_TOGGLE = 2,	/** Used for blinking */
42 	GPIO_SEL_EXT = 3,	/** External function */
43 	GPIO_SEL_EXT_DELAY = 4, /** External function delayed */
44 };
45 
46 /** Inphi GPIO_GPIOX configuration register */
47 union cvmx_inphi_cs4343_gpio_cfg_reg {
48 	u16 u;
49 	struct {
50 u16: 4;
51 		/** Data source for the GPIO output */
52 		u16 output_src_sel : 3;
53 		/** 1 = GPIO output is inverted before being output */
54 		u16 invert_output : 1;
55 		/** 1 = GPIO input is inverted before being processed */
56 		u16 invert_input : 1;
57 		/** 0 = 2.5v/1.8v signalling, 1 = 1.2v signalling */
58 		u16 iovddsel_1v2 : 1;
59 		/**
60 		 * 0 = output selected by outen bit
61 		 * 1 = output controlled by selected GPIO output source
62 		 */
63 		u16 outen_ovr : 1;
64 		/** 0 = GPIO is input only, 1 = GPIO output driver enabled */
65 		u16 outen : 1;
66 u16: 2;
67 		u16 pullup_1k;	/** 1 = enable 1K pad pullup */
68 		u16 pullup_10k; /** 1 = enable 10K pad pullup */
69 	} s;
70 };
71 
72 #define CVMX_INPHI_CS4343_GPIO_CFG_OFFSET 0x0
73 
74 /**
75  * This selects which port the GPIO gets its signals from when configured
76  * as an output.
77  */
78 enum cvmx_inphi_cs4343_gpio_output_cfg_port {
79 	PORT_0_HOST_RX = 0, /** Port pair 0 host RX */
80 	PORT_0_LINE_RX = 1, /** Port pair 0 line RX */
81 	PORT_1_HOST_RX = 2, /** Port pair 1 host RX */
82 	PORT_1_LINE_RX = 3, /** Port pair 1 line RX */
83 	PORT_3_HOST_RX = 4, /** Port pair 3 host RX */
84 	PORT_3_LINE_RX = 5, /** Port pair 3 line RX */
85 	PORT_2_HOST_RX = 6, /** Port pair 2 host RX */
86 	PORT_2_LINE_RX = 7, /** Port pair 2 line RX */
87 	COMMON = 8,	    /** Common */
88 };
89 
90 enum cvmx_inphi_cs4343_gpio_output_cfg_function {
91 	RX_LOS = 0,	   /** Port - 1 = Receive LOS (from DSP) */
92 	RX_LOL = 1,	   /** Port - 1 = Receive LOL (inverted from MSEQ) */
93 	EDC_CONVERGED = 2, /** Port - 1 = EDC converged (from DSP) */
94 	/** Port - 1 = PRBS checker in sync (inverted from SDS) */
95 	RX_PRBS_SYNC = 3,
96 	COMMON_LOGIC_0 = 0,	 /** Common - Logic 0 */
97 	COMMON_GPIO1_INPUT = 1,	 /** Common - GPIO 1 input */
98 	COMMON_GPIO2_INPUT = 2,	 /** Common - GPIO 2 input */
99 	COMMON_GPIO3_INPUT = 3,	 /** Common - GPIO 3 input */
100 	COMMON_GPIO4_INPUT = 4,	 /** Common - GPIO 4 input */
101 	COMMON_INTERR_INPUT = 5, /** Common - INTERR input */
102 	/** Common - Interrupt output from GLOBAL_INT register */
103 	COMMON_GLOBAL_INT = 6,
104 	/** Common - Interrupt output from GPIO_INT register */
105 	COMMON_GPIO_INT = 7,
106 	/** Common - Temp/voltage monitor interrupt */
107 	COMMON_MONITOR_INT = 8,
108 	/** Common - Selected clock output of global clock monitor */
109 	COMMON_GBL_CLKMON_CLK = 9,
110 };
111 
112 union cvmx_inphi_cs4343_gpio_output_cfg {
113 	u16 u;
114 	struct {
115 u16: 8;
116 		u16 port : 4;	  /** port */
117 		u16 function : 4; /** function */
118 	} s;
119 };
120 
121 #define CVMX_INPHI_CS4343_GPIO_OUTPUT_CFG_OFFSET 0x1
122 
123 union cvmx_inphi_cs4343_gpio_drive {
124 	u16 u;
125 	struct {
126 u16: 15;
127 		u16 value : 1; /** output value */
128 	} s;
129 };
130 
131 #define CVMX_INPHI_CS4343_GPIO_DRIVE_OFFSET 0x2
132 
133 union cvmx_inphi_cs4343_gpio_value {
134 	u16 u;
135 	struct {
136 u16: 15;
137 		u16 value : 1; /** input value (read-only) */
138 	} s;
139 };
140 
141 #define CVMX_INPHI_CS4343_GPIO_VALUE_OFFSET 0x3
142 
143 union cvmx_inphi_cs4343_gpio_toggle {
144 	u16 u;
145 	struct {
146 		/** Toggle rate in ms, multiply by 2 to get period in ms */
147 		u16 rate : 16;
148 	} s;
149 };
150 
151 #define CVMX_INPHI_CS4343_GPIO_TOGGLE_OFFSET 0x4
152 
153 union cvmx_inphi_cs4343_gpio_delay {
154 	u16 u;
155 	struct {
156 		/** On delay for GPIO output in ms when enabled */
157 		u16 on_delay : 16;
158 	} s;
159 };
160 
161 #define CVMX_INPHI_CS4343_GPIO_DELAY_OFFSET 0x5
162 
163 /**
164  * GPIO flags associated with a GPIO pin (can be combined)
165  */
166 enum cvmx_gpio_flags {
167 	CVMX_GPIO_ACTIVE_HIGH = 0,    /** Active high (default) */
168 	CVMX_GPIO_ACTIVE_LOW = 1,     /** Active low (inverted) */
169 	CVMX_GPIO_OPEN_COLLECTOR = 2, /** Output is open-collector */
170 };
171 
172 /** Default timer number to use for outputting a frequency [0..3] */
173 #define CVMX_GPIO_DEFAULT_TIMER 3
174 
175 /** Configuration data for native Octeon GPIO pins */
176 struct cvmx_octeon_gpio_data {
177 	int cpu_node; /** CPU node for GPIO pin */
178 	int timer;    /** Timer number used when in toggle mode, 0-3 */
179 };
180 
181 struct cvmx_pcf857x_gpio_data {
182 	unsigned int latch_out;
183 };
184 
185 #define CVMX_INPHI_CS4343_EFUSE_PDF_SKU_REG 0x19f
186 #define CVMX_INPHI_CS4343_SKU_CS4223	    0x10
187 #define CVMX_INPHI_CS4343_SKU_CS4224	    0x11
188 #define CVMX_INPHI_CS4343_SKU_CS4343	    0x12
189 #define CVMX_INPHI_CS4343_SKU_CS4221	    0x13
190 #define CVMX_INPHI_CS4343_SKU_CS4227	    0x14
191 #define CVMX_INPHI_CS4343_SKU_CS4341	    0x16
192 
193 struct cvmx_cs4343_gpio_data {
194 	int reg_offset; /** Base register address for GPIO */
195 	enum cvmx_gpio_operation last_op;
196 	u8 link_port; /** Link port number for link status */
197 	u16 sku;      /** Value from CS4224_EFUSE_PDF_SKU register */
198 	u8 out_src_sel;
199 	u8 field_func;
200 	bool out_en;
201 	bool is_cs4343; /** True if dual package */
202 	struct phy_device *phydev;
203 };
204 
205 struct cvmx_fdt_gpio_info;
206 
207 /** Function called for GPIO operations */
208 typedef int (*cvmx_fdt_gpio_op_func_t)(struct cvmx_fdt_gpio_info *, enum cvmx_gpio_operation);
209 
210 /**
211  * GPIO descriptor
212  */
213 struct cvmx_fdt_gpio_info {
214 	struct cvmx_fdt_gpio_info *next; /** For list of GPIOs */
215 	char name[CVMX_GPIO_NAME_LEN];	 /** Name of GPIO */
216 	int pin;			 /** GPIO pin number */
217 	enum cvmx_gpio_type gpio_type;	 /** Type of GPIO controller */
218 	int of_offset;			 /** Offset in device tree */
219 	int phandle;
220 	struct cvmx_fdt_i2c_bus_info *i2c_bus; /** I2C bus descriptor */
221 	int i2c_addr;			       /** Address on i2c bus */
222 	enum cvmx_gpio_flags flags;	       /** Flags associated with pin */
223 	int num_pins;			       /** Total number of pins */
224 	unsigned int latch_out;		       /** Latched output for 857x */
225 	/** Rate in ms between toggle states */
226 	int toggle_rate;
227 	/** Pointer to user data for user-defined functions */
228 	void *data;
229 	/** Function to set, clear, toggle, etc. */
230 	cvmx_fdt_gpio_op_func_t op_func;
231 	/* Two values are used to detect the initial case where nothing has
232 	 * been configured.  Initially, all of the following will be false
233 	 * which will force the initial state to be properly set.
234 	 */
235 	/** True if the GPIO pin is currently set, useful for toggle */
236 	bool is_set;
237 	/** Set if configured to invert */
238 	bool invert_set;
239 	/** Set if input is to be inverted */
240 	bool invert_input;
241 	/** Set if direction is configured as output */
242 	bool dir_out;
243 	/** Set if direction is configured as input */
244 	bool dir_in;
245 	/** Pin is set to toggle periodically */
246 	bool toggle;
247 	/** True if LED is used to indicate link status */
248 	bool link_led;
249 	/** True if LED is used to indicate rx activity */
250 	bool rx_act_led;
251 	/** True if LED is used to indicate tx activity */
252 	bool tx_act_led;
253 	/** True if LED is used to indicate networking errors */
254 	bool error_led;
255 	/** True if LED can automatically show link */
256 	bool hw_link;
257 };
258 
259 /** LED datastructure */
260 struct cvmx_fdt_gpio_led {
261 	struct cvmx_fdt_gpio_led *next, *prev; /** List of LEDs */
262 	char name[CVMX_GPIO_NAME_LEN];	       /** Name */
263 	struct cvmx_fdt_gpio_info *gpio;       /** GPIO for LED */
264 	int of_offset;			       /** Device tree node */
265 	/** True if active low, note that GPIO contains this info */
266 	bool active_low;
267 };
268 
269 /**
270  * Returns the operation function for the GPIO phandle
271  *
272  * @param[in]	fdt_addr	Pointer to FDT
273  * @param	phandle		phandle of GPIO entry
274  *
275  * @return	Pointer to op function or NULL if not found.
276  */
277 cvmx_fdt_gpio_op_func_t cvmx_fdt_gpio_get_op_func(const void *fdt_addr, int phandle);
278 
279 /**
280  * Given a phandle to a GPIO device return the type of GPIO device it is.
281  *
282  * @param[in]	fdt_addr	Address of flat device tree
283  * @param	phandle		phandle to GPIO
284  * @param[out]	size		Number of pins (optional, may be NULL)
285  *
286  * @return	Type of GPIO device or PIN_ERROR if error
287  */
288 enum cvmx_gpio_type cvmx_fdt_get_gpio_type(const void *fdt_addr, int phandle, int *size);
289 
290 /**
291  * Return a GPIO handle given a GPIO phandle of the form <&gpio pin flags>
292  *
293  * @param[in]	fdt_addr	Address of flat device tree
294  * @param	of_offset	node offset of GPIO device
295  * @param	prop_name	name of property
296  *
297  * @return	pointer to GPIO handle or NULL if error
298  */
299 struct cvmx_fdt_gpio_info *cvmx_fdt_gpio_get_info(const void *fdt_addr, int of_offset,
300 						  const char *prop_name);
301 
302 /**
303  * Return a GPIO handle given a GPIO phandle of the form <&gpio pin flags>
304  *
305  * @param[in]	fdt_addr	Address of flat device tree
306  * @param	of_offset	node offset for property
307  * @param	prop_name	name of property
308  *
309  * @return	pointer to GPIO handle or NULL if error
310  */
311 struct cvmx_fdt_gpio_info *cvmx_fdt_gpio_get_info_phandle(const void *fdt_addr, int of_offset,
312 							  const char *prop_name);
313 
314 /**
315  * Parses a GPIO entry and fills in the gpio info data structure
316  *
317  * @param[in]	fdt_addr	Address of FDT
318  * @param	phandle		phandle for GPIO
319  * @param	pin		pin number
320  * @param	flags		flags set (1 = invert)
321  * @param[out]	gpio		GPIO info data structure
322  *
323  * @return	0 for success, -1 on error
324  */
325 int cvmx_fdt_parse_gpio(const void *fdt_addr, int phandle, int pin, u32 flags,
326 			struct cvmx_fdt_gpio_info *gpio);
327 
328 /**
329  * @param	gpio	GPIO descriptor to assign timer to
330  * @param	timer	Octeon hardware timer number [0..3]
331  */
332 void cvmx_fdt_gpio_set_timer(struct cvmx_fdt_gpio_info *gpio, int timer);
333 
334 /**
335  * Given a GPIO pin descriptor, input the value of that pin
336  *
337  * @param	pin	GPIO pin descriptor
338  *
339  * @return	0 if low, 1 if high, -1 on error.  Note that the input will be
340  *		inverted if the CVMX_GPIO_ACTIVE_LOW flag bit is set.
341  */
342 int cvmx_fdt_gpio_get(struct cvmx_fdt_gpio_info *pin);
343 
344 /**
345  * Sets a GPIO pin given the GPIO descriptor
346  *
347  * @param	gpio	GPIO pin descriptor
348  * @param	value	value to set it to, 0 or 1
349  *
350  * @return	0 on success, -1 on error.
351  *
352  * NOTE: If the CVMX_GPIO_ACTIVE_LOW flag is set then the output value will be
353  * inverted.
354  */
355 int cvmx_fdt_gpio_set(struct cvmx_fdt_gpio_info *gpio, int value);
356 
357 /**
358  * Sets the blink frequency for a GPIO pin
359  *
360  * @param gpio	GPIO handle
361  * @param freq	Frequency in hz [0..500]
362  */
363 void cvmx_fdt_gpio_set_freq(struct cvmx_fdt_gpio_info *gpio, int freq);
364 
365 /**
366  * Enables or disables blinking a GPIO pin
367  *
368  * @param	gpio	GPIO handle
369  * @param	blink	True to start blinking, false to stop
370  *
371  * @return	0 for success, -1 on error
372  * NOTE: Not all GPIO types support blinking.
373  */
374 int cvmx_fdt_gpio_set_blink(struct cvmx_fdt_gpio_info *gpio, bool blink);
375 
376 /**
377  * Alternates between link and blink mode
378  *
379  * @param	gpio	GPIO handle
380  * @param	blink	True to start blinking, false to use link status
381  *
382  * @return	0 for success, -1 on error
383  * NOTE: Not all GPIO types support this.
384  */
385 int cvmx_fdt_gpio_set_link_blink(struct cvmx_fdt_gpio_info *gpio, bool blink);
386 
cvmx_fdt_gpio_hw_link_supported(const struct cvmx_fdt_gpio_info * gpio)387 static inline bool cvmx_fdt_gpio_hw_link_supported(const struct cvmx_fdt_gpio_info *gpio)
388 {
389 	return gpio->hw_link;
390 }
391 
392 /**
393  * Configures a GPIO pin as input or output
394  *
395  * @param	gpio	GPIO pin to configure
396  * @param	output	Set to true to make output, false for input
397  */
398 void cvmx_fdt_gpio_set_output(struct cvmx_fdt_gpio_info *gpio, bool output);
399 
400 /**
401  * Allocates an LED data structure
402  * @param[in]	name		name to assign LED
403  * @param	of_offset	Device tree offset
404  * @param	gpio		GPIO assigned to LED (can be NULL)
405  * @param	last		Previous LED to build a list
406  *
407  * @return	pointer to LED data structure or NULL if out of memory
408  */
409 struct cvmx_fdt_gpio_led *cvmx_alloc_led(const char *name, int of_offset,
410 					 struct cvmx_fdt_gpio_info *gpio,
411 					 struct cvmx_fdt_gpio_led *last);
412 
413 /**
414  * Parses an LED in the device tree
415  *
416  * @param[in]	fdt_addr		Pointer to flat device tree
417  * @param	led_of_offset		Device tree offset of LED
418  * @param	gpio			GPIO data structure to use (can be NULL)
419  * @param	last			Previous LED if this is a group of LEDs
420  *
421  * @return	Pointer to LED data structure or NULL if error
422  */
423 struct cvmx_fdt_gpio_led *cvmx_fdt_parse_led(const void *fdt_addr, int led_of_offset,
424 					     struct cvmx_fdt_gpio_info *gpio,
425 					     struct cvmx_fdt_gpio_led *last);
426 
427 #endif /* __CVMX_HELPER_GPIO_H__ */
428