1 #ifndef _MYSON_H 2 #define _MYSON_H 3 4 /** @file 5 * 6 * Myson Technology network card driver 7 * 8 */ 9 10 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL ); 11 12 #include <stdint.h> 13 #include <ipxe/if_ether.h> 14 15 /** BAR size */ 16 #define MYSON_BAR_SIZE 256 17 18 /** A packet descriptor */ 19 struct myson_descriptor { 20 /** Status */ 21 uint32_t status; 22 /** Control */ 23 uint32_t control; 24 /** Buffer start address */ 25 uint32_t address; 26 /** Next descriptor address */ 27 uint32_t next; 28 } __attribute__ (( packed )); 29 30 /* Transmit status */ 31 #define MYSON_TX_STAT_OWN 0x80000000UL /**< Owner */ 32 #define MYSON_TX_STAT_ABORT 0x00002000UL /**< Abort */ 33 #define MYSON_TX_STAT_CSL 0x00001000UL /**< Carrier sense lost */ 34 35 /* Transmit control */ 36 #define MYSON_TX_CTRL_IC 0x80000000UL /**< Interrupt control */ 37 #define MYSON_TX_CTRL_LD 0x20000000UL /**< Last descriptor */ 38 #define MYSON_TX_CTRL_FD 0x10000000UL /**< First descriptor */ 39 #define MYSON_TX_CTRL_CRC 0x08000000UL /**< CRC append */ 40 #define MYSON_TX_CTRL_PAD 0x04000000UL /**< Pad control */ 41 #define MYSON_TX_CTRL_RTLC 0x02000000UL /**< Retry late collision */ 42 #define MYSON_TX_CTRL_PKTS(x) ( (x) << 11 ) /**< Packet size */ 43 #define MYSON_TX_CTRL_TBS(x) ( (x) << 0 ) /**< Transmit buffer size */ 44 45 /* Receive status */ 46 #define MYSON_RX_STAT_OWN 0x80000000UL /**< Owner */ 47 #define MYSON_RX_STAT_FLNG(status) ( ( (status) >> 16 ) & 0xfff ) 48 #define MYSON_RX_STAT_ES 0x00000080UL /**< Error summary */ 49 50 /* Receive control */ 51 #define MYSON_RX_CTRL_RBS(x) ( (x) << 0 ) /**< Receive buffer size */ 52 53 /** Descriptor ring alignment */ 54 #define MYSON_RING_ALIGN 4 55 56 /** Physical Address Register 0 */ 57 #define MYSON_PAR0 0x00 58 59 /** Physical Address Register 4 */ 60 #define MYSON_PAR4 0x04 61 62 /** Physical address */ 63 union myson_physical_address { 64 struct { 65 uint32_t low; 66 uint32_t high; 67 } __attribute__ (( packed )) reg; 68 uint8_t raw[ETH_ALEN]; 69 }; 70 71 /** Transmit and Receive Configuration Register */ 72 #define MYSON_TCR_RCR 0x18 73 #define MYSON_TCR_TXS 0x80000000UL /**< Transmit status */ 74 #define MYSON_TCR_TE 0x00040000UL /**< Transmit enable */ 75 #define MYSON_RCR_RXS 0x00008000UL /**< Receive status */ 76 #define MYSON_RCR_PROM 0x00000080UL /**< Promiscuous mode */ 77 #define MYSON_RCR_AB 0x00000040UL /**< Accept broadcast */ 78 #define MYSON_RCR_AM 0x00000020UL /**< Accept multicast */ 79 #define MYSON_RCR_ARP 0x00000008UL /**< Accept runt packet */ 80 #define MYSON_RCR_ALP 0x00000004UL /**< Accept long packet */ 81 #define MYSON_RCR_RE 0x00000001UL /**< Receive enable */ 82 83 /** Maximum time to wait for transmit and receive to be idle, in milliseconds */ 84 #define MYSON_IDLE_MAX_WAIT_MS 100 85 86 /** Bus Command Register */ 87 #define MYSON_BCR 0x1c 88 #define MYSON_BCR_RLE 0x00000100UL /**< Read line enable */ 89 #define MYSON_BCR_RME 0x00000080UL /**< Read multiple enable */ 90 #define MYSON_BCR_WIE 0x00000040UL /**< Write and invalidate */ 91 #define MYSON_BCR_PBL(x) ( (x) << 3 ) /**< Burst length */ 92 #define MYSON_BCR_PBL_MASK MYSON_BCR_PBL ( 0x7 ) 93 #define MYSON_BCR_PBL_DEFAULT MYSON_BCR_PBL ( 0x6 ) 94 #define MYSON_BCR_SWR 0x00000001UL /**< Software reset */ 95 96 /** Maximum time to wait for a reset, in milliseconds */ 97 #define MYSON_RESET_MAX_WAIT_MS 100 98 99 /** Transmit Poll Demand Register */ 100 #define MYSON_TXPDR 0x20 101 102 /** Receive Poll Demand Register */ 103 #define MYSON_RXPDR 0x24 104 105 /** Transmit List Base Address */ 106 #define MYSON_TXLBA 0x2c 107 108 /** Number of transmit descriptors */ 109 #define MYSON_NUM_TX_DESC 4 110 111 /** Receive List Base Address */ 112 #define MYSON_RXLBA 0x30 113 114 /** Number of receive descriptors */ 115 #define MYSON_NUM_RX_DESC 4 116 117 /** Receive buffer length */ 118 #define MYSON_RX_MAX_LEN ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ ) 119 120 /** Interrupt Status Register */ 121 #define MYSON_ISR 0x34 122 #define MYSON_IRQ_TI 0x00000008UL /**< Transmit interrupt */ 123 #define MYSON_IRQ_RI 0x00000004UL /**< Receive interrupt */ 124 125 /** Number of I/O delays between ISR reads */ 126 #define MYSON_ISR_IODELAY_COUNT 4 127 128 /** Interrupt Mask Register */ 129 #define MYSON_IMR 0x38 130 131 /** Boot ROM / EEPROM / MII Management Register */ 132 #define MYSON_ROM_MII 0x40 133 #define MYSON_ROM_AUTOLD 0x00100000UL /**< Auto load */ 134 135 /** Maximum time to wait for a configuration reload, in milliseconds */ 136 #define MYSON_AUTOLD_MAX_WAIT_MS 100 137 138 /** A Myson descriptor ring */ 139 struct myson_ring { 140 /** Descriptors */ 141 struct myson_descriptor *desc; 142 /** Producer index */ 143 unsigned int prod; 144 /** Consumer index */ 145 unsigned int cons; 146 147 /** Number of descriptors */ 148 unsigned int count; 149 /** Descriptor start address register */ 150 unsigned int reg; 151 }; 152 153 /** 154 * Initialise descriptor ring 155 * 156 * @v ring Descriptor ring 157 * @v count Number of descriptors 158 * @v reg Descriptor base address register 159 */ 160 static inline __attribute__ (( always_inline)) void myson_init_ring(struct myson_ring * ring,unsigned int count,unsigned int reg)161myson_init_ring ( struct myson_ring *ring, unsigned int count, 162 unsigned int reg ) { 163 ring->count = count; 164 ring->reg = reg; 165 } 166 167 /** A myson network card */ 168 struct myson_nic { 169 /** Registers */ 170 void *regs; 171 172 /** Transmit descriptor ring */ 173 struct myson_ring tx; 174 /** Receive descriptor ring */ 175 struct myson_ring rx; 176 /** Receive I/O buffers */ 177 struct io_buffer *rx_iobuf[MYSON_NUM_RX_DESC]; 178 }; 179 180 /** 181 * Check if card can access physical address 182 * 183 * @v address Physical address 184 * @v address_ok Card can access physical address 185 */ 186 static inline __attribute__ (( always_inline )) int myson_address_ok(physaddr_t address)187myson_address_ok ( physaddr_t address ) { 188 189 /* In a 32-bit build, all addresses can be accessed */ 190 if ( sizeof ( physaddr_t ) <= sizeof ( uint32_t ) ) 191 return 1; 192 193 /* Card can access all addresses below 4GB */ 194 if ( ( address & ~0xffffffffULL ) == 0 ) 195 return 1; 196 197 return 0; 198 } 199 200 #endif /* _MYSON_H */ 201