1 /*
2 * (C) Copyright 2000-2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
6 * Scott McNutt <smcnutt@psyent.com>
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27
28 #include <nios2.h>
29 #include <nios2-io.h>
30 #include <asm/types.h>
31 #include <asm/io.h>
32 #include <asm/ptrace.h>
33 #include <common.h>
34 #include <command.h>
35 #include <watchdog.h>
36 #ifdef CONFIG_STATUS_LED
37 #include <status_led.h>
38 #endif
39
40 #if defined(CONFIG_SYS_NIOS_TMRBASE) && !defined(CONFIG_SYS_NIOS_TMRIRQ)
41 #error CONFIG_SYS_NIOS_TMRIRQ not defined (see documentation)
42 #endif
43
44 /****************************************************************************/
45
46 struct irq_action {
47 interrupt_handler_t *handler;
48 void *arg;
49 int count;
50 };
51
52 static struct irq_action vecs[32];
53
54 /*************************************************************************/
55 volatile ulong timestamp = 0;
56
reset_timer(void)57 void reset_timer (void)
58 {
59 nios_timer_t *tmr =(nios_timer_t *)CONFIG_SYS_NIOS_TMRBASE;
60
61 /* From Embedded Peripherals Handbook:
62 *
63 * "When the hardware is configured with Writeable period
64 * disabled, writing to one of the period_n registers causes
65 * the counter to reset to the fixed Timeout Period specified
66 * at system generation time."
67 *
68 * Here we force a reload to prevent early timeouts from
69 * get_timer() when the interrupt period is greater than
70 * than 1 msec.
71 *
72 * Simply write to periodl with its own value to force an
73 * internal counter reload, THEN reset the timestamp.
74 */
75 writel (readl (&tmr->periodl), &tmr->periodl);
76 timestamp = 0;
77
78 /* From Embedded Peripherals Handbook:
79 *
80 * "Writing to one of the period_n registers stops the internal
81 * counter, except when the hardware is configured with Start/Stop
82 * control bits off. If Start/Stop control bits is off, writing
83 * either register does not stop the counter."
84 *
85 * In order to accomodate either configuration, the control
86 * register is re-written. If the counter is stopped, it will
87 * be restarted. If it is running, the write is essentially
88 * a nop.
89 */
90 writel (NIOS_TIMER_ITO | NIOS_TIMER_CONT | NIOS_TIMER_START,
91 &tmr->control);
92
93 }
94
get_timer(ulong base)95 ulong get_timer (ulong base)
96 {
97 WATCHDOG_RESET ();
98 return (timestamp - base);
99 }
100
set_timer(ulong t)101 void set_timer (ulong t)
102 {
103 timestamp = t;
104 }
105
106
107 /* The board must handle this interrupt if a timer is not
108 * provided.
109 */
110 #if defined(CONFIG_SYS_NIOS_TMRBASE)
tmr_isr(void * arg)111 void tmr_isr (void *arg)
112 {
113 nios_timer_t *tmr = (nios_timer_t *)arg;
114 /* Interrupt is cleared by writing anything to the
115 * status register.
116 */
117 writel (0, &tmr->status);
118 timestamp += CONFIG_SYS_NIOS_TMRMS;
119 #ifdef CONFIG_STATUS_LED
120 status_led_tick(timestamp);
121 #endif
122 }
123
tmr_init(void)124 static void tmr_init (void)
125 {
126 nios_timer_t *tmr =(nios_timer_t *)CONFIG_SYS_NIOS_TMRBASE;
127
128 writel (0, &tmr->status);
129 writel (0, &tmr->control);
130 writel (NIOS_TIMER_STOP, &tmr->control);
131
132 #if defined(CONFIG_SYS_NIOS_TMRCNT)
133 writel (CONFIG_SYS_NIOS_TMRCNT & 0xffff, &tmr->periodl);
134 writel ((CONFIG_SYS_NIOS_TMRCNT >> 16) & 0xffff, &tmr->periodh);
135 #endif
136 writel (NIOS_TIMER_ITO | NIOS_TIMER_CONT | NIOS_TIMER_START,
137 &tmr->control);
138 irq_install_handler (CONFIG_SYS_NIOS_TMRIRQ, tmr_isr, (void *)tmr);
139 }
140
141 #endif /* CONFIG_SYS_NIOS_TMRBASE */
142
143 /*************************************************************************/
disable_interrupts(void)144 int disable_interrupts (void)
145 {
146 int val = rdctl (CTL_STATUS);
147 wrctl (CTL_STATUS, val & ~STATUS_IE);
148 return (val & STATUS_IE);
149 }
150
enable_interrupts(void)151 void enable_interrupts( void )
152 {
153 int val = rdctl (CTL_STATUS);
154 wrctl (CTL_STATUS, val | STATUS_IE);
155 }
156
external_interrupt(struct pt_regs * regs)157 void external_interrupt (struct pt_regs *regs)
158 {
159 unsigned irqs;
160 struct irq_action *act;
161
162 /* Evaluate only irqs that are both enabled AND pending */
163 irqs = rdctl (CTL_IENABLE) & rdctl (CTL_IPENDING);
164 act = vecs;
165
166 /* Assume (as does the Nios2 HAL) that bit 0 is highest
167 * priority. NOTE: There is ALWAYS a handler assigned
168 * (the default if no other).
169 */
170 while (irqs) {
171 if (irqs & 1) {
172 act->handler (act->arg);
173 act->count++;
174 }
175 irqs >>=1;
176 act++;
177 }
178 }
179
def_hdlr(void * arg)180 static void def_hdlr (void *arg)
181 {
182 unsigned irqs = rdctl (CTL_IENABLE);
183
184 /* Disable the individual interrupt -- with gratuitous
185 * warning.
186 */
187 irqs &= ~(1 << (int)arg);
188 wrctl (CTL_IENABLE, irqs);
189 printf ("WARNING: Disabling unhandled interrupt: %d\n",
190 (int)arg);
191 }
192
193 /*************************************************************************/
irq_install_handler(int irq,interrupt_handler_t * hdlr,void * arg)194 void irq_install_handler (int irq, interrupt_handler_t *hdlr, void *arg)
195 {
196
197 int flag;
198 struct irq_action *act;
199 unsigned ena = rdctl (CTL_IENABLE);
200
201 if ((irq < 0) || (irq > 31))
202 return;
203 act = &vecs[irq];
204
205 flag = disable_interrupts ();
206 if (hdlr) {
207 act->handler = hdlr;
208 act->arg = arg;
209 ena |= (1 << irq); /* enable */
210 } else {
211 act->handler = def_hdlr;
212 act->arg = (void *)irq;
213 ena &= ~(1 << irq); /* disable */
214 }
215 wrctl (CTL_IENABLE, ena);
216 if (flag) enable_interrupts ();
217 }
218
219
interrupt_init(void)220 int interrupt_init (void)
221 {
222 int i;
223
224 /* Assign the default handler to all */
225 for (i = 0; i < 32; i++) {
226 vecs[i].handler = def_hdlr;
227 vecs[i].arg = (void *)i;
228 vecs[i].count = 0;
229 }
230
231 #if defined(CONFIG_SYS_NIOS_TMRBASE)
232 tmr_init ();
233 #endif
234
235 enable_interrupts ();
236 return (0);
237 }
238
239
240 /*************************************************************************/
241 #if defined(CONFIG_CMD_IRQ)
do_irqinfo(cmd_tbl_t * cmdtp,int flag,int argc,char * argv[])242 int do_irqinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
243 {
244 int i;
245 struct irq_action *act = vecs;
246
247 printf ("\nInterrupt-Information:\n\n");
248 printf ("Nr Routine Arg Count\n");
249 printf ("-----------------------------\n");
250
251 for (i=0; i<32; i++) {
252 if (act->handler != def_hdlr) {
253 printf ("%02d %08lx %08lx %d\n",
254 i,
255 (ulong)act->handler,
256 (ulong)act->arg,
257 act->count);
258 }
259 act++;
260 }
261 printf ("\n");
262
263 return (0);
264 }
265 #endif
266