1 /*
2 * (C) Copyright 2008
3 * Texas Instruments, <www.ti.com>
4 * Syed Mohammed Khasim <khasim@ti.com>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation's version 2 of
12 * the License.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25 #include <config.h>
26 #include <common.h>
27 #include <fat.h>
28 #include <mmc.h>
29 #include <part.h>
30 #include <i2c.h>
31 #include <twl4030.h>
32 #include <asm/io.h>
33 #include <asm/arch/mmc.h>
34
35 const unsigned short mmc_transspeed_val[15][4] = {
36 {CLKD(10, 1), CLKD(10, 10), CLKD(10, 100), CLKD(10, 1000)},
37 {CLKD(12, 1), CLKD(12, 10), CLKD(12, 100), CLKD(12, 1000)},
38 {CLKD(13, 1), CLKD(13, 10), CLKD(13, 100), CLKD(13, 1000)},
39 {CLKD(15, 1), CLKD(15, 10), CLKD(15, 100), CLKD(15, 1000)},
40 {CLKD(20, 1), CLKD(20, 10), CLKD(20, 100), CLKD(20, 1000)},
41 {CLKD(26, 1), CLKD(26, 10), CLKD(26, 100), CLKD(26, 1000)},
42 {CLKD(30, 1), CLKD(30, 10), CLKD(30, 100), CLKD(30, 1000)},
43 {CLKD(35, 1), CLKD(35, 10), CLKD(35, 100), CLKD(35, 1000)},
44 {CLKD(40, 1), CLKD(40, 10), CLKD(40, 100), CLKD(40, 1000)},
45 {CLKD(45, 1), CLKD(45, 10), CLKD(45, 100), CLKD(45, 1000)},
46 {CLKD(52, 1), CLKD(52, 10), CLKD(52, 100), CLKD(52, 1000)},
47 {CLKD(55, 1), CLKD(55, 10), CLKD(55, 100), CLKD(55, 1000)},
48 {CLKD(60, 1), CLKD(60, 10), CLKD(60, 100), CLKD(60, 1000)},
49 {CLKD(70, 1), CLKD(70, 10), CLKD(70, 100), CLKD(70, 1000)},
50 {CLKD(80, 1), CLKD(80, 10), CLKD(80, 100), CLKD(80, 1000)}
51 };
52
53 mmc_card_data cur_card_data;
54 static block_dev_desc_t mmc_blk_dev;
55 static hsmmc_t *mmc_base = (hsmmc_t *)OMAP_HSMMC_BASE;
56
mmc_get_dev(int dev)57 block_dev_desc_t *mmc_get_dev(int dev)
58 {
59 return (block_dev_desc_t *) &mmc_blk_dev;
60 }
61
mmc_board_init(void)62 unsigned char mmc_board_init(void)
63 {
64 t2_t *t2_base = (t2_t *)T2_BASE;
65
66 #if defined(CONFIG_TWL4030_POWER)
67 twl4030_power_mmc_init();
68 #endif
69
70 writel(readl(&t2_base->pbias_lite) | PBIASLITEPWRDNZ1 |
71 PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0,
72 &t2_base->pbias_lite);
73
74 writel(readl(&t2_base->devconf0) | MMCSDIO1ADPCLKISEL,
75 &t2_base->devconf0);
76
77 return 1;
78 }
79
mmc_init_stream(void)80 void mmc_init_stream(void)
81 {
82 writel(readl(&mmc_base->con) | INIT_INITSTREAM, &mmc_base->con);
83
84 writel(MMC_CMD0, &mmc_base->cmd);
85 while (!(readl(&mmc_base->stat) & CC_MASK));
86
87 writel(CC_MASK, &mmc_base->stat);
88
89 writel(MMC_CMD0, &mmc_base->cmd);
90 while (!(readl(&mmc_base->stat) & CC_MASK));
91
92 writel(readl(&mmc_base->con) & ~INIT_INITSTREAM, &mmc_base->con);
93 }
94
mmc_clock_config(unsigned int iclk,unsigned short clk_div)95 unsigned char mmc_clock_config(unsigned int iclk, unsigned short clk_div)
96 {
97 unsigned int val;
98
99 mmc_reg_out(&mmc_base->sysctl, (ICE_MASK | DTO_MASK | CEN_MASK),
100 (ICE_STOP | DTO_15THDTO | CEN_DISABLE));
101
102 switch (iclk) {
103 case CLK_INITSEQ:
104 val = MMC_INIT_SEQ_CLK / 2;
105 break;
106 case CLK_400KHZ:
107 val = MMC_400kHz_CLK;
108 break;
109 case CLK_MISC:
110 val = clk_div;
111 break;
112 default:
113 return 0;
114 }
115 mmc_reg_out(&mmc_base->sysctl, ICE_MASK | CLKD_MASK,
116 (val << CLKD_OFFSET) | ICE_OSCILLATE);
117
118 while ((readl(&mmc_base->sysctl) & ICS_MASK) == ICS_NOTREADY);
119
120 writel(readl(&mmc_base->sysctl) | CEN_ENABLE, &mmc_base->sysctl);
121 return 1;
122 }
123
mmc_init_setup(void)124 unsigned char mmc_init_setup(void)
125 {
126 unsigned int reg_val;
127
128 mmc_board_init();
129
130 writel(readl(&mmc_base->sysconfig) | MMC_SOFTRESET,
131 &mmc_base->sysconfig);
132 while ((readl(&mmc_base->sysstatus) & RESETDONE) == 0);
133
134 writel(readl(&mmc_base->sysctl) | SOFTRESETALL, &mmc_base->sysctl);
135 while ((readl(&mmc_base->sysctl) & SOFTRESETALL) != 0x0);
136
137 writel(DTW_1_BITMODE | SDBP_PWROFF | SDVS_3V0, &mmc_base->hctl);
138 writel(readl(&mmc_base->capa) | VS30_3V0SUP | VS18_1V8SUP,
139 &mmc_base->capa);
140
141 reg_val = readl(&mmc_base->con) & RESERVED_MASK;
142
143 writel(CTPL_MMC_SD | reg_val | WPP_ACTIVEHIGH | CDP_ACTIVEHIGH |
144 MIT_CTO | DW8_1_4BITMODE | MODE_FUNC | STR_BLOCK |
145 HR_NOHOSTRESP | INIT_NOINIT | NOOPENDRAIN, &mmc_base->con);
146
147 mmc_clock_config(CLK_INITSEQ, 0);
148 writel(readl(&mmc_base->hctl) | SDBP_PWRON, &mmc_base->hctl);
149
150 writel(IE_BADA | IE_CERR | IE_DEB | IE_DCRC | IE_DTO | IE_CIE |
151 IE_CEB | IE_CCRC | IE_CTO | IE_BRR | IE_BWR | IE_TC | IE_CC,
152 &mmc_base->ie);
153
154 mmc_init_stream();
155 return 1;
156 }
157
mmc_send_cmd(unsigned int cmd,unsigned int arg,unsigned int * response)158 unsigned char mmc_send_cmd(unsigned int cmd, unsigned int arg,
159 unsigned int *response)
160 {
161 unsigned int mmc_stat;
162
163 while ((readl(&mmc_base->pstate) & DATI_MASK) == DATI_CMDDIS);
164
165 writel(BLEN_512BYTESLEN | NBLK_STPCNT, &mmc_base->blk);
166 writel(0xFFFFFFFF, &mmc_base->stat);
167 writel(arg, &mmc_base->arg);
168 writel(cmd | CMD_TYPE_NORMAL | CICE_NOCHECK | CCCE_NOCHECK |
169 MSBS_SGLEBLK | ACEN_DISABLE | BCE_DISABLE | DE_DISABLE,
170 &mmc_base->cmd);
171
172 while (1) {
173 do {
174 mmc_stat = readl(&mmc_base->stat);
175 } while (mmc_stat == 0);
176
177 if ((mmc_stat & ERRI_MASK) != 0)
178 return (unsigned char) mmc_stat;
179
180 if (mmc_stat & CC_MASK) {
181 writel(CC_MASK, &mmc_base->stat);
182 response[0] = readl(&mmc_base->rsp10);
183 if ((cmd & RSP_TYPE_MASK) == RSP_TYPE_LGHT136) {
184 response[1] = readl(&mmc_base->rsp32);
185 response[2] = readl(&mmc_base->rsp54);
186 response[3] = readl(&mmc_base->rsp76);
187 }
188 break;
189 }
190 }
191 return 1;
192 }
193
mmc_read_data(unsigned int * output_buf)194 unsigned char mmc_read_data(unsigned int *output_buf)
195 {
196 unsigned int mmc_stat;
197 unsigned int read_count = 0;
198
199 /*
200 * Start Polled Read
201 */
202 while (1) {
203 do {
204 mmc_stat = readl(&mmc_base->stat);
205 } while (mmc_stat == 0);
206
207 if ((mmc_stat & ERRI_MASK) != 0)
208 return (unsigned char) mmc_stat;
209
210 if (mmc_stat & BRR_MASK) {
211 unsigned int k;
212
213 writel(readl(&mmc_base->stat) | BRR_MASK,
214 &mmc_base->stat);
215 for (k = 0; k < MMCSD_SECTOR_SIZE / 4; k++) {
216 *output_buf = readl(&mmc_base->data);
217 output_buf++;
218 read_count += 4;
219 }
220 }
221
222 if (mmc_stat & BWR_MASK)
223 writel(readl(&mmc_base->stat) | BWR_MASK,
224 &mmc_base->stat);
225
226 if (mmc_stat & TC_MASK) {
227 writel(readl(&mmc_base->stat) | TC_MASK,
228 &mmc_base->stat);
229 break;
230 }
231 }
232 return 1;
233 }
234
mmc_detect_card(mmc_card_data * mmc_card_cur)235 unsigned char mmc_detect_card(mmc_card_data *mmc_card_cur)
236 {
237 unsigned char err;
238 unsigned int argument = 0;
239 unsigned int ocr_value, ocr_recvd, ret_cmd41, hcs_val;
240 unsigned short retry_cnt = 2000;
241 mmc_resp_t mmc_resp;
242
243 /* Set to Initialization Clock */
244 err = mmc_clock_config(CLK_400KHZ, 0);
245 if (err != 1)
246 return err;
247
248 mmc_card_cur->RCA = MMC_RELATIVE_CARD_ADDRESS;
249 argument = 0x00000000;
250
251 ocr_value = (0x1FF << 15);
252 err = mmc_send_cmd(MMC_CMD0, argument, mmc_resp.resp);
253 if (err != 1)
254 return err;
255
256 argument = SD_CMD8_CHECK_PATTERN | SD_CMD8_2_7_3_6_V_RANGE;
257 err = mmc_send_cmd(MMC_SDCMD8, argument, mmc_resp.resp);
258 hcs_val = (err == 1) ?
259 MMC_OCR_REG_HOST_CAPACITY_SUPPORT_SECTOR :
260 MMC_OCR_REG_HOST_CAPACITY_SUPPORT_BYTE;
261
262 argument = 0x0000 << 16;
263 err = mmc_send_cmd(MMC_CMD55, argument, mmc_resp.resp);
264 if (err == 1) {
265 mmc_card_cur->card_type = SD_CARD;
266 ocr_value |= hcs_val;
267 ret_cmd41 = MMC_ACMD41;
268 } else {
269 mmc_card_cur->card_type = MMC_CARD;
270 ocr_value |= MMC_OCR_REG_ACCESS_MODE_SECTOR;
271 ret_cmd41 = MMC_CMD1;
272 writel(readl(&mmc_base->con) & ~OD, &mmc_base->con);
273 writel(readl(&mmc_base->con) | OPENDRAIN, &mmc_base->con);
274 }
275
276 argument = ocr_value;
277 err = mmc_send_cmd(ret_cmd41, argument, mmc_resp.resp);
278 if (err != 1)
279 return err;
280
281 ocr_recvd = mmc_resp.r3.ocr;
282
283 while (!(ocr_recvd & (0x1 << 31)) && (retry_cnt > 0)) {
284 retry_cnt--;
285 if (mmc_card_cur->card_type == SD_CARD) {
286 argument = 0x0000 << 16;
287 err = mmc_send_cmd(MMC_CMD55, argument, mmc_resp.resp);
288 }
289
290 argument = ocr_value;
291 err = mmc_send_cmd(ret_cmd41, argument, mmc_resp.resp);
292 if (err != 1)
293 return err;
294 ocr_recvd = mmc_resp.r3.ocr;
295 }
296
297 if (!(ocr_recvd & (0x1 << 31)))
298 return 0;
299
300 if (mmc_card_cur->card_type == MMC_CARD) {
301 if ((ocr_recvd & MMC_OCR_REG_ACCESS_MODE_MASK) ==
302 MMC_OCR_REG_ACCESS_MODE_SECTOR) {
303 mmc_card_cur->mode = SECTOR_MODE;
304 } else {
305 mmc_card_cur->mode = BYTE_MODE;
306 }
307
308 ocr_recvd &= ~MMC_OCR_REG_ACCESS_MODE_MASK;
309 } else {
310 if ((ocr_recvd & MMC_OCR_REG_HOST_CAPACITY_SUPPORT_MASK)
311 == MMC_OCR_REG_HOST_CAPACITY_SUPPORT_SECTOR) {
312 mmc_card_cur->mode = SECTOR_MODE;
313 } else {
314 mmc_card_cur->mode = BYTE_MODE;
315 }
316 ocr_recvd &= ~MMC_OCR_REG_HOST_CAPACITY_SUPPORT_MASK;
317 }
318
319 ocr_recvd &= ~(0x1 << 31);
320 if (!(ocr_recvd & ocr_value))
321 return 0;
322
323 err = mmc_send_cmd(MMC_CMD2, argument, mmc_resp.resp);
324 if (err != 1)
325 return err;
326
327 if (mmc_card_cur->card_type == MMC_CARD) {
328 argument = mmc_card_cur->RCA << 16;
329 err = mmc_send_cmd(MMC_CMD3, argument, mmc_resp.resp);
330 if (err != 1)
331 return err;
332 } else {
333 argument = 0x00000000;
334 err = mmc_send_cmd(MMC_SDCMD3, argument, mmc_resp.resp);
335 if (err != 1)
336 return err;
337
338 mmc_card_cur->RCA = mmc_resp.r6.newpublishedrca;
339 }
340
341 writel(readl(&mmc_base->con) & ~OD, &mmc_base->con);
342 writel(readl(&mmc_base->con) | NOOPENDRAIN, &mmc_base->con);
343 return 1;
344 }
345
mmc_read_cardsize(mmc_card_data * mmc_dev_data,mmc_csd_reg_t * cur_csd)346 unsigned char mmc_read_cardsize(mmc_card_data *mmc_dev_data,
347 mmc_csd_reg_t *cur_csd)
348 {
349 mmc_extended_csd_reg_t ext_csd;
350 unsigned int size, count, blk_len, blk_no, card_size, argument;
351 unsigned char err;
352 unsigned int resp[4];
353
354 if (mmc_dev_data->mode == SECTOR_MODE) {
355 if (mmc_dev_data->card_type == SD_CARD) {
356 card_size =
357 (((mmc_sd2_csd_reg_t *) cur_csd)->
358 c_size_lsb & MMC_SD2_CSD_C_SIZE_LSB_MASK) |
359 ((((mmc_sd2_csd_reg_t *) cur_csd)->
360 c_size_msb & MMC_SD2_CSD_C_SIZE_MSB_MASK)
361 << MMC_SD2_CSD_C_SIZE_MSB_OFFSET);
362 mmc_dev_data->size = card_size * 1024;
363 if (mmc_dev_data->size == 0)
364 return 0;
365 } else {
366 argument = 0x00000000;
367 err = mmc_send_cmd(MMC_CMD8, argument, resp);
368 if (err != 1)
369 return err;
370 err = mmc_read_data((unsigned int *) &ext_csd);
371 if (err != 1)
372 return err;
373 mmc_dev_data->size = ext_csd.sectorcount;
374
375 if (mmc_dev_data->size == 0)
376 mmc_dev_data->size = 8388608;
377 }
378 } else {
379 if (cur_csd->c_size_mult >= 8)
380 return 0;
381
382 if (cur_csd->read_bl_len >= 12)
383 return 0;
384
385 /* Compute size */
386 count = 1 << (cur_csd->c_size_mult + 2);
387 card_size = (cur_csd->c_size_lsb & MMC_CSD_C_SIZE_LSB_MASK) |
388 ((cur_csd->c_size_msb & MMC_CSD_C_SIZE_MSB_MASK)
389 << MMC_CSD_C_SIZE_MSB_OFFSET);
390 blk_no = (card_size + 1) * count;
391 blk_len = 1 << cur_csd->read_bl_len;
392 size = blk_no * blk_len;
393 mmc_dev_data->size = size / MMCSD_SECTOR_SIZE;
394 if (mmc_dev_data->size == 0)
395 return 0;
396 }
397 return 1;
398 }
399
omap_mmc_read_sect(unsigned int start_sec,unsigned int num_bytes,mmc_card_data * mmc_c,unsigned long * output_buf)400 unsigned char omap_mmc_read_sect(unsigned int start_sec, unsigned int num_bytes,
401 mmc_card_data *mmc_c,
402 unsigned long *output_buf)
403 {
404 unsigned char err;
405 unsigned int argument;
406 unsigned int resp[4];
407 unsigned int num_sec_val =
408 (num_bytes + (MMCSD_SECTOR_SIZE - 1)) / MMCSD_SECTOR_SIZE;
409 unsigned int sec_inc_val;
410
411 if (num_sec_val == 0)
412 return 1;
413
414 if (mmc_c->mode == SECTOR_MODE) {
415 argument = start_sec;
416 sec_inc_val = 1;
417 } else {
418 argument = start_sec * MMCSD_SECTOR_SIZE;
419 sec_inc_val = MMCSD_SECTOR_SIZE;
420 }
421
422 while (num_sec_val) {
423 err = mmc_send_cmd(MMC_CMD17, argument, resp);
424 if (err != 1)
425 return err;
426
427 err = mmc_read_data((unsigned int *) output_buf);
428 if (err != 1)
429 return err;
430
431 output_buf += (MMCSD_SECTOR_SIZE / 4);
432 argument += sec_inc_val;
433 num_sec_val--;
434 }
435 return 1;
436 }
437
configure_mmc(mmc_card_data * mmc_card_cur)438 unsigned char configure_mmc(mmc_card_data *mmc_card_cur)
439 {
440 unsigned char ret_val;
441 unsigned int argument;
442 unsigned int trans_clk, trans_fact, trans_unit, retries = 2;
443 unsigned char trans_speed;
444 mmc_resp_t mmc_resp;
445
446 ret_val = mmc_init_setup();
447
448 if (ret_val != 1)
449 return ret_val;
450
451 do {
452 ret_val = mmc_detect_card(mmc_card_cur);
453 retries--;
454 } while ((retries > 0) && (ret_val != 1));
455
456 argument = mmc_card_cur->RCA << 16;
457 ret_val = mmc_send_cmd(MMC_CMD9, argument, mmc_resp.resp);
458 if (ret_val != 1)
459 return ret_val;
460
461 if (mmc_card_cur->card_type == MMC_CARD)
462 mmc_card_cur->version = mmc_resp.Card_CSD.spec_vers;
463
464 trans_speed = mmc_resp.Card_CSD.tran_speed;
465
466 ret_val = mmc_send_cmd(MMC_CMD4, MMC_DSR_DEFAULT << 16, mmc_resp.resp);
467 if (ret_val != 1)
468 return ret_val;
469
470 trans_unit = trans_speed & MMC_CSD_TRAN_SPEED_UNIT_MASK;
471 trans_fact = trans_speed & MMC_CSD_TRAN_SPEED_FACTOR_MASK;
472
473 if (trans_unit > MMC_CSD_TRAN_SPEED_UNIT_100MHZ)
474 return 0;
475
476 if ((trans_fact < MMC_CSD_TRAN_SPEED_FACTOR_1_0) ||
477 (trans_fact > MMC_CSD_TRAN_SPEED_FACTOR_8_0))
478 return 0;
479
480 trans_unit >>= 0;
481 trans_fact >>= 3;
482
483 trans_clk = mmc_transspeed_val[trans_fact - 1][trans_unit] * 2;
484 ret_val = mmc_clock_config(CLK_MISC, trans_clk);
485
486 if (ret_val != 1)
487 return ret_val;
488
489 argument = mmc_card_cur->RCA << 16;
490 ret_val = mmc_send_cmd(MMC_CMD7_SELECT, argument, mmc_resp.resp);
491 if (ret_val != 1)
492 return ret_val;
493
494 /* Configure the block length to 512 bytes */
495 argument = MMCSD_SECTOR_SIZE;
496 ret_val = mmc_send_cmd(MMC_CMD16, argument, mmc_resp.resp);
497 if (ret_val != 1)
498 return ret_val;
499
500 /* get the card size in sectors */
501 ret_val = mmc_read_cardsize(mmc_card_cur, &mmc_resp.Card_CSD);
502 if (ret_val != 1)
503 return ret_val;
504
505 return 1;
506 }
mmc_bread(int dev_num,unsigned long blknr,lbaint_t blkcnt,void * dst)507 unsigned long mmc_bread(int dev_num, unsigned long blknr, lbaint_t blkcnt,
508 void *dst)
509 {
510 omap_mmc_read_sect(blknr, (blkcnt * MMCSD_SECTOR_SIZE), &cur_card_data,
511 (unsigned long *) dst);
512 return 1;
513 }
514
mmc_legacy_init(int verbose)515 int mmc_legacy_init(int verbose)
516 {
517 if (configure_mmc(&cur_card_data) != 1)
518 return 1;
519
520 mmc_blk_dev.if_type = IF_TYPE_MMC;
521 mmc_blk_dev.part_type = PART_TYPE_DOS;
522 mmc_blk_dev.dev = 0;
523 mmc_blk_dev.lun = 0;
524 mmc_blk_dev.type = 0;
525
526 /* FIXME fill in the correct size (is set to 32MByte) */
527 mmc_blk_dev.blksz = MMCSD_SECTOR_SIZE;
528 mmc_blk_dev.lba = 0x10000;
529 mmc_blk_dev.removable = 0;
530 mmc_blk_dev.block_read = mmc_bread;
531
532 fat_register_device(&mmc_blk_dev, 1);
533 return 0;
534 }
535