1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2001
4  * Erik Theisen,  Wave 7 Optics, etheisen@mindspring.com.
5  */
6 
7 /*
8  * Date & Time support for ST Electronics M48T35Ax RTC
9  */
10 
11 /*#define       DEBUG */
12 
13 
14 #include <common.h>
15 #include <command.h>
16 #include <rtc.h>
17 #include <config.h>
18 
19 static uchar rtc_read  (uchar reg);
20 static void  rtc_write (uchar reg, uchar val);
21 
22 /* ------------------------------------------------------------------------- */
23 
rtc_get(struct rtc_time * tmp)24 int rtc_get (struct rtc_time *tmp)
25 {
26 	uchar sec, min, hour, cent_day, date, month, year;
27 	uchar ccr;			/* Clock control register */
28 
29 	/* Lock RTC for read using clock control register */
30 	ccr = rtc_read(0);
31 	ccr = ccr | 0x40;
32 	rtc_write(0, ccr);
33 
34 	sec	= rtc_read (0x1);
35 	min	= rtc_read (0x2);
36 	hour	= rtc_read (0x3);
37 	cent_day= rtc_read (0x4);
38 	date	= rtc_read (0x5);
39 	month   = rtc_read (0x6);
40 	year	= rtc_read (0x7);
41 
42 	/* UNLock RTC */
43 	ccr = rtc_read(0);
44 	ccr = ccr & 0xBF;
45 	rtc_write(0, ccr);
46 
47 	debug ( "Get RTC year: %02x month: %02x date: %02x cent_day: %02x "
48 		"hr: %02x min: %02x sec: %02x\n",
49 		year, month, date, cent_day,
50 		hour, min, sec );
51 
52 	tmp->tm_sec  = bcd2bin (sec  & 0x7F);
53 	tmp->tm_min  = bcd2bin (min  & 0x7F);
54 	tmp->tm_hour = bcd2bin (hour & 0x3F);
55 	tmp->tm_mday = bcd2bin (date & 0x3F);
56 	tmp->tm_mon  = bcd2bin (month & 0x1F);
57 	tmp->tm_year = bcd2bin (year) + ((cent_day & 0x10) ? 2000 : 1900);
58 	tmp->tm_wday = bcd2bin (cent_day & 0x07);
59 	tmp->tm_yday = 0;
60 	tmp->tm_isdst= 0;
61 
62 	debug ( "Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
63 		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
64 		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
65 
66 	return 0;
67 }
68 
rtc_set(struct rtc_time * tmp)69 int rtc_set (struct rtc_time *tmp)
70 {
71 	uchar ccr;			/* Clock control register */
72 	uchar century;
73 
74 	debug ( "Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
75 		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
76 		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
77 
78 	/* Lock RTC for write using clock control register */
79 	ccr = rtc_read(0);
80 	ccr = ccr | 0x80;
81 	rtc_write(0, ccr);
82 
83 	rtc_write (0x07, bin2bcd(tmp->tm_year % 100));
84 	rtc_write (0x06, bin2bcd(tmp->tm_mon));
85 	rtc_write (0x05, bin2bcd(tmp->tm_mday));
86 
87 	century = ((tmp->tm_year >= 2000) ? 0x10 : 0) | 0x20;
88 	rtc_write (0x04, bin2bcd(tmp->tm_wday) | century);
89 
90 	rtc_write (0x03, bin2bcd(tmp->tm_hour));
91 	rtc_write (0x02, bin2bcd(tmp->tm_min ));
92 	rtc_write (0x01, bin2bcd(tmp->tm_sec ));
93 
94 	/* UNLock RTC */
95 	ccr = rtc_read(0);
96 	ccr = ccr & 0x7F;
97 	rtc_write(0, ccr);
98 
99 	return 0;
100 }
101 
rtc_reset(void)102 void rtc_reset (void)
103 {
104 	uchar val;
105 
106 	/* Clear all clock control registers */
107 	rtc_write (0x0, 0x80);		/* No Read Lock or calibration */
108 
109 	/* Clear stop bit */
110 	val = rtc_read (0x1);
111 	val &= 0x7f;
112 	rtc_write(0x1, val);
113 
114 	/* Enable century / disable frequency test */
115 	val = rtc_read (0x4);
116 	val = (val & 0xBF) | 0x20;
117 	rtc_write(0x4, val);
118 
119 	/* Clear write lock */
120 	rtc_write(0x0, 0);
121 }
122 
123 /* ------------------------------------------------------------------------- */
124 
rtc_read(uchar reg)125 static uchar rtc_read (uchar reg)
126 {
127 	return *(unsigned char *)
128 		((CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE - 8) + reg);
129 }
130 
rtc_write(uchar reg,uchar val)131 static void rtc_write (uchar reg, uchar val)
132 {
133 	*(unsigned char *)
134 		((CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE - 8) + reg) = val;
135 }
136