1 /******************************************************************************
2 * Copyright (c) 2007, 2011, 2013 IBM Corporation
3 * All rights reserved.
4 * This program and the accompanying materials
5 * are made available under the terms of the BSD License
6 * which accompanies this distribution, and is available at
7 * http://www.opensource.org/licenses/bsd-license.php
8 *
9 * Contributors:
10 * IBM Corporation - initial implementation
11 *****************************************************************************/
12 /*
13 * e1000 Gigabit Ethernet Driver for SLOF
14 *
15 * Reference:
16 * PCI/PCI-X Family of Gigabit Ethernet Controllers
17 * Software Developer's Manual Rev. 3.3, Intel, December 2006
18 */
19
20 #include <stdint.h>
21 #include <stdio.h>
22 #include <string.h>
23 #include <byteorder.h>
24 #include <helpers.h>
25 #include <netdriver.h>
26 #include "e1k.h"
27
28 /*
29 * local defines
30 ******************************************************************************
31 */
32 #define E1K_NUM_RX_DESC 128 // do not change
33 #define E1K_NUM_TX_DESC 128 // do not change
34 #define E1K_BUF_SIZE 2096 // do not change
35
36 #define NUM_MAC_ADDR 16 // number of mac address register pairs
37 #define EEPROM_MAC_OFFS 0 // position of mac address in eeprom
38
39 /*
40 * local types
41 ******************************************************************************
42 */
43 typedef struct {
44 uint32_t m_dev_u32;
45 uint64_t m_devmsk_u64;
46 char *m_name;
47 } e1k_dev_t;
48
49 /*
50 * e1k common data structures
51 */
52
53 /*
54 * transmit buffer descriptor
55 */
56 typedef struct {
57 uint64_t m_buffer_u64;
58 uint16_t m_len_u16;
59 uint8_t m_cso_u08;
60 uint8_t m_cmd_u08;
61 uint8_t m_sta_u08;
62 uint8_t m_css_u08;
63 uint16_t m_spe_u16;
64 } __attribute__ ((packed)) e1k_tx_desc_st;
65
66
67 /*
68 * receive buffer descriptor
69 */
70 typedef struct {
71 uint64_t m_buffer_u64;
72 uint16_t m_len_u16;
73 uint16_t m_csm_u16;
74 uint8_t m_sta_u08;
75 uint8_t m_err_u08;
76 uint16_t m_spe_u16;
77 } __attribute__ ((packed)) e1k_rx_desc_st;
78
79 /*
80 * e1k device structure
81 */
82 typedef struct {
83 /*
84 * device identification mask
85 */
86 uint64_t m_device_u64;
87
88 /*
89 * memory mapped base address of NIC
90 */
91 uint64_t m_baseaddr_u64;
92
93 /*
94 * transmit & receive rings
95 * must be 16 byte aligned
96 */
97 e1k_tx_desc_st m_tx_ring_pst[E1K_NUM_TX_DESC];
98 e1k_rx_desc_st m_rx_ring_pst[E1K_NUM_RX_DESC];
99
100 /*
101 * transmit & receive buffers
102 * must be 16 byte aligned
103 */
104 uint8_t m_tx_buffer_pu08[E1K_NUM_TX_DESC][E1K_BUF_SIZE];
105 uint8_t m_rx_buffer_pu08[E1K_NUM_RX_DESC][E1K_BUF_SIZE];
106
107 /*
108 * next receive descriptor index
109 */
110 uint32_t m_rx_next_u32;
111
112 /*
113 * command register storage
114 */
115 uint16_t m_com_r_u16;
116
117 /*
118 * padding to make the size of the structure a multiple of 16 byte
119 */
120 uint16_t m_pad16_u16;
121 uint64_t m_pad64_u32;
122
123 } __attribute__ ((packed)) e1k_st;
124
125 /*
126 * local constants
127 ******************************************************************************
128 */
129 #define E1K_82540 ((uint64_t) 0x1)
130 #define E1K_82541 ((uint64_t) 0x2)
131 #define E1K_82544 ((uint64_t) 0x4)
132 #define E1K_82545 ((uint64_t) 0x8)
133 #define E1K_82546 ((uint64_t) 0x10)
134 #define E1K_82547 ((uint64_t) 0x20)
135
136 #define IS_82541 ((m_e1k.m_device_u64 & E1K_82541) != 0)
137 #define IS_82546 ((m_e1k.m_device_u64 & E1K_82546) != 0)
138 #define IS_82547 ((m_e1k.m_device_u64 & E1K_82547) != 0)
139
140 static const e1k_dev_t e1k_dev[] = {
141 { 0x1019, E1K_82547, "82547EI/GI Copper" },
142 { 0x101A, E1K_82547, "82547EI Mobile" },
143 { 0x1010, E1K_82546, "52546EB Copper, Dual Port" },
144 { 0x1012, E1K_82546, "82546EB Fiber, Dual Port" },
145 /* { 0x101D, E1K_82546, "82546EB Copper, Quad Port" }, */
146 { 0x1079, E1K_82546, "82546GB Copper, Dual Port" },
147 { 0x107A, E1K_82546, "82546GB Fiber, Dual Port" },
148 { 0x107B, E1K_82546, "82546GB SerDes, Dual Port" },
149 { 0x100F, E1K_82545, "82545EM Copper" },
150 { 0x1011, E1K_82545, "82545EM Fiber" },
151 { 0x1026, E1K_82545, "82545GM Copper" },
152 { 0x1027, E1K_82545, "82545GM Fiber" },
153 { 0x1028, E1K_82545, "82545GM SerDes" },
154 { 0x1107, E1K_82544, "82544EI Copper" },
155 { 0x1112, E1K_82544, "82544GC Copper" },
156 { 0x1013, E1K_82541, "82541EI Copper" },
157 { 0x1018, E1K_82541, "82541EI Mobile" },
158 { 0x1076, E1K_82541, "82541GI Copper" },
159 { 0x1077, E1K_82541, "82541GI Mobile" },
160 { 0x1078, E1K_82541, "82541ER Copper" },
161 { 0x107C, E1K_82541, "82541PI" },
162 { 0x1015, E1K_82540, "82540EM Mobile" },
163 { 0x1016, E1K_82540, "82540EP Mobile" },
164 { 0x1017, E1K_82540, "82540EP Desktop" },
165 { 0x100E, E1K_82540, "82540EM Desktop" },
166 { 0 , 0 }
167 };
168
169 /*
170 * local variables
171 ******************************************************************************
172 */
173 static e1k_st m_e1k __attribute__ ((aligned(16)));
174 static long dma_offset;
175
176 /*
177 * global functions
178 ******************************************************************************
179 */
180 int
181 check_driver(uint16_t vendor_id, uint16_t device_id);
182
183 static int e1k_init(net_driver_t *driver);
184 static int e1k_term(void);
185 static int e1k_xmit(char *f_buffer_pc, int f_len_i);
186 static int e1k_receive(char *f_buffer_pc, int f_len_i);
187
188 /**
189 * Translate virtual to "physical" address, ie. an address
190 * which can be used for DMA transfers.
191 */
192 static uint64_t
virt2dma(void * addr)193 virt2dma(void *addr)
194 {
195 return (uint64_t)addr + dma_offset;
196 }
197
198 static void *
dma2virt(uint64_t addr)199 dma2virt(uint64_t addr)
200 {
201 return (void *)(addr - dma_offset);
202 }
203
204 /*
205 * local inline functions for e1k register access
206 ******************************************************************************
207 */
208 static uint32_t
e1k_rd32(uint16_t f_offs_u16)209 e1k_rd32(uint16_t f_offs_u16)
210 { // caution: shall only be used after initialization!
211 return bswap_32(rd32(m_e1k.m_baseaddr_u64 + (uint64_t) f_offs_u16));
212 }
213
214 /* not used so far
215 static uint16_t
216 e1k_rd16(uint16_t f_offs_u16)
217 { // caution: shall only be used after initialization!
218 return bswap_16(rd16(m_e1k.m_baseaddr_u64 + (uint64_t) f_offs_u16));
219 }*/
220
221 /* not used so far
222 static uint8_t
223 e1k_rd08(uint16_t f_offs_u16)
224 { // caution: shall only be used after initialization!
225 return rd08(m_e1k.m_baseaddr_u64 + (uint64_t) f_offs_u16);
226 }*/
227
228 static void
e1k_wr32(uint16_t f_offs_u16,uint32_t f_val_u32)229 e1k_wr32(uint16_t f_offs_u16, uint32_t f_val_u32)
230 { // caution: shall only be used after initialization!
231 wr32(m_e1k.m_baseaddr_u64 + (uint64_t) f_offs_u16, bswap_32(f_val_u32));
232 }
233
234 /* not used so far
235 static void
236 e1k_wr16(uint16_t f_offs_u16, uint16_t f_val_u16)
237 { // caution: shall only be used after initialization!
238 wr16(m_e1k.m_baseaddr_u64 + (uint64_t) f_offs_u16, bswap_16(f_val_u16));
239 }*/
240
241 /* not used so far
242 static void
243 e1k_wr08(uint16_t f_offs_u16, uint8_t f_val_u08)
244 { // caution: shall only be used after initialization!
245 wr08(m_e1k.m_baseaddr_u64 + (uint64_t) f_offs_u16, f_val_u08);
246 }*/
247
248 static void
e1k_setb32(uint16_t f_offs_u16,uint32_t f_mask_u32)249 e1k_setb32(uint16_t f_offs_u16, uint32_t f_mask_u32)
250 {
251 uint32_t v;
252
253 v = e1k_rd32(f_offs_u16);
254 v |= f_mask_u32;
255 e1k_wr32(f_offs_u16, v);
256 }
257
258 /* not used so far
259 static void
260 e1k_setb16(uint16_t f_offs_u16, uint16_t f_mask_u16)
261 {
262 uint16_t v;
263 v = e1k_rd16(f_offs_u16);
264 v |= f_mask_u16;
265 e1k_wr16(f_offs_u16, v);
266 }*/
267
268 /* not used so far
269 static void
270 e1k_setb08(uint16_t f_offs_u16, uint8_t f_mask_u08)
271 {
272 uint8_t v;
273 v = e1k_rd08(f_offs_u16);
274 v |= f_mask_u08;
275 e1k_wr08(f_offs_u16, v);
276 }*/
277
278 static void
e1k_clrb32(uint16_t f_offs_u16,uint32_t f_mask_u32)279 e1k_clrb32(uint16_t f_offs_u16, uint32_t f_mask_u32)
280 {
281 uint32_t v;
282
283 v = e1k_rd32(f_offs_u16);
284 v &= ~f_mask_u32;
285 e1k_wr32(f_offs_u16, v);
286 }
287
288 /* not used so far
289 static void
290 e1k_clrb16(uint16_t f_offs_u16, uint16_t f_mask_u16)
291 {
292 uint16_t v;
293
294 v = e1k_rd16(f_offs_u16);
295 v &= ~f_mask_u16;
296 e1k_wr16(f_offs_u16, v);
297 }*/
298
299 /* not used so far
300 static void
301 e1k_clrb08(uint16_t f_offs_u16, uint8_t f_mask_u08)
302 {
303 uint8_t v;
304 v = e1k_rd08(f_offs_u16);
305 v &= ~f_mask_u08;
306 e1k_wr08(f_offs_u16, v);
307 }*/
308
309 static int32_t
e1k_eep_rd16(uint8_t f_offs_u08,uint16_t * f_data_pu16)310 e1k_eep_rd16(uint8_t f_offs_u08, uint16_t *f_data_pu16)
311 {
312 uint32_t i;
313 uint32_t v;
314 int32_t done_shft;
315 int32_t addr_shft;
316
317 if(IS_82541 || IS_82547) {
318 addr_shft = 2;
319 done_shft = 1;
320 } else {
321 addr_shft = 8;
322 done_shft = 4;
323 }
324
325 /*
326 * initiate eeprom read
327 */
328 e1k_wr32(EERD, ((uint32_t) f_offs_u08 << addr_shft) | // address
329 BIT32(0)); // start read
330
331 /*
332 * wait for read done bit to be set
333 */
334 i = 1000;
335 v = e1k_rd32(EERD);
336 while ((--i) &&
337 ((v & BIT32(done_shft)) == 0)) {
338 SLOF_msleep(1);
339 v = e1k_rd32(EERD);
340 }
341
342 /*
343 * return on error
344 */
345 if ((v & BIT32(done_shft)) == 0) {
346 return -1;
347 }
348
349 /*
350 * return data
351 */
352 *f_data_pu16 = (uint16_t) ((v >> 16) & 0xffff);
353
354 return 0;
355 }
356
357 /*
358 * ring initialization
359 */
360 static void
e1k_init_receiver(void)361 e1k_init_receiver(void)
362 {
363 uint32_t i;
364 uint64_t addr;
365
366 /*
367 * disable receiver for initialization
368 */
369 e1k_wr32(RCTL, 0);
370
371 /*
372 * clear receive desciptors and setup buffer pointers
373 */
374 for (i = 0; i < E1K_NUM_RX_DESC; i++) {
375 memset((uint8_t *) &m_e1k.m_rx_ring_pst[i], 0,
376 sizeof(e1k_rx_desc_st));
377 mb();
378
379 m_e1k.m_rx_ring_pst[i].m_buffer_u64 =
380 bswap_64(virt2dma(&m_e1k.m_rx_buffer_pu08[i][0]));
381 }
382
383 /*
384 * initialize previously received index
385 */
386 m_e1k.m_rx_next_u32 = 0;
387
388 /*
389 * setup the base address and the length of the rx descriptor ring
390 */
391 addr = virt2dma(&m_e1k.m_rx_ring_pst[0]);
392 e1k_wr32(RDBAH, (uint32_t) ((uint64_t) addr >> 32));
393 e1k_wr32(RDBAL, (uint32_t) ((uint64_t) addr & 0xffffffff));
394 e1k_wr32(RDLEN, E1K_NUM_RX_DESC * sizeof(e1k_rx_desc_st));
395
396 /*
397 * setup the rx head and tail descriptor indices
398 */
399 e1k_wr32(RDH, 0);
400 e1k_wr32(RDT, E1K_NUM_RX_DESC - 1);
401
402 /*
403 * setup the receive delay timer register
404 */
405 e1k_wr32(RDTR, 0);
406
407 /*
408 * setup the receive control register
409 */
410 e1k_wr32(RCTL, BIT32( 1) | // enable receiver
411 BIT32( 4) | // enable multicast reception
412 BIT32(15)); // broadcast accept mode
413 // packet size 2048
414 // no buffer extension
415 }
416
417 static void
e1k_init_transmitter(void)418 e1k_init_transmitter(void)
419 {
420 uint32_t i;
421 uint64_t addr;
422
423 /*
424 * clear transmit desciptors and setup buffer pointers
425 */
426 for (i = 0; i < E1K_NUM_TX_DESC; i++) {
427 memset((uint8_t *) &m_e1k.m_tx_ring_pst[i], 0,
428 sizeof(e1k_tx_desc_st));
429 mb();
430
431 m_e1k.m_tx_ring_pst[i].m_buffer_u64 =
432 bswap_64(virt2dma(&m_e1k.m_tx_buffer_pu08[i][0]));
433 }
434
435 /*
436 * setup the base address and the length of the tx descriptor ring
437 */
438 addr = virt2dma(&m_e1k.m_tx_ring_pst[0]);
439 e1k_wr32(TDBAH, (uint32_t) ((uint64_t) addr >> 32));
440 e1k_wr32(TDBAL, (uint32_t) ((uint64_t) addr & 0xffffffff));
441 e1k_wr32(TDLEN, E1K_NUM_TX_DESC * sizeof(e1k_tx_desc_st));
442
443 /*
444 * setup the rx head and tail descriptor indices
445 */
446 e1k_wr32(TDH, 0);
447 e1k_wr32(TDT, 0);
448
449 /*
450 * initialize the transmit control register
451 */
452 e1k_wr32(TCTL, BIT32(1) | // enable transmitter
453 BIT32(3) | // pad short packets
454 ((uint32_t) 0x0f << 4) | // collision threshhold
455 ((uint32_t) 0x40 << 12)); // collision distance
456 }
457
458 static int32_t
e1k_mac_init(uint8_t * f_mac_pu08)459 e1k_mac_init(uint8_t *f_mac_pu08)
460 {
461 uint32_t l_ah_u32;
462 uint32_t l_al_u32;
463 uint32_t i;
464 uint32_t v;
465
466 /*
467 * Use MAC address from device tree if possible
468 */
469 for (i = 0, v = 0; i < 6; i++) {
470 v += (uint32_t) f_mac_pu08[i];
471 }
472
473 if (v != 0) {
474 /*
475 * use passed mac address for transmission to nic
476 */
477 l_al_u32 = ((uint32_t) f_mac_pu08[3] << 24);
478 l_al_u32 |= ((uint32_t) f_mac_pu08[2] << 16);
479 l_al_u32 |= ((uint32_t) f_mac_pu08[1] << 8);
480 l_al_u32 |= ((uint32_t) f_mac_pu08[0] << 0);
481 l_ah_u32 = ((uint32_t) f_mac_pu08[5] << 8);
482 l_ah_u32 |= ((uint32_t) f_mac_pu08[4] << 0);
483 } else {
484 /*
485 * read mac address from eeprom
486 */
487 uint16_t w[3]; // 3 16 bit words from eeprom
488
489 for (i = 0; i < 3; i++) {
490 if (e1k_eep_rd16(EEPROM_MAC_OFFS + i, &w[i]) != 0) {
491 printf("Failed to read MAC address from EEPROM!\n");
492 return -1;
493 }
494 }
495
496 /*
497 * invert the least significant bit for 82546 dual port
498 * if the second device is in use (remember word is byteswapped)
499 */
500 if ((IS_82546) &&
501 ((e1k_rd32(STATUS) & BIT32(2)) != 0)) {
502 w[2] ^= (uint16_t) 0x100;
503 }
504
505 /*
506 * store mac address for transmission to nic
507 */
508 l_ah_u32 = ((uint32_t) w[2] << 0);
509 l_al_u32 = ((uint32_t) w[1] << 16);
510 l_al_u32 |= ((uint32_t) w[0] << 0);
511
512 /*
513 * return mac address
514 * mac address in eeprom is stored byteswapped
515 */
516 f_mac_pu08[1] = (uint8_t) ((w[0] >> 8) & 0xff);
517 f_mac_pu08[0] = (uint8_t) ((w[0] >> 0) & 0xff);
518 f_mac_pu08[3] = (uint8_t) ((w[1] >> 8) & 0xff);
519 f_mac_pu08[2] = (uint8_t) ((w[1] >> 0) & 0xff);
520 f_mac_pu08[5] = (uint8_t) ((w[2] >> 8) & 0xff);
521 f_mac_pu08[4] = (uint8_t) ((w[2] >> 0) & 0xff);
522 }
523
524 /*
525 * insert mac address in receive address register
526 * and set AV bit
527 */
528 e1k_wr32(RAL0, l_al_u32);
529 e1k_wr32(RAH0, l_ah_u32 | BIT32(31));
530
531 /*
532 * clear remaining receive address registers
533 */
534 for (i = 1; i < NUM_MAC_ADDR; i++) {
535 e1k_wr32(RAL0 + i * sizeof(uint64_t), 0);
536 e1k_wr32(RAH0 + i * sizeof(uint64_t), 0);
537 }
538
539 return 0;
540 }
541
542
543 /*
544 * interface
545 ******************************************************************************
546 */
547
548 /*
549 * e1k_receive
550 */
551 static int
e1k_receive(char * f_buffer_pc,int f_len_i)552 e1k_receive(char *f_buffer_pc, int f_len_i)
553 {
554 uint32_t l_rdh_u32 = e1k_rd32(RDH); // this includes needed dummy read
555 e1k_rx_desc_st *rx;
556 int l_ret_i;
557
558 #ifdef E1K_DEBUG
559 #ifdef E1K_SHOW_RCV_DATA
560 int i;
561 #endif
562 #endif
563
564 /*
565 * check whether new packets have arrived
566 */
567 if (m_e1k.m_rx_next_u32 == l_rdh_u32) {
568 return 0;
569 }
570
571 /*
572 * get a pointer to the next rx descriptor for ease of use
573 */
574 rx = &m_e1k.m_rx_ring_pst[m_e1k.m_rx_next_u32];
575
576 /*
577 * check whether the descriptor done bit is set
578 */
579 if ((rx->m_sta_u08 & 0x1) == 0) {
580 return 0;
581 }
582
583 /*
584 * get the length of the packet, throw away checksum
585 */
586 l_ret_i = (int) bswap_16(rx->m_len_u16) - (int) 4;
587
588 /*
589 * copy the data
590 */
591 memcpy((uint8_t *) f_buffer_pc, dma2virt(bswap_64(rx->m_buffer_u64)),
592 (size_t) l_ret_i);
593
594 #ifdef E1K_DEBUG
595 #if defined(E1K_SHOW_RCV) || defined(E1K_SHOW_RCV_DATA)
596 printf("e1k: %d bytes received\n", l_ret_i);
597 #endif
598
599 #ifdef E1K_SHOW_RCV_DATA
600 for (i = 0; i < l_ret_i; i++) {
601
602 if ((i & 0x1f) == 0) {
603 printf("\n ");
604 }
605
606 printf("%02X ", f_buffer_pc[i]);
607 }
608
609 printf("\n\n");
610 #endif
611 #endif
612
613 /*
614 * clear descriptor for reusage, but leave buffer pointer untouched
615 */
616 memset((uint8_t *) &rx->m_len_u16, 0,
617 sizeof(e1k_rx_desc_st) - sizeof(uint64_t));
618 mb();
619
620 /*
621 * write new tail pointer
622 */
623 e1k_wr32(RDT, m_e1k.m_rx_next_u32);
624
625 /*
626 * update next receive index
627 */
628 m_e1k.m_rx_next_u32 = (m_e1k.m_rx_next_u32 + 1) & (E1K_NUM_RX_DESC - 1);
629
630 return l_ret_i;
631 }
632
633 static int
e1k_xmit(char * f_buffer_pc,int f_len_i)634 e1k_xmit(char *f_buffer_pc, int f_len_i)
635 {
636 uint32_t l_tdh_u32 = e1k_rd32(TDH);
637 uint32_t l_tdt_u32 = e1k_rd32(TDT);
638 uint32_t l_pre_u32 = (l_tdh_u32 + (E1K_NUM_TX_DESC - 1)) &
639 (E1K_NUM_TX_DESC - 1);
640 e1k_tx_desc_st *tx;
641 #if defined(E1K_DEBUG) && defined(E1K_SHOW_XMIT_DATA)
642 int i;
643 #endif
644
645 /*
646 * check for available buffers
647 */
648 if (l_pre_u32 == l_tdt_u32) {
649 return 0;
650 }
651
652 /*
653 * get a pointer to the next tx descriptor for ease of use
654 */
655 tx = &m_e1k.m_tx_ring_pst[l_tdt_u32];
656
657 /*
658 * copy the data
659 */
660 memcpy(dma2virt(bswap_64(tx->m_buffer_u64)), (uint8_t *) f_buffer_pc,
661 (size_t) f_len_i);
662
663 /*
664 * insert length & command flags
665 */
666 tx->m_len_u16 = bswap_16((uint16_t) f_len_i);
667 tx->m_cmd_u08 = (BIT08(0) | // EOP
668 BIT08(1)); // IFCS
669 tx->m_sta_u08 = 0;
670 mb();
671
672 /*
673 * update tail index
674 */
675 l_tdt_u32 = (l_tdt_u32 + 1) & (E1K_NUM_TX_DESC - 1);
676 e1k_wr32(TDT, l_tdt_u32);
677
678 #ifdef E1K_DEBUG
679 #if defined(E1K_SHOW_XMIT) || defined(E1K_SHOW_XMIT_DATA)
680 printf("e1k: %d bytes transmitted\n", bswap_16(tx->m_len_u16));
681 #endif
682
683 #ifdef E1K_SHOW_XMIT_DATA
684 for (i = 0; i < bswap_16(tx->m_len_u16); i++) {
685
686 if ((i & 0x1f) == 0) {
687 printf("\n ");
688 }
689
690 f_buffer_pc = dma2virt(bswap_64(tx->m_buffer_u64));
691 printf("%02X ", f_buffer_pc[i]);
692 }
693
694 printf("\n\n");
695 #endif
696 #endif
697
698 return f_len_i;
699 }
700
701 int
check_driver(uint16_t vendor_id,uint16_t device_id)702 check_driver(uint16_t vendor_id, uint16_t device_id)
703 {
704 uint64_t i;
705
706 /*
707 * checks whether the driver is handling this device
708 * by verifying vendor & device id
709 * vendor id 0x8086 == Intel
710 */
711 if (vendor_id != 0x8086) {
712 #ifdef E1K_DEBUG
713 printf("e1k: netdevice with vendor id %04X not supported\n",
714 vendor_id);
715 #endif
716 return -1;
717 }
718
719 for (i = 0; e1k_dev[i].m_dev_u32 != 0; i++) {
720 if (e1k_dev[i].m_dev_u32 == (uint32_t) device_id) {
721 break;
722 }
723 }
724
725 if (e1k_dev[i].m_dev_u32 == 0) {
726 #ifdef E1K_DEBUG
727 printf("e1k: netdevice with device id %04X not supported\n",
728 device_id);
729 #endif
730 return -1;
731 }
732
733 /*
734 * initialize static variables
735 */
736 m_e1k.m_device_u64 = e1k_dev[i].m_devmsk_u64;
737 m_e1k.m_baseaddr_u64 = 0;
738
739 // success
740 #ifdef E1K_DEBUG
741 printf("e1k: found device %s\n", e1k_dev[i].m_name);
742 #endif
743
744 return 0;
745 }
746
747 static int
e1k_init(net_driver_t * driver)748 e1k_init(net_driver_t *driver)
749 {
750 uint32_t i;
751 uint32_t v;
752
753 if (!driver)
754 return -1;
755
756 #ifdef E1K_DEBUG
757 printf("\ne1k: initializing\n");
758 #endif
759
760 dma_offset = SLOF_dma_map_in(&m_e1k, sizeof(m_e1k), 0);
761 #ifdef E1K_DEBUG
762 printf("e1k: dma offset: %lx - %lx = %lx\n", dma_offset, (long)&m_e1k,
763 dma_offset - (long)&m_e1k);
764 #endif
765 dma_offset = dma_offset - (long)&m_e1k;
766
767 /*
768 * setup register & memory base addresses of NIC
769 */
770 //m_e1k.m_baseaddr_u64 = baseaddr;
771 #ifdef E1K_DEBUG
772 printf("e1k: base address register = 0x%llx\n", m_e1k.m_baseaddr_u64);
773 #endif
774
775 /*
776 * e1k hardware initialization
777 */
778
779 /*
780 * at first disable all interrupts
781 */
782 e1k_wr32(IMC, (uint32_t) ~0);
783
784 /*
785 * check for link up
786 */
787 #ifdef E1K_DEBUG
788 printf("e1k: checking link status..\n");
789 #endif
790
791 i = 50;
792 v = e1k_rd32(STATUS);
793 while ((--i) &&
794 ((v & BIT32(1)) == 0)) {
795 SLOF_msleep(100);
796 v = e1k_rd32(STATUS);
797 }
798
799 if ((v & BIT32(1)) == 0) {
800 #ifdef E1K_DEBUG
801 printf("e1k: link is down.\n");
802 printf(" terminating.\n");
803 #endif
804
805 return -1;
806 }
807
808 #ifdef E1K_DEBUG
809 printf("e1k: link is up\n");
810
811 switch ((v >> 6) & 0x3) {
812 case 0: {
813 printf(" 10 Mb/s\n");
814 } break;
815 case 1: {
816 printf(" 100 Mb/s\n");
817 } break;
818 case 2:
819 case 3: {
820 printf(" 1000 Mb/s\n");
821 } break;
822 }
823
824 if ((v & BIT32(0)) == 0) {
825 printf(" half-duplex\n");
826 } else {
827 printf(" full-duplex\n");
828 }
829 #endif
830
831 /*
832 * initialize mac address
833 */
834 #ifdef E1K_DEBUG
835 printf("e1k: initializing mac address.. ");
836 #endif
837 if (e1k_mac_init((uint8_t *)driver->mac_addr) != 0) {
838 #ifdef E1K_DEBUG
839 printf("failed.\n");
840 printf(" terminating.\n");
841 #endif
842
843 return -1;
844 }
845
846 #ifdef E1K_DEBUG
847 printf("done.\n");
848 printf(" mac address = %02X:%02X:%02X:%02X:%02X:%02X\n",
849 driver->mac_addr[0], driver->mac_addr[1], driver->mac_addr[2],
850 driver->mac_addr[3], driver->mac_addr[4], driver->mac_addr[5]);
851 #endif
852
853 /*
854 * initialize transmitter
855 */
856 #ifdef E1K_DEBUG
857 printf("e1k: initializing transmitter.. ");
858 #endif
859 e1k_init_transmitter();
860 #ifdef E1K_DEBUG
861 printf("done.\n");
862 #endif
863
864 /*
865 * initialize receiver
866 */
867 #ifdef E1K_DEBUG
868 printf("e1k: initializing receiver.. ");
869 #endif
870 e1k_init_receiver();
871 #ifdef E1K_DEBUG
872 printf("done.\n");
873 printf("e1k: initialization complete\n");
874 #endif
875
876 driver->running = 1;
877
878 return 0;
879 }
880
881 static int
e1k_reset(void)882 e1k_reset(void)
883 {
884 /*
885 * reset the PHY
886 */
887 e1k_setb32(CTRL, BIT32(31));
888 SLOF_msleep(10);
889
890 /*
891 * reset the MAC
892 */
893 e1k_setb32(CTRL, BIT32(26));
894 SLOF_msleep(10);
895
896 return 0;
897 }
898
899 static int
e1k_term(void)900 e1k_term(void)
901 {
902 #ifdef E1K_DEBUG
903 printf("e1k: shutdown.. ");
904 #endif
905
906 /*
907 * disable receiver & transmitter
908 */
909 e1k_wr32(RCTL, 0);
910 e1k_wr32(TCTL, 0);
911 SLOF_msleep(10);
912
913 /*
914 * reset the ring indices
915 */
916 e1k_wr32(RDH, 0);
917 e1k_wr32(RDT, 0);
918 e1k_wr32(TDH, 0);
919 e1k_wr32(TDT, 0);
920
921 /*
922 * disable receive address
923 */
924 e1k_clrb32(RAH0, BIT32(31));
925
926 /*
927 * reset the mac/phy
928 */
929 e1k_reset();
930
931 /*
932 * Disable DMA translation
933 */
934 SLOF_dma_map_out((long)virt2dma(&m_e1k), (void *)&m_e1k, (long)sizeof(m_e1k));
935
936 #ifdef E1K_DEBUG
937 printf("done.\n");
938 #endif
939
940 return 0;
941 }
942
e1k_open(uint64_t baseaddr)943 net_driver_t *e1k_open(uint64_t baseaddr)
944 {
945 net_driver_t *driver;
946
947 m_e1k.m_baseaddr_u64 = baseaddr;
948 driver = SLOF_alloc_mem(sizeof(*driver));
949 if (!driver) {
950 printf("Unable to allocate virtio-net driver\n");
951 return NULL;
952 }
953 memset(driver, 0, sizeof(*driver));
954
955 if (e1k_init(driver))
956 goto FAIL;
957
958 return driver;
959
960 FAIL: SLOF_free_mem(driver, sizeof(*driver));
961 return NULL;
962
963 return 0;
964 }
965
e1k_close(net_driver_t * driver)966 void e1k_close(net_driver_t *driver)
967 {
968 if (driver->running == 0)
969 return;
970
971 e1k_term();
972 driver->running = 0;
973 SLOF_free_mem(driver, sizeof(*driver));
974 }
975
e1k_read(char * buf,int len)976 int e1k_read(char *buf, int len)
977 {
978 if (buf)
979 return e1k_receive(buf, len);
980 return -1;
981 }
982
e1k_write(char * buf,int len)983 int e1k_write(char *buf, int len)
984 {
985 if (buf)
986 return e1k_xmit(buf, len);
987 return -1;
988 }
989
e1k_mac_setup(uint16_t vendor_id,uint16_t device_id,uint64_t baseaddr,char * mac_addr)990 int e1k_mac_setup(uint16_t vendor_id, uint16_t device_id,
991 uint64_t baseaddr, char *mac_addr)
992 {
993 if (check_driver(vendor_id, device_id))
994 return -1;
995
996 m_e1k.m_baseaddr_u64 = baseaddr;
997 memset(mac_addr, 0, 6);
998
999 return e1k_mac_init((uint8_t *)mac_addr);
1000 }
1001