1.. _OPAL_PCI_GET_PHB_DIAG_DATA2: 2 3OPAL_PCI_GET_PHB_DIAG_DATA2 4=========================== 5 6.. code-block:: c 7 8 #define OPAL_PCI_GET_PHB_DIAG_DATA2 64 9 10 /** 11 * This structure defines the overlay which will be used to store PHB error 12 * data upon request. 13 */ 14 enum { 15 OPAL_PHB_ERROR_DATA_VERSION_1 = 1, 16 }; 17 18 enum { 19 OPAL_PHB_ERROR_DATA_TYPE_P7IOC = 1, 20 OPAL_PHB_ERROR_DATA_TYPE_PHB3 = 2, 21 OPAL_PHB_ERROR_DATA_TYPE_PHB4 = 3 22 }; 23 24 enum { 25 OPAL_P7IOC_NUM_PEST_REGS = 128, 26 OPAL_PHB3_NUM_PEST_REGS = 256, 27 OPAL_PHB4_NUM_PEST_REGS = 512 28 }; 29 30 struct OpalIoPhbErrorCommon { 31 __be32 version; 32 __be32 ioType; 33 __be32 len; 34 }; 35 36 struct OpalIoP7IOCPhbErrorData { 37 struct OpalIoPhbErrorCommon common; 38 39 __be32 brdgCtl; 40 41 // P7IOC utl regs 42 __be32 portStatusReg; 43 __be32 rootCmplxStatus; 44 __be32 busAgentStatus; 45 46 // P7IOC cfg regs 47 __be32 deviceStatus; 48 __be32 slotStatus; 49 __be32 linkStatus; 50 __be32 devCmdStatus; 51 __be32 devSecStatus; 52 53 // cfg AER regs 54 __be32 rootErrorStatus; 55 __be32 uncorrErrorStatus; 56 __be32 corrErrorStatus; 57 __be32 tlpHdr1; 58 __be32 tlpHdr2; 59 __be32 tlpHdr3; 60 __be32 tlpHdr4; 61 __be32 sourceId; 62 63 __be32 rsv3; 64 65 // Record data about the call to allocate a buffer. 66 __be64 errorClass; 67 __be64 correlator; 68 69 //P7IOC MMIO Error Regs 70 __be64 p7iocPlssr; // n120 71 __be64 p7iocCsr; // n110 72 __be64 lemFir; // nC00 73 __be64 lemErrorMask; // nC18 74 __be64 lemWOF; // nC40 75 __be64 phbErrorStatus; // nC80 76 __be64 phbFirstErrorStatus; // nC88 77 __be64 phbErrorLog0; // nCC0 78 __be64 phbErrorLog1; // nCC8 79 __be64 mmioErrorStatus; // nD00 80 __be64 mmioFirstErrorStatus; // nD08 81 __be64 mmioErrorLog0; // nD40 82 __be64 mmioErrorLog1; // nD48 83 __be64 dma0ErrorStatus; // nD80 84 __be64 dma0FirstErrorStatus; // nD88 85 __be64 dma0ErrorLog0; // nDC0 86 __be64 dma0ErrorLog1; // nDC8 87 __be64 dma1ErrorStatus; // nE00 88 __be64 dma1FirstErrorStatus; // nE08 89 __be64 dma1ErrorLog0; // nE40 90 __be64 dma1ErrorLog1; // nE48 91 __be64 pestA[OPAL_P7IOC_NUM_PEST_REGS]; 92 __be64 pestB[OPAL_P7IOC_NUM_PEST_REGS]; 93 }; 94 95 struct OpalIoPhb3ErrorData { 96 struct OpalIoPhbErrorCommon common; 97 98 __be32 brdgCtl; 99 100 /* PHB3 UTL regs */ 101 __be32 portStatusReg; 102 __be32 rootCmplxStatus; 103 __be32 busAgentStatus; 104 105 /* PHB3 cfg regs */ 106 __be32 deviceStatus; 107 __be32 slotStatus; 108 __be32 linkStatus; 109 __be32 devCmdStatus; 110 __be32 devSecStatus; 111 112 /* cfg AER regs */ 113 __be32 rootErrorStatus; 114 __be32 uncorrErrorStatus; 115 __be32 corrErrorStatus; 116 __be32 tlpHdr1; 117 __be32 tlpHdr2; 118 __be32 tlpHdr3; 119 __be32 tlpHdr4; 120 __be32 sourceId; 121 122 __be32 rsv3; 123 124 /* Record data about the call to allocate a buffer */ 125 __be64 errorClass; 126 __be64 correlator; 127 128 /* PHB3 MMIO Error Regs */ 129 __be64 nFir; /* 000 */ 130 __be64 nFirMask; /* 003 */ 131 __be64 nFirWOF; /* 008 */ 132 __be64 phbPlssr; /* 120 */ 133 __be64 phbCsr; /* 110 */ 134 __be64 lemFir; /* C00 */ 135 __be64 lemErrorMask; /* C18 */ 136 __be64 lemWOF; /* C40 */ 137 __be64 phbErrorStatus; /* C80 */ 138 __be64 phbFirstErrorStatus; /* C88 */ 139 __be64 phbErrorLog0; /* CC0 */ 140 __be64 phbErrorLog1; /* CC8 */ 141 __be64 mmioErrorStatus; /* D00 */ 142 __be64 mmioFirstErrorStatus; /* D08 */ 143 __be64 mmioErrorLog0; /* D40 */ 144 __be64 mmioErrorLog1; /* D48 */ 145 __be64 dma0ErrorStatus; /* D80 */ 146 __be64 dma0FirstErrorStatus; /* D88 */ 147 __be64 dma0ErrorLog0; /* DC0 */ 148 __be64 dma0ErrorLog1; /* DC8 */ 149 __be64 dma1ErrorStatus; /* E00 */ 150 __be64 dma1FirstErrorStatus; /* E08 */ 151 __be64 dma1ErrorLog0; /* E40 */ 152 __be64 dma1ErrorLog1; /* E48 */ 153 __be64 pestA[OPAL_PHB3_NUM_PEST_REGS]; 154 __be64 pestB[OPAL_PHB3_NUM_PEST_REGS]; 155 }; 156 157 struct OpalIoPhb4ErrorData { 158 struct OpalIoPhbErrorCommon common; 159 160 __be32 brdgCtl; 161 162 /* XXX missing UTL registers? */ 163 164 /* PHB4 cfg regs */ 165 __be32 deviceStatus; 166 __be32 slotStatus; 167 __be32 linkStatus; 168 __be32 devCmdStatus; 169 __be32 devSecStatus; 170 171 /* cfg AER regs */ 172 __be32 rootErrorStatus; 173 __be32 uncorrErrorStatus; 174 __be32 corrErrorStatus; 175 __be32 tlpHdr1; 176 __be32 tlpHdr2; 177 __be32 tlpHdr3; 178 __be32 tlpHdr4; 179 __be32 sourceId; 180 181 /* PHB4 ETU Error Regs */ 182 __be64 nFir; /* 000 */ 183 __be64 nFirMask; /* 003 */ 184 __be64 nFirWOF; /* 008 */ 185 __be64 phbPlssr; /* 120 */ 186 __be64 phbCsr; /* 110 */ 187 __be64 lemFir; /* C00 */ 188 __be64 lemErrorMask; /* C18 */ 189 __be64 lemWOF; /* C40 */ 190 __be64 phbErrorStatus; /* C80 */ 191 __be64 phbFirstErrorStatus; /* C88 */ 192 __be64 phbErrorLog0; /* CC0 */ 193 __be64 phbErrorLog1; /* CC8 */ 194 __be64 phbTxeErrorStatus; /* D00 */ 195 __be64 phbTxeFirstErrorStatus; /* D08 */ 196 __be64 phbTxeErrorLog0; /* D40 */ 197 __be64 phbTxeErrorLog1; /* D48 */ 198 __be64 phbRxeArbErrorStatus; /* D80 */ 199 __be64 phbRxeArbFirstErrorStatus; /* D88 */ 200 __be64 phbRxeArbErrorLog0; /* DC0 */ 201 __be64 phbRxeArbErrorLog1; /* DC8 */ 202 __be64 phbRxeMrgErrorStatus; /* E00 */ 203 __be64 phbRxeMrgFirstErrorStatus; /* E08 */ 204 __be64 phbRxeMrgErrorLog0; /* E40 */ 205 __be64 phbRxeMrgErrorLog1; /* E48 */ 206 __be64 phbRxeTceErrorStatus; /* E80 */ 207 __be64 phbRxeTceFirstErrorStatus; /* E88 */ 208 __be64 phbRxeTceErrorLog0; /* EC0 */ 209 __be64 phbRxeTceErrorLog1; /* EC8 */ 210 211 /* PHB4 REGB Error Regs */ 212 __be64 phbPblErrorStatus; /* 1900 */ 213 __be64 phbPblFirstErrorStatus; /* 1908 */ 214 __be64 phbPblErrorLog0; /* 1940 */ 215 __be64 phbPblErrorLog1; /* 1948 */ 216 __be64 phbPcieDlpErrorLog1; /* 1AA0 */ 217 __be64 phbPcieDlpErrorLog2; /* 1AA8 */ 218 __be64 phbPcieDlpErrorStatus; /* 1AB0 */ 219 __be64 phbRegbErrorStatus; /* 1C00 */ 220 __be64 phbRegbFirstErrorStatus; /* 1C08 */ 221 __be64 phbRegbErrorLog0; /* 1C40 */ 222 __be64 phbRegbErrorLog1; /* 1C48 */ 223 224 __be64 pestA[OPAL_PHB4_NUM_PEST_REGS]; 225 __be64 pestB[OPAL_PHB4_NUM_PEST_REGS]; 226 }; 227 228 int64_t opal_pci_get_phb_diag_data2(uint64_t phb_id, void *diag_buffer, uint64_t diag_buffer_len); 229 230Get PCI diagnostic data from a given PHB. Each PHB present in the device tree 231has a ``ibm,phb-diag-data-size`` property which is the size of the diagnostic 232data structure that can be returned. 233 234Each PHB generation has a different structure for diagnostic data, and the 235small common structure will allow the OS to work out what format the data 236is coming in. 237 238In future, it's possible that the format will change to be more flexible, and 239require less OS support. 240 241Parameters 242---------- 243``uint64_t phb_id`` 244 the ID of the PHB you want to retrieve data from 245 246``void *diag_buffer`` 247 an allocated buffer to store diag data in 248 249``uint64_t diag_buffer_len`` 250 size in bytes of the diag buffer 251 252Calling 253------- 254 255Retrieve the PHB's diagnostic data. The diagnostic data is stored in the 256buffer pointed by @diag_buffer. Different PHB versions will store different 257diagnostics, defined in include/opal-api.h as ``struct OpalIo<PHBVer>ErrorData``. 258 259:ref:`OPAL_PCI_GET_PHB_DIAG_DATA` is deprecated and 260:ref:`OPAL_PCI_GET_PHB_DIAG_DATA2` should be used instead. 261 262Return Codes 263------------ 264:ref:`OPAL_SUCCESS` 265 Diagnostic data has been retrieved and stored successfully 266:ref:`OPAL_PARAMETER` 267 The given buffer is too small to store the diagnostic data 268:ref:`OPAL_HARDWARE` 269 The PHB is in a broken state and its data cannot be retreived 270:ref:`OPAL_UNSUPPORTED` 271 Diagnostic data is not implemented for this PHB type 272