1 /* hp2100_cpu0.c: HP 1000 user microcode and unimplemented instruction set stubs
2 
3    Copyright (c) 2006-2010, J. David Bryan
4 
5    Permission is hereby granted, free of charge, to any person obtaining a
6    copy of this software and associated documentation files (the "Software"),
7    to deal in the Software without restriction, including without limitation
8    the rights to use, copy, modify, merge, publish, distribute, sublicense,
9    and/or sell copies of the Software, and to permit persons to whom the
10    Software is furnished to do so, subject to the following conditions:
11 
12    The above copyright notice and this permission notice shall be included in
13    all copies or substantial portions of the Software.
14 
15    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18    THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
19    IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20    CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
21 
22    Except as contained in this notice, the name of the author shall not be
23    used in advertising or otherwise to promote the sale, use or other dealings
24    in this Software without prior written authorization from the author.
25 
26    CPU0         User microcode and unimplemented firmware options
27 
28    04-Nov-10    JDB     Removed DS note regarding PIF card (is now implemented)
29    18-Sep-08    JDB     .FLUN and self-tests for VIS and SIGNAL are NOP if not present
30    11-Sep-08    JDB     Moved microcode function prototypes to hp2100_cpu1.h
31    05-Sep-08    JDB     Removed option-present tests (now in UIG dispatchers)
32                         Added "user microcode" dispatcher for unclaimed instructions
33    26-Feb-08    HV      Removed and implemented "cpu_vis" and "cpu_signal"
34    22-Nov-07    JDB     Removed and implemented "cpu_rte_ema"
35    12-Nov-07    JDB     Removed and implemented "cpu_rte_vma" and "cpu_rte_os"
36    01-Dec-06    JDB     Removed and implemented "cpu_sis".
37    26-Sep-06    JDB     Created
38 
39    Primary references:
40    - HP 1000 M/E/F-Series Computers Technical Reference Handbook
41         (5955-0282, Mar-1980)
42    - HP 1000 M/E/F-Series Computers Engineering and Reference Documentation
43         (92851-90001, Mar-1981)
44    - Macro/1000 Reference Manual (92059-90001, Dec-1992)
45 
46    Additional references are listed with the associated firmware
47    implementations, as are the HP option model numbers pertaining to the
48    applicable CPUs.
49 
50 
51    This file contains template simulations for the firmware options that have
52    not yet been implemented.  When a given firmware option is implemented, it
53    should be moved out of this file and into another (or its own, depending on
54    complexity).
55 
56    It also contains a user-microprogram dispatcher to allow simulation of
57    site-specific firmware.  All UIG instructions unclaimed by installed firmware
58    options are directed here and may be simulated by writing the appropriate
59    code.
60 */
61 
62 
63 #include "hp2100_defs.h"
64 #include "hp2100_cpu.h"
65 #include "hp2100_cpu1.h"
66 
67 
68 /* Distributed System.
69 
70    Distributed System firmware was provided with the HP 91740A DS/1000 product
71    for use with the HP 12771A (12665A) Serial Interface and 12773A Modem
72    Interface system interconnection kits.  Firmware permitted high-speed
73    transfers with minimum impact to the processor.  The advent of the
74    "intelligent" 12794A and 12825A HDLC cards, the 12793A and 12834A Bisync
75    cards, and the 91750A DS-1000/IV software obviated the need for CPU firmware,
76    as essentially the firmware was moved onto the I/O cards.
77 
78    Primary documentation for the DS instructions has not been located.  However,
79    examination of the DS/1000 sources reveals that two instruction were used by
80    the DVA65 Serial Interface driver (91740-18071) and placed in the trap cells
81    of the communications interfaces.  Presumably they handled interrupts from
82    the cards.
83 
84    Implementation of the DS instructions will also require simulation of the
85    12665A Hardwired Serial Data Interface Card.
86 
87    Option implementation by CPU was as follows:
88 
89       2114    2115    2116    2100   1000-M  1000-E  1000-F
90      ------  ------  ------  ------  ------  ------  ------
91       N/A     N/A     N/A     N/A    91740A  91740B  91740B
92 
93    The routines are mapped to instruction codes as follows:
94 
95      Instr.  1000-M  1000-E/F  Description
96      ------  ------  --------  ----------------------------------------------
97              105520   105300   "Open loop" (trap cell handler)
98              105521   105301   "Closed loop" (trap cell handler)
99              105522   105302   [unknown]
100      [test]  105524   105304   [self test]
101                --     105310   7974 boot loader ROM extension
102 
103    Notes:
104 
105      1. The E/F-Series opcodes were moved from 105340-357 to 105300-317 at
106         revision 1813.
107 
108      2. DS/1000 ROM data are available from Bitsavers.
109 
110    Additional references (documents unavailable):
111     - HP 91740A M-Series Distributed System (DS/1000) Firmware Installation
112                 Manual (91740-90007).
113     - HP 91740B Distributed System (DS/1000) Firmware Installation Manual
114                 (91740-90009).
115 */
116 
117 static const OP_PAT op_ds[16] = {
118   OP_N,    OP_N,      OP_N,    OP_N,                    /*  ---    ---    ---    ---  */
119   OP_N,    OP_N,      OP_N,    OP_N,                    /*  ---    ---    ---    ---  */
120   OP_N,    OP_N,      OP_N,    OP_N,                    /*  ---    ---    ---    ---  */
121   OP_N,    OP_N,      OP_N,    OP_N                     /*  ---    ---    ---    ---  */
122   };
123 
cpu_ds(uint32 IR,uint32 intrq)124 t_stat cpu_ds (uint32 IR, uint32 intrq)
125 {
126 t_stat reason = SCPE_OK;
127 OPS op;
128 uint32 entry;
129 
130 entry = IR & 017;                                       /* mask to entry point */
131 
132 if (op_ds[entry] != OP_N)
133     if ((reason = cpu_ops (op_ds[entry], op, intrq)))   /* get instruction operands */
134         return reason;
135 
136 switch (entry) {                                        /* decode IR<3:0> */
137 
138     default:                                            /* others undefined */
139         reason = stop_inst;
140     }
141 
142 return reason;
143 }
144 
145 
146 /* User firmware dispatcher.
147 
148    All UIG instructions unclaimed by installed firmware options are directed
149    here.  User- or site-specific firmware may be simulated by dispatching to the
150    appropriate simulator routine.  Unimplemented instructions should return
151    "stop_inst" to cause a simulator stop if enabled.
152 
153    Implementation notes:
154 
155     1. This routine may be passed any opcode in the ranges 101400-101737 and
156        105000-105737.  The 10x740-777 range is dedicated to the EIG instructions
157        and is unavailable for user microprograms.
158 
159     2. HP operating systems and subsystems depend on the following instructions
160        to execute as NOP and return success if the corresponding firmware is not
161        installed:
162 
163          105226  --  Fast FORTRAN Processor .FLUN instruction
164          105355  --  RTE-6/VM OS self-test instruction
165          105477  --  Vector Instruction Set self-test
166          105617  --  SIGNAL/1000 self-test
167 
168        These instructions are executed to determine firmware configuration
169        dynamically.  If you use any of these opcodes for your own use, be aware
170        that certain HP programs may fail.
171 
172     3. User microprograms occupied one or more firmware modules, each containing
173        16 potential instruction entry points.  A skeleton dispatcher for the 32
174        possible modules is implemented below, along with a sample module.
175 */
176 
cpu_user(uint32 IR,uint32 intrq)177 t_stat cpu_user (uint32 IR, uint32 intrq)
178 {
179 t_stat reason = SCPE_OK;
180 
181 if (UNIT_CPU_TYPE == UNIT_TYPE_211X)                    /* 2116/15/14 CPU? */
182     return stop_inst;                                   /* user microprograms not supported */
183 
184 switch (IR) {
185     case 0105226:                                       /* firmware detection: FFP .FLUN */
186     case 0105355:                                       /* firmware detection: RTE-6/VM OS self-test */
187     case 0105477:                                       /* firmware detection: VIS self-test */
188     case 0105617:                                       /* firmware detection: SIGNAL/1000 self-test */
189         return SCPE_OK;                                 /* execute as NOP */
190     }
191 
192 switch ((IR >> 4) & 037) {                              /* decode IR<8:4> */
193 
194 /*  case 000:                                           /* 105000-105017 */
195 /*      return cpu_user_00 (IR, intrq);                 /* uncomment to handle instruction */
196 
197 /*  case 001:                                           /* 105020-105037 */
198 /*      return cpu_user_01 (IR, intrq);                 /* uncomment to handle instruction */
199 
200 /*  case 0nn:                                           /* other cases as needed */
201 /*      return cpu_user_nn (IR, intrq);                 /* uncomment to handle instruction */
202 
203     case 020:                                           /* 10x400-10x417 */
204         return cpu_user_20 (IR, intrq);                 /* call sample dispatcher */
205 
206 /*  case 021:                                           /* 10x420-10x437 */
207 /*      return cpu_user_21 (IR, intrq);                 /* uncomment to handle instruction */
208 
209 /*  case 0nn:                                           /* other cases as needed */
210 /*      return cpu_user_nn (IR, intrq);                 /* uncomment to handle instruction */
211 
212     default:                                            /* others undefined */
213         reason = stop_inst;
214     }
215 
216 return reason;
217 }
218 
219 
220 /* Example user microprogram simulator.
221 
222    User- or site-specific firmware may be simulated by writing the appropriate
223    code below.  Unimplemented instructions should return "stop_inst" to cause a
224    simulator stop if enabled.
225 
226    For information on the operand patterns used in the "op_user" array, see the
227    comments preceding the "cpu_ops" routine in "hp2100_cpu1.c" and the "operand
228    processing encoding" constants in "hp2100_cpu1.h".
229 */
230 
231 static const OP_PAT op_user_20[16] = {
232   OP_N,    OP_N,      OP_N,    OP_N,                    /*  ---    ---    ---    ---  */
233   OP_N,    OP_N,      OP_N,    OP_N,                    /*  ---    ---    ---    ---  */
234   OP_N,    OP_N,      OP_N,    OP_N,                    /*  ---    ---    ---    ---  */
235   OP_N,    OP_N,      OP_N,    OP_N                     /*  ---    ---    ---    ---  */
236   };
237 
cpu_user_20(uint32 IR,uint32 intrq)238 t_stat cpu_user_20 (uint32 IR, uint32 intrq)
239 {
240 t_stat reason = SCPE_OK;
241 OPS op;
242 uint32 entry;
243 
244 entry = IR & 017;                                       /* mask to entry point */
245 
246 if (op_user_20 [entry] != OP_N)
247     if ((reason = cpu_ops (op_user_20 [entry], op, intrq))) /* get instruction operands */
248         return reason;
249 
250 switch (entry) {                                        /* decode IR<4:0> */
251 
252     case 000:                                           /* 10x400 */
253 /*      break;                                          /* uncomment to handle instruction */
254 
255     case 001:                                           /* 10x401 */
256 /*      break;                                          /* uncomment to handle instruction */
257 
258 /*  case 0nn:                                           /* other cases as needed */
259 /*      break;                                          /* uncomment to handle instruction */
260 
261     default:                                            /* others undefined */
262         reason = stop_inst;
263     }
264 
265 return reason;
266 }
267