1 /* i7094_sys.c: IBM 7094 simulator interface
2
3 Copyright (c) 2003-2011, Robert M Supnik
4
5 Permission is hereby granted, free of charge, to any person obtaining a
6 copy of this software and associated documentation files (the "Software"),
7 to deal in the Software without restriction, including without limitation
8 the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 and/or sell copies of the Software, and to permit persons to whom the
10 Software is furnished to do so, subject to the following conditions:
11
12 The above copyright notice and this permission notice shall be included in
13 all copies or substantial portions of the Software.
14
15 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
19 IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20 CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
21
22 Except as contained in this notice, the name of Robert M Supnik shall not be
23 used in advertising or otherwise to promote the sale, use or other dealings
24 in this Software without prior written authorization from Robert M Supnik.
25
26 31-Dec-11 RMS Added SPI, SPI
27 16-Jul-10 RMS Added SPUx, SPTx, SPRx
28 29-Oct-06 RMS Added additional expanded core instructions
29 08-Jun-06 RMS Added Dave Pitts' binary loader
30 */
31
32 #include "i7094_defs.h"
33 #include <ctype.h>
34 #include "i7094_dat.h"
35
36 extern DEVICE cpu_dev;
37 extern DEVICE ch_dev[NUM_CHAN];
38 extern DEVICE mt_dev[NUM_CHAN];
39 extern DEVICE drm_dev;
40 extern DEVICE dsk_dev;
41 extern DEVICE com_dev, coml_dev;
42 extern DEVICE cdr_dev, cdp_dev;
43 extern DEVICE lpt_dev;
44 extern DEVICE clk_dev;
45 extern UNIT cpu_unit;
46 extern REG cpu_reg[];
47
48 uint32 cvt_code_to_ascii (uint32 c, int32 sw);
49 uint32 cvt_ascii_to_code (uint32 c, int32 sw);
50
51 /* SCP data structures and interface routines
52
53 sim_name simulator name string
54 sim_PC pointer to saved PC register descriptor
55 sim_emax number of words for examine
56 sim_devices array of pointers to simulated devices
57 sim_stop_messages array of pointers to stop messages
58 sim_load binary loader
59 */
60
61 char sim_name[] = "IBM 7094";
62
63 REG *sim_PC = &cpu_reg[0];
64
65 int32 sim_emax = 1;
66
67 DEVICE *sim_devices[] = {
68 &cpu_dev,
69 &clk_dev,
70 &ch_dev[0],
71 &ch_dev[1],
72 &ch_dev[2],
73 &ch_dev[3],
74 &ch_dev[4],
75 &ch_dev[5],
76 &ch_dev[6],
77 &ch_dev[7],
78 &mt_dev[0],
79 &mt_dev[1],
80 &mt_dev[2],
81 &mt_dev[3],
82 &mt_dev[4],
83 &mt_dev[5],
84 &mt_dev[6],
85 &mt_dev[7],
86 &cdr_dev,
87 &cdp_dev,
88 &lpt_dev,
89 &dsk_dev,
90 &drm_dev,
91 &com_dev,
92 &coml_dev,
93 NULL
94 };
95
96 char ch_bkpt_msg[] = "Channel A breakpoint, CLC: xxxxxx";
97
98 const char *sim_stop_messages[] = {
99 "Unknown error",
100 "HALT instruction",
101 "Breakpoint",
102 "Undefined instruction",
103 "Divide check",
104 "Nested XEC limit exceeded",
105 "Address stop",
106 "Non-existent channel",
107 "Illegal instruction for 7909 channel",
108 "Illegal instruction for non-7909 channel",
109 "Non-existent device",
110 "Undefined channel instruction",
111 "Write to protected device",
112 "Illegal instruction for device",
113 "Invalid 7631 track format",
114 "7750 buffer pool empty on input",
115 "7750 buffer pool empty on output",
116 "7750 invalid line number",
117 "7750 invalid message",
118 ch_bkpt_msg
119 };
120
121 /* Modify channel breakpoint message */
122
ch_bkpt(uint32 ch,uint32 clc)123 t_stat ch_bkpt (uint32 ch, uint32 clc)
124 {
125 ch_bkpt_msg[8] = 'A' + ch;
126 sprintf (&ch_bkpt_msg[27], "%06o", clc);
127 return STOP_CHBKPT;
128 }
129
130 /* Binary loader, not implemented */
131
sim_load(FILE * fileref,char * cptr,char * fnam,int flag)132 t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag)
133 {
134 extern t_stat binloader (FILE *fd, char *file, int loadpt);
135
136 if (flag == 0)
137 return binloader (fileref, cptr, 0);
138 return SCPE_NOFNC;
139 }
140
141 /* Symbol tables */
142
143 #define I_V_FL 39 /* inst class */
144 #define I_M_FL 017 /* class mask */
145 #define I_NOP 0000000000000000 /* no operand */
146 #define I_MXR 0010000000000000 /* addr(tag) */
147 #define I_MXN 0020000000000000 /* *addr(tag) */
148 #define I_MXV 0030000000000000 /* var mul/div */
149 #define I_MXC 0040000000000000 /* convert */
150 #define I_DNP 0050000000000000 /* decr, no oper */
151 #define I_DEC 0060000000000000 /* decrement */
152 #define I_SNS 0070000000000000 /* sense */
153 #define I_IMM 0100000000000000 /* 18b immediate */
154 #define I_TAG 0110000000000000 /* tag only */
155 #define I_IOX 0120000000000000 /* IO channel */
156 #define I_TCH 0130000000000000 /* transfer channel */
157 #define I_I9N 0140000000000000 /* 7909 with nostore */
158 #define I_I9S 0150000000000000 /* 7909 */
159 #define I_SPX 0160000000000000 /* SPU, SPR */
160 #define IFAKE_7607 0001000000000000 /* fake op extensions */
161 #define IFAKE_7909 0002000000000000
162 #define DFAKE (DMASK|IFAKE_7607|IFAKE_7909)
163 #define I_N_NOP 000
164 #define I_N_MXR 001
165 #define I_N_MXN 002
166 #define I_N_MXV 003
167 #define I_N_MXC 004
168 #define I_N_DNP 005
169 #define I_N_DEC 006
170 #define I_N_SNS 007
171 #define I_N_IMM 010
172 #define I_N_TAG 011
173 #define I_N_IOX 012
174 #define I_N_TCH 013
175 #define I_N_I9N 014
176 #define I_N_I9S 015
177 #define I_N_SPX 016
178
179 #define INST_P_XIT 0 /* exit */
180 #define INST_P_SKP 1 /* do not print */
181 #define INST_P_PRA 2 /* print always */
182 #define INST_P_PNZ 3 /* print if nz */
183 #define INST_P_PNT 4 /* print if nz, term */
184
185 static const t_uint64 masks[15] = {
186 03777700000000, 03777700000000,
187 03777700000000, 03777700000000,
188 03777400000000, 03700000000000,
189 03700000000000, 03777700077777,
190 03777700000000, 03777700000000,
191 03700000200000, 03700000200000,
192 03760000200000, 03740000200000,
193 03777700077760 };
194
195 static const uint32 fld_max[15][3] = { /* addr,tag,decr limit */
196 { INST_M_ADDR, INST_M_TAG, 0 },
197 { INST_M_ADDR, INST_M_TAG, 0 },
198 { INST_M_ADDR, INST_M_TAG, 0 },
199 { INST_M_ADDR, INST_M_TAG, INST_M_VCNT },
200 { INST_M_ADDR, INST_M_TAG, INST_M_CCNT },
201 { INST_M_ADDR, INST_M_TAG, INST_M_DEC },
202 { INST_M_ADDR, INST_M_TAG, INST_M_DEC },
203 { 0, INST_M_TAG, 0 },
204 { RMASK, 0, 0 },
205 { INST_M_ADDR, INST_M_TAG, 0 },
206 { INST_M_ADDR, 1, INST_M_DEC },
207 { INST_M_ADDR, 1, 0 },
208 { INST_M_ADDR, 1, 0 },
209 { INST_M_ADDR, 1, 0 },
210 { INST_M_4B, INST_M_TAG, 0 }
211 };
212
213 static const uint32 fld_fmt[15][3] = { /* addr,tag,decr print */
214 { INST_P_PNT, INST_P_PNT, INST_P_XIT }, /* nop: all optional */
215 { INST_P_PRA, INST_P_PNT, INST_P_XIT }, /* mxr: tag optional */
216 { INST_P_PRA, INST_P_PNT, INST_P_XIT }, /* mxn: tag optional */
217 { INST_P_PRA, INST_P_PNZ, INST_P_PRA }, /* mxv: tag optional */
218 { INST_P_PRA, INST_P_PNZ, INST_P_PRA }, /* cvt: tag optional */
219 { INST_P_PNT, INST_P_PNT, INST_P_PNT }, /* dnp: all optional */
220 { INST_P_PRA, INST_P_PRA, INST_P_PRA }, /* dec: print all */
221 { INST_P_SKP, INST_P_PNT, INST_P_XIT }, /* sns: skip addr, tag opt */
222 { INST_P_PRA, INST_P_XIT, INST_P_XIT }, /* immediate: addr only */
223 { INST_P_PNZ, INST_P_PRA, INST_P_XIT }, /* tag: addr optional */
224 { INST_P_PRA, INST_P_PNZ, INST_P_PRA }, /* iox: tag optional */
225 { INST_P_PRA, INST_P_PNT, INST_P_XIT }, /* tch: tag optional */
226 { INST_P_PRA, INST_P_PNT, INST_P_XIT }, /* i9n: tag optional */
227 { INST_P_PRA, INST_P_PNT, INST_P_XIT }, /* i9s: tag optional */
228 { INST_P_PNZ, INST_P_PNT, INST_P_XIT } /* SPx: tag optional */
229 };
230
231 static const t_uint64 ind_test[15] = {
232 0, 0, INST_IND, 0, 0, 0, 0, 0,
233 0, 0, CHI_IND, CHI_IND, CHI_IND, CHI_IND, 0
234 };
235
236 static const char *opcode[] = {
237 "TXI", "TIX", "TXH",
238 "STR", "TNX", "TXL",
239 "HTR", "TRA", "TTR",
240
241 "CLM", "LBT", "CHS",
242 "SSP", "ENK", "IOT",
243 "COM", "ETM", "RND",
244 "FRN", "DCT", "RCT",
245 "LMTM", "SLF", "SLN1",
246 "SLN2", "SLN3", "SLN4",
247 "SWT1", "SWT2", "SWT3",
248 "SWT4", "SWT5", "SWT6",
249 "BTTA", "BTTB", "BTTC",
250 "BTTD", "BTTE", "BTTF",
251 "BTTG", "BTTH",
252 "RICA", "RICB", "RICC",
253 "RICD", "RICE", "RICF",
254 "RICG", "RICH",
255 "RDCA", "RDCB", "RDCC",
256 "RDCD", "RDCE", "RDCF",
257 "RDCG", "RDCH",
258 "SPUA", "SPUB", "SPUC",
259 "SPUD", "SPUE", "SPUF",
260 "SPUG", "SPUH",
261 "SPTA", "SPTB", "SPTC",
262 "SPTD", "SPTE", "SPTF",
263 "SPTG", "SPTH",
264 "SPRA", "SPRB", "SPRC",
265 "SPRD", "SPRE", "SPRF",
266 "SPRG", "SPRH",
267
268 "TRCA", "TRCC",
269 "TRCE", "TRCG",
270 "TEFA", "TEFC",
271 "TEFE", "TEFG",
272 "TLQ", "IIA", "TIO",
273 "OAI", "PAI", "TIF",
274 "IIR", "RFT", "SIR",
275 "RNT", "RIR",
276 "TCOA", "TCOB", "TCOC",
277 "TCOD", "TCOE", "TCOF",
278 "TCOG", "TCOH", "TSX",
279 "TZE", "CVR", "TPL",
280 "XCA", "TOV",
281 "TQO", "TQP",
282 "MPY", "VLM", "VLM1",
283 "DVH", "DVP",
284 "VDH", "VDP",
285 "VDH2", "VDP2",
286 "FDH", "FDP",
287 "FMP", "DFMP",
288 "FAD", "DFAD",
289 "FSB", "DFSB",
290 "FAM", "DFAM",
291 "FSM", "DFSM",
292 "ANS", "ERA",
293 "CAS", "ACL",
294 "ADD", "ADM",
295 "SUB", "SBM",
296 "HPR", "IIS", "LDI",
297 "OSI", "DLD", "OFT",
298 "RIS", "ONT",
299 "CLA", "CLS",
300 "ZET", "XEC",
301 "LXA", "LAC",
302 "RCHA", "RCHC",
303 "RCHE", "RCHG",
304 "LCHA", "LCHC",
305 "LCHE", "LCHG",
306 "RSCA", "RSCC",
307 "RSCE", "RSCG",
308 "STCA", "STCC",
309 "STCE", "STCG",
310 "LDQ", "ENB",
311 "STZ", "STO", "SLW",
312 "STI", "STA", "STD",
313 "STT", "STP",
314 "SXA", "SCA",
315 "SCHA", "SCHC",
316 "SCHE", "SCHG",
317 "SCDA", "SCDC",
318 "SCDE", "SCDG",
319 "PAX", "PAC",
320 "PXA", "PCA",
321 "PSE", "NOP", "RDS",
322 "LLS", "BSR", "LRS",
323 "WRS", "ALS", "WEF",
324 "ARS", "REW", "AXT",
325 "SDN",
326
327 "CLM", "PBT", "EFTM",
328 "SSM", "LFTM", "ESTM",
329 "ECTM", "LTM", "LSNM",
330 "EMTM", "SLT1", "SLT2",
331 "SLT3", "SLT4",
332 "ETTA", "ETTB", "ETTC",
333 "ETTD", "ETTE", "ETTF",
334 "ETTG", "ETTH",
335
336 "ESNT",
337 "TRCB", "TRCD",
338 "TRCF", "TRCH",
339 "TEFB", "TEFD",
340 "TEFF", "TEFH",
341 "RIA", "PIA",
342 "IIL", "LFT", "SIL",
343 "LNT", "RIL",
344 "TCNA", "TCNB", "TCNC",
345 "TCND", "TCNE", "TCNF",
346 "TCNG", "TCNH",
347 "TNZ", "CVR", "TMI",
348 "XCL", "TNO", "CRQ",
349 "MPR", "DFDH", "DFDP",
350 "UFM", "DUFM",
351 "UFA", "DUFA",
352 "UFS", "DUFS",
353 "UAM", "DUAM",
354 "USM", "DUSM",
355 "ANA", "LAS",
356 "CAL", "ORA", "NZT",
357 "LXD", "LXC",
358 "RCHB", "RCHD",
359 "RCHF", "RCHH",
360 "LCHB", "LCHD",
361 "LCHF", "LCHH",
362 "RSCB", "RSCD",
363 "RSCF", "RSCH",
364 "STCB", "STCD",
365 "STCF", "STCH",
366 "STQ", "SRI", "ORS", "DST",
367 "SPI",
368 "SLQ", "STL",
369 "SXD", "SCD",
370 "SCHB", "SCHD",
371 "SCHF", "SCHH",
372 "SCDB", "SCDD",
373 "SCDF", "SCDH",
374 "PDX", "PDC",
375 "PXD", "PCD",
376 "MSE", "LGL", "BSF",
377 "LGR", "RQL", "RUN",
378 "AXC",
379
380 "TIA", "TIB",
381 "LRI", "LPI",
382 "SEA", "SEB",
383 "IFT", "EFT",
384
385 "IOCD", "IOCDN", "TCH",
386 "IORP", "IORPN",
387 "IORT", "IORTN",
388 "IOCP", "IOCPN",
389 "IOCT", "IOCTN",
390 "IOSP", "IOSPN",
391 "IOST", "IOSTN",
392
393 "WTR", "XMT",
394 "TCH", "LIPT",
395 "CTL", "CTLN",
396 "CTLR", "CTLRN",
397 "CTLW", "CTLWN",
398 "SNS",
399 "LAR", "SAR", "TWT",
400 "CPYP",
401 "CPYD", "TCM",
402 "LIP", "TDC", "LCC",
403 "SMS", "ICC",
404
405 NULL
406 };
407
408 static const t_uint64 opc_v[] = {
409 0100000000000+I_DEC, 0200000000000+I_DEC, 0300000000000+I_DEC,
410 0500000000000+I_DNP, 0600000000000+I_DEC, 0700000000000+I_DEC,
411 0000000000000+I_MXN, 0002000000000+I_MXN, 0002100000000+I_MXN,
412
413 0076000000000+I_SNS, 0076000000001+I_SNS, 0076000000002+I_SNS,
414 0076000000003+I_SNS, 0076000000004+I_SNS, 0076000000005+I_SNS,
415 0076000000006+I_SNS, 0076000000007+I_SNS, 0076000000010+I_SNS,
416 0076000000011+I_SNS, 0076000000012+I_SNS, 0076000000014+I_SNS,
417 0076000000016+I_SNS, 0076000000140+I_SNS, 0076000000141+I_SNS,
418 0076000000142+I_SNS, 0076000000143+I_SNS, 0076000000144+I_SNS,
419 0076000000161+I_SNS, 0076000000162+I_SNS, 0076000000163+I_SNS,
420 0076000000164+I_SNS, 0076000000165+I_SNS, 0076000000166+I_SNS,
421 0076000001000+I_SNS, 0076000002000+I_SNS, 0076000003000+I_SNS,
422 0076000004000+I_SNS, 0076000005000+I_SNS, 0076000006000+I_SNS,
423 0076000007000+I_SNS, 0076000010000+I_SNS,
424 0076000001350+I_SNS, 0076000002350+I_SNS, 0076000003350+I_SNS,
425 0076000004350+I_SNS, 0076000005350+I_SNS, 0076000006350+I_SNS,
426 0076000007350+I_SNS, 0076000010350+I_SNS,
427 0076000001352+I_SNS, 0076000002352+I_SNS, 0076000003352+I_SNS,
428 0076000004352+I_SNS, 0076000005352+I_SNS, 0076000006352+I_SNS,
429 0076000007352+I_SNS, 0076000010352+I_SNS,
430 0076000001340+I_SNS, 0076000002340+I_SNS, 0076000003340+I_SNS,
431 0076000004340+I_SNS, 0076000005340+I_SNS, 0076000006340+I_SNS,
432 0076000007340+I_SNS, 0076000010340+I_SNS,
433 0076000001360+I_SNS, 0076000002360+I_SNS, 0076000003360+I_SNS,
434 0076000004360+I_SNS, 0076000005360+I_SNS, 0076000006360+I_SNS,
435 0076000007360+I_SNS, 0076000010360+I_SNS,
436 0076000001360+I_SNS, 0076000002360+I_SNS, 0076000003360+I_SNS,
437 0076000004360+I_SNS, 0076000005360+I_SNS, 0076000006360+I_SNS,
438 0076000007360+I_SNS, 0076000010360+I_SNS,
439
440 0002200000000+I_MXN, 0002400000000+I_MXN,
441 0002600000000+I_MXN, 0002700000000+I_MXN,
442 0003000000000+I_MXN, 0003100000000+I_MXN,
443 0003200000000+I_MXN, 0003300000000+I_MXN,
444 0004000000000+I_MXN, 0004100000000+I_NOP, 0004200000000+I_MXR,
445 0004300000000+I_NOP, 0004400000000+I_NOP, 0004600000000+I_MXR,
446 0005100000000+I_IMM, 0005400000000+I_IMM, 0005500000000+I_IMM,
447 0005600000000+I_IMM, 0005700000000+I_IMM,
448 0006000000000+I_MXN, 0006100000000+I_MXN, 0006200000000+I_MXN,
449 0006300000000+I_MXN, 0006400000000+I_MXN, 0006500000000+I_MXN,
450 0006600000000+I_MXN, 0006700000000+I_MXN, 0007400000000+I_MXR,
451 0010000000000+I_MXN, 0011400000000+I_MXC, 0012000000000+I_MXN,
452 0013100000000+I_NOP, 0014000000000+I_MXN,
453 0016100000000+I_MXN, 0016200000000+I_MXN,
454 0020000000000+I_MXN, 0020400000000+I_MXV, 0020500000000+I_MXV,
455 0022000000000+I_MXN, 0022100000000+I_MXN,
456 0022400000000+I_MXV, 0022500000000+I_MXV,
457 0022600000000+I_MXV, 0022700000000+I_MXV,
458 0024000000000+I_MXN, 0024100000000+I_MXN,
459 0026000000000+I_MXN, 0026100000000+I_MXN,
460 0030000000000+I_MXN, 0030100000000+I_MXN,
461 0030200000000+I_MXN, 0030300000000+I_MXN,
462 0030400000000+I_MXN, 0030500000000+I_MXN,
463 0030600000000+I_MXN, 0030700000000+I_MXN,
464 0032000000000+I_MXN, 0032200000000+I_MXN,
465 0034000000000+I_MXN, 0036100000000+I_MXN,
466 0040000000000+I_MXN, 0040100000000+I_MXN,
467 0040200000000+I_MXN, 0440000000000+I_MXN,
468 0042000000000+I_NOP, 0044000000000+I_MXN, 0044100000000+I_MXN,
469 0044200000000+I_MXN, 0044300000000+I_MXN, 0044400000000+I_MXN,
470 0044500000000+I_MXN, 0044600000000+I_MXN,
471 0050000000000+I_MXN, 0050200000000+I_MXN,
472 0052000000000+I_MXN, 0052200000000+I_MXN,
473 0053400000000+I_MXR, 0053500000000+I_MXR,
474 0054000000000+I_MXN, 0054100000000+I_MXN,
475 0054200000000+I_MXN, 0054300000000+I_MXN,
476 0054400000000+I_MXN, 0054500000000+I_MXN,
477 0054600000000+I_MXN, 0054700000000+I_MXN,
478 0054000000000+I_MXN, 0054100000000+I_MXN,
479 0054200000000+I_MXN, 0054300000000+I_MXN,
480 0054400000000+I_MXN, 0054500000000+I_MXN,
481 0054600000000+I_MXN, 0054700000000+I_MXN,
482 0056000000000+I_MXN, 0056400000000+I_MXN,
483 0060000000000+I_MXN, 0060100000000+I_MXN, 0060200000000+I_MXN,
484 0060400000000+I_MXN, 0062100000000+I_MXN, 0062200000000+I_MXN,
485 0062500000000+I_MXN, 0063000000000+I_MXN,
486 0063400000000+I_MXR, 0063600000000+I_MXR,
487 0064000000000+I_MXN, 0064000000000+I_MXN,
488 0064200000000+I_MXN, 0064300000000+I_MXN,
489 0064400000000+I_MXN, 0064500000000+I_MXN,
490 0064600000000+I_MXN, 0064700000000+I_MXN,
491 0073400000000+I_TAG, 0073700000000+I_TAG,
492 0075400000000+I_TAG, 0075600000000+I_TAG,
493 0076000000000+I_MXR, 0076100000000+I_NOP, 0076200000000+I_MXR,
494 0076300000000+I_MXR, 0076400000000+I_MXR, 0076500000000+I_MXR,
495 0076600000000+I_MXR, 0076700000000+I_MXR, 0077000000000+I_MXR,
496 0077100000000+I_MXR, 0077200000000+I_MXR, 0077400000000+I_MXR,
497 0077600000000+I_MXR,
498
499 0476000000000+I_SNS, 0476000000001+I_SNS, 0476000000002+I_SNS,
500 0476000000003+I_SNS, 0476000000004+I_SNS, 0476000000005+I_SNS,
501 0476000000006+I_SNS, 0476000000007+I_SNS, 0476000000010+I_SNS,
502 0476000000016+I_SNS, 0476000000141+I_SNS, 0476000000142+I_SNS,
503 0476000000143+I_SNS, 0476000000144+I_SNS,
504 0476000001000+I_SNS, 0476000002000+I_SNS, 0476000003000+I_SNS,
505 0476000004000+I_SNS, 0476000005000+I_SNS, 0476000006000+I_SNS,
506 0476000007000+I_SNS, 0476000010000+I_SNS,
507
508 0402100000000+I_MXN,
509 0402200000000+I_MXN, 0402400000000+I_MXN,
510 0402600000000+I_MXN, 0402700000000+I_MXN,
511 0403000000000+I_MXN, 0403100000000+I_MXN,
512 0403200000000+I_MXN, 0403300000000+I_MXN,
513 0404200000000+I_NOP, 0404600000000+I_NOP,
514 0405100000000+I_IMM, 0405400000000+I_IMM, 0405500000000+I_IMM,
515 0405600000000+I_IMM, 0405700000000+I_IMM,
516 0406000000000+I_MXN, 0406100000000+I_MXN, 0406200000000+I_MXN,
517 0406300000000+I_MXN, 0406400000000+I_MXN, 0406500000000+I_MXN,
518 0406600000000+I_MXN, 0406700000000+I_MXN,
519 0410000000000+I_MXN, 0411400000000+I_MXC, 0412000000000+I_MXN,
520 0413000000000+I_NOP, 0414000000000+I_MXN, 0415400000000+I_MXC,
521 0420000000000+I_MXN, 0424000000000+I_MXN, 0424100000000+I_MXN,
522 0426000000000+I_MXN, 0426100000000+I_MXN,
523 0430000000000+I_MXN, 0430100000000+I_MXN,
524 0430200000000+I_MXN, 0430300000000+I_MXN,
525 0430400000000+I_MXN, 0430500000000+I_MXN,
526 0430600000000+I_MXN, 0430700000000+I_MXN,
527 0432000000000+I_MXN, 0434000000000+I_MXN,
528 0450000000000+I_MXN, 0450100000000+I_MXN, 0452000000000+I_MXN,
529 0453400000000+I_MXR, 0453500000000+I_MXR,
530 0454000000000+I_MXN, 0454100000000+I_MXN,
531 0454200000000+I_MXN, 0454300000000+I_MXN,
532 0454400000000+I_MXN, 0454500000000+I_MXN,
533 0454600000000+I_MXN, 0454700000000+I_MXN,
534 0454000000000+I_MXN, 0454100000000+I_MXN,
535 0454200000000+I_MXN, 0454300000000+I_MXN,
536 0454400000000+I_MXN, 0454500000000+I_MXN,
537 0454600000000+I_MXN, 0454700000000+I_MXN,
538 0460000000000+I_MXN, 0460100000000+I_MXN, 0460200000000+I_MXN, 0460300000000+I_MXN,
539 0460400000000+I_MXN,
540 0462000000000+I_MXN, 0462500000000+I_MXN,
541 0463400000000+I_MXR, 0463600000000+I_MXR,
542 0464000000000+I_MXN, 0464000000000+I_MXN,
543 0464200000000+I_MXN, 0464300000000+I_MXN,
544 0464400000000+I_MXN, 0464500000000+I_MXN,
545 0464600000000+I_MXN, 0464700000000+I_MXN,
546 0473400000000+I_TAG, 0473700000000+I_TAG,
547 0475400000000+I_TAG, 0475600000000+I_TAG,
548 0476000000000+I_MXR, 0476300000000+I_MXR, 0476400000000+I_MXR,
549 0476500000000+I_MXR, 0477300000000+I_MXR, 0477200000000+I_MXR,
550 0477400000000+I_MXR,
551
552 0010100000000+I_MXN, 0410100000000+I_MXN,
553 0056200000000+I_MXN, 0456400000000+I_MXN,
554 0476100000041+I_SNS, 0476100000042+I_SNS,
555 0476100000043+I_SNS, 0476100000044+I_SNS,
556
557 01000000000000+I_IOX, 01000000200000+I_IOX, 01100000000000+I_TCH,
558 01200000000000+I_IOX, 01200000200000+I_IOX,
559 01300000000000+I_IOX, 01300000200000+I_IOX,
560 01400000000000+I_IOX, 01400000200000+I_IOX,
561 01500000000000+I_IOX, 01500000200000+I_IOX,
562 01600000000000+I_IOX, 01600000200000+I_IOX,
563 01700000000000+I_IOX, 01700000200000+I_IOX,
564
565 02000000000000+I_TCH, 02000000200000+I_IOX,
566 02100000000000+I_TCH, 02100000200000+I_TCH,
567 02200000000000+I_I9N, 02220000000000+I_TCH,
568 02200000200000+I_I9N, 02220000200000+I_TCH,
569 02240000000000+I_I9N, 02260000000000+I_TCH,
570 02240000200000+I_I9N,
571 02300000000000+I_I9S, 02300000200000+I_I9S,
572 02340000000000+I_I9S,
573 02400000000000+I_IOX,
574 02500000000000+I_IOX, 02500000200000+I_IOX,
575 02600000200000+I_I9S, 02640000000000+I_I9S, 02640000200000+I_I9S,
576 02700000000000+I_I9S, 02700000200000+I_IOX,
577
578 0
579 };
580
581 /* Symbolic decode
582
583 Inputs:
584 *of = output stream
585 addr = current PC
586 *val = pointer to values
587 *uptr = pointer to unit
588 sw = switches
589 Outputs:
590 return = status code
591 */
592
fprint_sym(FILE * of,t_addr addr,t_value * val,UNIT * uptr,int32 sw)593 t_stat fprint_sym (FILE *of, t_addr addr, t_value *val,
594 UNIT *uptr, int32 sw)
595 {
596 uint32 i, j, k, l, fmt, c, fld[3];
597 DEVICE *dptr;
598 t_uint64 inst;
599
600 inst = val[0];
601 if (uptr == NULL)
602 uptr = &cpu_unit;
603 dptr = find_dev_from_unit (uptr);
604 if (dptr == NULL)
605 return SCPE_IERR;
606
607 if (sw & SWMASK ('C')) { /* character? */
608 c = (uint32) (inst & 077);
609 fprintf (of, "%c", cvt_code_to_ascii (c, sw));
610 return SCPE_OK;
611 }
612 if (sw & SWMASK ('S')) { /* string? */
613 for (i = 36; i > 0; i = i - 6) {
614 c = (uint32) ((inst >> (i - 6)) & 077);
615 fprintf (of, "%c", cvt_code_to_ascii (c, sw));
616 }
617 return SCPE_OK;
618 }
619 if (!(sw & (SWMASK ('M')|SWMASK ('I')|SWMASK ('N'))) || /* M, N or I? */
620 (dptr->dwidth != 36))
621 return SCPE_ARG;
622
623 /* Instruction decode */
624
625 fld[0] = ((uint32) inst & 0777777);
626 fld[1] = GET_TAG (inst); /* get 3 fields */
627 fld[2] = GET_DEC (inst);
628 if (sw & SWMASK ('I')) /* decode as 7607? */
629 inst |= IFAKE_7607;
630 if (sw & SWMASK ('N')) /* decode as 7909? */
631 inst |= IFAKE_7909;
632
633 for (i = 0; opc_v[i] > 0; i++) { /* loop thru ops */
634 j = (int32) ((opc_v[i] >> I_V_FL) & I_M_FL); /* get class */
635 if ((opc_v[i] & DFAKE) == (inst & masks[j])) { /* match? */
636 if (inst & ind_test[j]) /* indirect? */
637 fprintf (of, "%s*", opcode[i]);
638 else fprintf (of, "%s", opcode[i]); /* opcode */
639 for (k = 0; k < 3; k++)
640 fld[k] = fld[k] & fld_max[j][k];
641 for (k = 0; k < 3; k++) { /* loop thru fields */
642 fmt = fld_fmt[j][k]; /* get format */
643 if (fmt == INST_P_XIT)
644 return SCPE_OK;
645 switch (fmt) { /* case on format */
646
647 case INST_P_PNT: /* print nz, else term */
648 for (l = k, c = 0; l < 3; l++)
649 c |= fld[k];
650 if (c == 0)
651 return SCPE_OK;
652 case INST_P_PNZ: /* print non-zero */
653 fputc (k? ',': ' ', of);
654 if (fld[k])
655 fprintf (of, "%-o", fld[k]);
656 break;
657 case INST_P_PRA: /* print always */
658 fputc (k? ',': ' ', of);
659 fprintf (of, "%-o", fld[k]);
660 break;
661 case INST_P_SKP: /* skip */
662 break;
663 } /* end switch */
664 } /* end for k */
665 return SCPE_OK; /* done */
666 } /* end if */
667 } /* end for i */
668 return SCPE_ARG;
669 }
670
671 /* Convert character to code to ASCII
672
673 -b BCD
674 -a business-chain */
675
cvt_code_to_ascii(uint32 c,int32 sw)676 uint32 cvt_code_to_ascii (uint32 c, int32 sw)
677 {
678 if (sw & SWMASK ('B')) {
679 if (sw & SWMASK ('A'))
680 return bcd_to_ascii_a[c];
681 else return bcd_to_ascii_h[c];
682 }
683 else if (sw & SWMASK ('A'))
684 return nine_to_ascii_a[c];
685 else return nine_to_ascii_h[c];
686 }
687
688 /* Symbolic input
689
690 Inputs:
691 *cptr = pointer to input string
692 addr = current PC
693 uptr = pointer to unit
694 *val = pointer to output values
695 sw = switches
696 Outputs:
697 status = error status
698 */
699
parse_sym(char * cptr,t_addr addr,UNIT * uptr,t_value * val,int32 sw)700 t_stat parse_sym (char *cptr, t_addr addr, UNIT *uptr, t_value *val, int32 sw)
701 {
702 uint32 i, j, c;
703 t_uint64 fld[3];
704 t_bool ind;
705 t_stat r;
706 char gbuf[CBUFSIZE];
707
708 while (isspace (*cptr)) cptr++;
709 if ((sw & SWMASK ('C')) || ((*cptr == '\'') && cptr++)) { /* character? */
710 if (cptr[0] == 0) /* must have 1 char */
711 return SCPE_ARG;
712 val[0] = (t_value) cvt_ascii_to_code (cptr[0] & 0177, sw);
713 return SCPE_OK;
714 }
715 if ((sw & SWMASK ('S')) || ((*cptr == '"') && cptr++)) { /* sixbit string? */
716 if (cptr[0] == 0) /* must have 1 char */
717 return SCPE_ARG;
718 for (i = 0; i < 6; i++) {
719 c = cptr[0] & 0177;
720 if (c)
721 val[0] = (val[0] << 6) | ((t_value) cvt_ascii_to_code (c, sw));
722 else {
723 val[0] = val[0] << (6 * (6 - i));
724 break;
725 }
726 }
727 return SCPE_OK;
728 }
729
730 cptr = get_glyph (cptr, gbuf, 0); /* get opcode */
731 j = strlen (gbuf); /* get length */
732 if (gbuf[j - 1] == '*') { /* indirect? */
733 ind = TRUE;
734 gbuf[j - 1] = 0;
735 }
736 else ind = FALSE;
737 for (i = 0; (opcode[i] != NULL) && (strcmp (opcode[i], gbuf) != 0) ; i++) ;
738 if (opcode[i] == NULL)
739 return SCPE_ARG;
740 j = (uint32) ((opc_v[i] >> I_V_FL) & I_M_FL); /* get class */
741 val[0] = opc_v[i] & DMASK;
742 if (ind) {
743 if (ind_test[j])
744 val[0] |= ind_test[j];
745 else return SCPE_ARG;
746 }
747
748 for (i = 0; i < 3; i++) /* clear inputs */
749 fld[i] = 0;
750 for (i = 0; (i < 3) && *cptr; i++) { /* parse inputs */
751 if (i < 2) /* get glyph */
752 cptr = get_glyph (cptr, gbuf, ',');
753 else cptr = get_glyph (cptr, gbuf, 0);
754 if (gbuf[0]) { /* anything? */
755 fld[i] = get_uint (gbuf, 8, fld_max[j][i], &r);
756 if ((r != SCPE_OK) || (fld_max[j][i] == 0))
757 return SCPE_ARG;
758 }
759 }
760 if (*cptr != 0) /* junk at end? */
761 return SCPE_ARG;
762
763 val[0] = val[0] | fld[0] | (fld[1] << INST_V_TAG) | (fld[2] << INST_V_DEC);
764 return SCPE_OK;
765 }
766
767 /* Convert ASCII to character code
768
769 -b BCD */
770
cvt_ascii_to_code(uint32 c,int32 sw)771 uint32 cvt_ascii_to_code (uint32 c, int32 sw)
772 {
773 if (sw & SWMASK ('B'))
774 return ascii_to_bcd[c];
775 else return ascii_to_nine[c];
776 }
777