1 // Galaga & Dig-Dug driver for FB Alpha, based on the MAME driver by Nicola Salmoria & previous work by Martin Scragg, Mirko Buffoni, Aaron Giles
2 // Dig Dug added July 27, 2015 - dink
3 // Xevious added April 22, 2019 - CupcakeFan
4
5 #include "tiles_generic.h"
6 #include "z80_intf.h"
7 #include "namco_snd.h"
8 #include "samples.h"
9 #include "earom.h"
10
11 enum
12 {
13 CPU1 = 0,
14 CPU2,
15 CPU3,
16 NAMCO_BRD_CPU_COUNT
17 };
18
19 struct CPU_Control_Def
20 {
21 UINT8 fireIRQ;
22 UINT8 halt;
23 };
24
25 struct CPU_Def
26 {
27 struct CPU_Control_Def CPU[NAMCO_BRD_CPU_COUNT];
28 };
29
30 static struct CPU_Def cpus = { 0 };
31
32 struct CPU_Memory_Map_Def
33 {
34 UINT8 **byteArray;
35 UINT32 startAddress;
36 UINT32 endAddress;
37 UINT32 type;
38 };
39
40 struct CPU_Config_Def
41 {
42 UINT32 id;
43 UINT8 (__fastcall *z80ProgRead)(UINT16 addr);
44 void (__fastcall *z80ProgWrite)(UINT16 addr, UINT8 dta);
45 void (*z80MemMap)(void);
46 };
47
48 struct Memory_Def
49 {
50 struct
51 {
52 UINT8 *start;
53 UINT32 size;
54 } all;
55 struct
56 {
57 UINT8 *start;
58 UINT32 size;
59 UINT8 *video;
60 UINT8 *shared1;
61 UINT8 *shared2;
62 UINT8 *shared3;
63 } RAM;
64 struct
65 {
66 UINT8 *rom1;
67 UINT8 *rom2;
68 UINT8 *rom3;
69 } Z80;
70 struct
71 {
72 UINT8 *palette;
73 UINT8 *charLookup;
74 UINT8 *spriteLookup;
75 } PROM;
76 };
77
78 static struct Memory_Def memory;
79
80 enum
81 {
82 MEM_PGM = 0,
83 MEM_RAM,
84 MEM_ROM,
85 MEM_DATA,
86 MEM_DATA32,
87 MEM_TYPES
88 };
89
90 struct Memory_Map_Def
91 {
92 union
93 {
94 UINT8 **uint8;
95 UINT32 **uint32;
96 } region;
97 UINT32 size;
98 UINT32 type;
99 };
100
101 struct ROM_Load_Def
102 {
103 UINT8 **address;
104 UINT32 offset;
105 INT32 (*postProcessing)(void);
106 };
107
108 static UINT8 *tempRom = NULL;
109 static UINT8 *gameData; // digdug playfield data
110
111 struct Graphics_Def
112 {
113 UINT8 *fgChars;
114 UINT8 *sprites;
115 UINT8 *bgTiles;
116 UINT32 *palette;
117 };
118
119 static struct Graphics_Def graphics;
120
121 /* Weird video definitions...
122 * +---+
123 * | |
124 * | |
125 * | | screen_height, x, tilemap_width
126 * | |
127 * +---+
128 * screen_width, y, tilemap_height
129 */
130 #define NAMCO_SCREEN_WIDTH 224
131 #define NAMCO_SCREEN_HEIGHT 288
132
133 #define NAMCO_TMAP_WIDTH 36
134 #define NAMCO_TMAP_HEIGHT 28
135
136
137 static const INT32 Colour2Bit[4] =
138 {
139 0x00, 0x47, 0x97, 0xde
140 };
141
142 static const INT32 Colour3Bit[8] =
143 {
144 0x00, 0x21, 0x47, 0x68,
145 0x97, 0xb8, 0xde, 0xff
146 };
147
148 static const INT32 Colour4Bit[16] =
149 {
150 0x00, 0x0e, 0x1f, 0x2d,
151 0x43, 0x51, 0x62, 0x70,
152 0x8f, 0x9d, 0xae, 0xbc,
153 0xd2, 0xe0, 0xf1, 0xff
154 };
155
156 #define NAMCO_BRD_INP_COUNT 3
157
158 struct InputSignalBits_Def
159 {
160 UINT8 bit[8];
161 };
162
163 struct InputSignal_Def
164 {
165 struct InputSignalBits_Def bits;
166 UINT8 byte;
167 };
168
169 struct Port_Def
170 {
171 struct InputSignal_Def previous;
172 struct InputSignal_Def current;
173 };
174
175 struct Input_Def
176 {
177 struct Port_Def ports[NAMCO_BRD_INP_COUNT];
178 struct InputSignal_Def dip[2];
179 UINT8 reset;
180 };
181
182 static struct Input_Def input;
183
184 /* check directions, according to the following 8-position rule */
185 /* 0 */
186 /* 7 1 */
187 /* 6 8 2 */
188 /* 5 3 */
189 /* 4 */
190 static const UINT8 namcoControls[16] = {
191 /* 0000, 0001, 0010, 0011, 0100, 0101, 0110, 0111, 1000, 1001, 1010, 1011, 1100, 1101, 1110, 1111 */
192 /* LDRU, LDRu, LDrU, LDru, LdRU, LdRu, LdrU, Ldru, lDRU, lDRu, lDrU, lDru, ldRU, ldRu, ldrU, ldru */
193 8, 8, 8, 5, 8, 8, 7, 6, 8, 3, 8, 4, 1, 2, 0, 8
194 };
195
196 struct CPU_Rd_Table
197 {
198 UINT16 startAddr;
199 UINT16 endAddr;
200 UINT8 (*readFunc)(UINT16 offset);
201 };
202
203 struct CPU_Wr_Table
204 {
205 UINT16 startAddr;
206 UINT16 endAddr;
207 void (*writeFunc)(UINT16 offset, UINT8 dta);
208 };
209
210 struct Namco_Custom_RW_Entry
211 {
212 UINT8 n06xxCmd;
213 UINT8 (*customRWFunc)(UINT8 offset, UINT8 writeDta);
214 };
215
216 enum SpriteFlags
217 {
218 X_FLIP = 0,
219 Y_FLIP,
220 X_SIZE,
221 Y_SIZE
222 };
223
224 #define xFlip (1 << X_FLIP)
225 #define yFlip (1 << Y_FLIP)
226 #define xSize (1 << X_SIZE)
227 #define ySize (1 << Y_SIZE)
228 #define orient (xFlip | yFlip)
229
230 struct Namco_Sprite_Params
231 {
232 INT32 sprite;
233 INT32 colour;
234 INT32 xStart;
235 INT32 yStart;
236 INT32 xStep;
237 INT32 yStep;
238 INT32 flags;
239 INT32 paletteBits;
240 INT32 paletteOffset;
241 };
242
243 #define N06XX_BUF_SIZE 16
244
245 struct N06XX_Def
246 {
247 UINT8 customCommand;
248 UINT8 CPU1FireNMI;
249 UINT8 buffer[N06XX_BUF_SIZE];
250 };
251
252 struct N50XX_Def
253 {
254 UINT8 input;
255 };
256
257 struct N51XX_Def
258 {
259 UINT8 mode;
260 UINT8 leftCoinPerCredit;
261 UINT8 leftCreditPerCoins;
262 UINT8 rightCoinPerCredit;
263 UINT8 rightCreditPerCoins;
264 UINT8 auxCoinPerCredit;
265 UINT8 auxCreditPerCoins;
266 UINT8 leftCoinsInserted;
267 UINT8 rightCoinsInserted;
268 UINT8 credits;
269 UINT8 startEnable;
270 UINT8 remapJoystick;
271 UINT8 coinCreditDataCount;
272 UINT8 coinCreditDataIndex;
273 };
274
275 #define NAMCO54XX_CFG1_SIZE 4
276 #define NAMCO54XX_CFG2_SIZE 4
277 #define NAMCO54XX_CFG3_SIZE 5
278
279 struct N54XX_Def
280 {
281 INT32 fetch;
282 UINT8 *fetchDestination;
283 UINT8 config1[NAMCO54XX_CFG1_SIZE];
284 UINT8 config2[NAMCO54XX_CFG2_SIZE];
285 UINT8 config3[NAMCO54XX_CFG3_SIZE];
286 };
287
288 struct N54XX_Sample_Info_Def
289 {
290 INT32 sampleNo;
291 UINT8 sampleTrigger[8];
292 };
293
294 static struct NCustom_Def
295 {
296 struct N06XX_Def n06xx;
297 struct N50XX_Def n50xx;
298 struct N51XX_Def n51xx;
299 struct N54XX_Def n54xx;
300 } namcoCustomIC;
301
302 struct Machine_Config_Def
303 {
304 struct CPU_Config_Def *cpus;
305 struct CPU_Wr_Table *wrAddrList;
306 struct CPU_Rd_Table *rdAddrList;
307 struct Memory_Map_Def *memMapTable;
308 UINT32 sizeOfMemMapTable;
309 struct ROM_Load_Def *romLayoutTable;
310 UINT32 sizeOfRomLayoutTable;
311 UINT32 tempRomSize;
312 INT32 (*tilemapsConfig)(void);
313 void (**drawLayerTable)(void);
314 UINT32 drawTableSize;
315 UINT32 (*getSpriteParams)(struct Namco_Sprite_Params *spriteParams, UINT32 offset);
316 INT32 (*reset)(void);
317 struct Namco_Custom_RW_Entry *customRWTable;
318 struct N54XX_Sample_Info_Def *n54xxSampleList;
319 };
320
321 enum GAMES_ON_MACHINE
322 {
323 NAMCO_GALAGA = 0,
324 NAMCO_DIGDUG,
325 NAMCO_XEVIOUS,
326 NAMCO_TOTAL_GAMES
327 };
328
329 struct Machine_Def
330 {
331 struct Machine_Config_Def *config;
332 enum GAMES_ON_MACHINE game;
333 UINT8 starsInitted;
334 UINT8 flipScreen;
335 UINT32 numOfDips;
336 };
337
338 static struct Machine_Def machine = { 0 };
339
340 enum
341 {
342 NAMCO_1BIT_PALETTE_BITS = 1,
343 NAMCO_2BIT_PALETTE_BITS
344 };
345
346 static const INT32 planeOffsets1Bit[NAMCO_1BIT_PALETTE_BITS] =
347 { 0 };
348 static const INT32 planeOffsets2Bit[NAMCO_2BIT_PALETTE_BITS] =
349 { 0, 4 };
350
351 static const INT32 xOffsets8x8Tiles1Bit[8] = { STEP8(7,-1) };
352 static const INT32 yOffsets8x8Tiles1Bit[8] = { STEP8(0,8) };
353 static const INT32 xOffsets8x8Tiles2Bit[8] = { 64, 65, 66, 67, 0, 1, 2, 3 };
354 static const INT32 yOffsets8x8Tiles2Bit[8] = { 0, 8, 16, 24, 32, 40, 48, 56 };
355 static const INT32 xOffsets16x16Tiles2Bit[16] = { 0, 1, 2, 3, 64, 65, 66, 67,
356 128, 129, 130, 131, 192, 193, 194, 195 };
357 static const INT32 yOffsets16x16Tiles2Bit[16] = { 0, 8, 16, 24, 32, 40, 48, 56,
358 256, 264, 272, 280, 288, 296, 304, 312 };
359
360 typedef void (*DrawFunc_t)(void);
361
362 static INT32 namcoInitBoard(void);
363 static INT32 namcoMachineInit(void);
364 static void machineReset(void);
365 static INT32 DrvDoReset(void);
366
367 static INT32 namcoMemIndex(void);
368 static INT32 namcoLoadGameROMS(void);
369
370 static void namcoCustomReset(void);
371 static void namco51xxReset(void);
372
373 static UINT8 updateJoyAndButtons(UINT16 offset, UINT8 jp);
374 static UINT8 namco51xxRead(UINT8 offset, UINT8 dummyDta);
375 static UINT8 namco50xxRead(UINT8 offset, UINT8 dummyDta);
376 static UINT8 namco53xxRead(UINT8 offset, UINT8 dummyDta);
377 static UINT8 namcoCustomICsReadDta(UINT16 offset);
378
379 static UINT8 namco51xxWrite(UINT8 offset, UINT8 dta);
380 static INT32 n54xxCheckBuffer(UINT8 *n54xxBuffer, UINT32 bufferSize);
381 static UINT8 namco50xxWrite(UINT8 offset, UINT8 dta);
382 static UINT8 namco54xxWrite(UINT8 offset, UINT8 dta);
383 static void namcoCustomICsWriteDta(UINT16 offset, UINT8 dta);
384
385 static UINT8 namcoCustomICsReadCmd(UINT16 offset);
386 static void namcoCustomICsWriteCmd(UINT16 offset, UINT8 dta);
387
388 static UINT8 namcoZ80ReadDip(UINT16 offset);
389
390 static UINT8 __fastcall namcoZ80ProgRead(UINT16 addr);
391
392 static void namcoZ80WriteSound(UINT16 offset, UINT8 dta);
393 static void namcoZ80WriteCPU1Irq(UINT16 offset, UINT8 dta);
394 static void namcoZ80WriteCPU2Irq(UINT16 offset, UINT8 dta);
395 static void namcoZ80WriteCPU3Irq(UINT16 offset, UINT8 dta);
396 static void namcoZ80WriteCPUReset(UINT16 offset, UINT8 dta);
397 static void namcoZ80WriteFlipScreen(UINT16 offset, UINT8 dta);
398 static void __fastcall namcoZ80ProgWrite(UINT16 addr, UINT8 dta);
399
400 static tilemap_scan ( namco );
401 static void namcoRenderSprites(void);
402
403 static INT32 DrvExit(void);
404 static void DrvMakeInputs(void);
405 static INT32 DrvFrame(void);
406
407 static INT32 DrvScan(INT32 nAction, INT32 *pnMin);
408
409 /* === Common === */
410
namcoInitBoard(void)411 static INT32 namcoInitBoard(void)
412 {
413 // Allocate and Blank all required memory
414 memset(&memory, 0, sizeof(memory));
415 namcoMemIndex();
416
417 memory.all.start = (UINT8 *)BurnMalloc(memory.all.size);
418 if (NULL == memory.all.start)
419 return 1;
420 memset(memory.all.start, 0, memory.all.size);
421
422 namcoMemIndex();
423
424 return namcoLoadGameROMS();
425 }
426
namcoMachineInit(void)427 static INT32 namcoMachineInit(void)
428 {
429 INT32 retVal = 0;
430
431 for (INT32 cpuCount = CPU1; cpuCount < NAMCO_BRD_CPU_COUNT; cpuCount ++)
432 {
433 struct CPU_Config_Def *currentCPU = &machine.config->cpus[cpuCount];
434 ZetInit(currentCPU->id);
435 ZetOpen(currentCPU->id);
436 ZetSetReadHandler(currentCPU->z80ProgRead);
437 ZetSetWriteHandler(currentCPU->z80ProgWrite);
438 currentCPU->z80MemMap();
439 ZetClose();
440 }
441
442 NamcoSoundInit(18432000 / 6 / 32, 3, 0);
443 NamcoSoundSetAllRoutes(0.90 * 10.0 / 16.0, BURN_SND_ROUTE_BOTH);
444 NamcoSoundSetBuffered(ZetTotalCycles, 3072000);
445 BurnSampleInit(1);
446 BurnSampleSetAllRoutesAllSamples(0.25, BURN_SND_ROUTE_BOTH);
447
448 GenericTilesInit();
449
450 if (machine.config->tilemapsConfig)
451 {
452 retVal = machine.config->tilemapsConfig();
453 }
454
455 if (0 == retVal)
456 {
457 // Reset the driver
458 machine.config->reset();
459 }
460
461 return retVal;
462 }
463
machineReset()464 static void machineReset()
465 {
466 cpus.CPU[CPU1].fireIRQ = 0;
467 cpus.CPU[CPU2].fireIRQ = 0;
468 cpus.CPU[CPU3].fireIRQ = 0;
469 cpus.CPU[CPU2].halt = 0;
470 cpus.CPU[CPU3].halt = 0;
471
472 machine.flipScreen = 0;
473
474 namcoCustomReset();
475 namco51xxReset();
476
477 }
478
DrvDoReset(void)479 static INT32 DrvDoReset(void)
480 {
481 for (INT32 i = 0; i < NAMCO_BRD_CPU_COUNT; i ++)
482 {
483 ZetReset(i);
484 }
485
486 BurnSampleReset();
487 NamcoSoundReset();
488
489 machineReset();
490
491 HiscoreReset();
492
493 return 0;
494 }
495
namcoMemIndex(void)496 static INT32 namcoMemIndex(void)
497 {
498 struct Memory_Map_Def *memoryMapEntry = machine.config->memMapTable;
499 if (NULL == memoryMapEntry) return 1;
500
501 UINT8 *next = memory.all.start;
502
503 UINT32 i = 0;
504 while (i < machine.config->sizeOfMemMapTable)
505 {
506 if (next)
507 {
508 if ((MEM_RAM == memoryMapEntry->type) && (0 == memory.RAM.start))
509 {
510 memory.RAM.start = next;
511 }
512 switch (memoryMapEntry->type)
513 {
514 case MEM_DATA32:
515 *(memoryMapEntry->region.uint32) = (UINT32 *)next;
516 break;
517
518 default:
519 *(memoryMapEntry->region.uint8) = next;
520 break;
521 }
522 next += memoryMapEntry->size;
523 if ( (MEM_RAM == memoryMapEntry->type) &&
524 (memory.RAM.size < (next - memory.RAM.start)) )
525 {
526 memory.RAM.size = next - memory.RAM.start;
527 }
528 }
529 else
530 {
531 memory.all.size += memoryMapEntry->size;
532 }
533
534 i ++;
535 memoryMapEntry ++;
536 }
537
538 return 0;
539 }
540
namcoLoadGameROMS(void)541 static INT32 namcoLoadGameROMS(void)
542 {
543 struct ROM_Load_Def *romEntry = machine.config->romLayoutTable;
544 UINT32 tableSize = machine.config->sizeOfRomLayoutTable;
545 UINT32 tempSize = machine.config->tempRomSize;
546 INT32 retVal = 1;
547
548 if (tempSize) tempRom = (UINT8 *)BurnMalloc(tempSize);
549
550 if ((NULL != tempRom) && (NULL != romEntry))
551 {
552 memset(tempRom, 0, tempSize);
553
554 retVal = 0;
555
556 for (UINT32 idx = 0; ((idx < tableSize) && (0 == retVal)); idx ++)
557 {
558 retVal = BurnLoadRom(*(romEntry->address) + romEntry->offset, idx, 1);
559 if ((0 == retVal) && (NULL != romEntry->postProcessing))
560 retVal = romEntry->postProcessing();
561
562 romEntry ++;
563 }
564
565 BurnFree(tempRom);
566 }
567
568 return retVal;
569 }
570
571 /* derived from the latest emulation contained in MAME
572 */
namcoCustomReset(void)573 static void namcoCustomReset(void)
574 {
575 memset(&namcoCustomIC, 0, sizeof(struct NCustom_Def));
576 }
577
namco51xxReset(void)578 static void namco51xxReset(void)
579 {
580 namcoCustomIC.n51xx.coinCreditDataCount = 0;
581
582 namcoCustomIC.n51xx.leftCoinPerCredit = 0;
583 namcoCustomIC.n51xx.leftCreditPerCoins = 0;
584 namcoCustomIC.n51xx.rightCoinPerCredit = 0;
585 namcoCustomIC.n51xx.rightCreditPerCoins = 0;
586 namcoCustomIC.n51xx.auxCoinPerCredit = 0;
587 namcoCustomIC.n51xx.auxCreditPerCoins = 0;
588
589 namcoCustomIC.n51xx.credits = 0;
590 namcoCustomIC.n51xx.leftCoinsInserted = 0;
591 namcoCustomIC.n51xx.rightCoinsInserted = 0;
592
593 namcoCustomIC.n51xx.startEnable = 0;
594
595 namcoCustomIC.n51xx.remapJoystick = 0;
596
597 input.ports[0].current.byte = 0xff;
598 input.ports[1].current.byte = 0xff;
599 input.ports[2].current.byte = 0xff;
600
601 input.ports[0].previous.byte = input.ports[0].current.byte;
602 input.ports[1].previous.byte = input.ports[1].current.byte;
603 input.ports[2].previous.byte = input.ports[2].current.byte;
604
605 }
606
607 /*
608 * joy.5 | joy.4 | toggle | in.0 | last.0
609 * 1 | 1 | 0 | 0 | 0 (released)
610 * 0 | 0 | 1 | 1 | 0 (just pressed)
611 * 0 | 1 | 0 | 1 | 1 (held)
612 * 1 | 1 | 1 | 0 | 1 (just released)
613 */
updateJoyAndButtons(UINT16 offset,UINT8 jp)614 static UINT8 updateJoyAndButtons(UINT16 offset, UINT8 jp)
615 {
616 UINT8 portValue = input.ports[1].current.byte;
617
618 UINT8 joy = portValue & 0x0f;
619 if (namcoCustomIC.n51xx.remapJoystick) joy = namcoControls[joy];
620
621 UINT8 portLast = input.ports[1].previous.byte;
622
623 UINT8 buttonsValue = 0;
624
625 UINT8 buttonsDown = ~(portValue & 0xf0);
626 UINT8 buttonsLast = ~(portLast & 0xf0);
627
628 UINT8 toggle = buttonsDown ^ buttonsLast;
629
630 switch (offset)
631 {
632 case 1:
633 {
634 /* fire */
635 buttonsValue = ((toggle & buttonsDown & 0x10)^0x10);
636 buttonsValue |= ((( buttonsDown & 0x10)^0x10) << 1);
637 }
638 break;
639
640 case 2:
641 {
642 buttonsDown <<= 1;
643 buttonsLast <<= 1;
644
645 toggle <<= 1;
646
647 /* fire */
648 buttonsValue = (((toggle & buttonsDown & 0x20)^0x20)>>1);
649 buttonsValue |= (( buttonsDown & 0x20)^0x20);
650 }
651 break;
652
653 default:
654 break;
655 }
656
657 input.ports[offset].previous.byte = input.ports[offset].current.byte;
658
659 return (joy | buttonsValue);
660 }
661
namco51xxRead(UINT8 offset,UINT8 dummyDta)662 static UINT8 namco51xxRead(UINT8 offset, UINT8 dummyDta)
663 {
664 UINT8 retVal = 0xff;
665
666 switch (offset)
667 {
668 case 0:
669 {
670 if (0 == namcoCustomIC.n51xx.mode)
671 {
672 retVal = input.ports[0].current.byte;
673 }
674 else
675 {
676 UINT8 in = input.ports[0].current.byte;
677 UINT8 toggle = in ^ input.ports[0].previous.byte;
678
679 if (0 < namcoCustomIC.n51xx.leftCoinPerCredit)
680 {
681 if (99 >= namcoCustomIC.n51xx.credits)
682 {
683 if (in & toggle & 0x10)
684 {
685 namcoCustomIC.n51xx.leftCoinsInserted ++;
686 if (namcoCustomIC.n51xx.leftCoinsInserted >= namcoCustomIC.n51xx.leftCoinPerCredit)
687 {
688 namcoCustomIC.n51xx.credits += namcoCustomIC.n51xx.leftCreditPerCoins;
689 namcoCustomIC.n51xx.leftCoinsInserted -= namcoCustomIC.n51xx.leftCoinPerCredit;
690 }
691 }
692 if (in & toggle & 0x20)
693 {
694 namcoCustomIC.n51xx.rightCoinsInserted ++;
695 if (namcoCustomIC.n51xx.rightCoinsInserted >= namcoCustomIC.n51xx.rightCoinPerCredit)
696 {
697 namcoCustomIC.n51xx.credits += namcoCustomIC.n51xx.rightCreditPerCoins;
698 namcoCustomIC.n51xx.rightCoinsInserted -= namcoCustomIC.n51xx.rightCoinPerCredit;
699 }
700 }
701 if (in & toggle & 0x40)
702 {
703 namcoCustomIC.n51xx.credits ++;
704 }
705 }
706 }
707 #ifndef FORCE_FREEPLAY
708 else
709 #endif
710 {
711 namcoCustomIC.n51xx.credits = 100;
712 }
713
714 if (namcoCustomIC.n51xx.startEnable)
715 {
716 if (toggle & in & 0x04)
717 {
718 if (1 <= namcoCustomIC.n51xx.credits)
719 {
720 namcoCustomIC.n51xx.credits --;
721 }
722 }
723
724 else if (toggle & in & 0x08)
725 {
726 if (2 <= namcoCustomIC.n51xx.credits)
727 {
728 namcoCustomIC.n51xx.credits -= 2;
729 }
730 }
731 }
732
733 retVal = (namcoCustomIC.n51xx.credits / 10) * 16 + namcoCustomIC.n51xx.credits % 10;
734
735 if (~in & 0x80)
736 {
737 retVal = 0xbb;
738 }
739 }
740 input.ports[0].previous.byte = input.ports[0].current.byte;
741 }
742 break;
743
744 case 1:
745 case 2:
746 {
747 retVal = updateJoyAndButtons(offset, input.ports[offset].current.byte);
748 }
749 break;
750
751 default:
752 {
753 }
754 break;
755 }
756
757 return retVal;
758 }
759
namco50xxRead(UINT8 offset,UINT8 dummyDta)760 static UINT8 namco50xxRead(UINT8 offset, UINT8 dummyDta)
761 {
762 UINT8 retVal = 0;
763
764 if (3 == offset)
765 {
766 if ((0x80 == namcoCustomIC.n50xx.input) ||
767 (0x10 == namcoCustomIC.n50xx.input) )
768 retVal = 0x05;
769 else
770 retVal = 0x95;
771 }
772
773 return retVal;
774 }
775
776
namco53xxRead(UINT8 offset,UINT8 dummyDta)777 static UINT8 namco53xxRead(UINT8 offset, UINT8 dummyDta)
778 {
779 UINT8 retVal = 0xff;
780
781 if ( (0 == offset) || (1 == offset) )
782 retVal = input.dip[offset].byte;
783
784 return retVal;
785 }
786
namcoCustomICsReadDta(UINT16 offset)787 static UINT8 namcoCustomICsReadDta(UINT16 offset)
788 {
789 UINT8 retVal = 0xff;
790
791 struct Namco_Custom_RW_Entry *customRdEntry = machine.config->customRWTable;
792 if (NULL != customRdEntry)
793 {
794 while (NULL != customRdEntry->customRWFunc)
795 {
796 if (namcoCustomIC.n06xx.customCommand == customRdEntry->n06xxCmd)
797 {
798 retVal = customRdEntry->customRWFunc((UINT8)(offset & 0xff), 0);
799 }
800 customRdEntry ++;
801 }
802 }
803
804 return retVal;
805 }
806
namco50xxWrite(UINT8 offset,UINT8 dta)807 static UINT8 namco50xxWrite(UINT8 offset, UINT8 dta)
808 {
809 if (0 == offset)
810 namcoCustomIC.n50xx.input = dta;
811
812 return 0;
813 }
814
namco51xxWrite(UINT8 offset,UINT8 dta)815 static UINT8 namco51xxWrite(UINT8 offset, UINT8 dta)
816 {
817 dta &= 0x07;
818
819 if (namcoCustomIC.n51xx.coinCreditDataCount)
820 {
821 namcoCustomIC.n51xx.coinCreditDataIndex ++;
822
823 if (namcoCustomIC.n51xx.coinCreditDataIndex >= namcoCustomIC.n51xx.coinCreditDataCount)
824 {
825 namcoCustomIC.n51xx.coinCreditDataCount = 0;
826 }
827
828 switch (namcoCustomIC.n51xx.coinCreditDataIndex)
829 {
830 case 1:
831 namcoCustomIC.n51xx.leftCoinPerCredit = dta;
832 break;
833
834 case 2:
835 namcoCustomIC.n51xx.leftCreditPerCoins = dta;
836 break;
837
838 case 3:
839 namcoCustomIC.n51xx.rightCoinPerCredit = dta;
840 break;
841
842 case 4:
843 namcoCustomIC.n51xx.rightCreditPerCoins = dta;
844 break;
845
846 case 5:
847 namcoCustomIC.n51xx.auxCoinPerCredit = dta;
848 break;
849
850 case 6:
851 namcoCustomIC.n51xx.auxCreditPerCoins = dta;
852 break;
853
854 default:
855 break;
856 }
857 }
858 else
859 {
860 switch (dta)
861 {
862 case 0: // nop
863 break;
864
865 case 1:
866 switch (machine.game)
867 {
868 case NAMCO_XEVIOUS:
869 {
870 namcoCustomIC.n51xx.coinCreditDataCount = 6;
871 namcoCustomIC.n51xx.remapJoystick = 1;
872 }
873 break;
874
875 default:
876 {
877 namcoCustomIC.n51xx.coinCreditDataCount = 4;
878 }
879 break;
880 }
881 namcoCustomIC.n51xx.coinCreditDataIndex = 0;
882 break;
883
884 case 2:
885 namcoCustomIC.n51xx.mode = 1;
886 namcoCustomIC.n51xx.startEnable = 1;
887 break;
888
889 case 3:
890 namcoCustomIC.n51xx.remapJoystick = 0;
891 break;
892
893 case 4:
894 namcoCustomIC.n51xx.remapJoystick = 1;
895 break;
896
897 case 5:
898 memset(&namcoCustomIC.n51xx, 0, sizeof(struct N51XX_Def));
899 input.ports[0].previous.byte = input.ports[0].current.byte;
900 break;
901
902 default:
903 bprintf(PRINT_ERROR, _T("unknown 51XX command %02x\n"), dta);
904 break;
905 }
906 }
907
908 return 0;
909 }
910
911 #define n54xxDebug 0
912
n54xxCheckBuffer(UINT8 * n54xxBuffer,UINT32 bufferSize)913 static INT32 n54xxCheckBuffer(UINT8 *n54xxBuffer, UINT32 bufferSize)
914 {
915 INT32 retVal = -1;
916
917 #if n54xxDebug
918 char bufCheck[32];
919 #endif
920
921 struct N54XX_Sample_Info_Def *sampleEntry = machine.config->n54xxSampleList;
922
923 if (NULL != sampleEntry)
924 {
925 while (0 <= sampleEntry->sampleNo)
926 {
927 if (0 == memcmp(n54xxBuffer, sampleEntry->sampleTrigger, bufferSize) )
928 {
929 retVal = sampleEntry->sampleNo;
930 }
931 #if n54xxDebug
932 sprintf(bufCheck, "%d, %d %02x,%02x,%02x,%02x : %02x,%02x,%02x,%02x",
933 retVal,
934 sampleEntry->sampleNo,
935 n54xxBuffer[0],
936 n54xxBuffer[1],
937 n54xxBuffer[2],
938 n54xxBuffer[3],
939 sampleEntry->sampleTrigger[0],
940 sampleEntry->sampleTrigger[1],
941 sampleEntry->sampleTrigger[2],
942 sampleEntry->sampleTrigger[3]
943 );
944 bprintf(PRINT_NORMAL, _T("%S\n"), bufCheck);
945 #endif
946 sampleEntry ++;
947 }
948 #if n54xxDebug
949 bprintf(PRINT_NORMAL, _T(" %d (%d)\n"), retVal, sampleEntry->sampleNo);
950 #endif
951 }
952
953 return retVal;
954 }
955
namco54xxWrite(UINT8 offset,UINT8 dta)956 static UINT8 namco54xxWrite(UINT8 offset, UINT8 dta)
957 {
958 if (namcoCustomIC.n54xx.fetch)
959 {
960 if (NULL != namcoCustomIC.n54xx.fetchDestination)
961 *(namcoCustomIC.n54xx.fetchDestination ++) = dta;
962
963 namcoCustomIC.n54xx.fetch --;
964 }
965 else
966 {
967 switch (dta & 0xf0)
968 {
969 case 0x00:
970 break;
971
972 case 0x10: // output sound on pins 4-7 only
973 {
974 INT32 sampleNo = n54xxCheckBuffer(namcoCustomIC.n54xx.config1, NAMCO54XX_CFG1_SIZE);
975 if (0 <= sampleNo) BurnSamplePlay(sampleNo);
976 }
977 break;
978
979 case 0x20: // output sound on pins 8-11 only
980 {
981 INT32 sampleNo = n54xxCheckBuffer(namcoCustomIC.n54xx.config2, NAMCO54XX_CFG2_SIZE);
982 if (0 <= sampleNo) BurnSamplePlay(sampleNo);
983 }
984 break;
985
986 case 0x30:
987 {
988 namcoCustomIC.n54xx.fetch = NAMCO54XX_CFG1_SIZE;
989 namcoCustomIC.n54xx.fetchDestination = namcoCustomIC.n54xx.config1;
990 }
991 break;
992
993 case 0x40:
994 {
995 namcoCustomIC.n54xx.fetch = NAMCO54XX_CFG2_SIZE;
996 namcoCustomIC.n54xx.fetchDestination = namcoCustomIC.n54xx.config2;
997 }
998 break;
999
1000 case 0x50: // output sound on pins 17-20 only
1001 {
1002 INT32 sampleNo = n54xxCheckBuffer(namcoCustomIC.n54xx.config3, NAMCO54XX_CFG3_SIZE);
1003 if (0 <= sampleNo) BurnSamplePlay(sampleNo);
1004 }
1005 break;
1006
1007 case 0x60:
1008 {
1009 namcoCustomIC.n54xx.fetch = NAMCO54XX_CFG3_SIZE;
1010 namcoCustomIC.n54xx.fetchDestination = namcoCustomIC.n54xx.config3;
1011 }
1012 break;
1013
1014 case 0x70:
1015 {
1016 // polepos
1017 /* 0x7n = Screech sound. n = pitch (if 0 then no sound) */
1018 /* followed by 0x60 command? */
1019 if (0 == ( dta & 0x0f ))
1020 {
1021 // if (sample_playing(1))
1022 // sample_stop(1);
1023 }
1024 else
1025 {
1026 // INT32 freq = (INT32)( ( 44100.0f / 10.0f ) * (float)(Data & 0x0f) );
1027
1028 // if (!sample_playing(1))
1029 // sample_start(1, 1, 1);
1030 // sample_set_freq(1, freq);
1031 }
1032 }
1033 break;
1034
1035 default:
1036 break;
1037 }
1038 }
1039
1040 return 0;
1041 }
1042
namcoCustomICsWriteDta(UINT16 offset,UINT8 dta)1043 static void namcoCustomICsWriteDta(UINT16 offset, UINT8 dta)
1044 {
1045 namcoCustomIC.n06xx.buffer[offset & 0x0f] = dta;
1046
1047 UINT8 retVal = 0x0;
1048 struct Namco_Custom_RW_Entry *customWrEntry = machine.config->customRWTable;
1049 if (NULL != customWrEntry)
1050 {
1051 while (NULL != customWrEntry->customRWFunc)
1052 {
1053 if (namcoCustomIC.n06xx.customCommand == customWrEntry->n06xxCmd)
1054 {
1055 retVal += customWrEntry->customRWFunc((UINT8)(offset & 0xff), dta);
1056 }
1057 customWrEntry ++;
1058 }
1059 }
1060 }
1061
namcoCustomICsReadCmd(UINT16 offset)1062 static UINT8 namcoCustomICsReadCmd(UINT16 offset)
1063 {
1064 return namcoCustomIC.n06xx.customCommand;
1065 }
1066
namcoCustomICsWriteCmd(UINT16 offset,UINT8 dta)1067 static void namcoCustomICsWriteCmd(UINT16 offset, UINT8 dta)
1068 {
1069 namcoCustomIC.n06xx.customCommand = dta;
1070 namcoCustomIC.n06xx.CPU1FireNMI = 1;
1071
1072 switch (namcoCustomIC.n06xx.customCommand)
1073 {
1074 case 0x10:
1075 {
1076 namcoCustomIC.n06xx.CPU1FireNMI = 0;
1077 }
1078 break;
1079
1080 default:
1081 break;
1082 }
1083 }
1084
namcoZ80ReadDip(UINT16 offset)1085 static UINT8 namcoZ80ReadDip(UINT16 offset)
1086 {
1087 UINT8 retVal = input.dip[1].bits.bit[offset] | input.dip[0].bits.bit[offset];
1088
1089 return retVal;
1090 }
1091
namcoZ80ProgRead(UINT16 addr)1092 static UINT8 __fastcall namcoZ80ProgRead(UINT16 addr)
1093 {
1094 struct CPU_Rd_Table *rdEntry = machine.config->rdAddrList;
1095 UINT8 dta = 0;
1096
1097 if (NULL != rdEntry)
1098 {
1099 while (NULL != rdEntry->readFunc)
1100 {
1101 if ( (addr >= rdEntry->startAddr) &&
1102 (addr <= rdEntry->endAddr) )
1103 {
1104 dta = rdEntry->readFunc(addr - rdEntry->startAddr);
1105 }
1106 rdEntry ++;
1107 }
1108 }
1109
1110 return dta;
1111 }
1112
namcoZ80WriteSound(UINT16 Offset,UINT8 dta)1113 static void namcoZ80WriteSound(UINT16 Offset, UINT8 dta)
1114 {
1115 NamcoSoundWrite(Offset, dta);
1116 }
1117
namcoZ80WriteCPU1Irq(UINT16 Offset,UINT8 dta)1118 static void namcoZ80WriteCPU1Irq(UINT16 Offset, UINT8 dta)
1119 {
1120 cpus.CPU[CPU1].fireIRQ = dta & 0x01;
1121
1122 if (!cpus.CPU[CPU1].fireIRQ)
1123 {
1124 ZetSetIRQLine(CPU1, 0, CPU_IRQSTATUS_NONE);
1125 }
1126
1127 }
1128
namcoZ80WriteCPU2Irq(UINT16 Offset,UINT8 dta)1129 static void namcoZ80WriteCPU2Irq(UINT16 Offset, UINT8 dta)
1130 {
1131 cpus.CPU[CPU2].fireIRQ = dta & 0x01;
1132 if (!cpus.CPU[CPU2].fireIRQ)
1133 {
1134 ZetSetIRQLine(CPU2, 0, CPU_IRQSTATUS_NONE);
1135 }
1136
1137 }
1138
namcoZ80WriteCPU3Irq(UINT16 Offset,UINT8 dta)1139 static void namcoZ80WriteCPU3Irq(UINT16 Offset, UINT8 dta)
1140 {
1141 cpus.CPU[CPU3].fireIRQ = !(dta & 0x01);
1142
1143 }
1144
namcoZ80WriteCPUReset(UINT16 Offset,UINT8 dta)1145 static void namcoZ80WriteCPUReset(UINT16 Offset, UINT8 dta)
1146 {
1147 if (!(dta & 0x01))
1148 {
1149 ZetReset(CPU2);
1150 ZetReset(CPU3);
1151 cpus.CPU[CPU2].halt = 1;
1152 cpus.CPU[CPU3].halt = 1;
1153 namcoCustomReset();
1154 namco51xxReset();
1155 return;
1156 }
1157 else
1158 {
1159 cpus.CPU[CPU2].halt = 0;
1160 cpus.CPU[CPU3].halt = 0;
1161 }
1162 }
1163
namcoZ80WriteFlipScreen(UINT16 offset,UINT8 dta)1164 static void namcoZ80WriteFlipScreen(UINT16 offset, UINT8 dta)
1165 {
1166 machine.flipScreen = dta & 0x01;
1167 }
1168
namcoZ80ProgWrite(UINT16 addr,UINT8 dta)1169 static void __fastcall namcoZ80ProgWrite(UINT16 addr, UINT8 dta)
1170 {
1171 struct CPU_Wr_Table *wrEntry = machine.config->wrAddrList;
1172
1173 if (NULL != wrEntry)
1174 {
1175 while (NULL != wrEntry->writeFunc)
1176 {
1177 if ( (addr >= wrEntry->startAddr) &&
1178 (addr <= wrEntry->endAddr) )
1179 {
1180 wrEntry->writeFunc(addr - wrEntry->startAddr, dta);
1181 }
1182
1183 wrEntry ++;
1184 }
1185 }
1186 }
1187
tilemap_scan(namco)1188 static tilemap_scan ( namco )
1189 {
1190 if ((col - 2) & 0x20)
1191 {
1192 return (row + 2 + (((col - 2) & 0x1f) << 5));
1193 }
1194
1195 return col - 2 + ((row + 2) << 5);
1196 }
1197
namcoRenderSprites(void)1198 static void namcoRenderSprites(void)
1199 {
1200 struct Namco_Sprite_Params spriteParams;
1201
1202 for (INT32 offset = 0; offset < 0x80; offset += 2)
1203 {
1204 if (machine.config->getSpriteParams(&spriteParams, offset))
1205 {
1206 INT32 spriteRows = ((spriteParams.flags & ySize) != 0);
1207 INT32 spriteCols = ((spriteParams.flags & xSize) != 0);
1208
1209 for (INT32 y = 0; y <= spriteRows; y ++)
1210 {
1211 for (INT32 x = 0; x <= spriteCols; x ++)
1212 {
1213 INT32 code = spriteParams.sprite;
1214 if (spriteRows || spriteCols)
1215 code += ((y * 2 + x) ^ (spriteParams.flags & orient));
1216 INT32 xPos = spriteParams.xStart + spriteParams.xStep * x;
1217 INT32 yPos = spriteParams.yStart + spriteParams.yStep * y;
1218
1219 if ((xPos < -15) || (xPos >= nScreenWidth) ) continue;
1220 if ((yPos < -15) || (yPos >= nScreenHeight)) continue;
1221
1222 switch (spriteParams.flags & orient)
1223 {
1224 case 3:
1225 Render16x16Tile_Mask_FlipXY_Clip(
1226 pTransDraw,
1227 code,
1228 xPos, yPos,
1229 spriteParams.colour,
1230 spriteParams.paletteBits,
1231 0,
1232 spriteParams.paletteOffset,
1233 graphics.sprites
1234 );
1235 break;
1236 case 2:
1237 Render16x16Tile_Mask_FlipY_Clip(
1238 pTransDraw,
1239 code,
1240 xPos, yPos,
1241 spriteParams.colour,
1242 spriteParams.paletteBits,
1243 0,
1244 spriteParams.paletteOffset,
1245 graphics.sprites
1246 );
1247 break;
1248 case 1:
1249 Render16x16Tile_Mask_FlipX_Clip(
1250 pTransDraw,
1251 code,
1252 xPos, yPos,
1253 spriteParams.colour,
1254 spriteParams.paletteBits,
1255 0,
1256 spriteParams.paletteOffset,
1257 graphics.sprites
1258 );
1259 break;
1260 case 0:
1261 default:
1262 Render16x16Tile_Mask_Clip(
1263 pTransDraw,
1264 code,
1265 xPos, yPos,
1266 spriteParams.colour,
1267 spriteParams.paletteBits,
1268 0,
1269 spriteParams.paletteOffset,
1270 graphics.sprites
1271 );
1272 break;
1273 }
1274 }
1275 }
1276 }
1277 }
1278 }
1279
DrvExit(void)1280 static INT32 DrvExit(void)
1281 {
1282 GenericTilesExit();
1283
1284 NamcoSoundExit();
1285 BurnSampleExit();
1286
1287 ZetExit();
1288
1289 earom_exit();
1290
1291 machineReset();
1292
1293 BurnFree(memory.all.start);
1294
1295 machine.game = NAMCO_GALAGA;
1296 machine.starsInitted = 0;
1297
1298 return 0;
1299 }
1300
DrvMakeInputs(void)1301 static void DrvMakeInputs(void)
1302 {
1303 struct InputSignal_Def *currentPort0 = &input.ports[0].current;
1304 struct InputSignal_Def *currentPort1 = &input.ports[1].current;
1305 struct InputSignal_Def *currentPort2 = &input.ports[2].current;
1306
1307 // Reset Inputs
1308 currentPort0->byte = 0xff;
1309 currentPort1->byte = 0xff;
1310 currentPort2->byte = 0xff;
1311
1312 switch (machine.game)
1313 {
1314 case NAMCO_XEVIOUS:
1315 // map blaster inputs from ports to dip switches
1316 input.dip[0].byte |= 0x11;
1317 if (currentPort1->bits.bit[6]) input.dip[0].byte &= 0xFE;
1318 if (currentPort2->bits.bit[6]) input.dip[0].byte &= 0xEF;
1319 break;
1320
1321 default:
1322 break;
1323 }
1324
1325 // Compile Digital Inputs
1326 for (INT32 i = 0; i < 8; i ++)
1327 {
1328 currentPort0->byte -= (currentPort0->bits.bit[i] & 1) << i;
1329 currentPort1->byte -= (currentPort1->bits.bit[i] & 1) << i;
1330 currentPort2->byte -= (currentPort2->bits.bit[i] & 1) << i;
1331
1332 input.dip[0].bits.bit[i] = ((input.dip[0].byte >> i) & 1) << 0;
1333 input.dip[1].bits.bit[i] = ((input.dip[1].byte >> i) & 1) << 1;
1334 }
1335 }
1336
DrvDraw(void)1337 static INT32 DrvDraw(void)
1338 {
1339 BurnTransferClear();
1340
1341 if (NULL != machine.config->drawLayerTable)
1342 {
1343 for (UINT32 drawLayer = 0; drawLayer < machine.config->drawTableSize; drawLayer ++)
1344 {
1345 machine.config->drawLayerTable[drawLayer]();
1346 }
1347
1348 BurnTransferCopy(graphics.palette);
1349
1350 return 0;
1351 }
1352 return 1;
1353 }
1354
DrvFrame(void)1355 static INT32 DrvFrame(void)
1356 {
1357 if (input.reset)
1358 {
1359 machine.config->reset();
1360 }
1361
1362 DrvMakeInputs();
1363
1364 INT32 nInterleave = 400;
1365 INT32 nCyclesTotal[3];
1366 INT32 nCyclesDone[3] = { 0, 0, 0 };
1367
1368 nCyclesTotal[0] = (18432000 / 6) / 60;
1369 nCyclesTotal[1] = (18432000 / 6) / 60;
1370 nCyclesTotal[2] = (18432000 / 6) / 60;
1371
1372 ZetNewFrame();
1373
1374 for (INT32 i = 0; i < nInterleave; i++)
1375 {
1376 ZetOpen(CPU1);
1377 CPU_RUN(0, Zet);
1378 if (i == (nInterleave-1) && cpus.CPU[CPU1].fireIRQ)
1379 {
1380 ZetSetIRQLine(0, CPU_IRQSTATUS_HOLD);
1381 }
1382 if ( (9 == (i % 10)) && namcoCustomIC.n06xx.CPU1FireNMI )
1383 {
1384 ZetNmi();
1385 }
1386 ZetClose();
1387
1388 if (!cpus.CPU[CPU2].halt)
1389 {
1390 ZetOpen(CPU2);
1391 CPU_RUN(1, Zet);
1392 if (i == (nInterleave-1) && cpus.CPU[CPU2].fireIRQ)
1393 {
1394 ZetSetIRQLine(0, CPU_IRQSTATUS_HOLD);
1395 }
1396 ZetClose();
1397 }
1398
1399 if (!cpus.CPU[CPU3].halt)
1400 {
1401 ZetOpen(CPU3);
1402 CPU_RUN(2, Zet);
1403 if ( ((i == ((64 + 000) * nInterleave) / 272) ||
1404 (i == ((64 + 128) * nInterleave) / 272)) && cpus.CPU[CPU3].fireIRQ)
1405 {
1406 ZetNmi();
1407 }
1408 ZetClose();
1409 }
1410 }
1411
1412 if (pBurnSoundOut)
1413 {
1414 NamcoSoundUpdate(pBurnSoundOut, nBurnSoundLen);
1415 BurnSampleRender(pBurnSoundOut, nBurnSoundLen);
1416 }
1417
1418 if (pBurnDraw)
1419 BurnDrvRedraw();
1420
1421 return 0;
1422 }
1423
DrvScan(INT32 nAction,INT32 * pnMin)1424 static INT32 DrvScan(INT32 nAction, INT32 *pnMin)
1425 {
1426 struct BurnArea ba;
1427
1428 // Return minimum compatible version
1429 if (pnMin != NULL)
1430 {
1431 *pnMin = 0x029737;
1432 }
1433
1434 if (nAction & ACB_MEMORY_RAM)
1435 {
1436 memset(&ba, 0, sizeof(ba));
1437 ba.Data = memory.RAM.start;
1438 ba.nLen = memory.RAM.size;
1439 ba.szName = "All Ram";
1440 BurnAcb(&ba);
1441 }
1442
1443 if (nAction & ACB_DRIVER_DATA) {
1444 ZetScan(nAction); // Scan Z80
1445
1446 NamcoSoundScan(nAction, pnMin);
1447 BurnSampleScan(nAction, pnMin);
1448
1449 // Scan critical driver variables
1450 SCAN_VAR(cpus.CPU[CPU1].fireIRQ);
1451 SCAN_VAR(cpus.CPU[CPU2].fireIRQ);
1452 SCAN_VAR(cpus.CPU[CPU3].fireIRQ);
1453 SCAN_VAR(cpus.CPU[CPU2].halt);
1454 SCAN_VAR(cpus.CPU[CPU3].halt);
1455 SCAN_VAR(machine.flipScreen);
1456 SCAN_VAR(namcoCustomIC.n06xx.customCommand);
1457 SCAN_VAR(namcoCustomIC.n06xx.CPU1FireNMI);
1458 SCAN_VAR(namcoCustomIC.n51xx.mode);
1459 SCAN_VAR(namcoCustomIC.n51xx.credits);
1460 SCAN_VAR(namcoCustomIC.n51xx.leftCoinPerCredit);
1461 SCAN_VAR(namcoCustomIC.n51xx.leftCreditPerCoins);
1462 SCAN_VAR(namcoCustomIC.n51xx.rightCoinPerCredit);
1463 SCAN_VAR(namcoCustomIC.n51xx.rightCreditPerCoins);
1464 SCAN_VAR(namcoCustomIC.n51xx.auxCoinPerCredit);
1465 SCAN_VAR(namcoCustomIC.n51xx.auxCreditPerCoins);
1466 SCAN_VAR(namcoCustomIC.n06xx.buffer);
1467
1468 SCAN_VAR(input.ports);
1469
1470 SCAN_VAR(namcoCustomIC.n54xx.fetch);
1471 SCAN_VAR(namcoCustomIC.n54xx.fetchDestination);
1472 SCAN_VAR(namcoCustomIC.n54xx.config1);
1473 SCAN_VAR(namcoCustomIC.n54xx.config2);
1474 SCAN_VAR(namcoCustomIC.n54xx.config3);
1475 }
1476
1477 return 0;
1478 }
1479
1480 /* === Galaga === */
1481
1482 static struct BurnInputInfo GalagaInputList[] =
1483 {
1484 {"Start 1" , BIT_DIGITAL , &input.ports[0].current.bits.bit[2], "p1 start" },
1485 {"Start 2" , BIT_DIGITAL , &input.ports[0].current.bits.bit[3], "p2 start" },
1486 {"Coin 1" , BIT_DIGITAL , &input.ports[0].current.bits.bit[4], "p1 coin" },
1487 {"Coin 2" , BIT_DIGITAL , &input.ports[0].current.bits.bit[5], "p2 coin" },
1488
1489 {"Left" , BIT_DIGITAL , &input.ports[1].current.bits.bit[3], "p1 left" },
1490 {"Right" , BIT_DIGITAL , &input.ports[1].current.bits.bit[1], "p1 right" },
1491 {"Fire 1" , BIT_DIGITAL , &input.ports[1].current.bits.bit[4], "p1 fire 1" },
1492
1493 {"Left (Cocktail)" , BIT_DIGITAL , &input.ports[2].current.bits.bit[3], "p2 left" },
1494 {"Right (Cocktail)" , BIT_DIGITAL , &input.ports[2].current.bits.bit[1], "p2 right" },
1495 {"Fire 1 (Cocktail)" , BIT_DIGITAL , &input.ports[2].current.bits.bit[4], "p2 fire 1" },
1496
1497 {"Reset" , BIT_DIGITAL , &input.reset, "reset" },
1498 {"Service" , BIT_DIGITAL , &input.ports[0].current.bits.bit[6], "service" },
1499 {"Dip 1" , BIT_DIPSWITCH, &input.dip[0].byte, "dip" },
1500 {"Dip 2" , BIT_DIPSWITCH, &input.dip[1].byte, "dip" },
1501 };
1502
1503 STDINPUTINFO(Galaga)
1504
1505 #define GALAGA_NUM_OF_DIPSWITCHES 2
1506
1507 static struct BurnDIPInfo GalagaDIPList[]=
1508 {
1509 // offset
1510 { 0x0b, 0xf0, 0x01, 0x01, NULL },
1511
1512 // Default Values
1513 // nOffset, nID, nMask, nDefault, NULL
1514 { 0x00, 0xff, 0x01, 0x01, NULL },
1515 { 0x01, 0xff, 0xff, 0x97, NULL },
1516 { 0x02, 0xff, 0xbf, 0xb7, NULL },
1517
1518 // Service Switch
1519 // x, DIP_GRP, x, OptionCnt, szTitle
1520 { 0, 0xfe, 0, 2, "Service Mode" },
1521 // nInput, nFlags, nMask, nSetting, szText
1522 { 0x00, 0x01, 0x01, 0x01, "Off" },
1523 { 0x00, 0x01, 0x01, 0x00, "On" },
1524
1525 // Dip 1
1526 // x, DIP_GRP, x, OptionCnt, szTitle
1527 { 0, 0xfe, 0, 8, "Coinage" },
1528 // nInput, nFlags, nMask, nSetting, szText
1529 { 0x01, 0x01, 0x07, 0x04, "4 Coins 1 Play" },
1530 { 0x01, 0x01, 0x07, 0x02, "3 Coins 1 Play" },
1531 { 0x01, 0x01, 0x07, 0x06, "2 Coins 1 Play" },
1532 { 0x01, 0x01, 0x07, 0x07, "1 Coin 1 Play" },
1533 { 0x01, 0x01, 0x07, 0x01, "2 Coins 3 Plays" },
1534 { 0x01, 0x01, 0x07, 0x03, "1 Coin 2 Plays" },
1535 { 0x01, 0x01, 0x07, 0x05, "1 Coin 3 Plays" },
1536 { 0x01, 0x01, 0x07, 0x00, "Freeplay" },
1537
1538 // x, DIP_GRP, x, OptionCnt, szTitle
1539 { 0, 0xfe, 0, 8, "Bonus Life" },
1540 // nInput, nFlags, nMask, nSetting, szText
1541 { 0x01, 0x01, 0x38, 0x20, "20k 60k 60k" },
1542 { 0x01, 0x01, 0x38, 0x18, "20k 60k" },
1543 { 0x01, 0x01, 0x38, 0x10, "20k 70k 70k" },
1544 { 0x01, 0x01, 0x38, 0x30, "20k 80k 80k" },
1545 { 0x01, 0x01, 0x38, 0x38, "30k 80k" },
1546 { 0x01, 0x01, 0x38, 0x08, "30k 100k 100k" },
1547 { 0x01, 0x01, 0x38, 0x28, "30k 120k 120k" },
1548 { 0x01, 0x01, 0x38, 0x00, "None" },
1549
1550 // x, DIP_GRP, x, OptionCnt, szTitle
1551 { 0, 0xfe, 0, 4, "Lives" },
1552 // nInput, nFlags, nMask, nSetting, szText
1553 { 0x01, 0x01, 0xc0, 0x00, "2" },
1554 { 0x01, 0x01, 0xc0, 0x80, "3" },
1555 { 0x01, 0x01, 0xc0, 0x40, "4" },
1556 { 0x01, 0x01, 0xc0, 0xc0, "5" },
1557
1558 // Dip 2
1559 // x, DIP_GRP, x, OptionCnt, szTitle
1560 { 0, 0xfe, 0, 4, "Difficulty" },
1561 // nInput, nFlags, nMask, nSetting, szText
1562 { 0x02, 0x01, 0x03, 0x03, "Easy" },
1563 { 0x02, 0x01, 0x03, 0x00, "Medium" },
1564 { 0x02, 0x01, 0x03, 0x01, "Hard" },
1565 { 0x02, 0x01, 0x03, 0x02, "Hardest" },
1566
1567 // x, DIP_GRP, x, OptionCnt, szTitle
1568 { 0, 0xfe, 0, 2, "Demo Sounds" },
1569 // nInput, nFlags, nMask, nSetting, szText
1570 { 0x02, 0x01, 0x08, 0x08, "Off" },
1571 { 0x02, 0x01, 0x08, 0x00, "On" },
1572
1573 // x, DIP_GRP, x, OptionCnt, szTitle
1574 { 0, 0xfe, 0, 2, "Freeze" },
1575 // nInput, nFlags, nMask, nSetting, szText
1576 { 0x02, 0x01, 0x10, 0x10, "Off" },
1577 { 0x02, 0x01, 0x10, 0x00, "On" },
1578
1579 // x, DIP_GRP, x, OptionCnt, szTitle
1580 { 0, 0xfe, 0, 2, "Rack Test" },
1581 // nInput, nFlags, nMask, nSetting, szText
1582 { 0x02, 0x01, 0x20, 0x20, "Off" },
1583 { 0x02, 0x01, 0x20, 0x00, "On" },
1584
1585 // x, DIP_GRP, x, OptionCnt, szTitle
1586 { 0, 0xfe, 0, 2, "Cabinet" },
1587 // nInput, nFlags, nMask, nSetting, szText
1588 { 0x02, 0x01, 0x80, 0x80, "Upright" },
1589 { 0x02, 0x01, 0x80, 0x00, "Cocktail" },
1590 };
1591
1592 STDDIPINFO(Galaga)
1593
1594 static struct BurnDIPInfo GalagamwDIPList[]=
1595 {
1596 // Offset
1597 { 0x0b, 0xf0, 0x01, 0x01, NULL },
1598
1599 // Default Values
1600 // nOffset, nID, nMask, nDefault, NULL
1601 { 0x00, 0xff, 0x01, 0x01, NULL },
1602 { 0x01, 0xff, 0xff, 0x97, NULL },
1603 { 0x02, 0xff, 0xff, 0xf7, NULL },
1604
1605 // Service Switch
1606 // x, DIP_GRP, x, OptionCnt, szTitle
1607 { 0, 0xfe, 0, 2, "Service Mode" },
1608 // nInput, nFlags, nMask, nSetting, szText
1609 { 0x00, 0x01, 0x01, 0x01, "Off" },
1610 { 0x00, 0x01, 0x01, 0x00, "On" },
1611
1612 // Dip 1
1613 // x, DIP_GRP, x, OptionCnt, szTitle
1614 { 0, 0xfe, 0, 8, "Coinage" },
1615 // nInput, nFlags, nMask, nSetting, szText
1616 { 0x01, 0x01, 0x07, 0x04, "4 Coins 1 Play" },
1617 { 0x01, 0x01, 0x07, 0x02, "3 Coins 1 Play" },
1618 { 0x01, 0x01, 0x07, 0x06, "2 Coins 1 Play" },
1619 { 0x01, 0x01, 0x07, 0x07, "1 Coin 1 Play" },
1620 { 0x01, 0x01, 0x07, 0x01, "2 Coins 3 Plays" },
1621 { 0x01, 0x01, 0x07, 0x03, "1 Coin 2 Plays" },
1622 { 0x01, 0x01, 0x07, 0x05, "1 Coin 3 Plays" },
1623 { 0x01, 0x01, 0x07, 0x00, "Freeplay" },
1624
1625 // x, DIP_GRP, x, OptionCnt, szTitle
1626 { 0, 0xfe, 0, 8, "Bonus Life" },
1627 // nInput, nFlags, nMask, nSetting, szText
1628 { 0x01, 0x01, 0x38, 0x20, "20k 60k 60k" },
1629 { 0x01, 0x01, 0x38, 0x18, "20k 60k" },
1630 { 0x01, 0x01, 0x38, 0x10, "20k 70k 70k" },
1631 { 0x01, 0x01, 0x38, 0x30, "20k 80k 80k" },
1632 { 0x01, 0x01, 0x38, 0x38, "30k 80k" },
1633 { 0x01, 0x01, 0x38, 0x08, "30k 100k 100k" },
1634 { 0x01, 0x01, 0x38, 0x28, "30k 120k 120k" },
1635 { 0x01, 0x01, 0x38, 0x00, "None" },
1636
1637 // x, DIP_GRP, x, OptionCnt, szTitle
1638 { 0, 0xfe, 0, 4, "Lives" },
1639 // nInput, nFlags, nMask, nSetting, szText
1640 { 0x01, 0x01, 0xc0, 0x00, "2" },
1641 { 0x01, 0x01, 0xc0, 0x80, "3" },
1642 { 0x01, 0x01, 0xc0, 0x40, "4" },
1643 { 0x01, 0x01, 0xc0, 0xc0, "5" },
1644
1645 // Dip 2
1646 // x, DIP_GRP, x, OptionCnt, szTitle
1647 { 0, 0xfe, 0, 2, "2 Credits Game" },
1648 // nInput, nFlags, nMask, nSetting, szText
1649 { 0x02, 0x01, 0x01, 0x00, "1 Player" },
1650 { 0x02, 0x01, 0x01, 0x01, "2 Players" },
1651
1652 // x, DIP_GRP, x, OptionCnt, szTitle
1653 { 0, 0xfe, 0, 4, "Difficulty" },
1654 // nInput, nFlags, nMask, nSetting, szText
1655 { 0x02, 0x01, 0x06, 0x06, "Easy" },
1656 { 0x02, 0x01, 0x06, 0x00, "Medium" },
1657 { 0x02, 0x01, 0x06, 0x02, "Hard" },
1658 { 0x02, 0x01, 0x06, 0x04, "Hardest" },
1659
1660 // x, DIP_GRP, x, OptionCnt, szTitle
1661 { 0, 0xfe, 0, 2, "Demo Sounds" },
1662 // nInput, nFlags, nMask, nSetting, szText
1663 { 0x02, 0x01, 0x08, 0x08, "Off" },
1664 { 0x02, 0x01, 0x08, 0x00, "On" },
1665
1666 // x, DIP_GRP, x, OptionCnt, szTitle
1667 { 0, 0xfe, 0, 2, "Freeze" },
1668 // nInput, nFlags, nMask, nSetting, szText
1669 { 0x02, 0x01, 0x10, 0x10, "Off" },
1670 { 0x02, 0x01, 0x10, 0x00, "On" },
1671
1672 // x, DIP_GRP, x, OptionCnt, szTitle
1673 { 0, 0xfe, 0, 2, "Rack Test" },
1674 // nInput, nFlags, nMask, nSetting, szText
1675 { 0x02, 0x01, 0x20, 0x20, "Off" },
1676 { 0x02, 0x01, 0x20, 0x00, "On" },
1677
1678 // x, DIP_GRP, x, OptionCnt, szTitle
1679 { 0, 0xfe, 0, 2, "Cabinet" },
1680 // nInput, nFlags, nMask, nSetting, szText
1681 { 0x02, 0x01, 0x80, 0x80, "Upright" },
1682 { 0x02, 0x01, 0x80, 0x00, "Cocktail" },
1683 };
1684
1685 STDDIPINFO(Galagamw)
1686
1687 static struct BurnRomInfo GalagaRomDesc[] = {
1688 { "gg1_1b.3p", 0x01000, 0xab036c9f, BRF_ESS | BRF_PRG }, // 0 Z80 #1 Program Code
1689 { "gg1_2b.3m", 0x01000, 0xd9232240, BRF_ESS | BRF_PRG }, // 1
1690 { "gg1_3.2m", 0x01000, 0x753ce503, BRF_ESS | BRF_PRG }, // 2
1691 { "gg1_4b.2l", 0x01000, 0x499fcc76, BRF_ESS | BRF_PRG }, // 3
1692
1693 { "gg1_5b.3f", 0x01000, 0xbb5caae3, BRF_ESS | BRF_PRG }, // 4 Z80 #2 Program Code
1694
1695 { "gg1_7b.2c", 0x01000, 0xd016686b, BRF_ESS | BRF_PRG }, // 5 Z80 #3 Program Code
1696
1697 { "gg1_9.4l", 0x01000, 0x58b2f47c, BRF_GRA }, // 6 Characters
1698
1699 { "gg1_11.4d", 0x01000, 0xad447c80, BRF_GRA }, // 7 Sprites
1700 { "gg1_10.4f", 0x01000, 0xdd6f1afc, BRF_GRA }, // 8
1701
1702 { "prom-5.5n", 0x00020, 0x54603c6b, BRF_GRA }, // 9 PROMs
1703 { "prom-4.2n", 0x00100, 0x59b6edab, BRF_GRA }, // 10
1704 { "prom-3.1c", 0x00100, 0x4a04bb6b, BRF_GRA }, // 11
1705 { "prom-1.1d", 0x00100, 0x7a2815b4, BRF_GRA }, // 12
1706 { "prom-2.5c", 0x00100, 0x77245b66, BRF_GRA }, // 13
1707 };
1708
1709 STD_ROM_PICK(Galaga)
1710 STD_ROM_FN(Galaga)
1711
1712 static struct BurnRomInfo GalagaoRomDesc[] = {
1713 { "gg1-1.3p", 0x01000, 0xa3a0f743, BRF_ESS | BRF_PRG }, // 0 Z80 #1 Program Code
1714 { "gg1-2.3m", 0x01000, 0x43bb0d5c, BRF_ESS | BRF_PRG }, // 1
1715 { "gg1-3.2m", 0x01000, 0x753ce503, BRF_ESS | BRF_PRG }, // 2
1716 { "gg1-4.2l", 0x01000, 0x83874442, BRF_ESS | BRF_PRG }, // 3
1717
1718 { "gg1-5.3f", 0x01000, 0x3102fccd, BRF_ESS | BRF_PRG }, // 4 Z80 #2 Program Code
1719
1720 { "gg1-7.2c", 0x01000, 0x8995088d, BRF_ESS | BRF_PRG }, // 5 Z80 #3 Program Code
1721
1722 { "gg1-9.4l", 0x01000, 0x58b2f47c, BRF_GRA }, // 6 Characters
1723
1724 { "gg1-11.4d", 0x01000, 0xad447c80, BRF_GRA }, // 7 Sprites
1725 { "gg1-10.4f", 0x01000, 0xdd6f1afc, BRF_GRA }, // 8
1726
1727 { "prom-5.5n", 0x00020, 0x54603c6b, BRF_GRA }, // 9 PROMs
1728 { "prom-4.2n", 0x00100, 0x59b6edab, BRF_GRA }, // 10
1729 { "prom-3.1c", 0x00100, 0x4a04bb6b, BRF_GRA }, // 11
1730 { "prom-1.1d", 0x00100, 0x7a2815b4, BRF_GRA }, // 12
1731 { "prom-2.5c", 0x00100, 0x77245b66, BRF_GRA }, // 13
1732 };
1733
1734 STD_ROM_PICK(Galagao)
1735 STD_ROM_FN(Galagao)
1736
1737 static struct BurnRomInfo GalagamwRomDesc[] = {
1738 { "3200a.bin", 0x01000, 0x3ef0b053, BRF_ESS | BRF_PRG }, // 0 Z80 #1 Program Code
1739 { "3300b.bin", 0x01000, 0x1b280831, BRF_ESS | BRF_PRG }, // 1
1740 { "3400c.bin", 0x01000, 0x16233d33, BRF_ESS | BRF_PRG }, // 2
1741 { "3500d.bin", 0x01000, 0x0aaf5c23, BRF_ESS | BRF_PRG }, // 3
1742
1743 { "3600e.bin", 0x01000, 0xbc556e76, BRF_ESS | BRF_PRG }, // 4 Z80 #2 Program Code
1744
1745 { "3700g.bin", 0x01000, 0xb07f0aa4, BRF_ESS | BRF_PRG }, // 5 Z80 #3 Program Code
1746
1747 { "2600j.bin", 0x01000, 0x58b2f47c, BRF_GRA }, // 6 Characters
1748
1749 { "2800l.bin", 0x01000, 0xad447c80, BRF_GRA }, // 7 Sprites
1750 { "2700k.bin", 0x01000, 0xdd6f1afc, BRF_GRA }, // 8
1751
1752 { "prom-5.5n", 0x00020, 0x54603c6b, BRF_GRA }, // 9 PROMs
1753 { "prom-4.2n", 0x00100, 0x59b6edab, BRF_GRA }, // 10
1754 { "prom-3.1c", 0x00100, 0x4a04bb6b, BRF_GRA }, // 11
1755 { "prom-1.1d", 0x00100, 0x7a2815b4, BRF_GRA }, // 12
1756 { "prom-2.5c", 0x00100, 0x77245b66, BRF_GRA }, // 13
1757 };
1758
1759 STD_ROM_PICK(Galagamw)
1760 STD_ROM_FN(Galagamw)
1761
1762 static struct BurnRomInfo GalagamfRomDesc[] = {
1763 { "3200a.bin", 0x01000, 0x3ef0b053, BRF_ESS | BRF_PRG }, // 0 Z80 #1 Program Code
1764 { "3300b.bin", 0x01000, 0x1b280831, BRF_ESS | BRF_PRG }, // 1
1765 { "3400c.bin", 0x01000, 0x16233d33, BRF_ESS | BRF_PRG }, // 2
1766 { "3500d.bin", 0x01000, 0x0aaf5c23, BRF_ESS | BRF_PRG }, // 3
1767
1768 { "3600fast.bin", 0x01000, 0x23d586e5, BRF_ESS | BRF_PRG }, // 4 Z80 #2 Program Code
1769
1770 { "3700g.bin", 0x01000, 0xb07f0aa4, BRF_ESS | BRF_PRG }, // 5 Z80 #3 Program Code
1771
1772 { "2600j.bin", 0x01000, 0x58b2f47c, BRF_GRA }, // 6 Characters
1773
1774 { "2800l.bin", 0x01000, 0xad447c80, BRF_GRA }, // 7 Sprites
1775 { "2700k.bin", 0x01000, 0xdd6f1afc, BRF_GRA }, // 8
1776
1777 { "prom-5.5n", 0x00020, 0x54603c6b, BRF_GRA }, // 9 PROMs
1778 { "prom-4.2n", 0x00100, 0x59b6edab, BRF_GRA }, // 10
1779 { "prom-3.1c", 0x00100, 0x4a04bb6b, BRF_GRA }, // 11
1780 { "prom-1.1d", 0x00100, 0x7a2815b4, BRF_GRA }, // 12
1781 { "prom-2.5c", 0x00100, 0x77245b66, BRF_GRA }, // 13
1782 };
1783
1784 STD_ROM_PICK(Galagamf)
1785 STD_ROM_FN(Galagamf)
1786
1787 static struct BurnRomInfo GalagamkRomDesc[] = {
1788 { "mk2-1", 0x01000, 0x23cea1e2, BRF_ESS | BRF_PRG }, // 0 Z80 #1 Program Code
1789 { "mk2-2", 0x01000, 0x89695b1a, BRF_ESS | BRF_PRG }, // 1
1790 { "3400c.bin", 0x01000, 0x16233d33, BRF_ESS | BRF_PRG }, // 2
1791 { "mk2-4", 0x01000, 0x24b767f5, BRF_ESS | BRF_PRG }, // 3
1792
1793 { "gg1-5.3f", 0x01000, 0x3102fccd, BRF_ESS | BRF_PRG }, // 4 Z80 #2 Program Code
1794
1795 { "gg1-7b.2c", 0x01000, 0xd016686b, BRF_ESS | BRF_PRG }, // 5 Z80 #3 Program Code
1796
1797 { "gg1-9.4l", 0x01000, 0x58b2f47c, BRF_GRA }, // 6 Characters
1798
1799 { "gg1-11.4d", 0x01000, 0xad447c80, BRF_GRA }, // 7 Sprites
1800 { "gg1-10.4f", 0x01000, 0xdd6f1afc, BRF_GRA }, // 8
1801
1802 { "prom-5.5n", 0x00020, 0x54603c6b, BRF_GRA }, // 9 PROMs
1803 { "prom-4.2n", 0x00100, 0x59b6edab, BRF_GRA }, // 10
1804 { "prom-3.1c", 0x00100, 0x4a04bb6b, BRF_GRA }, // 11
1805 { "prom-1.1d", 0x00100, 0x7a2815b4, BRF_GRA }, // 12
1806 { "prom-2.5c", 0x00100, 0x77245b66, BRF_GRA }, // 13
1807 };
1808
1809 STD_ROM_PICK(Galagamk)
1810 STD_ROM_FN(Galagamk)
1811
1812 static struct BurnRomInfo GallagRomDesc[] = {
1813 { "gallag.1", 0x01000, 0xa3a0f743, BRF_ESS | BRF_PRG }, // 0 Z80 #1 Program Code
1814 { "gallag.2", 0x01000, 0x5eda60a7, BRF_ESS | BRF_PRG }, // 1
1815 { "gallag.3", 0x01000, 0x753ce503, BRF_ESS | BRF_PRG }, // 2
1816 { "gallag.4", 0x01000, 0x83874442, BRF_ESS | BRF_PRG }, // 3
1817
1818 { "gallag.5", 0x01000, 0x3102fccd, BRF_ESS | BRF_PRG }, // 4 Z80 #2 Program Code
1819
1820 { "gallag.7", 0x01000, 0x8995088d, BRF_ESS | BRF_PRG }, // 5 Z80 #3 Program Code
1821
1822 { "gallag.6", 0x01000, 0x001b70bc, BRF_ESS | BRF_PRG }, // 6 Z80 #4 Program Code
1823
1824 { "gallag.8", 0x01000, 0x169a98a4, BRF_GRA }, // 7 Characters
1825
1826 { "gallag.a", 0x01000, 0xad447c80, BRF_GRA }, // 8 Sprites
1827 { "gallag.9", 0x01000, 0xdd6f1afc, BRF_GRA }, // 9
1828
1829 { "prom-5.5n", 0x00020, 0x54603c6b, BRF_GRA }, // 10 PROMs
1830 { "prom-4.2n", 0x00100, 0x59b6edab, BRF_GRA }, // 11
1831 { "prom-3.1c", 0x00100, 0x4a04bb6b, BRF_GRA }, // 12
1832 { "prom-1.1d", 0x00100, 0x7a2815b4, BRF_GRA }, // 13
1833 { "prom-2.5c", 0x00100, 0x77245b66, BRF_GRA }, // 14
1834 };
1835
1836 STD_ROM_PICK(Gallag)
1837 STD_ROM_FN(Gallag)
1838
1839 static struct BurnRomInfo NebulbeeRomDesc[] = {
1840 { "nebulbee.01", 0x01000, 0xf405f2c4, BRF_ESS | BRF_PRG }, // 0 Z80 #1 Program Code
1841 { "nebulbee.02", 0x01000, 0x31022b60, BRF_ESS | BRF_PRG }, // 1
1842 { "gg1_3.2m", 0x01000, 0x753ce503, BRF_ESS | BRF_PRG }, // 2
1843 { "nebulbee.04", 0x01000, 0xd76788a5, BRF_ESS | BRF_PRG }, // 3
1844
1845 { "gg1-5", 0x01000, 0x3102fccd, BRF_ESS | BRF_PRG }, // 4 Z80 #2 Program Code
1846
1847 { "gg1-7", 0x01000, 0x8995088d, BRF_ESS | BRF_PRG }, // 5 Z80 #3 Program Code
1848
1849 { "nebulbee.07", 0x01000, 0x035e300c, BRF_ESS | BRF_PRG }, // 6 Z80 #4 Program Code
1850
1851 { "gg1_9.4l", 0x01000, 0x58b2f47c, BRF_GRA }, // 7 Characters
1852
1853 { "gg1_11.4d", 0x01000, 0xad447c80, BRF_GRA }, // 8 Sprites
1854 { "gg1_10.4f", 0x01000, 0xdd6f1afc, BRF_GRA }, // 9
1855
1856 { "prom-5.5n", 0x00020, 0x54603c6b, BRF_GRA }, // 10 PROMs
1857 { "2n.bin", 0x00100, 0xa547d33b, BRF_GRA }, // 11
1858 { "1c.bin", 0x00100, 0xb6f585fb, BRF_GRA }, // 12
1859 { "1d.bin", 0x00100, 0x86d92b24, BRF_GRA }, // 14
1860 { "5c.bin", 0x00100, 0x8bd565f6, BRF_GRA }, // 13
1861 };
1862
1863 STD_ROM_PICK(Nebulbee)
1864 STD_ROM_FN(Nebulbee)
1865
1866 static struct BurnSampleInfo GalagaSampleDesc[] = {
1867 #if !defined (ROM_VERIFY)
1868 { "bang", SAMPLE_NOLOOP },
1869 { "init", SAMPLE_NOLOOP },
1870 #endif
1871 { "", 0 }
1872 };
1873
1874 STD_SAMPLE_PICK(Galaga)
1875 STD_SAMPLE_FN(Galaga)
1876
1877 static INT32 galagaInit(void);
1878 static INT32 gallagInit(void);
1879 static INT32 galagaReset(void);
1880
1881 static void galagaMemoryMap1(void);
1882 static void galagaMemoryMap2(void);
1883 static void galagaMemoryMap3(void);
1884 static tilemap_callback(galaga_fg);
1885 static INT32 galagaCharDecode(void);
1886 static INT32 galagaSpriteDecode(void);
1887 static INT32 galagaTilemapConfig(void);
1888
1889 static void galagaZ80WriteStars(UINT16 offset, UINT8 dta);
1890
1891 static void galagaCalcPalette(void);
1892 static void galagaInitStars(void);
1893 static void galagaRenderStars(void);
1894 static void galagaStarScroll(void);
1895 static void galagaRenderChars(void);
1896
1897 static UINT32 galagaGetSpriteParams(struct Namco_Sprite_Params *spriteParams, UINT32 offset);
1898
1899 static INT32 galagaScan(INT32 nAction, INT32 *pnMin);
1900
1901 #define GALAGA_PALETTE_SIZE_CHARS 0x100
1902 #define GALAGA_PALETTE_SIZE_SPRITES 0x100
1903 #define GALAGA_PALETTE_SIZE_BGSTARS 0x040
1904 #define GALAGA_PALETTE_SIZE (GALAGA_PALETTE_SIZE_CHARS + \
1905 GALAGA_PALETTE_SIZE_SPRITES + \
1906 GALAGA_PALETTE_SIZE_BGSTARS)
1907
1908 #define GALAGA_PALETTE_OFFSET_CHARS 0
1909 #define GALAGA_PALETTE_OFFSET_SPRITE (GALAGA_PALETTE_OFFSET_CHARS + GALAGA_PALETTE_SIZE_CHARS)
1910 #define GALAGA_PALETTE_OFFSET_BGSTARS (GALAGA_PALETTE_OFFSET_SPRITE + GALAGA_PALETTE_SIZE_SPRITES)
1911
1912 #define GALAGA_NUM_OF_CHAR 0x100
1913 #define GALAGA_SIZE_OF_CHAR_IN_BYTES 0x80
1914
1915 #define GALAGA_NUM_OF_SPRITE 0x80
1916 #define GALAGA_SIZE_OF_SPRITE_IN_BYTES 0x200
1917
1918 #define STARS_CTRL_NUM 6
1919
1920 struct Stars_Def
1921 {
1922 UINT32 scrollX;
1923 UINT32 scrollY;
1924 UINT8 control[STARS_CTRL_NUM];
1925 };
1926
1927 static struct Stars_Def stars = { 0 };
1928
1929 struct Star_Def
1930 {
1931 UINT16 x;
1932 UINT16 y;
1933 UINT8 colour;
1934 UINT8 set;
1935 };
1936
1937 #define MAX_STARS 252
1938 static struct Star_Def *starSeedTable;
1939
1940 static struct CPU_Config_Def galagaCPU[NAMCO_BRD_CPU_COUNT] =
1941 {
1942 {
1943 /* CPU ID = */ CPU1,
1944 /* CPU Read Func = */ namcoZ80ProgRead,
1945 /* CPU Write Func = */ namcoZ80ProgWrite,
1946 /* Memory Mapping = */ galagaMemoryMap1
1947 },
1948 {
1949 /* CPU ID = */ CPU2,
1950 /* CPU Read Func = */ namcoZ80ProgRead,
1951 /* CPU Write Func = */ namcoZ80ProgWrite,
1952 /* Memory Mapping = */ galagaMemoryMap2
1953 },
1954 {
1955 /* CPU ID = */ CPU3,
1956 /* CPU Read Func = */ namcoZ80ProgRead,
1957 /* CPU Write Func = */ namcoZ80ProgWrite,
1958 /* Memory Mapping = */ galagaMemoryMap3
1959 },
1960 };
1961
1962 static struct CPU_Rd_Table galagaReadTable[] =
1963 {
1964 { 0x6800, 0x6807, namcoZ80ReadDip },
1965 { 0x7000, 0x7002, namcoCustomICsReadDta },
1966 { 0x7100, 0x7100, namcoCustomICsReadCmd },
1967 { 0x0000, 0x0000, NULL }, // End of Table marker
1968 };
1969
1970 static struct CPU_Wr_Table galagaWriteTable[] =
1971 {
1972 { 0x6800, 0x681f, namcoZ80WriteSound },
1973 { 0x6820, 0x6820, namcoZ80WriteCPU1Irq },
1974 { 0x6821, 0x6821, namcoZ80WriteCPU2Irq },
1975 { 0x6822, 0x6822, namcoZ80WriteCPU3Irq },
1976 { 0x6823, 0x6823, namcoZ80WriteCPUReset },
1977 // { 0x6830, 0x6830, WatchDogWriteNotImplemented },
1978 { 0x7000, 0x700f, namcoCustomICsWriteDta },
1979 { 0x7100, 0x7100, namcoCustomICsWriteCmd },
1980 { 0xa000, 0xa005, galagaZ80WriteStars },
1981 { 0xa007, 0xa007, namcoZ80WriteFlipScreen },
1982 { 0x0000, 0x0000, NULL }, // End of Table marker
1983 };
1984
1985 static struct Memory_Map_Def galagaMemTable[] =
1986 {
1987 { &memory.Z80.rom1, 0x04000, MEM_PGM },
1988 { &memory.Z80.rom2, 0x04000, MEM_PGM },
1989 { &memory.Z80.rom3, 0x04000, MEM_PGM },
1990 { &memory.PROM.palette, 0x00020, MEM_ROM },
1991 { &memory.PROM.charLookup, 0x00100, MEM_ROM },
1992 { &memory.PROM.spriteLookup, 0x00100, MEM_ROM },
1993 { &NamcoSoundProm, 0x00200, MEM_ROM },
1994
1995 { &memory.RAM.video, 0x00800, MEM_RAM },
1996 { &memory.RAM.shared1, 0x00400, MEM_RAM },
1997 { &memory.RAM.shared2, 0x00400, MEM_RAM },
1998 { &memory.RAM.shared3, 0x00400, MEM_RAM },
1999
2000 { (UINT8 **)&starSeedTable, sizeof(struct Star_Def) * MAX_STARS, MEM_DATA },
2001 { &graphics.fgChars, GALAGA_NUM_OF_CHAR * 8 * 8, MEM_DATA },
2002 { &graphics.sprites, GALAGA_NUM_OF_SPRITE * 16 * 16, MEM_DATA },
2003 { (UINT8 **)&graphics.palette, GALAGA_PALETTE_SIZE * sizeof(UINT32), MEM_DATA32 },
2004 };
2005
2006 #define GALAGA_MEM_TBL_SIZE (sizeof(galagaMemTable) / sizeof(struct Memory_Map_Def))
2007
2008 static struct ROM_Load_Def galagaROMTable[] =
2009 {
2010 { &memory.Z80.rom1, 0x00000, NULL },
2011 { &memory.Z80.rom1, 0x01000, NULL },
2012 { &memory.Z80.rom1, 0x02000, NULL },
2013 { &memory.Z80.rom1, 0x03000, NULL },
2014 { &memory.Z80.rom2, 0x00000, NULL },
2015 { &memory.Z80.rom3, 0x00000, NULL },
2016 { &tempRom, 0x00000, galagaCharDecode },
2017 { &tempRom, 0x00000, NULL },
2018 { &tempRom, 0x01000, galagaSpriteDecode },
2019 { &memory.PROM.palette, 0x00000, NULL },
2020 { &memory.PROM.charLookup, 0x00000, NULL },
2021 { &memory.PROM.spriteLookup, 0x00000, NULL },
2022 { &NamcoSoundProm, 0x00000, namcoMachineInit }
2023
2024 };
2025
2026 #define GALAGA_ROM_TBL_SIZE (sizeof(galagaROMTable) / sizeof(struct ROM_Load_Def))
2027
2028 static struct ROM_Load_Def gallagROMTable[] =
2029 {
2030 { &memory.Z80.rom1, 0x00000, NULL },
2031 { &memory.Z80.rom1, 0x01000, NULL },
2032 { &memory.Z80.rom1, 0x02000, NULL },
2033 { &memory.Z80.rom1, 0x03000, NULL },
2034 { &memory.Z80.rom2, 0x00000, NULL },
2035 { &memory.Z80.rom3, 0x00000, NULL },
2036 { &tempRom, 0x00000, galagaCharDecode },
2037 { &tempRom, 0x00000, NULL },
2038 { &tempRom, 0x01000, galagaSpriteDecode },
2039 { &memory.PROM.palette, 0x00000, NULL },
2040 { &memory.PROM.charLookup, 0x00000, NULL },
2041 { &memory.PROM.spriteLookup, 0x00000, NULL },
2042 { &NamcoSoundProm, 0x00000, namcoMachineInit },
2043 };
2044
2045 #define GALLAG_ROM_TBL_SIZE (sizeof(gallagROMTable) / sizeof(struct ROM_Load_Def))
2046
2047 static DrawFunc_t galagaDrawFuncs[] =
2048 {
2049 galagaCalcPalette,
2050 galagaRenderChars,
2051 galagaRenderStars,
2052 namcoRenderSprites,
2053 galagaStarScroll,
2054 };
2055
2056 #define GALAGA_DRAW_TBL_SIZE (sizeof(galagaDrawFuncs) / sizeof(galagaDrawFuncs[0]))
2057
2058 static struct Namco_Custom_RW_Entry galagaCustomICRW[] =
2059 {
2060 { 0x71, namco51xxRead },
2061 { 0xa1, namco51xxWrite },
2062 { 0xb1, namco51xxRead },
2063 { 0xe1, namco51xxWrite },
2064 { 0xA8, namco54xxWrite },
2065 { 0x00, NULL }
2066 };
2067
2068 static struct N54XX_Sample_Info_Def galagaN54xxSampleList[] =
2069 {
2070 { 0, "\x40\x00\x02\xdf" },
2071 { 1, "\x30\x30\x03\xdf" },
2072 { -1, "" },
2073 };
2074
2075 static struct Machine_Config_Def galagaMachineConfig =
2076 {
2077 /*cpus */ galagaCPU,
2078 /*wrAddrList */ galagaWriteTable,
2079 /*rdAddrList */ galagaReadTable,
2080 /*memMapTable */ galagaMemTable,
2081 /*sizeOfMemMapTable */ GALAGA_MEM_TBL_SIZE,
2082 /*romLayoutTable */ galagaROMTable,
2083 /*sizeOfRomLayoutTable */ GALAGA_ROM_TBL_SIZE,
2084 /*tempRomSize */ 0x2000,
2085 /*tilemapsConfig */ galagaTilemapConfig,
2086 /*drawLayerTable */ galagaDrawFuncs,
2087 /*drawTableSize */ GALAGA_DRAW_TBL_SIZE,
2088 /*getSpriteParams */ galagaGetSpriteParams,
2089 /*reset */ galagaReset,
2090 /*customRWTable */ galagaCustomICRW,
2091 /*n54xxSampleList */ galagaN54xxSampleList
2092 };
2093
galagaInit(void)2094 static INT32 galagaInit(void)
2095 {
2096 machine.game = NAMCO_GALAGA;
2097 machine.numOfDips = GALAGA_NUM_OF_DIPSWITCHES;
2098
2099 machine.config = &galagaMachineConfig;
2100
2101 return namcoInitBoard();
2102 }
2103
2104 static struct Machine_Config_Def gallagMachineConfig =
2105 {
2106 /*cpus */ galagaCPU,
2107 /*wrAddrList */ galagaWriteTable,
2108 /*rdAddrList */ galagaReadTable,
2109 /*memMapTable */ galagaMemTable,
2110 /*sizeOfMemMapTable */ GALAGA_MEM_TBL_SIZE,
2111 /*romLayoutTable */ gallagROMTable,
2112 /*sizeOfRomLayoutTable */ GALLAG_ROM_TBL_SIZE,
2113 /*tempRomSize */ 0x2000,
2114 /*tilemapsConfig */ galagaTilemapConfig,
2115 /*drawLayerTable */ galagaDrawFuncs,
2116 /*drawTableSize */ GALAGA_DRAW_TBL_SIZE,
2117 /*getSpriteParams */ galagaGetSpriteParams,
2118 /*reset */ galagaReset,
2119 /*customRWTable */ galagaCustomICRW,
2120 /*n54xxSampleList */ galagaN54xxSampleList
2121 };
2122
gallagInit(void)2123 static INT32 gallagInit(void)
2124 {
2125 machine.game = NAMCO_GALAGA;
2126 machine.numOfDips = GALAGA_NUM_OF_DIPSWITCHES;
2127
2128 machine.config = &gallagMachineConfig;
2129
2130 return namcoInitBoard();
2131 }
2132
galagaReset(void)2133 static INT32 galagaReset(void)
2134 {
2135 for (INT32 i = 0; i < STARS_CTRL_NUM; i ++)
2136 {
2137 stars.control[i] = 0;
2138 }
2139 stars.scrollX = 0;
2140 stars.scrollY = 0;
2141
2142 return DrvDoReset();
2143 }
2144
galagaMemoryMap1(void)2145 static void galagaMemoryMap1(void)
2146 {
2147 ZetMapMemory(memory.Z80.rom1, 0x0000, 0x3fff, MAP_ROM);
2148 ZetMapMemory(memory.RAM.video, 0x8000, 0x87ff, MAP_RAM);
2149 ZetMapMemory(memory.RAM.shared1, 0x8800, 0x8bff, MAP_RAM);
2150 ZetMapMemory(memory.RAM.shared2, 0x9000, 0x93ff, MAP_RAM);
2151 ZetMapMemory(memory.RAM.shared3, 0x9800, 0x9bff, MAP_RAM);
2152 }
2153
galagaMemoryMap2(void)2154 static void galagaMemoryMap2(void)
2155 {
2156 ZetMapMemory(memory.Z80.rom2, 0x0000, 0x3fff, MAP_ROM);
2157 ZetMapMemory(memory.RAM.video, 0x8000, 0x87ff, MAP_RAM);
2158 ZetMapMemory(memory.RAM.shared1, 0x8800, 0x8bff, MAP_RAM);
2159 ZetMapMemory(memory.RAM.shared2, 0x9000, 0x93ff, MAP_RAM);
2160 ZetMapMemory(memory.RAM.shared3, 0x9800, 0x9bff, MAP_RAM);
2161 }
2162
galagaMemoryMap3(void)2163 static void galagaMemoryMap3(void)
2164 {
2165 ZetMapMemory(memory.Z80.rom3, 0x0000, 0x3fff, MAP_ROM);
2166 ZetMapMemory(memory.RAM.video, 0x8000, 0x87ff, MAP_RAM);
2167 ZetMapMemory(memory.RAM.shared1, 0x8800, 0x8bff, MAP_RAM);
2168 ZetMapMemory(memory.RAM.shared2, 0x9000, 0x93ff, MAP_RAM);
2169 ZetMapMemory(memory.RAM.shared3, 0x9800, 0x9bff, MAP_RAM);
2170 }
2171
tilemap_callback(galaga_fg)2172 static tilemap_callback ( galaga_fg )
2173 {
2174 INT32 code = memory.RAM.video[offs + 0x000] & 0x7f;
2175 INT32 colour = memory.RAM.video[offs + 0x400] & 0x3f;
2176
2177 TILE_SET_INFO(0, code, colour, 0);
2178 }
2179
galagaCharDecode(void)2180 static INT32 galagaCharDecode(void)
2181 {
2182 GfxDecode(
2183 GALAGA_NUM_OF_CHAR,
2184 NAMCO_2BIT_PALETTE_BITS,
2185 8, 8,
2186 (INT32*)planeOffsets2Bit,
2187 (INT32*)xOffsets8x8Tiles2Bit,
2188 (INT32*)yOffsets8x8Tiles2Bit,
2189 GALAGA_SIZE_OF_CHAR_IN_BYTES,
2190 tempRom,
2191 graphics.fgChars
2192 );
2193
2194 return 0;
2195 }
2196
galagaSpriteDecode(void)2197 static INT32 galagaSpriteDecode(void)
2198 {
2199 GfxDecode(
2200 GALAGA_NUM_OF_SPRITE,
2201 NAMCO_2BIT_PALETTE_BITS,
2202 16, 16,
2203 (INT32*)planeOffsets2Bit,
2204 (INT32*)xOffsets16x16Tiles2Bit,
2205 (INT32*)yOffsets16x16Tiles2Bit,
2206 GALAGA_SIZE_OF_SPRITE_IN_BYTES,
2207 tempRom,
2208 graphics.sprites
2209 );
2210
2211 return 0;
2212 }
2213
galagaTilemapConfig(void)2214 static INT32 galagaTilemapConfig(void)
2215 {
2216 GenericTilemapInit(
2217 0, //TILEMAP_FG,
2218 namco_map_scan,
2219 galaga_fg_map_callback,
2220 8, 8,
2221 NAMCO_TMAP_WIDTH, NAMCO_TMAP_HEIGHT
2222 );
2223
2224 GenericTilemapSetGfx(
2225 0, //TILEMAP_FG,
2226 graphics.fgChars,
2227 NAMCO_2BIT_PALETTE_BITS,
2228 8, 8,
2229 (GALAGA_NUM_OF_CHAR * 8 * 8),
2230 0x0,
2231 (GALAGA_PALETTE_SIZE_CHARS - 1)
2232 );
2233
2234 GenericTilemapSetTransparent(0, 0);
2235
2236 GenericTilemapSetOffsets(TMAP_GLOBAL, 0, 0);
2237
2238 return 0;
2239 }
2240
galagaZ80WriteStars(UINT16 offset,UINT8 dta)2241 static void galagaZ80WriteStars(UINT16 offset, UINT8 dta)
2242 {
2243 stars.control[offset] = dta & 0x01;
2244 }
2245
2246 #define GALAGA_3BIT_PALETTE_SIZE 32
2247 #define GALAGA_2BIT_PALETTE_SIZE 64
2248
galagaCalcPalette(void)2249 static void galagaCalcPalette(void)
2250 {
2251 UINT32 palette3Bit[GALAGA_3BIT_PALETTE_SIZE];
2252
2253 for (INT32 i = 0; i < GALAGA_3BIT_PALETTE_SIZE; i ++)
2254 {
2255 INT32 r = Colour3Bit[(memory.PROM.palette[i] >> 0) & 0x07];
2256 INT32 g = Colour3Bit[(memory.PROM.palette[i] >> 3) & 0x07];
2257 INT32 b = Colour3Bit[(memory.PROM.palette[i] >> 5) & 0x06];
2258
2259 palette3Bit[i] = BurnHighCol(r, g, b, 0);
2260 }
2261
2262 for (INT32 i = 0; i < GALAGA_PALETTE_SIZE_CHARS; i ++)
2263 {
2264 graphics.palette[GALAGA_PALETTE_OFFSET_CHARS + i] =
2265 palette3Bit[((memory.PROM.charLookup[i]) & 0x0f) + 0x10];
2266 }
2267
2268 for (INT32 i = 0; i < GALAGA_PALETTE_SIZE_SPRITES; i ++)
2269 {
2270 graphics.palette[GALAGA_PALETTE_OFFSET_SPRITE + i] =
2271 palette3Bit[memory.PROM.spriteLookup[i] & 0x0f];
2272 }
2273
2274 UINT32 palette2Bit[GALAGA_2BIT_PALETTE_SIZE];
2275
2276 for (INT32 i = 0; i < GALAGA_2BIT_PALETTE_SIZE; i ++)
2277 {
2278 INT32 r = Colour2Bit[(i >> 0) & 0x03];
2279 INT32 g = Colour2Bit[(i >> 2) & 0x03];
2280 INT32 b = Colour2Bit[(i >> 4) & 0x03];
2281
2282 palette2Bit[i] = BurnHighCol(r, g, b, 0);
2283 }
2284
2285 for (INT32 i = 0; i < GALAGA_PALETTE_SIZE_BGSTARS; i ++)
2286 {
2287 graphics.palette[GALAGA_PALETTE_OFFSET_BGSTARS + i] =
2288 palette2Bit[i];
2289 }
2290
2291 galagaInitStars();
2292 }
2293
galagaInitStars(void)2294 static void galagaInitStars(void)
2295 {
2296 /*
2297 Galaga star line and pixel locations pulled directly from
2298 a clocked stepping of the 05 starfield. The chip was clocked
2299 on a test rig with hblank and vblank simulated, each X & Y
2300 location of a star being recorded along with it's color value.
2301
2302 The lookup table is generated using a reverse engineered
2303 linear feedback shift register + XOR boolean expression.
2304
2305 Because the starfield begins generating stars at the point
2306 in time it's enabled the exact horiz location of the stars
2307 on Galaga depends on the length of time of the POST for the
2308 original board.
2309
2310 Two control bits determine which of two sets are displayed
2311 set 0 or 1 and simultaneously 2 or 3.
2312
2313 There are 63 stars in each set, 126 displayed at any one time
2314 Code: jmakovicka, based on info from http://www.pin4.at/pro_custom_05xx.php
2315 */
2316
2317 if (machine.starsInitted) return;
2318 machine.starsInitted = 1;
2319 bprintf(0, _T("init stars!\n"));
2320
2321 const UINT16 feed = 0x9420;
2322
2323 INT32 idx = 0;
2324 for (UINT32 sf = 0; sf < 4; ++ sf)
2325 {
2326 // starfield select flags
2327 UINT16 sf1 = (sf >> 1) & 1;
2328 UINT16 sf2 = sf & 1;
2329
2330 UINT16 i = 0x70cc;
2331 for (UINT32 cnt = 0; cnt < 65535; ++ cnt)
2332 {
2333 // output enable lookup
2334 UINT16 xor1 = i ^ (i >> 3);
2335 UINT16 xor2 = xor1 ^ (i >> 2);
2336 UINT16 oe = (sf1 ? 0 : 0x4000) | ((sf1 ^ sf2) ? 0 : 0x1000);
2337 if ( ( 0x8007 == ( i & 0x8007) ) &&
2338 ( 0x2008 == (~i & 0x2008) ) &&
2339 ( (sf1 ? 0 : 0x0100) == (xor1 & 0x0100) ) &&
2340 ( (sf2 ? 0 : 0x0040) == (xor2 & 0x0040) ) &&
2341 ( oe == (i & 0x5000) ) &&
2342 ( cnt >= (256 * 4) ) )
2343 {
2344 // color lookup
2345 UINT16 xor3 = (i >> 1) ^ (i >> 6);
2346 UINT16 clr = (
2347 ( (i >> 9) & 0x07)
2348 | ( ( xor3 ^ (i >> 4) ^ (i >> 7)) & 0x08)
2349 | (~xor3 & 0x10)
2350 | ( ( (i >> 2) ^ (i >> 5)) & 0x20) )
2351 ^ ( (i & 0x4000) ? 0 : 0x24)
2352 ^ ( ( ((i >> 2) ^ i) & 0x1000) ? 0x21 : 0);
2353
2354 starSeedTable[idx].x = cnt % 256;
2355 starSeedTable[idx].y = cnt / 256;
2356 starSeedTable[idx].colour = clr;
2357 starSeedTable[idx].set = sf;
2358 ++ idx;
2359 }
2360
2361 // update the LFSR
2362 if (i & 1) i = (i >> 1) ^ feed;
2363 else i = (i >> 1);
2364 }
2365 }
2366 }
2367
galagaRenderStars(void)2368 static void galagaRenderStars(void)
2369 {
2370 if (1 == stars.control[5])
2371 {
2372 INT32 setA = stars.control[3];
2373 INT32 setB = stars.control[4] | 0x02;
2374
2375 for (INT32 starCounter = 0; starCounter < MAX_STARS; starCounter ++)
2376 {
2377 if ( (setA == starSeedTable[starCounter].set) ||
2378 (setB == starSeedTable[starCounter].set) )
2379 {
2380 INT32 x = ( starSeedTable[starCounter].x + stars.scrollX) % 256 + 16;
2381 INT32 y = ((nScreenHeight / 2) + starSeedTable[starCounter].y + stars.scrollY) % 256;
2382
2383 if ( (x >= 0) && (x < nScreenWidth) &&
2384 (y >= 0) && (y < nScreenHeight) )
2385 {
2386 pTransDraw[(y * nScreenWidth) + x] = starSeedTable[starCounter].colour + GALAGA_PALETTE_OFFSET_BGSTARS;
2387 }
2388 }
2389
2390 }
2391 }
2392 }
2393
galagaStarScroll(void)2394 static void galagaStarScroll(void)
2395 {
2396 static const INT32 speeds[8] = { -1, -2, -3, 0, 3, 2, 1, 0 };
2397
2398 stars.scrollX += speeds[stars.control[0] + (stars.control[1] * 2) + (stars.control[2] * 4)];
2399 }
2400
galagaRenderChars(void)2401 static void galagaRenderChars(void)
2402 {
2403 GenericTilemapSetScrollX(0, 0);
2404 GenericTilemapSetScrollY(0, 0);
2405 GenericTilemapSetEnable(0, 1);
2406 GenericTilemapDraw(0, pTransDraw, 0 | TMAP_TRANSPARENT);
2407 }
2408
galagaGetSpriteParams(struct Namco_Sprite_Params * spriteParams,UINT32 offset)2409 static UINT32 galagaGetSpriteParams(struct Namco_Sprite_Params *spriteParams, UINT32 offset)
2410 {
2411 UINT8 *spriteRam1 = memory.RAM.shared1 + 0x380;
2412 UINT8 *spriteRam2 = memory.RAM.shared2 + 0x380;
2413 UINT8 *spriteRam3 = memory.RAM.shared3 + 0x380;
2414
2415 spriteParams->sprite = spriteRam1[offset + 0] & 0x7f;
2416 spriteParams->colour = spriteRam1[offset + 1] & 0x3f;
2417
2418 spriteParams->xStart = spriteRam2[offset + 1] - 40 + (0x100 * (spriteRam3[offset + 1] & 0x03));
2419 spriteParams->yStart = NAMCO_SCREEN_WIDTH - spriteRam2[offset + 0] + 1;
2420 spriteParams->xStep = 16;
2421 spriteParams->yStep = 16;
2422
2423 spriteParams->flags = spriteRam3[offset + 0] & 0x0f;
2424
2425 if (spriteParams->flags & ySize)
2426 {
2427 if (spriteParams->flags & yFlip)
2428 {
2429 spriteParams->yStep = -16;
2430 }
2431 else
2432 {
2433 spriteParams->yStart -= 16;
2434 }
2435 }
2436
2437 if (spriteParams->flags & xSize)
2438 {
2439 if (spriteParams->flags & xFlip)
2440 {
2441 spriteParams->xStart += 16;
2442 spriteParams->xStep = -16;
2443 }
2444 }
2445
2446 spriteParams->paletteBits = NAMCO_2BIT_PALETTE_BITS;
2447 spriteParams->paletteOffset = GALAGA_PALETTE_OFFSET_SPRITE;
2448
2449 return 1;
2450 }
2451
galagaScan(INT32 nAction,INT32 * pnMin)2452 static INT32 galagaScan(INT32 nAction, INT32 *pnMin)
2453 {
2454 if (nAction & ACB_DRIVER_DATA) {
2455 SCAN_VAR(stars.scrollX);
2456 SCAN_VAR(stars.scrollY);
2457 SCAN_VAR(stars.control);
2458 }
2459
2460 return DrvScan(nAction, pnMin);
2461 }
2462
2463 struct BurnDriver BurnDrvGalaga =
2464 {
2465 /* filename of zip without extension = */ "galaga",
2466 /* filename of parent, no extension = */ NULL,
2467 /* filename of board ROMs = */ NULL,
2468 /* filename of samples ZIP = */ "galaga",
2469 /* date = */ "1981",
2470 /* FullName = */ "Galaga (Namco rev. B)\0",
2471 /* Comment = */ NULL,
2472 /* Manufacturer = */ "Namco",
2473 /* System = */ "Miscellaneous",
2474 /* FullName = */ NULL,
2475 /* Comment = */ NULL,
2476 /* Manufacturer = */ NULL,
2477 /* System = */ NULL,
2478 /* Flags = */ BDF_GAME_WORKING |
2479 BDF_ORIENTATION_VERTICAL |
2480 BDF_ORIENTATION_FLIPPED |
2481 BDF_HISCORE_SUPPORTED,
2482 /* No of Players = */ 2,
2483 /* Hardware Type = */ HARDWARE_MISC_PRE90S,
2484 /* Genre = */ GBF_VERSHOOT,
2485 /* Family = */ 0,
2486 /* GetZipName func = */ NULL,
2487 /* GetROMInfo func = */ GalagaRomInfo,
2488 /* GetROMName func = */ GalagaRomName,
2489 /* GetHDDInfo func = */ NULL,
2490 /* GetHDDName func = */ NULL,
2491 /* GetSampleInfo func = */ GalagaSampleInfo,
2492 /* GetSampleName func = */ GalagaSampleName,
2493 /* GetInputInfo func = */ GalagaInputInfo,
2494 /* GetDIPInfo func = */ GalagaDIPInfo,
2495 /* Init func = */ galagaInit,
2496 /* Exit func = */ DrvExit,
2497 /* Frame func = */ DrvFrame,
2498 /* Redraw func = */ DrvDraw,
2499 /* Areascan func = */ galagaScan,
2500 /* Recalc Palette = */ NULL,
2501 /* Palette Entries count = */ GALAGA_PALETTE_SIZE,
2502 /* Width, Height = */ NAMCO_SCREEN_WIDTH, NAMCO_SCREEN_HEIGHT,
2503 /* xAspect, yAspect = */ 3, 4
2504 };
2505
2506 struct BurnDriver BurnDrvGalagao =
2507 {
2508 /* filename of zip without extension = */ "galagao",
2509 /* filename of parent, no extension = */ "galaga",
2510 /* filename of board ROMs = */ NULL,
2511 /* filename of samples ZIP = */ "galaga",
2512 /* date = */ "1981",
2513 /* FullName = */ "Galaga (Namco)\0",
2514 /* Comment = */ NULL,
2515 /* Manufacturer = */ "Namco",
2516 /* System = */ "Miscellaneous",
2517 /* FullName = */ NULL,
2518 /* Comment = */ NULL,
2519 /* Manufacturer = */ NULL,
2520 /* System = */ NULL,
2521 /* Flags = */ BDF_GAME_WORKING |
2522 BDF_CLONE |
2523 BDF_ORIENTATION_VERTICAL |
2524 BDF_ORIENTATION_FLIPPED |
2525 BDF_HISCORE_SUPPORTED,
2526 /* No of Players = */ 2,
2527 /* Hardware Type = */ HARDWARE_MISC_PRE90S,
2528 /* Genre = */ GBF_VERSHOOT,
2529 /* Family = */ 0,
2530 /* GetZipName func = */ NULL,
2531 /* GetROMInfo func = */ GalagaoRomInfo,
2532 /* GetROMName func = */ GalagaoRomName,
2533 /* GetHDDInfo func = */ NULL,
2534 /* GetHDDName func = */ NULL,
2535 /* GetSampleInfo func = */ GalagaSampleInfo,
2536 /* GetSampleName func = */ GalagaSampleName,
2537 /* GetInputInfo func = */ GalagaInputInfo,
2538 /* GetDIPInfo func = */ GalagaDIPInfo,
2539 /* Init func = */ galagaInit,
2540 /* Exit func = */ DrvExit,
2541 /* Frame func = */ DrvFrame,
2542 /* Redraw func = */ DrvDraw,
2543 /* Areascan func = */ galagaScan,
2544 /* Recalc Palette = */ NULL,
2545 /* Palette Entries count = */ GALAGA_PALETTE_SIZE,
2546 /* Width, Height = */ NAMCO_SCREEN_WIDTH, NAMCO_SCREEN_HEIGHT,
2547 /* xAspect, yAspect = */ 3, 4
2548 };
2549
2550 struct BurnDriver BurnDrvGalagamw =
2551 {
2552 /* filename of zip without extension = */ "galagamw",
2553 /* filename of parent, no extension = */ "galaga",
2554 /* filename of board ROMs = */ NULL,
2555 /* filename of samples ZIP = */ "galaga",
2556 /* date = */ "1981",
2557 /* FullName = */ "Galaga (Midway set 1)\0",
2558 /* Comment = */ NULL,
2559 /* Manufacturer = */ "Namco (Midway License)",
2560 /* System = */ "Miscellaneous",
2561 /* FullName = */ NULL,
2562 /* Comment = */ NULL,
2563 /* Manufacturer = */ NULL,
2564 /* System = */ NULL,
2565 /* Flags = */ BDF_GAME_WORKING |
2566 BDF_CLONE |
2567 BDF_ORIENTATION_VERTICAL |
2568 BDF_ORIENTATION_FLIPPED |
2569 BDF_HISCORE_SUPPORTED,
2570 /* No of Players = */ 2,
2571 /* Hardware Type = */ HARDWARE_MISC_PRE90S,
2572 /* Genre = */ GBF_VERSHOOT,
2573 /* Family = */ 0,
2574 /* GetZipName func = */ NULL,
2575 /* GetROMInfo func = */ GalagamwRomInfo,
2576 /* GetROMName func = */ GalagamwRomName,
2577 /* GetHDDInfo func = */ NULL,
2578 /* GetHDDName func = */ NULL,
2579 /* GetSampleInfo func = */ GalagaSampleInfo,
2580 /* GetSampleName func = */ GalagaSampleName,
2581 /* GetInputInfo func = */ GalagaInputInfo,
2582 /* GetDIPInfo func = */ GalagamwDIPInfo,
2583 /* Init func = */ galagaInit,
2584 /* Exit func = */ DrvExit,
2585 /* Frame func = */ DrvFrame,
2586 /* Redraw func = */ DrvDraw,
2587 /* Areascan func = */ galagaScan,
2588 /* Recalc Palette = */ NULL,
2589 /* Palette Entries count = */ GALAGA_PALETTE_SIZE,
2590 /* Width, Height = */ NAMCO_SCREEN_WIDTH, NAMCO_SCREEN_HEIGHT,
2591 /* xAspect, yAspect = */ 3, 4
2592 };
2593
2594 struct BurnDriver BurnDrvGalagamk =
2595 {
2596 /* filename of zip without extension = */ "galagamk",
2597 /* filename of parent, no extension = */ "galaga",
2598 /* filename of board ROMs = */ NULL,
2599 /* filename of samples ZIP = */ "galaga",
2600 /* date = */ "1981",
2601 /* FullName = */ "Galaga (Midway set 2)\0",
2602 /* Comment = */ NULL,
2603 /* Manufacturer = */ "Namco (Midway License)",
2604 /* System = */ "Miscellaneous",
2605 /* FullName = */ NULL,
2606 /* Comment = */ NULL,
2607 /* Manufacturer = */ NULL,
2608 /* System = */ NULL,
2609 /* Flags = */ BDF_GAME_WORKING |
2610 BDF_CLONE |
2611 BDF_ORIENTATION_VERTICAL |
2612 BDF_ORIENTATION_FLIPPED |
2613 BDF_HISCORE_SUPPORTED,
2614 /* No of Players = */ 2,
2615 /* Hardware Type = */ HARDWARE_MISC_PRE90S,
2616 /* Genre = */ GBF_VERSHOOT,
2617 /* Family = */ 0,
2618 /* GetZipName func = */ NULL,
2619 /* GetROMInfo func = */ GalagamkRomInfo,
2620 /* GetROMName func = */ GalagamkRomName,
2621 /* GetHDDInfo func = */ NULL,
2622 /* GetHDDName func = */ NULL,
2623 /* GetSampleInfo func = */ GalagaSampleInfo,
2624 /* GetSampleName func = */ GalagaSampleName,
2625 /* GetInputInfo func = */ GalagaInputInfo,
2626 /* GetDIPInfo func = */ GalagaDIPInfo,
2627 /* Init func = */ galagaInit,
2628 /* Exit func = */ DrvExit,
2629 /* Frame func = */ DrvFrame,
2630 /* Redraw func = */ DrvDraw,
2631 /* Areascan func = */ galagaScan,
2632 /* Recalc Palette = */ NULL,
2633 /* Palette Entries count = */ GALAGA_PALETTE_SIZE,
2634 /* Width, Height = */ NAMCO_SCREEN_WIDTH, NAMCO_SCREEN_HEIGHT,
2635 /* xAspect, yAspect = */ 3, 4
2636 };
2637
2638 struct BurnDriver BurnDrvGalagamf =
2639 {
2640 /* filename of zip without extension = */ "galagamf",
2641 /* filename of parent, no extension = */ "galaga",
2642 /* filename of board ROMs = */ NULL,
2643 /* filename of samples ZIP = */ "galaga",
2644 /* date = */ "1981",
2645 /* FullName = */ "Galaga (Midway set 1 with fast shoot hack)\0",
2646 /* Comment = */ NULL,
2647 /* Manufacturer = */ "Namco (Midway License)",
2648 /* System = */ "Miscellaneous",
2649 /* FullName = */ NULL,
2650 /* Comment = */ NULL,
2651 /* Manufacturer = */ NULL,
2652 /* System = */ NULL,
2653 /* Flags = */ BDF_GAME_WORKING |
2654 BDF_CLONE |
2655 BDF_ORIENTATION_VERTICAL |
2656 BDF_ORIENTATION_FLIPPED |
2657 BDF_HISCORE_SUPPORTED,
2658 /* No of Players = */ 2,
2659 /* Hardware Type = */ HARDWARE_MISC_PRE90S,
2660 /* Genre = */ GBF_VERSHOOT,
2661 /* Family = */ 0,
2662 /* GetZipName func = */ NULL,
2663 /* GetROMInfo func = */ GalagamfRomInfo,
2664 /* GetROMName func = */ GalagamfRomName,
2665 /* GetHDDInfo func = */ NULL,
2666 /* GetHDDName func = */ NULL,
2667 /* GetSampleInfo func = */ GalagaSampleInfo,
2668 /* GetSampleName func = */ GalagaSampleName,
2669 /* GetInputInfo func = */ GalagaInputInfo,
2670 /* GetDIPInfo func = */ GalagamwDIPInfo,
2671 /* Init func = */ galagaInit,
2672 /* Exit func = */ DrvExit,
2673 /* Frame func = */ DrvFrame,
2674 /* Redraw func = */ DrvDraw,
2675 /* Areascan func = */ galagaScan,
2676 /* Recalc Palette = */ NULL,
2677 /* Palette Entries count = */ GALAGA_PALETTE_SIZE,
2678 /* Width, Height = */ NAMCO_SCREEN_WIDTH, NAMCO_SCREEN_HEIGHT,
2679 /* xAspect, yAspect = */ 3, 4
2680 };
2681
2682 struct BurnDriver BurnDrvGallag =
2683 {
2684 /* filename of zip without extension = */ "gallag",
2685 /* filename of parent, no extension = */ "galaga",
2686 /* filename of board ROMs = */ NULL,
2687 /* filename of samples ZIP = */ "galaga",
2688 /* date = */ "1981",
2689 /* FullName = */ "Gallag\0",
2690 /* Comment = */ NULL,
2691 /* Manufacturer = */ "bootleg",
2692 /* System = */ "Miscellaneous",
2693 /* FullName = */ NULL,
2694 /* Comment = */ NULL,
2695 /* Manufacturer = */ NULL,
2696 /* System = */ NULL,
2697 /* Flags = */ BDF_GAME_WORKING |
2698 BDF_CLONE |
2699 BDF_ORIENTATION_VERTICAL |
2700 BDF_ORIENTATION_FLIPPED |
2701 BDF_BOOTLEG |
2702 BDF_HISCORE_SUPPORTED,
2703 /* No of Players = */ 2,
2704 /* Hardware Type = */ HARDWARE_MISC_PRE90S,
2705 /* Genre = */ GBF_VERSHOOT,
2706 /* Family = */ 0,
2707 /* GetZipName func = */ NULL,
2708 /* GetROMInfo func = */ GallagRomInfo,
2709 /* GetROMName func = */ GallagRomName,
2710 /* GetHDDInfo func = */ NULL,
2711 /* GetHDDName func = */ NULL,
2712 /* GetSampleInfo func = */ GalagaSampleInfo,
2713 /* GetSampleName func = */ GalagaSampleName,
2714 /* GetInputInfo func = */ GalagaInputInfo,
2715 /* GetDIPInfo func = */ GalagaDIPInfo,
2716 /* Init func = */ gallagInit,
2717 /* Exit func = */ DrvExit,
2718 /* Frame func = */ DrvFrame,
2719 /* Redraw func = */ DrvDraw,
2720 /* Areascan func = */ galagaScan,
2721 /* Recalc Palette = */ NULL,
2722 /* Palette Entries count = */ GALAGA_PALETTE_SIZE,
2723 /* Width, Height = */ NAMCO_SCREEN_WIDTH, NAMCO_SCREEN_HEIGHT,
2724 /* xAspect, yAspect = */ 3, 4
2725 };
2726
2727 struct BurnDriver BurnDrvNebulbee =
2728 {
2729 /* filename of zip without extension = */ "nebulbee",
2730 /* filename of parent, no extension = */ "galaga",
2731 /* filename of board ROMs = */ NULL,
2732 /* filename of samples ZIP = */ "galaga",
2733 /* date = */ "1981",
2734 /* FullName = */ "Nebulous Bee\0",
2735 /* Comment = */ NULL,
2736 /* Manufacturer = */ "bootleg",
2737 /* System = */ "Miscellaneous",
2738 /* FullName = */ NULL,
2739 /* Comment = */ NULL,
2740 /* Manufacturer = */ NULL,
2741 /* System = */ NULL,
2742 /* Flags = */ BDF_GAME_WORKING |
2743 BDF_CLONE |
2744 BDF_ORIENTATION_VERTICAL |
2745 BDF_ORIENTATION_FLIPPED |
2746 BDF_BOOTLEG |
2747 BDF_HISCORE_SUPPORTED,
2748 /* No of Players = */ 2,
2749 /* Hardware Type = */ HARDWARE_MISC_PRE90S,
2750 /* Genre = */ GBF_VERSHOOT,
2751 /* Family = */ 0,
2752 /* GetZipName func = */ NULL,
2753 /* GetROMInfo func = */ NebulbeeRomInfo,
2754 /* GetROMName func = */ NebulbeeRomName,
2755 /* GetHDDInfo func = */ NULL,
2756 /* GetHDDName func = */ NULL,
2757 /* GetSampleInfo func = */ GalagaSampleInfo,
2758 /* GetSampleName func = */ GalagaSampleName,
2759 /* GetInputInfo func = */ GalagaInputInfo,
2760 /* GetDIPInfo func = */ GalagaDIPInfo,
2761 /* Init func = */ gallagInit,
2762 /* Exit func = */ DrvExit,
2763 /* Frame func = */ DrvFrame,
2764 /* Redraw func = */ DrvDraw,
2765 /* Areascan func = */ galagaScan,
2766 /* Recalc Palette = */ NULL,
2767 /* Palette Entries count = */ GALAGA_PALETTE_SIZE,
2768 /* Width, Height = */ NAMCO_SCREEN_WIDTH, NAMCO_SCREEN_HEIGHT,
2769 /* xAspect, yAspect = */ 3, 4
2770 };
2771
2772 /* === Dig Dug === */
2773
2774 static struct BurnInputInfo DigdugInputList[] =
2775 {
2776 {"P1 Start" , BIT_DIGITAL , &input.ports[0].current.bits.bit[2], "p1 start" },
2777 {"P2 Start" , BIT_DIGITAL , &input.ports[0].current.bits.bit[3], "p2 start" },
2778 {"P1 Coin" , BIT_DIGITAL , &input.ports[0].current.bits.bit[4], "p1 coin" },
2779 {"P2 Coin" , BIT_DIGITAL , &input.ports[0].current.bits.bit[5], "p2 coin" },
2780
2781 {"P1 Up" , BIT_DIGITAL , &input.ports[1].current.bits.bit[0], "p1 up" },
2782 {"P1 Down" , BIT_DIGITAL , &input.ports[1].current.bits.bit[2], "p1 down" },
2783 {"P1 Left" , BIT_DIGITAL , &input.ports[1].current.bits.bit[3], "p1 left" },
2784 {"P1 Right" , BIT_DIGITAL , &input.ports[1].current.bits.bit[1], "p1 right" },
2785 {"P1 Fire 1" , BIT_DIGITAL , &input.ports[1].current.bits.bit[4], "p1 fire 1" },
2786
2787 {"P2 Up (cocktail)" , BIT_DIGITAL , &input.ports[2].current.bits.bit[0], "p2 up" },
2788 {"P2 Down (Cocktail)" , BIT_DIGITAL , &input.ports[2].current.bits.bit[2], "p2 down" },
2789 {"P2 Left (Cocktail)" , BIT_DIGITAL , &input.ports[2].current.bits.bit[3], "p2 left" },
2790 {"P2 Right (Cocktail)" , BIT_DIGITAL , &input.ports[2].current.bits.bit[1], "p2 right" },
2791 {"P2 Fire 1 (Cocktail)" , BIT_DIGITAL , &input.ports[2].current.bits.bit[4], "p2 fire 1" },
2792
2793 {"Service" , BIT_DIGITAL , &input.ports[0].current.bits.bit[7], "service" },
2794 {"Reset" , BIT_DIGITAL , &input.reset, "reset" },
2795 {"Dip 1" , BIT_DIPSWITCH, &input.dip[0].byte, "dip" },
2796 {"Dip 2" , BIT_DIPSWITCH, &input.dip[1].byte, "dip" },
2797 };
2798
2799 STDINPUTINFO(Digdug)
2800
2801 #define DIGDUG_NUM_OF_DIPSWITCHES 2
2802
2803 static struct BurnDIPInfo DigdugDIPList[]=
2804 {
2805 { 0x10, 0xf0, 0xff, 0xa1, NULL },
2806
2807 // nOffset, nID, nMask, nDefault, NULL
2808 { 0x00, 0xff, 0xff, 0xa1, NULL },
2809 { 0x01, 0xff, 0xff, 0x24, NULL },
2810
2811 // Dip 1
2812 // x, DIP_GRP, x, OptionCnt, szTitle
2813 { 0, 0xfe, 0, 8, "Coin B" },
2814 // nInput, nFlags, nMask, nSetting, szText
2815 { 0x00, 0x01, 0x07, 0x07, "3 Coins 1 Credits" },
2816 { 0x00, 0x01, 0x07, 0x03, "2 Coins 1 Credits" },
2817 { 0x00, 0x01, 0x07, 0x05, "2 Coins 3 Credits" },
2818 { 0x00, 0x01, 0x07, 0x01, "1 Coin 1 Credits" },
2819 { 0x00, 0x01, 0x07, 0x06, "1 Coin 2 Credits" },
2820 { 0x00, 0x01, 0x07, 0x02, "1 Coin 3 Credits" },
2821 { 0x00, 0x01, 0x07, 0x04, "1 Coin 6 Credits" },
2822 { 0x00, 0x01, 0x07, 0x00, "1 Coin 7 Credits" },
2823
2824 // x, DIP_GRP, x, OptionCnt, szTitle
2825 { 0, 0xfe, 0, 8, "Bonus Life (1,2,3) / (5)" },
2826 // nInput, nFlags, nMask, nSetting, szText
2827 { 0x00, 0x01, 0x38, 0x20, "10K & Every 40K / 20K & Every 60K" },
2828 { 0x00, 0x01, 0x38, 0x10, "10K & Every 50K / 30K & Every 80K" },
2829 { 0x00, 0x01, 0x38, 0x30, "20K & Every 60K / 20K & 50K Only" },
2830 { 0x00, 0x01, 0x38, 0x08, "20K & Every 70K / 20K & 60K Only" },
2831 { 0x00, 0x01, 0x38, 0x28, "10K & 40K Only / 30K & 70K Only" },
2832 { 0x00, 0x01, 0x38, 0x18, "20K & 60K Only / 20K Only" },
2833 { 0x00, 0x01, 0x38, 0x38, "10K Only / 30K Only" },
2834 { 0x00, 0x01, 0x38, 0x00, "None / None" },
2835
2836 // x, DIP_GRP, x, OptionCnt, szTitle
2837 { 0, 0xfe, 0, 4, "Lives" },
2838 // nInput, nFlags, nMask, nSetting, szText
2839 { 0x00, 0x01, 0xc0, 0x00, "1" },
2840 { 0x00, 0x01, 0xc0, 0x40, "2" },
2841 { 0x00, 0x01, 0xc0, 0x80, "3" },
2842 { 0x00, 0x01, 0xc0, 0xc0, "5" },
2843
2844 // DIP 2
2845 // x, DIP_GRP, x, OptionCnt, szTitle
2846 { 0, 0xfe, 0, 4, "Coin A" },
2847 // nInput, nFlags, nMask, nSetting, szText
2848 { 0x01, 0x01, 0xc0, 0x40, "2 Coins 1 Credits" },
2849 { 0x01, 0x01, 0xc0, 0x00, "1 Coin 1 Credits" },
2850 { 0x01, 0x01, 0xc0, 0xc0, "2 Coins 3 Credits" },
2851 { 0x01, 0x01, 0xc0, 0x80, "1 Coin 2 Credits" },
2852
2853 // x, DIP_GRP, x, OptionCnt, szTitle
2854 { 0, 0xfe, 0, 2, "Freeze" },
2855 // nInput, nFlags, nMask, nSetting, szText
2856 { 0x01, 0x01, 0x20, 0x20, "Off" },
2857 { 0x01, 0x01, 0x20, 0x00, "On" },
2858
2859 // x, DIP_GRP, x, OptionCnt, szTitle
2860 { 0, 0xfe, 0, 2, "Demo Sounds" },
2861 // nInput, nFlags, nMask, nSetting, szText
2862 { 0x01, 0x01, 0x10, 0x10, "Off" },
2863 { 0x01, 0x01, 0x10, 0x00, "On" },
2864
2865 // x, DIP_GRP, x, OptionCnt, szTitle
2866 { 0, 0xfe, 0, 2, "Allow Continue" },
2867 // nInput, nFlags, nMask, nSetting, szText
2868 { 0x01, 0x01, 0x08, 0x08, "No" },
2869 { 0x01, 0x01, 0x08, 0x00, "Yes" },
2870
2871 // x, DIP_GRP, x, OptionCnt, szTitle
2872 { 0, 0xfe, 0, 2, "Cabinet" },
2873 // nInput, nFlags, nMask, nSetting, szText
2874 { 0x01, 0x01, 0x04, 0x04, "Upright" },
2875 { 0x01, 0x01, 0x04, 0x00, "Cocktail" },
2876
2877 // x, DIP_GRP, x, OptionCnt, szTitle
2878 { 0, 0xfe, 0, 4, "Difficulty" },
2879 // nInput, nFlags, nMask, nSetting, szText
2880 { 0x01, 0x01, 0x03, 0x00, "Easy" },
2881 { 0x01, 0x01, 0x03, 0x02, "Medium" },
2882 { 0x01, 0x01, 0x03, 0x01, "Hard" },
2883 { 0x01, 0x01, 0x03, 0x03, "Hardest" },
2884 };
2885
2886 STDDIPINFO(Digdug)
2887
2888 // Dig Dug (rev 2)
2889
2890 static struct BurnRomInfo digdugRomDesc[] = {
2891 { "dd1a.1", 0x1000, 0xa80ec984, BRF_ESS | BRF_PRG }, // 0 Z80 #1 Program Code
2892 { "dd1a.2", 0x1000, 0x559f00bd, BRF_ESS | BRF_PRG }, // 1
2893 { "dd1a.3", 0x1000, 0x8cbc6fe1, BRF_ESS | BRF_PRG }, // 2
2894 { "dd1a.4", 0x1000, 0xd066f830, BRF_ESS | BRF_PRG }, // 3
2895
2896 { "dd1a.5", 0x1000, 0x6687933b, BRF_ESS | BRF_PRG }, // 4 Z80 #2 Program Code
2897 { "dd1a.6", 0x1000, 0x843d857f, BRF_ESS | BRF_PRG }, // 5
2898
2899 { "dd1.7", 0x1000, 0xa41bce72, BRF_ESS | BRF_PRG }, // 6 Z80 #3 Program Code
2900
2901 { "dd1.9", 0x0800, 0xf14a6fe1, BRF_GRA }, // 7 Characters
2902
2903 { "dd1.15", 0x1000, 0xe22957c8, BRF_GRA }, // 8 Sprites
2904 { "dd1.14", 0x1000, 0x2829ec99, BRF_GRA }, // 9
2905 { "dd1.13", 0x1000, 0x458499e9, BRF_GRA }, // 10
2906 { "dd1.12", 0x1000, 0xc58252a0, BRF_GRA }, // 11
2907
2908 { "dd1.11", 0x1000, 0x7b383983, BRF_GRA }, // 12 Characters 8x8 2bpp
2909
2910 { "dd1.10b", 0x1000, 0x2cf399c2, BRF_GRA }, // 13 Playfield Data
2911
2912 { "136007.113", 0x0020, 0x4cb9da99, BRF_GRA }, // 14 Palette Prom
2913 { "136007.111", 0x0100, 0x00c7c419, BRF_GRA }, // 15 Sprite Color Prom
2914 { "136007.112", 0x0100, 0xe9b3e08e, BRF_GRA }, // 16 Character Color Prom
2915
2916 { "136007.110", 0x0100, 0x7a2815b4, BRF_GRA }, // 17 Namco Sound Proms
2917 { "136007.109", 0x0100, 0x77245b66, BRF_GRA }, // 18
2918 };
2919
2920 STD_ROM_PICK(digdug)
2921 STD_ROM_FN(digdug)
2922
2923 // Dig Dug (Atari, rev 2)
2924
2925 static struct BurnRomInfo digdugatRomDesc[] = {
2926 { "136007.201", 0x1000, 0x23d0b1a4, BRF_ESS | BRF_PRG }, // 0 Z80 #1 Program Code
2927 { "136007.202", 0x1000, 0x5453dc1f, BRF_ESS | BRF_PRG }, // 1
2928 { "136007.203", 0x1000, 0xc9077dfa, BRF_ESS | BRF_PRG }, // 2
2929 { "136007.204", 0x1000, 0xa8fc8eac, BRF_ESS | BRF_PRG }, // 3
2930
2931 { "136007.205", 0x1000, 0x5ba385c5, BRF_ESS | BRF_PRG }, // 4 Z80 #2 Program Code
2932 { "136007.206", 0x1000, 0x382b4011, BRF_ESS | BRF_PRG }, // 5
2933
2934 { "136007.107", 0x1000, 0xa41bce72, BRF_ESS | BRF_PRG }, // 6 Z80 #3 Program Code
2935
2936 { "136007.108", 0x0800, 0x3d24a3af, BRF_GRA }, // 7 Characters
2937
2938 { "136007.116", 0x1000, 0xe22957c8, BRF_GRA }, // 8 Sprites
2939 { "136007.117", 0x1000, 0xa3bbfd85, BRF_GRA }, // 9
2940 { "136007.118", 0x1000, 0x458499e9, BRF_GRA }, // 10
2941 { "136007.119", 0x1000, 0xc58252a0, BRF_GRA }, // 11
2942
2943 { "136007.115", 0x1000, 0x754539be, BRF_GRA }, // 12 Characters 8x8 2bpp
2944
2945 { "136007.114", 0x1000, 0xd6822397, BRF_GRA }, // 13 Playfield Data
2946
2947 { "136007.113", 0x0020, 0x4cb9da99, BRF_GRA }, // 14 Palette Prom
2948 { "136007.111", 0x0100, 0x00c7c419, BRF_GRA }, // 15 Sprite Color Prom
2949 { "136007.112", 0x0100, 0xe9b3e08e, BRF_GRA }, // 16 Character Color Prom
2950
2951 { "136007.110", 0x0100, 0x7a2815b4, BRF_GRA }, // 17 Namco Sound Proms
2952 { "136007.109", 0x0100, 0x77245b66, BRF_GRA }, // 18
2953 };
2954
2955 STD_ROM_PICK(digdugat)
2956 STD_ROM_FN(digdugat)
2957
2958 static struct DigDug_PlayField_Params
2959 {
2960 // Dig Dug playfield stuff
2961 INT32 playField;
2962 INT32 alphaColor;
2963 INT32 playEnable;
2964 INT32 playColor;
2965 } playFieldParams;
2966
2967 #define DIGDUG_NUM_OF_CHAR_PALETTE_BITS 1
2968 #define DIGDUG_NUM_OF_SPRITE_PALETTE_BITS 2
2969 #define DIGDUG_NUM_OF_BGTILE_PALETTE_BITS 2
2970
2971 #define DIGDUG_PALETTE_SIZE_BGTILES 0x100
2972 #define DIGDUG_PALETTE_SIZE_SPRITES 0x100
2973 #define DIGDUG_PALETTE_SIZE_CHARS 0x20
2974 #define DIGDUG_PALETTE_SIZE (DIGDUG_PALETTE_SIZE_CHARS + \
2975 DIGDUG_PALETTE_SIZE_SPRITES + \
2976 DIGDUG_PALETTE_SIZE_BGTILES)
2977
2978 #define DIGDUG_PALETTE_OFFSET_BGTILES 0x0
2979 #define DIGDUG_PALETTE_OFFSET_SPRITE (DIGDUG_PALETTE_OFFSET_BGTILES + \
2980 DIGDUG_PALETTE_SIZE_BGTILES)
2981 #define DIGDUG_PALETTE_OFFSET_CHARS (DIGDUG_PALETTE_OFFSET_SPRITE + \
2982 DIGDUG_PALETTE_SIZE_SPRITES)
2983
2984 #define DIGDUG_NUM_OF_CHAR 0x80
2985 #define DIGDUG_SIZE_OF_CHAR_IN_BYTES 0x40
2986
2987 #define DIGDUG_NUM_OF_SPRITE 0x100
2988 #define DIGDUG_SIZE_OF_SPRITE_IN_BYTES 0x200
2989
2990 #define DIGDUG_NUM_OF_BGTILE 0x100
2991 #define DIGDUG_SIZE_OF_BGTILE_IN_BYTES 0x80
2992
2993 static INT32 digdugInit(void);
2994 static INT32 digdugReset(void);
2995
2996 static void digdugMemoryMap1(void);
2997 static void digdugMemoryMap2(void);
2998 static void digdugMemoryMap3(void);
2999
3000 static INT32 digdugCharDecode(void);
3001 static INT32 digdugBGTilesDecode(void);
3002 static INT32 digdugSpriteDecode(void);
3003 static tilemap_callback(digdug_bg);
3004 static tilemap_callback(digdug_fg);
3005 static INT32 digdugTilemapConfig(void);
3006
3007 static void digdug_pf_latch_w(UINT16 offset, UINT8 dta);
3008 static void digdugZ80Writeb840(UINT16 offset, UINT8 dta);
3009
3010 static void digdugCalcPalette(void);
3011 static void digdugRenderTiles(void);
3012 static UINT32 digdugGetSpriteParams(struct Namco_Sprite_Params *spriteParams, UINT32 offset);
3013
3014 static INT32 digdugScan(INT32 nAction, INT32 *pnMin);
3015
3016 static struct CPU_Config_Def digdugCPU[NAMCO_BRD_CPU_COUNT] =
3017 {
3018 {
3019 /* CPU ID = */ CPU1,
3020 /* CPU Read Func = */ namcoZ80ProgRead,
3021 /* CPU Write Func = */ namcoZ80ProgWrite,
3022 /* Memory Mapping = */ digdugMemoryMap1
3023 },
3024 {
3025 /* CPU ID = */ CPU2,
3026 /* CPU Read Func = */ namcoZ80ProgRead,
3027 /* CPU Write Func = */ namcoZ80ProgWrite,
3028 /* Memory Mapping = */ digdugMemoryMap2
3029 },
3030 {
3031 /* CPU ID = */ CPU3,
3032 /* CPU Read Func = */ namcoZ80ProgRead,
3033 /* CPU Write Func = */ namcoZ80ProgWrite,
3034 /* Memory Mapping = */ digdugMemoryMap3
3035 },
3036 };
3037
3038 static struct CPU_Rd_Table digdugReadTable[] =
3039 {
3040 { 0x6800, 0x6807, namcoZ80ReadDip },
3041 { 0x7000, 0x700f, namcoCustomICsReadDta },
3042 { 0x7100, 0x7100, namcoCustomICsReadCmd },
3043 // EAROM Read
3044 { 0xb800, 0xb83f, earom_read },
3045 { 0x0000, 0x0000, NULL },
3046 };
3047
3048 static struct CPU_Wr_Table digdugWriteTable[] =
3049 {
3050 // EAROM Write
3051 { 0xb800, 0xb83f, earom_write },
3052 { 0x6800, 0x681f, namcoZ80WriteSound },
3053 { 0xb840, 0xb840, digdugZ80Writeb840 },
3054 { 0x6820, 0x6820, namcoZ80WriteCPU1Irq },
3055 { 0x6821, 0x6821, namcoZ80WriteCPU2Irq },
3056 { 0x6822, 0x6822, namcoZ80WriteCPU3Irq },
3057 { 0x6823, 0x6823, namcoZ80WriteCPUReset },
3058 // { 0x6830, 0x6830, WatchDogWriteNotImplemented },
3059 { 0x7000, 0x700f, namcoCustomICsWriteDta },
3060 { 0x7100, 0x7100, namcoCustomICsWriteCmd },
3061 { 0xa000, 0xa006, digdug_pf_latch_w },
3062 { 0xa007, 0xa007, namcoZ80WriteFlipScreen },
3063 { 0x0000, 0x0000, NULL },
3064
3065 };
3066
3067 static struct Memory_Map_Def digdugMemTable[] =
3068 {
3069 { &memory.Z80.rom1, 0x04000, MEM_PGM },
3070 { &memory.Z80.rom2, 0x04000, MEM_PGM },
3071 { &memory.Z80.rom3, 0x04000, MEM_PGM },
3072 { &memory.PROM.palette, 0x00020, MEM_ROM },
3073 { &memory.PROM.charLookup, 0x00100, MEM_ROM },
3074 { &memory.PROM.spriteLookup, 0x00100, MEM_ROM },
3075 { &NamcoSoundProm, 0x00200, MEM_ROM },
3076
3077 { &memory.RAM.video, 0x00800, MEM_RAM },
3078 { &memory.RAM.shared1, 0x00400, MEM_RAM },
3079 { &memory.RAM.shared2, 0x00400, MEM_RAM },
3080 { &memory.RAM.shared3, 0x00400, MEM_RAM },
3081
3082 { (UINT8 **)&gameData, 0x1000, MEM_DATA },
3083 { &graphics.fgChars, DIGDUG_NUM_OF_CHAR * 8 * 8, MEM_DATA },
3084 { &graphics.bgTiles, DIGDUG_NUM_OF_BGTILE * 8 * 8, MEM_DATA },
3085 { &graphics.sprites, DIGDUG_NUM_OF_SPRITE * 16 * 16, MEM_DATA },
3086 { (UINT8 **)&graphics.palette, DIGDUG_PALETTE_SIZE * sizeof(UINT32), MEM_DATA32 },
3087 };
3088
3089 #define DIGDUG_MEM_TBL_SIZE (sizeof(digdugMemTable) / sizeof(struct Memory_Map_Def))
3090
3091 static struct ROM_Load_Def digdugROMTable[] =
3092 {
3093 { &memory.Z80.rom1, 0x00000, NULL },
3094 { &memory.Z80.rom1, 0x01000, NULL },
3095 { &memory.Z80.rom1, 0x02000, NULL },
3096 { &memory.Z80.rom1, 0x03000, NULL },
3097 { &memory.Z80.rom2, 0x00000, NULL },
3098 { &memory.Z80.rom2, 0x01000, NULL },
3099 { &memory.Z80.rom3, 0x00000, NULL },
3100 { &tempRom, 0x00000, digdugCharDecode },
3101 { &tempRom, 0x00000, NULL },
3102 { &tempRom, 0x01000, NULL },
3103 { &tempRom, 0x02000, NULL },
3104 { &tempRom, 0x03000, digdugSpriteDecode },
3105 { &tempRom, 0x00000, digdugBGTilesDecode },
3106 { &gameData, 0x00000, NULL },
3107 { &memory.PROM.palette, 0x00000, NULL },
3108 { &memory.PROM.spriteLookup, 0x00000, NULL },
3109 { &memory.PROM.charLookup, 0x00000, NULL },
3110 { &NamcoSoundProm, 0x00000, NULL },
3111 { &NamcoSoundProm, 0x00100, namcoMachineInit },
3112 };
3113
3114 #define DIGDUG_ROM_TBL_SIZE (sizeof(digdugROMTable) / sizeof(struct ROM_Load_Def))
3115
3116 typedef void (*DrawFunc_t)(void);
3117
3118 static DrawFunc_t digdugDrawFuncs[] =
3119 {
3120 digdugCalcPalette,
3121 digdugRenderTiles,
3122 namcoRenderSprites,
3123 };
3124
3125 #define DIGDUG_DRAW_TBL_SIZE (sizeof(digdugDrawFuncs) / sizeof(digdugDrawFuncs[0]))
3126
3127 static struct Namco_Custom_RW_Entry digdugCustomRWTable[] =
3128 {
3129 { 0x71, namco51xxRead },
3130 { 0xa1, namco51xxWrite },
3131 { 0xb1, namco51xxRead },
3132 { 0xc1, namco51xxWrite },
3133 { 0xd2, namco53xxRead },
3134 { 0x00, NULL }
3135 };
3136
3137 static struct Machine_Config_Def digdugMachineConfig =
3138 {
3139 /*cpus */ digdugCPU,
3140 /*wrAddrList */ digdugWriteTable,
3141 /*rdAddrList */ digdugReadTable,
3142 /*memMapTable */ digdugMemTable,
3143 /*sizeOfMemMapTable */ DIGDUG_MEM_TBL_SIZE,
3144 /*romLayoutTable */ digdugROMTable,
3145 /*sizeOfRomLayoutTable */ DIGDUG_ROM_TBL_SIZE,
3146 /*tempRomSize */ 0x4000,
3147 /*tilemapsConfig */ digdugTilemapConfig,
3148 /*drawLayerTable */ digdugDrawFuncs,
3149 /*drawTableSize */ DIGDUG_DRAW_TBL_SIZE,
3150 /*getSpriteParams */ digdugGetSpriteParams,
3151 /*reset */ digdugReset,
3152 /*customRWTable */ digdugCustomRWTable,
3153 /*n54xxSampleList */ NULL
3154 };
3155
digdugInit(void)3156 static INT32 digdugInit(void)
3157 {
3158 machine.game = NAMCO_DIGDUG;
3159 machine.numOfDips = DIGDUG_NUM_OF_DIPSWITCHES;
3160
3161 machine.config = &digdugMachineConfig;
3162
3163 INT32 retVal = namcoInitBoard();
3164
3165 if (0 == retVal)
3166 earom_init();
3167
3168 return retVal;
3169 }
3170
digdugReset(void)3171 static INT32 digdugReset(void)
3172 {
3173 playFieldParams.playField = 0;
3174 playFieldParams.alphaColor = 0;
3175 playFieldParams.playEnable = 0;
3176 playFieldParams.playColor = 0;
3177
3178 earom_reset();
3179
3180 return DrvDoReset();
3181 }
3182
digdugMemoryMap1(void)3183 static void digdugMemoryMap1(void)
3184 {
3185 ZetMapMemory(memory.Z80.rom1, 0x0000, 0x3fff, MAP_ROM);
3186 ZetMapMemory(memory.RAM.video, 0x8000, 0x87ff, MAP_RAM);
3187 ZetMapMemory(memory.RAM.shared1, 0x8800, 0x8bff, MAP_RAM);
3188 ZetMapMemory(memory.RAM.shared2, 0x9000, 0x93ff, MAP_RAM);
3189 ZetMapMemory(memory.RAM.shared3, 0x9800, 0x9bff, MAP_RAM);
3190 }
3191
digdugMemoryMap2(void)3192 static void digdugMemoryMap2(void)
3193 {
3194 ZetMapMemory(memory.Z80.rom2, 0x0000, 0x3fff, MAP_ROM);
3195 ZetMapMemory(memory.RAM.video, 0x8000, 0x87ff, MAP_RAM);
3196 ZetMapMemory(memory.RAM.shared1, 0x8800, 0x8bff, MAP_RAM);
3197 ZetMapMemory(memory.RAM.shared2, 0x9000, 0x93ff, MAP_RAM);
3198 ZetMapMemory(memory.RAM.shared3, 0x9800, 0x9bff, MAP_RAM);
3199 }
3200
digdugMemoryMap3(void)3201 static void digdugMemoryMap3(void)
3202 {
3203 ZetMapMemory(memory.Z80.rom3, 0x0000, 0x3fff, MAP_ROM);
3204 ZetMapMemory(memory.RAM.video, 0x8000, 0x87ff, MAP_RAM);
3205 ZetMapMemory(memory.RAM.shared1, 0x8800, 0x8bff, MAP_RAM);
3206 ZetMapMemory(memory.RAM.shared2, 0x9000, 0x93ff, MAP_RAM);
3207 ZetMapMemory(memory.RAM.shared3, 0x9800, 0x9bff, MAP_RAM);
3208 }
3209
digdugCharDecode(void)3210 static INT32 digdugCharDecode(void)
3211 {
3212 GfxDecode(
3213 DIGDUG_NUM_OF_CHAR,
3214 DIGDUG_NUM_OF_CHAR_PALETTE_BITS,
3215 8, 8,
3216 (INT32*)planeOffsets1Bit,
3217 (INT32*)xOffsets8x8Tiles1Bit,
3218 (INT32*)yOffsets8x8Tiles1Bit,
3219 DIGDUG_SIZE_OF_CHAR_IN_BYTES,
3220 tempRom,
3221 graphics.fgChars
3222 );
3223
3224 return 0;
3225 }
3226
digdugBGTilesDecode(void)3227 static INT32 digdugBGTilesDecode(void)
3228 {
3229 GfxDecode(
3230 DIGDUG_NUM_OF_BGTILE,
3231 DIGDUG_NUM_OF_BGTILE_PALETTE_BITS,
3232 8, 8,
3233 (INT32*)planeOffsets2Bit,
3234 (INT32*)xOffsets8x8Tiles2Bit,
3235 (INT32*)yOffsets8x8Tiles2Bit,
3236 DIGDUG_SIZE_OF_BGTILE_IN_BYTES,
3237 tempRom,
3238 graphics.bgTiles
3239 );
3240
3241 return 0;
3242 }
3243
digdugSpriteDecode(void)3244 static INT32 digdugSpriteDecode(void)
3245 {
3246 GfxDecode(
3247 DIGDUG_NUM_OF_SPRITE,
3248 DIGDUG_NUM_OF_SPRITE_PALETTE_BITS,
3249 16, 16,
3250 (INT32*)planeOffsets2Bit,
3251 (INT32*)xOffsets16x16Tiles2Bit,
3252 (INT32*)yOffsets16x16Tiles2Bit,
3253 DIGDUG_SIZE_OF_SPRITE_IN_BYTES,
3254 tempRom,
3255 graphics.sprites
3256 );
3257
3258 return 0;
3259 }
3260
tilemap_callback(digdug_fg)3261 static tilemap_callback ( digdug_fg )
3262 {
3263 INT32 code = memory.RAM.video[offs];
3264 INT32 colour = ((code >> 4) & 0x0e) | ((code >> 3) & 2);
3265 code &= 0x7f;
3266
3267 TILE_SET_INFO(1, code, colour, 0);
3268 }
3269
tilemap_callback(digdug_bg)3270 static tilemap_callback ( digdug_bg )
3271 {
3272 UINT8 *pf = gameData + (playFieldParams.playField << 10);
3273 INT8 pfval = pf[offs & 0xfff];
3274 INT32 pfColour = (pfval >> 4) + (playFieldParams.playColor << 4);
3275
3276 TILE_SET_INFO(0, pfval, pfColour, 0);
3277 }
3278
digdugTilemapConfig(void)3279 static INT32 digdugTilemapConfig(void)
3280 {
3281 GenericTilemapInit(
3282 0,
3283 namco_map_scan, digdug_bg_map_callback,
3284 8, 8,
3285 NAMCO_TMAP_WIDTH, NAMCO_TMAP_HEIGHT
3286 );
3287 GenericTilemapSetGfx(
3288 0,
3289 graphics.bgTiles,
3290 DIGDUG_NUM_OF_BGTILE_PALETTE_BITS,
3291 8, 8,
3292 DIGDUG_NUM_OF_BGTILE * 8 * 8,
3293 DIGDUG_PALETTE_OFFSET_BGTILES,
3294 DIGDUG_PALETTE_SIZE_BGTILES - 1
3295 );
3296 GenericTilemapSetTransparent(0, 0);
3297
3298 GenericTilemapInit(
3299 1,
3300 namco_map_scan, digdug_fg_map_callback,
3301 8, 8,
3302 NAMCO_TMAP_WIDTH, NAMCO_TMAP_HEIGHT
3303 );
3304 GenericTilemapSetGfx(
3305 1,
3306 graphics.fgChars,
3307 DIGDUG_NUM_OF_CHAR_PALETTE_BITS,
3308 8, 8,
3309 DIGDUG_NUM_OF_CHAR * 8 * 8,
3310 DIGDUG_PALETTE_OFFSET_CHARS,
3311 DIGDUG_PALETTE_SIZE_CHARS - 1
3312 );
3313 GenericTilemapSetTransparent(1, 0);
3314
3315 GenericTilemapSetOffsets(TMAP_GLOBAL, 0, 0);
3316
3317 return 0;
3318 }
3319
digdug_pf_latch_w(UINT16 offset,UINT8 dta)3320 static void digdug_pf_latch_w(UINT16 offset, UINT8 dta)
3321 {
3322 switch (offset)
3323 {
3324 case 0:
3325 playFieldParams.playField = (playFieldParams.playField & ~1) | (dta & 1);
3326 break;
3327
3328 case 1:
3329 playFieldParams.playField = (playFieldParams.playField & ~2) | ((dta << 1) & 2);
3330 break;
3331
3332 case 2:
3333 playFieldParams.alphaColor = dta & 1;
3334 break;
3335
3336 case 3:
3337 playFieldParams.playEnable = dta & 1;
3338 break;
3339
3340 case 4:
3341 playFieldParams.playColor = (playFieldParams.playColor & ~1) | (dta & 1);
3342 break;
3343
3344 case 5:
3345 playFieldParams.playColor = (playFieldParams.playColor & ~2) | ((dta << 1) & 2);
3346 break;
3347 }
3348 }
3349
digdugZ80Writeb840(UINT16 offset,UINT8 dta)3350 static void digdugZ80Writeb840(UINT16 offset, UINT8 dta)
3351 {
3352 earom_ctrl_write(0xb840, dta);
3353 }
3354
3355 #define DIGDUG_3BIT_PALETTE_SIZE 32
3356
digdugCalcPalette(void)3357 static void digdugCalcPalette(void)
3358 {
3359 UINT32 palette[DIGDUG_3BIT_PALETTE_SIZE];
3360
3361 for (INT32 i = 0; i < DIGDUG_3BIT_PALETTE_SIZE; i ++)
3362 {
3363 INT32 r = Colour3Bit[(memory.PROM.palette[i] >> 0) & 0x07];
3364 INT32 g = Colour3Bit[(memory.PROM.palette[i] >> 3) & 0x07];
3365 INT32 b = Colour3Bit[(memory.PROM.palette[i] >> 5) & 0x06];
3366
3367 palette[i] = BurnHighCol(r, g, b, 0);
3368 }
3369
3370 /* bg_select */
3371 for (INT32 i = 0; i < DIGDUG_PALETTE_SIZE_BGTILES; i ++)
3372 {
3373 graphics.palette[DIGDUG_PALETTE_OFFSET_BGTILES + i] =
3374 palette[memory.PROM.charLookup[i] & 0x0f];
3375 }
3376
3377 /* sprites */
3378 for (INT32 i = 0; i < DIGDUG_PALETTE_SIZE_SPRITES; i ++)
3379 {
3380 graphics.palette[DIGDUG_PALETTE_OFFSET_SPRITE + i] =
3381 palette[(memory.PROM.spriteLookup[i] & 0x0f) + 0x10];
3382 }
3383
3384 /* characters - direct mapping */
3385 for (INT32 i = 0; i < DIGDUG_PALETTE_SIZE_CHARS; i += 2)
3386 {
3387 graphics.palette[DIGDUG_PALETTE_OFFSET_CHARS + i + 0] = palette[0];
3388 graphics.palette[DIGDUG_PALETTE_OFFSET_CHARS + i + 1] = palette[i/2];
3389 }
3390 }
3391
digdugRenderTiles(void)3392 static void digdugRenderTiles(void)
3393 {
3394 GenericTilemapSetScrollX(0, 0);
3395 GenericTilemapSetScrollY(0, 0);
3396 GenericTilemapSetOffsets(0, 0, 0);
3397 GenericTilemapSetEnable(0, (0 == playFieldParams.playEnable));
3398 GenericTilemapDraw(0, pTransDraw, 0 | TMAP_DRAWOPAQUE);
3399 GenericTilemapSetEnable(1, 1);
3400 GenericTilemapDraw(1, pTransDraw, 0 | TMAP_TRANSPARENT);
3401 }
3402
digdugGetSpriteParams(struct Namco_Sprite_Params * spriteParams,UINT32 offset)3403 static UINT32 digdugGetSpriteParams(struct Namco_Sprite_Params *spriteParams, UINT32 offset)
3404 {
3405 UINT8 *spriteRam1 = memory.RAM.shared1 + 0x380;
3406 UINT8 *spriteRam2 = memory.RAM.shared2 + 0x380;
3407 UINT8 *spriteRam3 = memory.RAM.shared3 + 0x380;
3408
3409 INT32 sprite = spriteRam1[offset + 0];
3410 if (sprite & 0x80) spriteParams->sprite = (sprite & 0xc0) | ((sprite & ~0xc0) << 2);
3411 else spriteParams->sprite = sprite;
3412 spriteParams->colour = spriteRam1[offset + 1] & 0x3f;
3413
3414 spriteParams->xStart = spriteRam2[offset + 1] - 40 + 1;
3415 if (8 > spriteParams->xStart) spriteParams->xStart += 0x100;
3416 spriteParams->yStart = NAMCO_SCREEN_WIDTH - spriteRam2[offset + 0] + 1;
3417 spriteParams->xStep = 16;
3418 spriteParams->yStep = 16;
3419
3420 spriteParams->flags = spriteRam3[offset + 0] & 0x03;
3421 spriteParams->flags |= ((sprite & 0x80) >> 4) | ((sprite & 0x80) >> 5);
3422
3423 if (spriteParams->flags & ySize)
3424 {
3425 spriteParams->yStart -= 16;
3426 }
3427
3428 if (spriteParams->flags & xSize)
3429 {
3430 if (spriteParams->flags & xFlip)
3431 {
3432 spriteParams->xStart += 16;
3433 spriteParams->xStep = -16;
3434 }
3435 }
3436
3437 spriteParams->paletteBits = DIGDUG_NUM_OF_SPRITE_PALETTE_BITS;
3438 spriteParams->paletteOffset = DIGDUG_PALETTE_OFFSET_SPRITE;
3439
3440 return 1;
3441 }
3442
digdugScan(INT32 nAction,INT32 * pnMin)3443 static INT32 digdugScan(INT32 nAction, INT32 *pnMin)
3444 {
3445 if (nAction & ACB_DRIVER_DATA) {
3446 SCAN_VAR(playFieldParams.playField);
3447 SCAN_VAR(playFieldParams.alphaColor);
3448 SCAN_VAR(playFieldParams.playEnable);
3449 SCAN_VAR(playFieldParams.playColor);
3450
3451 }
3452
3453 if (nAction & ACB_NVRAM) {
3454 earom_scan(nAction, pnMin);
3455 }
3456
3457 return DrvScan(nAction, pnMin);
3458 }
3459
3460 struct BurnDriver BurnDrvDigdug =
3461 {
3462 /* filename of zip without extension = */ "digdug",
3463 /* filename of parent, no extension = */ NULL,
3464 /* filename of board ROMs = */ NULL,
3465 /* filename of samples ZIP = */ NULL,
3466 /* date = */ "1982",
3467 /* FullName = */ "Dig Dug (rev 2)\0",
3468 /* Comment = */ NULL,
3469 /* Manufacturer = */ "Namco",
3470 /* System = */ "Miscellaneous",
3471 /* FullName = */ NULL,
3472 /* Comment = */ NULL,
3473 /* Manufacturer = */ NULL,
3474 /* System = */ NULL,
3475 /* Flags = */ BDF_GAME_WORKING |
3476 BDF_ORIENTATION_VERTICAL |
3477 BDF_ORIENTATION_FLIPPED,
3478 /* digdug has EA-ROM, it saves highscores! BDF_HISCORE_SUPPORTED not needed. */
3479 /* No of Players = */ 2,
3480 /* Hardware Type = */ HARDWARE_MISC_PRE90S,
3481 /* Genre = */ GBF_MAZE | GBF_ACTION,
3482 /* Family = */ 0,
3483 /* GetZipName func = */ NULL,
3484 /* GetROMInfo func = */ digdugRomInfo,
3485 /* GetROMName func = */ digdugRomName,
3486 /* GetHDDInfo func = */ NULL,
3487 /* GetHDDName func = */ NULL,
3488 /* GetSampleInfo func = */ NULL,
3489 /* GetSampleName func = */ NULL,
3490 /* GetInputInfo func = */ DigdugInputInfo,
3491 /* GetDIPInfo func = */ DigdugDIPInfo,
3492 /* Init func = */ digdugInit,
3493 /* Exit func = */ DrvExit,
3494 /* Frame func = */ DrvFrame,
3495 /* Redraw func = */ DrvDraw,
3496 /* Areascan func = */ digdugScan,
3497 /* Recalc Palette = */ NULL,
3498 /* Palette Entries count = */ DIGDUG_PALETTE_SIZE,
3499 /* Width, Height = */ NAMCO_SCREEN_WIDTH, NAMCO_SCREEN_HEIGHT,
3500 /* xAspect, yAspect = */ 3, 4
3501 };
3502
3503 struct BurnDriver BurnDrvDigdugat =
3504 {
3505 /* filename of zip without extension = */ "digdugat",
3506 /* filename of parent, no extension = */ "digdug",
3507 /* filename of board ROMs = */ NULL,
3508 /* filename of samples ZIP = */ NULL,
3509 /* date = */ "1982",
3510 /* FullName = */ "Dig Dug (Atari, rev 2)\0",
3511 /* Comment = */ NULL,
3512 /* Manufacturer = */ "Namco (Atari license)",
3513 /* System = */ "Miscellaneous",
3514 /* FullName = */ NULL,
3515 /* Comment = */ NULL,
3516 /* Manufacturer = */ NULL,
3517 /* System = */ NULL,
3518 /* Flags = */ BDF_GAME_WORKING |
3519 BDF_CLONE |
3520 BDF_ORIENTATION_VERTICAL |
3521 BDF_ORIENTATION_FLIPPED,
3522 /* digdug has EA-ROM, it saves highscores! BDF_HISCORE_SUPPORTED not needed. */
3523 /* No of Players = */ 2,
3524 /* Hardware Type = */ HARDWARE_MISC_PRE90S,
3525 /* Genre = */ GBF_MAZE | GBF_ACTION,
3526 /* Family = */ 0,
3527 /* GetZipName func = */ NULL,
3528 /* GetROMInfo func = */ digdugatRomInfo,
3529 /* GetROMName func = */ digdugatRomName,
3530 /* GetHDDInfo func = */ NULL,
3531 /* GetHDDName func = */ NULL,
3532 /* GetSampleInfo func = */ NULL,
3533 /* GetSampleName func = */ NULL,
3534 /* GetInputInfo func = */ DigdugInputInfo,
3535 /* GetDIPInfo func = */ DigdugDIPInfo,
3536 /* Init func = */ digdugInit,
3537 /* Exit func = */ DrvExit,
3538 /* Frame func = */ DrvFrame,
3539 /* Redraw func = */ DrvDraw,
3540 /* Areascan func = */ digdugScan,
3541 /* Recalc Palette = */ NULL,
3542 /* Palette Entries count = */ DIGDUG_PALETTE_SIZE,
3543 /* Width, Height = */ NAMCO_SCREEN_WIDTH, NAMCO_SCREEN_HEIGHT,
3544 /* xAspect, yAspect = */ 3, 4
3545 };
3546
3547 /* === XEVIOUS === */
3548
3549 static struct BurnInputInfo XeviousInputList[] =
3550 {
3551 {"Dip 1" , BIT_DIPSWITCH, &input.dip[0].byte, "dip" },
3552 {"Dip 2" , BIT_DIPSWITCH, &input.dip[1].byte, "dip" },
3553
3554 {"Reset" , BIT_DIGITAL, &input.reset, "reset" },
3555
3556 {"Up" , BIT_DIGITAL, &input.ports[1].current.bits.bit[0], "p1 up" },
3557 {"Right" , BIT_DIGITAL, &input.ports[1].current.bits.bit[1], "p1 right" },
3558 {"Down" , BIT_DIGITAL, &input.ports[1].current.bits.bit[2], "p1 down" },
3559 {"Left" , BIT_DIGITAL, &input.ports[1].current.bits.bit[3], "p1 left" },
3560 {"P1 Button 1" , BIT_DIGITAL, &input.ports[1].current.bits.bit[4], "p1 fire 1" },
3561 // hack! CUF - must remap this input to DIP1.0
3562 {"P1 Button 2" , BIT_DIGITAL, &input.ports[1].current.bits.bit[6], "p1 fire 2" },
3563
3564 {"Up (Cocktail)" , BIT_DIGITAL, &input.ports[2].current.bits.bit[0], "p2 up" },
3565 {"Right (Cocktail)" , BIT_DIGITAL, &input.ports[2].current.bits.bit[1], "p2 right" },
3566 {"Down (Cocktail)" , BIT_DIGITAL, &input.ports[2].current.bits.bit[2], "p2 down" },
3567 {"Left (Cocktail)" , BIT_DIGITAL, &input.ports[2].current.bits.bit[3], "p2 left" },
3568 {"Fire 1 (Cocktail)" , BIT_DIGITAL, &input.ports[2].current.bits.bit[4], "p2 fire 1" },
3569 // hack! CUF - must remap this input to DIP1.4
3570 {"Fire 2 (Cocktail)" , BIT_DIGITAL, &input.ports[2].current.bits.bit[6], "p2 fire 2" },
3571
3572 {"Start 1" , BIT_DIGITAL, &input.ports[0].current.bits.bit[2], "p1 start" },
3573 {"Start 2" , BIT_DIGITAL, &input.ports[0].current.bits.bit[3], "p2 start" },
3574 {"Coin 1" , BIT_DIGITAL, &input.ports[0].current.bits.bit[4], "p1 coin" },
3575 {"Coin 2" , BIT_DIGITAL, &input.ports[0].current.bits.bit[5], "p2 coin" },
3576 {"Service" , BIT_DIGITAL, &input.ports[0].current.bits.bit[7], "service" },
3577
3578 };
3579
3580 STDINPUTINFO(Xevious)
3581
3582 #define XEVIOUS_NUM_OF_DIPSWITCHES 2
3583
3584 static struct BurnDIPInfo XeviousDIPList[]=
3585 {
3586 // Default Values
3587 // nOffset, nID, nMask, nDefault, NULL
3588 { 0x00, 0xff, 0xff, 0xFF, NULL },
3589 { 0x01, 0xff, 0xff, 0xFF, NULL },
3590
3591 // Dip 1
3592 // x, DIP_GRP, x, OptionCnt, szTitle
3593 { 0, 0xfe, 0, 0, "Button 2 (Not a DIP)" },
3594 // nInput, nFlags, nMask, nSetting, szText
3595 { 0x00, 0x01, 0x01, 0x01, "Released" },
3596 { 0x00, 0x01, 0x01, 0x00, "Held" },
3597
3598 // x, DIP_GRP, x, OptionCnt, szTitle
3599 { 0, 0xfe, 0, 2, "Flags Award Bonus Life" },
3600 // nInput, nFlags, nMask, nSetting, szText
3601 { 0x00, 0x01, 0x02, 0x02, "Yes" },
3602 { 0x00, 0x01, 0x02, 0x00, "No" },
3603
3604 // x, DIP_GRP, x, OptionCnt, szTitle
3605 { 0, 0xfe, 0, 4, "Coin B" },
3606 // nInput, nFlags, nMask, nSetting, szText
3607 { 0x00, 0x01, 0x0C, 0x04, "2 Coins 1 Play" },
3608 { 0x00, 0x01, 0x0C, 0x0C, "1 Coin 1 Play" },
3609 { 0x00, 0x01, 0x0C, 0x00, "2 Coins 3 Plays" },
3610 { 0x00, 0x01, 0x0C, 0x08, "1 Coin 2 Plays" },
3611
3612 // x, DIP_GRP, x, OptionCnt, szTitle
3613 { 0, 0xfe, 0, 0, "Button 2 (Cocktail) (Not a DIP)" },
3614 // nInput, nFlags, nMask, nSetting, szText
3615 { 0x00, 0x01, 0x10, 0x10, "Released" },
3616 { 0x00, 0x01, 0x10, 0x00, "Held" },
3617
3618 // x, DIP_GRP, x, OptionCnt, szTitle
3619 { 0, 0xfe, 0, 4, "Difficulty" },
3620 // nInput, nFlags, nMask, nSetting, szText
3621 { 0x00, 0x01, 0x60, 0x40, "Easy" },
3622 { 0x00, 0x01, 0x60, 0x60, "Normal" },
3623 { 0x00, 0x01, 0x60, 0x20, "Hard" },
3624 { 0x00, 0x01, 0x60, 0x00, "Hardest" },
3625
3626 // x, DIP_GRP, x, OptionCnt, szTitle
3627 { 0, 0xfe, 0, 2, "Freeze" },
3628 // nInput, nFlags, nMask, nSetting, szText
3629 { 0x00, 0x01, 0x80, 0x80, "Off" },
3630 { 0x00, 0x01, 0x80, 0x00, "On" },
3631
3632 // Dip 2
3633 // x, DIP_GRP, x, OptionCnt, szTitle
3634 { 0, 0xfe, 0, 4, "Coin A" },
3635 // nInput, nFlags, nMask, nSetting, szText
3636 { 0x01, 0x01, 0x03, 0x01, "2 Coins 1 Play" },
3637 { 0x01, 0x01, 0x03, 0x03, "1 Coin 1 Play" },
3638 { 0x01, 0x01, 0x03, 0x00, "2 Coins 3 Plays" },
3639 { 0x01, 0x01, 0x03, 0x02, "1 Coin 2 Plays" },
3640
3641 // x, DIP_GRP, x, OptionCnt, szTitle
3642 { 0, 0xfe, 0, 8, "Bonus Life" },
3643 // nInput, nFlags, nMask, nSetting, szText
3644 { 0x01, 0x01, 0x1C, 0x18, "10k 40k 40k" },
3645 { 0x01, 0x01, 0x1C, 0x14, "10k 50k 50k" },
3646 { 0x01, 0x01, 0x1C, 0x10, "20k 50k 50k" },
3647 { 0x01, 0x01, 0x1C, 0x1C, "20k 60k 60k" },
3648 { 0x01, 0x01, 0x1C, 0x0C, "20k 70k 70k" },
3649 { 0x01, 0x01, 0x1C, 0x08, "20k 80k 80k" },
3650 { 0x01, 0x01, 0x1C, 0x04, "20k 60k" },
3651 { 0x01, 0x01, 0x1C, 0x00, "None" },
3652
3653 // x, DIP_GRP, x, OptionCnt, szTitle
3654 { 0, 0xfe, 0, 4, "Lives" },
3655 // nInput, nFlags, nMask, nSetting, szText
3656 { 0x01, 0x01, 0x60, 0x40, "1" },
3657 { 0x01, 0x01, 0x60, 0x20, "2" },
3658 { 0x01, 0x01, 0x60, 0x60, "3" },
3659 { 0x01, 0x01, 0x60, 0x00, "5" },
3660
3661 // x, DIP_GRP, x, OptionCnt, szTitle
3662 { 0, 0xfe, 0, 2, "Cabinet" },
3663 // nInput, nFlags, nMask, nSetting, szText
3664 { 0x01, 0x01, 0x80, 0x80, "Upright" },
3665 { 0x01, 0x01, 0x80, 0x00, "Cocktail" },
3666
3667 };
3668
3669 STDDIPINFO(Xevious)
3670
3671 static struct BurnDIPInfo SxeviousDIPList[]=
3672 {
3673 // Default Values
3674 // nOffset, nID, nMask, nDefault, NULL
3675 { 0x00, 0xff, 0xff, 0x7F, NULL },
3676 { 0x01, 0xff, 0xff, 0xFF, NULL },
3677
3678 // Dip 1
3679 // x, DIP_GRP, x, OptionCnt, szTitle
3680 { 0, 0xfe, 0, 0, "Button 2 (Not a DIP)" },
3681 // nInput, nFlags, nMask, nSetting, szText
3682 { 0x00, 0x01, 0x01, 0x01, "Released" },
3683 { 0x00, 0x01, 0x01, 0x00, "Held" },
3684
3685 // x, DIP_GRP, x, OptionCnt, szTitle
3686 { 0, 0xfe, 0, 2, "Flags Award Bonus Life" },
3687 // nInput, nFlags, nMask, nSetting, szText
3688 { 0x00, 0x01, 0x02, 0x02, "Yes" },
3689 { 0x00, 0x01, 0x02, 0x00, "No" },
3690
3691 // x, DIP_GRP, x, OptionCnt, szTitle
3692 { 0, 0xfe, 0, 4, "Coin B" },
3693 // nInput, nFlags, nMask, nSetting, szText
3694 { 0x00, 0x01, 0x0C, 0x04, "1 Coins 3 Plays" },
3695 { 0x00, 0x01, 0x0C, 0x0C, "1 Coin 1 Play" },
3696 { 0x00, 0x01, 0x0C, 0x00, "1 Coins 6 Plays" },
3697 { 0x00, 0x01, 0x0C, 0x08, "1 Coin 2 Plays" },
3698
3699 // x, DIP_GRP, x, OptionCnt, szTitle
3700 { 0, 0xfe, 0, 0, "Button 2 (Cocktail) (Not a DIP)" },
3701 // nInput, nFlags, nMask, nSetting, szText
3702 { 0x00, 0x01, 0x10, 0x10, "Released" },
3703 { 0x00, 0x01, 0x10, 0x00, "Held" },
3704
3705 // x, DIP_GRP, x, OptionCnt, szTitle
3706 { 0, 0xfe, 0, 4, "Difficulty" },
3707 // nInput, nFlags, nMask, nSetting, szText
3708 { 0x00, 0x01, 0x60, 0x40, "Easy" },
3709 { 0x00, 0x01, 0x60, 0x60, "Normal" },
3710 { 0x00, 0x01, 0x60, 0x20, "Hard" },
3711 { 0x00, 0x01, 0x60, 0x00, "Hardest" },
3712
3713 // x, DIP_GRP, x, OptionCnt, szTitle
3714 { 0, 0xfe, 0, 2, "Freeze" },
3715 // nInput, nFlags, nMask, nSetting, szText
3716 { 0x00, 0x01, 0x80, 0x00, "Off" },
3717 { 0x00, 0x01, 0x80, 0x80, "On" },
3718
3719 // Dip 2
3720 // x, DIP_GRP, x, OptionCnt, szTitle
3721 { 0, 0xfe, 0, 4, "Coin A" },
3722 // nInput, nFlags, nMask, nSetting, szText
3723 { 0x01, 0x01, 0x03, 0x01, "2 Coins 1 Play" },
3724 { 0x01, 0x01, 0x03, 0x03, "1 Coin 1 Play" },
3725 { 0x01, 0x01, 0x03, 0x00, "2 Coins 3 Plays" },
3726 { 0x01, 0x01, 0x03, 0x02, "1 Coin 2 Plays" },
3727
3728 // x, DIP_GRP, x, OptionCnt, szTitle
3729 { 0, 0xfe, 0, 8, "Bonus Life" },
3730 // nInput, nFlags, nMask, nSetting, szText
3731 { 0x01, 0x01, 0x1C, 0x18, "10k 40k 40k" },
3732 { 0x01, 0x01, 0x1C, 0x14, "10k 50k 50k" },
3733 { 0x01, 0x01, 0x1C, 0x10, "20k 50k 50k" },
3734 { 0x01, 0x01, 0x1C, 0x1C, "20k 60k 60k" },
3735 { 0x01, 0x01, 0x1C, 0x0C, "20k 70k 70k" },
3736 { 0x01, 0x01, 0x1C, 0x08, "20k 80k 80k" },
3737 { 0x01, 0x01, 0x1C, 0x04, "20k 60k" },
3738 { 0x01, 0x01, 0x1C, 0x00, "None" },
3739
3740 // x, DIP_GRP, x, OptionCnt, szTitle
3741 { 0, 0xfe, 0, 4, "Lives" },
3742 // nInput, nFlags, nMask, nSetting, szText
3743 { 0x01, 0x01, 0x60, 0x40, "1" },
3744 { 0x01, 0x01, 0x60, 0x20, "2" },
3745 { 0x01, 0x01, 0x60, 0x60, "3" },
3746 { 0x01, 0x01, 0x60, 0x00, "5" },
3747
3748 // x, DIP_GRP, x, OptionCnt, szTitle
3749 { 0, 0xfe, 0, 2, "Cabinet" },
3750 // nInput, nFlags, nMask, nSetting, szText
3751 { 0x01, 0x01, 0x80, 0x80, "Upright" },
3752 { 0x01, 0x01, 0x80, 0x00, "Cocktail" },
3753
3754 };
3755
3756 STDDIPINFO(Sxevious)
3757
3758 static struct BurnRomInfo XeviousRomDesc[] = {
3759 { "xvi_1.3p", 0x01000, 0x09964dda, BRF_ESS | BRF_PRG }, // 0 Z80 #1 Program Code
3760 { "xvi_2.3m", 0x01000, 0x60ecce84, BRF_ESS | BRF_PRG }, // 1
3761 { "xvi_3.2m", 0x01000, 0x79754b7d, BRF_ESS | BRF_PRG }, // 2
3762 { "xvi_4.2l", 0x01000, 0xc7d4bbf0, BRF_ESS | BRF_PRG }, // 3
3763
3764 { "xvi_5.3f", 0x01000, 0xc85b703f, BRF_ESS | BRF_PRG }, // 4 Z80 #2 Program Code
3765 { "xvi_6.3j", 0x01000, 0xe18cdaad, BRF_ESS | BRF_PRG }, // 5
3766
3767 { "xvi_7.2c", 0x01000, 0xdd35cf1c, BRF_ESS | BRF_PRG }, // 6 Z80 #3 Program Code
3768
3769 { "xvi_12.3b", 0x01000, 0x088c8b26, BRF_GRA }, /* 7 background characters */
3770 { "xvi_13.3c", 0x01000, 0xde60ba25, BRF_GRA }, /* 8 bg pattern B0 */
3771 { "xvi_14.3d", 0x01000, 0x535cdbbc, BRF_GRA }, /* 9 bg pattern B1 */
3772
3773 { "xvi_15.4m", 0x02000, 0xdc2c0ecb, BRF_GRA }, /* 10 sprite set #1, planes 0/1 */
3774 { "xvi_18.4r", 0x02000, 0x02417d19, BRF_GRA }, /* 11 sprite set #1, plane 2, set #2, plane 0 */
3775 { "xvi_17.4p", 0x02000, 0xdfb587ce, BRF_GRA }, /* 12 sprite set #2, planes 1/2 */
3776 { "xvi_16.4n", 0x01000, 0x605ca889, BRF_GRA }, /* 13 sprite set #3, planes 0/1 */
3777
3778 { "xvi_9.2a", 0x01000, 0x57ed9879, BRF_GRA }, /* 14 */
3779 { "xvi_10.2b", 0x02000, 0xae3ba9e5, BRF_GRA }, /* 15 */
3780 { "xvi_11.2c", 0x01000, 0x31e244dd, BRF_GRA }, /* 16 */
3781
3782 { "xvi-8.6a", 0x00100, 0x5cc2727f, BRF_GRA }, /* 17 palette red component */
3783 { "xvi-9.6d", 0x00100, 0x5c8796cc, BRF_GRA }, /* 18 palette green component */
3784 { "xvi-10.6e", 0x00100, 0x3cb60975, BRF_GRA }, /* 19 palette blue component */
3785 { "xvi-7.4h", 0x00200, 0x22d98032, BRF_GRA }, /* 20 bg tiles lookup table low bits */
3786 { "xvi-6.4f", 0x00200, 0x3a7599f0, BRF_GRA }, /* 21 bg tiles lookup table high bits */
3787 { "xvi-4.3l", 0x00200, 0xfd8b9d91, BRF_GRA }, /* 22 sprite lookup table low bits */
3788 { "xvi-5.3m", 0x00200, 0xbf906d82, BRF_GRA }, /* 23 sprite lookup table high bits */
3789
3790 { "xvi-2.7n", 0x00100, 0x550f06bc, BRF_GRA }, /* 24 */
3791 { "xvi-1.5n", 0x00100, 0x77245b66, BRF_GRA }, /* 25 timing - not used */
3792
3793 { "xvi-3.1f", 0x00117, 0x9192d57a, BRF_OPT }, /* N82S153N */
3794 };
3795
3796 STD_ROM_PICK(Xevious)
3797 STD_ROM_FN(Xevious)
3798
3799 static struct BurnRomInfo SxeviousRomDesc[] = {
3800 { "cpu_3p.rom", 0x01000, 0x1c8d27d5, BRF_ESS | BRF_PRG }, // 0 Z80 #1 Program Code
3801 { "cpu_3m.rom", 0x01000, 0xfd04e615, BRF_ESS | BRF_PRG }, // 1
3802 { "xv3_3.2m", 0x01000, 0x294d5404, BRF_ESS | BRF_PRG }, // 2
3803 { "xv3_4.2l", 0x01000, 0x6a44bf92, BRF_ESS | BRF_PRG }, // 3
3804
3805 { "xv3_5.3f", 0x01000, 0xd4bd3d81, BRF_ESS | BRF_PRG }, // 4 Z80 #2 Program Code
3806 { "xv3_6.3j", 0x01000, 0xaf06be5f, BRF_ESS | BRF_PRG }, // 5
3807
3808 { "xvi_7.2c", 0x01000, 0xdd35cf1c, BRF_ESS | BRF_PRG }, // 6 Z80 #3 Program Code
3809
3810 { "xvi_12.3b", 0x01000, 0x088c8b26, BRF_GRA }, /* 7 background characters */
3811 { "xvi_13.3c", 0x01000, 0xde60ba25, BRF_GRA }, /* 8 bg pattern B0 */
3812 { "xvi_14.3d", 0x01000, 0x535cdbbc, BRF_GRA }, /* 9 bg pattern B1 */
3813
3814 { "xvi_15.4m", 0x02000, 0xdc2c0ecb, BRF_GRA }, /* 10 sprite set #1, planes 0/1 */
3815 { "xvi_18.4r", 0x02000, 0x02417d19, BRF_GRA }, /* 11 sprite set #1, plane 2, set #2, plane 0 */
3816 { "xvi_17.4p", 0x02000, 0xdfb587ce, BRF_GRA }, /* 12 sprite set #2, planes 1/2 */
3817 { "xvi_16.4n", 0x01000, 0x605ca889, BRF_GRA }, /* 13 sprite set #3, planes 0/1 */
3818
3819 { "xvi_9.2a", 0x01000, 0x57ed9879, BRF_GRA }, /* 14 */
3820 { "xvi_10.2b", 0x02000, 0xae3ba9e5, BRF_GRA }, /* 15 */
3821 { "xvi_11.2c", 0x01000, 0x31e244dd, BRF_GRA }, /* 16 */
3822
3823 { "xvi-8.6a", 0x00100, 0x5cc2727f, BRF_GRA }, /* 17 palette red component */
3824 { "xvi-9.6d", 0x00100, 0x5c8796cc, BRF_GRA }, /* 18 palette green component */
3825 { "xvi-10.6e", 0x00100, 0x3cb60975, BRF_GRA }, /* 19 palette blue component */
3826 { "xvi-7.4h", 0x00200, 0x22d98032, BRF_GRA }, /* 20 bg tiles lookup table low bits */
3827 { "xvi-6.4f", 0x00200, 0x3a7599f0, BRF_GRA }, /* 21 bg tiles lookup table high bits */
3828 { "xvi-4.3l", 0x00200, 0xfd8b9d91, BRF_GRA }, /* 22 sprite lookup table low bits */
3829 { "xvi-5.3m", 0x00200, 0xbf906d82, BRF_GRA }, /* 23 sprite lookup table high bits */
3830
3831 { "xvi-2.7n", 0x00100, 0x550f06bc, BRF_GRA }, /* 24 */
3832 { "xvi-1.5n", 0x00100, 0x77245b66, BRF_GRA }, /* 25 timing - not used */
3833 };
3834
3835 STD_ROM_PICK(Sxevious)
3836 STD_ROM_FN(Sxevious)
3837
3838
3839 static struct BurnSampleInfo XeviousSampleDesc[] = {
3840 #if !defined (ROM_VERIFY)
3841 { "explo1", SAMPLE_NOLOOP }, // ground target explosion
3842 { "explo2", SAMPLE_NOLOOP }, // Solvalou explosion
3843 { "explo3", SAMPLE_NOLOOP }, // credit
3844 { "explo4", SAMPLE_NOLOOP }, // Garu Zakato explosion
3845 #endif
3846 { "", 0 }
3847 };
3848
3849 STD_SAMPLE_PICK(Xevious)
3850 STD_SAMPLE_FN(Xevious)
3851
3852 #define XEVIOUS_NO_OF_COLS 64
3853 #define XEVIOUS_NO_OF_ROWS 32
3854
3855 #define XEVIOUS_NUM_OF_CHAR_PALETTE_BITS 1
3856 #define XEVIOUS_NUM_OF_SPRITE_PALETTE_BITS 3
3857 #define XEVIOUS_NUM_OF_BGTILE_PALETTE_BITS 2
3858
3859 #define XEVIOUS_PALETTE_OFFSET_BGTILES 0x0
3860 #define XEVIOUS_PALETTE_SIZE_BGTILES (0x80 * 4)
3861 #define XEVIOUS_PALETTE_OFFSET_SPRITE (XEVIOUS_PALETTE_OFFSET_BGTILES + \
3862 XEVIOUS_PALETTE_SIZE_BGTILES)
3863 #define XEVIOUS_PALETTE_SIZE_SPRITES (0x40 * 8)
3864 #define XEVIOUS_PALETTE_OFFSET_CHARS (XEVIOUS_PALETTE_OFFSET_SPRITE + \
3865 XEVIOUS_PALETTE_SIZE_SPRITES)
3866 #define XEVIOUS_PALETTE_SIZE_CHARS (0x40 * 2)
3867 #define XEVIOUS_PALETTE_SIZE (XEVIOUS_PALETTE_SIZE_CHARS + \
3868 XEVIOUS_PALETTE_SIZE_SPRITES + \
3869 XEVIOUS_PALETTE_SIZE_BGTILES)
3870 #define XEVIOUS_PALETTE_MEM_SIZE_IN_BYTES (XEVIOUS_PALETTE_SIZE * \
3871 sizeof(UINT32))
3872
3873 #define XEVIOUS_NUM_OF_CHAR 0x200
3874 #define XEVIOUS_SIZE_OF_CHAR_IN_BYTES (8 * 8)
3875 #define XEVIOUS_CHAR_MEM_SIZE_IN_BYTES (XEVIOUS_NUM_OF_CHAR * \
3876 XEVIOUS_SIZE_OF_CHAR_IN_BYTES)
3877
3878 #define XEVIOUS_NUM_OF_SPRITE1 0x080
3879 #define XEVIOUS_NUM_OF_SPRITE2 0x080
3880 #define XEVIOUS_NUM_OF_SPRITE3 0x040
3881 #define XEVIOUS_NUM_OF_SPRITE (XEVIOUS_NUM_OF_SPRITE1 + \
3882 XEVIOUS_NUM_OF_SPRITE2 + \
3883 XEVIOUS_NUM_OF_SPRITE3)
3884 #define XEVIOUS_SIZE_OF_SPRITE_IN_BYTES 0x200
3885 #define XEVIOUS_SPRITE_MEM_SIZE_IN_BYTES (XEVIOUS_NUM_OF_SPRITE * \
3886 XEVIOUS_SIZE_OF_SPRITE_IN_BYTES)
3887
3888 #define XEVIOUS_NUM_OF_BGTILE 0x200
3889 #define XEVIOUS_SIZE_OF_BGTILE_IN_BYTES (8 * 8)
3890 #define XEVIOUS_TILES_MEM_SIZE_IN_BYTES (XEVIOUS_NUM_OF_BGTILE * \
3891 XEVIOUS_SIZE_OF_BGTILE_IN_BYTES)
3892
3893 static INT32 XeviousCharXOffsets[8] = { 0, 1, 2, 3, 4, 5, 6, 7 };
3894 static INT32 XeviousCharYOffsets[8] = { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 };
3895
3896 static struct PlaneOffsets
3897 {
3898 INT32 fgChars[XEVIOUS_NUM_OF_CHAR_PALETTE_BITS];
3899 INT32 bgChars[XEVIOUS_NUM_OF_BGTILE_PALETTE_BITS];
3900 INT32 sprites1[XEVIOUS_NUM_OF_SPRITE_PALETTE_BITS];
3901 INT32 sprites2[XEVIOUS_NUM_OF_SPRITE_PALETTE_BITS];
3902 INT32 sprites3[XEVIOUS_NUM_OF_SPRITE_PALETTE_BITS];
3903 } xeviousOffsets = {
3904 { 0 }, /* foreground characters */
3905
3906 /* background tiles */
3907 /* 512 characters */
3908 /* 2 bits per pixel */
3909 /* 8 x 8 characters */
3910 /* every char takes 8 consecutive bytes */
3911 { 0, 512 * 8 * 8 },
3912
3913 /* sprite set #1 */
3914 /* 128 sprites */
3915 /* 3 bits per pixel */
3916 /* 16 x 16 sprites */
3917 /* every sprite takes 64 consecutive bytes */
3918 { 0x10004, 0x00000, 0x00004 }, // 0x0000 + { 128*64*8+4, 0, 4 }
3919
3920 /* sprite set #2 */
3921 { 0x00000, 0x10000, 0x10004 }, // 0x2000 + { 0, 128*64*8, 128*64*8+4 }
3922
3923 /* sprite set #3 */
3924 { 0x08000, 0x00000, 0x00004 }, // 0x6000 + { 64*64*8, 0, 4 }
3925
3926 };
3927
3928 static INT32 xeviousInit(void);
3929 static void xeviousMemoryMap1(void);
3930 static void xeviousMemoryMap2(void);
3931 static void xeviousMemoryMap3(void);
3932 static INT32 xeviousCharDecode(void);
3933 static INT32 xeviousTilesDecode(void);
3934 static INT32 xeviousSpriteDecode(void);
3935 static tilemap_scan(xevious);
3936 static tilemap_callback(xevious_bg);
3937 static tilemap_callback(xevious_fg);
3938 static INT32 xeviousTilemapConfig(void);
3939
3940 static UINT8 xeviousPlayFieldRead(UINT16 offset);
3941 static UINT8 xeviousWorkRAMRead(UINT16 offset);
3942 static UINT8 xeviousSharedRAM1Read(UINT16 offset);
3943 static UINT8 xeviousSharedRAM2Read(UINT16 offset);
3944 static UINT8 xeviousSharedRAM3Read(UINT16 offset);
3945
3946 static void xevious_bs_wr(UINT16 offset, UINT8 dta);
3947 static void xevious_vh_latch_w(UINT16 offset, UINT8 dta);
3948 static void xeviousBGColorRAMWrite(UINT16 offset, UINT8 dta);
3949 static void xeviousBGCharRAMWrite(UINT16 offset, UINT8 dta);
3950 static void xeviousFGColorRAMWrite(UINT16 offset, UINT8 dta);
3951 static void xeviousFGCharRAMWrite(UINT16 offset, UINT8 dta);
3952 static void xeviousWorkRAMWrite(UINT16 offset, UINT8 dta);
3953 static void xeviousSharedRAM1Write(UINT16 offset, UINT8 dta);
3954 static void xeviousSharedRAM2Write(UINT16 offset, UINT8 dta);
3955 static void xeviousSharedRAM3Write(UINT16 offset, UINT8 dta);
3956
3957 static void xeviousCalcPalette(void);
3958 static void xeviousRenderTiles0(void);
3959 static void xeviousRenderTiles1(void);
3960 static UINT32 xeviousGetSpriteParams(struct Namco_Sprite_Params *spriteParams, UINT32 offset);
3961
3962 struct Xevious_RAM
3963 {
3964 UINT8 bs[2];
3965
3966 UINT8 *workram;
3967 UINT8 *fg_videoram;
3968 UINT8 *fg_colorram;
3969 UINT8 *bg_videoram;
3970 UINT8 *bg_colorram;
3971 };
3972
3973 struct Xevious_ROM
3974 {
3975 UINT8 *rom2a;
3976 UINT8 *rom2b;
3977 UINT8 *rom2c;
3978 };
3979
3980 static struct Xevious_RAM xeviousRAM;
3981 static struct Xevious_ROM xeviousROM;
3982
3983 static struct CPU_Config_Def xeviousCPU[NAMCO_BRD_CPU_COUNT] =
3984 {
3985 {
3986 /* CPU ID = */ CPU1,
3987 /* CPU Read Func = */ namcoZ80ProgRead,
3988 /* CPU Write Func = */ namcoZ80ProgWrite,
3989 /* Memory Mapping = */ xeviousMemoryMap1
3990 },
3991 {
3992 /* CPU ID = */ CPU2,
3993 /* CPU Read Func = */ namcoZ80ProgRead,
3994 /* CPU Write Func = */ namcoZ80ProgWrite,
3995 /* Memory Mapping = */ xeviousMemoryMap2
3996 },
3997 {
3998 /* CPU ID = */ CPU3,
3999 /* CPU Read Func = */ namcoZ80ProgRead,
4000 /* CPU Write Func = */ namcoZ80ProgWrite,
4001 /* Memory Mapping = */ xeviousMemoryMap3
4002 },
4003 };
4004
4005 static struct CPU_Rd_Table xeviousZ80ReadTable[] =
4006 {
4007 { 0x6800, 0x6807, namcoZ80ReadDip },
4008 { 0x7000, 0x700f, namcoCustomICsReadDta },
4009 { 0x7100, 0x7100, namcoCustomICsReadCmd },
4010 { 0x7800, 0x7fff, xeviousWorkRAMRead },
4011 { 0x8000, 0x8fff, xeviousSharedRAM1Read },
4012 { 0x9000, 0x9fff, xeviousSharedRAM2Read },
4013 { 0xa000, 0xafff, xeviousSharedRAM3Read },
4014 { 0xf000, 0xffff, xeviousPlayFieldRead },
4015 { 0x0000, 0x0000, NULL },
4016 };
4017
4018 static struct CPU_Wr_Table xeviousZ80WriteTable[] =
4019 {
4020 { 0x6800, 0x681f, namcoZ80WriteSound },
4021 { 0x6820, 0x6820, namcoZ80WriteCPU1Irq },
4022 { 0x6821, 0x6821, namcoZ80WriteCPU2Irq },
4023 { 0x6822, 0x6822, namcoZ80WriteCPU3Irq },
4024 { 0x6823, 0x6823, namcoZ80WriteCPUReset },
4025 // { 0x6830, 0x6830, WatchDogWriteNotImplemented },
4026 { 0x7000, 0x700f, namcoCustomICsWriteDta },
4027 { 0x7100, 0x7100, namcoCustomICsWriteCmd },
4028 { 0x7800, 0x7fff, xeviousWorkRAMWrite },
4029 { 0x8000, 0x8fff, xeviousSharedRAM1Write },
4030 { 0x9000, 0x9fff, xeviousSharedRAM2Write },
4031 { 0xa000, 0xafff, xeviousSharedRAM3Write },
4032 { 0xb000, 0xb7ff, xeviousFGColorRAMWrite },
4033 { 0xb800, 0xbfff, xeviousBGColorRAMWrite },
4034 { 0xc000, 0xc7ff, xeviousFGCharRAMWrite },
4035 { 0xc800, 0xcfff, xeviousBGCharRAMWrite },
4036 { 0xd000, 0xd07f, xevious_vh_latch_w },
4037 { 0xf000, 0xffff, xevious_bs_wr },
4038 { 0x0000, 0x0000, NULL },
4039 };
4040
4041 static struct Memory_Map_Def xeviousMemTable[] =
4042 {
4043 { &memory.Z80.rom1, 0x04000, MEM_PGM },
4044 { &memory.Z80.rom2, 0x04000, MEM_PGM },
4045 { &memory.Z80.rom3, 0x04000, MEM_PGM },
4046 { &memory.PROM.palette, 0x00300, MEM_ROM },
4047 { &memory.PROM.charLookup, 0x00400, MEM_ROM },
4048 { &memory.PROM.spriteLookup, 0x00400, MEM_ROM },
4049 { &NamcoSoundProm, 0x00200, MEM_ROM },
4050
4051 { &xeviousRAM.workram, 0x00800, MEM_RAM },
4052 { &memory.RAM.shared1, 0x01000, MEM_RAM },
4053 { &memory.RAM.shared2, 0x01000, MEM_RAM },
4054 { &memory.RAM.shared3, 0x01000, MEM_RAM },
4055 { &memory.RAM.video, 0x02000, MEM_RAM },
4056
4057 { &graphics.bgTiles, XEVIOUS_TILES_MEM_SIZE_IN_BYTES, MEM_DATA },
4058 { &xeviousROM.rom2a, 0x01000, MEM_DATA },
4059 { &xeviousROM.rom2b, 0x02000, MEM_DATA },
4060 { &xeviousROM.rom2c, 0x01000, MEM_DATA },
4061 { &graphics.fgChars, XEVIOUS_CHAR_MEM_SIZE_IN_BYTES, MEM_DATA },
4062 { &graphics.sprites, XEVIOUS_SPRITE_MEM_SIZE_IN_BYTES, MEM_DATA },
4063 { (UINT8 **)&graphics.palette, XEVIOUS_PALETTE_MEM_SIZE_IN_BYTES,MEM_DATA32},
4064 };
4065
4066 #define XEVIOUS_MEM_TBL_SIZE (sizeof(xeviousMemTable) / sizeof(struct Memory_Map_Def))
4067
4068 static struct ROM_Load_Def xeviousROMTable[] =
4069 {
4070 { &memory.Z80.rom1, 0x00000, NULL },
4071 { &memory.Z80.rom1, 0x01000, NULL },
4072 { &memory.Z80.rom1, 0x02000, NULL },
4073 { &memory.Z80.rom1, 0x03000, NULL },
4074 { &memory.Z80.rom2, 0x00000, NULL },
4075 { &memory.Z80.rom2, 0x01000, NULL },
4076 { &memory.Z80.rom3, 0x00000, NULL },
4077
4078 { &tempRom, 0x00000, xeviousCharDecode },
4079
4080 { &tempRom, 0x00000, NULL },
4081 { &tempRom, 0x01000, xeviousTilesDecode },
4082
4083 { &tempRom, 0x00000, NULL },
4084 { &tempRom, 0x02000, NULL },
4085 { &tempRom, 0x04000, NULL },
4086 { &tempRom, 0x06000, xeviousSpriteDecode },
4087
4088 { &xeviousROM.rom2a, 0x00000, NULL },
4089 { &xeviousROM.rom2b, 0x00000, NULL },
4090 { &xeviousROM.rom2c, 0x00000, NULL },
4091
4092 { &memory.PROM.palette, 0x00000, NULL },
4093 { &memory.PROM.palette, 0x00100, NULL },
4094 { &memory.PROM.palette, 0x00200, NULL },
4095 { &memory.PROM.charLookup, 0x00000, NULL },
4096 { &memory.PROM.charLookup, 0x00200, NULL },
4097 { &memory.PROM.spriteLookup, 0x00000, NULL },
4098 { &memory.PROM.spriteLookup, 0x00200, NULL },
4099 { &NamcoSoundProm, 0x00000, NULL },
4100 { &NamcoSoundProm, 0x00100, namcoMachineInit }
4101 };
4102
4103 #define XEVIOUS_ROM_TBL_SIZE (sizeof(xeviousROMTable) / sizeof(struct ROM_Load_Def))
4104
4105 static DrawFunc_t xeviousDrawFuncs[] =
4106 {
4107 xeviousCalcPalette,
4108 xeviousRenderTiles0,
4109 namcoRenderSprites,
4110 xeviousRenderTiles1,
4111 };
4112
4113 #define XEVIOUS_DRAW_TBL_SIZE (sizeof(xeviousDrawFuncs) / sizeof(xeviousDrawFuncs[0]))
4114
4115 static struct Namco_Custom_RW_Entry xeviousCustomRWTable[] =
4116 {
4117 { 0x71, namco51xxRead },
4118 { 0xa1, namco51xxWrite },
4119 { 0x61, namco51xxWrite },
4120 { 0x74, namco50xxRead },
4121 { 0x64, namco50xxWrite },
4122 { 0x68, namco54xxWrite },
4123 { 0x00, NULL }
4124 };
4125
4126 static struct N54XX_Sample_Info_Def xeviousN54xxSampleList[] =
4127 {
4128 { 0, "\x40\x40\x01\xff" }, // ground target explosion
4129 { 1, "\x40\x00\x02\xdf" }, // Solvalou explosion
4130 { 2, "\x10\x00\x80\xff" }, // credit
4131 { 3, "\x30\x30\x03\xdf" }, // Garu Zakato explosion
4132 { -1, "" }
4133 };
4134
4135 static struct Machine_Config_Def xeviousMachineConfig =
4136 {
4137 /*cpus */ xeviousCPU,
4138 /*wrAddrList */ xeviousZ80WriteTable,
4139 /*rdAddrList */ xeviousZ80ReadTable,
4140 /*memMapTable */ xeviousMemTable,
4141 /*sizeOfMemMapTable */ XEVIOUS_MEM_TBL_SIZE,
4142 /*romLayoutTable */ xeviousROMTable,
4143 /*sizeOfRomLayoutTable */ XEVIOUS_ROM_TBL_SIZE,
4144 /*tempRomSize */ 0x8000,
4145 /*tilemapsConfig */ xeviousTilemapConfig,
4146 /*drawLayerTable */ xeviousDrawFuncs,
4147 /*drawTableSize */ XEVIOUS_DRAW_TBL_SIZE,
4148 /*getSpriteParams */ xeviousGetSpriteParams,
4149 /*reset */ DrvDoReset,
4150 /*customRWTable */ xeviousCustomRWTable,
4151 /*n54xxSampleList */ xeviousN54xxSampleList
4152 };
4153
xeviousInit(void)4154 static INT32 xeviousInit(void)
4155 {
4156 machine.game = NAMCO_XEVIOUS;
4157 machine.numOfDips = XEVIOUS_NUM_OF_DIPSWITCHES;
4158
4159 machine.config = &xeviousMachineConfig;
4160
4161 return namcoInitBoard();
4162 }
4163
xeviousMemoryMap1(void)4164 static void xeviousMemoryMap1(void)
4165 {
4166 ZetMapMemory(memory.Z80.rom1, 0x0000, 0x3fff, MAP_ROM);
4167 ZetMapMemory(xeviousRAM.workram, 0x7800, 0x7fff, MAP_RAM);
4168 ZetMapMemory(memory.RAM.shared1, 0x8000, 0x8fff, MAP_RAM);
4169 ZetMapMemory(memory.RAM.shared2, 0x9000, 0x9fff, MAP_RAM);
4170 ZetMapMemory(memory.RAM.shared3, 0xa000, 0xafff, MAP_RAM);
4171 ZetMapMemory(memory.RAM.video, 0xb000, 0xcfff, MAP_RAM);
4172 }
4173
xeviousMemoryMap2(void)4174 static void xeviousMemoryMap2(void)
4175 {
4176 ZetMapMemory(memory.Z80.rom2, 0x0000, 0x3fff, MAP_ROM);
4177 ZetMapMemory(xeviousRAM.workram, 0x7800, 0x7fff, MAP_RAM);
4178 ZetMapMemory(memory.RAM.shared1, 0x8000, 0x8fff, MAP_RAM);
4179 ZetMapMemory(memory.RAM.shared2, 0x9000, 0x9fff, MAP_RAM);
4180 ZetMapMemory(memory.RAM.shared3, 0xa000, 0xafff, MAP_RAM);
4181 ZetMapMemory(memory.RAM.video, 0xb000, 0xcfff, MAP_RAM);
4182 }
4183
xeviousMemoryMap3(void)4184 static void xeviousMemoryMap3(void)
4185 {
4186 ZetMapMemory(memory.Z80.rom3, 0x0000, 0x3fff, MAP_ROM);
4187 ZetMapMemory(xeviousRAM.workram, 0x7800, 0x7fff, MAP_RAM);
4188 ZetMapMemory(memory.RAM.shared1, 0x8000, 0x8fff, MAP_RAM);
4189 ZetMapMemory(memory.RAM.shared2, 0x9000, 0x9fff, MAP_RAM);
4190 ZetMapMemory(memory.RAM.shared3, 0xa000, 0xafff, MAP_RAM);
4191 ZetMapMemory(memory.RAM.video, 0xb000, 0xcfff, MAP_RAM);
4192 }
4193
xeviousCharDecode(void)4194 static INT32 xeviousCharDecode(void)
4195 {
4196 // Load and decode the chars
4197 /* foreground characters: */
4198 /* 512 characters */
4199 /* 1 bit per pixel */
4200 /* 8 x 8 characters */
4201 /* every char takes 8 consecutive bytes */
4202 GfxDecode(
4203 XEVIOUS_NUM_OF_CHAR,
4204 XEVIOUS_NUM_OF_CHAR_PALETTE_BITS,
4205 8, 8,
4206 xeviousOffsets.fgChars,
4207 XeviousCharXOffsets,
4208 XeviousCharYOffsets,
4209 XEVIOUS_SIZE_OF_CHAR_IN_BYTES,
4210 tempRom,
4211 graphics.fgChars
4212 );
4213
4214 memset(tempRom, 0, machine.config->tempRomSize);
4215
4216 return 0;
4217 }
4218
xeviousTilesDecode(void)4219 static INT32 xeviousTilesDecode(void)
4220 {
4221 /* background tiles */
4222 /* 512 characters */
4223 /* 2 bits per pixel */
4224 /* 8 x 8 characters */
4225 /* every char takes 8 consecutive bytes */
4226 GfxDecode(
4227 XEVIOUS_NUM_OF_BGTILE,
4228 XEVIOUS_NUM_OF_BGTILE_PALETTE_BITS,
4229 8, 8,
4230 xeviousOffsets.bgChars,
4231 XeviousCharXOffsets,
4232 XeviousCharYOffsets,
4233 XEVIOUS_SIZE_OF_BGTILE_IN_BYTES,
4234 tempRom,
4235 graphics.bgTiles
4236 );
4237
4238 memset(tempRom, 0, machine.config->tempRomSize);
4239
4240 return 0;
4241 }
4242
xeviousSpriteDecode(void)4243 static INT32 xeviousSpriteDecode(void)
4244 {
4245 /* sprite set #1 */
4246 /* 128 sprites */
4247 /* 3 bits per pixel */
4248 /* 16 x 16 sprites */
4249 /* every sprite takes 128 (64?) consecutive bytes */
4250 GfxDecode(
4251 XEVIOUS_NUM_OF_SPRITE1,
4252 XEVIOUS_NUM_OF_SPRITE_PALETTE_BITS,
4253 16, 16,
4254 xeviousOffsets.sprites1,
4255 (INT32*)xOffsets16x16Tiles2Bit,
4256 (INT32*)yOffsets16x16Tiles2Bit,
4257 XEVIOUS_SIZE_OF_SPRITE_IN_BYTES,
4258 tempRom + (0x0000),
4259 graphics.sprites
4260 );
4261
4262 /* sprite set #2 */
4263 /* 128 sprites */
4264 /* 3 bits per pixel */
4265 /* 16 x 16 sprites */
4266 /* every sprite takes 128 (64?) consecutive bytes */
4267 GfxDecode(
4268 XEVIOUS_NUM_OF_SPRITE2,
4269 XEVIOUS_NUM_OF_SPRITE_PALETTE_BITS,
4270 16, 16,
4271 xeviousOffsets.sprites2,
4272 (INT32*)xOffsets16x16Tiles2Bit,
4273 (INT32*)yOffsets16x16Tiles2Bit,
4274 XEVIOUS_SIZE_OF_SPRITE_IN_BYTES,
4275 tempRom + (0x2000),
4276 graphics.sprites + (XEVIOUS_NUM_OF_SPRITE1 * (16 * 16))
4277 );
4278
4279 /* sprite set #3 */
4280 /* 64 sprites */
4281 /* 3 bits per pixel (one is always 0) */
4282 /* 16 x 16 sprites */
4283 /* every sprite takes 64 consecutive bytes */
4284 GfxDecode(
4285 XEVIOUS_NUM_OF_SPRITE3,
4286 XEVIOUS_NUM_OF_SPRITE_PALETTE_BITS,
4287 16, 16,
4288 xeviousOffsets.sprites3,
4289 (INT32*)xOffsets16x16Tiles2Bit,
4290 (INT32*)yOffsets16x16Tiles2Bit,
4291 XEVIOUS_SIZE_OF_SPRITE_IN_BYTES,
4292 tempRom + (0x6000),
4293 graphics.sprites + ((XEVIOUS_NUM_OF_SPRITE1 + XEVIOUS_NUM_OF_SPRITE2) * (16 * 16))
4294 );
4295
4296 return 0;
4297 }
4298
tilemap_scan(xevious)4299 static tilemap_scan ( xevious )
4300 {
4301 return (row) * XEVIOUS_NO_OF_COLS + col;
4302 }
4303
tilemap_callback(xevious_bg)4304 static tilemap_callback ( xevious_bg )
4305 {
4306 UINT8 code = xeviousRAM.bg_videoram[offs];
4307 UINT8 attr = xeviousRAM.bg_colorram[offs];
4308
4309 TILE_SET_INFO(
4310 0,
4311 (UINT16)(code + ((attr & 0x01) << 8)),
4312 ((attr & 0x3c) >> 2) | ((code & 0x80) >> 3) | ((attr & 0x03) << 5),
4313 ((attr & 0xc0) >> 6)
4314 );
4315 }
4316
tilemap_callback(xevious_fg)4317 static tilemap_callback ( xevious_fg )
4318 {
4319 UINT8 code = xeviousRAM.fg_videoram[offs];
4320 UINT8 attr = xeviousRAM.fg_colorram[offs];
4321 TILE_SET_INFO(
4322 1,
4323 code,
4324 ((attr & 0x03) << 4) | ((attr & 0x3c) >> 2),
4325 ((attr & 0xc0) >> 6)
4326 );
4327
4328 }
4329
xeviousTilemapConfig(void)4330 static INT32 xeviousTilemapConfig(void)
4331 {
4332 xeviousRAM.fg_colorram = memory.RAM.video; // 0xb000 - 0xb7ff
4333 xeviousRAM.bg_colorram = memory.RAM.video + 0x0800; // 0xb800 - 0xbfff
4334 xeviousRAM.fg_videoram = memory.RAM.video + 0x1000; // 0xc000 - 0xc7ff
4335 xeviousRAM.bg_videoram = memory.RAM.video + 0x1800; // 0xc800 - 0xcfff
4336
4337 GenericTilemapInit(
4338 0,
4339 xevious_map_scan, xevious_bg_map_callback,
4340 8, 8,
4341 XEVIOUS_NO_OF_COLS, XEVIOUS_NO_OF_ROWS
4342 );
4343 GenericTilemapSetGfx(
4344 0,
4345 graphics.bgTiles,
4346 XEVIOUS_NUM_OF_BGTILE_PALETTE_BITS,
4347 8, 8,
4348 XEVIOUS_TILES_MEM_SIZE_IN_BYTES,
4349 XEVIOUS_PALETTE_OFFSET_BGTILES,
4350 0x7f //XEVIOUS_PALETTE_SIZE_BGTILES - 1
4351 );
4352
4353 GenericTilemapInit(
4354 1,
4355 xevious_map_scan, xevious_fg_map_callback,
4356 8, 8,
4357 XEVIOUS_NO_OF_COLS, XEVIOUS_NO_OF_ROWS
4358 );
4359 GenericTilemapSetGfx(
4360 1,
4361 graphics.fgChars,
4362 XEVIOUS_NUM_OF_CHAR_PALETTE_BITS,
4363 8, 8,
4364 XEVIOUS_CHAR_MEM_SIZE_IN_BYTES,
4365 XEVIOUS_PALETTE_OFFSET_CHARS,
4366 0x3f // XEVIOUS_PALETTE_SIZE_CHARS - 1
4367 );
4368 GenericTilemapSetTransparent(1, 0);
4369
4370 GenericTilemapSetOffsets(TMAP_GLOBAL, 0, 0);
4371
4372 return 0;
4373 }
4374
xeviousPlayFieldRead(UINT16 offset)4375 static UINT8 xeviousPlayFieldRead(UINT16 offset)
4376 {
4377 UINT16 addr_2b = ( ((xeviousRAM.bs[1] & 0x7e) << 6) |
4378 ((xeviousRAM.bs[0] & 0xfe) >> 1) );
4379
4380 UINT8 dat_2b = xeviousROM.rom2b[addr_2b];
4381
4382 UINT16 addr_2a = addr_2b >> 1;
4383
4384 UINT8 dat_2a = xeviousROM.rom2a[addr_2a];
4385 if (addr_2b & 1)
4386 {
4387 dat_2a >>= 4;
4388 }
4389 else
4390 {
4391 dat_2a &= 0x0f;
4392 }
4393
4394 UINT16 addr_2c = (UINT16)dat_2b << 2;
4395 if (dat_2a & 1)
4396 {
4397 addr_2c += 0x0400;
4398 }
4399 if ((xeviousRAM.bs[0] & 1) ^ ((dat_2a >> 2) & 1) )
4400 {
4401 addr_2c |= 1;
4402 }
4403 if ((xeviousRAM.bs[1] & 1) ^ ((dat_2a >> 1) & 1) )
4404 {
4405 addr_2c |= 2;
4406 }
4407
4408 UINT8 dat_2c = 0;
4409 if (offset & 1)
4410 {
4411 dat_2c = xeviousROM.rom2c[addr_2c + 0x0800];
4412 }
4413 else
4414 {
4415 dat_2c = xeviousROM.rom2c[addr_2c];
4416 dat_2c = (dat_2c & 0x3f) | ((dat_2c & 0x80) >> 1) | ((dat_2c & 0x40) << 1);
4417 dat_2c ^= ((dat_2a << 4) & 0x40);
4418 dat_2c ^= ((dat_2a << 6) & 0x80);
4419 }
4420
4421 return dat_2c;
4422 }
4423
xeviousWorkRAMRead(UINT16 offset)4424 static UINT8 xeviousWorkRAMRead(UINT16 offset)
4425 {
4426 return xeviousRAM.workram[offset];
4427 }
4428
xeviousSharedRAM1Read(UINT16 offset)4429 static UINT8 xeviousSharedRAM1Read(UINT16 offset)
4430 {
4431 return memory.RAM.shared1[offset & 0x07ff];
4432 }
4433
xeviousSharedRAM2Read(UINT16 offset)4434 static UINT8 xeviousSharedRAM2Read(UINT16 offset)
4435 {
4436 return memory.RAM.shared2[offset & 0x07ff];
4437 }
4438
xeviousSharedRAM3Read(UINT16 offset)4439 static UINT8 xeviousSharedRAM3Read(UINT16 offset)
4440 {
4441 return memory.RAM.shared3[offset & 0x07ff];
4442 }
4443
xevious_bs_wr(UINT16 offset,UINT8 dta)4444 static void xevious_bs_wr(UINT16 offset, UINT8 dta)
4445 {
4446 xeviousRAM.bs[offset & 0x01] = dta;
4447 }
4448
xevious_vh_latch_w(UINT16 offset,UINT8 dta)4449 static void xevious_vh_latch_w(UINT16 offset, UINT8 dta)
4450 {
4451 UINT16 dta16 = dta + ((offset & 1) << 8);
4452 UINT16 reg = (offset & 0xf0) >> 4;
4453
4454 switch (reg)
4455 {
4456 case 0:
4457 {
4458 // set bg tilemap x
4459 GenericTilemapSetScrollX(0, dta16 + 20);
4460 break;
4461 }
4462 case 1:
4463 {
4464 // set fg tilemap x
4465 GenericTilemapSetScrollX(1, dta16 + 32);
4466 break;
4467 }
4468 case 2:
4469 {
4470 // set bg tilemap y
4471 GenericTilemapSetScrollY(0, dta16 + 16);
4472 break;
4473 }
4474 case 3:
4475 {
4476 // set fg tilemap y
4477 GenericTilemapSetScrollY(1, dta16 + 18);
4478 break;
4479 }
4480 case 7:
4481 {
4482 // flipscreen
4483 machine.flipScreen = dta & 1;
4484 break;
4485 }
4486 default:
4487 {
4488 break;
4489 }
4490 }
4491
4492 }
4493
xeviousBGColorRAMWrite(UINT16 offset,UINT8 dta)4494 static void xeviousBGColorRAMWrite(UINT16 offset, UINT8 dta)
4495 {
4496 *(xeviousRAM.bg_colorram + (offset & 0x7ff)) = dta;
4497 }
4498
xeviousBGCharRAMWrite(UINT16 offset,UINT8 dta)4499 static void xeviousBGCharRAMWrite(UINT16 offset, UINT8 dta)
4500 {
4501 *(xeviousRAM.bg_videoram + (offset & 0x7ff)) = dta;
4502 }
4503
xeviousFGColorRAMWrite(UINT16 offset,UINT8 dta)4504 static void xeviousFGColorRAMWrite(UINT16 offset, UINT8 dta)
4505 {
4506 *(xeviousRAM.fg_colorram + (offset & 0x7ff)) = dta;
4507 }
4508
xeviousFGCharRAMWrite(UINT16 offset,UINT8 dta)4509 static void xeviousFGCharRAMWrite(UINT16 offset, UINT8 dta)
4510 {
4511 *(xeviousRAM.fg_videoram + (offset & 0x7ff)) = dta;
4512 }
4513
xeviousWorkRAMWrite(UINT16 offset,UINT8 dta)4514 static void xeviousWorkRAMWrite(UINT16 offset, UINT8 dta)
4515 {
4516 xeviousRAM.workram[offset & 0x7ff] = dta;
4517 }
4518
xeviousSharedRAM1Write(UINT16 offset,UINT8 dta)4519 static void xeviousSharedRAM1Write(UINT16 offset, UINT8 dta)
4520 {
4521 memory.RAM.shared1[offset & 0x07ff] = dta;
4522 }
4523
xeviousSharedRAM2Write(UINT16 offset,UINT8 dta)4524 static void xeviousSharedRAM2Write(UINT16 offset, UINT8 dta)
4525 {
4526 memory.RAM.shared2[offset & 0x07ff] = dta;
4527 }
4528
xeviousSharedRAM3Write(UINT16 offset,UINT8 dta)4529 static void xeviousSharedRAM3Write(UINT16 offset, UINT8 dta)
4530 {
4531 memory.RAM.shared3[offset & 0x07ff] = dta;
4532 }
4533
4534 #define XEVIOUS_BASE_PALETTE_SIZE 128
4535
xeviousCalcPalette(void)4536 static void xeviousCalcPalette(void)
4537 {
4538 UINT32 palette[XEVIOUS_BASE_PALETTE_SIZE + 1];
4539 UINT32 code = 0;
4540
4541 for (INT32 i = 0; i < XEVIOUS_BASE_PALETTE_SIZE; i ++)
4542 {
4543 INT32 r = Colour4Bit[(memory.PROM.palette[0x0000 + i]) & 0x0f];
4544 INT32 g = Colour4Bit[(memory.PROM.palette[0x0100 + i]) & 0x0f];
4545 INT32 b = Colour4Bit[(memory.PROM.palette[0x0200 + i]) & 0x0f];
4546
4547 palette[i] = BurnHighCol(r, g, b, 0);
4548 }
4549
4550 palette[XEVIOUS_BASE_PALETTE_SIZE] = BurnHighCol(0, 0, 0, 0); // Transparency Colour for Sprites
4551
4552 /* bg_select */
4553 for (INT32 i = 0; i < XEVIOUS_PALETTE_SIZE_BGTILES; i ++)
4554 {
4555 code = ( (memory.PROM.charLookup[ i] & 0x0f) |
4556 ((memory.PROM.charLookup[XEVIOUS_PALETTE_SIZE_BGTILES + i] & 0x0f) << 4) );
4557 graphics.palette[XEVIOUS_PALETTE_OFFSET_BGTILES + i] = palette[code];
4558 }
4559
4560 /* sprites */
4561 for (INT32 i = 0; i < XEVIOUS_PALETTE_SIZE_SPRITES; i ++)
4562 {
4563 code = ( (memory.PROM.spriteLookup[i ] & 0x0f) |
4564 ((memory.PROM.spriteLookup[XEVIOUS_PALETTE_SIZE_SPRITES + i] & 0x0f) << 4) );
4565 if (code & 0x80)
4566 graphics.palette[XEVIOUS_PALETTE_OFFSET_SPRITE + i] = palette[code & 0x7f];
4567 else
4568 graphics.palette[XEVIOUS_PALETTE_OFFSET_SPRITE + i] = palette[XEVIOUS_BASE_PALETTE_SIZE];
4569 }
4570
4571 /* characters - direct mapping */
4572 for (INT32 i = 0; i < XEVIOUS_PALETTE_SIZE_CHARS; i += 2)
4573 {
4574 graphics.palette[XEVIOUS_PALETTE_OFFSET_CHARS + i + 0] = palette[XEVIOUS_BASE_PALETTE_SIZE];
4575 graphics.palette[XEVIOUS_PALETTE_OFFSET_CHARS + i + 1] = palette[i / 2];
4576 }
4577
4578 }
4579
xeviousRenderTiles0(void)4580 static void xeviousRenderTiles0(void)
4581 {
4582 GenericTilemapSetEnable(0, 1);
4583 GenericTilemapDraw(0, pTransDraw, 0 | TMAP_DRAWOPAQUE);
4584 }
4585
xeviousRenderTiles1(void)4586 static void xeviousRenderTiles1(void)
4587 {
4588 GenericTilemapSetEnable(1, 1);
4589 GenericTilemapDraw(1, pTransDraw, 0 | TMAP_TRANSPARENT);
4590 }
4591
xeviousGetSpriteParams(struct Namco_Sprite_Params * spriteParams,UINT32 offset)4592 static UINT32 xeviousGetSpriteParams(struct Namco_Sprite_Params *spriteParams, UINT32 offset)
4593 {
4594 UINT8 *spriteRam2 = memory.RAM.shared1 + 0x780;
4595 UINT8 *spriteRam3 = memory.RAM.shared2 + 0x780;
4596 UINT8 *spriteRam1 = memory.RAM.shared3 + 0x780;
4597
4598 if (0 == (spriteRam1[offset + 1] & 0x40))
4599 {
4600 INT32 sprite = spriteRam1[offset + 0];
4601
4602 if (spriteRam3[offset + 0] & 0x80)
4603 {
4604 sprite &= 0x3f;
4605 sprite += 0x100;
4606 }
4607 spriteParams->sprite = sprite;
4608 spriteParams->colour = spriteRam1[offset + 1] & 0x7f;
4609
4610 spriteParams->xStart = ((spriteRam2[offset + 1] - 40) + (spriteRam3[offset + 1] & 1 ) * 0x100);
4611 spriteParams->yStart = NAMCO_SCREEN_WIDTH - (spriteRam2[offset + 0] - 1);
4612 spriteParams->xStep = 16;
4613 spriteParams->yStep = 16;
4614
4615 spriteParams->flags = ((spriteRam3[offset + 0] & 0x03) << 2) |
4616 ((spriteRam3[offset + 0] & 0x0c) >> 2);
4617
4618 if (spriteParams->flags & ySize)
4619 {
4620 spriteParams->yStart -= 16;
4621 }
4622
4623 spriteParams->paletteBits = XEVIOUS_NUM_OF_SPRITE_PALETTE_BITS;
4624 spriteParams->paletteOffset = XEVIOUS_PALETTE_OFFSET_SPRITE;
4625
4626 return 1;
4627 }
4628
4629 return 0;
4630 }
4631
4632 struct BurnDriver BurnDrvXevious =
4633 {
4634 /* filename of zip without extension = */ "xevious",
4635 /* filename of parent, no extension = */ NULL,
4636 /* filename of board ROMs = */ NULL,
4637 /* filename of samples ZIP = */ "xevious",
4638 /* date = */ "1982",
4639 /* FullName = */ "Xevious (Namco)\0",
4640 /* Comment = */ NULL,
4641 /* Manufacturer = */ "Namco",
4642 /* System = */ "Miscellaneous",
4643 /* FullName = */ NULL,
4644 /* Comment = */ NULL,
4645 /* Manufacturer = */ NULL,
4646 /* System = */ NULL,
4647 /* Flags = */ BDF_GAME_WORKING |
4648 BDF_ORIENTATION_VERTICAL |
4649 BDF_ORIENTATION_FLIPPED |
4650 BDF_HISCORE_SUPPORTED,
4651 /* No of Players = */ 2,
4652 /* Hardware Type = */ HARDWARE_MISC_PRE90S,
4653 /* Genre = */ GBF_VERSHOOT,
4654 /* Family = */ 0,
4655 /* GetZipName func = */ NULL,
4656 /* GetROMInfo func = */ XeviousRomInfo,
4657 /* GetROMName func = */ XeviousRomName,
4658 /* GetHDDInfo func = */ NULL,
4659 /* GetHDDName func = */ NULL,
4660 /* GetSampleInfo func = */ XeviousSampleInfo,
4661 /* GetSampleName func = */ XeviousSampleName,
4662 /* GetInputInfo func = */ XeviousInputInfo,
4663 /* GetDIPInfo func = */ XeviousDIPInfo,
4664 /* Init func = */ xeviousInit,
4665 /* Exit func = */ DrvExit,
4666 /* Frame func = */ DrvFrame,
4667 /* Redraw func = */ DrvDraw,
4668 /* Areascan func = */ DrvScan,
4669 /* Recalc Palette = */ NULL,
4670 /* Palette Entries count = */ XEVIOUS_PALETTE_SIZE,
4671 /* Width, Height = */ NAMCO_SCREEN_WIDTH, NAMCO_SCREEN_HEIGHT,
4672 /* xAspect, yAspect = */ 3, 4
4673 };
4674
4675 struct BurnDriver BurnDrvSxevious =
4676 {
4677 /* filename of zip without extension = */ "sxevious",
4678 /* filename of parent, no extension = */ "xevious",
4679 /* filename of board ROMs = */ NULL,
4680 /* filename of samples ZIP = */ "xevious",
4681 /* date = */ "1984",
4682 /* FullName = */ "Super Xevious (Namco)\0",
4683 /* Comment = */ NULL,
4684 /* Manufacturer = */ "Namco",
4685 /* System = */ "Miscellaneous",
4686 /* FullName = */ NULL,
4687 /* Comment = */ NULL,
4688 /* Manufacturer = */ NULL,
4689 /* System = */ NULL,
4690 /* Flags = */ BDF_GAME_WORKING | BDF_CLONE |
4691 BDF_ORIENTATION_VERTICAL |
4692 BDF_ORIENTATION_FLIPPED |
4693 BDF_HISCORE_SUPPORTED,
4694 /* No of Players = */ 2,
4695 /* Hardware Type = */ HARDWARE_MISC_PRE90S,
4696 /* Genre = */ GBF_VERSHOOT,
4697 /* Family = */ 0,
4698 /* GetZipName func = */ NULL,
4699 /* GetROMInfo func = */ SxeviousRomInfo,
4700 /* GetROMName func = */ SxeviousRomName,
4701 /* GetHDDInfo func = */ NULL,
4702 /* GetHDDName func = */ NULL,
4703 /* GetSampleInfo func = */ XeviousSampleInfo,
4704 /* GetSampleName func = */ XeviousSampleName,
4705 /* GetInputInfo func = */ XeviousInputInfo,
4706 /* GetDIPInfo func = */ SxeviousDIPInfo,
4707 /* Init func = */ xeviousInit,
4708 /* Exit func = */ DrvExit,
4709 /* Frame func = */ DrvFrame,
4710 /* Redraw func = */ DrvDraw,
4711 /* Areascan func = */ DrvScan,
4712 /* Recalc Palette = */ NULL,
4713 /* Palette Entries count = */ XEVIOUS_PALETTE_SIZE,
4714 /* Width, Height = */ NAMCO_SCREEN_WIDTH, NAMCO_SCREEN_HEIGHT,
4715 /* xAspect, yAspect = */ 3, 4
4716 };
4717