1 /* 2 * Copyright (c) 2015, Marcos Medeiros 3 * Licensed under BSD 3-clause. 4 */ 5 #ifndef MIPS3_BRANCH 6 #define MIPS3_BRANCH 7 8 #include "mips3.h" 9 #include "mipsdef.h" 10 #include "mips3_memory.h" 11 12 namespace mips 13 { 14 J(uint32_t opcode)15inline void mips3::J(uint32_t opcode) 16 { 17 m_next_pc = (m_state.pc & 0xF0000000) | (TARGET << 2); 18 m_delay_slot = true; 19 } 20 JR(uint32_t opcode)21inline void mips3::JR(uint32_t opcode) 22 { 23 m_next_pc = (uint32_t)RS; 24 m_delay_slot = true; 25 } 26 JAL(uint32_t opcode)27inline void mips3::JAL(uint32_t opcode) 28 { 29 m_next_pc = (m_state.pc & 0xF0000000) | (TARGET << 2); 30 m_delay_slot = true; 31 m_state.r[LR] = (int32_t)(m_state.pc + 4); 32 } 33 JALR(uint32_t opcode)34inline void mips3::JALR(uint32_t opcode) 35 { 36 m_next_pc = (uint32_t)RS; 37 m_delay_slot = true; 38 m_state.r[LR] = (int32_t)(m_state.pc + 4); 39 } 40 BLTZ(uint32_t opcode)41inline void mips3::BLTZ(uint32_t opcode) 42 { 43 if ((int64_t)RS < 0) { 44 m_next_pc = m_state.pc + ((int32_t)(SIMM) << 2); 45 m_delay_slot = true; 46 } 47 } 48 BLTZAL(uint32_t opcode)49inline void mips3::BLTZAL(uint32_t opcode) 50 { 51 if ((int64_t)RS < 0) { 52 m_next_pc = m_state.pc + ((int32_t)(SIMM) << 2); 53 m_delay_slot = true; 54 m_state.r[LR] = (int32_t)(m_state.pc + 4); 55 } 56 } 57 BGEZ(uint32_t opcode)58inline void mips3::BGEZ(uint32_t opcode) 59 { 60 if ((int64_t)RS >= 0) { 61 m_next_pc = m_state.pc + ((int32_t)(SIMM) << 2); 62 m_delay_slot = true; 63 } 64 } 65 BGEZAL(uint32_t opcode)66inline void mips3::BGEZAL(uint32_t opcode) 67 { 68 if ((int64_t)RS >= 0) { 69 m_next_pc = m_state.pc + ((int32_t)(SIMM) << 2); 70 m_delay_slot = true; 71 m_state.r[LR] = (int32_t)(m_state.pc + 4); 72 } 73 } 74 BEQ(uint32_t opcode)75inline void mips3::BEQ(uint32_t opcode) 76 { 77 if (RS == RT) { 78 m_next_pc = m_state.pc + ((int32_t)(SIMM) << 2); 79 m_delay_slot = true; 80 } 81 } 82 BNE(uint32_t opcode)83inline void mips3::BNE(uint32_t opcode) 84 { 85 if (RS != RT) { 86 m_next_pc = m_state.pc + ((int32_t)(SIMM) << 2); 87 m_delay_slot = true; 88 } 89 } 90 BLEZ(uint32_t opcode)91inline void mips3::BLEZ(uint32_t opcode) 92 { 93 if ((int64_t)RS <= 0) { 94 m_next_pc = m_state.pc + ((int32_t)(SIMM) << 2); 95 m_delay_slot = true; 96 } 97 } 98 BGTZ(uint32_t opcode)99inline void mips3::BGTZ(uint32_t opcode) 100 { 101 if ((int64_t)RS > 0) { 102 m_next_pc = m_state.pc + ((int32_t)(SIMM) << 2); 103 m_delay_slot = true; 104 } 105 } 106 107 } 108 109 #endif // MIPS3_BRANCH 110 111