1 /* FCE Ultra - NES/Famicom Emulator
2  *
3  * Copyright notice for this file:
4  *  Copyright (C) 2013 CaH4e3
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
19  *
20  * DSOUNDV1/FL-TR8MA boards (32K WRAM, 8/16M), 178 mapper boards (8K WRAM, 4/8M)
21  * Various Education Cartridges
22  *
23  */
24 
25 #include "mapinc.h"
26 
27 static uint8 reg[4];
28 
29 static uint8 *WRAM = NULL;
30 static uint32 WRAMSIZE;
31 
32 /* SND Registers */
33 static uint8 pcm_enable = 0;
34 static int16 pcm_latch = 0x3F6, pcm_clock = 0x3F6;
35 static writefunc pcmwrite;
36 
37 static SFORMAT StateRegs[] =
38 {
39 	{ reg, 4, "REGS" },
40 	{ 0 }
41 };
42 
43 static int16 step_size[49] = {
44 	16, 17, 19, 21, 23, 25, 28, 31, 34, 37,
45 	41, 45, 50, 55, 60, 66, 73, 80, 88, 97,
46 	107, 118, 130, 143, 157, 173, 190, 209, 230, 253,
47 	279, 307, 337, 371, 408, 449, 494, 544, 598, 658,
48 	724, 796, 876, 963, 1060, 1166, 1282, 1411, 1552
49 };	/* 49 items */
50 static int32 step_adj[16] = { -1, -1, -1, -1, 2, 5, 7, 9, -1, -1, -1, -1, 2, 5, 7, 9 };
51 
52 /* decode stuff */
53 static int32 jedi_table[16 * 49];
54 static int32 acc = 0;	/* ADPCM accumulator, initial condition must be 0 */
55 static int32 decstep = 0;	/* ADPCM decoding step, initial condition must be 0 */
56 
jedi_table_init()57 static void jedi_table_init() {
58 	int step, nib;
59 
60 	for (step = 0; step < 49; step++) {
61 		for (nib = 0; nib < 16; nib++) {
62 			int value = (2 * (nib & 0x07) + 1) * step_size[step] / 8;
63 			jedi_table[step * 16 + nib] = ((nib & 0x08) != 0) ? -value : value;
64 		}
65 	}
66 }
67 
decode(uint8 code)68 static uint8 decode(uint8 code) {
69 	acc += jedi_table[decstep + code];
70 	if ((acc & ~0x7ff) != 0)	/* acc is > 2047 */
71 		acc |= ~0xfff;
72 	else acc &= 0xfff;
73 	decstep += step_adj[code & 7] * 16;
74 	if (decstep < 0) decstep = 0;
75 	if (decstep > 48 * 16) decstep = 48 * 16;
76 	return (acc >> 8) & 0xff;
77 }
78 
Sync(void)79 static void Sync(void) {
80 	uint32 sbank = reg[1] & 0x7;
81 	uint32 bbank = reg[2];
82 	setchr8(0);
83 	setprg8r(0x10, 0x6000, reg[3] & 3);
84 	if (reg[0] & 2) {	/* UNROM mode */
85 		setprg16(0x8000, (bbank << 3) | sbank);
86 		if (reg[0] & 4)
87 			setprg16(0xC000, (bbank << 3) | 6 | (reg[1] & 1));
88 		else
89 			setprg16(0xC000, (bbank << 3) | 7);
90 	} else {			/* NROM mode */
91 		uint32 bank = (bbank << 3) | sbank;
92 		if (reg[0] & 4) {
93 			setprg16(0x8000, bank);
94 			setprg16(0xC000, bank);
95 		} else
96 			setprg32(0x8000, bank >> 1);
97 	}
98 	setmirror((reg[0] & 1) ^ 1);
99 }
100 
DECLFW(M178Write)101 static DECLFW(M178Write) {
102 	reg[A & 3] = V;
103 /*	FCEU_printf("cmd %04x:%02x\n", A, V); */
104 	Sync();
105 }
106 
DECLFW(M178WriteSnd)107 static DECLFW(M178WriteSnd) {
108 	if (A == 0x5800) {
109 		if (V & 0xF0) {
110 			pcm_enable = 1;
111 /*			pcmwrite(0x4011, (V & 0xF) << 3); */
112 			pcmwrite(0x4011, decode(V & 0xf));
113 		} else
114 			pcm_enable = 0;
115 	} else
116 		FCEU_printf("misc %04x:%02x\n", A, V);
117 }
118 
DECLFR(M178ReadSnd)119 static DECLFR(M178ReadSnd) {
120 	if (A == 0x5800)
121 		return (X.DB & 0xBF) | ((pcm_enable ^ 1) << 6);
122 	else
123 		return X.DB;
124 }
125 
M178Power(void)126 static void M178Power(void) {
127 	reg[0] = reg[1] = reg[2] = reg[3] = 0;
128 	Sync();
129 	pcmwrite = GetWriteHandler(0x4011);
130 	SetWriteHandler(0x4800, 0x4fff, M178Write);
131 	SetWriteHandler(0x5800, 0x5fff, M178WriteSnd);
132 	SetReadHandler(0x5800, 0x5fff, M178ReadSnd);
133 	SetReadHandler(0x6000, 0x7fff, CartBR);
134 	SetWriteHandler(0x6000, 0x7fff, CartBW);
135 	SetReadHandler(0x8000, 0xffff, CartBR);
136 	FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
137 }
138 
M178SndClk(int a)139 static void M178SndClk(int a) {
140 	if (pcm_enable) {
141 		pcm_latch -= a;
142 		if (pcm_latch <= 0) {
143 			pcm_latch += pcm_clock;
144 			pcm_enable = 0;
145 		}
146 	}
147 }
148 
M178Close(void)149 static void M178Close(void) {
150 	if (WRAM)
151 		FCEU_gfree(WRAM);
152 	WRAM = NULL;
153 }
154 
StateRestore(int version)155 static void StateRestore(int version) {
156 	Sync();
157 }
158 
Mapper178_Init(CartInfo * info)159 void Mapper178_Init(CartInfo *info) {
160 	info->Power = M178Power;
161 	info->Close = M178Close;
162 	GameStateRestore = StateRestore;
163 	MapIRQHook = M178SndClk;
164 
165 	jedi_table_init();
166 
167 	WRAMSIZE = 32768;
168 	WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
169 	SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
170 	if (info->battery) {
171 		info->SaveGame[0] = WRAM;
172 		info->SaveGameLen[0] = WRAMSIZE;
173 	}
174 	AddExState(WRAM, WRAMSIZE, 0, "WRAM");
175 
176 	AddExState(&StateRegs, ~0, 0, 0);
177 }
178