1 /*################################################################################################### 2 ** 3 ** TMS34010: Portable Texas Instruments TMS34010 emulator 4 ** 5 ** Copyright (C) Alex Pasadyn/Zsolt Vasvari 1998 6 ** Parts based on code by Aaron Giles 7 ** 8 **#################################################################################################*/ 9 10 #ifndef _TMS34010_H 11 #define _TMS34010_H 12 13 #include "osd_cpu.h" 14 15 16 /* the TMS34010 input clock is divided by 8; the 34020 by 4 */ 17 #define TMS34010_CLOCK_DIVIDER 8 18 #define TMS34020_CLOCK_DIVIDER 4 19 20 21 /* register indexes for get_reg and set_reg */ 22 enum 23 { 24 TMS34010_PC = 1, 25 TMS34010_SP, 26 TMS34010_ST, 27 TMS34010_A0, 28 TMS34010_A1, 29 TMS34010_A2, 30 TMS34010_A3, 31 TMS34010_A4, 32 TMS34010_A5, 33 TMS34010_A6, 34 TMS34010_A7, 35 TMS34010_A8, 36 TMS34010_A9, 37 TMS34010_A10, 38 TMS34010_A11, 39 TMS34010_A12, 40 TMS34010_A13, 41 TMS34010_A14, 42 TMS34010_B0, 43 TMS34010_B1, 44 TMS34010_B2, 45 TMS34010_B3, 46 TMS34010_B4, 47 TMS34010_B5, 48 TMS34010_B6, 49 TMS34010_B7, 50 TMS34010_B8, 51 TMS34010_B9, 52 TMS34010_B10, 53 TMS34010_B11, 54 TMS34010_B12, 55 TMS34010_B13, 56 TMS34010_B14 57 }; 58 59 60 /* Interrupt Types that can be generated by outside sources */ 61 #define TMS34010_INT_NONE 0x0000 62 #define TMS34010_INT1 0x0002 /* External Interrupt 1 */ 63 #define TMS34010_INT2 0x0004 /* External Interrupt 2 */ 64 65 #define TMS34020_INT_NONE 0x0000 66 #define TMS34020_INT1 0x0002 /* External Interrupt 1 */ 67 #define TMS34020_INT2 0x0004 /* External Interrupt 2 */ 68 69 70 /* Configuration structure */ 71 struct tms34010_config 72 { 73 UINT8 halt_on_reset; /* /HCS pin, which determines HALT state after reset */ 74 void (*output_int)(int state); /* output interrupt callback */ 75 void (*to_shiftreg)(UINT32, UINT16 *); /* shift register write */ 76 void (*from_shiftreg)(UINT32, UINT16 *); /* shift register read */ 77 void (*display_addr_changed)(UINT32 offs, int rowbytes, int scanline);/* display address changed */ 78 void (*display_int_callback)(int scanline);/* display interrupt callback */ 79 }; 80 81 82 /* PUBLIC FUNCTIONS - 34010 */ 83 void tms34010_reset(void *param); 84 void tms34010_exit(void); 85 int tms34010_execute(int cycles); 86 unsigned tms34010_get_context(void *dst); 87 void tms34010_set_context(void *src); 88 unsigned tms34010_get_pc(void); 89 void tms34010_set_pc(unsigned val); 90 unsigned tms34010_get_sp(void); 91 void tms34010_set_sp(unsigned val); 92 unsigned tms34010_get_reg(int regnum); 93 void tms34010_set_reg(int regnum, unsigned val); 94 void tms34010_set_nmi_line(int linestate); 95 void tms34010_set_irq_line(int irqline, int linestate); 96 void tms34010_set_irq_callback(int (*callback)(int irqline)); 97 void tms34010_internal_interrupt(int type); 98 const char *tms34010_info(void *context, int regnum); 99 unsigned tms34010_dasm(char *buffer, unsigned pc); 100 101 void tms34010_state_save(int cpunum, void *f); 102 void tms34010_state_load(int cpunum, void *f); 103 int tms34010_io_display_blanked(int cpu); 104 int tms34010_get_DPYSTRT(int cpu); 105 106 107 /* PUBLIC FUNCTIONS - 34020 */ 108 void tms34020_reset(void *param); 109 void tms34020_exit(void); 110 int tms34020_execute(int cycles); 111 unsigned tms34020_get_context(void *dst); 112 void tms34020_set_context(void *src); 113 unsigned tms34020_get_pc(void); 114 void tms34020_set_pc(unsigned val); 115 unsigned tms34020_get_sp(void); 116 void tms34020_set_sp(unsigned val); 117 unsigned tms34020_get_reg(int regnum); 118 void tms34020_set_reg(int regnum, unsigned val); 119 void tms34020_set_nmi_line(int linestate); 120 void tms34020_set_irq_line(int irqline, int linestate); 121 void tms34020_set_irq_callback(int (*callback)(int irqline)); 122 void tms34020_internal_interrupt(int type); 123 const char *tms34020_info(void *context, int regnum); 124 unsigned tms34020_dasm(char *buffer, unsigned pc); 125 126 void tms34020_state_save(int cpunum, void *f); 127 void tms34020_state_load(int cpunum, void *f); 128 129 130 /* Host control interface */ 131 #define TMS34010_HOST_ADDRESS_L 0 132 #define TMS34010_HOST_ADDRESS_H 1 133 #define TMS34010_HOST_DATA 2 134 #define TMS34010_HOST_CONTROL 3 135 136 void tms34010_host_w(int cpunum, int reg, int data); 137 int tms34010_host_r(int cpunum, int reg); 138 139 140 /* Reads & writes to the 34010 I/O registers; place at TOBYTE(0xc0000000) */ 141 WRITE_HANDLER( tms34010_io_register_w ); 142 READ_HANDLER( tms34010_io_register_r ); 143 144 /* Reads & writes to the 34020 I/O registers; place at TOBYTE(0xc0000000) */ 145 WRITE_HANDLER( tms34020_io_register_w ); 146 READ_HANDLER( tms34020_io_register_r ); 147 148 149 /* PUBLIC GLOBALS */ 150 extern int tms34010_ICount; 151 #define tms34020_ICount tms34010_ICount 152 153 154 /* Use this macro in the memory definitions to specify bit-based addresses */ 155 #define TOBYTE(bitaddr) ((offs_t)(bitaddr) >> 3) 156 157 #endif /* _TMS34010_H */ 158