1 /*
2 	Hal21 (sound not working, missing color proms, possibly bad tile gfx ROMs)
3 	ASO (seems fine)
4 	Alpha Mission ('p3.6d' is a bad dump)
5 
6 	todo:
7 	- hal21 sound (2xAY8192)
8 	- hal21 gfx
9 	- hal21 colors
10 	- sound cpu status needs hooked up in both games
11 	- virtualize palette (background palette is bank selected) for further speedup
12 */
13 #include "driver.h"
14 #include "vidhrdw/generic.h"
15 #include "cpu/z80/z80.h"
16 
17 
18 extern void tnk3_draw_text( struct osd_bitmap *bitmap, int bank, unsigned char *source );
19 extern void tnk3_draw_status( struct osd_bitmap *bitmap, int bank, unsigned char *source );
20 
21 static int scrollx_base; /* this is the only difference in video hardware found so far */
22 
common_vh_start(void)23 static int common_vh_start( void ){
24 	dirtybuffer = (unsigned char*)malloc( 64*64 );
25 	if( dirtybuffer ){
26 		tmpbitmap = bitmap_alloc( 512, 512 );
27 		if( tmpbitmap ){
28 			memset( dirtybuffer, 1, 64*64  );
29 			return 0;
30 		}
31 		free( dirtybuffer );
32 	}
33 	return 1;
34 }
35 
aso_vh_start(void)36 int aso_vh_start( void ){
37 	scrollx_base = -16;
38 	return common_vh_start();
39 }
40 
hal21_vh_start(void)41 int hal21_vh_start( void ){
42 	scrollx_base = 240;
43 	return common_vh_start();
44 }
45 
aso_vh_stop(void)46 void aso_vh_stop( void ){
47 	bitmap_free( tmpbitmap );
48 	free( dirtybuffer );
49 }
50 
51 
aso_vh_convert_color_prom(unsigned char * palette,unsigned short * colortable,const unsigned char * color_prom)52 void aso_vh_convert_color_prom(unsigned char *palette, unsigned short *colortable,const unsigned char *color_prom){
53 	int i;
54 	int num_colors = 1024;
55 /* palette format is RRRG GGBB B??? the three unknown bits are used but */
56 /* I'm not sure how, I'm currently using them as least significant bit but */
57 /* that's most likely wrong. */
58 	for( i=0; i<num_colors; i++ ){
59 		int bit0=0,bit1,bit2,bit3;
60 
61 		colortable[i] = i;
62 
63 		bit0 = (color_prom[2*num_colors] >> 2) & 0x01;
64 		bit1 = (color_prom[0] >> 1) & 0x01;
65 		bit2 = (color_prom[0] >> 2) & 0x01;
66 		bit3 = (color_prom[0] >> 3) & 0x01;
67 		*palette++ = 0x0e * bit0 + 0x1f * bit1 + 0x43 * bit2 + 0x8f * bit3;
68 
69 		bit0 = (color_prom[2*num_colors] >> 1) & 0x01;
70 		bit1 = (color_prom[num_colors] >> 2) & 0x01;
71 		bit2 = (color_prom[num_colors] >> 3) & 0x01;
72 		bit3 = (color_prom[0] >> 0) & 0x01;
73 		*palette++ = 0x0e * bit0 + 0x1f * bit1 + 0x43 * bit2 + 0x8f * bit3;
74 
75 		bit0 = (color_prom[2*num_colors] >> 0) & 0x01;
76 		bit1 = (color_prom[2*num_colors] >> 3) & 0x01;
77 		bit2 = (color_prom[num_colors] >> 0) & 0x01;
78 		bit3 = (color_prom[num_colors] >> 1) & 0x01;
79 		*palette++ = 0x0e * bit0 + 0x1f * bit1 + 0x43 * bit2 + 0x8f * bit3;
80 
81 		color_prom++;
82 	}
83 }
84 
aso_draw_background(struct osd_bitmap * bitmap,int scrollx,int scrolly,int bank,int color,const struct GfxElement * gfx)85 static void aso_draw_background(
86 		struct osd_bitmap *bitmap,
87 		int scrollx, int scrolly,
88 		int bank, int color,
89 		const struct GfxElement *gfx )
90 {
91 	const struct rectangle *clip = &Machine->visible_area;
92 	int offs;
93 
94 	static int old_bank, old_color;
95 
96 	if( color!=old_color || bank!=old_bank ){
97 		memset( dirtybuffer, 1, 64*64  );
98 		old_bank = bank;
99 		old_color = color;
100 	}
101 
102 	for( offs=0; offs<64*64; offs++ ){
103 		if( dirtybuffer[offs] ){
104 			int tile_number = videoram[offs]+bank*256;
105 			int sy = (offs%64)*8;
106 			int sx = (offs/64)*8;
107 
108 			drawgfx( tmpbitmap,gfx,
109 				tile_number,
110 				color,
111 				0,0, /* no flip */
112 				sx,sy,
113 				0,TRANSPARENCY_NONE,0);
114 
115 			dirtybuffer[offs] = 0;
116 		}
117 	}
118 
119 	copyscrollbitmap(bitmap,tmpbitmap,
120 		1,&scrollx,1,&scrolly,
121 		clip,
122 		TRANSPARENCY_NONE,0);
123 }
124 
aso_draw_sprites(struct osd_bitmap * bitmap,int xscroll,int yscroll,const struct GfxElement * gfx)125 void aso_draw_sprites(
126 		struct osd_bitmap *bitmap,
127 		int xscroll, int yscroll,
128 		const struct GfxElement *gfx
129 ){
130 	const unsigned char *source = spriteram;
131 	const unsigned char *finish = source+60*4;
132 
133 	struct rectangle clip = Machine->visible_area;
134 
135 	while( source<finish ){
136 		int attributes = source[3]; /* YBBX.CCCC */
137 		int tile_number = source[1];
138 		int sy = source[0] + ((attributes&0x10)?256:0) - yscroll;
139 		int sx = source[2] + ((attributes&0x80)?256:0) - xscroll;
140 		int color = attributes&0xf;
141 
142 		if( !(attributes&0x20) ) tile_number += 512;
143 		if( attributes&0x40 ) tile_number += 256;
144 
145 		drawgfx(bitmap,gfx,
146 			tile_number,
147 			color,
148 			0,0,
149 			(256-sx)&0x1ff,sy&0x1ff,
150 			&clip,TRANSPARENCY_PEN,7);
151 
152 		source+=4;
153 	}
154 }
155 
156 int hal21_vreg[6];
157 
WRITE_HANDLER(hal21_vreg0_w)158 WRITE_HANDLER( hal21_vreg0_w ){ hal21_vreg[0] = data; }
WRITE_HANDLER(hal21_vreg1_w)159 WRITE_HANDLER( hal21_vreg1_w ){ hal21_vreg[1] = data; }
WRITE_HANDLER(hal21_vreg2_w)160 WRITE_HANDLER( hal21_vreg2_w ){ hal21_vreg[2] = data; }
WRITE_HANDLER(hal21_vreg3_w)161 WRITE_HANDLER( hal21_vreg3_w ){ hal21_vreg[3] = data; }
WRITE_HANDLER(hal21_vreg4_w)162 WRITE_HANDLER( hal21_vreg4_w ){ hal21_vreg[4] = data; }
WRITE_HANDLER(hal21_vreg5_w)163 WRITE_HANDLER( hal21_vreg5_w ){ hal21_vreg[5] = data; }
164 
aso_vh_screenrefresh(struct osd_bitmap * bitmap,int full_refresh)165 void aso_vh_screenrefresh( struct osd_bitmap *bitmap, int full_refresh ){
166 	unsigned char *ram = memory_region(REGION_CPU1);
167 	int attributes = hal21_vreg[1];
168 	{
169 		unsigned char bg_attrs = hal21_vreg[0];
170 		int scrolly = -8+hal21_vreg[4]+((attributes&0x10)?256:0);
171 		int scrollx = scrollx_base + hal21_vreg[5]+((attributes&0x02)?0:256);
172 
173 		aso_draw_background( bitmap, -scrollx, -scrolly,
174 			bg_attrs>>4, /* tile bank */
175 			bg_attrs&0xf, /* color bank */
176 			Machine->gfx[1]
177 		);
178 	}
179 
180 	{
181 		int scrollx = 0x1e + hal21_vreg[3] + ((attributes&0x01)?256:0);
182 		int scrolly = -8+0x11+hal21_vreg[2] + ((attributes&0x08)?256:0);
183 		aso_draw_sprites( bitmap, scrollx, scrolly, Machine->gfx[2] );
184 	}
185 
186 	{
187 		int bank = (attributes&0x40)?1:0;
188 		tnk3_draw_text( bitmap, bank, &ram[0xf800] );
189 		tnk3_draw_status( bitmap, bank, &ram[0xfc00] );
190 	}
191 /*
192 	{
193 		int i;
194 		for( i=0; i<6; i++ ){
195 			int data = hal21_vreg[i];
196 			drawgfx( bitmap, Machine->uifont,
197 				"0123456789abcdef"[data>>4],0,0,0,
198 				0,i*16,
199 				&Machine->visible_area,
200 				TRANSPARENCY_NONE,0 );
201 			drawgfx( bitmap, Machine->uifont,
202 				"0123456789abcdef"[data&0xf],0,0,0,
203 				8,i*16,
204 				&Machine->visible_area,
205 				TRANSPARENCY_NONE,0 );
206 		}
207 	}
208 */
209 }
210 
211 
212 INPUT_PORTS_START( hal21 )
213 	PORT_START
214 	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
215 	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 )
216 	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 )
217 	PORT_BIT( 0x08, IP_ACTIVE_LOW,	IPT_START1 )
218 	PORT_BIT( 0x10, IP_ACTIVE_LOW,	IPT_START2 )
219 	PORT_BIT( 0x20, IP_ACTIVE_HIGH,	IPT_UNKNOWN ) /* sound CPU status */
220 	PORT_BIT( 0x40, IP_ACTIVE_LOW,  IPT_BUTTON3 )
221 	PORT_BIT( 0x80, IP_ACTIVE_LOW,  IPT_UNKNOWN )
222 
223 	PORT_START /* P1 controls */
224 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY )
225 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY )
226 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY )
227 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY )
228 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
229 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
230 	PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
231 
232 	PORT_START /* P2 controls */
233 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_COCKTAIL )
234 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_COCKTAIL )
235 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_COCKTAIL )
236 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_COCKTAIL )
237 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
238 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_COCKTAIL )
239 	PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
240 
241 	PORT_START	/* DSW1 */
242 	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) /* unused */
243 	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
244 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
245 	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) /* ? */
246 	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
247 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
248 	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Lives ) )
249 	PORT_DIPSETTING(    0x04, "3" )
250 	PORT_DIPSETTING(    0x00, "5" )
251 	PORT_DIPNAME( 0x38, 0x38, DEF_STR( Coinage ) )
252 	PORT_DIPSETTING(    0x20, DEF_STR( 3C_1C ) )
253 	PORT_DIPSETTING(    0x18, DEF_STR( 2C_1C ) )
254 	PORT_DIPSETTING(    0x38, DEF_STR( 1C_1C ) )
255 	PORT_DIPSETTING(    0x30, DEF_STR( 1C_2C ) )
256 	PORT_DIPSETTING(    0x28, DEF_STR( 1C_3C ) )
257 	PORT_DIPSETTING(    0x00, DEF_STR( Free_Play ) )
258 	PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Bonus_Life ) )
259 	PORT_DIPSETTING(    0xc0, "20000 60000" )
260 	PORT_DIPSETTING(    0x80, "40000 90000" )
261 	PORT_DIPSETTING(	0x40, "50000 120000" )
262 	PORT_DIPSETTING(    0x00, "None" )
263 
264 	PORT_START	/* DSW2 */
265 	PORT_DIPNAME( 0x01, 0x01, "Bonus Type" )
266 	PORT_DIPSETTING(    0x00, "Every Bonus Set" )
267 	PORT_DIPSETTING(    0x01, "Second Bonus Set" )
268 	PORT_DIPNAME( 0x06, 0x06, DEF_STR( Difficulty ) )
269 	PORT_DIPSETTING(    0x00, "Easy" )
270 	PORT_DIPSETTING(    0x02, "2" )
271 	PORT_DIPSETTING(    0x04, "3" )
272 	PORT_DIPSETTING(    0x06, "4" )
273 	PORT_DIPNAME( 0x18, 0x18, "Special" )
274 	PORT_DIPSETTING(    0x18, "Normal" )
275 	PORT_DIPSETTING(    0x10, DEF_STR( Demo_Sounds) )
276 	PORT_DIPSETTING(    0x08, "Infinite Lives" )
277 	PORT_DIPSETTING(    0x00, "Freeze" )
278 	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) ) // 0x20 -> fe65
279 	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
280 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
281 	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) // unused
282 	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
283 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
284 	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) /* ? */
285 	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
286 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
287 INPUT_PORTS_END
288 
289 /**************************************************************************/
290 
291 INPUT_PORTS_START( aso )
292 	PORT_START
293 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 )
294 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
295 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 )
296 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
297 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 )
298 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_VBLANK )  /* ? */
299 	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN  )
300 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
301 
302 	PORT_START
303 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_8WAY )
304 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  | IPF_8WAY )
305 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_8WAY )
306 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY )
307 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON3 )
308 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 )
309 	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 )
310 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
311 
312 	PORT_START
313 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_8WAY | IPF_PLAYER2 )
314 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  | IPF_8WAY | IPF_PLAYER2 )
315 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_8WAY | IPF_PLAYER2 )
316 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
317 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON3 | IPF_PLAYER2 )
318 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
319 	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
320 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
321 
322 	PORT_START
323 	PORT_DIPNAME( 0x01, 0x01, "Allow Continue" )
324 	PORT_DIPSETTING(    0x01, DEF_STR( No ) )
325 	PORT_DIPSETTING(    0x00, DEF_STR( Yes ) )
326 	PORT_DIPNAME( 0x02, 0x00, DEF_STR( Cabinet ) )
327 	PORT_DIPSETTING(    0x00, DEF_STR( Upright ) )
328 	PORT_DIPSETTING(    0x02, DEF_STR( Cocktail ) )
329 	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Lives ) )
330 	PORT_DIPSETTING(    0x04, "3" )
331 	PORT_DIPSETTING(    0x00, "5" )
332 	PORT_DIPNAME( 0x38, 0x38, DEF_STR( Coinage ) )
333 	PORT_DIPSETTING(    0x20, DEF_STR( 4C_1C) )
334 	PORT_DIPSETTING(    0x28, DEF_STR( 3C_1C) )
335 	PORT_DIPSETTING(    0x30, DEF_STR( 2C_1C) )
336 	PORT_DIPSETTING(    0x38, DEF_STR( 1C_1C) )
337 	PORT_DIPSETTING(    0x18, DEF_STR( 1C_2C) )
338 	PORT_DIPSETTING(    0x10, DEF_STR( 1C_3C) )
339 	PORT_DIPSETTING(    0x08, DEF_STR( 1C_4C) )
340 	PORT_DIPSETTING(    0x00, DEF_STR( 1C_6C) )
341 	PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Bonus_Life ) )
342 	PORT_DIPSETTING(    0xc0, "50k 100k" )
343 	PORT_DIPSETTING(    0x80, "60k 120k" )
344 	PORT_DIPSETTING(    0x40, "100k 200k" )
345 	PORT_DIPSETTING(    0x00, "None" )
346 
347 	PORT_START
348 	PORT_DIPNAME( 0x01, 0x01, "Bonus Occurrence" )
349 	PORT_DIPSETTING(    0x01, "1st & every 2nd" )
350 	PORT_DIPSETTING(    0x00, "1st & 2nd only" )
351 	PORT_DIPNAME( 0x06, 0x06, DEF_STR( Difficulty ) )
352 	PORT_DIPSETTING(    0x06, "Easy" )
353 	PORT_DIPSETTING(    0x04, "Normal" )
354 	PORT_DIPSETTING(    0x02, "Hard" )
355 	PORT_DIPSETTING(    0x00, "Hardest" )
356 	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
357 	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
358 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
359 	PORT_BITX( 0x10,    0x10, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Cheat of some kind", IP_KEY_NONE, IP_JOY_NONE )
360 	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
361 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
362 	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) )
363 	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
364 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
365 	PORT_DIPNAME( 0xc0, 0xc0, "Start Area" )
366 	PORT_DIPSETTING(    0xc0, "1" )
367 	PORT_DIPSETTING(    0x80, "2" )
368 	PORT_DIPSETTING(    0x40, "3" )
369 	PORT_DIPSETTING(    0x00, "4" )
370 INPUT_PORTS_END
371 
372 
373 /**************************************************************************/
374 
375 static struct GfxLayout char256 = {
376 	8,8,
377 	0x100,
378 	4,
379 	{ 0, 1, 2, 3 },
380 	{ 4, 0, 12, 8, 20, 16, 28, 24},
381 	{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
382 	256
383 };
384 
385 static struct GfxLayout char1024 = {
386 	8,8,
387 	0x400,
388 	4,
389 	{ 0, 1, 2, 3 },
390 	{ 4, 0, 12, 8, 20, 16, 28, 24},
391 	{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
392 	256
393 };
394 
395 static struct GfxLayout sprite1024 = {
396 	16,16,
397 	0x400,
398 	3,
399 	{ 2*1024*256,1*1024*256,0*1024*256 },
400 	{
401 		7,6,5,4,3,2,1,0,
402 		15,14,13,12,11,10,9,8
403 	},
404 	{
405 		0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16,
406 		8*16, 9*16, 10*16, 11*16, 12*16, 13*16, 14*16, 15*16
407 	},
408 	256
409 };
410 
411 static struct GfxDecodeInfo aso_gfxdecodeinfo[] =
412 {
413 	/* colors 512-1023 are currently unused, I think they are a second bank */
414 	{ REGION_GFX1, 0, &char256,    128*3,  8 },	/* colors 384..511 */
415 	{ REGION_GFX2, 0, &char1024,   128*1, 16 },	/* colors 128..383 */
416 	{ REGION_GFX3, 0, &sprite1024, 128*0, 16 },	/* colors   0..127 */
417 	{ -1 }
418 };
419 
420 /**************************************************************************/
421 
422 #define SNK_NMI_ENABLE	1
423 #define SNK_NMI_PENDING	2
424 
425 static int snk_soundcommand = 0;
426 static unsigned char *shared_ram, *shared_auxram;
427 
READ_HANDLER(shared_auxram_r)428 static READ_HANDLER( shared_auxram_r ){ return shared_auxram[offset]; }
WRITE_HANDLER(shared_auxram_w)429 static WRITE_HANDLER( shared_auxram_w ){ shared_auxram[offset] = data; }
430 
READ_HANDLER(shared_ram_r)431 static READ_HANDLER( shared_ram_r ){ return shared_ram[offset]; }
WRITE_HANDLER(shared_ram_w)432 static WRITE_HANDLER( shared_ram_w ){ shared_ram[offset] = data; }
433 
434 static int CPUA_latch = 0;
435 static int CPUB_latch = 0;
436 
WRITE_HANDLER(CPUA_int_enable_w)437 static WRITE_HANDLER( CPUA_int_enable_w ){
438 	if( CPUA_latch & SNK_NMI_PENDING ){
439 		cpu_cause_interrupt( 0, Z80_NMI_INT );
440 		CPUA_latch = 0;
441 	}
442 	else {
443 		CPUA_latch |= SNK_NMI_ENABLE;
444 	}
445 }
446 
READ_HANDLER(CPUA_int_trigger_r)447 static READ_HANDLER( CPUA_int_trigger_r ){
448 	if( CPUA_latch&SNK_NMI_ENABLE ){
449 		cpu_cause_interrupt( 0, Z80_NMI_INT );
450 		CPUA_latch = 0;
451 	}
452 	else {
453 		CPUA_latch |= SNK_NMI_PENDING;
454 	}
455 	return 0xff;
456 }
457 
WRITE_HANDLER(CPUB_int_enable_w)458 static WRITE_HANDLER( CPUB_int_enable_w ){
459 	if( CPUB_latch & SNK_NMI_PENDING ){
460 		cpu_cause_interrupt( 1, Z80_NMI_INT );
461 		CPUB_latch = 0;
462 	}
463 	else {
464 		CPUB_latch |= SNK_NMI_ENABLE;
465 	}
466 }
467 
READ_HANDLER(CPUB_int_trigger_r)468 static READ_HANDLER( CPUB_int_trigger_r ){
469 	if( CPUB_latch&SNK_NMI_ENABLE ){
470 		cpu_cause_interrupt( 1, Z80_NMI_INT );
471 		CPUB_latch = 0;
472 	}
473 	else {
474 		CPUB_latch |= SNK_NMI_PENDING;
475 	}
476 	return 0xff;
477 }
478 
WRITE_HANDLER(snk_soundcommand_w)479 static WRITE_HANDLER( snk_soundcommand_w ){
480 	snk_soundcommand = data;
481 	cpu_cause_interrupt( 2, Z80_IRQ_INT );
482 //	cpu_cause_interrupt(2, 0xff); old ASO
483 }
484 
READ_HANDLER(snk_soundcommand_r)485 static READ_HANDLER( snk_soundcommand_r )
486 {
487 	int val = snk_soundcommand;
488 	snk_soundcommand = 0;
489 	return val;
490 }
491 
492 /**************************************************************************/
493 
494 static struct YM3526interface ym3526_interface ={
495 	1,			/* number of chips */
496 	4000000,	/* 4 MHz? (hand tuned) */
497 	{ 50 }		/* (not supported) */
498 };
499 
500 static struct MemoryReadAddress aso_readmem_sound[] ={
501 	{ 0x0000, 0xbfff, MRA_ROM },
502 	{ 0xc000, 0xc7ff, MRA_RAM },
503 	{ 0xd000, 0xd000, snk_soundcommand_r },
504 	{ 0xf000, 0xf000, YM3526_status_port_0_r },
505 	{ -1 }
506 };
507 
508 static struct MemoryWriteAddress aso_writemem_sound[] ={
509 	{ 0x0000, 0xbfff, MWA_ROM },
510 	{ 0xc000, 0xc7ff, MWA_RAM },
511 	{ 0xf000, 0xf000, YM3526_control_port_0_w }, /* YM3526 #1 control port? */
512 	{ 0xf001, 0xf001, YM3526_write_port_0_w },   /* YM3526 #1 write port?  */
513 	{ -1 }
514 };
515 
516 /**************************************************************************/
517 
518 static struct AY8910interface ay8910_interface = {
519 	2, /* number of chips */
520 	2000000, /* 2 MHz */
521 	{ 35,35 },
522 	{ 0 },
523 	{ 0 },
524 	{ 0 },
525 	{ 0 }
526 };
527 
528 static struct MemoryReadAddress hal21_readmem_sound[] = {
529 	{ 0x0000, 0x3fff, MRA_ROM },
530 	{ 0x8000, 0x87ff, MRA_RAM },
531 	{ 0xa000, 0xa000, snk_soundcommand_r },
532 //	{ 0xc000, 0xc000, ack },
533 	{ -1 }
534 };
535 
536 static struct MemoryWriteAddress hal21_writemem_sound[] = {
537 	{ 0x0000, 0x3fff, MWA_ROM },
538 	{ 0x8000, 0x87ff, MWA_RAM },
539 	{ 0xe000, 0xe000, AY8910_control_port_0_w },
540 	{ 0xe001, 0xe001, AY8910_write_port_0_w },
541 	{ 0xe008, 0xe008, AY8910_control_port_1_w },
542 	{ 0xe009, 0xe009, AY8910_write_port_1_w },
543 	{ -1 }
544 };
545 
546 /**************************** ASO/Alpha Mission *************************/
547 
548 static struct MemoryReadAddress aso_readmem_cpuA[] =
549 {
550 	{ 0x0000, 0xbfff, MRA_ROM },
551 	{ 0xc000, 0xc000, input_port_0_r },	/* coin, start */
552 	{ 0xc100, 0xc100, input_port_1_r },	/* P1 */
553 	{ 0xc200, 0xc200, input_port_2_r },	/* P2 */
554 	{ 0xc500, 0xc500, input_port_3_r },	/* DSW1 */
555 	{ 0xc600, 0xc600, input_port_4_r },	/* DSW2 */
556 	{ 0xc700, 0xc700, CPUB_int_trigger_r },
557 	{ 0xd000, 0xffff, MRA_RAM },
558 	{ -1 }
559 };
560 
561 static struct MemoryWriteAddress aso_writemem_cpuA[] =
562 {
563 	{ 0x0000, 0xbfff, MWA_ROM },
564 	{ 0xc400, 0xc400, snk_soundcommand_w },
565 	{ 0xc700, 0xc700, CPUA_int_enable_w },
566 	{ 0xc800, 0xc800, hal21_vreg1_w },
567 	{ 0xc900, 0xc900, hal21_vreg2_w },
568 	{ 0xca00, 0xca00, hal21_vreg3_w },
569 	{ 0xcb00, 0xcb00, hal21_vreg4_w },
570 	{ 0xcc00, 0xcc00, hal21_vreg5_w },
571 	{ 0xcf00, 0xcf00, hal21_vreg0_w },
572 	{ 0xd800, 0xdfff, MWA_RAM, &shared_auxram },
573 	{ 0xe000, 0xe7ff, MWA_RAM, &spriteram },
574 	{ 0xe800, 0xf7ff, videoram_w, &videoram },
575 	{ 0xf800, 0xffff, MWA_RAM, &shared_ram },
576 	{ -1 }
577 };
578 
579 static struct MemoryReadAddress aso_readmem_cpuB[] =
580 {
581 	{ 0x0000, 0xbfff, MRA_ROM },
582 	{ 0xc000, 0xc000, CPUA_int_trigger_r },
583 	{ 0xc800, 0xe7ff, shared_auxram_r },
584 	{ 0xe800, 0xf7ff, MRA_RAM },
585 	{ 0xf800, 0xffff, shared_ram_r },
586 	{ -1 }
587 };
588 static struct MemoryWriteAddress aso_writemem_cpuB[] =
589 {
590 	{ 0x0000, 0xbfff, MWA_ROM },
591 	{ 0xc000, 0xc000, CPUB_int_enable_w },
592 	{ 0xc800, 0xd7ff, shared_auxram_w },
593 	{ 0xd800, 0xe7ff, videoram_w },
594 	{ 0xe800, 0xf7ff, MWA_RAM },
595 	{ 0xf800, 0xffff, shared_ram_w },
596 	{ -1 }
597 };
598 
599 /**************************** HAL21 *************************/
600 
601 static struct MemoryReadAddress hal21_readmem_CPUA[] = {
602 	{ 0x0000, 0x7fff, MRA_ROM },
603 	{ 0xc000, 0xc000, input_port_0_r },	/* coin, start */
604 	{ 0xc100, 0xc100, input_port_1_r },	/* P1 */
605 	{ 0xc200, 0xc200, input_port_2_r },	/* P2 */
606 	{ 0xc400, 0xc400, input_port_3_r },	/* DSW1 */
607 	{ 0xc500, 0xc500, input_port_4_r },	/* DSW2 */
608 	{ 0xc700, 0xc700, CPUB_int_trigger_r },
609 	{ 0xe000, 0xefff, MRA_RAM },
610 	{ 0xf000, 0xffff, MRA_RAM },
611 	{ -1 }
612 };
613 
614 static struct MemoryWriteAddress hal21_writemem_CPUA[] = {
615 	{ 0x0000, 0x7fff, MWA_ROM },
616 	{ 0xc300, 0xc300, snk_soundcommand_w },
617 	{ 0xc600, 0xc600, hal21_vreg0_w },
618 	{ 0xc700, 0xc700, CPUA_int_enable_w },
619 	{ 0xd300, 0xd300, hal21_vreg1_w },
620 	{ 0xd400, 0xd400, hal21_vreg2_w },
621 	{ 0xd500, 0xd500, hal21_vreg3_w },
622 	{ 0xd600, 0xd600, hal21_vreg4_w },
623 	{ 0xd700, 0xd700, hal21_vreg5_w },
624 	{ 0xe000, 0xefff, MWA_RAM, &spriteram },
625 	{ 0xf000, 0xffff, MWA_RAM, &shared_ram },
626 	{ -1 }
627 };
628 
READ_HANDLER(hal21_spriteram_r)629 READ_HANDLER( hal21_spriteram_r ){
630 	return spriteram[offset];
631 }
WRITE_HANDLER(hal21_spriteram_w)632 WRITE_HANDLER( hal21_spriteram_w ){
633 	spriteram[offset] = data;
634 }
635 
636 static struct MemoryReadAddress hal21_readmem_CPUB[] = {
637 	{ 0x0000, 0x9fff, MRA_ROM },
638 	{ 0xc000, 0xcfff, hal21_spriteram_r },
639 	{ 0xd000, 0xdfff, MRA_RAM }, /* background */
640 	{ 0xe000, 0xefff, shared_ram_r },
641 	{ -1 }
642 };
643 
644 static struct MemoryWriteAddress hal21_writemem_CPUB[] = {
645 	{ 0x0000, 0x9fff, MWA_ROM },
646 	{ 0xa000, 0xa000, CPUB_int_enable_w },
647 	{ 0xc000, 0xcfff, hal21_spriteram_w },
648 	{ 0xd000, 0xdfff, videoram_w, &videoram },
649 	{ 0xe000, 0xefff, shared_ram_w },
650 	{ -1 }
651 };
652 
653 /**************************************************************************/
654 
655 static struct MachineDriver machine_driver_aso =
656 {
657 	{
658 		{
659 			CPU_Z80,
660 			4000000, /* ? */
661 			aso_readmem_cpuA,aso_writemem_cpuA,0,0,
662 			interrupt,1
663 		},
664 		{
665 			CPU_Z80,
666 			4000000, /* ? */
667 			aso_readmem_cpuB,aso_writemem_cpuB,0,0,
668 			interrupt,1
669 		},
670 		{
671 			CPU_Z80 | CPU_AUDIO_CPU,
672 			4000000,	/* 4 Mhz (?) */
673 			aso_readmem_sound,aso_writemem_sound,0,0,
674 			interrupt,1
675 		},
676 	},
677 	60, DEFAULT_REAL_60HZ_VBLANK_DURATION,
678 	100,	/* CPU slices per frame */
679 	0, /* init machine */
680 
681 	/* video hardware */
682 	36*8, 28*8, { 0*8, 36*8-1, 1*8, 28*8-1 },
683 
684 	aso_gfxdecodeinfo,
685 	1024,1024,
686 	aso_vh_convert_color_prom,
687 
688 	VIDEO_TYPE_RASTER,
689 	0,
690 	aso_vh_start,
691 	aso_vh_stop,
692 	aso_vh_screenrefresh,
693 
694 	/* sound hardware */
695 	0,0,0,0,
696 	{
697 	    {
698 	       SOUND_YM3526,
699 	       &ym3526_interface
700 	    }
701 	}
702 };
703 
704 static struct MachineDriver machine_driver_hal21 = {
705 	{
706 		{
707 			CPU_Z80,
708 			3360000,	/* 3.336 Mhz? */
709 			hal21_readmem_CPUA,hal21_writemem_CPUA,0,0,
710 			interrupt,1
711 		},
712 		{
713 			CPU_Z80,
714 			3360000,	/* 3.336 Mhz? */
715 			hal21_readmem_CPUB,hal21_writemem_CPUB,0,0,
716 			interrupt,1
717 		},
718 		{
719 			CPU_Z80 | CPU_AUDIO_CPU,
720 			4000000,	/* 4 Mhz (?) */
721 			hal21_readmem_sound,hal21_writemem_sound,0,0,
722 			interrupt,1
723 		},
724 	},
725 	60, DEFAULT_REAL_60HZ_VBLANK_DURATION,
726 	100,	/* CPU slices per frame */
727 	0, /* init_machine */
728 
729 	/* video hardware */
730 	36*8, 28*8, { 0*8, 36*8-1, 1*8, 28*8-1 },
731 	aso_gfxdecodeinfo,
732 	1024,1024,
733 	aso_vh_convert_color_prom,
734 
735 	VIDEO_TYPE_RASTER,
736 	0,
737 	hal21_vh_start,
738 	aso_vh_stop,
739 	aso_vh_screenrefresh,
740 
741 	/* sound hardware */
742 	0,0,0,0,
743 	{
744 	    {
745 	       SOUND_AY8910,
746 	       &ay8910_interface
747 	    }
748 	}
749 };
750 
751 /**************************************************************************/
752 
753 ROM_START( hal21 )
754 	ROM_REGION( 0x10000, REGION_CPU1 )	/* 64k for CPUA code */
755 	ROM_LOAD( "hal21p1.bin",    0x0000, 0x2000, 0x9d193830 )
756 	ROM_LOAD( "hal21p2.bin",    0x2000, 0x2000, 0xc1f00350 )
757 	ROM_LOAD( "hal21p3.bin",    0x4000, 0x2000, 0x881d22a6 )
758 	ROM_LOAD( "hal21p4.bin",    0x6000, 0x2000, 0xce692534 )
759 
760 	ROM_REGION( 0x10000, REGION_CPU2 )	/* 64k for CPUB code */
761 	ROM_LOAD( "hal21p5.bin",    0x0000, 0x2000, 0x3ce0684a )
762 	ROM_LOAD( "hal21p6.bin",    0x2000, 0x2000, 0x878ef798 )
763 	ROM_LOAD( "hal21p7.bin",    0x4000, 0x2000, 0x72ebbe95 )
764 	ROM_LOAD( "hal21p8.bin",    0x6000, 0x2000, 0x17e22ad3 )
765 	ROM_LOAD( "hal21p9.bin",    0x8000, 0x2000, 0xb146f891 )
766 
767 	ROM_REGION( 0x10000, REGION_CPU3 )	/* 64k for sound code */
768 	ROM_LOAD( "hal21p10.bin",   0x0000, 0x4000, 0x916f7ba0 )
769 
770 	ROM_REGION( 0x2000, REGION_GFX1 | REGIONFLAG_DISPOSE )
771 	ROM_LOAD( "hal21p12.bin", 0x0000, 0x2000, 0x9839a7cd ) /* char */
772 
773 	ROM_REGION( 0x8000, REGION_GFX2 | REGIONFLAG_DISPOSE  ) /* background tiles */
774 	ROM_LOAD( "hal21p11.bin", 0x0000, 0x4000, 0x24abc57e )
775 
776 	ROM_REGION( 0x18000, REGION_GFX3 | REGIONFLAG_DISPOSE  ) /* 16x16 sprites */
777 	ROM_LOAD( "hal21p13.bin", 0x00000, 0x4000, 0x052b4f4f )
778 	ROM_RELOAD(               0x04000, 0x4000 )
779 	ROM_LOAD( "hal21p14.bin", 0x08000, 0x4000, 0xda0cb670 )
780 	ROM_RELOAD(               0x0c000, 0x4000 )
781 	ROM_LOAD( "hal21p15.bin", 0x10000, 0x4000, 0x5c5ea945 )
782 	ROM_RELOAD(               0x14000, 0x4000 )
783 
784 	ROM_REGION( 0x0c00, REGION_PROMS )
785 	ROM_LOAD( "hal21_1.prm",  0x000, 0x400, 0x195768fc )
786 	ROM_LOAD( "hal21_2.prm",  0x400, 0x400, 0xc5d84225 )
787 	ROM_LOAD( "hal21_3.prm",  0x800, 0x400, 0x605afff8 )
788 ROM_END
789 
790 ROM_START( hal21j )
791 	ROM_REGION( 0x10000, REGION_CPU1 )	/* 64k for CPUA code */
792 	ROM_LOAD( "hal21p1.bin",    0x0000, 0x2000, 0x9d193830 )
793 	ROM_LOAD( "hal21p2.bin",    0x2000, 0x2000, 0xc1f00350 )
794 	ROM_LOAD( "hal21p3.bin",    0x4000, 0x2000, 0x881d22a6 )
795 	ROM_LOAD( "hal21p4.bin",    0x6000, 0x2000, 0xce692534 )
796 
797 	ROM_REGION( 0x10000, REGION_CPU2 )	/* 64k for CPUB code */
798 	ROM_LOAD( "hal21p5.bin",    0x0000, 0x2000, 0x3ce0684a )
799 	ROM_LOAD( "hal21p6.bin",    0x2000, 0x2000, 0x878ef798 )
800 	ROM_LOAD( "hal21p7.bin",    0x4000, 0x2000, 0x72ebbe95 )
801 	ROM_LOAD( "hal21p8.bin",    0x6000, 0x2000, 0x17e22ad3 )
802 	ROM_LOAD( "hal21p9.bin",    0x8000, 0x2000, 0xb146f891 )
803 
804 	ROM_REGION( 0x10000, REGION_CPU3 )	/* 64k for sound code */
805 	ROM_LOAD( "hal21-10.bin",   0x0000, 0x4000, 0xa182b3f0 )
806 
807 	ROM_REGION( 0x2000, REGION_GFX1 | REGIONFLAG_DISPOSE )
808 	ROM_LOAD( "hal21p12.bin", 0x0000, 0x2000, 0x9839a7cd ) /* char */
809 
810 	ROM_REGION( 0x8000, REGION_GFX2 | REGIONFLAG_DISPOSE  ) /* background tiles */
811 	ROM_LOAD( "hal21p11.bin", 0x0000, 0x4000, 0x24abc57e )
812 
813 	ROM_REGION( 0x18000, REGION_GFX3 | REGIONFLAG_DISPOSE  ) /* 16x16 sprites */
814 	ROM_LOAD( "hal21p13.bin", 0x00000, 0x4000, 0x052b4f4f )
815 	ROM_RELOAD(               0x04000, 0x4000 )
816 	ROM_LOAD( "hal21p14.bin", 0x08000, 0x4000, 0xda0cb670 )
817 	ROM_RELOAD(               0x0c000, 0x4000 )
818 	ROM_LOAD( "hal21p15.bin", 0x10000, 0x4000, 0x5c5ea945 )
819 	ROM_RELOAD(               0x14000, 0x4000 )
820 
821 	ROM_REGION( 0x0c00, REGION_PROMS )
822 	ROM_LOAD( "hal21_1.prm",  0x000, 0x400, 0x195768fc )
823 	ROM_LOAD( "hal21_2.prm",  0x400, 0x400, 0xc5d84225 )
824 	ROM_LOAD( "hal21_3.prm",  0x800, 0x400, 0x605afff8 )
825 ROM_END
826 
827 ROM_START( aso )
828 	ROM_REGION( 0x10000, REGION_CPU1 )	/* 64k for cpuA code */
829 	ROM_LOAD( "aso.1",    0x0000, 0x8000, 0x3fc9d5e4 )
830 	ROM_LOAD( "aso.3",    0x8000, 0x4000, 0x39a666d2 )
831 
832 	ROM_REGION( 0x10000, REGION_CPU2 )	/* 64k for cpuB code */
833 	ROM_LOAD( "aso.4",    0x0000, 0x8000, 0x2429792b )
834 	ROM_LOAD( "aso.6",    0x8000, 0x4000, 0xc0bfdf1f )
835 
836 	ROM_REGION( 0x10000, REGION_CPU3 )	/* 64k for sound code */
837 	ROM_LOAD( "aso.7",    0x0000, 0x8000, 0x49258162 )  /* YM3526 */
838 	ROM_LOAD( "aso.9",    0x8000, 0x4000, 0xaef5a4f4 )
839 
840 	ROM_REGION( 0x2000, REGION_GFX1 | REGIONFLAG_DISPOSE ) /* characters */
841 	ROM_LOAD( "aso.14",   0x0000, 0x2000, 0x8baa2253 )
842 
843 	ROM_REGION( 0x8000, REGION_GFX2 | REGIONFLAG_DISPOSE  ) /* background tiles */
844 	ROM_LOAD( "aso.10",   0x0000, 0x8000, 0x00dff996 )
845 
846 	ROM_REGION( 0x18000, REGION_GFX3 | REGIONFLAG_DISPOSE  ) /* 16x16 sprites */
847 	ROM_LOAD( "aso.11",   0x00000, 0x8000, 0x7feac86c )
848 	ROM_LOAD( "aso.12",   0x08000, 0x8000, 0x6895990b )
849 	ROM_LOAD( "aso.13",   0x10000, 0x8000, 0x87a81ce1 )
850 
851 	ROM_REGION( 0x0c00, REGION_PROMS )
852 	ROM_LOAD( "up02_f12.rom",  0x000, 0x00400, 0x5b0a0059 )
853 	ROM_LOAD( "up02_f13.rom",  0x400, 0x00400, 0x37e28dd8 )
854 	ROM_LOAD( "up02_f14.rom",  0x800, 0x00400, 0xc3fd1dd3 )
855 ROM_END
856 
857 
858 
859 GAMEX( 1985, aso,    0,     aso,   aso,   0, ROT270_16BIT, "SNK", "ASO - Armored Scrum Object", GAME_IMPERFECT_SOUND )
860 GAMEX( 1985, hal21,  0,     hal21, hal21, 0, ROT270_16BIT, "SNK", "HAL21", GAME_NO_SOUND | GAME_WRONG_COLORS )
861 GAMEX( 1985, hal21j, hal21, hal21, hal21, 0, ROT270_16BIT, "SNK", "HAL21 (Japan)", GAME_NO_SOUND | GAME_WRONG_COLORS )
862