1 #include "../vidhrdw/rampart.c"
2
3 /***************************************************************************
4
5 Rampart
6
7 driver by Aaron Giles
8
9 ****************************************************************************/
10
11
12 #include "driver.h"
13 #include "machine/atarigen.h"
14 #include "vidhrdw/generic.h"
15
16
17 WRITE_HANDLER( rampart_playfieldram_w );
18
19 int rampart_vh_start(void);
20 void rampart_vh_stop(void);
21 void rampart_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
22
23 void rampart_scanline_update(int scanline);
24
25
26 static UINT8 *slapstic_base;
27 static UINT32 current_bank;
28
29
30
31 /*************************************
32 *
33 * Interrupt handling
34 *
35 *************************************/
36
update_interrupts(void)37 static void update_interrupts(void)
38 {
39 int newstate = 0;
40
41 if (atarigen_scanline_int_state)
42 newstate = 4;
43
44 if (newstate)
45 cpu_set_irq_line(0, newstate, ASSERT_LINE);
46 else
47 cpu_set_irq_line(0, 7, CLEAR_LINE);
48 }
49
50
scanline_update(int scanline)51 static void scanline_update(int scanline)
52 {
53 /* update video */
54 rampart_scanline_update(scanline);
55
56 /* generate 32V signals */
57 if (scanline % 64 == 0)
58 atarigen_scanline_int_gen();
59 }
60
61
62
63 /*************************************
64 *
65 * Slapstic fun & joy
66 *
67 *************************************/
68
69 static UINT32 bank_list[] = { 0x4000, 0x6000, 0x0000, 0x2000 };
70
READ_HANDLER(slapstic_bank_r)71 static READ_HANDLER( slapstic_bank_r )
72 {
73 int opcode_pc = cpu_getpreviouspc();
74 int result;
75
76 /* if the previous PC was 1400E6, then we will be passing through 1400E8 as
77 we decode this instruction. 1400E8 -> 0074 which represents a significant
78 location on the Rampart slapstic; best to tweak it here */
79 if (opcode_pc == 0x1400e6)
80 {
81 current_bank = bank_list[slapstic_tweak(0x00e6 / 2)];
82 current_bank = bank_list[slapstic_tweak(0x00e8 / 2)];
83 current_bank = bank_list[slapstic_tweak(0x00ea / 2)];
84 }
85
86 /* tweak the slapstic and adjust the bank */
87 current_bank = bank_list[slapstic_tweak(offset / 2)];
88 result = READ_WORD(&slapstic_base[current_bank + (offset & 0x1fff)]);
89
90 /* if we did the special hack above, then also tweak for the following
91 instruction fetch, which will force the bank switch to occur */
92 if (opcode_pc == 0x1400e6)
93 current_bank = bank_list[slapstic_tweak(0x00ec / 2)];
94
95 /* adjust the bank and return the result */
96 return result;
97 }
98
WRITE_HANDLER(slapstic_bank_w)99 static WRITE_HANDLER( slapstic_bank_w )
100 {
101 }
102
103
OPBASE_HANDLER(opbase_override)104 static OPBASE_HANDLER( opbase_override )
105 {
106 int oldpc = cpu_getpreviouspc();
107
108 /* tweak the slapstic at the source PC */
109 if (oldpc >= 0x140000 && oldpc < 0x148000)
110 slapstic_bank_r(oldpc - 0x140000);
111
112 /* tweak the slapstic at the destination PC */
113 if (address >= 0x140000 && address < 0x148000)
114 {
115 current_bank = bank_list[slapstic_tweak((address - 0x140000) / 2)];
116
117 /* use a bogus ophw so that we will be called again on the next jump/ret */
118 catch_nextBranch();
119
120 /* compute the new ROM base */
121 OP_RAM = OP_ROM = &slapstic_base[current_bank] - 0x140000;
122
123 /* return -1 so that the standard routine doesn't do anything more */
124 address = -1;
125
126 //logerror("Slapstic op override at %06X\n", address);
127 }
128
129 return address;
130 }
131
132
133
134 /*************************************
135 *
136 * Initialization
137 *
138 *************************************/
139
init_machine(void)140 static void init_machine(void)
141 {
142 atarigen_eeprom_reset();
143 slapstic_reset();
144 atarigen_interrupt_reset(update_interrupts);
145 atarigen_scanline_timer_reset(scanline_update, 8);
146 }
147
148
149
150 /*************************************
151 *
152 * MSM5295 I/O
153 *
154 *************************************/
155
READ_HANDLER(adpcm_r)156 static READ_HANDLER( adpcm_r )
157 {
158 return (OKIM6295_status_0_r(offset) << 8) | 0x00ff;
159 }
160
161
WRITE_HANDLER(adpcm_w)162 static WRITE_HANDLER( adpcm_w )
163 {
164 if (!(data & 0xff000000))
165 OKIM6295_data_0_w(offset, (data >> 8) & 0xff);
166 }
167
168
169
170 /*************************************
171 *
172 * YM2413 I/O
173 *
174 *************************************/
175
READ_HANDLER(ym2413_r)176 static READ_HANDLER( ym2413_r )
177 {
178 (void)offset;
179 return (YM2413_status_port_0_r(0) << 8) | 0x00ff;
180 }
181
182
WRITE_HANDLER(ym2413_w)183 static WRITE_HANDLER( ym2413_w )
184 {
185 if (!(data & 0xff000000))
186 {
187 if (offset & 2)
188 YM2413_data_port_0_w(0, (data >> 8) & 0xff);
189 else
190 YM2413_register_port_0_w(0, (data >> 8) & 0xff);
191 }
192 }
193
194
195
196 /*************************************
197 *
198 * Latch write
199 *
200 *************************************/
201
WRITE_HANDLER(latch_w)202 static WRITE_HANDLER( latch_w )
203 {
204 (void)offset;
205 /* bit layout in this register:
206
207 0x8000 == VCR ???
208 0x2000 == LETAMODE1 (controls right trackball)
209 0x1000 == CBANK (color bank -- is it ever set to non-zero?)
210 0x0800 == LETAMODE0 (controls center and left trackballs)
211 0x0400 == LETARES (reset LETA analog control reader)
212
213 0x0020 == PMIX0 (ADPCM mixer level)
214 0x0010 == /PCMRES (ADPCM reset)
215 0x000E == YMIX2-0 (YM2413 mixer level)
216 0x0001 == /YAMRES (YM2413 reset)
217 */
218
219 /* upper byte being modified? */
220 /*if (!(data & 0xff000000))
221 {
222 if (data & 0x1000)
223 logerror("Color bank set to 1!\n");
224 }*/
225
226 /* lower byte being modified? */
227 if (!(data & 0x00ff0000))
228 {
229 atarigen_set_ym2413_vol(((data >> 1) & 7) * 100 / 7);
230 atarigen_set_oki6295_vol((data & 0x0020) ? 100 : 0);
231 }
232 }
233
234
235
236 /*************************************
237 *
238 * Main CPU memory handlers
239 *
240 *************************************/
241
242 static struct MemoryReadAddress readmem[] =
243 {
244 { 0x000000, 0x0fffff, MRA_ROM },
245 { 0x140000, 0x147fff, slapstic_bank_r },
246 { 0x200000, 0x21fffe, MRA_BANK1 },
247 { 0x3c0000, 0x3c07ff, MRA_BANK2 },
248 { 0x3e0000, 0x3effff, MRA_BANK3 },
249 { 0x460000, 0x460001, adpcm_r },
250 { 0x480000, 0x480001, ym2413_r },
251 { 0x500000, 0x500fff, atarigen_eeprom_r },
252 { 0x640000, 0x640001, input_port_0_r },
253 { 0x640002, 0x640003, input_port_1_r },
254 { 0x6c0000, 0x6c0001, input_port_2_r },
255 { 0x6c0002, 0x6c0003, input_port_3_r },
256 { 0x6c0004, 0x6c0005, input_port_4_r },
257 { 0x6c0006, 0x6c0007, input_port_5_r },
258 { 0x6c0008, 0x6c0009, input_port_6_r },
259 { 0x6c000a, 0x6c000b, input_port_7_r },
260 { -1 } /* end of table */
261 };
262
263
264 static struct MemoryWriteAddress writemem[] =
265 {
266 { 0x000000, 0x0fffff, MWA_ROM },
267 { 0x140000, 0x147fff, slapstic_bank_w, &slapstic_base }, /* here only to initialize the pointer */
268 { 0x200000, 0x21fffe, rampart_playfieldram_w, &atarigen_playfieldram },
269 { 0x220000, 0x3bffff, MWA_NOP }, /* the code blasts right through this when initializing */
270 { 0x3c0000, 0x3c07ff, atarigen_expanded_666_paletteram_w, &paletteram },
271 { 0x3c0800, 0x3dffff, MWA_NOP }, /* the code blasts right through this when initializing */
272 { 0x3e0000, 0x3effff, MWA_BANK3, &atarigen_spriteram },
273 { 0x460000, 0x460001, adpcm_w },
274 { 0x480000, 0x480003, ym2413_w },
275 { 0x500000, 0x500fff, atarigen_eeprom_w, &atarigen_eeprom, &atarigen_eeprom_size },
276 { 0x5a0000, 0x5affff, atarigen_eeprom_enable_w },
277 { 0x640000, 0x640001, latch_w },
278 { 0x720000, 0x72ffff, watchdog_reset_w },
279 { 0x7e0000, 0x7effff, atarigen_scanline_int_ack_w },
280 { -1 } /* end of table */
281 };
282
283
284
285 /*************************************
286 *
287 * Port definitions
288 *
289 *************************************/
290
291 //coin1: was 640013,0; rampart 640003,2
292 //coin2: was 640013,1; rampart 640003,1
293
294 INPUT_PORTS_START( rampart )
295 PORT_START
296 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNUSED )
297 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER3 )
298 PORT_BITX( 0x0004, 0x0004, IPT_DIPSWITCH_NAME, "Number of Players", IP_KEY_NONE, IP_JOY_NONE )
299 PORT_DIPSETTING( 0x0000, "2-player Version")
300 PORT_DIPSETTING( 0x0004, "3-player Version")
301 PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNUSED )
302 PORT_BIT( 0x00f0, IP_ACTIVE_LOW, IPT_UNUSED )
303 PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
304 PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
305 PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER3 )
306 PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_VBLANK )
307 PORT_BIT( 0xf000, IP_ACTIVE_LOW, IPT_UNUSED )
308
309 PORT_START
310 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE )
311 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
312 PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN1 )
313 PORT_BIT( 0x00f8, IP_ACTIVE_LOW, IPT_UNUSED )
314 PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
315 PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
316 PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNUSED )
317 PORT_SERVICE( 0x0800, IP_ACTIVE_LOW )
318 PORT_BIT( 0xf000, IP_ACTIVE_LOW, IPT_UNUSED )
319
320 PORT_START
321 PORT_ANALOG( 0x00ff, 0, IPT_TRACKBALL_Y | IPF_REVERSE | IPF_PLAYER2, 100, 30, 0, 0 )
322 PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
323
324 PORT_START
325 PORT_ANALOG( 0x00ff, 0, IPT_TRACKBALL_X | IPF_REVERSE | IPF_PLAYER2, 100, 30, 0, 0 )
326 PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
327
328 PORT_START
329 PORT_ANALOG( 0x00ff, 0, IPT_TRACKBALL_Y | IPF_REVERSE | IPF_PLAYER1, 100, 30, 0, 0 )
330 PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
331
332 PORT_START
333 PORT_ANALOG( 0x00ff, 0, IPT_TRACKBALL_X | IPF_REVERSE | IPF_PLAYER1, 100, 30, 0, 0 )
334 PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
335
336 PORT_START
337 PORT_ANALOG( 0x00ff, 0, IPT_TRACKBALL_Y | IPF_REVERSE | IPF_PLAYER3, 100, 30, 0, 0 )
338 PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
339
340 PORT_START
341 PORT_ANALOG( 0x00ff, 0, IPT_TRACKBALL_X | IPF_REVERSE | IPF_PLAYER3, 100, 30, 0, 0 )
342 PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
343 INPUT_PORTS_END
344
345
346 INPUT_PORTS_START( ramprt2p )
347 PORT_START
348 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNUSED )
349 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER3 )
350 PORT_BITX( 0x0004, 0x0000, IPT_DIPSWITCH_NAME, "Number of Players", IP_KEY_NONE, IP_JOY_NONE )
351 PORT_DIPSETTING( 0x0000, "2-player Version")
352 PORT_DIPSETTING( 0x0004, "3-player Version")
353 PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNUSED )
354 PORT_BIT( 0x00f0, IP_ACTIVE_LOW, IPT_UNUSED )
355 PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
356 PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
357 PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER3 )
358 PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_VBLANK )
359 PORT_BIT( 0xf000, IP_ACTIVE_LOW, IPT_UNUSED )
360
361 PORT_START
362 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE )
363 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
364 PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN1 )
365 PORT_BIT( 0x00f8, IP_ACTIVE_LOW, IPT_UNUSED )
366 PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
367 PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
368 PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNUSED )
369 PORT_SERVICE( 0x0800, IP_ACTIVE_LOW )
370 PORT_BIT( 0xf000, IP_ACTIVE_LOW, IPT_UNUSED )
371
372 PORT_START
373 PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT | IPF_PLAYER2 )
374 PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT | IPF_PLAYER2 )
375 PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP | IPF_PLAYER2 )
376 PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN | IPF_PLAYER2 )
377 PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT | IPF_PLAYER1 )
378 PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT | IPF_PLAYER1 )
379 PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP | IPF_PLAYER1 )
380 PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN | IPF_PLAYER1 )
381 PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT | IPF_PLAYER3 )
382 PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT | IPF_PLAYER3 )
383 PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP | IPF_PLAYER3 )
384 PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN | IPF_PLAYER3 )
385 PORT_BIT( 0xf000, IP_ACTIVE_HIGH, IPT_UNUSED )
386
387 PORT_START
388 PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
389
390 PORT_START
391 PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
392
393 PORT_START
394 PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
395
396 PORT_START
397 PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
398
399 PORT_START
400 PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
401 INPUT_PORTS_END
402
403
404
405 /*************************************
406 *
407 * Graphics definitions
408 *
409 *************************************/
410
411 static struct GfxLayout molayout =
412 {
413 8,8, /* 8*8 sprites */
414 4096, /* 4096 of them */
415 4, /* 4 bits per pixel */
416 { 0, 1, 2, 3 },
417 { 0, 4, 8, 12, 16, 20, 24, 28 },
418 { 0*8, 4*8, 8*8, 12*8, 16*8, 20*8, 24*8, 28*8 },
419 32*8 /* every sprite takes 32 consecutive bytes */
420 };
421
422
423 static struct GfxDecodeInfo gfxdecodeinfo[] =
424 {
425 { REGION_GFX1, 0, &molayout, 256, 16 }, /* motion objects */
426 { -1 } /* end of array */
427 };
428
429
430
431 /*************************************
432 *
433 * Sound definitions
434 *
435 *************************************/
436
437 static struct OKIM6295interface okim6295_interface =
438 {
439 1, /* 1 chip */
440 { ATARI_CLOCK_14MHz/4/3/165 },
441 { REGION_SOUND1 },
442 { 100 }
443 };
444
445
446 static struct YM2413interface ym2413_interface =
447 {
448 1, /* 1 chip */
449 ATARI_CLOCK_14MHz/4,
450 { 75 },
451 { 0 }
452 };
453
454
455
456 /*************************************
457 *
458 * Machine driver
459 *
460 *************************************/
461
462 static struct MachineDriver machine_driver_rampart =
463 {
464 /* basic machine hardware */
465 {
466 {
467 CPU_M68000, /* verified */
468 ATARI_CLOCK_14MHz/2,
469 readmem,writemem,0,0,
470 atarigen_video_int_gen,1
471 }
472 },
473 60, DEFAULT_REAL_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */
474 1,
475 init_machine,
476
477 /* video hardware */
478 43*8, 30*8, { 0*8+4, 43*8-1-4, 0*8, 30*8-1 },
479 gfxdecodeinfo,
480 512,512,
481 0,
482
483 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE | VIDEO_UPDATE_BEFORE_VBLANK | VIDEO_SUPPORTS_DIRTY,
484 0,
485 rampart_vh_start,
486 rampart_vh_stop,
487 rampart_vh_screenrefresh,
488
489 /* sound hardware */
490 0,0,0,0,
491 {
492 {
493 SOUND_OKIM6295,
494 &okim6295_interface
495 },
496 {
497 SOUND_YM2413,
498 &ym2413_interface
499 }
500 },
501
502 atarigen_nvram_handler
503 };
504
505
506
507 /*************************************
508 *
509 * ROM decoding
510 *
511 *************************************/
512
rom_decode(void)513 static void rom_decode(void)
514 {
515 int i;
516
517 memcpy(&memory_region(REGION_CPU1)[0x140000], &memory_region(REGION_CPU1)[0x40000], 0x8000);
518
519 for (i = 0; i < memory_region_length(REGION_GFX1); i++)
520 memory_region(REGION_GFX1)[i] ^= 0xff;
521 }
522
523
524
525 /*************************************
526 *
527 * ROM definition(s)
528 *
529 *************************************/
530
531 ROM_START( rampart )
532 ROM_REGION( 0x148000, REGION_CPU1 )
533 ROM_LOAD_EVEN( "082-1033.13l", 0x00000, 0x80000, 0x5c36795f )
534 ROM_LOAD_ODD ( "082-1032.13j", 0x00000, 0x80000, 0xec7bc38c )
535 ROM_LOAD_EVEN( "082-2031.13l", 0x00000, 0x10000, 0x07650c7e )
536 ROM_LOAD_ODD ( "082-2030.13h", 0x00000, 0x10000, 0xe2bf2a26 )
537
538 ROM_REGION( 0x20000, REGION_GFX1 | REGIONFLAG_DISPOSE )
539 ROM_LOAD( "082-1009.2n", 0x000000, 0x20000, 0x23b95f59 )
540
541 ROM_REGION( 0x40000, REGION_SOUND1 ) /* ADPCM data */
542 ROM_LOAD( "082-1007.2d", 0x00000, 0x20000, 0xc96a0fc3 )
543 ROM_LOAD( "082-1008.1d", 0x20000, 0x20000, 0x518218d9 )
544 ROM_END
545
546
ROM_START(ramprt2p)547 ROM_START( ramprt2p )
548 ROM_REGION( 0x148000, REGION_CPU1 )
549 ROM_LOAD_EVEN( "082-1033.13l", 0x00000, 0x80000, 0x5c36795f )
550 ROM_LOAD_ODD ( "082-1032.13j", 0x00000, 0x80000, 0xec7bc38c )
551 ROM_LOAD_EVEN( "205113kl.rom", 0x00000, 0x20000, 0xd4e26d0f )
552 ROM_LOAD_ODD ( "205013h.rom", 0x00000, 0x20000, 0xed2a49bd )
553
554 ROM_REGION( 0x20000, REGION_GFX1 | REGIONFLAG_DISPOSE )
555 ROM_LOAD( "10192n.rom", 0x000000, 0x20000, 0xefa38bef )
556
557 ROM_REGION( 0x40000, REGION_SOUND1 ) /* ADPCM data */
558 ROM_LOAD( "082-1007.2d", 0x00000, 0x20000, 0xc96a0fc3 )
559 ROM_LOAD( "082-1008.1d", 0x20000, 0x20000, 0x518218d9 )
560 ROM_END
561
562
563 ROM_START( rampartj )
564 ROM_REGION( 0x148000, REGION_CPU1 )
565 ROM_LOAD_EVEN( "3451.bin", 0x00000, 0x20000, 0xc6596d32 )
566 ROM_LOAD_ODD ( "3450.bin", 0x00000, 0x20000, 0x563b33cc )
567 ROM_LOAD_EVEN( "1463.bin", 0x40000, 0x20000, 0x65fe3491 )
568 ROM_LOAD_ODD ( "1462.bin", 0x40000, 0x20000, 0xba731652 )
569 ROM_LOAD_EVEN( "1465.bin", 0x80000, 0x20000, 0x9cb87d1b )
570 ROM_LOAD_ODD ( "1464.bin", 0x80000, 0x20000, 0x2ff75c40 )
571 ROM_LOAD_EVEN( "1467.bin", 0xc0000, 0x20000, 0xe0cfcda5 )
572 ROM_LOAD_ODD ( "1466.bin", 0xc0000, 0x20000, 0xa7a5a951 )
573
574 ROM_REGION( 0x20000, REGION_GFX1 | REGIONFLAG_DISPOSE )
575 ROM_LOAD( "2419.bin", 0x000000, 0x20000, 0x456a8aae )
576
577 ROM_REGION( 0x40000, REGION_SOUND1 ) /* ADPCM data */
578 ROM_LOAD( "082-1007.2d", 0x00000, 0x20000, 0xc96a0fc3 )
579 ROM_LOAD( "082-1008.1d", 0x20000, 0x20000, 0x518218d9 )
580 ROM_END
581
582
583 ROM_START( arcadecr )
584 ROM_REGION( 0x148000, REGION_CPU1 )
585 ROM_LOAD_EVEN( "pgm0", 0x00000, 0x80000, 0xb5b93623 )
586 ROM_LOAD_ODD ( "prog1", 0x00000, 0x80000, 0xe7efef85 )
587
588 ROM_REGION( 0x80000, REGION_GFX1 | REGIONFLAG_DISPOSE )
589 ROM_LOAD( "atcl_mob", 0x00000, 0x80000, 0x0e9b3930 )
590
591 ROM_REGION( 0x80000, REGION_SOUND1 ) /* ADPCM data */
592 ROM_LOAD( "adpcm", 0x00000, 0x80000, 0x03ca7f03 )
593 ROM_END
594
595
596
597 /*************************************
598 *
599 * Driver initialization
600 *
601 *************************************/
602
603 static void init_rampart(void)
604 {
605 static const UINT16 compressed_default_eeprom[] =
606 {
607 0x0001,0x01FF,0x0E00,0x01FF,0x0E00,0x01FF,0x0150,0x0101,
608 0x0100,0x0151,0x0300,0x0151,0x0400,0x0150,0x0101,0x01FB,
609 0x021E,0x0104,0x011A,0x0200,0x011A,0x0700,0x01FF,0x0E00,
610 0x01FF,0x0E00,0x01FF,0x0150,0x0101,0x0100,0x0151,0x0300,
611 0x0151,0x0400,0x0150,0x0101,0x01FB,0x021E,0x0104,0x011A,
612 0x0200,0x011A,0x0700,0x01AD,0x0150,0x0129,0x0187,0x01CD,
613 0x0113,0x0100,0x0172,0x0179,0x0140,0x0186,0x0113,0x0100,
614 0x01E5,0x0149,0x01F8,0x012A,0x019F,0x0185,0x01E7,0x0113,
615 0x0100,0x01C3,0x01B5,0x0115,0x0184,0x0113,0x0100,0x0179,
616 0x014E,0x01B7,0x012F,0x016D,0x01B7,0x01D5,0x010B,0x0100,
617 0x0163,0x0242,0x01B6,0x010B,0x0100,0x01B9,0x0104,0x01B7,
618 0x01F0,0x01DD,0x01B5,0x0119,0x010B,0x0100,0x01C2,0x012D,
619 0x0142,0x01B4,0x010B,0x0100,0x01C5,0x0115,0x01BB,0x016F,
620 0x01A2,0x01CF,0x01D3,0x0107,0x0100,0x0192,0x01CD,0x0142,
621 0x01CE,0x0107,0x0100,0x0170,0x0136,0x01B1,0x0140,0x017B,
622 0x01CD,0x01FB,0x0107,0x0100,0x0144,0x013B,0x0148,0x01CC,
623 0x0107,0x0100,0x0181,0x0139,0x01FF,0x0E00,0x01FF,0x0E00,
624 0x01FF,0x0E00,0x01FF,0x0E00,0x01FF,0x0E00,0x01FF,0x0E00,
625 0x01FF,0x0E00,0x01FF,0x0E00,0x01FF,0x0E00,0x01FF,0x0E00,
626 0x01FF,0x0E00,0x01FF,0x0E00,0x01FF,0x0E00,0x01FF,0x0E00,
627 0x0000
628 };
629
630 atarigen_eeprom_default = compressed_default_eeprom;
631 slapstic_init(118);
632
633 /* set up some hacks to handle the slapstic accesses */
634 cpu_setOPbaseoverride(0,opbase_override);
635
636 /* display messages */
637 atarigen_show_slapstic_message();
638
639 rom_decode();
640 }
641
642
init_arcadecr(void)643 static void init_arcadecr(void)
644 {
645 UINT32 length = 0x80000 * 2;
646 UINT16 *data = (UINT16 *)memory_region(REGION_CPU1);
647 UINT8 *temp1 = (UINT8*)malloc(length / 2), *temp2 = (UINT8*)malloc(length / 2);
648 FILE *f;
649 int i;
650
651 atarigen_eeprom_default = NULL;
652
653 /*
654 Issues:
655
656 * Rampart has 16k of RAM (2 x 8K chips); Classics has 64k
657 * Rampart has 128k of MOBs; Classics has 512k (see schematics for resistor combinations)
658 * Rampart has 256k of ADPCM; Classics has 512k (see schematics again)
659 * latch is at same address for both, but Rampart only has on/off for ADPCM
660 while classics has 0-31
661 * moved watchdog from 647000 to 720000
662 33C0 0064 7000 -> 33C0 0072 0000
663 * moved interrupt ack from 646000 to 7e0000
664 33FC 0000 0064 6000 -> 33FC 0000 007e 0000
665 33C0 0064 6000 -> 33C0 007e 0000
666 * moved ADPCM from 642000 to 460000
667 2D7C 0064 2000 -> 2D7C 0046 0000
668 * changed btst #7,$640011 to btst #3,$640000
669 0839 0007 0064 0011 -> 0839 0003 0064 0000
670 * changed btst #6,$640011 to btst #0,$640003
671 0839 0006 0064 0011 -> 0839 0000 0064 0003
672 */
673 for (i = 0; i < length - 8; i += 2, data++)
674 {
675 if (data[0] == 0x33c0 && data[1] == 0x0064 && data[2] == 0x7000)
676 data[1] = 0x0072, data[2] = 0x0000;
677 else if (data[0] == 0x33fc && data[1] == 0x0000 && data[2] == 0x0064 && data[3] == 0x6000)
678 data[2] = 0x007e, data[3] = 0x0000;
679 else if (data[0] == 0x33c0 && data[1] == 0x0064 && data[2] == 0x6000)
680 data[1] = 0x007e, data[2] = 0x0000;
681 else if (data[0] == 0x2d7c && data[1] == 0x0064 && data[2] == 0x2000)
682 data[1] = 0x0046, data[2] = 0x0000;
683 else if (data[0] == 0x0839 && data[1] == 0x0007 && data[2] == 0x0064 && data[3] == 0x0011)
684 data[1] = 0x0003, data[3] = 0x0000;
685 else if (data[0] == 0x0839 && data[1] == 0x0006 && data[2] == 0x0064 && data[3] == 0x0011)
686 data[1] = 0x0000, data[3] = 0x0003;
687 temp1[i / 2] = data[0] >> 8;
688 temp2[i / 2] = data[0];
689 }
690
691 f = fopen("pgm0.bin", "wb");
692 fwrite(temp1, 1, length / 2, f);
693 fclose(f);
694 f = fopen("pgm1.bin", "wb");
695 fwrite(temp2, 1, length / 2, f);
696 fclose(f);
697
698 for (i = 0; i < memory_region_length(REGION_GFX1); i++)
699 memory_region(REGION_GFX1)[i] ^= 0xff;
700 }
701
702
703
704 /*************************************
705 *
706 * Game driver(s)
707 *
708 *************************************/
709
710 GAME( 1990, rampart, 0, rampart, rampart, rampart, ROT0, "Atari Games", "Rampart (3-player Trackball)" )
711 GAME( 1990, ramprt2p, rampart, rampart, ramprt2p, rampart, ROT0, "Atari Games", "Rampart (2-player Joystick)" )
712 GAME( 1990, rampartj, rampart, rampart, ramprt2p, rampart, ROT0, "Atari Games", "Rampart (Japan, 2-player Joystick)" )
713
714 GAME( 1990, arcadecr, rampart, rampart, rampart, arcadecr,ROT0, "Atari Games", "Arcade Classics (Rampart PCB)" )
715