1 /*****************************************************************************
2 *
3 * z80.c
4 * Portable Z80 emulator V3.5
5 *
6 * Copyright (C) 1998,1999,2000 Juergen Buchmueller, all rights reserved.
7 *
8 * - This source code is released as freeware for non-commercial purposes.
9 * - You are free to use and redistribute this code in modified or
10 * unmodified form, provided you list me in the credits.
11 * - If you modify this source code, you must add a notice to each modified
12 * source file that it has been changed. If you're a nice person, you
13 * will clearly mark each change too. :)
14 * - If you wish to use this for commercial purposes, please contact me at
15 * pullmoll@t-online.de
16 * - The author of this copywritten work reserves the right to change the
17 * terms of its usage and license at any time, including retroactively
18 * - This entire notice must remain in the source code.
19 *
20 * Changes in 3.5
21 * - Implemented OTIR, INIR, etc. without look-up table for PF flag.
22 * [Ramsoft, Sean Young]
23 * Changes in 3.4
24 * - Removed Z80-MSX specific code as it's not needed any more.
25 * - Implemented DAA without look-up table [Ramsoft, Sean Young]
26 * Changes in 3.3
27 * - Fixed undocumented flags XF & YF in the non-asm versions of CP,
28 * and all the 16 bit arithmetic instructions. [Sean Young]
29 * Changes in 3.2
30 * - Fixed undocumented flags XF & YF of RRCA, and CF and HF of
31 * INI/IND/OUTI/OUTD/INIR/INDR/OTIR/OTDR [Sean Young]
32 * Changes in 3.1
33 * - removed the REPEAT_AT_ONCE execution of LDIR/CPIR etc. opcodes
34 * for readabilities sake and because the implementation was buggy
35 * (and I was not able to find the difference)
36 * Changes in 3.0
37 * - 'finished' switch to dynamically overrideable cycle count tables
38 * Changes in 2.9:
39 * - added methods to access and override the cycle count tables
40 * - fixed handling and timing of multiple DD/FD prefixed opcodes
41 * Changes in 2.8:
42 * - OUTI/OUTD/OTIR/OTDR also pre-decrement the B register now.
43 * This was wrong because of a bug fix on the wrong side
44 * (astrocade sound driver).
45 * Changes in 2.7:
46 * - removed z80_vm specific code, it's not needed (and never was).
47 * Changes in 2.6:
48 * - BUSY_LOOP_HACKS needed to call change_pc16() earlier, before
49 * checking the opcodes at the new address, because otherwise they
50 * might access the old (wrong or even NULL) banked memory region.
51 * Thanks to Sean Young for finding this nasty bug.
52 * Changes in 2.5:
53 * - Burning cycles always adjusts the ICount by a multiple of 4.
54 * - In REPEAT_AT_ONCE cases the R register wasn't incremented twice
55 * per repetition as it should have been. Those repeated opcodes
56 * could also underflow the ICount.
57 * - Simplified TIME_LOOP_HACKS for BC and added two more for DE + HL
58 * timing loops. I think those hacks weren't endian safe before too.
59 * Changes in 2.4:
60 * - z80_reset zaps the entire context, sets IX and IY to 0xffff(!) and
61 * sets the Z flag. With these changes the Tehkan World Cup driver
62 * _seems_ to work again.
63 * Changes in 2.3:
64 * - External termination of the execution loop calls z80_burn() and
65 * z80_vm_burn() to burn an amount of cycles (R adjustment)
66 * - Shortcuts which burn CPU cycles (BUSY_LOOP_HACKS and TIME_LOOP_HACKS)
67 * now also adjust the R register depending on the skipped opcodes.
68 * Changes in 2.2:
69 * - Fixed bugs in CPL, SCF and CCF instructions flag handling.
70 * - Changed variable EA and ARG16() function to UINT32; this
71 * produces slightly more efficient code.
72 * - The DD/FD XY CB opcodes where XY is 40-7F and Y is not 6/E
73 * are changed to calls to the X6/XE opcodes to reduce object size.
74 * They're hardly ever used so this should not yield a speed penalty.
75 * New in 2.0:
76 * - Optional more exact Z80 emulation (#define Z80_EXACT 1) according
77 * to a detailed description by Sean Young which can be found at:
78 * http://www.msxnet.org/tech/z80-documented.pdf
79 *****************************************************************************/
80
81 #include "driver.h"
82 #include "cpuintrf.h"
83 #include "state.h"
84 #include "mamedbg.h"
85 #include "z80.h"
86 #include "mame2003.h"
87
88 #define VERBOSE 0
89
90 #if VERBOSE
91 #define LOG(x) logerror x
92 #else
93 #define LOG(x)
94 #endif
95
96 /* execute main opcodes inside a big switch statement */
97 #ifndef BIG_SWITCH
98 #define BIG_SWITCH 1
99 #endif
100
101 /* big flags array for ADD/ADC/SUB/SBC/CP results */
102 #define BIG_FLAGS_ARRAY 1
103
104 /* Set to 1 for a more exact (but somewhat slower) Z80 emulation */
105 #define Z80_EXACT 1
106
107 /* on JP and JR opcodes check for tight loops */
108 #define BUSY_LOOP_HACKS 1
109
110 /* check for delay loops counting down BC */
111 #define TIME_LOOP_HACKS 1
112
113 #ifdef X86_ASM
114 #undef BIG_FLAGS_ARRAY
115 #define BIG_FLAGS_ARRAY 0
116 #endif
117
118 static UINT8 z80_reg_layout[] = {
119 Z80_PC, Z80_SP, Z80_AF, Z80_BC, Z80_DE, Z80_HL, -1,
120 Z80_IX, Z80_IY, Z80_AF2,Z80_BC2,Z80_DE2,Z80_HL2,-1,
121 Z80_R, Z80_I, Z80_IM, Z80_IFF1,Z80_IFF2, -1,
122 Z80_NMI_STATE,Z80_IRQ_STATE,Z80_DC0,Z80_DC1,Z80_DC2,Z80_DC3, 0
123 };
124
125 static UINT8 z80_win_layout[] = {
126 27, 0,53, 4, /* register window (top rows) */
127 0, 0,26,22, /* disassembler window (left colums) */
128 27, 5,53, 8, /* memory #1 window (right, upper middle) */
129 27,14,53, 8, /* memory #2 window (right, lower middle) */
130 0,23,80, 1, /* command line window (bottom rows) */
131 };
132
133 /****************************************************************************/
134 /* The Z80 registers. HALT is set to 1 when the CPU is halted, the refresh */
135 /* register is calculated as follows: refresh=(Regs.R&127)|(Regs.R2&128) */
136 /****************************************************************************/
137 typedef struct {
138 /* 00 */ PAIR PREPC,PC,SP,AF,BC,DE,HL,IX,IY;
139 /* 24 */ PAIR AF2,BC2,DE2,HL2;
140 /* 34 */ UINT8 R,R2,IFF1,IFF2,HALT,IM,I;
141 /* 3B */ UINT8 irq_max; /* number of daisy chain devices */
142 /* 3C */ INT8 request_irq; /* daisy chain next request device */
143 /* 3D */ INT8 service_irq; /* daisy chain next reti handling device */
144 /* 3E */ UINT8 nmi_state; /* nmi line state */
145 /* 3F */ UINT8 irq_state; /* irq line state */
146 /* 40 */ UINT8 int_state[Z80_MAXDAISY];
147 /* 44 */ Z80_DaisyChain irq[Z80_MAXDAISY];
148 /* 84 */ int (*irq_callback)(int irqline);
149 /* 88 */ int extra_cycles; /* extra cycles for interrupts */
150 } Z80_Regs;
151
152 #define CF 0x01
153 #define NF 0x02
154 #define PF 0x04
155 #define VF PF
156 #define XF 0x08
157 #define HF 0x10
158 #define YF 0x20
159 #define ZF 0x40
160 #define SF 0x80
161
162 #define INT_IRQ 0x01
163 #define NMI_IRQ 0x02
164
165 #define _PPC Z80.PREPC.d /* previous program counter */
166
167 #define _PCD Z80.PC.d
168 #define _PC Z80.PC.w.l
169
170 #define _SPD Z80.SP.d
171 #define _SP Z80.SP.w.l
172
173 #define _AFD Z80.AF.d
174 #define _AF Z80.AF.w.l
175 #define _A Z80.AF.b.h
176 #define _F Z80.AF.b.l
177
178 #define _BCD Z80.BC.d
179 #define _BC Z80.BC.w.l
180 #define _B Z80.BC.b.h
181 #define _C Z80.BC.b.l
182
183 #define _DED Z80.DE.d
184 #define _DE Z80.DE.w.l
185 #define _D Z80.DE.b.h
186 #define _E Z80.DE.b.l
187
188 #define _HLD Z80.HL.d
189 #define _HL Z80.HL.w.l
190 #define _H Z80.HL.b.h
191 #define _L Z80.HL.b.l
192
193 #define _IXD Z80.IX.d
194 #define _IX Z80.IX.w.l
195 #define _HX Z80.IX.b.h
196 #define _LX Z80.IX.b.l
197
198 #define _IYD Z80.IY.d
199 #define _IY Z80.IY.w.l
200 #define _HY Z80.IY.b.h
201 #define _LY Z80.IY.b.l
202
203 #define _I Z80.I
204 #define _R Z80.R
205 #define _R2 Z80.R2
206 #define _IM Z80.IM
207 #define _IFF1 Z80.IFF1
208 #define _IFF2 Z80.IFF2
209 #define _HALT Z80.HALT
210
211 extern retro_log_printf_t log_cb;
212
213 int z80_ICount;
214 static Z80_Regs Z80;
215 static UINT32 EA;
216 static int after_EI = 0;
217
218 static UINT8 SZ[256]; /* zero and sign flags */
219 static UINT8 SZ_BIT[256]; /* zero, sign and parity/overflow (=zero) flags for BIT opcode */
220 static UINT8 SZP[256]; /* zero, sign and parity flags */
221 static UINT8 SZHV_inc[256]; /* zero, sign, half carry and overflow flags INC r8 */
222 static UINT8 SZHV_dec[256]; /* zero, sign, half carry and overflow flags DEC r8 */
223
224 #if BIG_FLAGS_ARRAY
225 static UINT8 *SZHVC_add = 0;
226 static UINT8 *SZHVC_sub = 0;
227 #endif
228
229 static const UINT8 cc_op[0x100] = {
230 4,10, 7, 6, 4, 4, 7, 4, 4,11, 7, 6, 4, 4, 7, 4,
231 8,10, 7, 6, 4, 4, 7, 4,12,11, 7, 6, 4, 4, 7, 4,
232 7,10,16, 6, 4, 4, 7, 4, 7,11,16, 6, 4, 4, 7, 4,
233 7,10,13, 6,11,11,10, 4, 7,11,13, 6, 4, 4, 7, 4,
234 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
235 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
236 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
237 7, 7, 7, 7, 7, 7, 4, 7, 4, 4, 4, 4, 4, 4, 7, 4,
238 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
239 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
240 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
241 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
242 5,10,10,10,10,11, 7,11, 5,10,10, 0,10,17, 7,11,
243 5,10,10,11,10,11, 7,11, 5, 4,10,11,10, 0, 7,11,
244 5,10,10,19,10,11, 7,11, 5, 4,10, 4,10, 0, 7,11,
245 5,10,10, 4,10,11, 7,11, 5, 6,10, 4,10, 0, 7,11};
246
247 static const UINT8 cc_cb[0x100] = {
248 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
249 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
250 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
251 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
252 8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
253 8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
254 8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
255 8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
256 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
257 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
258 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
259 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
260 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
261 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
262 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
263 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8};
264
265 static const UINT8 cc_ed[0x100] = {
266 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
267 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
268 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
269 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
270 12,12,15,20, 8, 8, 8, 9,12,12,15,20, 8, 8, 8, 9,
271 12,12,15,20, 8, 8, 8, 9,12,12,15,20, 8, 8, 8, 9,
272 12,12,15,20, 8, 8, 8,18,12,12,15,20, 8, 8, 8,18,
273 12,12,15,20, 8, 8, 8, 8,12,12,15,20, 8, 8, 8, 8,
274 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
275 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
276 16,16,16,16, 8, 8, 8, 8,16,16,16,16, 8, 8, 8, 8,
277 16,16,16,16, 8, 8, 8, 8,16,16,16,16, 8, 8, 8, 8,
278 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
279 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
280 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
281 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8};
282
283 static const UINT8 cc_xy[0x100] = {
284 4, 4, 4, 4, 4, 4, 4, 4, 4,15, 4, 4, 4, 4, 4, 4,
285 4, 4, 4, 4, 4, 4, 4, 4, 4,15, 4, 4, 4, 4, 4, 4,
286 4,14,20,10, 9, 9, 9, 4, 4,15,20,10, 9, 9, 9, 4,
287 4, 4, 4, 4,23,23,19, 4, 4,15, 4, 4, 4, 4, 4, 4,
288 4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
289 4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
290 9, 9, 9, 9, 9, 9,19, 9, 9, 9, 9, 9, 9, 9,19, 9,
291 19,19,19,19,19,19, 4,19, 4, 4, 4, 4, 9, 9,19, 4,
292 4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
293 4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
294 4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
295 4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
296 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 0, 4, 4, 4, 4,
297 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
298 4,14, 4,23, 4,15, 4, 4, 4, 8, 4, 4, 4, 4, 4, 4,
299 4, 4, 4, 4, 4, 4, 4, 4, 4,10, 4, 4, 4, 4, 4, 4};
300
301 static const UINT8 cc_xycb[0x100] = {
302 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
303 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
304 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
305 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
306 20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,
307 20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,
308 20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,
309 20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,
310 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
311 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
312 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
313 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
314 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
315 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
316 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
317 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23};
318
319 /* extra cycles if jr/jp/call taken and 'interrupt latency' on rst 0-7 */
320 static const UINT8 cc_ex[0x100] = {
321 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
322 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* DJNZ */
323 5, 0, 0, 0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0, /* JR NZ/JR Z */
324 5, 0, 0, 0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0, /* JR NC/JR C */
325 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
326 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
327 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
328 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
329 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
330 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
331 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
332 5, 5, 5, 5, 0, 0, 0, 0, 5, 5, 5, 5, 0, 0, 0, 0, /* LDIR/CPIR/INIR/OTIR LDDR/CPDR/INDR/OTDR */
333 6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2,
334 6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2,
335 6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2,
336 6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2};
337
338 static const UINT8 *cc[6] = { cc_op, cc_cb, cc_ed, cc_xy, cc_xycb, cc_ex };
339 #define Z80_TABLE_dd Z80_TABLE_xy
340 #define Z80_TABLE_fd Z80_TABLE_xy
341
342 static void take_interrupt(void);
343
344 typedef void (*funcptr)(void);
345
346 #define PROTOTYPES(tablename,prefix) \
347 static INLINE void prefix##_00(void); static INLINE void prefix##_01(void); static INLINE void prefix##_02(void); static INLINE void prefix##_03(void); \
348 static INLINE void prefix##_04(void); static INLINE void prefix##_05(void); static INLINE void prefix##_06(void); static INLINE void prefix##_07(void); \
349 static INLINE void prefix##_08(void); static INLINE void prefix##_09(void); static INLINE void prefix##_0a(void); static INLINE void prefix##_0b(void); \
350 static INLINE void prefix##_0c(void); static INLINE void prefix##_0d(void); static INLINE void prefix##_0e(void); static INLINE void prefix##_0f(void); \
351 static INLINE void prefix##_10(void); static INLINE void prefix##_11(void); static INLINE void prefix##_12(void); static INLINE void prefix##_13(void); \
352 static INLINE void prefix##_14(void); static INLINE void prefix##_15(void); static INLINE void prefix##_16(void); static INLINE void prefix##_17(void); \
353 static INLINE void prefix##_18(void); static INLINE void prefix##_19(void); static INLINE void prefix##_1a(void); static INLINE void prefix##_1b(void); \
354 static INLINE void prefix##_1c(void); static INLINE void prefix##_1d(void); static INLINE void prefix##_1e(void); static INLINE void prefix##_1f(void); \
355 static INLINE void prefix##_20(void); static INLINE void prefix##_21(void); static INLINE void prefix##_22(void); static INLINE void prefix##_23(void); \
356 static INLINE void prefix##_24(void); static INLINE void prefix##_25(void); static INLINE void prefix##_26(void); static INLINE void prefix##_27(void); \
357 static INLINE void prefix##_28(void); static INLINE void prefix##_29(void); static INLINE void prefix##_2a(void); static INLINE void prefix##_2b(void); \
358 static INLINE void prefix##_2c(void); static INLINE void prefix##_2d(void); static INLINE void prefix##_2e(void); static INLINE void prefix##_2f(void); \
359 static INLINE void prefix##_30(void); static INLINE void prefix##_31(void); static INLINE void prefix##_32(void); static INLINE void prefix##_33(void); \
360 static INLINE void prefix##_34(void); static INLINE void prefix##_35(void); static INLINE void prefix##_36(void); static INLINE void prefix##_37(void); \
361 static INLINE void prefix##_38(void); static INLINE void prefix##_39(void); static INLINE void prefix##_3a(void); static INLINE void prefix##_3b(void); \
362 static INLINE void prefix##_3c(void); static INLINE void prefix##_3d(void); static INLINE void prefix##_3e(void); static INLINE void prefix##_3f(void); \
363 static INLINE void prefix##_40(void); static INLINE void prefix##_41(void); static INLINE void prefix##_42(void); static INLINE void prefix##_43(void); \
364 static INLINE void prefix##_44(void); static INLINE void prefix##_45(void); static INLINE void prefix##_46(void); static INLINE void prefix##_47(void); \
365 static INLINE void prefix##_48(void); static INLINE void prefix##_49(void); static INLINE void prefix##_4a(void); static INLINE void prefix##_4b(void); \
366 static INLINE void prefix##_4c(void); static INLINE void prefix##_4d(void); static INLINE void prefix##_4e(void); static INLINE void prefix##_4f(void); \
367 static INLINE void prefix##_50(void); static INLINE void prefix##_51(void); static INLINE void prefix##_52(void); static INLINE void prefix##_53(void); \
368 static INLINE void prefix##_54(void); static INLINE void prefix##_55(void); static INLINE void prefix##_56(void); static INLINE void prefix##_57(void); \
369 static INLINE void prefix##_58(void); static INLINE void prefix##_59(void); static INLINE void prefix##_5a(void); static INLINE void prefix##_5b(void); \
370 static INLINE void prefix##_5c(void); static INLINE void prefix##_5d(void); static INLINE void prefix##_5e(void); static INLINE void prefix##_5f(void); \
371 static INLINE void prefix##_60(void); static INLINE void prefix##_61(void); static INLINE void prefix##_62(void); static INLINE void prefix##_63(void); \
372 static INLINE void prefix##_64(void); static INLINE void prefix##_65(void); static INLINE void prefix##_66(void); static INLINE void prefix##_67(void); \
373 static INLINE void prefix##_68(void); static INLINE void prefix##_69(void); static INLINE void prefix##_6a(void); static INLINE void prefix##_6b(void); \
374 static INLINE void prefix##_6c(void); static INLINE void prefix##_6d(void); static INLINE void prefix##_6e(void); static INLINE void prefix##_6f(void); \
375 static INLINE void prefix##_70(void); static INLINE void prefix##_71(void); static INLINE void prefix##_72(void); static INLINE void prefix##_73(void); \
376 static INLINE void prefix##_74(void); static INLINE void prefix##_75(void); static INLINE void prefix##_76(void); static INLINE void prefix##_77(void); \
377 static INLINE void prefix##_78(void); static INLINE void prefix##_79(void); static INLINE void prefix##_7a(void); static INLINE void prefix##_7b(void); \
378 static INLINE void prefix##_7c(void); static INLINE void prefix##_7d(void); static INLINE void prefix##_7e(void); static INLINE void prefix##_7f(void); \
379 static INLINE void prefix##_80(void); static INLINE void prefix##_81(void); static INLINE void prefix##_82(void); static INLINE void prefix##_83(void); \
380 static INLINE void prefix##_84(void); static INLINE void prefix##_85(void); static INLINE void prefix##_86(void); static INLINE void prefix##_87(void); \
381 static INLINE void prefix##_88(void); static INLINE void prefix##_89(void); static INLINE void prefix##_8a(void); static INLINE void prefix##_8b(void); \
382 static INLINE void prefix##_8c(void); static INLINE void prefix##_8d(void); static INLINE void prefix##_8e(void); static INLINE void prefix##_8f(void); \
383 static INLINE void prefix##_90(void); static INLINE void prefix##_91(void); static INLINE void prefix##_92(void); static INLINE void prefix##_93(void); \
384 static INLINE void prefix##_94(void); static INLINE void prefix##_95(void); static INLINE void prefix##_96(void); static INLINE void prefix##_97(void); \
385 static INLINE void prefix##_98(void); static INLINE void prefix##_99(void); static INLINE void prefix##_9a(void); static INLINE void prefix##_9b(void); \
386 static INLINE void prefix##_9c(void); static INLINE void prefix##_9d(void); static INLINE void prefix##_9e(void); static INLINE void prefix##_9f(void); \
387 static INLINE void prefix##_a0(void); static INLINE void prefix##_a1(void); static INLINE void prefix##_a2(void); static INLINE void prefix##_a3(void); \
388 static INLINE void prefix##_a4(void); static INLINE void prefix##_a5(void); static INLINE void prefix##_a6(void); static INLINE void prefix##_a7(void); \
389 static INLINE void prefix##_a8(void); static INLINE void prefix##_a9(void); static INLINE void prefix##_aa(void); static INLINE void prefix##_ab(void); \
390 static INLINE void prefix##_ac(void); static INLINE void prefix##_ad(void); static INLINE void prefix##_ae(void); static INLINE void prefix##_af(void); \
391 static INLINE void prefix##_b0(void); static INLINE void prefix##_b1(void); static INLINE void prefix##_b2(void); static INLINE void prefix##_b3(void); \
392 static INLINE void prefix##_b4(void); static INLINE void prefix##_b5(void); static INLINE void prefix##_b6(void); static INLINE void prefix##_b7(void); \
393 static INLINE void prefix##_b8(void); static INLINE void prefix##_b9(void); static INLINE void prefix##_ba(void); static INLINE void prefix##_bb(void); \
394 static INLINE void prefix##_bc(void); static INLINE void prefix##_bd(void); static INLINE void prefix##_be(void); static INLINE void prefix##_bf(void); \
395 static INLINE void prefix##_c0(void); static INLINE void prefix##_c1(void); static INLINE void prefix##_c2(void); static INLINE void prefix##_c3(void); \
396 static INLINE void prefix##_c4(void); static INLINE void prefix##_c5(void); static INLINE void prefix##_c6(void); static INLINE void prefix##_c7(void); \
397 static INLINE void prefix##_c8(void); static INLINE void prefix##_c9(void); static INLINE void prefix##_ca(void); static INLINE void prefix##_cb(void); \
398 static INLINE void prefix##_cc(void); static INLINE void prefix##_cd(void); static INLINE void prefix##_ce(void); static INLINE void prefix##_cf(void); \
399 static INLINE void prefix##_d0(void); static INLINE void prefix##_d1(void); static INLINE void prefix##_d2(void); static INLINE void prefix##_d3(void); \
400 static INLINE void prefix##_d4(void); static INLINE void prefix##_d5(void); static INLINE void prefix##_d6(void); static INLINE void prefix##_d7(void); \
401 static INLINE void prefix##_d8(void); static INLINE void prefix##_d9(void); static INLINE void prefix##_da(void); static INLINE void prefix##_db(void); \
402 static INLINE void prefix##_dc(void); static INLINE void prefix##_dd(void); static INLINE void prefix##_de(void); static INLINE void prefix##_df(void); \
403 static INLINE void prefix##_e0(void); static INLINE void prefix##_e1(void); static INLINE void prefix##_e2(void); static INLINE void prefix##_e3(void); \
404 static INLINE void prefix##_e4(void); static INLINE void prefix##_e5(void); static INLINE void prefix##_e6(void); static INLINE void prefix##_e7(void); \
405 static INLINE void prefix##_e8(void); static INLINE void prefix##_e9(void); static INLINE void prefix##_ea(void); static INLINE void prefix##_eb(void); \
406 static INLINE void prefix##_ec(void); static INLINE void prefix##_ed(void); static INLINE void prefix##_ee(void); static INLINE void prefix##_ef(void); \
407 static INLINE void prefix##_f0(void); static INLINE void prefix##_f1(void); static INLINE void prefix##_f2(void); static INLINE void prefix##_f3(void); \
408 static INLINE void prefix##_f4(void); static INLINE void prefix##_f5(void); static INLINE void prefix##_f6(void); static INLINE void prefix##_f7(void); \
409 static INLINE void prefix##_f8(void); static INLINE void prefix##_f9(void); static INLINE void prefix##_fa(void); static INLINE void prefix##_fb(void); \
410 static INLINE void prefix##_fc(void); static INLINE void prefix##_fd(void); static INLINE void prefix##_fe(void); static INLINE void prefix##_ff(void); \
411 static const funcptr tablename[0x100] = { \
412 prefix##_00,prefix##_01,prefix##_02,prefix##_03,prefix##_04,prefix##_05,prefix##_06,prefix##_07, \
413 prefix##_08,prefix##_09,prefix##_0a,prefix##_0b,prefix##_0c,prefix##_0d,prefix##_0e,prefix##_0f, \
414 prefix##_10,prefix##_11,prefix##_12,prefix##_13,prefix##_14,prefix##_15,prefix##_16,prefix##_17, \
415 prefix##_18,prefix##_19,prefix##_1a,prefix##_1b,prefix##_1c,prefix##_1d,prefix##_1e,prefix##_1f, \
416 prefix##_20,prefix##_21,prefix##_22,prefix##_23,prefix##_24,prefix##_25,prefix##_26,prefix##_27, \
417 prefix##_28,prefix##_29,prefix##_2a,prefix##_2b,prefix##_2c,prefix##_2d,prefix##_2e,prefix##_2f, \
418 prefix##_30,prefix##_31,prefix##_32,prefix##_33,prefix##_34,prefix##_35,prefix##_36,prefix##_37, \
419 prefix##_38,prefix##_39,prefix##_3a,prefix##_3b,prefix##_3c,prefix##_3d,prefix##_3e,prefix##_3f, \
420 prefix##_40,prefix##_41,prefix##_42,prefix##_43,prefix##_44,prefix##_45,prefix##_46,prefix##_47, \
421 prefix##_48,prefix##_49,prefix##_4a,prefix##_4b,prefix##_4c,prefix##_4d,prefix##_4e,prefix##_4f, \
422 prefix##_50,prefix##_51,prefix##_52,prefix##_53,prefix##_54,prefix##_55,prefix##_56,prefix##_57, \
423 prefix##_58,prefix##_59,prefix##_5a,prefix##_5b,prefix##_5c,prefix##_5d,prefix##_5e,prefix##_5f, \
424 prefix##_60,prefix##_61,prefix##_62,prefix##_63,prefix##_64,prefix##_65,prefix##_66,prefix##_67, \
425 prefix##_68,prefix##_69,prefix##_6a,prefix##_6b,prefix##_6c,prefix##_6d,prefix##_6e,prefix##_6f, \
426 prefix##_70,prefix##_71,prefix##_72,prefix##_73,prefix##_74,prefix##_75,prefix##_76,prefix##_77, \
427 prefix##_78,prefix##_79,prefix##_7a,prefix##_7b,prefix##_7c,prefix##_7d,prefix##_7e,prefix##_7f, \
428 prefix##_80,prefix##_81,prefix##_82,prefix##_83,prefix##_84,prefix##_85,prefix##_86,prefix##_87, \
429 prefix##_88,prefix##_89,prefix##_8a,prefix##_8b,prefix##_8c,prefix##_8d,prefix##_8e,prefix##_8f, \
430 prefix##_90,prefix##_91,prefix##_92,prefix##_93,prefix##_94,prefix##_95,prefix##_96,prefix##_97, \
431 prefix##_98,prefix##_99,prefix##_9a,prefix##_9b,prefix##_9c,prefix##_9d,prefix##_9e,prefix##_9f, \
432 prefix##_a0,prefix##_a1,prefix##_a2,prefix##_a3,prefix##_a4,prefix##_a5,prefix##_a6,prefix##_a7, \
433 prefix##_a8,prefix##_a9,prefix##_aa,prefix##_ab,prefix##_ac,prefix##_ad,prefix##_ae,prefix##_af, \
434 prefix##_b0,prefix##_b1,prefix##_b2,prefix##_b3,prefix##_b4,prefix##_b5,prefix##_b6,prefix##_b7, \
435 prefix##_b8,prefix##_b9,prefix##_ba,prefix##_bb,prefix##_bc,prefix##_bd,prefix##_be,prefix##_bf, \
436 prefix##_c0,prefix##_c1,prefix##_c2,prefix##_c3,prefix##_c4,prefix##_c5,prefix##_c6,prefix##_c7, \
437 prefix##_c8,prefix##_c9,prefix##_ca,prefix##_cb,prefix##_cc,prefix##_cd,prefix##_ce,prefix##_cf, \
438 prefix##_d0,prefix##_d1,prefix##_d2,prefix##_d3,prefix##_d4,prefix##_d5,prefix##_d6,prefix##_d7, \
439 prefix##_d8,prefix##_d9,prefix##_da,prefix##_db,prefix##_dc,prefix##_dd,prefix##_de,prefix##_df, \
440 prefix##_e0,prefix##_e1,prefix##_e2,prefix##_e3,prefix##_e4,prefix##_e5,prefix##_e6,prefix##_e7, \
441 prefix##_e8,prefix##_e9,prefix##_ea,prefix##_eb,prefix##_ec,prefix##_ed,prefix##_ee,prefix##_ef, \
442 prefix##_f0,prefix##_f1,prefix##_f2,prefix##_f3,prefix##_f4,prefix##_f5,prefix##_f6,prefix##_f7, \
443 prefix##_f8,prefix##_f9,prefix##_fa,prefix##_fb,prefix##_fc,prefix##_fd,prefix##_fe,prefix##_ff \
444 }
445
446 PROTOTYPES(Z80op,op);
447 PROTOTYPES(Z80cb,cb);
448 PROTOTYPES(Z80dd,dd);
449 PROTOTYPES(Z80ed,ed);
450 PROTOTYPES(Z80fd,fd);
451 PROTOTYPES(Z80xycb,xycb);
452
453 /****************************************************************************/
454 /* Burn an odd amount of cycles, that is instructions taking something */
455 /* different from 4 T-states per opcode (and R increment) */
456 /****************************************************************************/
BURNODD(int cycles,int opcodes,int cyclesum)457 static INLINE void BURNODD(int cycles, int opcodes, int cyclesum)
458 {
459 if( cycles > 0 )
460 {
461 _R += (cycles / cyclesum) * opcodes;
462 z80_ICount -= (cycles / cyclesum) * cyclesum;
463 }
464 }
465
466 /***************************************************************
467 * define an opcode function
468 ***************************************************************/
469 #define OP(prefix,opcode) static INLINE void prefix##_##opcode(void)
470
471 /***************************************************************
472 * adjust cycle count by n T-states
473 ***************************************************************/
474 #define CC(prefix,opcode) z80_ICount -= cc[Z80_TABLE_##prefix][opcode]
475
476 /***************************************************************
477 * execute an opcode
478 ***************************************************************/
479 #define EXEC(prefix,opcode) \
480 { \
481 unsigned op = opcode; \
482 CC(prefix,op); \
483 (*Z80##prefix[op])(); \
484 }
485
486 #if BIG_SWITCH
487 #define EXEC_INLINE(prefix,opcode) \
488 { \
489 unsigned op = opcode; \
490 CC(prefix,op); \
491 switch(op) \
492 { \
493 case 0x00:prefix##_##00();break; case 0x01:prefix##_##01();break; case 0x02:prefix##_##02();break; case 0x03:prefix##_##03();break; \
494 case 0x04:prefix##_##04();break; case 0x05:prefix##_##05();break; case 0x06:prefix##_##06();break; case 0x07:prefix##_##07();break; \
495 case 0x08:prefix##_##08();break; case 0x09:prefix##_##09();break; case 0x0a:prefix##_##0a();break; case 0x0b:prefix##_##0b();break; \
496 case 0x0c:prefix##_##0c();break; case 0x0d:prefix##_##0d();break; case 0x0e:prefix##_##0e();break; case 0x0f:prefix##_##0f();break; \
497 case 0x10:prefix##_##10();break; case 0x11:prefix##_##11();break; case 0x12:prefix##_##12();break; case 0x13:prefix##_##13();break; \
498 case 0x14:prefix##_##14();break; case 0x15:prefix##_##15();break; case 0x16:prefix##_##16();break; case 0x17:prefix##_##17();break; \
499 case 0x18:prefix##_##18();break; case 0x19:prefix##_##19();break; case 0x1a:prefix##_##1a();break; case 0x1b:prefix##_##1b();break; \
500 case 0x1c:prefix##_##1c();break; case 0x1d:prefix##_##1d();break; case 0x1e:prefix##_##1e();break; case 0x1f:prefix##_##1f();break; \
501 case 0x20:prefix##_##20();break; case 0x21:prefix##_##21();break; case 0x22:prefix##_##22();break; case 0x23:prefix##_##23();break; \
502 case 0x24:prefix##_##24();break; case 0x25:prefix##_##25();break; case 0x26:prefix##_##26();break; case 0x27:prefix##_##27();break; \
503 case 0x28:prefix##_##28();break; case 0x29:prefix##_##29();break; case 0x2a:prefix##_##2a();break; case 0x2b:prefix##_##2b();break; \
504 case 0x2c:prefix##_##2c();break; case 0x2d:prefix##_##2d();break; case 0x2e:prefix##_##2e();break; case 0x2f:prefix##_##2f();break; \
505 case 0x30:prefix##_##30();break; case 0x31:prefix##_##31();break; case 0x32:prefix##_##32();break; case 0x33:prefix##_##33();break; \
506 case 0x34:prefix##_##34();break; case 0x35:prefix##_##35();break; case 0x36:prefix##_##36();break; case 0x37:prefix##_##37();break; \
507 case 0x38:prefix##_##38();break; case 0x39:prefix##_##39();break; case 0x3a:prefix##_##3a();break; case 0x3b:prefix##_##3b();break; \
508 case 0x3c:prefix##_##3c();break; case 0x3d:prefix##_##3d();break; case 0x3e:prefix##_##3e();break; case 0x3f:prefix##_##3f();break; \
509 case 0x40:prefix##_##40();break; case 0x41:prefix##_##41();break; case 0x42:prefix##_##42();break; case 0x43:prefix##_##43();break; \
510 case 0x44:prefix##_##44();break; case 0x45:prefix##_##45();break; case 0x46:prefix##_##46();break; case 0x47:prefix##_##47();break; \
511 case 0x48:prefix##_##48();break; case 0x49:prefix##_##49();break; case 0x4a:prefix##_##4a();break; case 0x4b:prefix##_##4b();break; \
512 case 0x4c:prefix##_##4c();break; case 0x4d:prefix##_##4d();break; case 0x4e:prefix##_##4e();break; case 0x4f:prefix##_##4f();break; \
513 case 0x50:prefix##_##50();break; case 0x51:prefix##_##51();break; case 0x52:prefix##_##52();break; case 0x53:prefix##_##53();break; \
514 case 0x54:prefix##_##54();break; case 0x55:prefix##_##55();break; case 0x56:prefix##_##56();break; case 0x57:prefix##_##57();break; \
515 case 0x58:prefix##_##58();break; case 0x59:prefix##_##59();break; case 0x5a:prefix##_##5a();break; case 0x5b:prefix##_##5b();break; \
516 case 0x5c:prefix##_##5c();break; case 0x5d:prefix##_##5d();break; case 0x5e:prefix##_##5e();break; case 0x5f:prefix##_##5f();break; \
517 case 0x60:prefix##_##60();break; case 0x61:prefix##_##61();break; case 0x62:prefix##_##62();break; case 0x63:prefix##_##63();break; \
518 case 0x64:prefix##_##64();break; case 0x65:prefix##_##65();break; case 0x66:prefix##_##66();break; case 0x67:prefix##_##67();break; \
519 case 0x68:prefix##_##68();break; case 0x69:prefix##_##69();break; case 0x6a:prefix##_##6a();break; case 0x6b:prefix##_##6b();break; \
520 case 0x6c:prefix##_##6c();break; case 0x6d:prefix##_##6d();break; case 0x6e:prefix##_##6e();break; case 0x6f:prefix##_##6f();break; \
521 case 0x70:prefix##_##70();break; case 0x71:prefix##_##71();break; case 0x72:prefix##_##72();break; case 0x73:prefix##_##73();break; \
522 case 0x74:prefix##_##74();break; case 0x75:prefix##_##75();break; case 0x76:prefix##_##76();break; case 0x77:prefix##_##77();break; \
523 case 0x78:prefix##_##78();break; case 0x79:prefix##_##79();break; case 0x7a:prefix##_##7a();break; case 0x7b:prefix##_##7b();break; \
524 case 0x7c:prefix##_##7c();break; case 0x7d:prefix##_##7d();break; case 0x7e:prefix##_##7e();break; case 0x7f:prefix##_##7f();break; \
525 case 0x80:prefix##_##80();break; case 0x81:prefix##_##81();break; case 0x82:prefix##_##82();break; case 0x83:prefix##_##83();break; \
526 case 0x84:prefix##_##84();break; case 0x85:prefix##_##85();break; case 0x86:prefix##_##86();break; case 0x87:prefix##_##87();break; \
527 case 0x88:prefix##_##88();break; case 0x89:prefix##_##89();break; case 0x8a:prefix##_##8a();break; case 0x8b:prefix##_##8b();break; \
528 case 0x8c:prefix##_##8c();break; case 0x8d:prefix##_##8d();break; case 0x8e:prefix##_##8e();break; case 0x8f:prefix##_##8f();break; \
529 case 0x90:prefix##_##90();break; case 0x91:prefix##_##91();break; case 0x92:prefix##_##92();break; case 0x93:prefix##_##93();break; \
530 case 0x94:prefix##_##94();break; case 0x95:prefix##_##95();break; case 0x96:prefix##_##96();break; case 0x97:prefix##_##97();break; \
531 case 0x98:prefix##_##98();break; case 0x99:prefix##_##99();break; case 0x9a:prefix##_##9a();break; case 0x9b:prefix##_##9b();break; \
532 case 0x9c:prefix##_##9c();break; case 0x9d:prefix##_##9d();break; case 0x9e:prefix##_##9e();break; case 0x9f:prefix##_##9f();break; \
533 case 0xa0:prefix##_##a0();break; case 0xa1:prefix##_##a1();break; case 0xa2:prefix##_##a2();break; case 0xa3:prefix##_##a3();break; \
534 case 0xa4:prefix##_##a4();break; case 0xa5:prefix##_##a5();break; case 0xa6:prefix##_##a6();break; case 0xa7:prefix##_##a7();break; \
535 case 0xa8:prefix##_##a8();break; case 0xa9:prefix##_##a9();break; case 0xaa:prefix##_##aa();break; case 0xab:prefix##_##ab();break; \
536 case 0xac:prefix##_##ac();break; case 0xad:prefix##_##ad();break; case 0xae:prefix##_##ae();break; case 0xaf:prefix##_##af();break; \
537 case 0xb0:prefix##_##b0();break; case 0xb1:prefix##_##b1();break; case 0xb2:prefix##_##b2();break; case 0xb3:prefix##_##b3();break; \
538 case 0xb4:prefix##_##b4();break; case 0xb5:prefix##_##b5();break; case 0xb6:prefix##_##b6();break; case 0xb7:prefix##_##b7();break; \
539 case 0xb8:prefix##_##b8();break; case 0xb9:prefix##_##b9();break; case 0xba:prefix##_##ba();break; case 0xbb:prefix##_##bb();break; \
540 case 0xbc:prefix##_##bc();break; case 0xbd:prefix##_##bd();break; case 0xbe:prefix##_##be();break; case 0xbf:prefix##_##bf();break; \
541 case 0xc0:prefix##_##c0();break; case 0xc1:prefix##_##c1();break; case 0xc2:prefix##_##c2();break; case 0xc3:prefix##_##c3();break; \
542 case 0xc4:prefix##_##c4();break; case 0xc5:prefix##_##c5();break; case 0xc6:prefix##_##c6();break; case 0xc7:prefix##_##c7();break; \
543 case 0xc8:prefix##_##c8();break; case 0xc9:prefix##_##c9();break; case 0xca:prefix##_##ca();break; case 0xcb:prefix##_##cb();break; \
544 case 0xcc:prefix##_##cc();break; case 0xcd:prefix##_##cd();break; case 0xce:prefix##_##ce();break; case 0xcf:prefix##_##cf();break; \
545 case 0xd0:prefix##_##d0();break; case 0xd1:prefix##_##d1();break; case 0xd2:prefix##_##d2();break; case 0xd3:prefix##_##d3();break; \
546 case 0xd4:prefix##_##d4();break; case 0xd5:prefix##_##d5();break; case 0xd6:prefix##_##d6();break; case 0xd7:prefix##_##d7();break; \
547 case 0xd8:prefix##_##d8();break; case 0xd9:prefix##_##d9();break; case 0xda:prefix##_##da();break; case 0xdb:prefix##_##db();break; \
548 case 0xdc:prefix##_##dc();break; case 0xdd:prefix##_##dd();break; case 0xde:prefix##_##de();break; case 0xdf:prefix##_##df();break; \
549 case 0xe0:prefix##_##e0();break; case 0xe1:prefix##_##e1();break; case 0xe2:prefix##_##e2();break; case 0xe3:prefix##_##e3();break; \
550 case 0xe4:prefix##_##e4();break; case 0xe5:prefix##_##e5();break; case 0xe6:prefix##_##e6();break; case 0xe7:prefix##_##e7();break; \
551 case 0xe8:prefix##_##e8();break; case 0xe9:prefix##_##e9();break; case 0xea:prefix##_##ea();break; case 0xeb:prefix##_##eb();break; \
552 case 0xec:prefix##_##ec();break; case 0xed:prefix##_##ed();break; case 0xee:prefix##_##ee();break; case 0xef:prefix##_##ef();break; \
553 case 0xf0:prefix##_##f0();break; case 0xf1:prefix##_##f1();break; case 0xf2:prefix##_##f2();break; case 0xf3:prefix##_##f3();break; \
554 case 0xf4:prefix##_##f4();break; case 0xf5:prefix##_##f5();break; case 0xf6:prefix##_##f6();break; case 0xf7:prefix##_##f7();break; \
555 case 0xf8:prefix##_##f8();break; case 0xf9:prefix##_##f9();break; case 0xfa:prefix##_##fa();break; case 0xfb:prefix##_##fb();break; \
556 case 0xfc:prefix##_##fc();break; case 0xfd:prefix##_##fd();break; case 0xfe:prefix##_##fe();break; case 0xff:prefix##_##ff();break; \
557 } \
558 }
559 #else
560 #define EXEC_INLINE EXEC
561 #endif
562
563
564 /***************************************************************
565 * Enter HALT state; write 1 to fake port on first execution
566 ***************************************************************/
567 #define ENTER_HALT { \
568 _PC--; \
569 _HALT = 1; \
570 if( !after_EI ) \
571 z80_burn( z80_ICount ); \
572 }
573
574 /***************************************************************
575 * Leave HALT state; write 0 to fake port
576 ***************************************************************/
577 #define LEAVE_HALT { \
578 if( _HALT ) \
579 { \
580 _HALT = 0; \
581 _PC++; \
582 } \
583 }
584
585 /***************************************************************
586 * Input a byte from given I/O port
587 ***************************************************************/
588 #define IN(port) ((UINT8)cpu_readport16(port))
589
590 /***************************************************************
591 * Output a byte to given I/O port
592 ***************************************************************/
593 #define OUT(port,value) cpu_writeport16(port,value)
594
595 /***************************************************************
596 * Read a byte from given memory location
597 ***************************************************************/
598 #define RM(addr) (UINT8)cpu_readmem16(addr)
599
600 /***************************************************************
601 * Read a word from given memory location
602 ***************************************************************/
RM16(UINT32 addr,PAIR * r)603 static INLINE void RM16( UINT32 addr, PAIR *r )
604 {
605 r->b.l = RM(addr);
606 r->b.h = RM((addr+1)&0xffff);
607 }
608
609 /***************************************************************
610 * Write a byte to given memory location
611 ***************************************************************/
612 #define WM(addr,value) cpu_writemem16(addr,value)
613
614 /***************************************************************
615 * Write a word to given memory location
616 ***************************************************************/
WM16(UINT32 addr,PAIR * r)617 static INLINE void WM16( UINT32 addr, PAIR *r )
618 {
619 WM(addr,r->b.l);
620 WM((addr+1)&0xffff,r->b.h);
621 }
622
623 /***************************************************************
624 * ROP() is identical to RM() except it is used for
625 * reading opcodes. In case of system with memory mapped I/O,
626 * this function can be used to greatly speed up emulation
627 ***************************************************************/
ROP(void)628 static INLINE UINT8 ROP(void)
629 {
630 unsigned pc = _PCD;
631 _PC++;
632 return cpu_readop(pc);
633 }
634
635 /****************************************************************
636 * ARG() is identical to ROP() except it is used
637 * for reading opcode arguments. This difference can be used to
638 * support systems that use different encoding mechanisms for
639 * opcodes and opcode arguments
640 ***************************************************************/
ARG(void)641 static INLINE UINT8 ARG(void)
642 {
643 unsigned pc = _PCD;
644 _PC++;
645 return cpu_readop_arg(pc);
646 }
647
ARG16(void)648 static INLINE UINT32 ARG16(void)
649 {
650 unsigned pc = _PCD;
651 _PC += 2;
652 return cpu_readop_arg(pc) | (cpu_readop_arg((pc+1)&0xffff) << 8);
653 }
654
655 /***************************************************************
656 * Calculate the effective address EA of an opcode using
657 * IX+offset resp. IY+offset addressing.
658 ***************************************************************/
659 #define EAX EA = (UINT32)(UINT16)(_IX+(INT8)ARG())
660 #define EAY EA = (UINT32)(UINT16)(_IY+(INT8)ARG())
661
662 /***************************************************************
663 * POP
664 ***************************************************************/
665 #define POP(DR) { RM16( _SPD, &Z80.DR ); _SP += 2; }
666
667 /***************************************************************
668 * PUSH
669 ***************************************************************/
670 #define PUSH(SR) { _SP -= 2; WM16( _SPD, &Z80.SR ); }
671
672 /***************************************************************
673 * JP
674 ***************************************************************/
675 #if BUSY_LOOP_HACKS
676 #define JP { \
677 unsigned oldpc = _PCD-1; \
678 _PCD = ARG16(); \
679 change_pc16(_PCD); \
680 /* speed up busy loop */ \
681 if( _PCD == oldpc ) \
682 { \
683 if( !after_EI ) \
684 BURNODD( z80_ICount, 1, cc[Z80_TABLE_op][0xc3] ); \
685 } \
686 else \
687 { \
688 UINT8 op = cpu_readop(_PCD); \
689 if( _PCD == oldpc-1 ) \
690 { \
691 /* NOP - JP $-1 or EI - JP $-1 */ \
692 if ( op == 0x00 || op == 0xfb ) \
693 { \
694 if( !after_EI ) \
695 BURNODD( z80_ICount-cc[Z80_TABLE_op][0x00], \
696 2, cc[Z80_TABLE_op][0x00]+cc[Z80_TABLE_op][0xc3]); \
697 } \
698 } \
699 else \
700 /* LD SP,#xxxx - JP $-3 (Galaga) */ \
701 if( _PCD == oldpc-3 && op == 0x31 ) \
702 { \
703 if( !after_EI ) \
704 BURNODD( z80_ICount-cc[Z80_TABLE_op][0x31], \
705 2, cc[Z80_TABLE_op][0x31]+cc[Z80_TABLE_op][0xc3]); \
706 } \
707 } \
708 }
709 #else
710 #define JP { \
711 _PCD = ARG16(); \
712 change_pc16(_PCD); \
713 }
714 #endif
715
716 /***************************************************************
717 * JP_COND
718 ***************************************************************/
719
720 #define JP_COND(cond) \
721 if( cond ) \
722 { \
723 _PCD = ARG16(); \
724 change_pc16(_PCD); \
725 } \
726 else \
727 { \
728 _PC += 2; \
729 }
730
731 /***************************************************************
732 * JR
733 ***************************************************************/
734 #define JR() \
735 { \
736 unsigned oldpc = _PCD-1; \
737 INT8 arg = (INT8)ARG(); /* ARG() also increments _PC */ \
738 _PC += arg; /* so don't do _PC += ARG() */ \
739 change_pc16(_PCD); \
740 /* speed up busy loop */ \
741 if( _PCD == oldpc ) \
742 { \
743 if( !after_EI ) \
744 BURNODD( z80_ICount, 1, cc[Z80_TABLE_op][0x18] ); \
745 } \
746 else \
747 { \
748 UINT8 op = cpu_readop(_PCD); \
749 if( _PCD == oldpc-1 ) \
750 { \
751 /* NOP - JR $-1 or EI - JR $-1 */ \
752 if ( op == 0x00 || op == 0xfb ) \
753 { \
754 if( !after_EI ) \
755 BURNODD( z80_ICount-cc[Z80_TABLE_op][0x00], \
756 2, cc[Z80_TABLE_op][0x00]+cc[Z80_TABLE_op][0x18]); \
757 } \
758 } \
759 else \
760 /* LD SP,#xxxx - JR $-3 */ \
761 if( _PCD == oldpc-3 && op == 0x31 ) \
762 { \
763 if( !after_EI ) \
764 BURNODD( z80_ICount-cc[Z80_TABLE_op][0x31], \
765 2, cc[Z80_TABLE_op][0x31]+cc[Z80_TABLE_op][0x18]); \
766 } \
767 } \
768 }
769
770 /***************************************************************
771 * JR_COND
772 ***************************************************************/
773 #define JR_COND(cond,opcode) \
774 if( cond ) \
775 { \
776 INT8 arg = (INT8)ARG(); /* ARG() also increments _PC */ \
777 _PC += arg; /* so don't do _PC += ARG() */ \
778 CC(ex,opcode); \
779 change_pc16(_PCD); \
780 } \
781 else _PC++; \
782
783 /***************************************************************
784 * CALL
785 ***************************************************************/
786 #define CALL() \
787 EA = ARG16(); \
788 PUSH( PC ); \
789 _PCD = EA; \
790 change_pc16(_PCD)
791
792 /***************************************************************
793 * CALL_COND
794 ***************************************************************/
795 #define CALL_COND(cond,opcode) \
796 if( cond ) \
797 { \
798 EA = ARG16(); \
799 PUSH( PC ); \
800 _PCD = EA; \
801 CC(ex,opcode); \
802 change_pc16(_PCD); \
803 } \
804 else \
805 { \
806 _PC+=2; \
807 }
808
809 /***************************************************************
810 * RET_COND
811 ***************************************************************/
812 #define RET_COND(cond,opcode) \
813 if( cond ) \
814 { \
815 POP(PC); \
816 change_pc16(_PCD); \
817 CC(ex,opcode); \
818 }
819
820 /***************************************************************
821 * RETN
822 ***************************************************************/
823 #define RETN { \
824 LOG(("Z80 #%d RETN IFF1:%d IFF2:%d\n", cpu_getactivecpu(), _IFF1, _IFF2)); \
825 POP(PC); \
826 change_pc16(_PCD); \
827 if( _IFF1 == 0 && _IFF2 == 1 ) \
828 { \
829 _IFF1 = 1; \
830 if( Z80.irq_state != CLEAR_LINE || \
831 Z80.request_irq >= 0 ) \
832 { \
833 LOG(("Z80 #%d RETN takes IRQ\n", \
834 cpu_getactivecpu())); \
835 take_interrupt(); \
836 } \
837 } \
838 else _IFF1 = _IFF2; \
839 }
840
841 /***************************************************************
842 * RETI
843 ***************************************************************/
844 #define RETI { \
845 int device = Z80.service_irq; \
846 POP(PC); \
847 change_pc16(_PCD); \
848 /* according to http://www.msxnet.org/tech/z80-documented.pdf */\
849 /* _IFF1 = _IFF2; */ \
850 if( device >= 0 ) \
851 { \
852 LOG(("Z80 #%d RETI device %d: $%02x\n", \
853 cpu_getactivecpu(), device, Z80.irq[device].irq_param)); \
854 Z80.irq[device].interrupt_reti(Z80.irq[device].irq_param); \
855 } \
856 }
857
858 /***************************************************************
859 * LD R,A
860 ***************************************************************/
861 #define LD_R_A { \
862 _R = _A; \
863 _R2 = _A & 0x80; /* keep bit 7 of R */ \
864 }
865
866 /***************************************************************
867 * LD A,R
868 ***************************************************************/
869 #define LD_A_R { \
870 _A = (_R & 0x7f) | _R2; \
871 _F = (_F & CF) | SZ[_A] | ( _IFF2 << 2 ); \
872 }
873
874 /***************************************************************
875 * LD I,A
876 ***************************************************************/
877 #define LD_I_A { \
878 _I = _A; \
879 }
880
881 /***************************************************************
882 * LD A,I
883 ***************************************************************/
884 #define LD_A_I { \
885 _A = _I; \
886 _F = (_F & CF) | SZ[_A] | ( _IFF2 << 2 ); \
887 }
888
889 /***************************************************************
890 * RST
891 ***************************************************************/
892 #define RST(addr) \
893 PUSH( PC ); \
894 _PCD = addr; \
895 change_pc16(_PCD)
896
897 /***************************************************************
898 * INC r8
899 ***************************************************************/
INC(UINT8 value)900 static INLINE UINT8 INC(UINT8 value)
901 {
902 UINT8 res = value + 1;
903 _F = (_F & CF) | SZHV_inc[res];
904 return (UINT8)res;
905 }
906
907 /***************************************************************
908 * DEC r8
909 ***************************************************************/
DEC(UINT8 value)910 static INLINE UINT8 DEC(UINT8 value)
911 {
912 UINT8 res = value - 1;
913 _F = (_F & CF) | SZHV_dec[res];
914 return res;
915 }
916
917 /***************************************************************
918 * RLCA
919 ***************************************************************/
920 #if Z80_EXACT
921 #define RLCA \
922 _A = (_A << 1) | (_A >> 7); \
923 _F = (_F & (SF | ZF | PF)) | (_A & (YF | XF | CF))
924 #else
925 #define RLCA \
926 _A = (_A << 1) | (_A >> 7); \
927 _F = (_F & (SF | ZF | YF | XF | PF)) | (_A & CF)
928 #endif
929
930 /***************************************************************
931 * RRCA
932 ***************************************************************/
933 #if Z80_EXACT
934 #define RRCA \
935 _F = (_F & (SF | ZF | PF)) | (_A & CF); \
936 _A = (_A >> 1) | (_A << 7); \
937 _F |= (_A & (YF | XF) )
938 #else
939 #define RRCA \
940 _F = (_F & (SF | ZF | YF | XF | PF)) | (_A & CF); \
941 _A = (_A >> 1) | (_A << 7)
942 #endif
943
944 /***************************************************************
945 * RLA
946 ***************************************************************/
947 #if Z80_EXACT
948 #define RLA { \
949 UINT8 res = (_A << 1) | (_F & CF); \
950 UINT8 c = (_A & 0x80) ? CF : 0; \
951 _F = (_F & (SF | ZF | PF)) | c | (res & (YF | XF)); \
952 _A = res; \
953 }
954 #else
955 #define RLA { \
956 UINT8 res = (_A << 1) | (_F & CF); \
957 UINT8 c = (_A & 0x80) ? CF : 0; \
958 _F = (_F & (SF | ZF | YF | XF | PF)) | c; \
959 _A = res; \
960 }
961 #endif
962
963 /***************************************************************
964 * RRA
965 ***************************************************************/
966 #if Z80_EXACT
967 #define RRA { \
968 UINT8 res = (_A >> 1) | (_F << 7); \
969 UINT8 c = (_A & 0x01) ? CF : 0; \
970 _F = (_F & (SF | ZF | PF)) | c | (res & (YF | XF)); \
971 _A = res; \
972 }
973 #else
974 #define RRA { \
975 UINT8 res = (_A >> 1) | (_F << 7); \
976 UINT8 c = (_A & 0x01) ? CF : 0; \
977 _F = (_F & (SF | ZF | YF | XF | PF)) | c; \
978 _A = res; \
979 }
980 #endif
981
982 /***************************************************************
983 * RRD
984 ***************************************************************/
985 #define RRD { \
986 UINT8 n = RM(_HL); \
987 WM( _HL, (n >> 4) | (_A << 4) ); \
988 _A = (_A & 0xf0) | (n & 0x0f); \
989 _F = (_F & CF) | SZP[_A]; \
990 }
991
992 /***************************************************************
993 * RLD
994 ***************************************************************/
995 #define RLD { \
996 UINT8 n = RM(_HL); \
997 WM( _HL, (n << 4) | (_A & 0x0f) ); \
998 _A = (_A & 0xf0) | (n >> 4); \
999 _F = (_F & CF) | SZP[_A]; \
1000 }
1001
1002 /***************************************************************
1003 * ADD A,n
1004 ***************************************************************/
1005 #ifdef X86_ASM
1006 #if Z80_EXACT
1007 #define ADD(value) \
1008 asm ( \
1009 " addb %2,%0 \n" \
1010 " lahf \n" \
1011 " setob %1 \n" /* al = 1 if overflow */ \
1012 " addb %1,%1 \n" \
1013 " addb %1,%1 \n" /* shift to P/V bit position */ \
1014 " andb $0xd1,%%ah \n" /* sign, zero, half carry, carry */ \
1015 " orb %%ah,%1 \n" \
1016 " movb %0,%%ah \n" /* get result */ \
1017 " andb $0x28,%%ah \n" /* maks flags 5+3 */ \
1018 " orb %%ah,%1 \n" /* put them into flags */ \
1019 :"=q" (_A), "=q" (_F) \
1020 :"q" (value), "1" (_F), "0" (_A) \
1021 )
1022 #else
1023 #define ADD(value) \
1024 asm ( \
1025 " addb %2,%0 \n" \
1026 " lahf \n" \
1027 " setob %1 \n" /* al = 1 if overflow */ \
1028 " addb %1,%1 \n" \
1029 " addb %1,%1 \n" /* shift to P/V bit position */ \
1030 " andb $0xd1,%%ah \n" /* sign, zero, half carry, carry */ \
1031 " orb %%ah,%1 \n" \
1032 :"=q" (_A), "=q" (_F) \
1033 :"q" (value), "1" (_F), "0" (_A) \
1034 )
1035 #endif
1036 #else
1037 #if BIG_FLAGS_ARRAY
1038 #define ADD(value) \
1039 { \
1040 UINT32 ah = _AFD & 0xff00; \
1041 UINT32 res = (UINT8)((ah >> 8) + value); \
1042 _F = SZHVC_add[ah | res]; \
1043 _A = res; \
1044 }
1045 #else
1046 #define ADD(value) \
1047 { \
1048 unsigned val = value; \
1049 unsigned res = _A + val; \
1050 _F = SZ[(UINT8)res] | ((res >> 8) & CF) | \
1051 ((_A ^ res ^ val) & HF) | \
1052 (((val ^ _A ^ 0x80) & (val ^ res) & 0x80) >> 5); \
1053 _A = (UINT8)res; \
1054 }
1055 #endif
1056 #endif
1057
1058 /***************************************************************
1059 * ADC A,n
1060 ***************************************************************/
1061 #ifdef X86_ASM
1062 #if Z80_EXACT
1063 #define ADC(value) \
1064 asm ( \
1065 " shrb $1,%1 \n" \
1066 " adcb %2,%0 \n" \
1067 " lahf \n" \
1068 " setob %1 \n" /* al = 1 if overflow */ \
1069 " addb %1,%1 \n" /* shift to P/V bit position */ \
1070 " addb %1,%1 \n" \
1071 " andb $0xd1,%%ah \n" /* sign, zero, half carry, carry */ \
1072 " orb %%ah,%1 \n" /* combine with P/V */ \
1073 " movb %0,%%ah \n" /* get result */ \
1074 " andb $0x28,%%ah \n" /* maks flags 5+3 */ \
1075 " orb %%ah,%1 \n" /* put them into flags */ \
1076 :"=q" (_A), "=q" (_F) \
1077 :"q" (value), "1" (_F), "0" (_A) \
1078 )
1079 #else
1080 #define ADC(value) \
1081 asm ( \
1082 " shrb $1,%1 \n" \
1083 " adcb %2,%0 \n" \
1084 " lahf \n" \
1085 " setob %1 \n" /* al = 1 if overflow */ \
1086 " addb %1,%1 \n" /* shift to P/V bit position */ \
1087 " addb %1,%1 \n" \
1088 " andb $0xd1,%%ah \n" /* sign, zero, half carry, carry */ \
1089 " orb %%ah,%1 \n" /* combine with P/V */ \
1090 :"=q" (_A), "=q" (_F) \
1091 :"q" (value), "1" (_F), "0" (_A) \
1092 )
1093 #endif
1094 #else
1095 #if BIG_FLAGS_ARRAY
1096 #define ADC(value) \
1097 { \
1098 UINT32 ah = _AFD & 0xff00, c = _AFD & 1; \
1099 UINT32 res = (UINT8)((ah >> 8) + value + c); \
1100 _F = SZHVC_add[(c << 16) | ah | res]; \
1101 _A = res; \
1102 }
1103 #else
1104 #define ADC(value) \
1105 { \
1106 unsigned val = value; \
1107 unsigned res = _A + val + (_F & CF); \
1108 _F = SZ[res & 0xff] | ((res >> 8) & CF) | \
1109 ((_A ^ res ^ val) & HF) | \
1110 (((val ^ _A ^ 0x80) & (val ^ res) & 0x80) >> 5); \
1111 _A = res; \
1112 }
1113 #endif
1114 #endif
1115
1116 /***************************************************************
1117 * SUB n
1118 ***************************************************************/
1119 #ifdef X86_ASM
1120 #if Z80_EXACT
1121 #define SUB(value) \
1122 asm ( \
1123 " subb %2,%0 \n" \
1124 " lahf \n" \
1125 " setob %1 \n" /* al = 1 if overflow */ \
1126 " stc \n" /* prepare to set N flag */ \
1127 " adcb %1,%1 \n" /* shift to P/V bit position */ \
1128 " addb %1,%1 \n" \
1129 " andb $0xd1,%%ah \n" /* sign, zero, half carry, carry */ \
1130 " orb %%ah,%1 \n" /* combine with P/V */ \
1131 " movb %0,%%ah \n" /* get result */ \
1132 " andb $0x28,%%ah \n" /* maks flags 5+3 */ \
1133 " orb %%ah,%1 \n" /* put them into flags */ \
1134 :"=q" (_A), "=q" (_F) \
1135 :"q" (value), "1" (_F), "0" (_A) \
1136 )
1137 #else
1138 #define SUB(value) \
1139 asm ( \
1140 " subb %2,%0 \n" \
1141 " lahf \n" \
1142 " setob %1 \n" /* al = 1 if overflow */ \
1143 " stc \n" /* prepare to set N flag */ \
1144 " adcb %1,%1 \n" /* shift to P/V bit position */ \
1145 " addb %1,%1 \n" \
1146 " andb $0xd1,%%ah \n" /* sign, zero, half carry, carry */ \
1147 " orb %%ah,%1 \n" /* combine with P/V */ \
1148 :"=q" (_A), "=q" (_F) \
1149 :"q" (value), "1" (_F), "0" (_A) \
1150 )
1151 #endif
1152 #else
1153 #if BIG_FLAGS_ARRAY
1154 #define SUB(value) \
1155 { \
1156 UINT32 ah = _AFD & 0xff00; \
1157 UINT32 res = (UINT8)((ah >> 8) - value); \
1158 _F = SZHVC_sub[ah | res]; \
1159 _A = res; \
1160 }
1161 #else
1162 #define SUB(value) \
1163 { \
1164 unsigned val = value; \
1165 unsigned res = _A - val; \
1166 _F = SZ[res & 0xff] | ((res >> 8) & CF) | NF | \
1167 ((_A ^ res ^ val) & HF) | \
1168 (((val ^ _A) & (_A ^ res) & 0x80) >> 5); \
1169 _A = res; \
1170 }
1171 #endif
1172 #endif
1173
1174 /***************************************************************
1175 * SBC A,n
1176 ***************************************************************/
1177 #ifdef X86_ASM
1178 #if Z80_EXACT
1179 #define SBC(value) \
1180 asm ( \
1181 " shrb $1,%1 \n" \
1182 " sbbb %2,%0 \n" \
1183 " lahf \n" \
1184 " setob %1 \n" /* al = 1 if overflow */ \
1185 " stc \n" /* prepare to set N flag */ \
1186 " adcb %1,%1 \n" /* shift to P/V bit position */ \
1187 " addb %1,%1 \n" \
1188 " andb $0xd1,%%ah \n" /* sign, zero, half carry, carry */ \
1189 " orb %%ah,%1 \n" /* combine with P/V */ \
1190 " movb %0,%%ah \n" /* get result */ \
1191 " andb $0x28,%%ah \n" /* maks flags 5+3 */ \
1192 " orb %%ah,%1 \n" /* put them into flags */ \
1193 :"=q" (_A), "=q" (_F) \
1194 :"q" (value), "1" (_F), "0" (_A) \
1195 )
1196 #else
1197 #define SBC(value) \
1198 asm ( \
1199 " shrb $1,%1 \n" \
1200 " sbbb %2,%0 \n" \
1201 " lahf \n" \
1202 " setob %1 \n" /* al = 1 if overflow */ \
1203 " stc \n" /* prepare to set N flag */ \
1204 " adcb %1,%1 \n" /* shift to P/V bit position */ \
1205 " addb %1,%1 \n" \
1206 " andb $0xd1,%%ah \n" /* sign, zero, half carry, carry */ \
1207 " orb %%ah,%1 \n" /* combine with P/V */ \
1208 :"=q" (_A), "=q" (_F) \
1209 :"q" (value), "1" (_F), "0" (_A) \
1210 )
1211 #endif
1212 #else
1213 #if BIG_FLAGS_ARRAY
1214 #define SBC(value) \
1215 { \
1216 UINT32 ah = _AFD & 0xff00, c = _AFD & 1; \
1217 UINT32 res = (UINT8)((ah >> 8) - value - c); \
1218 _F = SZHVC_sub[(c<<16) | ah | res]; \
1219 _A = res; \
1220 }
1221 #else
1222 #define SBC(value) \
1223 { \
1224 unsigned val = value; \
1225 unsigned res = _A - val - (_F & CF); \
1226 _F = SZ[res & 0xff] | ((res >> 8) & CF) | NF | \
1227 ((_A ^ res ^ val) & HF) | \
1228 (((val ^ _A) & (_A ^ res) & 0x80) >> 5); \
1229 _A = res; \
1230 }
1231 #endif
1232 #endif
1233
1234 /***************************************************************
1235 * NEG
1236 ***************************************************************/
1237 #define NEG { \
1238 UINT8 value = _A; \
1239 _A = 0; \
1240 SUB(value); \
1241 }
1242
1243 /***************************************************************
1244 * DAA
1245 ***************************************************************/
1246 #define DAA { \
1247 UINT8 cf, nf, hf, lo, hi, diff; \
1248 cf = _F & CF; \
1249 nf = _F & NF; \
1250 hf = _F & HF; \
1251 lo = _A & 15; \
1252 hi = _A / 16; \
1253 \
1254 if (cf) \
1255 { \
1256 diff = (lo <= 9 && !hf) ? 0x60 : 0x66; \
1257 } \
1258 else \
1259 { \
1260 if (lo >= 10) \
1261 { \
1262 diff = hi <= 8 ? 0x06 : 0x66; \
1263 } \
1264 else \
1265 { \
1266 if (hi >= 10) \
1267 { \
1268 diff = hf ? 0x66 : 0x60; \
1269 } \
1270 else \
1271 { \
1272 diff = hf ? 0x06 : 0x00; \
1273 } \
1274 } \
1275 } \
1276 if (nf) _A -= diff; \
1277 else _A += diff; \
1278 \
1279 _F = SZP[_A] | (_F & NF); \
1280 if (cf || (lo <= 9 ? hi >= 10 : hi >= 9)) _F |= CF; \
1281 if (nf ? hf && lo <= 5 : lo >= 10) _F |= HF; \
1282 }
1283
1284 /***************************************************************
1285 * AND n
1286 ***************************************************************/
1287 #define AND(value) \
1288 _A &= value; \
1289 _F = SZP[_A] | HF
1290
1291 /***************************************************************
1292 * OR n
1293 ***************************************************************/
1294 #define OR(value) \
1295 _A |= value; \
1296 _F = SZP[_A]
1297
1298 /***************************************************************
1299 * XOR n
1300 ***************************************************************/
1301 #define XOR(value) \
1302 _A ^= value; \
1303 _F = SZP[_A]
1304
1305 /***************************************************************
1306 * CP n
1307 ***************************************************************/
1308 #ifdef X86_ASM
1309 #if Z80_EXACT
1310 #define CP(value) \
1311 asm ( \
1312 " cmpb %2,%0 \n" \
1313 " lahf \n" \
1314 " setob %1 \n" /* al = 1 if overflow */ \
1315 " stc \n" /* prepare to set N flag */ \
1316 " adcb %1,%1 \n" /* shift to P/V bit position */ \
1317 " addb %1,%1 \n" \
1318 " andb $0xd1,%%ah \n" /* sign, zero, half carry, carry */ \
1319 " orb %%ah,%1 \n" /* combine with P/V */ \
1320 " movb %2,%%ah \n" /* get result */ \
1321 " andb $0x28,%%ah \n" /* maks flags 5+3 */ \
1322 " orb %%ah,%1 \n" /* put them into flags */ \
1323 :"=q" (_A), "=q" (_F) \
1324 :"q" (value), "1" (_F), "0" (_A) \
1325 )
1326 #else
1327 #define CP(value) \
1328 asm ( \
1329 " cmpb %2,%0 \n" \
1330 " lahf \n" \
1331 " setob %1 \n" /* al = 1 if overflow */ \
1332 " stc \n" /* prepare to set N flag */ \
1333 " adcb %1,%1 \n" /* shift to P/V bit position */ \
1334 " addb %1,%1 \n" \
1335 " andb $0xd1,%%ah \n" /* sign, zero, half carry, carry */ \
1336 " orb %%ah,%1 \n" /* combine with P/V */ \
1337 :"=q" (_A), "=q" (_F) \
1338 :"q" (value), "1" (_F), "0" (_A) \
1339 )
1340 #endif
1341 #else
1342 #if BIG_FLAGS_ARRAY
1343 #define CP(value) \
1344 { \
1345 unsigned val = value; \
1346 UINT32 ah = _AFD & 0xff00; \
1347 UINT32 res = (UINT8)((ah >> 8) - val); \
1348 _F = (SZHVC_sub[ah | res] & ~(YF | XF)) | \
1349 (val & (YF | XF)); \
1350 }
1351 #else
1352 #define CP(value) \
1353 { \
1354 unsigned val = value; \
1355 unsigned res = _A - val; \
1356 _F = (SZ[res & 0xff] & (SF | ZF)) | \
1357 (val & (YF | XF)) | ((res >> 8) & CF) | NF | \
1358 ((_A ^ res ^ val) & HF) | \
1359 ((((val ^ _A) & (_A ^ res)) >> 5) & VF); \
1360 }
1361 #endif
1362 #endif
1363
1364 /***************************************************************
1365 * EX AF,AF'
1366 ***************************************************************/
1367 #define EX_AF { \
1368 PAIR tmp; \
1369 tmp = Z80.AF; Z80.AF = Z80.AF2; Z80.AF2 = tmp; \
1370 }
1371
1372 /***************************************************************
1373 * EX DE,HL
1374 ***************************************************************/
1375 #define EX_DE_HL { \
1376 PAIR tmp; \
1377 tmp = Z80.DE; Z80.DE = Z80.HL; Z80.HL = tmp; \
1378 }
1379
1380 /***************************************************************
1381 * EXX
1382 ***************************************************************/
1383 #define EXX { \
1384 PAIR tmp; \
1385 tmp = Z80.BC; Z80.BC = Z80.BC2; Z80.BC2 = tmp; \
1386 tmp = Z80.DE; Z80.DE = Z80.DE2; Z80.DE2 = tmp; \
1387 tmp = Z80.HL; Z80.HL = Z80.HL2; Z80.HL2 = tmp; \
1388 }
1389
1390 /***************************************************************
1391 * EX (SP),r16
1392 ***************************************************************/
1393 #define EXSP(DR) \
1394 { \
1395 PAIR tmp = { { 0, 0, 0, 0 } }; \
1396 RM16( _SPD, &tmp ); \
1397 WM16( _SPD, &Z80.DR ); \
1398 Z80.DR = tmp; \
1399 }
1400
1401
1402 /***************************************************************
1403 * ADD16
1404 ***************************************************************/
1405 #ifdef X86_ASM
1406 #if Z80_EXACT
1407 #define ADD16(DR,SR) \
1408 asm ( \
1409 " andb $0xc4,%1 \n" \
1410 " addb %%dl,%%cl \n" \
1411 " adcb %%dh,%%ch \n" \
1412 " lahf \n" \
1413 " andb $0x11,%%ah \n" \
1414 " orb %%ah,%1 \n" \
1415 " movb %%ch,%%ah \n" /* get result MSB */ \
1416 " andb $0x28,%%ah \n" /* maks flags 5+3 */ \
1417 " orb %%ah,%1 \n" /* put them into flags */ \
1418 :"=c" (Z80.DR.d), "=q" (_F) \
1419 :"0" (Z80.DR.d), "1" (_F), "d" (Z80.SR.d) \
1420 )
1421 #else
1422 #define ADD16(DR,SR) \
1423 asm ( \
1424 " andb $0xc4,%1 \n" \
1425 " addb %%dl,%%cl \n" \
1426 " adcb %%dh,%%ch \n" \
1427 " lahf \n" \
1428 " andb $0x11,%%ah \n" \
1429 " orb %%ah,%1 \n" \
1430 :"=c" (Z80.DR.d), "=q" (_F) \
1431 :"0" (Z80.DR.d), "1" (_F), "d" (Z80.SR.d) \
1432 )
1433 #endif
1434 #else
1435 #define ADD16(DR,SR) \
1436 { \
1437 UINT32 res = Z80.DR.d + Z80.SR.d; \
1438 _F = (_F & (SF | ZF | VF)) | \
1439 (((Z80.DR.d ^ res ^ Z80.SR.d) >> 8) & HF) | \
1440 ((res >> 16) & CF) | ((res >> 8) & (YF | XF)); \
1441 Z80.DR.w.l = (UINT16)res; \
1442 }
1443 #endif
1444
1445 /***************************************************************
1446 * ADC r16,r16
1447 ***************************************************************/
1448 #ifdef X86_ASM
1449 #if Z80_EXACT
1450 #define ADC16(Reg) \
1451 asm ( \
1452 " shrb $1,%1 \n" \
1453 " adcb %%dl,%%cl \n" \
1454 " lahf \n" \
1455 " movb %%ah,%%dl \n" \
1456 " adcb %%dh,%%ch \n" \
1457 " lahf \n" \
1458 " setob %1 \n" \
1459 " orb $0xbf,%%dl \n" /* set all but zero */ \
1460 " addb %1,%1 \n" \
1461 " andb $0xd1,%%ah \n" /* sign,zero,half carry and carry */\
1462 " addb %1,%1 \n" \
1463 " orb %%ah,%1 \n" /* overflow into P/V */ \
1464 " andb %%dl,%1 \n" /* mask zero */ \
1465 " movb %%ch,%%ah \n" /* get result MSB */ \
1466 " andb $0x28,%%ah \n" /* maks flags 5+3 */ \
1467 " orb %%ah,%1 \n" /* put them into flags */ \
1468 :"=c" (_HLD), "=q" (_F) \
1469 :"0" (_HLD), "1" (_F), "d" (Z80.Reg.d) \
1470 )
1471 #else
1472 #define ADC16(Reg) \
1473 asm ( \
1474 " shrb $1,%1 \n" \
1475 " adcb %%dl,%%cl \n" \
1476 " lahf \n" \
1477 " movb %%ah,%%dl \n" \
1478 " adcb %%dh,%%ch \n" \
1479 " lahf \n" \
1480 " setob %1 \n" \
1481 " orb $0xbf,%%dl \n" /* set all but zero */ \
1482 " addb %1,%1 \n" \
1483 " andb $0xd1,%%ah \n" /* sign,zero,half carry and carry */\
1484 " addb %1,%1 \n" \
1485 " orb %%ah,%1 \n" /* overflow into P/V */ \
1486 " andb %%dl,%1 \n" /* mask zero */ \
1487 :"=c" (_HLD), "=q" (_F) \
1488 :"0" (_HLD), "1" (_F), "d" (Z80.Reg.d) \
1489 )
1490 #endif
1491 #else
1492 #define ADC16(Reg) \
1493 { \
1494 UINT32 res = _HLD + Z80.Reg.d + (_F & CF); \
1495 _F = (((_HLD ^ res ^ Z80.Reg.d) >> 8) & HF) | \
1496 ((res >> 16) & CF) | \
1497 ((res >> 8) & (SF | YF | XF)) | \
1498 ((res & 0xffff) ? 0 : ZF) | \
1499 (((Z80.Reg.d ^ _HLD ^ 0x8000) & (Z80.Reg.d ^ res) & 0x8000) >> 13); \
1500 _HL = (UINT16)res; \
1501 }
1502 #endif
1503
1504 /***************************************************************
1505 * SBC r16,r16
1506 ***************************************************************/
1507 #ifdef X86_ASM
1508 #if Z80_EXACT
1509 #define SBC16(Reg) \
1510 asm ( \
1511 " shrb $1,%1 \n" \
1512 " sbbb %%dl,%%cl \n" \
1513 " lahf \n" \
1514 " movb %%ah,%%dl \n" \
1515 " sbbb %%dh,%%ch \n" \
1516 " lahf \n" \
1517 " setob %1 \n" \
1518 " orb $0xbf,%%dl \n" /* set all but zero */ \
1519 " stc \n" \
1520 " adcb %1,%1 \n" \
1521 " andb $0xd1,%%ah \n" /* sign,zero,half carry and carry */\
1522 " addb %1,%1 \n" \
1523 " orb %%ah,%1 \n" /* overflow into P/V */ \
1524 " andb %%dl,%1 \n" /* mask zero */ \
1525 " movb %%ch,%%ah \n" /* get result MSB */ \
1526 " andb $0x28,%%ah \n" /* maks flags 5+3 */ \
1527 " orb %%ah,%1 \n" /* put them into flags */ \
1528 :"=c" (_HLD), "=q" (_F) \
1529 :"0" (_HLD), "1" (_F), "d" (Z80.Reg.d) \
1530 )
1531 #else
1532 #define SBC16(Reg) \
1533 asm ( \
1534 " shrb $1,%1 \n" \
1535 " sbbb %%dl,%%cl \n" \
1536 " lahf \n" \
1537 " movb %%ah,%%dl \n" \
1538 " sbbb %%dh,%%ch \n" \
1539 " lahf \n" \
1540 " setob %1 \n" \
1541 " orb $0xbf,%%dl \n" /* set all but zero */ \
1542 " stc \n" \
1543 " adcb %1,%1 \n" \
1544 " andb $0xd1,%%ah \n" /* sign,zero,half carry and carry */\
1545 " addb %1,%1 \n" \
1546 " orb %%ah,%1 \n" /* overflow into P/V */ \
1547 " andb %%dl,%1 \n" /* mask zero */ \
1548 :"=c" (_HLD), "=q" (_F) \
1549 :"0" (_HLD), "1" (_F), "d" (Z80.Reg.d) \
1550 )
1551 #endif
1552 #else
1553 #define SBC16(Reg) \
1554 { \
1555 UINT32 res = _HLD - Z80.Reg.d - (_F & CF); \
1556 _F = (((_HLD ^ res ^ Z80.Reg.d) >> 8) & HF) | NF | \
1557 ((res >> 16) & CF) | \
1558 ((res >> 8) & (SF | YF | XF)) | \
1559 ((res & 0xffff) ? 0 : ZF) | \
1560 (((Z80.Reg.d ^ _HLD) & (_HLD ^ res) &0x8000) >> 13); \
1561 _HL = (UINT16)res; \
1562 }
1563 #endif
1564
1565 /***************************************************************
1566 * RLC r8
1567 ***************************************************************/
RLC(UINT8 value)1568 static INLINE UINT8 RLC(UINT8 value)
1569 {
1570 unsigned res = value;
1571 unsigned c = (res & 0x80) ? CF : 0;
1572 res = ((res << 1) | (res >> 7)) & 0xff;
1573 _F = SZP[res] | c;
1574 return res;
1575 }
1576
1577 /***************************************************************
1578 * RRC r8
1579 ***************************************************************/
RRC(UINT8 value)1580 static INLINE UINT8 RRC(UINT8 value)
1581 {
1582 unsigned res = value;
1583 unsigned c = (res & 0x01) ? CF : 0;
1584 res = ((res >> 1) | (res << 7)) & 0xff;
1585 _F = SZP[res] | c;
1586 return res;
1587 }
1588
1589 /***************************************************************
1590 * RL r8
1591 ***************************************************************/
RL(UINT8 value)1592 static INLINE UINT8 RL(UINT8 value)
1593 {
1594 unsigned res = value;
1595 unsigned c = (res & 0x80) ? CF : 0;
1596 res = ((res << 1) | (_F & CF)) & 0xff;
1597 _F = SZP[res] | c;
1598 return res;
1599 }
1600
1601 /***************************************************************
1602 * RR r8
1603 ***************************************************************/
RR(UINT8 value)1604 static INLINE UINT8 RR(UINT8 value)
1605 {
1606 unsigned res = value;
1607 unsigned c = (res & 0x01) ? CF : 0;
1608 res = ((res >> 1) | (_F << 7)) & 0xff;
1609 _F = SZP[res] | c;
1610 return res;
1611 }
1612
1613 /***************************************************************
1614 * SLA r8
1615 ***************************************************************/
SLA(UINT8 value)1616 static INLINE UINT8 SLA(UINT8 value)
1617 {
1618 unsigned res = value;
1619 unsigned c = (res & 0x80) ? CF : 0;
1620 res = (res << 1) & 0xff;
1621 _F = SZP[res] | c;
1622 return res;
1623 }
1624
1625 /***************************************************************
1626 * SRA r8
1627 ***************************************************************/
SRA(UINT8 value)1628 static INLINE UINT8 SRA(UINT8 value)
1629 {
1630 unsigned res = value;
1631 unsigned c = (res & 0x01) ? CF : 0;
1632 res = ((res >> 1) | (res & 0x80)) & 0xff;
1633 _F = SZP[res] | c;
1634 return res;
1635 }
1636
1637 /***************************************************************
1638 * SLL r8
1639 ***************************************************************/
SLL(UINT8 value)1640 static INLINE UINT8 SLL(UINT8 value)
1641 {
1642 unsigned res = value;
1643 unsigned c = (res & 0x80) ? CF : 0;
1644 res = ((res << 1) | 0x01) & 0xff;
1645 _F = SZP[res] | c;
1646 return res;
1647 }
1648
1649 /***************************************************************
1650 * SRL r8
1651 ***************************************************************/
SRL(UINT8 value)1652 static INLINE UINT8 SRL(UINT8 value)
1653 {
1654 unsigned res = value;
1655 unsigned c = (res & 0x01) ? CF : 0;
1656 res = (res >> 1) & 0xff;
1657 _F = SZP[res] | c;
1658 return res;
1659 }
1660
1661 /***************************************************************
1662 * BIT bit,r8
1663 ***************************************************************/
1664 #undef BIT
1665 #define BIT(bit,reg) \
1666 _F = (_F & CF) | HF | SZ_BIT[reg & (1<<bit)]
1667
1668 /***************************************************************
1669 * BIT bit,(IX/Y+o)
1670 ***************************************************************/
1671 #if Z80_EXACT
1672 #define BIT_XY(bit,reg) \
1673 _F = (_F & CF) | HF | (SZ_BIT[reg & (1<<bit)] & ~(YF|XF)) | ((EA>>8) & (YF|XF))
1674 #else
1675 #define BIT_XY BIT
1676 #endif
1677
1678 /***************************************************************
1679 * RES bit,r8
1680 ***************************************************************/
RES(UINT8 bit,UINT8 value)1681 static INLINE UINT8 RES(UINT8 bit, UINT8 value)
1682 {
1683 return value & ~(1<<bit);
1684 }
1685
1686 /***************************************************************
1687 * SET bit,r8
1688 ***************************************************************/
SET(UINT8 bit,UINT8 value)1689 static INLINE UINT8 SET(UINT8 bit, UINT8 value)
1690 {
1691 return value | (1<<bit);
1692 }
1693
1694 /***************************************************************
1695 * LDI
1696 ***************************************************************/
1697 #if Z80_EXACT
1698 #define LDI { \
1699 UINT8 io = RM(_HL); \
1700 WM( _DE, io ); \
1701 _F &= SF | ZF | CF; \
1702 if( (_A + io) & 0x02 ) _F |= YF; /* bit 1 -> flag 5 */ \
1703 if( (_A + io) & 0x08 ) _F |= XF; /* bit 3 -> flag 3 */ \
1704 _HL++; _DE++; _BC--; \
1705 if( _BC ) _F |= VF; \
1706 }
1707 #else
1708 #define LDI { \
1709 WM( _DE, RM(_HL) ); \
1710 _F &= SF | ZF | YF | XF | CF; \
1711 _HL++; _DE++; _BC--; \
1712 if( _BC ) _F |= VF; \
1713 }
1714 #endif
1715
1716 /***************************************************************
1717 * CPI
1718 ***************************************************************/
1719 #if Z80_EXACT
1720 #define CPI { \
1721 UINT8 val = RM(_HL); \
1722 UINT8 res = _A - val; \
1723 _HL++; _BC--; \
1724 _F = (_F & CF) | (SZ[res] & ~(YF|XF)) | ((_A ^ val ^ res) & HF) | NF; \
1725 if( _F & HF ) res -= 1; \
1726 if( res & 0x02 ) _F |= YF; /* bit 1 -> flag 5 */ \
1727 if( res & 0x08 ) _F |= XF; /* bit 3 -> flag 3 */ \
1728 if( _BC ) _F |= VF; \
1729 }
1730 #else
1731 #define CPI { \
1732 UINT8 val = RM(_HL); \
1733 UINT8 res = _A - val; \
1734 _HL++; _BC--; \
1735 _F = (_F & CF) | SZ[res] | ((_A ^ val ^ res) & HF) | NF; \
1736 if( _BC ) _F |= VF; \
1737 }
1738 #endif
1739
1740 /***************************************************************
1741 * INI
1742 ***************************************************************/
1743 #if Z80_EXACT
1744 #define INI { \
1745 unsigned t; \
1746 UINT8 io = IN(_BC); \
1747 _B--; \
1748 WM( _HL, io ); \
1749 _HL++; \
1750 _F = SZ[_B]; \
1751 t = (unsigned)((_C + 1) & 0xff) + (unsigned)io; \
1752 if( io & SF ) _F |= NF; \
1753 if( t & 0x100 ) _F |= HF | CF; \
1754 _F |= SZP[(UINT8)(t & 0x07) ^ _B] & PF; \
1755 }
1756 #else
1757 #define INI { \
1758 _B--; \
1759 WM( _HL, IN(_BC) ); \
1760 _HL++; \
1761 _F = (_B) ? NF : NF | ZF; \
1762 }
1763 #endif
1764
1765 /***************************************************************
1766 * OUTI
1767 ***************************************************************/
1768 #if Z80_EXACT
1769 #define OUTI { \
1770 unsigned t; \
1771 UINT8 io = RM(_HL); \
1772 _B--; \
1773 OUT( _BC, io ); \
1774 _HL++; \
1775 _F = SZ[_B]; \
1776 t = (unsigned)_L + (unsigned)io; \
1777 if( io & SF ) _F |= NF; \
1778 if( t & 0x100 ) _F |= HF | CF; \
1779 _F |= SZP[(UINT8)(t & 0x07) ^ _B] & PF; \
1780 }
1781 #else
1782 #define OUTI { \
1783 _B--; \
1784 OUT( _BC, RM(_HL) ); \
1785 _HL++; \
1786 _F = (_B) ? NF : NF | ZF; \
1787 }
1788 #endif
1789
1790 /***************************************************************
1791 * LDD
1792 ***************************************************************/
1793 #if Z80_EXACT
1794 #define LDD { \
1795 UINT8 io = RM(_HL); \
1796 WM( _DE, io ); \
1797 _F &= SF | ZF | CF; \
1798 if( (_A + io) & 0x02 ) _F |= YF; /* bit 1 -> flag 5 */ \
1799 if( (_A + io) & 0x08 ) _F |= XF; /* bit 3 -> flag 3 */ \
1800 _HL--; _DE--; _BC--; \
1801 if( _BC ) _F |= VF; \
1802 }
1803 #else
1804 #define LDD { \
1805 WM( _DE, RM(_HL) ); \
1806 _F &= SF | ZF | YF | XF | CF; \
1807 _HL--; _DE--; _BC--; \
1808 if( _BC ) _F |= VF; \
1809 }
1810 #endif
1811
1812 /***************************************************************
1813 * CPD
1814 ***************************************************************/
1815 #if Z80_EXACT
1816 #define CPD { \
1817 UINT8 val = RM(_HL); \
1818 UINT8 res = _A - val; \
1819 _HL--; _BC--; \
1820 _F = (_F & CF) | (SZ[res] & ~(YF|XF)) | ((_A ^ val ^ res) & HF) | NF; \
1821 if( _F & HF ) res -= 1; \
1822 if( res & 0x02 ) _F |= YF; /* bit 1 -> flag 5 */ \
1823 if( res & 0x08 ) _F |= XF; /* bit 3 -> flag 3 */ \
1824 if( _BC ) _F |= VF; \
1825 }
1826 #else
1827 #define CPD { \
1828 UINT8 val = RM(_HL); \
1829 UINT8 res = _A - val; \
1830 _HL--; _BC--; \
1831 _F = (_F & CF) | SZ[res] | ((_A ^ val ^ res) & HF) | NF; \
1832 if( _BC ) _F |= VF; \
1833 }
1834 #endif
1835
1836 /***************************************************************
1837 * IND
1838 ***************************************************************/
1839 #if Z80_EXACT
1840 #define IND { \
1841 unsigned t; \
1842 UINT8 io = IN(_BC); \
1843 _B--; \
1844 WM( _HL, io ); \
1845 _HL--; \
1846 _F = SZ[_B]; \
1847 t = ((unsigned)(_C - 1) & 0xff) + (unsigned)io; \
1848 if( io & SF ) _F |= NF; \
1849 if( t & 0x100 ) _F |= HF | CF; \
1850 _F |= SZP[(UINT8)(t & 0x07) ^ _B] & PF; \
1851 }
1852 #else
1853 #define IND { \
1854 _B--; \
1855 WM( _HL, IN(_BC) ); \
1856 _HL--; \
1857 _F = (_B) ? NF : NF | ZF; \
1858 }
1859 #endif
1860
1861 /***************************************************************
1862 * OUTD
1863 ***************************************************************/
1864 #if Z80_EXACT
1865 #define OUTD { \
1866 unsigned t; \
1867 UINT8 io = RM(_HL); \
1868 _B--; \
1869 OUT( _BC, io ); \
1870 _HL--; \
1871 _F = SZ[_B]; \
1872 t = (unsigned)_L + (unsigned)io; \
1873 if( io & SF ) _F |= NF; \
1874 if( t & 0x100 ) _F |= HF | CF; \
1875 _F |= SZP[(UINT8)(t & 0x07) ^ _B] & PF; \
1876 }
1877 #else
1878 #define OUTD { \
1879 _B--; \
1880 OUT( _BC, RM(_HL) ); \
1881 _HL--; \
1882 _F = (_B) ? NF : NF | ZF; \
1883 }
1884 #endif
1885
1886 /***************************************************************
1887 * LDIR
1888 ***************************************************************/
1889 #define LDIR \
1890 LDI; \
1891 if( _BC ) \
1892 { \
1893 _PC -= 2; \
1894 CC(ex,0xb0); \
1895 }
1896
1897 /***************************************************************
1898 * CPIR
1899 ***************************************************************/
1900 #define CPIR \
1901 CPI; \
1902 if( _BC && !(_F & ZF) ) \
1903 { \
1904 _PC -= 2; \
1905 CC(ex,0xb1); \
1906 }
1907
1908 /***************************************************************
1909 * INIR
1910 ***************************************************************/
1911 #define INIR \
1912 INI; \
1913 if( _B ) \
1914 { \
1915 _PC -= 2; \
1916 CC(ex,0xb2); \
1917 }
1918
1919 /***************************************************************
1920 * OTIR
1921 ***************************************************************/
1922 #define OTIR \
1923 OUTI; \
1924 if( _B ) \
1925 { \
1926 _PC -= 2; \
1927 CC(ex,0xb3); \
1928 }
1929
1930 /***************************************************************
1931 * LDDR
1932 ***************************************************************/
1933 #define LDDR \
1934 LDD; \
1935 if( _BC ) \
1936 { \
1937 _PC -= 2; \
1938 CC(ex,0xb8); \
1939 }
1940
1941 /***************************************************************
1942 * CPDR
1943 ***************************************************************/
1944 #define CPDR \
1945 CPD; \
1946 if( _BC && !(_F & ZF) ) \
1947 { \
1948 _PC -= 2; \
1949 CC(ex,0xb9); \
1950 }
1951
1952 /***************************************************************
1953 * INDR
1954 ***************************************************************/
1955 #define INDR \
1956 IND; \
1957 if( _B ) \
1958 { \
1959 _PC -= 2; \
1960 CC(ex,0xba); \
1961 }
1962
1963 /***************************************************************
1964 * OTDR
1965 ***************************************************************/
1966 #define OTDR \
1967 OUTD; \
1968 if( _B ) \
1969 { \
1970 _PC -= 2; \
1971 CC(ex,0xbb); \
1972 }
1973
1974 /***************************************************************
1975 * EI
1976 ***************************************************************/
1977 #define EI { \
1978 /* If interrupts were disabled, execute one more \
1979 * instruction and check the IRQ line. \
1980 * If not, simply set interrupt flip-flop 2 \
1981 */ \
1982 if( _IFF1 == 0 ) \
1983 { \
1984 _IFF1 = _IFF2 = 1; \
1985 _PPC = _PCD; \
1986 CALL_MAME_DEBUG; \
1987 _R++; \
1988 while( cpu_readop(_PCD) == 0xfb ) /* more EIs? */ \
1989 { \
1990 LOG(("Z80 #%d multiple EI opcodes at %04X\n", \
1991 cpu_getactivecpu(), _PC)); \
1992 CC(op,0xfb); \
1993 _PPC =_PCD; \
1994 CALL_MAME_DEBUG; \
1995 _PC++; \
1996 _R++; \
1997 } \
1998 if( Z80.irq_state != CLEAR_LINE || \
1999 Z80.request_irq >= 0 ) \
2000 { \
2001 after_EI = 1; /* avoid cycle skip hacks */ \
2002 EXEC(op,ROP()); \
2003 after_EI = 0; \
2004 LOG(("Z80 #%d EI takes irq\n", cpu_getactivecpu())); \
2005 take_interrupt(); \
2006 } else EXEC(op,ROP()); \
2007 } else _IFF2 = 1; \
2008 }
2009
2010 /**********************************************************
2011 * opcodes with CB prefix
2012 * rotate, shift and bit operations
2013 **********************************************************/
2014 OP(cb,00) { _B = RLC(_B); } /* RLC B */
2015 OP(cb,01) { _C = RLC(_C); } /* RLC C */
2016 OP(cb,02) { _D = RLC(_D); } /* RLC D */
2017 OP(cb,03) { _E = RLC(_E); } /* RLC E */
2018 OP(cb,04) { _H = RLC(_H); } /* RLC H */
2019 OP(cb,05) { _L = RLC(_L); } /* RLC L */
2020 OP(cb,06) { WM( _HL, RLC(RM(_HL)) ); } /* RLC (HL) */
2021 OP(cb,07) { _A = RLC(_A); } /* RLC A */
2022
2023 OP(cb,08) { _B = RRC(_B); } /* RRC B */
2024 OP(cb,09) { _C = RRC(_C); } /* RRC C */
2025 OP(cb,0a) { _D = RRC(_D); } /* RRC D */
2026 OP(cb,0b) { _E = RRC(_E); } /* RRC E */
2027 OP(cb,0c) { _H = RRC(_H); } /* RRC H */
2028 OP(cb,0d) { _L = RRC(_L); } /* RRC L */
2029 OP(cb,0e) { WM( _HL, RRC(RM(_HL)) ); } /* RRC (HL) */
2030 OP(cb,0f) { _A = RRC(_A); } /* RRC A */
2031
2032 OP(cb,10) { _B = RL(_B); } /* RL B */
2033 OP(cb,11) { _C = RL(_C); } /* RL C */
2034 OP(cb,12) { _D = RL(_D); } /* RL D */
2035 OP(cb,13) { _E = RL(_E); } /* RL E */
2036 OP(cb,14) { _H = RL(_H); } /* RL H */
2037 OP(cb,15) { _L = RL(_L); } /* RL L */
2038 OP(cb,16) { WM( _HL, RL(RM(_HL)) ); } /* RL (HL) */
2039 OP(cb,17) { _A = RL(_A); } /* RL A */
2040
2041 OP(cb,18) { _B = RR(_B); } /* RR B */
2042 OP(cb,19) { _C = RR(_C); } /* RR C */
2043 OP(cb,1a) { _D = RR(_D); } /* RR D */
2044 OP(cb,1b) { _E = RR(_E); } /* RR E */
2045 OP(cb,1c) { _H = RR(_H); } /* RR H */
2046 OP(cb,1d) { _L = RR(_L); } /* RR L */
2047 OP(cb,1e) { WM( _HL, RR(RM(_HL)) ); } /* RR (HL) */
2048 OP(cb,1f) { _A = RR(_A); } /* RR A */
2049
2050 OP(cb,20) { _B = SLA(_B); } /* SLA B */
2051 OP(cb,21) { _C = SLA(_C); } /* SLA C */
2052 OP(cb,22) { _D = SLA(_D); } /* SLA D */
2053 OP(cb,23) { _E = SLA(_E); } /* SLA E */
2054 OP(cb,24) { _H = SLA(_H); } /* SLA H */
2055 OP(cb,25) { _L = SLA(_L); } /* SLA L */
2056 OP(cb,26) { WM( _HL, SLA(RM(_HL)) ); } /* SLA (HL) */
2057 OP(cb,27) { _A = SLA(_A); } /* SLA A */
2058
2059 OP(cb,28) { _B = SRA(_B); } /* SRA B */
2060 OP(cb,29) { _C = SRA(_C); } /* SRA C */
2061 OP(cb,2a) { _D = SRA(_D); } /* SRA D */
2062 OP(cb,2b) { _E = SRA(_E); } /* SRA E */
2063 OP(cb,2c) { _H = SRA(_H); } /* SRA H */
2064 OP(cb,2d) { _L = SRA(_L); } /* SRA L */
2065 OP(cb,2e) { WM( _HL, SRA(RM(_HL)) ); } /* SRA (HL) */
2066 OP(cb,2f) { _A = SRA(_A); } /* SRA A */
2067
2068 OP(cb,30) { _B = SLL(_B); } /* SLL B */
2069 OP(cb,31) { _C = SLL(_C); } /* SLL C */
2070 OP(cb,32) { _D = SLL(_D); } /* SLL D */
2071 OP(cb,33) { _E = SLL(_E); } /* SLL E */
2072 OP(cb,34) { _H = SLL(_H); } /* SLL H */
2073 OP(cb,35) { _L = SLL(_L); } /* SLL L */
2074 OP(cb,36) { WM( _HL, SLL(RM(_HL)) ); } /* SLL (HL) */
2075 OP(cb,37) { _A = SLL(_A); } /* SLL A */
2076
2077 OP(cb,38) { _B = SRL(_B); } /* SRL B */
2078 OP(cb,39) { _C = SRL(_C); } /* SRL C */
2079 OP(cb,3a) { _D = SRL(_D); } /* SRL D */
2080 OP(cb,3b) { _E = SRL(_E); } /* SRL E */
2081 OP(cb,3c) { _H = SRL(_H); } /* SRL H */
2082 OP(cb,3d) { _L = SRL(_L); } /* SRL L */
2083 OP(cb,3e) { WM( _HL, SRL(RM(_HL)) ); } /* SRL (HL) */
2084 OP(cb,3f) { _A = SRL(_A); } /* SRL A */
2085
2086 OP(cb,40) { BIT(0,_B); } /* BIT 0,B */
2087 OP(cb,41) { BIT(0,_C); } /* BIT 0,C */
2088 OP(cb,42) { BIT(0,_D); } /* BIT 0,D */
2089 OP(cb,43) { BIT(0,_E); } /* BIT 0,E */
2090 OP(cb,44) { BIT(0,_H); } /* BIT 0,H */
2091 OP(cb,45) { BIT(0,_L); } /* BIT 0,L */
2092 OP(cb,46) { BIT(0,RM(_HL)); } /* BIT 0,(HL) */
2093 OP(cb,47) { BIT(0,_A); } /* BIT 0,A */
2094
2095 OP(cb,48) { BIT(1,_B); } /* BIT 1,B */
2096 OP(cb,49) { BIT(1,_C); } /* BIT 1,C */
2097 OP(cb,4a) { BIT(1,_D); } /* BIT 1,D */
2098 OP(cb,4b) { BIT(1,_E); } /* BIT 1,E */
2099 OP(cb,4c) { BIT(1,_H); } /* BIT 1,H */
2100 OP(cb,4d) { BIT(1,_L); } /* BIT 1,L */
2101 OP(cb,4e) { BIT(1,RM(_HL)); } /* BIT 1,(HL) */
2102 OP(cb,4f) { BIT(1,_A); } /* BIT 1,A */
2103
2104 OP(cb,50) { BIT(2,_B); } /* BIT 2,B */
2105 OP(cb,51) { BIT(2,_C); } /* BIT 2,C */
2106 OP(cb,52) { BIT(2,_D); } /* BIT 2,D */
2107 OP(cb,53) { BIT(2,_E); } /* BIT 2,E */
2108 OP(cb,54) { BIT(2,_H); } /* BIT 2,H */
2109 OP(cb,55) { BIT(2,_L); } /* BIT 2,L */
2110 OP(cb,56) { BIT(2,RM(_HL)); } /* BIT 2,(HL) */
2111 OP(cb,57) { BIT(2,_A); } /* BIT 2,A */
2112
2113 OP(cb,58) { BIT(3,_B); } /* BIT 3,B */
2114 OP(cb,59) { BIT(3,_C); } /* BIT 3,C */
2115 OP(cb,5a) { BIT(3,_D); } /* BIT 3,D */
2116 OP(cb,5b) { BIT(3,_E); } /* BIT 3,E */
2117 OP(cb,5c) { BIT(3,_H); } /* BIT 3,H */
2118 OP(cb,5d) { BIT(3,_L); } /* BIT 3,L */
2119 OP(cb,5e) { BIT(3,RM(_HL)); } /* BIT 3,(HL) */
2120 OP(cb,5f) { BIT(3,_A); } /* BIT 3,A */
2121
2122 OP(cb,60) { BIT(4,_B); } /* BIT 4,B */
2123 OP(cb,61) { BIT(4,_C); } /* BIT 4,C */
2124 OP(cb,62) { BIT(4,_D); } /* BIT 4,D */
2125 OP(cb,63) { BIT(4,_E); } /* BIT 4,E */
2126 OP(cb,64) { BIT(4,_H); } /* BIT 4,H */
2127 OP(cb,65) { BIT(4,_L); } /* BIT 4,L */
2128 OP(cb,66) { BIT(4,RM(_HL)); } /* BIT 4,(HL) */
2129 OP(cb,67) { BIT(4,_A); } /* BIT 4,A */
2130
2131 OP(cb,68) { BIT(5,_B); } /* BIT 5,B */
2132 OP(cb,69) { BIT(5,_C); } /* BIT 5,C */
2133 OP(cb,6a) { BIT(5,_D); } /* BIT 5,D */
2134 OP(cb,6b) { BIT(5,_E); } /* BIT 5,E */
2135 OP(cb,6c) { BIT(5,_H); } /* BIT 5,H */
2136 OP(cb,6d) { BIT(5,_L); } /* BIT 5,L */
2137 OP(cb,6e) { BIT(5,RM(_HL)); } /* BIT 5,(HL) */
2138 OP(cb,6f) { BIT(5,_A); } /* BIT 5,A */
2139
2140 OP(cb,70) { BIT(6,_B); } /* BIT 6,B */
2141 OP(cb,71) { BIT(6,_C); } /* BIT 6,C */
2142 OP(cb,72) { BIT(6,_D); } /* BIT 6,D */
2143 OP(cb,73) { BIT(6,_E); } /* BIT 6,E */
2144 OP(cb,74) { BIT(6,_H); } /* BIT 6,H */
2145 OP(cb,75) { BIT(6,_L); } /* BIT 6,L */
2146 OP(cb,76) { BIT(6,RM(_HL)); } /* BIT 6,(HL) */
2147 OP(cb,77) { BIT(6,_A); } /* BIT 6,A */
2148
2149 OP(cb,78) { BIT(7,_B); } /* BIT 7,B */
2150 OP(cb,79) { BIT(7,_C); } /* BIT 7,C */
2151 OP(cb,7a) { BIT(7,_D); } /* BIT 7,D */
2152 OP(cb,7b) { BIT(7,_E); } /* BIT 7,E */
2153 OP(cb,7c) { BIT(7,_H); } /* BIT 7,H */
2154 OP(cb,7d) { BIT(7,_L); } /* BIT 7,L */
2155 OP(cb,7e) { BIT(7,RM(_HL)); } /* BIT 7,(HL) */
2156 OP(cb,7f) { BIT(7,_A); } /* BIT 7,A */
2157
2158 OP(cb,80) { _B = RES(0,_B); } /* RES 0,B */
2159 OP(cb,81) { _C = RES(0,_C); } /* RES 0,C */
2160 OP(cb,82) { _D = RES(0,_D); } /* RES 0,D */
2161 OP(cb,83) { _E = RES(0,_E); } /* RES 0,E */
2162 OP(cb,84) { _H = RES(0,_H); } /* RES 0,H */
2163 OP(cb,85) { _L = RES(0,_L); } /* RES 0,L */
2164 OP(cb,86) { WM( _HL, RES(0,RM(_HL)) ); } /* RES 0,(HL) */
2165 OP(cb,87) { _A = RES(0,_A); } /* RES 0,A */
2166
2167 OP(cb,88) { _B = RES(1,_B); } /* RES 1,B */
2168 OP(cb,89) { _C = RES(1,_C); } /* RES 1,C */
2169 OP(cb,8a) { _D = RES(1,_D); } /* RES 1,D */
2170 OP(cb,8b) { _E = RES(1,_E); } /* RES 1,E */
2171 OP(cb,8c) { _H = RES(1,_H); } /* RES 1,H */
2172 OP(cb,8d) { _L = RES(1,_L); } /* RES 1,L */
2173 OP(cb,8e) { WM( _HL, RES(1,RM(_HL)) ); } /* RES 1,(HL) */
2174 OP(cb,8f) { _A = RES(1,_A); } /* RES 1,A */
2175
2176 OP(cb,90) { _B = RES(2,_B); } /* RES 2,B */
2177 OP(cb,91) { _C = RES(2,_C); } /* RES 2,C */
2178 OP(cb,92) { _D = RES(2,_D); } /* RES 2,D */
2179 OP(cb,93) { _E = RES(2,_E); } /* RES 2,E */
2180 OP(cb,94) { _H = RES(2,_H); } /* RES 2,H */
2181 OP(cb,95) { _L = RES(2,_L); } /* RES 2,L */
2182 OP(cb,96) { WM( _HL, RES(2,RM(_HL)) ); } /* RES 2,(HL) */
2183 OP(cb,97) { _A = RES(2,_A); } /* RES 2,A */
2184
2185 OP(cb,98) { _B = RES(3,_B); } /* RES 3,B */
2186 OP(cb,99) { _C = RES(3,_C); } /* RES 3,C */
2187 OP(cb,9a) { _D = RES(3,_D); } /* RES 3,D */
2188 OP(cb,9b) { _E = RES(3,_E); } /* RES 3,E */
2189 OP(cb,9c) { _H = RES(3,_H); } /* RES 3,H */
2190 OP(cb,9d) { _L = RES(3,_L); } /* RES 3,L */
2191 OP(cb,9e) { WM( _HL, RES(3,RM(_HL)) ); } /* RES 3,(HL) */
2192 OP(cb,9f) { _A = RES(3,_A); } /* RES 3,A */
2193
OP(cb,a0)2194 OP(cb,a0) { _B = RES(4,_B); } /* RES 4,B */
OP(cb,a1)2195 OP(cb,a1) { _C = RES(4,_C); } /* RES 4,C */
OP(cb,a2)2196 OP(cb,a2) { _D = RES(4,_D); } /* RES 4,D */
OP(cb,a3)2197 OP(cb,a3) { _E = RES(4,_E); } /* RES 4,E */
OP(cb,a4)2198 OP(cb,a4) { _H = RES(4,_H); } /* RES 4,H */
OP(cb,a5)2199 OP(cb,a5) { _L = RES(4,_L); } /* RES 4,L */
OP(cb,a6)2200 OP(cb,a6) { WM( _HL, RES(4,RM(_HL)) ); } /* RES 4,(HL) */
OP(cb,a7)2201 OP(cb,a7) { _A = RES(4,_A); } /* RES 4,A */
2202
OP(cb,a8)2203 OP(cb,a8) { _B = RES(5,_B); } /* RES 5,B */
OP(cb,a9)2204 OP(cb,a9) { _C = RES(5,_C); } /* RES 5,C */
OP(cb,aa)2205 OP(cb,aa) { _D = RES(5,_D); } /* RES 5,D */
OP(cb,ab)2206 OP(cb,ab) { _E = RES(5,_E); } /* RES 5,E */
OP(cb,ac)2207 OP(cb,ac) { _H = RES(5,_H); } /* RES 5,H */
OP(cb,ad)2208 OP(cb,ad) { _L = RES(5,_L); } /* RES 5,L */
OP(cb,ae)2209 OP(cb,ae) { WM( _HL, RES(5,RM(_HL)) ); } /* RES 5,(HL) */
OP(cb,af)2210 OP(cb,af) { _A = RES(5,_A); } /* RES 5,A */
2211
OP(cb,b0)2212 OP(cb,b0) { _B = RES(6,_B); } /* RES 6,B */
OP(cb,b1)2213 OP(cb,b1) { _C = RES(6,_C); } /* RES 6,C */
OP(cb,b2)2214 OP(cb,b2) { _D = RES(6,_D); } /* RES 6,D */
OP(cb,b3)2215 OP(cb,b3) { _E = RES(6,_E); } /* RES 6,E */
OP(cb,b4)2216 OP(cb,b4) { _H = RES(6,_H); } /* RES 6,H */
OP(cb,b5)2217 OP(cb,b5) { _L = RES(6,_L); } /* RES 6,L */
OP(cb,b6)2218 OP(cb,b6) { WM( _HL, RES(6,RM(_HL)) ); } /* RES 6,(HL) */
OP(cb,b7)2219 OP(cb,b7) { _A = RES(6,_A); } /* RES 6,A */
2220
OP(cb,b8)2221 OP(cb,b8) { _B = RES(7,_B); } /* RES 7,B */
OP(cb,b9)2222 OP(cb,b9) { _C = RES(7,_C); } /* RES 7,C */
OP(cb,ba)2223 OP(cb,ba) { _D = RES(7,_D); } /* RES 7,D */
OP(cb,bb)2224 OP(cb,bb) { _E = RES(7,_E); } /* RES 7,E */
OP(cb,bc)2225 OP(cb,bc) { _H = RES(7,_H); } /* RES 7,H */
OP(cb,bd)2226 OP(cb,bd) { _L = RES(7,_L); } /* RES 7,L */
OP(cb,be)2227 OP(cb,be) { WM( _HL, RES(7,RM(_HL)) ); } /* RES 7,(HL) */
OP(cb,bf)2228 OP(cb,bf) { _A = RES(7,_A); } /* RES 7,A */
2229
OP(cb,c0)2230 OP(cb,c0) { _B = SET(0,_B); } /* SET 0,B */
OP(cb,c1)2231 OP(cb,c1) { _C = SET(0,_C); } /* SET 0,C */
OP(cb,c2)2232 OP(cb,c2) { _D = SET(0,_D); } /* SET 0,D */
OP(cb,c3)2233 OP(cb,c3) { _E = SET(0,_E); } /* SET 0,E */
OP(cb,c4)2234 OP(cb,c4) { _H = SET(0,_H); } /* SET 0,H */
OP(cb,c5)2235 OP(cb,c5) { _L = SET(0,_L); } /* SET 0,L */
OP(cb,c6)2236 OP(cb,c6) { WM( _HL, SET(0,RM(_HL)) ); } /* SET 0,(HL) */
OP(cb,c7)2237 OP(cb,c7) { _A = SET(0,_A); } /* SET 0,A */
2238
OP(cb,c8)2239 OP(cb,c8) { _B = SET(1,_B); } /* SET 1,B */
OP(cb,c9)2240 OP(cb,c9) { _C = SET(1,_C); } /* SET 1,C */
OP(cb,ca)2241 OP(cb,ca) { _D = SET(1,_D); } /* SET 1,D */
OP(cb,cb)2242 OP(cb,cb) { _E = SET(1,_E); } /* SET 1,E */
OP(cb,cc)2243 OP(cb,cc) { _H = SET(1,_H); } /* SET 1,H */
OP(cb,cd)2244 OP(cb,cd) { _L = SET(1,_L); } /* SET 1,L */
OP(cb,ce)2245 OP(cb,ce) { WM( _HL, SET(1,RM(_HL)) ); } /* SET 1,(HL) */
OP(cb,cf)2246 OP(cb,cf) { _A = SET(1,_A); } /* SET 1,A */
2247
OP(cb,d0)2248 OP(cb,d0) { _B = SET(2,_B); } /* SET 2,B */
OP(cb,d1)2249 OP(cb,d1) { _C = SET(2,_C); } /* SET 2,C */
OP(cb,d2)2250 OP(cb,d2) { _D = SET(2,_D); } /* SET 2,D */
OP(cb,d3)2251 OP(cb,d3) { _E = SET(2,_E); } /* SET 2,E */
OP(cb,d4)2252 OP(cb,d4) { _H = SET(2,_H); } /* SET 2,H */
OP(cb,d5)2253 OP(cb,d5) { _L = SET(2,_L); } /* SET 2,L */
OP(cb,d6)2254 OP(cb,d6) { WM( _HL, SET(2,RM(_HL)) ); }/* SET 2,(HL) */
OP(cb,d7)2255 OP(cb,d7) { _A = SET(2,_A); } /* SET 2,A */
2256
OP(cb,d8)2257 OP(cb,d8) { _B = SET(3,_B); } /* SET 3,B */
OP(cb,d9)2258 OP(cb,d9) { _C = SET(3,_C); } /* SET 3,C */
OP(cb,da)2259 OP(cb,da) { _D = SET(3,_D); } /* SET 3,D */
OP(cb,db)2260 OP(cb,db) { _E = SET(3,_E); } /* SET 3,E */
OP(cb,dc)2261 OP(cb,dc) { _H = SET(3,_H); } /* SET 3,H */
OP(cb,dd)2262 OP(cb,dd) { _L = SET(3,_L); } /* SET 3,L */
OP(cb,de)2263 OP(cb,de) { WM( _HL, SET(3,RM(_HL)) ); } /* SET 3,(HL) */
OP(cb,df)2264 OP(cb,df) { _A = SET(3,_A); } /* SET 3,A */
2265
OP(cb,e0)2266 OP(cb,e0) { _B = SET(4,_B); } /* SET 4,B */
OP(cb,e1)2267 OP(cb,e1) { _C = SET(4,_C); } /* SET 4,C */
OP(cb,e2)2268 OP(cb,e2) { _D = SET(4,_D); } /* SET 4,D */
OP(cb,e3)2269 OP(cb,e3) { _E = SET(4,_E); } /* SET 4,E */
OP(cb,e4)2270 OP(cb,e4) { _H = SET(4,_H); } /* SET 4,H */
OP(cb,e5)2271 OP(cb,e5) { _L = SET(4,_L); } /* SET 4,L */
OP(cb,e6)2272 OP(cb,e6) { WM( _HL, SET(4,RM(_HL)) ); } /* SET 4,(HL) */
OP(cb,e7)2273 OP(cb,e7) { _A = SET(4,_A); } /* SET 4,A */
2274
OP(cb,e8)2275 OP(cb,e8) { _B = SET(5,_B); } /* SET 5,B */
OP(cb,e9)2276 OP(cb,e9) { _C = SET(5,_C); } /* SET 5,C */
OP(cb,ea)2277 OP(cb,ea) { _D = SET(5,_D); } /* SET 5,D */
OP(cb,eb)2278 OP(cb,eb) { _E = SET(5,_E); } /* SET 5,E */
OP(cb,ec)2279 OP(cb,ec) { _H = SET(5,_H); } /* SET 5,H */
OP(cb,ed)2280 OP(cb,ed) { _L = SET(5,_L); } /* SET 5,L */
OP(cb,ee)2281 OP(cb,ee) { WM( _HL, SET(5,RM(_HL)) ); } /* SET 5,(HL) */
OP(cb,ef)2282 OP(cb,ef) { _A = SET(5,_A); } /* SET 5,A */
2283
OP(cb,f0)2284 OP(cb,f0) { _B = SET(6,_B); } /* SET 6,B */
OP(cb,f1)2285 OP(cb,f1) { _C = SET(6,_C); } /* SET 6,C */
OP(cb,f2)2286 OP(cb,f2) { _D = SET(6,_D); } /* SET 6,D */
OP(cb,f3)2287 OP(cb,f3) { _E = SET(6,_E); } /* SET 6,E */
OP(cb,f4)2288 OP(cb,f4) { _H = SET(6,_H); } /* SET 6,H */
OP(cb,f5)2289 OP(cb,f5) { _L = SET(6,_L); } /* SET 6,L */
OP(cb,f6)2290 OP(cb,f6) { WM( _HL, SET(6,RM(_HL)) ); } /* SET 6,(HL) */
OP(cb,f7)2291 OP(cb,f7) { _A = SET(6,_A); } /* SET 6,A */
2292
OP(cb,f8)2293 OP(cb,f8) { _B = SET(7,_B); } /* SET 7,B */
OP(cb,f9)2294 OP(cb,f9) { _C = SET(7,_C); } /* SET 7,C */
OP(cb,fa)2295 OP(cb,fa) { _D = SET(7,_D); } /* SET 7,D */
OP(cb,fb)2296 OP(cb,fb) { _E = SET(7,_E); } /* SET 7,E */
OP(cb,fc)2297 OP(cb,fc) { _H = SET(7,_H); } /* SET 7,H */
OP(cb,fd)2298 OP(cb,fd) { _L = SET(7,_L); } /* SET 7,L */
OP(cb,fe)2299 OP(cb,fe) { WM( _HL, SET(7,RM(_HL)) ); } /* SET 7,(HL) */
OP(cb,ff)2300 OP(cb,ff) { _A = SET(7,_A); } /* SET 7,A */
2301
2302
2303 /**********************************************************
2304 * opcodes with DD/FD CB prefix
2305 * rotate, shift and bit operations with (IX+o)
2306 **********************************************************/
2307 OP(xycb,00) { _B = RLC( RM(EA) ); WM( EA,_B ); } /* RLC B=(XY+o) */
2308 OP(xycb,01) { _C = RLC( RM(EA) ); WM( EA,_C ); } /* RLC C=(XY+o) */
2309 OP(xycb,02) { _D = RLC( RM(EA) ); WM( EA,_D ); } /* RLC D=(XY+o) */
2310 OP(xycb,03) { _E = RLC( RM(EA) ); WM( EA,_E ); } /* RLC E=(XY+o) */
2311 OP(xycb,04) { _H = RLC( RM(EA) ); WM( EA,_H ); } /* RLC H=(XY+o) */
2312 OP(xycb,05) { _L = RLC( RM(EA) ); WM( EA,_L ); } /* RLC L=(XY+o) */
2313 OP(xycb,06) { WM( EA, RLC( RM(EA) ) ); } /* RLC (XY+o) */
2314 OP(xycb,07) { _A = RLC( RM(EA) ); WM( EA,_A ); } /* RLC A=(XY+o) */
2315
2316 OP(xycb,08) { _B = RRC( RM(EA) ); WM( EA,_B ); } /* RRC B=(XY+o) */
2317 OP(xycb,09) { _C = RRC( RM(EA) ); WM( EA,_C ); } /* RRC C=(XY+o) */
2318 OP(xycb,0a) { _D = RRC( RM(EA) ); WM( EA,_D ); } /* RRC D=(XY+o) */
2319 OP(xycb,0b) { _E = RRC( RM(EA) ); WM( EA,_E ); } /* RRC E=(XY+o) */
2320 OP(xycb,0c) { _H = RRC( RM(EA) ); WM( EA,_H ); } /* RRC H=(XY+o) */
2321 OP(xycb,0d) { _L = RRC( RM(EA) ); WM( EA,_L ); } /* RRC L=(XY+o) */
2322 OP(xycb,0e) { WM( EA,RRC( RM(EA) ) ); } /* RRC (XY+o) */
2323 OP(xycb,0f) { _A = RRC( RM(EA) ); WM( EA,_A ); } /* RRC A=(XY+o) */
2324
2325 OP(xycb,10) { _B = RL( RM(EA) ); WM( EA,_B ); } /* RL B=(XY+o) */
2326 OP(xycb,11) { _C = RL( RM(EA) ); WM( EA,_C ); } /* RL C=(XY+o) */
2327 OP(xycb,12) { _D = RL( RM(EA) ); WM( EA,_D ); } /* RL D=(XY+o) */
2328 OP(xycb,13) { _E = RL( RM(EA) ); WM( EA,_E ); } /* RL E=(XY+o) */
2329 OP(xycb,14) { _H = RL( RM(EA) ); WM( EA,_H ); } /* RL H=(XY+o) */
2330 OP(xycb,15) { _L = RL( RM(EA) ); WM( EA,_L ); } /* RL L=(XY+o) */
2331 OP(xycb,16) { WM( EA,RL( RM(EA) ) ); } /* RL (XY+o) */
2332 OP(xycb,17) { _A = RL( RM(EA) ); WM( EA,_A ); } /* RL A=(XY+o) */
2333
2334 OP(xycb,18) { _B = RR( RM(EA) ); WM( EA,_B ); } /* RR B=(XY+o) */
2335 OP(xycb,19) { _C = RR( RM(EA) ); WM( EA,_C ); } /* RR C=(XY+o) */
2336 OP(xycb,1a) { _D = RR( RM(EA) ); WM( EA,_D ); } /* RR D=(XY+o) */
2337 OP(xycb,1b) { _E = RR( RM(EA) ); WM( EA,_E ); } /* RR E=(XY+o) */
2338 OP(xycb,1c) { _H = RR( RM(EA) ); WM( EA,_H ); } /* RR H=(XY+o) */
2339 OP(xycb,1d) { _L = RR( RM(EA) ); WM( EA,_L ); } /* RR L=(XY+o) */
2340 OP(xycb,1e) { WM( EA,RR( RM(EA) ) ); } /* RR (XY+o) */
2341 OP(xycb,1f) { _A = RR( RM(EA) ); WM( EA,_A ); } /* RR A=(XY+o) */
2342
2343 OP(xycb,20) { _B = SLA( RM(EA) ); WM( EA,_B ); } /* SLA B=(XY+o) */
2344 OP(xycb,21) { _C = SLA( RM(EA) ); WM( EA,_C ); } /* SLA C=(XY+o) */
2345 OP(xycb,22) { _D = SLA( RM(EA) ); WM( EA,_D ); } /* SLA D=(XY+o) */
2346 OP(xycb,23) { _E = SLA( RM(EA) ); WM( EA,_E ); } /* SLA E=(XY+o) */
2347 OP(xycb,24) { _H = SLA( RM(EA) ); WM( EA,_H ); } /* SLA H=(XY+o) */
2348 OP(xycb,25) { _L = SLA( RM(EA) ); WM( EA,_L ); } /* SLA L=(XY+o) */
2349 OP(xycb,26) { WM( EA,SLA( RM(EA) ) ); } /* SLA (XY+o) */
2350 OP(xycb,27) { _A = SLA( RM(EA) ); WM( EA,_A ); } /* SLA A=(XY+o) */
2351
2352 OP(xycb,28) { _B = SRA( RM(EA) ); WM( EA,_B ); } /* SRA B=(XY+o) */
2353 OP(xycb,29) { _C = SRA( RM(EA) ); WM( EA,_C ); } /* SRA C=(XY+o) */
2354 OP(xycb,2a) { _D = SRA( RM(EA) ); WM( EA,_D ); } /* SRA D=(XY+o) */
2355 OP(xycb,2b) { _E = SRA( RM(EA) ); WM( EA,_E ); } /* SRA E=(XY+o) */
2356 OP(xycb,2c) { _H = SRA( RM(EA) ); WM( EA,_H ); } /* SRA H=(XY+o) */
2357 OP(xycb,2d) { _L = SRA( RM(EA) ); WM( EA,_L ); } /* SRA L=(XY+o) */
2358 OP(xycb,2e) { WM( EA,SRA( RM(EA) ) ); } /* SRA (XY+o) */
2359 OP(xycb,2f) { _A = SRA( RM(EA) ); WM( EA,_A ); } /* SRA A=(XY+o) */
2360
2361 OP(xycb,30) { _B = SLL( RM(EA) ); WM( EA,_B ); } /* SLL B=(XY+o) */
2362 OP(xycb,31) { _C = SLL( RM(EA) ); WM( EA,_C ); } /* SLL C=(XY+o) */
2363 OP(xycb,32) { _D = SLL( RM(EA) ); WM( EA,_D ); } /* SLL D=(XY+o) */
2364 OP(xycb,33) { _E = SLL( RM(EA) ); WM( EA,_E ); } /* SLL E=(XY+o) */
2365 OP(xycb,34) { _H = SLL( RM(EA) ); WM( EA,_H ); } /* SLL H=(XY+o) */
2366 OP(xycb,35) { _L = SLL( RM(EA) ); WM( EA,_L ); } /* SLL L=(XY+o) */
2367 OP(xycb,36) { WM( EA,SLL( RM(EA) ) ); } /* SLL (XY+o) */
2368 OP(xycb,37) { _A = SLL( RM(EA) ); WM( EA,_A ); } /* SLL A=(XY+o) */
2369
2370 OP(xycb,38) { _B = SRL( RM(EA) ); WM( EA,_B ); } /* SRL B=(XY+o) */
2371 OP(xycb,39) { _C = SRL( RM(EA) ); WM( EA,_C ); } /* SRL C=(XY+o) */
2372 OP(xycb,3a) { _D = SRL( RM(EA) ); WM( EA,_D ); } /* SRL D=(XY+o) */
2373 OP(xycb,3b) { _E = SRL( RM(EA) ); WM( EA,_E ); } /* SRL E=(XY+o) */
2374 OP(xycb,3c) { _H = SRL( RM(EA) ); WM( EA,_H ); } /* SRL H=(XY+o) */
2375 OP(xycb,3d) { _L = SRL( RM(EA) ); WM( EA,_L ); } /* SRL L=(XY+o) */
2376 OP(xycb,3e) { WM( EA,SRL( RM(EA) ) ); } /* SRL (XY+o) */
2377 OP(xycb,3f) { _A = SRL( RM(EA) ); WM( EA,_A ); } /* SRL A=(XY+o) */
2378
2379 OP(xycb,40) { xycb_46(); } /* BIT 0,B=(XY+o) */
2380 OP(xycb,41) { xycb_46(); } /* BIT 0,C=(XY+o) */
2381 OP(xycb,42) { xycb_46(); } /* BIT 0,D=(XY+o) */
2382 OP(xycb,43) { xycb_46(); } /* BIT 0,E=(XY+o) */
2383 OP(xycb,44) { xycb_46(); } /* BIT 0,H=(XY+o) */
2384 OP(xycb,45) { xycb_46(); } /* BIT 0,L=(XY+o) */
2385 OP(xycb,46) { BIT_XY(0,RM(EA)); } /* BIT 0,(XY+o) */
2386 OP(xycb,47) { xycb_46(); } /* BIT 0,A=(XY+o) */
2387
2388 OP(xycb,48) { xycb_4e(); } /* BIT 1,B=(XY+o) */
2389 OP(xycb,49) { xycb_4e(); } /* BIT 1,C=(XY+o) */
2390 OP(xycb,4a) { xycb_4e(); } /* BIT 1,D=(XY+o) */
2391 OP(xycb,4b) { xycb_4e(); } /* BIT 1,E=(XY+o) */
2392 OP(xycb,4c) { xycb_4e(); } /* BIT 1,H=(XY+o) */
2393 OP(xycb,4d) { xycb_4e(); } /* BIT 1,L=(XY+o) */
2394 OP(xycb,4e) { BIT_XY(1,RM(EA)); } /* BIT 1,(XY+o) */
2395 OP(xycb,4f) { xycb_4e(); } /* BIT 1,A=(XY+o) */
2396
2397 OP(xycb,50) { xycb_56(); } /* BIT 2,B=(XY+o) */
2398 OP(xycb,51) { xycb_56(); } /* BIT 2,C=(XY+o) */
2399 OP(xycb,52) { xycb_56(); } /* BIT 2,D=(XY+o) */
2400 OP(xycb,53) { xycb_56(); } /* BIT 2,E=(XY+o) */
2401 OP(xycb,54) { xycb_56(); } /* BIT 2,H=(XY+o) */
2402 OP(xycb,55) { xycb_56(); } /* BIT 2,L=(XY+o) */
2403 OP(xycb,56) { BIT_XY(2,RM(EA)); } /* BIT 2,(XY+o) */
2404 OP(xycb,57) { xycb_56(); } /* BIT 2,A=(XY+o) */
2405
2406 OP(xycb,58) { xycb_5e(); } /* BIT 3,B=(XY+o) */
2407 OP(xycb,59) { xycb_5e(); } /* BIT 3,C=(XY+o) */
2408 OP(xycb,5a) { xycb_5e(); } /* BIT 3,D=(XY+o) */
2409 OP(xycb,5b) { xycb_5e(); } /* BIT 3,E=(XY+o) */
2410 OP(xycb,5c) { xycb_5e(); } /* BIT 3,H=(XY+o) */
2411 OP(xycb,5d) { xycb_5e(); } /* BIT 3,L=(XY+o) */
2412 OP(xycb,5e) { BIT_XY(3,RM(EA)); } /* BIT 3,(XY+o) */
2413 OP(xycb,5f) { xycb_5e(); } /* BIT 3,A=(XY+o) */
2414
2415 OP(xycb,60) { xycb_66(); } /* BIT 4,B=(XY+o) */
2416 OP(xycb,61) { xycb_66(); } /* BIT 4,C=(XY+o) */
2417 OP(xycb,62) { xycb_66(); } /* BIT 4,D=(XY+o) */
2418 OP(xycb,63) { xycb_66(); } /* BIT 4,E=(XY+o) */
2419 OP(xycb,64) { xycb_66(); } /* BIT 4,H=(XY+o) */
2420 OP(xycb,65) { xycb_66(); } /* BIT 4,L=(XY+o) */
2421 OP(xycb,66) { BIT_XY(4,RM(EA)); } /* BIT 4,(XY+o) */
2422 OP(xycb,67) { xycb_66(); } /* BIT 4,A=(XY+o) */
2423
2424 OP(xycb,68) { xycb_6e(); } /* BIT 5,B=(XY+o) */
2425 OP(xycb,69) { xycb_6e(); } /* BIT 5,C=(XY+o) */
2426 OP(xycb,6a) { xycb_6e(); } /* BIT 5,D=(XY+o) */
2427 OP(xycb,6b) { xycb_6e(); } /* BIT 5,E=(XY+o) */
2428 OP(xycb,6c) { xycb_6e(); } /* BIT 5,H=(XY+o) */
2429 OP(xycb,6d) { xycb_6e(); } /* BIT 5,L=(XY+o) */
2430 OP(xycb,6e) { BIT_XY(5,RM(EA)); } /* BIT 5,(XY+o) */
2431 OP(xycb,6f) { xycb_6e(); } /* BIT 5,A=(XY+o) */
2432
2433 OP(xycb,70) { xycb_76(); } /* BIT 6,B=(XY+o) */
2434 OP(xycb,71) { xycb_76(); } /* BIT 6,C=(XY+o) */
2435 OP(xycb,72) { xycb_76(); } /* BIT 6,D=(XY+o) */
2436 OP(xycb,73) { xycb_76(); } /* BIT 6,E=(XY+o) */
2437 OP(xycb,74) { xycb_76(); } /* BIT 6,H=(XY+o) */
2438 OP(xycb,75) { xycb_76(); } /* BIT 6,L=(XY+o) */
2439 OP(xycb,76) { BIT_XY(6,RM(EA)); } /* BIT 6,(XY+o) */
2440 OP(xycb,77) { xycb_76(); } /* BIT 6,A=(XY+o) */
2441
2442 OP(xycb,78) { xycb_7e(); } /* BIT 7,B=(XY+o) */
2443 OP(xycb,79) { xycb_7e(); } /* BIT 7,C=(XY+o) */
2444 OP(xycb,7a) { xycb_7e(); } /* BIT 7,D=(XY+o) */
2445 OP(xycb,7b) { xycb_7e(); } /* BIT 7,E=(XY+o) */
2446 OP(xycb,7c) { xycb_7e(); } /* BIT 7,H=(XY+o) */
2447 OP(xycb,7d) { xycb_7e(); } /* BIT 7,L=(XY+o) */
2448 OP(xycb,7e) { BIT_XY(7,RM(EA)); } /* BIT 7,(XY+o) */
2449 OP(xycb,7f) { xycb_7e(); } /* BIT 7,A=(XY+o) */
2450
2451 OP(xycb,80) { _B = RES(0, RM(EA) ); WM( EA,_B ); } /* RES 0,B=(XY+o) */
2452 OP(xycb,81) { _C = RES(0, RM(EA) ); WM( EA,_C ); } /* RES 0,C=(XY+o) */
2453 OP(xycb,82) { _D = RES(0, RM(EA) ); WM( EA,_D ); } /* RES 0,D=(XY+o) */
2454 OP(xycb,83) { _E = RES(0, RM(EA) ); WM( EA,_E ); } /* RES 0,E=(XY+o) */
2455 OP(xycb,84) { _H = RES(0, RM(EA) ); WM( EA,_H ); } /* RES 0,H=(XY+o) */
2456 OP(xycb,85) { _L = RES(0, RM(EA) ); WM( EA,_L ); } /* RES 0,L=(XY+o) */
2457 OP(xycb,86) { WM( EA, RES(0,RM(EA)) ); } /* RES 0,(XY+o) */
2458 OP(xycb,87) { _A = RES(0, RM(EA) ); WM( EA,_A ); } /* RES 0,A=(XY+o) */
2459
2460 OP(xycb,88) { _B = RES(1, RM(EA) ); WM( EA,_B ); } /* RES 1,B=(XY+o) */
2461 OP(xycb,89) { _C = RES(1, RM(EA) ); WM( EA,_C ); } /* RES 1,C=(XY+o) */
2462 OP(xycb,8a) { _D = RES(1, RM(EA) ); WM( EA,_D ); } /* RES 1,D=(XY+o) */
2463 OP(xycb,8b) { _E = RES(1, RM(EA) ); WM( EA,_E ); } /* RES 1,E=(XY+o) */
2464 OP(xycb,8c) { _H = RES(1, RM(EA) ); WM( EA,_H ); } /* RES 1,H=(XY+o) */
2465 OP(xycb,8d) { _L = RES(1, RM(EA) ); WM( EA,_L ); } /* RES 1,L=(XY+o) */
2466 OP(xycb,8e) { WM( EA, RES(1,RM(EA)) ); } /* RES 1,(XY+o) */
2467 OP(xycb,8f) { _A = RES(1, RM(EA) ); WM( EA,_A ); } /* RES 1,A=(XY+o) */
2468
2469 OP(xycb,90) { _B = RES(2, RM(EA) ); WM( EA,_B ); } /* RES 2,B=(XY+o) */
2470 OP(xycb,91) { _C = RES(2, RM(EA) ); WM( EA,_C ); } /* RES 2,C=(XY+o) */
2471 OP(xycb,92) { _D = RES(2, RM(EA) ); WM( EA,_D ); } /* RES 2,D=(XY+o) */
2472 OP(xycb,93) { _E = RES(2, RM(EA) ); WM( EA,_E ); } /* RES 2,E=(XY+o) */
2473 OP(xycb,94) { _H = RES(2, RM(EA) ); WM( EA,_H ); } /* RES 2,H=(XY+o) */
2474 OP(xycb,95) { _L = RES(2, RM(EA) ); WM( EA,_L ); } /* RES 2,L=(XY+o) */
2475 OP(xycb,96) { WM( EA, RES(2,RM(EA)) ); } /* RES 2,(XY+o) */
2476 OP(xycb,97) { _A = RES(2, RM(EA) ); WM( EA,_A ); } /* RES 2,A=(XY+o) */
2477
2478 OP(xycb,98) { _B = RES(3, RM(EA) ); WM( EA,_B ); } /* RES 3,B=(XY+o) */
2479 OP(xycb,99) { _C = RES(3, RM(EA) ); WM( EA,_C ); } /* RES 3,C=(XY+o) */
2480 OP(xycb,9a) { _D = RES(3, RM(EA) ); WM( EA,_D ); } /* RES 3,D=(XY+o) */
2481 OP(xycb,9b) { _E = RES(3, RM(EA) ); WM( EA,_E ); } /* RES 3,E=(XY+o) */
2482 OP(xycb,9c) { _H = RES(3, RM(EA) ); WM( EA,_H ); } /* RES 3,H=(XY+o) */
2483 OP(xycb,9d) { _L = RES(3, RM(EA) ); WM( EA,_L ); } /* RES 3,L=(XY+o) */
2484 OP(xycb,9e) { WM( EA, RES(3,RM(EA)) ); } /* RES 3,(XY+o) */
2485 OP(xycb,9f) { _A = RES(3, RM(EA) ); WM( EA,_A ); } /* RES 3,A=(XY+o) */
2486
OP(xycb,a0)2487 OP(xycb,a0) { _B = RES(4, RM(EA) ); WM( EA,_B ); } /* RES 4,B=(XY+o) */
OP(xycb,a1)2488 OP(xycb,a1) { _C = RES(4, RM(EA) ); WM( EA,_C ); } /* RES 4,C=(XY+o) */
OP(xycb,a2)2489 OP(xycb,a2) { _D = RES(4, RM(EA) ); WM( EA,_D ); } /* RES 4,D=(XY+o) */
OP(xycb,a3)2490 OP(xycb,a3) { _E = RES(4, RM(EA) ); WM( EA,_E ); } /* RES 4,E=(XY+o) */
OP(xycb,a4)2491 OP(xycb,a4) { _H = RES(4, RM(EA) ); WM( EA,_H ); } /* RES 4,H=(XY+o) */
OP(xycb,a5)2492 OP(xycb,a5) { _L = RES(4, RM(EA) ); WM( EA,_L ); } /* RES 4,L=(XY+o) */
OP(xycb,a6)2493 OP(xycb,a6) { WM( EA, RES(4,RM(EA)) ); } /* RES 4,(XY+o) */
OP(xycb,a7)2494 OP(xycb,a7) { _A = RES(4, RM(EA) ); WM( EA,_A ); } /* RES 4,A=(XY+o) */
2495
OP(xycb,a8)2496 OP(xycb,a8) { _B = RES(5, RM(EA) ); WM( EA,_B ); } /* RES 5,B=(XY+o) */
OP(xycb,a9)2497 OP(xycb,a9) { _C = RES(5, RM(EA) ); WM( EA,_C ); } /* RES 5,C=(XY+o) */
OP(xycb,aa)2498 OP(xycb,aa) { _D = RES(5, RM(EA) ); WM( EA,_D ); } /* RES 5,D=(XY+o) */
OP(xycb,ab)2499 OP(xycb,ab) { _E = RES(5, RM(EA) ); WM( EA,_E ); } /* RES 5,E=(XY+o) */
OP(xycb,ac)2500 OP(xycb,ac) { _H = RES(5, RM(EA) ); WM( EA,_H ); } /* RES 5,H=(XY+o) */
OP(xycb,ad)2501 OP(xycb,ad) { _L = RES(5, RM(EA) ); WM( EA,_L ); } /* RES 5,L=(XY+o) */
OP(xycb,ae)2502 OP(xycb,ae) { WM( EA, RES(5,RM(EA)) ); } /* RES 5,(XY+o) */
OP(xycb,af)2503 OP(xycb,af) { _A = RES(5, RM(EA) ); WM( EA,_A ); } /* RES 5,A=(XY+o) */
2504
OP(xycb,b0)2505 OP(xycb,b0) { _B = RES(6, RM(EA) ); WM( EA,_B ); } /* RES 6,B=(XY+o) */
OP(xycb,b1)2506 OP(xycb,b1) { _C = RES(6, RM(EA) ); WM( EA,_C ); } /* RES 6,C=(XY+o) */
OP(xycb,b2)2507 OP(xycb,b2) { _D = RES(6, RM(EA) ); WM( EA,_D ); } /* RES 6,D=(XY+o) */
OP(xycb,b3)2508 OP(xycb,b3) { _E = RES(6, RM(EA) ); WM( EA,_E ); } /* RES 6,E=(XY+o) */
OP(xycb,b4)2509 OP(xycb,b4) { _H = RES(6, RM(EA) ); WM( EA,_H ); } /* RES 6,H=(XY+o) */
OP(xycb,b5)2510 OP(xycb,b5) { _L = RES(6, RM(EA) ); WM( EA,_L ); } /* RES 6,L=(XY+o) */
OP(xycb,b6)2511 OP(xycb,b6) { WM( EA, RES(6,RM(EA)) ); } /* RES 6,(XY+o) */
OP(xycb,b7)2512 OP(xycb,b7) { _A = RES(6, RM(EA) ); WM( EA,_A ); } /* RES 6,A=(XY+o) */
2513
OP(xycb,b8)2514 OP(xycb,b8) { _B = RES(7, RM(EA) ); WM( EA,_B ); } /* RES 7,B=(XY+o) */
OP(xycb,b9)2515 OP(xycb,b9) { _C = RES(7, RM(EA) ); WM( EA,_C ); } /* RES 7,C=(XY+o) */
OP(xycb,ba)2516 OP(xycb,ba) { _D = RES(7, RM(EA) ); WM( EA,_D ); } /* RES 7,D=(XY+o) */
OP(xycb,bb)2517 OP(xycb,bb) { _E = RES(7, RM(EA) ); WM( EA,_E ); } /* RES 7,E=(XY+o) */
OP(xycb,bc)2518 OP(xycb,bc) { _H = RES(7, RM(EA) ); WM( EA,_H ); } /* RES 7,H=(XY+o) */
OP(xycb,bd)2519 OP(xycb,bd) { _L = RES(7, RM(EA) ); WM( EA,_L ); } /* RES 7,L=(XY+o) */
OP(xycb,be)2520 OP(xycb,be) { WM( EA, RES(7,RM(EA)) ); } /* RES 7,(XY+o) */
OP(xycb,bf)2521 OP(xycb,bf) { _A = RES(7, RM(EA) ); WM( EA,_A ); } /* RES 7,A=(XY+o) */
2522
OP(xycb,c0)2523 OP(xycb,c0) { _B = SET(0, RM(EA) ); WM( EA,_B ); } /* SET 0,B=(XY+o) */
OP(xycb,c1)2524 OP(xycb,c1) { _C = SET(0, RM(EA) ); WM( EA,_C ); } /* SET 0,C=(XY+o) */
OP(xycb,c2)2525 OP(xycb,c2) { _D = SET(0, RM(EA) ); WM( EA,_D ); } /* SET 0,D=(XY+o) */
OP(xycb,c3)2526 OP(xycb,c3) { _E = SET(0, RM(EA) ); WM( EA,_E ); } /* SET 0,E=(XY+o) */
OP(xycb,c4)2527 OP(xycb,c4) { _H = SET(0, RM(EA) ); WM( EA,_H ); } /* SET 0,H=(XY+o) */
OP(xycb,c5)2528 OP(xycb,c5) { _L = SET(0, RM(EA) ); WM( EA,_L ); } /* SET 0,L=(XY+o) */
OP(xycb,c6)2529 OP(xycb,c6) { WM( EA, SET(0,RM(EA)) ); } /* SET 0,(XY+o) */
OP(xycb,c7)2530 OP(xycb,c7) { _A = SET(0, RM(EA) ); WM( EA,_A ); } /* SET 0,A=(XY+o) */
2531
OP(xycb,c8)2532 OP(xycb,c8) { _B = SET(1, RM(EA) ); WM( EA,_B ); } /* SET 1,B=(XY+o) */
OP(xycb,c9)2533 OP(xycb,c9) { _C = SET(1, RM(EA) ); WM( EA,_C ); } /* SET 1,C=(XY+o) */
OP(xycb,ca)2534 OP(xycb,ca) { _D = SET(1, RM(EA) ); WM( EA,_D ); } /* SET 1,D=(XY+o) */
OP(xycb,cb)2535 OP(xycb,cb) { _E = SET(1, RM(EA) ); WM( EA,_E ); } /* SET 1,E=(XY+o) */
OP(xycb,cc)2536 OP(xycb,cc) { _H = SET(1, RM(EA) ); WM( EA,_H ); } /* SET 1,H=(XY+o) */
OP(xycb,cd)2537 OP(xycb,cd) { _L = SET(1, RM(EA) ); WM( EA,_L ); } /* SET 1,L=(XY+o) */
OP(xycb,ce)2538 OP(xycb,ce) { WM( EA, SET(1,RM(EA)) ); } /* SET 1,(XY+o) */
OP(xycb,cf)2539 OP(xycb,cf) { _A = SET(1, RM(EA) ); WM( EA,_A ); } /* SET 1,A=(XY+o) */
2540
OP(xycb,d0)2541 OP(xycb,d0) { _B = SET(2, RM(EA) ); WM( EA,_B ); } /* SET 2,B=(XY+o) */
OP(xycb,d1)2542 OP(xycb,d1) { _C = SET(2, RM(EA) ); WM( EA,_C ); } /* SET 2,C=(XY+o) */
OP(xycb,d2)2543 OP(xycb,d2) { _D = SET(2, RM(EA) ); WM( EA,_D ); } /* SET 2,D=(XY+o) */
OP(xycb,d3)2544 OP(xycb,d3) { _E = SET(2, RM(EA) ); WM( EA,_E ); } /* SET 2,E=(XY+o) */
OP(xycb,d4)2545 OP(xycb,d4) { _H = SET(2, RM(EA) ); WM( EA,_H ); } /* SET 2,H=(XY+o) */
OP(xycb,d5)2546 OP(xycb,d5) { _L = SET(2, RM(EA) ); WM( EA,_L ); } /* SET 2,L=(XY+o) */
OP(xycb,d6)2547 OP(xycb,d6) { WM( EA, SET(2,RM(EA)) ); } /* SET 2,(XY+o) */
OP(xycb,d7)2548 OP(xycb,d7) { _A = SET(2, RM(EA) ); WM( EA,_A ); } /* SET 2,A=(XY+o) */
2549
OP(xycb,d8)2550 OP(xycb,d8) { _B = SET(3, RM(EA) ); WM( EA,_B ); } /* SET 3,B=(XY+o) */
OP(xycb,d9)2551 OP(xycb,d9) { _C = SET(3, RM(EA) ); WM( EA,_C ); } /* SET 3,C=(XY+o) */
OP(xycb,da)2552 OP(xycb,da) { _D = SET(3, RM(EA) ); WM( EA,_D ); } /* SET 3,D=(XY+o) */
OP(xycb,db)2553 OP(xycb,db) { _E = SET(3, RM(EA) ); WM( EA,_E ); } /* SET 3,E=(XY+o) */
OP(xycb,dc)2554 OP(xycb,dc) { _H = SET(3, RM(EA) ); WM( EA,_H ); } /* SET 3,H=(XY+o) */
OP(xycb,dd)2555 OP(xycb,dd) { _L = SET(3, RM(EA) ); WM( EA,_L ); } /* SET 3,L=(XY+o) */
OP(xycb,de)2556 OP(xycb,de) { WM( EA, SET(3,RM(EA)) ); } /* SET 3,(XY+o) */
OP(xycb,df)2557 OP(xycb,df) { _A = SET(3, RM(EA) ); WM( EA,_A ); } /* SET 3,A=(XY+o) */
2558
OP(xycb,e0)2559 OP(xycb,e0) { _B = SET(4, RM(EA) ); WM( EA,_B ); } /* SET 4,B=(XY+o) */
OP(xycb,e1)2560 OP(xycb,e1) { _C = SET(4, RM(EA) ); WM( EA,_C ); } /* SET 4,C=(XY+o) */
OP(xycb,e2)2561 OP(xycb,e2) { _D = SET(4, RM(EA) ); WM( EA,_D ); } /* SET 4,D=(XY+o) */
OP(xycb,e3)2562 OP(xycb,e3) { _E = SET(4, RM(EA) ); WM( EA,_E ); } /* SET 4,E=(XY+o) */
OP(xycb,e4)2563 OP(xycb,e4) { _H = SET(4, RM(EA) ); WM( EA,_H ); } /* SET 4,H=(XY+o) */
OP(xycb,e5)2564 OP(xycb,e5) { _L = SET(4, RM(EA) ); WM( EA,_L ); } /* SET 4,L=(XY+o) */
OP(xycb,e6)2565 OP(xycb,e6) { WM( EA, SET(4,RM(EA)) ); } /* SET 4,(XY+o) */
OP(xycb,e7)2566 OP(xycb,e7) { _A = SET(4, RM(EA) ); WM( EA,_A ); } /* SET 4,A=(XY+o) */
2567
OP(xycb,e8)2568 OP(xycb,e8) { _B = SET(5, RM(EA) ); WM( EA,_B ); } /* SET 5,B=(XY+o) */
OP(xycb,e9)2569 OP(xycb,e9) { _C = SET(5, RM(EA) ); WM( EA,_C ); } /* SET 5,C=(XY+o) */
OP(xycb,ea)2570 OP(xycb,ea) { _D = SET(5, RM(EA) ); WM( EA,_D ); } /* SET 5,D=(XY+o) */
OP(xycb,eb)2571 OP(xycb,eb) { _E = SET(5, RM(EA) ); WM( EA,_E ); } /* SET 5,E=(XY+o) */
OP(xycb,ec)2572 OP(xycb,ec) { _H = SET(5, RM(EA) ); WM( EA,_H ); } /* SET 5,H=(XY+o) */
OP(xycb,ed)2573 OP(xycb,ed) { _L = SET(5, RM(EA) ); WM( EA,_L ); } /* SET 5,L=(XY+o) */
OP(xycb,ee)2574 OP(xycb,ee) { WM( EA, SET(5,RM(EA)) ); } /* SET 5,(XY+o) */
OP(xycb,ef)2575 OP(xycb,ef) { _A = SET(5, RM(EA) ); WM( EA,_A ); } /* SET 5,A=(XY+o) */
2576
OP(xycb,f0)2577 OP(xycb,f0) { _B = SET(6, RM(EA) ); WM( EA,_B ); } /* SET 6,B=(XY+o) */
OP(xycb,f1)2578 OP(xycb,f1) { _C = SET(6, RM(EA) ); WM( EA,_C ); } /* SET 6,C=(XY+o) */
OP(xycb,f2)2579 OP(xycb,f2) { _D = SET(6, RM(EA) ); WM( EA,_D ); } /* SET 6,D=(XY+o) */
OP(xycb,f3)2580 OP(xycb,f3) { _E = SET(6, RM(EA) ); WM( EA,_E ); } /* SET 6,E=(XY+o) */
OP(xycb,f4)2581 OP(xycb,f4) { _H = SET(6, RM(EA) ); WM( EA,_H ); } /* SET 6,H=(XY+o) */
OP(xycb,f5)2582 OP(xycb,f5) { _L = SET(6, RM(EA) ); WM( EA,_L ); } /* SET 6,L=(XY+o) */
OP(xycb,f6)2583 OP(xycb,f6) { WM( EA, SET(6,RM(EA)) ); } /* SET 6,(XY+o) */
OP(xycb,f7)2584 OP(xycb,f7) { _A = SET(6, RM(EA) ); WM( EA,_A ); } /* SET 6,A=(XY+o) */
2585
OP(xycb,f8)2586 OP(xycb,f8) { _B = SET(7, RM(EA) ); WM( EA,_B ); } /* SET 7,B=(XY+o) */
OP(xycb,f9)2587 OP(xycb,f9) { _C = SET(7, RM(EA) ); WM( EA,_C ); } /* SET 7,C=(XY+o) */
OP(xycb,fa)2588 OP(xycb,fa) { _D = SET(7, RM(EA) ); WM( EA,_D ); } /* SET 7,D=(XY+o) */
OP(xycb,fb)2589 OP(xycb,fb) { _E = SET(7, RM(EA) ); WM( EA,_E ); } /* SET 7,E=(XY+o) */
OP(xycb,fc)2590 OP(xycb,fc) { _H = SET(7, RM(EA) ); WM( EA,_H ); } /* SET 7,H=(XY+o) */
OP(xycb,fd)2591 OP(xycb,fd) { _L = SET(7, RM(EA) ); WM( EA,_L ); } /* SET 7,L=(XY+o) */
OP(xycb,fe)2592 OP(xycb,fe) { WM( EA, SET(7,RM(EA)) ); } /* SET 7,(XY+o) */
OP(xycb,ff)2593 OP(xycb,ff) { _A = SET(7, RM(EA) ); WM( EA,_A ); } /* SET 7,A=(XY+o) */
2594
2595 OP(illegal,1) {
2596 logerror("Z80 #%d ill. opcode $%02x $%02x\n",
2597 cpu_getactivecpu(), cpu_readop((_PCD-1)&0xffff), cpu_readop(_PCD));
2598 }
2599
2600 /**********************************************************
2601 * IX register related opcodes (DD prefix)
2602 **********************************************************/
2603 OP(dd,00) { illegal_1(); op_00(); } /* DB DD */
2604 OP(dd,01) { illegal_1(); op_01(); } /* DB DD */
2605 OP(dd,02) { illegal_1(); op_02(); } /* DB DD */
2606 OP(dd,03) { illegal_1(); op_03(); } /* DB DD */
2607 OP(dd,04) { illegal_1(); op_04(); } /* DB DD */
2608 OP(dd,05) { illegal_1(); op_05(); } /* DB DD */
2609 OP(dd,06) { illegal_1(); op_06(); } /* DB DD */
2610 OP(dd,07) { illegal_1(); op_07(); } /* DB DD */
2611
2612 OP(dd,08) { illegal_1(); op_08(); } /* DB DD */
2613 OP(dd,09) { _R++; ADD16(IX,BC); } /* ADD IX,BC */
2614 OP(dd,0a) { illegal_1(); op_0a(); } /* DB DD */
2615 OP(dd,0b) { illegal_1(); op_0b(); } /* DB DD */
2616 OP(dd,0c) { illegal_1(); op_0c(); } /* DB DD */
2617 OP(dd,0d) { illegal_1(); op_0d(); } /* DB DD */
2618 OP(dd,0e) { illegal_1(); op_0e(); } /* DB DD */
2619 OP(dd,0f) { illegal_1(); op_0f(); } /* DB DD */
2620
2621 OP(dd,10) { illegal_1(); op_10(); } /* DB DD */
2622 OP(dd,11) { illegal_1(); op_11(); } /* DB DD */
2623 OP(dd,12) { illegal_1(); op_12(); } /* DB DD */
2624 OP(dd,13) { illegal_1(); op_13(); } /* DB DD */
2625 OP(dd,14) { illegal_1(); op_14(); } /* DB DD */
2626 OP(dd,15) { illegal_1(); op_15(); } /* DB DD */
2627 OP(dd,16) { illegal_1(); op_16(); } /* DB DD */
2628 OP(dd,17) { illegal_1(); op_17(); } /* DB DD */
2629
2630 OP(dd,18) { illegal_1(); op_18(); } /* DB DD */
2631 OP(dd,19) { _R++; ADD16(IX,DE); } /* ADD IX,DE */
2632 OP(dd,1a) { illegal_1(); op_1a(); } /* DB DD */
2633 OP(dd,1b) { illegal_1(); op_1b(); } /* DB DD */
2634 OP(dd,1c) { illegal_1(); op_1c(); } /* DB DD */
2635 OP(dd,1d) { illegal_1(); op_1d(); } /* DB DD */
2636 OP(dd,1e) { illegal_1(); op_1e(); } /* DB DD */
2637 OP(dd,1f) { illegal_1(); op_1f(); } /* DB DD */
2638
2639 OP(dd,20) { illegal_1(); op_20(); } /* DB DD */
2640 OP(dd,21) { _R++; _IX = ARG16(); } /* LD IX,w */
2641 OP(dd,22) { _R++; EA = ARG16(); WM16( EA, &Z80.IX ); } /* LD (w),IX */
2642 OP(dd,23) { _R++; _IX++; } /* INC IX */
2643 OP(dd,24) { _R++; _HX = INC(_HX); } /* INC HX */
2644 OP(dd,25) { _R++; _HX = DEC(_HX); } /* DEC HX */
2645 OP(dd,26) { _R++; _HX = ARG(); } /* LD HX,n */
2646 OP(dd,27) { illegal_1(); op_27(); } /* DB DD */
2647
2648 OP(dd,28) { illegal_1(); op_28(); } /* DB DD */
2649 OP(dd,29) { _R++; ADD16(IX,IX); } /* ADD IX,IX */
2650 OP(dd,2a) { _R++; EA = ARG16(); RM16( EA, &Z80.IX ); } /* LD IX,(w) */
2651 OP(dd,2b) { _R++; _IX--; } /* DEC IX */
2652 OP(dd,2c) { _R++; _LX = INC(_LX); } /* INC LX */
2653 OP(dd,2d) { _R++; _LX = DEC(_LX); } /* DEC LX */
2654 OP(dd,2e) { _R++; _LX = ARG(); } /* LD LX,n */
2655 OP(dd,2f) { illegal_1(); op_2f(); } /* DB DD */
2656
2657 OP(dd,30) { illegal_1(); op_30(); } /* DB DD */
2658 OP(dd,31) { illegal_1(); op_31(); } /* DB DD */
2659 OP(dd,32) { illegal_1(); op_32(); } /* DB DD */
2660 OP(dd,33) { illegal_1(); op_33(); } /* DB DD */
2661 OP(dd,34) { _R++; EAX; WM( EA, INC(RM(EA)) ); } /* INC (IX+o) */
2662 OP(dd,35) { _R++; EAX; WM( EA, DEC(RM(EA)) ); } /* DEC (IX+o) */
2663 OP(dd,36) { _R++; EAX; WM( EA, ARG() ); } /* LD (IX+o),n */
2664 OP(dd,37) { illegal_1(); op_37(); } /* DB DD */
2665
2666 OP(dd,38) { illegal_1(); op_38(); } /* DB DD */
2667 OP(dd,39) { _R++; ADD16(IX,SP); } /* ADD IX,SP */
2668 OP(dd,3a) { illegal_1(); op_3a(); } /* DB DD */
2669 OP(dd,3b) { illegal_1(); op_3b(); } /* DB DD */
2670 OP(dd,3c) { illegal_1(); op_3c(); } /* DB DD */
2671 OP(dd,3d) { illegal_1(); op_3d(); } /* DB DD */
2672 OP(dd,3e) { illegal_1(); op_3e(); } /* DB DD */
2673 OP(dd,3f) { illegal_1(); op_3f(); } /* DB DD */
2674
2675 OP(dd,40) { illegal_1(); op_40(); } /* DB DD */
2676 OP(dd,41) { illegal_1(); op_41(); } /* DB DD */
2677 OP(dd,42) { illegal_1(); op_42(); } /* DB DD */
2678 OP(dd,43) { illegal_1(); op_43(); } /* DB DD */
2679 OP(dd,44) { _R++; _B = _HX; } /* LD B,HX */
2680 OP(dd,45) { _R++; _B = _LX; } /* LD B,LX */
2681 OP(dd,46) { _R++; EAX; _B = RM(EA); } /* LD B,(IX+o) */
2682 OP(dd,47) { illegal_1(); op_47(); } /* DB DD */
2683
2684 OP(dd,48) { illegal_1(); op_48(); } /* DB DD */
2685 OP(dd,49) { illegal_1(); op_49(); } /* DB DD */
2686 OP(dd,4a) { illegal_1(); op_4a(); } /* DB DD */
2687 OP(dd,4b) { illegal_1(); op_4b(); } /* DB DD */
2688 OP(dd,4c) { _R++; _C = _HX; } /* LD C,HX */
2689 OP(dd,4d) { _R++; _C = _LX; } /* LD C,LX */
2690 OP(dd,4e) { _R++; EAX; _C = RM(EA); } /* LD C,(IX+o) */
2691 OP(dd,4f) { illegal_1(); op_4f(); } /* DB DD */
2692
2693 OP(dd,50) { illegal_1(); op_50(); } /* DB DD */
2694 OP(dd,51) { illegal_1(); op_51(); } /* DB DD */
2695 OP(dd,52) { illegal_1(); op_52(); } /* DB DD */
2696 OP(dd,53) { illegal_1(); op_53(); } /* DB DD */
2697 OP(dd,54) { _R++; _D = _HX; } /* LD D,HX */
2698 OP(dd,55) { _R++; _D = _LX; } /* LD D,LX */
2699 OP(dd,56) { _R++; EAX; _D = RM(EA); } /* LD D,(IX+o) */
2700 OP(dd,57) { illegal_1(); op_57(); } /* DB DD */
2701
2702 OP(dd,58) { illegal_1(); op_58(); } /* DB DD */
2703 OP(dd,59) { illegal_1(); op_59(); } /* DB DD */
2704 OP(dd,5a) { illegal_1(); op_5a(); } /* DB DD */
2705 OP(dd,5b) { illegal_1(); op_5b(); } /* DB DD */
2706 OP(dd,5c) { _R++; _E = _HX; } /* LD E,HX */
2707 OP(dd,5d) { _R++; _E = _LX; } /* LD E,LX */
2708 OP(dd,5e) { _R++; EAX; _E = RM(EA); } /* LD E,(IX+o) */
2709 OP(dd,5f) { illegal_1(); op_5f(); } /* DB DD */
2710
2711 OP(dd,60) { _R++; _HX = _B; } /* LD HX,B */
2712 OP(dd,61) { _R++; _HX = _C; } /* LD HX,C */
2713 OP(dd,62) { _R++; _HX = _D; } /* LD HX,D */
2714 OP(dd,63) { _R++; _HX = _E; } /* LD HX,E */
2715 OP(dd,64) { } /* LD HX,HX */
2716 OP(dd,65) { _R++; _HX = _LX; } /* LD HX,LX */
2717 OP(dd,66) { _R++; EAX; _H = RM(EA); } /* LD H,(IX+o) */
2718 OP(dd,67) { _R++; _HX = _A; } /* LD HX,A */
2719
2720 OP(dd,68) { _R++; _LX = _B; } /* LD LX,B */
2721 OP(dd,69) { _R++; _LX = _C; } /* LD LX,C */
2722 OP(dd,6a) { _R++; _LX = _D; } /* LD LX,D */
2723 OP(dd,6b) { _R++; _LX = _E; } /* LD LX,E */
2724 OP(dd,6c) { _R++; _LX = _HX; } /* LD LX,HX */
2725 OP(dd,6d) { } /* LD LX,LX */
2726 OP(dd,6e) { _R++; EAX; _L = RM(EA); } /* LD L,(IX+o) */
2727 OP(dd,6f) { _R++; _LX = _A; } /* LD LX,A */
2728
2729 OP(dd,70) { _R++; EAX; WM( EA, _B ); } /* LD (IX+o),B */
2730 OP(dd,71) { _R++; EAX; WM( EA, _C ); } /* LD (IX+o),C */
2731 OP(dd,72) { _R++; EAX; WM( EA, _D ); } /* LD (IX+o),D */
2732 OP(dd,73) { _R++; EAX; WM( EA, _E ); } /* LD (IX+o),E */
2733 OP(dd,74) { _R++; EAX; WM( EA, _H ); } /* LD (IX+o),H */
2734 OP(dd,75) { _R++; EAX; WM( EA, _L ); } /* LD (IX+o),L */
2735 OP(dd,76) { illegal_1(); op_76(); } /* DB DD */
2736 OP(dd,77) { _R++; EAX; WM( EA, _A ); } /* LD (IX+o),A */
2737
2738 OP(dd,78) { illegal_1(); op_78(); } /* DB DD */
2739 OP(dd,79) { illegal_1(); op_79(); } /* DB DD */
2740 OP(dd,7a) { illegal_1(); op_7a(); } /* DB DD */
2741 OP(dd,7b) { illegal_1(); op_7b(); } /* DB DD */
2742 OP(dd,7c) { _R++; _A = _HX; } /* LD A,HX */
2743 OP(dd,7d) { _R++; _A = _LX; } /* LD A,LX */
2744 OP(dd,7e) { _R++; EAX; _A = RM(EA); } /* LD A,(IX+o) */
2745 OP(dd,7f) { illegal_1(); op_7f(); } /* DB DD */
2746
2747 OP(dd,80) { illegal_1(); op_80(); } /* DB DD */
2748 OP(dd,81) { illegal_1(); op_81(); } /* DB DD */
2749 OP(dd,82) { illegal_1(); op_82(); } /* DB DD */
2750 OP(dd,83) { illegal_1(); op_83(); } /* DB DD */
2751 OP(dd,84) { _R++; ADD(_HX); } /* ADD A,HX */
2752 OP(dd,85) { _R++; ADD(_LX); } /* ADD A,LX */
2753 OP(dd,86) { _R++; EAX; ADD(RM(EA)); } /* ADD A,(IX+o) */
2754 OP(dd,87) { illegal_1(); op_87(); } /* DB DD */
2755
2756 OP(dd,88) { illegal_1(); op_88(); } /* DB DD */
2757 OP(dd,89) { illegal_1(); op_89(); } /* DB DD */
2758 OP(dd,8a) { illegal_1(); op_8a(); } /* DB DD */
2759 OP(dd,8b) { illegal_1(); op_8b(); } /* DB DD */
2760 OP(dd,8c) { _R++; ADC(_HX); } /* ADC A,HX */
2761 OP(dd,8d) { _R++; ADC(_LX); } /* ADC A,LX */
2762 OP(dd,8e) { _R++; EAX; ADC(RM(EA)); } /* ADC A,(IX+o) */
2763 OP(dd,8f) { illegal_1(); op_8f(); } /* DB DD */
2764
2765 OP(dd,90) { illegal_1(); op_90(); } /* DB DD */
2766 OP(dd,91) { illegal_1(); op_91(); } /* DB DD */
2767 OP(dd,92) { illegal_1(); op_92(); } /* DB DD */
2768 OP(dd,93) { illegal_1(); op_93(); } /* DB DD */
2769 OP(dd,94) { _R++; SUB(_HX); } /* SUB HX */
2770 OP(dd,95) { _R++; SUB(_LX); } /* SUB LX */
2771 OP(dd,96) { _R++; EAX; SUB(RM(EA)); } /* SUB (IX+o) */
2772 OP(dd,97) { illegal_1(); op_97(); } /* DB DD */
2773
2774 OP(dd,98) { illegal_1(); op_98(); } /* DB DD */
2775 OP(dd,99) { illegal_1(); op_99(); } /* DB DD */
2776 OP(dd,9a) { illegal_1(); op_9a(); } /* DB DD */
2777 OP(dd,9b) { illegal_1(); op_9b(); } /* DB DD */
2778 OP(dd,9c) { _R++; SBC(_HX); } /* SBC A,HX */
2779 OP(dd,9d) { _R++; SBC(_LX); } /* SBC A,LX */
2780 OP(dd,9e) { _R++; EAX; SBC(RM(EA)); } /* SBC A,(IX+o) */
2781 OP(dd,9f) { illegal_1(); op_9f(); } /* DB DD */
2782
OP(dd,a0)2783 OP(dd,a0) { illegal_1(); op_a0(); } /* DB DD */
OP(dd,a1)2784 OP(dd,a1) { illegal_1(); op_a1(); } /* DB DD */
OP(dd,a2)2785 OP(dd,a2) { illegal_1(); op_a2(); } /* DB DD */
OP(dd,a3)2786 OP(dd,a3) { illegal_1(); op_a3(); } /* DB DD */
OP(dd,a4)2787 OP(dd,a4) { _R++; AND(_HX); } /* AND HX */
OP(dd,a5)2788 OP(dd,a5) { _R++; AND(_LX); } /* AND LX */
OP(dd,a6)2789 OP(dd,a6) { _R++; EAX; AND(RM(EA)); } /* AND (IX+o) */
OP(dd,a7)2790 OP(dd,a7) { illegal_1(); op_a7(); } /* DB DD */
2791
OP(dd,a8)2792 OP(dd,a8) { illegal_1(); op_a8(); } /* DB DD */
OP(dd,a9)2793 OP(dd,a9) { illegal_1(); op_a9(); } /* DB DD */
OP(dd,aa)2794 OP(dd,aa) { illegal_1(); op_aa(); } /* DB DD */
OP(dd,ab)2795 OP(dd,ab) { illegal_1(); op_ab(); } /* DB DD */
OP(dd,ac)2796 OP(dd,ac) { _R++; XOR(_HX); } /* XOR HX */
OP(dd,ad)2797 OP(dd,ad) { _R++; XOR(_LX); } /* XOR LX */
OP(dd,ae)2798 OP(dd,ae) { _R++; EAX; XOR(RM(EA)); } /* XOR (IX+o) */
OP(dd,af)2799 OP(dd,af) { illegal_1(); op_af(); } /* DB DD */
2800
OP(dd,b0)2801 OP(dd,b0) { illegal_1(); op_b0(); } /* DB DD */
OP(dd,b1)2802 OP(dd,b1) { illegal_1(); op_b1(); } /* DB DD */
OP(dd,b2)2803 OP(dd,b2) { illegal_1(); op_b2(); } /* DB DD */
OP(dd,b3)2804 OP(dd,b3) { illegal_1(); op_b3(); } /* DB DD */
OP(dd,b4)2805 OP(dd,b4) { _R++; OR(_HX); } /* OR HX */
OP(dd,b5)2806 OP(dd,b5) { _R++; OR(_LX); } /* OR LX */
OP(dd,b6)2807 OP(dd,b6) { _R++; EAX; OR(RM(EA)); } /* OR (IX+o) */
OP(dd,b7)2808 OP(dd,b7) { illegal_1(); op_b7(); } /* DB DD */
2809
OP(dd,b8)2810 OP(dd,b8) { illegal_1(); op_b8(); } /* DB DD */
OP(dd,b9)2811 OP(dd,b9) { illegal_1(); op_b9(); } /* DB DD */
OP(dd,ba)2812 OP(dd,ba) { illegal_1(); op_ba(); } /* DB DD */
OP(dd,bb)2813 OP(dd,bb) { illegal_1(); op_bb(); } /* DB DD */
OP(dd,bc)2814 OP(dd,bc) { _R++; CP(_HX); } /* CP HX */
OP(dd,bd)2815 OP(dd,bd) { _R++; CP(_LX); } /* CP LX */
OP(dd,be)2816 OP(dd,be) { _R++; EAX; CP(RM(EA)); } /* CP (IX+o) */
OP(dd,bf)2817 OP(dd,bf) { illegal_1(); op_bf(); } /* DB DD */
2818
OP(dd,c0)2819 OP(dd,c0) { illegal_1(); op_c0(); } /* DB DD */
OP(dd,c1)2820 OP(dd,c1) { illegal_1(); op_c1(); } /* DB DD */
OP(dd,c2)2821 OP(dd,c2) { illegal_1(); op_c2(); } /* DB DD */
OP(dd,c3)2822 OP(dd,c3) { illegal_1(); op_c3(); } /* DB DD */
OP(dd,c4)2823 OP(dd,c4) { illegal_1(); op_c4(); } /* DB DD */
OP(dd,c5)2824 OP(dd,c5) { illegal_1(); op_c5(); } /* DB DD */
OP(dd,c6)2825 OP(dd,c6) { illegal_1(); op_c6(); } /* DB DD */
OP(dd,c7)2826 OP(dd,c7) { illegal_1(); op_c7(); } /* DB DD */
2827
OP(dd,c8)2828 OP(dd,c8) { illegal_1(); op_c8(); } /* DB DD */
OP(dd,c9)2829 OP(dd,c9) { illegal_1(); op_c9(); } /* DB DD */
OP(dd,ca)2830 OP(dd,ca) { illegal_1(); op_ca(); } /* DB DD */
OP(dd,cb)2831 OP(dd,cb) { _R++; EAX; EXEC(xycb,ARG()); } /* ** DD CB xx */
OP(dd,cc)2832 OP(dd,cc) { illegal_1(); op_cc(); } /* DB DD */
OP(dd,cd)2833 OP(dd,cd) { illegal_1(); op_cd(); } /* DB DD */
OP(dd,ce)2834 OP(dd,ce) { illegal_1(); op_ce(); } /* DB DD */
OP(dd,cf)2835 OP(dd,cf) { illegal_1(); op_cf(); } /* DB DD */
2836
OP(dd,d0)2837 OP(dd,d0) { illegal_1(); op_d0(); } /* DB DD */
OP(dd,d1)2838 OP(dd,d1) { illegal_1(); op_d1(); } /* DB DD */
OP(dd,d2)2839 OP(dd,d2) { illegal_1(); op_d2(); } /* DB DD */
OP(dd,d3)2840 OP(dd,d3) { illegal_1(); op_d3(); } /* DB DD */
OP(dd,d4)2841 OP(dd,d4) { illegal_1(); op_d4(); } /* DB DD */
OP(dd,d5)2842 OP(dd,d5) { illegal_1(); op_d5(); } /* DB DD */
OP(dd,d6)2843 OP(dd,d6) { illegal_1(); op_d6(); } /* DB DD */
OP(dd,d7)2844 OP(dd,d7) { illegal_1(); op_d7(); } /* DB DD */
2845
OP(dd,d8)2846 OP(dd,d8) { illegal_1(); op_d8(); } /* DB DD */
OP(dd,d9)2847 OP(dd,d9) { illegal_1(); op_d9(); } /* DB DD */
OP(dd,da)2848 OP(dd,da) { illegal_1(); op_da(); } /* DB DD */
OP(dd,db)2849 OP(dd,db) { illegal_1(); op_db(); } /* DB DD */
OP(dd,dc)2850 OP(dd,dc) { illegal_1(); op_dc(); } /* DB DD */
OP(dd,dd)2851 OP(dd,dd) { illegal_1(); op_dd(); } /* DB DD */
OP(dd,de)2852 OP(dd,de) { illegal_1(); op_de(); } /* DB DD */
OP(dd,df)2853 OP(dd,df) { illegal_1(); op_df(); } /* DB DD */
2854
OP(dd,e0)2855 OP(dd,e0) { illegal_1(); op_e0(); } /* DB DD */
OP(dd,e1)2856 OP(dd,e1) { _R++; POP(IX); } /* POP IX */
OP(dd,e2)2857 OP(dd,e2) { illegal_1(); op_e2(); } /* DB DD */
OP(dd,e3)2858 OP(dd,e3) { _R++; EXSP(IX); } /* EX (SP),IX */
OP(dd,e4)2859 OP(dd,e4) { illegal_1(); op_e4(); } /* DB DD */
OP(dd,e5)2860 OP(dd,e5) { _R++; PUSH( IX ); } /* PUSH IX */
OP(dd,e6)2861 OP(dd,e6) { illegal_1(); op_e6(); } /* DB DD */
OP(dd,e7)2862 OP(dd,e7) { illegal_1(); op_e7(); } /* DB DD */
2863
OP(dd,e8)2864 OP(dd,e8) { illegal_1(); op_e8(); } /* DB DD */
OP(dd,e9)2865 OP(dd,e9) { _R++; _PC = _IX; change_pc16(_PCD); } /* JP (IX) */
OP(dd,ea)2866 OP(dd,ea) { illegal_1(); op_ea(); } /* DB DD */
OP(dd,eb)2867 OP(dd,eb) { illegal_1(); op_eb(); } /* DB DD */
OP(dd,ec)2868 OP(dd,ec) { illegal_1(); op_ec(); } /* DB DD */
OP(dd,ed)2869 OP(dd,ed) { illegal_1(); op_ed(); } /* DB DD */
OP(dd,ee)2870 OP(dd,ee) { illegal_1(); op_ee(); } /* DB DD */
OP(dd,ef)2871 OP(dd,ef) { illegal_1(); op_ef(); } /* DB DD */
2872
OP(dd,f0)2873 OP(dd,f0) { illegal_1(); op_f0(); } /* DB DD */
OP(dd,f1)2874 OP(dd,f1) { illegal_1(); op_f1(); } /* DB DD */
OP(dd,f2)2875 OP(dd,f2) { illegal_1(); op_f2(); } /* DB DD */
OP(dd,f3)2876 OP(dd,f3) { illegal_1(); op_f3(); } /* DB DD */
OP(dd,f4)2877 OP(dd,f4) { illegal_1(); op_f4(); } /* DB DD */
OP(dd,f5)2878 OP(dd,f5) { illegal_1(); op_f5(); } /* DB DD */
OP(dd,f6)2879 OP(dd,f6) { illegal_1(); op_f6(); } /* DB DD */
OP(dd,f7)2880 OP(dd,f7) { illegal_1(); op_f7(); } /* DB DD */
2881
OP(dd,f8)2882 OP(dd,f8) { illegal_1(); op_f8(); } /* DB DD */
OP(dd,f9)2883 OP(dd,f9) { _R++; _SP = _IX; } /* LD SP,IX */
OP(dd,fa)2884 OP(dd,fa) { illegal_1(); op_fa(); } /* DB DD */
OP(dd,fb)2885