1 /*
2
3 Super Trivia Master (c) 1986 Enerdyne Technologies Inc. (El Cajon, CA 92020)
4
5 CPU: Z80
6 Sound: AY-3-8912 (x3)
7 Other: Dallas DS1220Y NVRAM, N8T245N (x2), PAL16L8A-2CN (x2,protected)
8
9 XTAL = 12 MHz
10
11
12 driver by Pierpaolo Prazzoli, thanks to Tomasz Slanina too.
13
14 TODO:
15 - Colours
16 - Finish sound
17 - Cocktail support
18
19 */
20
21 #include "driver.h"
22 #include "vidhrdw/generic.h"
23
24 static int strvmstr_control = 0;
25 static UINT8 *bg_videoram, *fg_videoram;
26 static struct tilemap *bg_tilemap, *fg_tilemap;
27
WRITE_HANDLER(strvmstr_fg_w)28 static WRITE_HANDLER( strvmstr_fg_w )
29 {
30 fg_videoram[offset] = data;
31 tilemap_mark_tile_dirty(fg_tilemap,offset);
32 }
33
WRITE_HANDLER(strvmstr_bg_w)34 static WRITE_HANDLER( strvmstr_bg_w )
35 {
36 bg_videoram[offset] = data;
37 tilemap_mark_tile_dirty(bg_tilemap,offset);
38 }
39
WRITE_HANDLER(strvmstr_control_w)40 static WRITE_HANDLER( strvmstr_control_w )
41 {
42
43 /*
44
45 bits:
46 1 -> change to 1 or 0 when change screen orientation
47 2 -> setted in intro
48 3 -> background bank
49 4,5 -> question offsets
50 6 -> unused ?
51 7 -> unused ?
52 8 -> setted when coin is inserted
53
54 */
55
56 strvmstr_control = data;
57
58 if( data & 0x04)
59 {
60 tilemap_mark_all_tiles_dirty(ALL_TILEMAPS);
61 }
62 }
63
WRITE_HANDLER(a000_w)64 static WRITE_HANDLER( a000_w )
65 {
66 /* ? */
67 }
68
69
READ_HANDLER(strvmstr_question_r)70 static READ_HANDLER( strvmstr_question_r )
71 {
72 data8_t *Question = memory_region(REGION_USER1);
73 return Question[offset + 0x10000 * ((strvmstr_control >> 3) & 3)];
74 }
75
76 static int b800_prev,b000_val,b000_ret;
77
WRITE_HANDLER(b000_w)78 static WRITE_HANDLER( b000_w )
79 {
80 b000_val = data;
81 }
82
READ_HANDLER(b000_r)83 static READ_HANDLER( b000_r )
84 {
85 return b000_ret;
86 }
87
WRITE_HANDLER(b800_w)88 static WRITE_HANDLER( b800_w )
89 {
90 switch(data)
91 {
92 case 0xc4: b000_ret=AY8910_read_port_0_r(0); break;
93 case 0x94: b000_ret=AY8910_read_port_1_r(0); break;
94 case 0x86: b000_ret=AY8910_read_port_2_r(0); break;
95
96 case 0x80:
97 switch(b800_prev)
98 {
99 case 0xe0: AY8910_control_port_0_w(0,b000_val); break;
100 case 0x98: AY8910_control_port_1_w(0,b000_val); break;
101 case 0x83: AY8910_control_port_2_w(0,b000_val); break;
102
103 case 0xa0: AY8910_write_port_0_w(0,b000_val); break;
104 case 0x88: AY8910_write_port_1_w(0,b000_val); break;
105 case 0x81: AY8910_write_port_2_w(0,b000_val); break;
106
107 }
108 break;
109 }
110
111 b800_prev = data;
112 }
113
MEMORY_READ_START(readmem)114 static MEMORY_READ_START( readmem )
115 { 0x0000, 0x7fff, MRA_ROM },
116 { 0x8000, 0x87ff, MRA_RAM },
117 { 0xb000, 0xb000, b000_r },
118 { 0xc000, 0xc7ff, MRA_RAM },
119 { 0xe000, 0xe7ff, MRA_RAM },
120 MEMORY_END
121
122 static MEMORY_WRITE_START( writemem )
123 { 0x0000, 0x7fff, MWA_ROM },
124 { 0x8000, 0x87ff, MWA_RAM, &generic_nvram, &generic_nvram_size },
125 { 0x9000, 0x9000, strvmstr_control_w },
126 { 0x9800, 0x9800, MWA_NOP }, //always 0
127 { 0xa000, 0xa000, a000_w }, //bit 8 and 7 always actived? bit 6 actived in message edit (c0, e0, df)
128 { 0xb000, 0xb000, b000_w },
129 { 0xb800, 0xb800, b800_w }, //80, 83, 84, 86, 98, 94, 81, e0, a0
130 { 0xb801, 0xb801, MWA_NOP }, //always 0
131 { 0xc000, 0xc7ff, strvmstr_fg_w, &fg_videoram },
132 { 0xe000, 0xe7ff, strvmstr_bg_w, &bg_videoram },
133 MEMORY_END
134
135 static PORT_READ_START( readport )
136 { 0x0000, 0xffff, strvmstr_question_r },
137 PORT_END
138
139 INPUT_PORTS_START( strvmstr )
140 PORT_START
141 PORT_SERVICE( 0x01, IP_ACTIVE_LOW )
142 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
143 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
144 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
145 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
146 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
147 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
148 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
149 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
150 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
151 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON4 )
152 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON3 )
153 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 )
154 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 )
155
156 /* cocktail controls? */
157 PORT_START
158 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
159 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
160 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
161 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
162 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
163 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
164 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
165 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
166 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
167 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
168 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
169 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
170 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
171 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
172 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
173 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
174 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
175 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
176 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
177 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
178 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
179 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
180 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
181 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
182
183 PORT_START
184 PORT_BIT_IMPULSE( 0x01, IP_ACTIVE_HIGH, IPT_COIN1, 1 )
185 INPUT_PORTS_END
186
187 static struct GfxLayout charlayout =
188 {
189 8,8,
190 RGN_FRAC(1,2),
191 2,
192 { RGN_FRAC(0,2), RGN_FRAC(1,2) },
193 { 7, 6, 5, 4, 3, 2, 1, 0 },
194 { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
195 8*8
196 };
197
198 static struct GfxDecodeInfo gfxdecodeinfo[] =
199 {
200 { REGION_GFX1, 0, &charlayout, 0, 8 },
201 { REGION_GFX2, 0, &charlayout, 0, 8 },
202 { -1 }
203 };
204
get_tile_info_bg(int tile_index)205 static void get_tile_info_bg(int tile_index)
206 {
207 int code = bg_videoram[tile_index];
208
209 code += ((strvmstr_control & 4) << 6);
210
211 SET_TILE_INFO(0,code,0,0)
212 }
213
get_tile_info_fg(int tile_index)214 static void get_tile_info_fg(int tile_index)
215 {
216 int code = fg_videoram[tile_index];
217
218 code += ((strvmstr_control & 4) << 6);
219
220 SET_TILE_INFO(1,code,0,0)
221 }
222
VIDEO_START(strvmstr)223 VIDEO_START( strvmstr )
224 {
225 bg_tilemap = tilemap_create( get_tile_info_bg,tilemap_scan_rows,TILEMAP_OPAQUE,8,8,64,32 );
226 fg_tilemap = tilemap_create( get_tile_info_fg,tilemap_scan_rows,TILEMAP_TRANSPARENT,8,8,64,32 );
227
228 if( !bg_tilemap || !fg_tilemap )
229 return 1;
230
231 tilemap_set_transparent_pen(fg_tilemap,0);
232
233 return 0;
234 }
235
VIDEO_UPDATE(strvmstr)236 VIDEO_UPDATE( strvmstr )
237 {
238 tilemap_draw(bitmap,cliprect,bg_tilemap,0,0);
239 tilemap_draw(bitmap,cliprect,fg_tilemap,0,0);
240 }
241
242 static struct AY8910interface ay8912_interface =
243 {
244 3, /* 3 chip */
245 1500000,
246 { 25, 25, 25 },
247 { 0, input_port_1_r, input_port_0_r },
248 { 0, 0, 0 },
249 { 0, 0, 0 },
250 { 0, 0, 0 }
251 };
252
253
INTERRUPT_GEN(strvmstr_interrupt)254 static INTERRUPT_GEN( strvmstr_interrupt )
255 {
256 if( readinputport(2) & 0x01 )
257 {
258 cpu_set_irq_line(0, IRQ_LINE_NMI, PULSE_LINE);
259 }
260 else
261 {
262 cpu_set_irq_line(0, 0, PULSE_LINE);
263 }
264 }
265
266 #undef CLOCK
267 #define CLOCK 12000000/4-50000
268
269 static MACHINE_DRIVER_START( strvmstr )
270 MDRV_CPU_ADD(Z80,CLOCK) //should be ok, it gives the 300 interrupts expected
271 MDRV_CPU_FLAGS(CPU_16BIT_PORT)
272 MDRV_CPU_MEMORY(readmem,writemem)
273 MDRV_CPU_PORTS(readport,0)
274 MDRV_CPU_VBLANK_INT(strvmstr_interrupt,1)
275
276 MDRV_FRAMES_PER_SECOND(60)
277 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
278
279 MDRV_NVRAM_HANDLER(generic_0fill)
280
281 /* video hardware */
282 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
283 MDRV_SCREEN_SIZE(256, 256)
284 MDRV_VISIBLE_AREA(0*8, 32*8-1, 0*8, 28*8-1)
285 MDRV_GFXDECODE(gfxdecodeinfo)
286 MDRV_PALETTE_LENGTH(8)
287
288 MDRV_VIDEO_START(strvmstr)
289 MDRV_VIDEO_UPDATE(strvmstr)
290
291 /* sound hardware */
292 MDRV_SOUND_ADD(AY8910, ay8912_interface)
293 MACHINE_DRIVER_END
294
295 ROM_START( strvmstr )
296 ROM_REGION( 0x10000, REGION_CPU1, 0 )
297 ROM_LOAD( "stm16.u16", 0x0000, 0x8000, CRC(ae734db9) SHA1(1bacdfdebaa1f250bfbd49053c3910f1396afe11) )
298
299 ROM_REGION( 0x02000, REGION_GFX1, ROMREGION_DISPOSE )
300 ROM_LOAD( "stm44.rom", 0x0000, 0x1000, CRC(e69da710) SHA1(218a9d7600d67858d1f21282a0cebec0ae93e0ff) )
301 ROM_LOAD( "stm46.rom", 0x1000, 0x1000, CRC(d927a1f1) SHA1(63a49a61107deaf7a9f28b9653c310c5331f5143) )
302
303 ROM_REGION( 0x02000, REGION_GFX2, ROMREGION_DISPOSE )
304 ROM_LOAD( "stm48.rom", 0x0000, 0x1000, CRC(51719714) SHA1(fdecbd22ea65eec7b4b5138f89ddc5876b05def6) )
305 ROM_LOAD( "stm50.rom", 0x1000, 0x1000, CRC(cfc1a1d1) SHA1(9ef38f12360dd946651e67770742ca72fa6846f1) )
306
307 ROM_REGION( 0x00200, REGION_PROMS, 0 )
308 ROM_LOAD( "stm63.prm", 0x0000, 0x0100, CRC(305271cf) SHA1(6fd5fe085d79ca7aa57010cffbdb2a85b9c24701) )
309 ROM_LOAD( "stm64.prm", 0x0100, 0x0100, CRC(69ebc0b8) SHA1(de2b936e3246e3bfc7e2ff9546c1854ec3504cc2) )
310
311 ROM_REGION( 0x40000, REGION_USER1, 0 ) /* Question roms */
312 ROM_LOAD( "sex2.lo0", 0x00000, 0x8000, CRC(9c68b277) SHA1(34bc9d7b973fe482abd5e34a058b72eb5ec8db64) )
313 ROM_LOAD( "movies.lo1", 0x08000, 0x8000, CRC(16cba1b7) SHA1(8aa3eff72d1ec8dac906f2e803a88578a9fe763c) )
314 ROM_LOAD( "sci-fi.lo2", 0x10000, 0x8000, CRC(b5595f81) SHA1(5e7fa334f6541860a5c04e5f345673ea12efafb4) )
315 ROM_LOAD( "potprri.lo3", 0x18000, 0x8000, CRC(427eada9) SHA1(bac29ec637a17db95507c68fd73a8ce52744bf8e) )
316 ROM_LOAD( "sports.hi0", 0x20000, 0x8000, CRC(3678fb79) SHA1(4e40cc20707195c0e88e595f752a2982b531b57e) )
317 ROM_LOAD( "rock-pop.hi1", 0x28000, 0x8000, CRC(e2954db6) SHA1(d545236a844b63c85937ee8fb8e65bcd74b1bf43) )
318 ROM_LOAD( "cars.hi2", 0x30000, 0x8000, CRC(50310557) SHA1(7559c603625e4df442b440b8b08e6efef06e2781) )
319 ROM_LOAD( "entrtn.hi3", 0x38000, 0x8000, CRC(a8cf603b) SHA1(6efa5753d8d252452b3f5be8635a28364e4d8de1) )
320 ROM_END
321
322 GAMEX( 1986, strvmstr, 0, strvmstr, strvmstr, 0, ROT90, "Enerdyne Technologies Inc.", "Super Trivia Master", GAME_WRONG_COLORS | GAME_IMPERFECT_SOUND | GAME_NO_COCKTAIL )
323