1 /*****************************************************************************
2 *
3 * 6502dasm.c
4 * 6502/65c02/6510 disassembler
5 *
6 * Copyright (c) 1998 Juergen Buchmueller, all rights reserved.
7 *
8 * - This source code is released as freeware for non-commercial purposes.
9 * - You are free to use and redistribute this code in modified or
10 * unmodified form, provided you list me in the credits.
11 * - If you modify this source code, you must add a notice to each modified
12 * source file that it has been changed. If you're a nice person, you
13 * will clearly mark each change too. :)
14 * - If you wish to use this for commercial purposes, please contact me at
15 * pullmoll@t-online.de
16 * - The author of this copywritten work reserves the right to change the
17 * terms of its usage and license at any time, including retroactively
18 * - This entire notice must remain in the source code.
19 *
20 *****************************************************************************/
21 /* 2. February 2000 PeT added support for 65sc02 subtype */
22 /* 2. February 2000 PeT added support for 65ce02 variant */
23 /* 3. February 2000 PeT bbr bbs displayment */
24 /* 4. February 2000 PeT ply inw dew */
25 /* 4. February 2000 PeT fixed relative word operand */
26 /* 9. May 2000 PeT added m4510 */
27
28 #include <stdio.h>
29 #ifdef MAME_DEBUG
30 #include "driver.h"
31 #include "mamedbg.h"
32 #include "m6502.h"
33 #if (HAS_M65CE02)
34 #include "m65ce02.h"
35 #endif
36 #if (HAS_M6509)
37 #include "m6509.h"
38 #endif
39 #if (HAS_M4510)
40 #include "m4510.h"
41 #endif
42
43 #define OPCODE(A) cpu_readop(A)
44 #define ARGBYTE(A) cpu_readop_arg(A)
45 #define ARGWORD(A) cpu_readop_arg(A)+(cpu_readop_arg((A+1) & 0xffff) << 8)
46
47 #define RDMEM(A) cpu_readmem16(A)
48
49 enum addr_mode {
50 non, /* no additional arguments */
51 imp, /* implicit */
52 acc, /* accumulator */
53 imm, /* immediate */
54 iw2, /* immediate word (65ce02) */
55 iw3, /* augment (65ce02) */
56 adr, /* absolute address (jmp,jsr) */
57 aba, /* absolute */
58 zpg, /* zero page */
59 zpx, /* zero page + X */
60 zpy, /* zero page + Y */
61 zpi, /* zero page indirect (65c02) */
62 zpb, /* zero page and branch (65c02 bbr,bbs) */
63 abx, /* absolute + X */
64 aby, /* absolute + Y */
65 rel, /* relative */
66 rw2, /* relative word (65cs02, 65ce02) */
67 idx, /* zero page pre indexed */
68 idy, /* zero page post indexed */
69 idz, /* zero page post indexed (65ce02) */
70 isy, /* zero page pre indexed sp and post indexed y (65ce02) */
71 ind, /* indirect (jmp) */
72 iax /* indirect + X (65c02 jmp) */
73 };
74
75 enum opcodes {
76 adc, and, asl, bcc, bcs, beq, bit, bmi,
77 bne, bpl, brk, bvc, bvs, clc, cld, cli,
78 clv, cmp, cpx, cpy, dec, dex, dey, eor,
79 inc, inx, iny, jmp, jsr, lda, ldx, ldy,
80 lsr, nop, ora, pha, php, pla, plp, rol,
81 ror, rti, rts, sbc, sec, sed, sei, sta,
82 stx, sty, tax, tay, tsx, txa, txs, tya,
83 ill,
84 /* 65c02 (only) mnemonics */
85 bbr, bbs, bra, rmb, smb, stz, trb, tsb,
86 /* 65sc02 (only) mnemonics */
87 bsr,
88 /* 6510 + 65c02 mnemonics */
89 anc, asr, ast, arr, asx, axa, dcp, dea,
90 dop, ina, isc, lax, phx, phy, plx, ply,
91 rla, rra, sax, slo, sre, sah, say, ssh,
92 sxh, syh, top, oal, kil,
93 /* 65ce02 mnemonics */
94 cle, see, rtn, aug,
95 tab, tba, taz, tza, tys, tsy,
96 ldz, stz2/* real register store */,
97 dez, inz, cpz, phz, plz,
98 neg, asr2/* arithmetic shift right */,
99 asw, row, dew, inw, phw,
100 /* 4510 mnemonics */
101 map,
102
103 /* Deco CPU16 mnemonics */
104 vbl, u13, u8F, uAB, u87, u0B, uA3, u4B,
105 u3F, uBB, u23
106 };
107
108
109 static const char *token[]=
110 {
111 "adc", "and", "asl", "bcc", "bcs", "beq", "bit", "bmi",
112 "bne", "bpl", "brk", "bvc", "bvs", "clc", "cld", "cli",
113 "clv", "cmp", "cpx", "cpy", "dec", "dex", "dey", "eor",
114 "inc", "inx", "iny", "jmp", "jsr", "lda", "ldx", "ldy",
115 "lsr", "nop", "ora", "pha", "php", "pla", "plp", "rol",
116 "ror", "rti", "rts", "sbc", "sec", "sed", "sei", "sta",
117 "stx", "sty", "tax", "tay", "tsx", "txa", "txs", "tya",
118 "ill",
119 /* 65c02 mnemonics */
120 "bbr", "bbs", "bra", "rmb", "smb", "stz", "trb", "tsb",
121 /* 65sc02 (only) mnemonics */
122 "bsr",
123 /* 6510 mnemonics */
124 "anc", "asr", "ast", "arr", "asx", "axa", "dcp", "dea",
125 "dop", "ina", "isc", "lax", "phx", "phy", "plx", "ply",
126 "rla", "rra", "sax", "slo", "sre", "sah", "say", "ssh",
127 "sxh", "syh", "top", "oal", "kil",
128 /* 65ce02 mnemonics */
129 "cle", "see", "rtn", "aug",
130 "tab", "tba", "taz", "tza", "tys", "tsy",
131 "ldz", "stz",
132 "dez", "inz", "cpz", "phz", "plz",
133 "neg", "asr",
134 "asw", "row", "dew", "inw", "phw",
135 /* 4510 mnemonics */
136 "map",
137
138 /* Deco CPU16 mnemonics */
139 "VBL", "u13", "u8F", "uAB", "u87", "u0B", "uA3", "u4B",
140 "u3F", "uBB", "u23"
141 };
142
143 /* Some really short names for the EA access modes */
144 #define VAL EA_VALUE
145 #define JMP EA_ABS_PC
146 #define BRA EA_REL_PC
147 #define MRD EA_MEM_RD
148 #define MWR EA_MEM_WR
149 #define MRW EA_MEM_RDWR
150 #define ZRD EA_ZPG_RD
151 #define ZWR EA_ZPG_WR
152 #define ZRW EA_ZPG_RDWR
153
154 /* words */
155 #define MRD2 EA_MEM_RD
156 #define MRW2 EA_MEM_RDWR
157 #define ZRD2 EA_ZPG_RD
158 #define ZRW2 EA_ZPG_RDWR
159
160 static const UINT8 op6502[256][3] = {
161 {brk,imm,VAL},{ora,idx,MRD},{ill,non,0 },{ill,non,0 },/* 00 */
162 {ill,non,0 },{ora,zpg,ZRD},{asl,zpg,ZRW},{ill,non,0 },
163 {php,imp,0 },{ora,imm,VAL},{asl,acc,0 },{ill,non,0 },
164 {ill,non,0 },{ora,aba,MRD},{asl,aba,MRW},{ill,non,0 },
165 {bpl,rel,BRA},{ora,idy,MRD},{ill,non,0 },{ill,non,0 },/* 10 */
166 {ill,non,0 },{ora,zpx,ZRD},{asl,zpx,ZRW},{ill,non,0 },
167 {clc,imp,0 },{ora,aby,MRD},{ill,non,0 },{ill,non,0 },
168 {ill,non,0 },{ora,abx,MRD},{asl,abx,MRW},{ill,non,0 },
169 {jsr,adr,JMP},{and,idx,MRD},{ill,non,0 },{ill,non,0 },/* 20 */
170 {bit,zpg,ZRD},{and,zpg,ZRD},{rol,zpg,ZRW},{ill,non,0 },
171 {plp,imp,0 },{and,imm,VAL},{rol,acc,0 },{ill,non,0 },
172 {bit,aba,MRD},{and,aba,MRD},{rol,aba,MRW},{ill,non,0 },
173 {bmi,rel,BRA},{and,idy,MRD},{ill,non,0 },{ill,non,0 },/* 30 */
174 {ill,non,0 },{and,zpx,ZRD},{rol,zpx,ZRW},{ill,non,0 },
175 {sec,imp,0 },{and,aby,MRD},{ill,non,0 },{ill,non,0 },
176 {ill,non,0 },{and,abx,MRD},{rol,abx,MRW},{ill,non,0 },
177 {rti,imp,0 },{eor,idx,MRD},{ill,non,0 },{ill,non,0 },/* 40 */
178 {ill,non,0 },{eor,zpg,ZRD},{lsr,zpg,ZRW},{ill,non,0 },
179 {pha,imp,0 },{eor,imm,VAL},{lsr,acc,0 },{ill,non,0 },
180 {jmp,adr,JMP},{eor,aba,MRD},{lsr,aba,MRW},{ill,non,0 },
181 {bvc,rel,BRA},{eor,idy,MRD},{ill,non,0 },{ill,non,0 },/* 50 */
182 {ill,non,0 },{eor,zpx,ZRD},{lsr,zpx,ZRW},{ill,non,0 },
183 {cli,imp,0 },{eor,aby,MRD},{ill,non,0 },{ill,non,0 },
184 {ill,non,0 },{eor,abx,MRD},{lsr,abx,MRW},{ill,non,0 },
185 {rts,imp,0 },{adc,idx,MRD},{ill,non,0 },{ill,non,0 },/* 60 */
186 {ill,non,0 },{adc,zpg,ZRD},{ror,zpg,ZRW},{ill,non,0 },
187 {pla,imp,0 },{adc,imm,VAL},{ror,acc,0 },{ill,non,0 },
188 {jmp,ind,JMP},{adc,aba,MRD},{ror,aba,MRW},{ill,non,0 },
189 {bvs,rel,BRA},{adc,idy,MRD},{ill,non,0 },{ill,non,0 },/* 70 */
190 {ill,non,0 },{adc,zpx,ZRD},{ror,zpx,ZRW},{ill,non,0 },
191 {sei,imp,0 },{adc,aby,MRD},{ill,non,0 },{ill,non,0 },
192 {ill,non,0 },{adc,abx,MRD},{ror,abx,MRW},{ill,non,0 },
193 {ill,non,0 },{sta,idx,MWR},{ill,non,0 },{ill,non,0 },/* 80 */
194 {sty,zpg,ZWR},{sta,zpg,ZWR},{stx,zpg,ZWR},{ill,non,0 },
195 {dey,imp,0 },{ill,non,0 },{txa,imp,0 },{ill,non,0 },
196 {sty,aba,MWR},{sta,aba,MWR},{stx,aba,MWR},{ill,non,0 },
197 {bcc,rel,BRA},{sta,idy,MWR},{ill,non,0 },{ill,non,0 },/* 90 */
198 {sty,zpx,ZWR},{sta,zpx,ZWR},{stx,zpy,ZWR},{ill,non,0 },
199 {tya,imp,0 },{sta,aby,MWR},{txs,imp,0 },{ill,non,0 },
200 {ill,non,0 },{sta,abx,MWR},{ill,non,0 },{ill,non,0 },
201 {ldy,imm,VAL},{lda,idx,MRD},{ldx,imm,VAL},{ill,non,0 },/* a0 */
202 {ldy,zpg,ZRD},{lda,zpg,ZRD},{ldx,zpg,ZRD},{ill,non,0 },
203 {tay,imp,0 },{lda,imm,VAL},{tax,imp,0 },{ill,non,0 },
204 {ldy,aba,MRD},{lda,aba,MRD},{ldx,aba,MRD},{ill,non,0 },
205 {bcs,rel,BRA},{lda,idy,MRD},{ill,non,0 },{ill,non,0 },/* b0 */
206 {ldy,zpx,ZRD},{lda,zpx,ZRD},{ldx,zpy,ZRD},{ill,non,0 },
207 {clv,imp,0 },{lda,aby,MRD},{tsx,imp,0 },{ill,non,0 },
208 {ldy,abx,MRD},{lda,abx,MRD},{ldx,aby,MRD},{ill,non,0 },
209 {cpy,imm,VAL},{cmp,idx,MRD},{ill,non,0 },{ill,non,0 },/* c0 */
210 {cpy,zpg,ZRD},{cmp,zpg,ZRD},{dec,zpg,ZRW},{ill,non,0 },
211 {iny,imp,0 },{cmp,imm,VAL},{dex,imp,0 },{ill,non,0 },
212 {cpy,aba,MRD},{cmp,aba,MRD},{dec,aba,MRW},{ill,non,0 },
213 {bne,rel,BRA},{cmp,idy,MRD},{ill,non,0 },{ill,non,0 },/* d0 */
214 {ill,non,0 },{cmp,zpx,ZRD},{dec,zpx,ZRW},{ill,non,0 },
215 {cld,imp,0 },{cmp,aby,MRD},{ill,non,0 },{ill,non,0 },
216 {ill,non,0 },{cmp,abx,MRD},{dec,abx,MRW},{ill,non,0 },
217 {cpx,imm,VAL},{sbc,idx,MRD},{ill,non,0 },{ill,non,0 },/* e0 */
218 {cpx,zpg,ZRD},{sbc,zpg,ZRD},{inc,zpg,ZRW},{ill,non,0 },
219 {inx,imp,0 },{sbc,imm,VAL},{nop,imp,0 },{ill,non,0 },
220 {cpx,aba,MRD},{sbc,aba,MRD},{inc,aba,MRW},{ill,non,0 },
221 {beq,rel,BRA},{sbc,idy,MRD},{ill,non,0 },{ill,non,0 },/* f0 */
222 {ill,non,0 },{sbc,zpx,ZRD},{inc,zpx,ZRW},{ill,non,0 },
223 {sed,imp,0 },{sbc,aby,MRD},{ill,non,0 },{ill,non,0 },
224 {ill,non,0 },{sbc,abx,MRD},{inc,abx,MRW},{ill,non,0 }
225 };
226
227 static const UINT8 op65c02[256][3] = {
228 {brk,imm,VAL},{ora,idx,MRD},{ill,non,0 },{ill,non,0 },/* 00 */
229 {tsb,zpg,0 },{ora,zpg,ZRD},{asl,zpg,ZRW},{rmb,zpg,ZRW},
230 {php,imp,0 },{ora,imm,VAL},{asl,acc,MRW},{ill,non,0 },
231 {tsb,aba,MRD},{ora,aba,MRD},{asl,aba,MRW},{bbr,zpb,ZRD},
232 {bpl,rel,BRA},{ora,idy,MRD},{ora,zpi,MRD},{ill,non,0 },/* 10 */
233 {trb,zpg,ZRD},{ora,zpx,ZRD},{asl,zpx,ZRW},{rmb,zpg,ZRW},
234 {clc,imp,0 },{ora,aby,MRD},{ina,imp,0 },{ill,non,0 },
235 {trb,aba,MRD},{ora,abx,MRD},{asl,abx,MRW},{bbr,zpb,ZRD},
236 {jsr,adr,0 },{and,idx,MRD},{ill,non,0 },{ill,non,0 },/* 20 */
237 {bit,zpg,ZRD},{and,zpg,ZRD},{rol,zpg,ZRW},{rmb,zpg,ZRW},
238 {plp,imp,0 },{and,imm,VAL},{rol,acc,0 },{ill,non,0 },
239 {bit,aba,MRD},{and,aba,MRD},{rol,aba,MRW},{bbr,zpb,ZRD},
240 {bmi,rel,BRA},{and,idy,MRD},{and,zpi,MRD},{ill,non,0 },/* 30 */
241 {bit,zpx,ZRD},{and,zpx,ZRD},{rol,zpx,ZRW},{rmb,zpg,ZRW},
242 {sec,imp,0 },{and,aby,MRD},{dea,imp,0 },{ill,non,0 },
243 {bit,abx,MRD},{and,abx,MRD},{rol,abx,MRW},{bbr,zpb,ZRD},
244 {rti,imp,0 },{eor,idx,MRD},{ill,non,0 },{ill,non,0 },/* 40 */
245 {ill,non,0 },{eor,zpg,ZRD},{lsr,zpg,ZRW},{rmb,zpg,ZRW},
246 {pha,imp,0 },{eor,imm,VAL},{lsr,acc,0 },{ill,non,0 },
247 {jmp,adr,JMP},{eor,aba,MRD},{lsr,aba,MRW},{bbr,zpb,ZRD},
248 {bvc,rel,BRA},{eor,idy,MRD},{eor,zpi,MRD},{ill,non,0 },/* 50 */
249 {ill,non,0 },{eor,zpx,ZRD},{lsr,zpx,ZRW},{rmb,zpg,ZRW},
250 {cli,imp,0 },{eor,aby,MRD},{phy,imp,0 },{ill,non,0 },
251 {ill,non,0 },{eor,abx,MRD},{lsr,abx,MRW},{bbr,zpb,ZRD},
252 {rts,imp,0 },{adc,idx,MRD},{ill,non,0 },{ill,non,0 },/* 60 */
253 {stz,zpg,ZWR},{adc,zpg,ZRD},{ror,zpg,ZRW},{rmb,zpg,ZRW},
254 {pla,imp,0 },{adc,imm,VAL},{ror,acc,0 },{ill,non,0 },
255 {jmp,ind,JMP},{adc,aba,MRD},{ror,aba,MRW},{bbr,zpb,ZRD},
256 {bvs,rel,BRA},{adc,idy,MRD},{adc,zpi,MRD},{ill,non,0 },/* 70 */
257 {stz,zpx,ZWR},{adc,zpx,ZRD},{ror,zpx,ZRW},{rmb,zpg,ZRW},
258 {sei,imp,0 },{adc,aby,MRD},{ply,imp,0 },{ill,non,0 },
259 {jmp,iax,JMP},{adc,abx,MRD},{ror,abx,MRW},{bbr,zpb,ZRD},
260 {bra,rel,BRA},{sta,idx,MWR},{ill,non,0 },{ill,non,0 },/* 80 */
261 {sty,zpg,ZWR},{sta,zpg,ZWR},{stx,zpg,ZWR},{smb,zpg,ZRW},
262 {dey,imp,0 },{bit,imm,VAL},{txa,imp,0 },{ill,non,0 },
263 {sty,aba,MWR},{sta,aba,MWR},{stx,aba,MWR},{bbs,zpb,ZRD},
264 {bcc,rel,BRA},{sta,idy,MWR},{sta,zpi,MWR},{ill,non,0 },/* 90 */
265 {sty,zpx,ZWR},{sta,zpx,ZWR},{stx,zpy,ZWR},{smb,zpg,ZRW},
266 {tya,imp,0 },{sta,aby,MWR},{txs,imp,0 },{ill,non,0 },
267 {stz,aba,MWR},{sta,abx,MWR},{stz,abx,MWR},{bbs,zpb,ZRD},
268 {ldy,imm,VAL},{lda,idx,MRD},{ldx,imm,VAL},{ill,non,0 },/* a0 */
269 {ldy,zpg,ZRD},{lda,zpg,ZRD},{ldx,zpg,ZRD},{smb,zpg,ZRW},
270 {tay,imp,0 },{lda,imm,VAL},{tax,imp,0 },{ill,non,0 },
271 {ldy,aba,MRD},{lda,aba,MRD},{ldx,aba,MRD},{bbs,zpb,ZRD},
272 {bcs,rel,BRA},{lda,idy,MRD},{lda,zpi,MRD},{ill,non,0 },/* b0 */
273 {ldy,zpx,ZRD},{lda,zpx,ZRD},{ldx,zpy,ZRD},{smb,zpg,ZRW},
274 {clv,imp,0 },{lda,aby,MRD},{tsx,imp,0 },{ill,non,0 },
275 {ldy,abx,MRD},{lda,abx,MRD},{ldx,aby,MRD},{bbs,zpb,ZRD},
276 {cpy,imm,VAL},{cmp,idx,MRD},{ill,non,0 },{ill,non,0 },/* c0 */
277 {cpy,zpg,ZRD},{cmp,zpg,ZRD},{dec,zpg,ZRW},{smb,zpg,ZRW},
278 {iny,imp,0 },{cmp,imm,VAL},{dex,imp,0 },{ill,non,0 },
279 {cpy,aba,MRD},{cmp,aba,MRD},{dec,aba,MRW},{bbs,zpb,ZRD},
280 {bne,rel,BRA},{cmp,idy,MRD},{cmp,zpi,MRD},{ill,non,0 },/* d0 */
281 {ill,non,0 },{cmp,zpx,ZRD},{dec,zpx,ZRW},{smb,zpg,ZRW},
282 {cld,imp,0 },{cmp,aby,MRD},{phx,imp,0 },{ill,non,0 },
283 {ill,non,0 },{cmp,abx,MRD},{dec,abx,MRW},{bbs,zpb,ZRD},
284 {cpx,imm,VAL},{sbc,idx,MRD},{ill,non,0 },{ill,non,0 },/* e0 */
285 {cpx,zpg,ZRD},{sbc,zpg,ZRD},{inc,zpg,ZRW},{smb,zpg,ZRW},
286 {inx,imp,0 },{sbc,imm,VAL},{nop,imp,0 },{ill,non,0 },
287 {cpx,aba,MRD},{sbc,aba,MRD},{inc,aba,MRW},{bbs,zpb,ZRD},
288 {beq,rel,BRA},{sbc,idy,MRD},{sbc,zpi,MRD},{ill,non,0 },/* f0 */
289 {ill,non,0 },{sbc,zpx,ZRD},{inc,zpx,ZRW},{smb,zpg,ZRW},
290 {sed,imp,0 },{sbc,aby,MRD},{plx,imp,0 },{ill,non,0 },
291 {ill,non,0 },{sbc,abx,MRD},{inc,abx,MRW},{bbs,zpb,ZRD}
292 };
293
294 /* only bsr additional to 65c02 yet */
295 static const UINT8 op65sc02[256][3] = {
296 {brk,imm,VAL},{ora,idx,MRD},{ill,non,0 },{ill,non,0 },/* 00 */
297 {tsb,zpg,0 },{ora,zpg,ZRD},{asl,zpg,ZRW},{rmb,zpg,ZRW},
298 {php,imp,0 },{ora,imm,VAL},{asl,acc,MRW},{ill,non,0 },
299 {tsb,aba,MRD},{ora,aba,MRD},{asl,aba,MRW},{bbr,zpb,ZRD},
300 {bpl,rel,BRA},{ora,idy,MRD},{ora,zpi,MRD},{ill,non,0 },/* 10 */
301 {trb,zpg,ZRD},{ora,zpx,ZRD},{asl,zpx,ZRW},{rmb,zpg,ZRW},
302 {clc,imp,0 },{ora,aby,MRD},{ina,imp,0 },{ill,non,0 },
303 {trb,aba,MRD},{ora,abx,MRD},{asl,abx,MRW},{bbr,zpb,ZRD},
304 {jsr,adr,0 },{and,idx,MRD},{ill,non,0 },{ill,non,0 },/* 20 */
305 {bit,zpg,ZRD},{and,zpg,ZRD},{rol,zpg,ZRW},{rmb,zpg,ZRW},
306 {plp,imp,0 },{and,imm,VAL},{rol,acc,0 },{ill,non,0 },
307 {bit,aba,MRD},{and,aba,MRD},{rol,aba,MRW},{bbr,zpb,ZRD},
308 {bmi,rel,BRA},{and,idy,MRD},{and,zpi,MRD},{ill,non,0 },/* 30 */
309 {bit,zpx,ZRD},{and,zpx,ZRD},{rol,zpx,ZRW},{rmb,zpg,ZRW},
310 {sec,imp,0 },{and,aby,MRD},{dea,imp,0 },{ill,non,0 },
311 {bit,abx,MRD},{and,abx,MRD},{rol,abx,MRW},{bbr,zpb,ZRD},
312 {rti,imp,0 },{eor,idx,MRD},{ill,non,0 },{ill,non,0 },/* 40 */
313 {ill,non,0 },{eor,zpg,ZRD},{lsr,zpg,ZRW},{rmb,zpg,ZRW},
314 {pha,imp,0 },{eor,imm,VAL},{lsr,acc,0 },{ill,non,0 },
315 {jmp,adr,JMP},{eor,aba,MRD},{lsr,aba,MRW},{bbr,zpb,ZRD},
316 {bvc,rel,BRA},{eor,idy,MRD},{eor,zpi,MRD},{ill,non,0 },/* 50 */
317 {ill,non,0 },{eor,zpx,ZRD},{lsr,zpx,ZRW},{rmb,zpg,ZRW},
318 {cli,imp,0 },{eor,aby,MRD},{phy,imp,0 },{ill,non,0 },
319 {ill,non,0 },{eor,abx,MRD},{lsr,abx,MRW},{bbr,zpb,ZRD},
320 {rts,imp,0 },{adc,idx,MRD},{ill,non,0 },{bsr,rw2,BRA},/* 60 */
321 {stz,zpg,ZWR},{adc,zpg,ZRD},{ror,zpg,ZRW},{rmb,zpg,ZRW},
322 {pla,imp,0 },{adc,imm,VAL},{ror,acc,0 },{ill,non,0 },
323 {jmp,ind,JMP},{adc,aba,MRD},{ror,aba,MRW},{bbr,zpb,ZRD},
324 {bvs,rel,BRA},{adc,idy,MRD},{adc,zpi,MRD},{ill,non,0 },/* 70 */
325 {stz,zpx,ZWR},{adc,zpx,ZRD},{ror,zpx,ZRW},{rmb,zpg,ZRW},
326 {sei,imp,0 },{adc,aby,MRD},{ply,imp,0 },{ill,non,0 },
327 {jmp,iax,JMP},{adc,abx,MRD},{ror,abx,MRW},{bbr,zpb,ZRD},
328 {bra,rel,BRA},{sta,idx,MWR},{ill,non,0 },{ill,non,0 },/* 80 */
329 {sty,zpg,ZWR},{sta,zpg,ZWR},{stx,zpg,ZWR},{smb,zpg,ZRW},
330 {dey,imp,0 },{bit,imm,VAL},{txa,imp,0 },{ill,non,0 },
331 {sty,aba,MWR},{sta,aba,MWR},{stx,aba,MWR},{bbs,zpb,ZRD},
332 {bcc,rel,BRA},{sta,idy,MWR},{sta,zpi,MWR},{ill,non,0 },/* 90 */
333 {sty,zpx,ZWR},{sta,zpx,ZWR},{stx,zpy,ZWR},{smb,zpg,ZRW},
334 {tya,imp,0 },{sta,aby,MWR},{txs,imp,0 },{ill,non,0 },
335 {stz,aba,MWR},{sta,abx,MWR},{stz,abx,MWR},{bbs,zpb,ZRD},
336 {ldy,imm,VAL},{lda,idx,MRD},{ldx,imm,VAL},{ill,non,0 },/* a0 */
337 {ldy,zpg,ZRD},{lda,zpg,ZRD},{ldx,zpg,ZRD},{smb,zpg,ZRW},
338 {tay,imp,0 },{lda,imm,VAL},{tax,imp,0 },{ill,non,0 },
339 {ldy,aba,MRD},{lda,aba,MRD},{ldx,aba,MRD},{bbs,zpb,ZRD},
340 {bcs,rel,BRA},{lda,idy,MRD},{lda,zpi,MRD},{ill,non,0 },/* b0 */
341 {ldy,zpx,ZRD},{lda,zpx,ZRD},{ldx,zpy,ZRD},{smb,zpg,ZRW},
342 {clv,imp,0 },{lda,aby,MRD},{tsx,imp,0 },{ill,non,0 },
343 {ldy,abx,MRD},{lda,abx,MRD},{ldx,aby,MRD},{bbs,zpb,ZRD},
344 {cpy,imm,VAL},{cmp,idx,MRD},{ill,non,0 },{ill,non,0 },/* c0 */
345 {cpy,zpg,ZRD},{cmp,zpg,ZRD},{dec,zpg,ZRW},{smb,zpg,ZRW},
346 {iny,imp,0 },{cmp,imm,VAL},{dex,imp,0 },{ill,non,0 },
347 {cpy,aba,MRD},{cmp,aba,MRD},{dec,aba,MRW},{bbs,zpb,ZRD},
348 {bne,rel,BRA},{cmp,idy,MRD},{cmp,zpi,MRD},{ill,non,0 },/* d0 */
349 {ill,non,0 },{cmp,zpx,ZRD},{dec,zpx,ZRW},{smb,zpg,ZRW},
350 {cld,imp,0 },{cmp,aby,MRD},{phx,imp,0 },{ill,non,0 },
351 {ill,non,0 },{cmp,abx,MRD},{dec,abx,MRW},{bbs,zpb,ZRD},
352 {cpx,imm,VAL},{sbc,idx,MRD},{ill,non,0 },{ill,non,0 },/* e0 */
353 {cpx,zpg,ZRD},{sbc,zpg,ZRD},{inc,zpg,ZRW},{smb,zpg,ZRW},
354 {inx,imp,0 },{sbc,imm,VAL},{nop,imp,0 },{ill,non,0 },
355 {cpx,aba,MRD},{sbc,aba,MRD},{inc,aba,MRW},{bbs,zpb,ZRD},
356 {beq,rel,BRA},{sbc,idy,MRD},{sbc,zpi,MRD},{ill,non,0 },/* f0 */
357 {ill,non,0 },{sbc,zpx,ZRD},{inc,zpx,ZRW},{smb,zpg,ZRW},
358 {sed,imp,0 },{sbc,aby,MRD},{plx,imp,0 },{ill,non,0 },
359 {ill,non,0 },{sbc,abx,MRD},{inc,abx,MRW},{bbs,zpb,ZRD}
360 };
361
362 static const UINT8 op6510[256][3] = {
363 {brk,imm,VAL},{ora,idx,MRD},{kil,non,0 },{slo,idx,MRW},/* 00 */
364 {dop,imm,VAL},{ora,zpg,ZRD},{asl,zpg,ZRW},{slo,zpg,ZRW},
365 {php,imp,0 },{ora,imm,VAL},{asl,acc,0 },{anc,imm,VAL},
366 {top,iw2,VAL},{ora,aba,MRD},{asl,aba,MRW},{slo,aba,MRW},
367 {bpl,rel,BRA},{ora,idy,MRD},{nop,imp,0 },{slo,idy,MRW},/* 10 */
368 {dop,imm,VAL},{ora,zpx,ZRD},{asl,zpx,ZRW},{slo,zpx,ZRW},
369 {clc,imp,0 },{ora,aby,MRD},{kil,non,0 },{slo,aby,MRW},
370 {top,iw2,VAL},{ora,abx,MRD},{asl,abx,MRW},{slo,abx,MRW},
371 {jsr,adr,JMP},{and,idx,MRD},{kil,non,0 },{rla,idx,MRW},/* 20 */
372 {bit,zpg,ZRD},{and,zpg,ZRD},{rol,zpg,ZRW},{rla,zpg,ZRW},
373 {plp,imp,0 },{and,imm,VAL},{rol,acc,0 },{anc,imm,VAL},
374 {bit,aba,MRD},{and,aba,MRD},{rol,aba,MRW},{rla,aba,MRW},
375 {bmi,rel,BRA},{and,idy,MRD},{kil,non,0 },{rla,idy,MRW},/* 30 */
376 {dop,imm,VAL},{and,zpx,ZRD},{rol,zpx,ZRW},{rla,zpx,ZRW},
377 {sec,imp,0 },{and,aby,MRD},{nop,imp,0 },{rla,aby,MRW},
378 {top,iw2,VAL},{and,abx,MRD},{rol,abx,MRW},{rla,abx,MRW},
379 {rti,imp,0 },{eor,idx,MRD},{kil,non,0 },{sre,idx,MRW},/* 40 */
380 {dop,imm,VAL},{eor,zpg,ZRD},{lsr,zpg,ZRW},{sre,zpg,ZRW},
381 {pha,imp,0 },{eor,imm,VAL},{lsr,acc,0 },{asr,imm,VAL},
382 {jmp,adr,JMP},{eor,aba,MRD},{lsr,aba,MRW},{sre,aba,MRW},
383 {bvc,rel,BRA},{eor,idy,MRD},{kil,non,0 },{sre,idy,MRW},/* 50 */
384 {dop,imm,VAL},{eor,zpx,ZRD},{lsr,zpx,ZRW},{sre,zpx,ZRW},
385 {cli,imp,0 },{eor,aby,MRD},{nop,imp,0 },{sre,aby,MRW},
386 {top,iw2,VAL},{eor,abx,MRD},{lsr,abx,MRW},{sre,abx,MRW},
387 {rts,imp,0 },{adc,idx,MRD},{kil,non,0 },{rra,idx,MRW},/* 60 */
388 {dop,imm,VAL},{adc,zpg,ZRD},{ror,zpg,ZRW},{rra,zpg,ZRW},
389 {pla,imp,0 },{adc,imm,VAL},{ror,acc,0 },{arr,imm,VAL},
390 {jmp,ind,JMP},{adc,aba,MRD},{ror,aba,MRW},{rra,aba,MRW},
391 {bvs,rel,BRA},{adc,idy,MRD},{kil,non,0 },{rra,idy,MRW},/* 70 */
392 {dop,imm,VAL},{adc,zpx,ZRD},{ror,zpx,ZRW},{rra,zpx,ZRW},
393 {sei,imp,0 },{adc,aby,MRD},{nop,imp,0 },{rra,aby,MRW},
394 {top,iw2,VAL},{adc,abx,MRD},{ror,abx,MRW},{rra,abx,MRW},
395 {dop,imm,VAL},{sta,idx,MWR},{dop,imm,VAL},{sax,idx,MWR},/* 80 */
396 {sty,zpg,ZWR},{sta,zpg,ZWR},{stx,zpg,ZWR},{sax,zpg,ZWR},
397 {dey,imp,0 },{dop,imm,VAL},{txa,imp,0 },{axa,imm,VAL},
398 {sty,aba,MWR},{sta,aba,MWR},{stx,aba,MWR},{sax,aba,MWR},
399 {bcc,rel,BRA},{sta,idy,MWR},{kil,non,0 },{say,idy,MWR},/* 90 */
400 {sty,zpx,ZWR},{sta,zpx,ZWR},{stx,zpy,ZWR},{sax,zpx,ZWR},
401 {tya,imp,0 },{sta,aby,MWR},{txs,imp,0 },{ssh,aby,MWR},
402 {syh,abx,0 },{sta,abx,MWR},{sxh,aby,MWR},{sah,aby,MWR},
403 {ldy,imm,VAL},{lda,idx,MRD},{ldx,imm,VAL},{lax,idx,MRD},/* a0 */
404 {ldy,zpg,ZRD},{lda,zpg,ZRD},{ldx,zpg,ZRD},{lax,zpg,ZRD},
405 {tay,imp,0 },{lda,imm,VAL},{tax,imp,0 },{oal,imm,VAL},
406 {ldy,aba,MRD},{lda,aba,MRD},{ldx,aba,MRD},{lax,aba,MRD},
407 {bcs,rel,BRA},{lda,idy,MRD},{kil,non,0 },{lax,idy,MRD},/* b0 */
408 {ldy,zpx,ZRD},{lda,zpx,ZRD},{ldx,zpy,ZRD},{lax,zpx,ZRD},
409 {clv,imp,0 },{lda,aby,MRD},{tsx,imp,0 },{ast,aby,MRD},
410 {ldy,abx,MRD},{lda,abx,MRD},{ldx,aby,MRD},{lax,abx,MRD},
411 {cpy,imm,VAL},{cmp,idx,MRD},{dop,imm,VAL},{dcp,idx,MRW},/* c0 */
412 {cpy,zpg,ZRD},{cmp,zpg,ZRD},{dec,zpg,ZRW},{dcp,zpg,ZRW},
413 {iny,imp,0 },{cmp,imm,VAL},{dex,imp,0 },{asx,imm,VAL},
414 {cpy,aba,MRD},{cmp,aba,MRD},{dec,aba,MRW},{dcp,aba,MRW},
415 {bne,rel,BRA},{cmp,idy,MRD},{kil,non,0 },{dcp,idy,MRW},/* d0 */
416 {dop,imm,VAL},{cmp,zpx,ZRD},{dec,zpx,ZRW},{dcp,zpx,ZRW},
417 {cld,imp,0 },{cmp,aby,MRD},{nop,imp,0 },{dcp,aby,MRW},
418 {top,iw2,VAL},{cmp,abx,MRD},{dec,abx,MRW},{dcp,abx,MRW},
419 {cpx,imm,VAL},{sbc,idx,MRD},{dop,imm,VAL},{isc,idx,MRW},/* e0 */
420 {cpx,zpg,ZRD},{sbc,zpg,ZRD},{inc,zpg,ZRW},{isc,zpg,ZRW},
421 {inx,imp,0 },{sbc,imm,VAL},{nop,imp,0 },{sbc,imm,VAL},
422 {cpx,aba,MRD},{sbc,aba,MRD},{inc,aba,MRW},{isc,aba,MRW},
423 {beq,rel,BRA},{sbc,idy,MRD},{kil,non,0 },{isc,idy,MRW},/* f0 */
424 {dop,imm,VAL},{sbc,zpx,ZRD},{inc,zpx,ZRW},{isc,zpx,ZRW},
425 {sed,imp,0 },{sbc,aby,MRD},{nop,imp,0 },{isc,aby,MRW},
426 {top,iw2,VAL},{sbc,abx,MRD},{inc,abx,MRW},{isc,abx,MRW}
427 };
428
429 #if (HAS_M65CE02)
430 static const UINT8 op65ce02[256][3] = {
431 {brk,imm,VAL},{ora,idx,MRD},{cle,imp,0 },{see,imp,0 },/* 00 */
432 {tsb,zpg,0 },{ora,zpg,ZRD},{asl,zpg,ZRW},{rmb,zpg,ZRW},
433 {php,imp,0 },{ora,imm,VAL},{asl,acc,MRW},{tsy,imp,0 },
434 {tsb,aba,MRD},{ora,aba,MRD},{asl,aba,MRW},{bbr,zpb,ZRD},
435 {bpl,rel,BRA},{ora,idy,MRD},{ora,idz,MRD},{bpl,rw2,BRA},/* 10 */
436 {trb,zpg,ZRD},{ora,zpx,ZRD},{asl,zpx,ZRW},{rmb,zpg,ZRW},
437 {clc,imp,0 },{ora,aby,MRD},{ina,imp,0 },{inz,imp,0 },
438 {trb,aba,MRD},{ora,abx,MRD},{asl,abx,MRW},{bbr,zpb,ZRD},
439 {jsr,adr,0 },{and,idx,MRD},{jsr,ind,0 },{jsr,iax,0 },/* 20 */
440 {bit,zpg,ZRD},{and,zpg,ZRD},{rol,zpg,ZRW},{rmb,zpg,ZRW},
441 {plp,imp,0 },{and,imm,VAL},{rol,acc,0 },{tys,imp,0 },
442 {bit,aba,MRD},{and,aba,MRD},{rol,aba,MRW},{bbr,zpb,ZRD},
443 {bmi,rel,BRA},{and,idz,MRD},{and,zpi,MRD},{bmi,rw2,BRA},/* 30 */
444 {bit,zpx,ZRD},{and,zpx,ZRD},{rol,zpx,ZRW},{rmb,zpg,ZRW},
445 {sec,imp,0 },{and,aby,MRD},{dea,imp,0 },{dez,imp,0 },
446 {bit,abx,MRD},{and,abx,MRD},{rol,abx,MRW},{bbr,zpb,ZRD},
447 {rti,imp,0 },{eor,idx,MRD},{neg,imp,0 },{asr2,imp,0 },/* 40 */
448 {asr2,zpg,ZRW},{eor,zpg,ZRD},{lsr,zpg,ZRW},{rmb,zpg,ZRW},
449 {pha,imp,0 },{eor,imm,VAL},{lsr,acc,0 },{taz,imp,0 },
450 {jmp,adr,JMP},{eor,aba,MRD},{lsr,aba,MRW},{bbr,zpb,ZRD},
451 {bvc,rel,BRA},{eor,idy,MRD},{eor,idz,MRD},{bvc,rw2,BRA},/* 50 */
452 {asr2,zpx,ZRW},{eor,zpx,ZRD},{lsr,zpx,ZRW},{rmb,zpg,ZRW},
453 {cli,imp,0 },{eor,aby,MRD},{phy,imp,0 },{tab,imp,0 },
454 {aug,iw3,0 },{eor,abx,MRD},{lsr,abx,MRW},{bbr,zpb,ZRD},
455 {rts,imp,0 },{adc,idx,MRD},{rtn,imm,VAL},{bsr,rw2,BRA},/* 60 */
456 {stz2,zpg,ZWR},{adc,zpg,ZRD},{ror,zpg,ZRW},{rmb,zpg,ZRW},
457 {pla,imp,0 },{adc,imm,VAL},{ror,acc,0 },{tza,imp,0 },
458 {jmp,ind,JMP},{adc,aba,MRD},{ror,aba,MRW},{bbr,zpb,ZRD},
459 {bvs,rel,BRA},{adc,idy,MRD},{adc,zpi,MRD},{bvs,rw2,BRA},/* 70 */
460 {stz2,zpx,ZWR},{adc,zpx,ZRD},{ror,zpx,ZRW},{rmb,zpg,ZRW},
461 {sei,imp,0 },{adc,aby,MRD},{ply,imp,0 },{tba,imp,0 },
462 {jmp,iax,JMP},{adc,abx,MRD},{ror,abx,MRW},{bbr,zpb,ZRD},
463 {bra,rel,BRA},{sta,idx,MWR},{sta,isy,MWR},{bra,rw2,BRA},/* 80 */
464 {sty,zpg,ZWR},{sta,zpg,ZWR},{stx,zpg,ZWR},{smb,zpg,ZRW},
465 {dey,imp,0 },{bit,imm,VAL},{txa,imp,0 },{sty,abx,MWR},
466 {sty,aba,MWR},{sta,aba,MWR},{stx,aba,MWR},{bbs,zpb,ZRD},
467 {bcc,rel,BRA},{sta,idy,MWR},{sta,inz,MWR},{bcc,rw2,BRA},/* 90 */
468 {sty,zpx,ZWR},{sta,zpx,ZWR},{stx,zpy,ZWR},{smb,zpg,ZRW},
469 {tya,imp,0 },{sta,aby,MWR},{txs,imp,0 },{stx,aby,MWR},
470 {stz2,aba,MWR},{sta,abx,MWR},{stz2,abx,MWR},{bbs,zpb,ZRD},
471 {ldy,imm,VAL},{lda,idx,MRD},{ldx,imm,VAL},{ldz,imm,VAL},/* a0 */
472 {ldy,zpg,ZRD},{lda,zpg,ZRD},{ldx,zpg,ZRD},{smb,zpg,ZRW},
473 {tay,imp,0 },{lda,imm,VAL},{tax,imp,0 },{ldz,aba,MRD},
474 {ldy,aba,MRD},{lda,aba,MRD},{ldx,aba,MRD},{bbs,zpb,ZRD},
475 {bcs,rel,BRA},{lda,idy,MRD},{lda,inz,MRD},{bcs,rw2,BRA},/* b0 */
476 {ldy,zpx,ZRD},{lda,zpx,ZRD},{ldx,zpy,ZRD},{smb,zpg,ZRW},
477 {clv,imp,0 },{lda,aby,MRD},{tsx,imp,0 },{ldz,abx,MRD},
478 {ldy,abx,MRD},{lda,abx,MRD},{ldx,aby,MRD},{bbs,zpb,ZRD},
479 {cpy,imm,VAL},{cmp,idx,MRD},{cpz,imm,VAL},{dew,zpg,ZRW2},/* c0 */
480 {cpy,zpg,ZRD},{cmp,zpg,ZRD},{dec,zpg,ZRW},{smb,zpg,ZRW},
481 {iny,imp,0 },{cmp,imm,VAL},{dex,imp,0 },{asw,aba,MRW2},
482 {cpy,aba,MRD},{cmp,aba,MRD},{dec,aba,MRW},{bbs,zpb,ZRD},
483 {bne,rel,BRA},{cmp,idy,MRD},{cmp,idz,MRD},{bne,rw2,BRA},/* d0 */
484 {cpz,zpg,MRD},{cmp,zpx,ZRD},{dec,zpx,ZRW},{smb,zpg,ZRW},
485 {cld,imp,0 },{cmp,aby,MRD},{phx,imp,0 },{phz,imp,0 },
486 {cpz,aba,MRD},{cmp,abx,MRD},{dec,abx,MRW},{bbs,zpb,ZRD},
487 {cpx,imm,VAL},{sbc,idx,MRD},{lda,isy,MRD},{inw,zpg,ZRW2},/* e0 */
488 {cpx,zpg,ZRD},{sbc,zpg,ZRD},{inc,zpg,ZRW},{smb,zpg,ZRW},
489 {inx,imp,0 },{sbc,imm,VAL},{nop,imp,0 },{row,aba,MRW2},
490 {cpx,aba,MRD},{sbc,aba,MRD},{inc,aba,MRW},{bbs,zpb,ZRD},
491 {beq,rel,BRA},{sbc,idy,MRD},{sbc,idz,MRD},{beq,rw2,BRA},/* f0 */
492 {phw,iw2,VAL},{sbc,zpx,ZRD},{inc,zpx,ZRW},{smb,zpg,ZRW},
493 {sed,imp,0 },{sbc,aby,MRD},{plx,imp,0 },{plz,imp,0 },
494 {phw,aba,MRD2},{sbc,abx,MRD},{inc,abx,MRW},{bbs,zpb,ZRD}
495 };
496 #endif
497
498 #if (HAS_M4510)
499 /* only map instead of aug and 20 bit memory management*/
500 static const UINT8 op4510[256][3] = {
501 {brk,imm,VAL},{ora,idx,MRD},{cle,imp,0 },{see,imp,0 },/* 00 */
502 {tsb,zpg,0 },{ora,zpg,ZRD},{asl,zpg,ZRW},{rmb,zpg,ZRW},
503 {php,imp,0 },{ora,imm,VAL},{asl,acc,MRW},{tsy,imp,0 },
504 {tsb,aba,MRD},{ora,aba,MRD},{asl,aba,MRW},{bbr,zpb,ZRD},
505 {bpl,rel,BRA},{ora,idy,MRD},{ora,idz,MRD},{bpl,rw2,BRA},/* 10 */
506 {trb,zpg,ZRD},{ora,zpx,ZRD},{asl,zpx,ZRW},{rmb,zpg,ZRW},
507 {clc,imp,0 },{ora,aby,MRD},{ina,imp,0 },{inz,imp,0 },
508 {trb,aba,MRD},{ora,abx,MRD},{asl,abx,MRW},{bbr,zpb,ZRD},
509 {jsr,adr,0 },{and,idx,MRD},{jsr,ind,0 },{jsr,iax,0 },/* 20 */
510 {bit,zpg,ZRD},{and,zpg,ZRD},{rol,zpg,ZRW},{rmb,zpg,ZRW},
511 {plp,imp,0 },{and,imm,VAL},{rol,acc,0 },{tys,imp,0 },
512 {bit,aba,MRD},{and,aba,MRD},{rol,aba,MRW},{bbr,zpb,ZRD},
513 {bmi,rel,BRA},{and,idz,MRD},{and,zpi,MRD},{bmi,rw2,BRA},/* 30 */
514 {bit,zpx,ZRD},{and,zpx,ZRD},{rol,zpx,ZRW},{rmb,zpg,ZRW},
515 {sec,imp,0 },{and,aby,MRD},{dea,imp,0 },{dez,imp,0 },
516 {bit,abx,MRD},{and,abx,MRD},{rol,abx,MRW},{bbr,zpb,ZRD},
517 {rti,imp,0 },{eor,idx,MRD},{neg,imp,0 },{asr2,imp,0 },/* 40 */
518 {asr2,zpg,ZRW},{eor,zpg,ZRD},{lsr,zpg,ZRW},{rmb,zpg,ZRW},
519 {pha,imp,0 },{eor,imm,VAL},{lsr,acc,0 },{taz,imp,0 },
520 {jmp,adr,JMP},{eor,aba,MRD},{lsr,aba,MRW},{bbr,zpb,ZRD},
521 {bvc,rel,BRA},{eor,idy,MRD},{eor,idz,MRD},{bvc,rw2,BRA},/* 50 */
522 {asr2,zpx,ZRW},{eor,zpx,ZRD},{lsr,zpx,ZRW},{rmb,zpg,ZRW},
523 {cli,imp,0 },{eor,aby,MRD},{phy,imp,0 },{tab,imp,0 },
524 {map,imp,0 },{eor,abx,MRD},{lsr,abx,MRW},{bbr,zpb,ZRD},
525 {rts,imp,0 },{adc,idx,MRD},{rtn,imm,VAL},{bsr,rw2,BRA},/* 60 */
526 {stz2,zpg,ZWR},{adc,zpg,ZRD},{ror,zpg,ZRW},{rmb,zpg,ZRW},
527 {pla,imp,0 },{adc,imm,VAL},{ror,acc,0 },{tza,imp,0 },
528 {jmp,ind,JMP},{adc,aba,MRD},{ror,aba,MRW},{bbr,zpb,ZRD},
529 {bvs,rel,BRA},{adc,idy,MRD},{adc,zpi,MRD},{bvs,rw2,BRA},/* 70 */
530 {stz2,zpx,ZWR},{adc,zpx,ZRD},{ror,zpx,ZRW},{rmb,zpg,ZRW},
531 {sei,imp,0 },{adc,aby,MRD},{ply,imp,0 },{tba,imp,0 },
532 {jmp,iax,JMP},{adc,abx,MRD},{ror,abx,MRW},{bbr,zpb,ZRD},
533 {bra,rel,BRA},{sta,idx,MWR},{sta,isy,MWR},{bra,rw2,BRA},/* 80 */
534 {sty,zpg,ZWR},{sta,zpg,ZWR},{stx,zpg,ZWR},{smb,zpg,ZRW},
535 {dey,imp,0 },{bit,imm,VAL},{txa,imp,0 },{sty,abx,MWR},
536 {sty,aba,MWR},{sta,aba,MWR},{stx,aba,MWR},{bbs,zpb,ZRD},
537 {bcc,rel,BRA},{sta,idy,MWR},{sta,inz,MWR},{bcc,rw2,BRA},/* 90 */
538 {sty,zpx,ZWR},{sta,zpx,ZWR},{stx,zpy,ZWR},{smb,zpg,ZRW},
539 {tya,imp,0 },{sta,aby,MWR},{txs,imp,0 },{stx,aby,MWR},
540 {stz2,aba,MWR},{sta,abx,MWR},{stz2,abx,MWR},{bbs,zpb,ZRD},
541 {ldy,imm,VAL},{lda,idx,MRD},{ldx,imm,VAL},{ldz,imm,VAL},/* a0 */
542 {ldy,zpg,ZRD},{lda,zpg,ZRD},{ldx,zpg,ZRD},{smb,zpg,ZRW},
543 {tay,imp,0 },{lda,imm,VAL},{tax,imp,0 },{ldz,aba,MRD},
544 {ldy,aba,MRD},{lda,aba,MRD},{ldx,aba,MRD},{bbs,zpb,ZRD},
545 {bcs,rel,BRA},{lda,idy,MRD},{lda,inz,MRD},{bcs,rw2,BRA},/* b0 */
546 {ldy,zpx,ZRD},{lda,zpx,ZRD},{ldx,zpy,ZRD},{smb,zpg,ZRW},
547 {clv,imp,0 },{lda,aby,MRD},{tsx,imp,0 },{ldz,abx,MRD},
548 {ldy,abx,MRD},{lda,abx,MRD},{ldx,aby,MRD},{bbs,zpb,ZRD},
549 {cpy,imm,VAL},{cmp,idx,MRD},{cpz,imm,VAL},{dew,zpg,ZRW2},/* c0 */
550 {cpy,zpg,ZRD},{cmp,zpg,ZRD},{dec,zpg,ZRW},{smb,zpg,ZRW},
551 {iny,imp,0 },{cmp,imm,VAL},{dex,imp,0 },{asw,aba,MRW2},
552 {cpy,aba,MRD},{cmp,aba,MRD},{dec,aba,MRW},{bbs,zpb,ZRD},
553 {bne,rel,BRA},{cmp,idy,MRD},{cmp,idz,MRD},{bne,rw2,BRA},/* d0 */
554 {cpz,zpg,MRD},{cmp,zpx,ZRD},{dec,zpx,ZRW},{smb,zpg,ZRW},
555 {cld,imp,0 },{cmp,aby,MRD},{phx,imp,0 },{phz,imp,0 },
556 {cpz,aba,MRD},{cmp,abx,MRD},{dec,abx,MRW},{bbs,zpb,ZRD},
557 {cpx,imm,VAL},{sbc,idx,MRD},{lda,isy,MRD},{inw,zpg,ZRW2},/* e0 */
558 {cpx,zpg,ZRD},{sbc,zpg,ZRD},{inc,zpg,ZRW},{smb,zpg,ZRW},
559 {inx,imp,0 },{sbc,imm,VAL},{nop,imp,0 },{row,aba,MRW2},
560 {cpx,aba,MRD},{sbc,aba,MRD},{inc,aba,MRW},{bbs,zpb,ZRD},
561 {beq,rel,BRA},{sbc,idy,MRD},{sbc,idz,MRD},{beq,rw2,BRA},/* f0 */
562 {phw,iw2,VAL},{sbc,zpx,ZRD},{inc,zpx,ZRW},{smb,zpg,ZRW},
563 {sed,imp,0 },{sbc,aby,MRD},{plx,imp,0 },{plz,imp,0 },
564 {phw,aba,MRD2},{sbc,abx,MRD},{inc,abx,MRW},{bbs,zpb,ZRD}
565 };
566 #endif
567
568 #if (HAS_DECO16)
569 static const UINT8 opdeco16[256][3] =
570 {
571 {brk,imp,0 },{ora,idx,MRD},{ill,non,0 },{ill,non,0 },/* 00 */
572 {ill,non,0 },{ora,zpg,ZRD},{asl,zpg,ZRW},{ill,non,0 },
573 {php,imp,0 },{ora,imm,VAL},{asl,acc,0 },{u0B,zpg,0 },
574 {ill,non,0 },{ora,aba,MRD},{asl,aba,MRW},{ill,non,0 },
575 {bpl,rel,BRA},{ora,idy,MRD},{ill,non,0 },{u13,zpg,0 },/* 10 */
576 {ill,non,0 },{ora,zpx,ZRD},{asl,zpx,ZRW},{ill,non,0 },
577 {clc,imp,0 },{ora,aby,MRD},{ill,non,0 },{ill,non,0 },
578 {ill,non,0 },{ora,abx,MRD},{asl,abx,MRW},{ill,non,0 },
579 {jsr,adr,JMP},{and,idx,MRD},{ill,non,0 },{u23,zpg,0 },/* 20 */
580 {bit,zpg,ZRD},{and,zpg,ZRD},{rol,zpg,ZRW},{ill,non,0 },
581 {plp,imp,0 },{and,imm,VAL},{rol,acc,0 },{ill,non,0 },
582 {bit,aba,MRD},{and,aba,MRD},{rol,aba,MRW},{ill,non,0 },
583 {bmi,rel,BRA},{and,idy,MRD},{ill,non,0 },{ill,non,0 },/* 30 */
584 {ill,non,0 },{and,zpx,ZRD},{rol,zpx,ZRW},{ill,non,0 },
585 {sec,imp,0 },{and,aby,MRD},{ill,non,0 },{ill,non,0 },
586 {ill,non,0 },{and,abx,MRD},{rol,abx,MRW},{u3F,zpg,0 },
587 {rti,imp,0 },{eor,idx,MRD},{ill,non,0 },{ill,non,0 },/* 40 */
588 {ill,non,0 },{eor,zpg,ZRD},{lsr,zpg,ZRW},{ill,non,0 },
589 {pha,imp,0 },{eor,imm,VAL},{lsr,acc,0 },{u4B,zpg,0 },
590 {jmp,adr,JMP},{eor,aba,MRD},{lsr,aba,MRW},{ill,non,0 },
591 {bvc,rel,BRA},{eor,idy,MRD},{ill,non,0 },{ill,non,0 },/* 50 */
592 {ill,non,0 },{eor,zpx,ZRD},{lsr,zpx,ZRW},{ill,non,0 },
593 {cli,imp,0 },{eor,aby,MRD},{ill,non,0 },{ill,non,0 },
594 {ill,non,0 },{eor,abx,MRD},{lsr,abx,MRW},{ill,non,0 },
595 {rts,imp,0 },{adc,idx,MRD},{ill,non,0 },{ill,non,0 },/* 60 */
596 {ill,non,0 },{adc,zpg,ZRD},{ror,zpg,ZRW},{vbl,zpg,0 }, /* MISH*/
597 {pla,imp,0 },{adc,imm,VAL},{ror,acc,0 },{ill,non,0 },
598 {jmp,ind,JMP},{adc,aba,MRD},{ror,aba,MRW},{ill,non,0 },
599 {bvs,rel,BRA},{adc,idy,MRD},{ill,non,0 },{ill,non,0 },/* 70 */
600 {ill,non,0 },{adc,zpx,ZRD},{ror,zpx,ZRW},{ill,non,0 },
601 {sei,imp,0 },{adc,aby,MRD},{ill,non,0 },{ill,non,0 },
602 {ill,non,0 },{adc,abx,MRD},{ror,abx,MRW},{ill,non,0 },
603 {ill,non,0 },{sta,idx,MWR},{ill,non,0 },{ill,non,0 },/* 80 */
604 {sty,zpg,ZWR},{sta,zpg,ZWR},{stx,zpg,ZWR},{u87,zpg,0 },
605 {dey,imp,0 },{ill,non,0 },{txa,imp,0 },{ill,non,0 },
606 {sty,aba,MWR},{sta,aba,MWR},{stx,aba,MWR},{u8F,zpg,0 },
607 {bcc,rel,BRA},{sta,idy,MWR},{ill,non,0 },{ill,non,0 },/* 90 */
608 {sty,zpx,ZWR},{sta,zpx,ZWR},{stx,zpy,ZWR},{ill,non,0 },
609 {tya,imp,0 },{sta,aby,MWR},{txs,imp,0 },{ill,non,0 },
610 {ill,non,0 },{sta,abx,MWR},{ill,non,0 },{ill,non,0 },
611 {ldy,imm,VAL},{lda,idx,MRD},{ldx,imm,VAL},{uA3,zpg,0 },/* a0 */
612 {ldy,zpg,ZRD},{lda,zpg,ZRD},{ldx,zpg,ZRD},{ill,non,0 },
613 {tay,imp,0 },{lda,imm,VAL},{tax,imp,0 },{uAB,zpg,0 },
614 {ldy,aba,MRD},{lda,aba,MRD},{ldx,aba,MRD},{ill,non,0 },
615 {bcs,rel,BRA},{lda,idy,MRD},{ill,non,0 },{ill,non,0 },/* b0 */
616 {ldy,zpx,ZRD},{lda,zpx,ZRD},{ldx,zpy,ZRD},{ill,non,0 },
617 {clv,imp,0 },{lda,aby,MRD},{tsx,imp,0 },{uBB,zpg,0 },
618 {ldy,abx,MRD},{lda,abx,MRD},{ldx,aby,MRD},{ill,non,0 },
619 {cpy,imm,VAL},{cmp,idx,MRD},{ill,non,0 },{ill,non,0 },/* c0 */
620 {cpy,zpg,ZRD},{cmp,zpg,ZRD},{dec,zpg,ZRW},{ill,non,0 },
621 {iny,imp,0 },{cmp,imm,VAL},{dex,imp,0 },{ill,non,0 },
622 {cpy,aba,MRD},{cmp,aba,MRD},{dec,aba,MRW},{ill,non,0 },
623 {bne,rel,BRA},{cmp,idy,MRD},{ill,non,0 },{ill,non,0 },/* d0 */
624 {ill,non,0 },{cmp,zpx,ZRD},{dec,zpx,ZRW},{ill,non,0 },
625 {cld,imp,0 },{cmp,aby,MRD},{ill,non,0 },{ill,non,0 },
626 {ill,non,0 },{cmp,abx,MRD},{dec,abx,MRW},{ill,non,0 },
627 {cpx,imm,VAL},{sbc,idx,MRD},{ill,non,0 },{ill,non,0 },/* e0 */
628 {cpx,zpg,ZRD},{sbc,zpg,ZRD},{inc,zpg,ZRW},{ill,non,0 },
629 {inx,imp,0 },{sbc,imm,VAL},{nop,imp,0 },{ill,non,0 },
630 {cpx,aba,MRD},{sbc,aba,MRD},{inc,aba,MRW},{ill,non,0 },
631 {beq,rel,BRA},{sbc,idy,MRD},{ill,non,0 },{ill,non,0 },/* f0 */
632 {ill,non,0 },{sbc,zpx,ZRD},{inc,zpx,ZRW},{ill,non,0 },
633 {sed,imp,0 },{sbc,aby,MRD},{ill,non,0 },{ill,non,0 },
634 {ill,non,0 },{sbc,abx,MRD},{inc,abx,MRW},{ill,non,0 }
635 };
636 #endif
637
638 /*****************************************************************************
639 * Disassemble a single opcode starting at pc
640 *****************************************************************************/
Dasm6502(char * buffer,unsigned pc)641 unsigned Dasm6502(char *buffer, unsigned pc)
642 {
643 char *dst = buffer;
644 const char *symbol;
645 INT8 offset;
646 INT16 offset16;
647 unsigned PC = pc;
648 UINT16 addr, ea;
649 UINT8 op, opc, arg, access, value;
650
651 op = OPCODE(pc++);
652
653 switch ( m6502_get_reg(M6502_SUBTYPE) )
654 {
655 #if (HAS_M65C02)
656 case SUBTYPE_65C02:
657 opc = op65c02[op][0];
658 arg = op65c02[op][1];
659 access = op65c02[op][2];
660 break;
661 #endif
662 #if (HAS_M65SC02)
663 case SUBTYPE_65SC02:
664 opc = op65sc02[op][0];
665 arg = op65sc02[op][1];
666 access = op65sc02[op][2];
667 break;
668 #endif
669 #if (HAS_M6510)
670 case SUBTYPE_6510:
671 opc = op6510[op][0];
672 arg = op6510[op][1];
673 access = op6510[op][2];
674 break;
675 #endif
676 #if (HAS_DECO16)
677 case SUBTYPE_DECO16:
678 opc = opdeco16[op][0];
679 arg = opdeco16[op][1];
680 access = opdeco16[op][2];
681 break;
682 #endif
683 default:
684 opc = op6502[op][0];
685 arg = op6502[op][1];
686 access = op6502[op][2];
687 break;
688 }
689 dst += sprintf(dst, "%-5s", token[opc]);
690 if( opc == bbr || opc == bbs || opc == rmb || opc == smb )
691 dst += sprintf(dst, "%d,", (op >> 3) & 7);
692
693 switch(arg)
694 {
695 case imp:
696 break;
697
698 case acc:
699 dst += sprintf(dst,"a");
700 break;
701
702 case rel:
703 offset = (INT8)ARGBYTE(pc++);
704 symbol = set_ea_info( 0, pc, offset, access );
705 dst += sprintf(dst,"%s", symbol);
706 break;
707
708 case rw2:
709 offset16 = ARGWORD(pc)-1;
710 pc += 2;
711 symbol = set_ea_info( 0, pc, offset16, access );
712 dst += sprintf(dst,"%s", symbol);
713 break;
714
715 case imm:
716 value = ARGBYTE(pc++);
717 symbol = set_ea_info( 0, value, EA_UINT8, access );
718 dst += sprintf(dst,"#%s", symbol);
719 break;
720
721 case zpg:
722 addr = ARGBYTE(pc++);
723 symbol = set_ea_info( 0, addr, EA_UINT8, access );
724 dst += sprintf(dst,"$%02X", addr);
725 break;
726
727 case zpx:
728 addr = ARGBYTE(pc++);
729 ea = (addr + m6502_get_reg(M6502_X)) & 0xff;
730 symbol = set_ea_info( 0, ea, EA_UINT8, access );
731 dst += sprintf(dst,"$%02X,x", addr);
732 break;
733
734 case zpy:
735 addr = ARGBYTE(pc++);
736 ea = (addr + m6502_get_reg(M6502_Y)) & 0xff;
737 symbol = set_ea_info( 0, ea, EA_UINT8, access );
738 dst += sprintf(dst,"$%02X,y", addr);
739 break;
740
741 case idx:
742 addr = ARGBYTE(pc++);
743 ea = (addr + m6502_get_reg(M6502_X)) & 0xff;
744 ea = RDMEM(ea) + (RDMEM((ea+1) & 0xff) << 8);
745 symbol = set_ea_info( 0, ea, EA_UINT16, access );
746 dst += sprintf(dst,"($%02X,x)", addr);
747 break;
748
749 case idy:
750 addr = ARGBYTE(pc++);
751 ea = (RDMEM(addr) + (RDMEM((addr+1) & 0xff) << 8) + m6502_get_reg(M6502_Y)) & 0xffff;
752 symbol = set_ea_info( 0, ea, EA_UINT16, access );
753 dst += sprintf(dst,"($%02X),y", addr);
754 break;
755
756 case zpi:
757 addr = ARGBYTE(pc++);
758 ea = RDMEM(addr) + (RDMEM((addr+1) & 0xff) << 8);
759 symbol = set_ea_info( 0, ea, EA_UINT16, access );
760 dst += sprintf(dst,"($%02X)", addr);
761 break;
762
763 case zpb:
764 addr = ARGBYTE(pc++);
765 symbol = set_ea_info( 0, addr, EA_UINT8, access );
766 dst += sprintf(dst,"$%02X", addr);
767 offset = (INT8)ARGBYTE(pc++);
768 symbol = set_ea_info( 1, pc, offset, BRA );
769 dst += sprintf(dst,",%s", symbol);
770 break;
771
772 case adr:
773 addr = ARGWORD(pc);
774 pc += 2;
775 symbol = set_ea_info( 0, addr, EA_UINT16, access );
776 dst += sprintf(dst,"%s", symbol);
777 break;
778
779 case aba:
780 addr = ARGWORD(pc);
781 pc += 2;
782 symbol = set_ea_info( 0, addr, EA_UINT16, access );
783 dst += sprintf(dst,"%s", symbol);
784 break;
785
786 case abx:
787 addr = ARGWORD(pc);
788 pc += 2;
789 ea = (addr + m6502_get_reg(M6502_X)) & 0xffff;
790 symbol = set_ea_info( 0, ea, EA_UINT16, access );
791 dst += sprintf(dst,"$%04X,x", addr);
792 break;
793
794 case aby:
795 addr = ARGWORD(pc);
796 pc += 2;
797 ea = (addr + m6502_get_reg(M6502_Y)) & 0xffff;
798 symbol = set_ea_info( 0, ea, EA_UINT16, access );
799 dst += sprintf(dst,"$%04X,y", addr);
800 break;
801
802 case ind:
803 addr = ARGWORD(pc);
804 pc += 2;
805 ea = ARGWORD(addr);
806 symbol = set_ea_info( 0, ea, EA_UINT16, access );
807 dst += sprintf(dst,"($%04X)", addr);
808 break;
809
810 case iax:
811 addr = ARGWORD(pc);
812 pc += 2;
813 ea = (ARGWORD(addr) + m6502_get_reg(M6502_X)) & 0xffff;
814 symbol = set_ea_info( 0, ea, EA_UINT16, access );
815 dst += sprintf(dst,"($%04X),X", addr);
816 break;
817
818 default:
819 dst += sprintf(dst,"$%02X", op);
820 }
821 return pc - PC;
822 }
823
824
825 #if (HAS_M65CE02 || HAS_M6509 || HAS_M6510 || HAS_M4510)
826
827 #if (HAS_M65CE02 || HAS_M6510)
m6502_get_argword(int addr)828 static int m6502_get_argword(int addr)
829 {
830 return cpu_readop_arg(addr)+(cpu_readop_arg((addr+1)&0xffff) << 8);
831 }
832 #endif
833
834 #if (HAS_M6509 || HAS_M4510)
m6509_get_argword(int addr)835 static int m6509_get_argword(int addr)
836 {
837 if ((addr&0xffff)==0xffff)
838 return cpu_readop_arg(addr)+(cpu_readop_arg(addr&~0xffff) << 8);
839 else
840 return cpu_readop_arg(addr)+(cpu_readop_arg(addr+1) << 8);
841 }
842 #endif
843
844 typedef struct {
845 const UINT8 *opcode;
846 unsigned(*get_reg)(int regnum);
847 mem_read_handler readmem;
848 int(*argword)(int addr);
849 } CPU_TYPE;
850
851 #if 0
852 static CPU_TYPE type_m6502 = {
853 (const UINT8*)op6502, m6502_get_reg, cpu_readmem16, m6502_get_argword
854 };
855 #endif
856 #ifdef HAS_M6510
857 static CPU_TYPE type_m6510 = {
858 (const UINT8*)op6510, m6502_get_reg, cpu_readmem16, m6502_get_argword
859 };
860 #endif
861 #if (HAS_M6509)
862 static CPU_TYPE type_m6509 = {
863 (const UINT8*)op6510, m6509_get_reg, cpu_readmem20, m6509_get_argword
864 };
865 #endif
866 #if 0
867 static CPU_TYPE type_m65c02 = {
868 (const UINT8*)op65c02, m6502_get_reg, cpu_readmem16, m6502_get_argword
869 };
870 static CPU_TYPE type_m65sc02 = {
871 (const UINT8*)op65sc02, m6502_get_reg, cpu_readmem16, m6502_get_argword
872 };
873 #endif
874 #if (HAS_M65CE02)
875 static CPU_TYPE type_m65ce02 = {
876 (const UINT8*)op65ce02, m65ce02_get_reg, cpu_readmem16, m6502_get_argword
877 };
878 #endif
879 #if (HAS_M4510)
READ_HANDLER(m4510_readmem)880 static READ_HANDLER(m4510_readmem)
881 {
882 return cpu_readmem20( m4510_get_reg(M4510_MEM0+(offset>>13))+offset );
883 }
884
885 static CPU_TYPE type_m4510 = {
886 (const UINT8*)op4510, m4510_get_reg, m4510_readmem, m6509_get_argword
887 };
888 #endif
889
890 /*****************************************************************************
891 * Disassemble a single opcode starting at pc
892 *****************************************************************************/
Dasm6502Helper(CPU_TYPE * this,char * buffer,unsigned pc)893 unsigned int Dasm6502Helper(CPU_TYPE *this, char *buffer, unsigned pc)
894 {
895 char *dst = buffer;
896 const char *symbol;
897 INT8 offset;
898 INT16 offset16;
899 unsigned PC = pc;
900 UINT16 addr, ea;
901 UINT8 op, opc, arg, access, value;
902
903 op = OPCODE(pc++);
904
905 opc = this->opcode[op*3];
906 arg = this->opcode[op*3+1];
907 access = this->opcode[op*3+2];
908
909 dst += sprintf(dst, "%-5s", token[opc]);
910 if( opc == bbr || opc == bbs || opc == rmb || opc == smb )
911 dst += sprintf(dst, "%d,", (op >> 3) & 7);
912
913 switch(arg)
914 {
915 case imp:
916 break;
917
918 case acc:
919 dst += sprintf(dst,"a");
920 break;
921
922 case rel:
923 offset = (INT8)ARGBYTE(pc++);
924 symbol = set_ea_info( 0, pc, offset, access );
925 #if 0
926 dst += sprintf(dst,"%s", symbol);
927 #else
928 dst += sprintf(dst,"$%04X", (pc+offset)&0xffff);
929 #endif
930 break;
931
932 case rw2:
933 offset16 = this->argword(pc)-1;
934 pc += 2;
935 symbol = set_ea_info( 0, pc, offset16, access );
936 #if 0
937 dst += sprintf(dst,"%s", symbol);
938 #else
939 dst += sprintf(dst,"$%04X", (pc+offset16)&0xffff );
940 #endif
941 break;
942
943 case imm:
944 value = ARGBYTE(pc++);
945 symbol = set_ea_info( 0, value, EA_UINT8, access );
946 dst += sprintf(dst,"#%s", symbol);
947 break;
948
949 case iw2:
950 addr = ARGWORD(pc);
951 pc += 2;
952 symbol = set_ea_info( 0, addr, EA_UINT16, access );
953 dst += sprintf(dst,"#%s", symbol);
954 break;
955 case iw3:
956 addr = ARGWORD(pc);
957 pc += 2;
958 addr |= ARGBYTE(pc++)<<16;
959 /* symbol = set_ea_info( 0, addr, EA_UINT16, access );*/
960 dst += sprintf(dst,"#%.6x", addr);
961 break;
962
963 case zpg:
964 addr = ARGBYTE(pc++);
965 symbol = set_ea_info( 0, addr, EA_UINT8, access );
966 dst += sprintf(dst,"$%02X", addr);
967 break;
968
969 case zpx:
970 addr = ARGBYTE(pc++);
971 ea = (addr + this->get_reg(M6502_X)) & 0xff;
972 symbol = set_ea_info( 0, ea, EA_UINT8, access );
973 dst += sprintf(dst,"$%02X,x", addr);
974 break;
975
976 case zpy:
977 addr = ARGBYTE(pc++);
978 ea = (addr + this->get_reg(M6502_Y)) & 0xff;
979 symbol = set_ea_info( 0, ea, EA_UINT8, access );
980 dst += sprintf(dst,"$%02X,y", addr);
981 break;
982
983 case idx:
984 addr = ARGBYTE(pc++);
985 ea = (addr + this->get_reg(M6502_X)) & 0xff;
986 ea = this->readmem(ea) + (this->readmem((ea+1) & 0xff) << 8);
987 symbol = set_ea_info( 0, ea, EA_UINT16, access );
988 dst += sprintf(dst,"($%02X,x)", addr);
989 break;
990
991 case idy:
992 addr = ARGBYTE(pc++);
993 ea = (this->readmem(addr) + (this->readmem((addr+1) & 0xff) << 8)
994 + this->get_reg(M6502_Y)) & 0xffff;
995 symbol = set_ea_info( 0, ea, EA_UINT16, access );
996 dst += sprintf(dst,"($%02X),y", addr);
997 break;
998
999 case idz:
1000 addr = ARGBYTE(pc++);
1001 ea = (this->readmem(addr) + (this->readmem((addr+1) & 0xff) << 8)
1002 + this->get_reg(M6502_Y)) & 0xffff;
1003 symbol = set_ea_info( 0, ea, EA_UINT16, access );
1004 dst += sprintf(dst,"($%02X),z", addr);
1005 break;
1006
1007 case isy:
1008 op = ARGBYTE(pc++);
1009 addr = op+this->get_reg(M6502_S);
1010 ea = (this->readmem(addr)+(this->readmem(addr+1) << 8)+
1011 this->get_reg(M6502_Y)) & 0xffff;
1012 symbol = set_ea_info( 0, ea, EA_UINT16, access );
1013 dst += sprintf(dst,"(s,$%02X),y", addr);
1014 break;
1015
1016 case zpi:
1017 addr = ARGBYTE(pc++);
1018 ea = this->readmem(addr) + (this->readmem((addr+1) & 0xff) << 8);
1019 symbol = set_ea_info( 0, ea, EA_UINT16, access );
1020 dst += sprintf(dst,"($%02X)", addr);
1021 break;
1022
1023 case zpb:
1024 addr = ARGBYTE(pc++);
1025 symbol = set_ea_info( 0, addr, EA_UINT8, access );
1026 dst += sprintf(dst,"$%02X", addr);
1027 offset = (INT8)ARGBYTE(pc++);
1028 symbol = set_ea_info( 1, pc, offset, BRA );
1029 dst += sprintf(dst,",%s", symbol);
1030 break;
1031
1032 case adr:
1033 addr = this->argword(pc);
1034 pc += 2;
1035 symbol = set_ea_info( 0, addr, EA_UINT16, access );
1036 #if 0
1037 dst += sprintf(dst,"%s", symbol);
1038 #else
1039 dst += sprintf(dst, "$%04X", addr);
1040 #endif
1041 break;
1042
1043 case aba:
1044 addr = this->argword(pc);
1045 pc += 2;
1046 symbol = set_ea_info( 0, addr, EA_UINT16, access );
1047 #if 0
1048 dst += sprintf(dst,"%s", symbol);
1049 #else
1050 dst += sprintf(dst, "$%04X", addr);
1051 #endif
1052 break;
1053
1054 case abx:
1055 addr = this->argword(pc);
1056 pc += 2;
1057 ea = (addr + this->get_reg(M6502_X)) & 0xffff;
1058 symbol = set_ea_info( 0, ea, EA_UINT16, access );
1059 dst += sprintf(dst,"$%04X,x", addr);
1060 break;
1061
1062 case aby:
1063 addr = this->argword(pc);
1064 pc += 2;
1065 ea = (addr + this->get_reg(M6502_Y)) & 0xffff;
1066 symbol = set_ea_info( 0, ea, EA_UINT16, access );
1067 dst += sprintf(dst,"$%04X,y", addr);
1068 break;
1069
1070 case ind:
1071 addr = this->argword(pc);
1072 pc += 2;
1073 ea = this->argword(addr);
1074 symbol = set_ea_info( 0, ea, EA_UINT16, access );
1075 dst += sprintf(dst,"($%04X)", addr);
1076 break;
1077
1078 case iax:
1079 addr = this->argword(pc);
1080 pc += 2;
1081 ea = (this->argword(addr) + this->get_reg(M6502_X)) & 0xffff;
1082 symbol = set_ea_info( 0, ea, EA_UINT16, access );
1083 dst += sprintf(dst,"($%04X),X", addr);
1084 break;
1085
1086 default:
1087 dst += sprintf(dst,"$%02X", op);
1088 }
1089 return pc - PC;
1090 }
1091 #endif
1092
1093 #if (HAS_M65CE02)
1094 /*****************************************************************************
1095 * Disassemble a single opcode starting at pc
1096 *****************************************************************************/
Dasm65ce02(char * buffer,unsigned pc)1097 unsigned int Dasm65ce02(char *buffer, unsigned pc)
1098 {
1099 return Dasm6502Helper(&type_m65ce02, buffer, pc);
1100 }
1101 #endif
1102
1103 #if (HAS_M6509)
1104 /*****************************************************************************
1105 * Disassemble a single opcode starting at pc
1106 *****************************************************************************/
Dasm6509(char * buffer,unsigned pc)1107 unsigned int Dasm6509(char *buffer, unsigned pc)
1108 {
1109 return Dasm6502Helper(&type_m6509, buffer, pc);
1110 }
1111 #endif
1112
1113 #if (HAS_M6510)
1114 /*****************************************************************************
1115 * Disassemble a single opcode starting at pc
1116 *****************************************************************************/
Dasm6510(char * buffer,unsigned pc)1117 unsigned int Dasm6510(char *buffer, unsigned pc)
1118 {
1119 return Dasm6502Helper(&type_m6510, buffer, pc);
1120 }
1121 #endif
1122
1123 #if (HAS_M4510)
1124 /*****************************************************************************
1125 * Disassemble a single opcode starting at pc
1126 *****************************************************************************/
Dasm4510(char * buffer,unsigned pc)1127 unsigned int Dasm4510(char *buffer, unsigned pc)
1128 {
1129 return Dasm6502Helper(&type_m4510, buffer, pc);
1130 }
1131 #endif
1132
1133 #endif /* MAME_DEBUG */
1134