1 /*****************************************************************************
2  *
3  *	 z80.c
4  *	 Portable Z80 emulator V3.5
5  *
6  *	 Copyright (C) 1998,1999,2000 Juergen Buchmueller, all rights reserved.
7  *
8  *	 - This source code is released as freeware for non-commercial purposes.
9  *	 - You are free to use and redistribute this code in modified or
10  *	   unmodified form, provided you list me in the credits.
11  *	 - If you modify this source code, you must add a notice to each modified
12  *	   source file that it has been changed.  If you're a nice person, you
13  *	   will clearly mark each change too.  :)
14  *	 - If you wish to use this for commercial purposes, please contact me at
15  *	   pullmoll@t-online.de
16  *	 - The author of this copywritten work reserves the right to change the
17  *	   terms of its usage and license at any time, including retroactively
18  *	 - This entire notice must remain in the source code.
19  *
20  *	 Changes in 3.5
21  *	 - Implemented OTIR, INIR, etc. without look-up table for PF flag.
22  *	   [Ramsoft, Sean Young]
23  *	 Changes in 3.4
24  *	 - Removed Z80-MSX specific code as it's not needed any more.
25  *	 - Implemented DAA without look-up table [Ramsoft, Sean Young]
26  *	 Changes in 3.3
27  *	 - Fixed undocumented flags XF & YF in the non-asm versions of CP,
28  *	   and all the 16 bit arithmetic instructions. [Sean Young]
29  *	 Changes in 3.2
30  *	 - Fixed undocumented flags XF & YF of RRCA, and CF and HF of
31  *	   INI/IND/OUTI/OUTD/INIR/INDR/OTIR/OTDR [Sean Young]
32  *	 Changes in 3.1
33  *	 - removed the REPEAT_AT_ONCE execution of LDIR/CPIR etc. opcodes
34  *	   for readabilities sake and because the implementation was buggy
35  *	   (and I was not able to find the difference)
36  *	 Changes in 3.0
37  *	 - 'finished' switch to dynamically overrideable cycle count tables
38  *	 Changes in 2.9:
39  *	 - added methods to access and override the cycle count tables
40  *	 - fixed handling and timing of multiple DD/FD prefixed opcodes
41  *	 Changes in 2.8:
42  *	 - OUTI/OUTD/OTIR/OTDR also pre-decrement the B register now.
43  *	   This was wrong because of a bug fix on the wrong side
44  *	   (astrocade sound driver).
45  *	 Changes in 2.7:
46  *	  - removed z80_vm specific code, it's not needed (and never was).
47  *	 Changes in 2.6:
48  *	  - BUSY_LOOP_HACKS needed to call change_pc16() earlier, before
49  *		checking the opcodes at the new address, because otherwise they
50  *		might access the old (wrong or even NULL) banked memory region.
51  *		Thanks to Sean Young for finding this nasty bug.
52  *	 Changes in 2.5:
53  *	  - Burning cycles always adjusts the ICount by a multiple of 4.
54  *	  - In REPEAT_AT_ONCE cases the R register wasn't incremented twice
55  *		per repetition as it should have been. Those repeated opcodes
56  *		could also underflow the ICount.
57  *	  - Simplified TIME_LOOP_HACKS for BC and added two more for DE + HL
58  *		timing loops. I think those hacks weren't endian safe before too.
59  *	 Changes in 2.4:
60  *	  - z80_reset zaps the entire context, sets IX and IY to 0xffff(!) and
61  *		sets the Z flag. With these changes the Tehkan World Cup driver
62  *		_seems_ to work again.
63  *	 Changes in 2.3:
64  *	  - External termination of the execution loop calls z80_burn() and
65  *		z80_vm_burn() to burn an amount of cycles (R adjustment)
66  *	  - Shortcuts which burn CPU cycles (BUSY_LOOP_HACKS and TIME_LOOP_HACKS)
67  *		now also adjust the R register depending on the skipped opcodes.
68  *	 Changes in 2.2:
69  *	  - Fixed bugs in CPL, SCF and CCF instructions flag handling.
70  *	  - Changed variable EA and ARG16() function to UINT32; this
71  *		produces slightly more efficient code.
72  *	  - The DD/FD XY CB opcodes where XY is 40-7F and Y is not 6/E
73  *		are changed to calls to the X6/XE opcodes to reduce object size.
74  *		They're hardly ever used so this should not yield a speed penalty.
75  *	 New in 2.0:
76  *	  - Optional more exact Z80 emulation (#define Z80_EXACT 1) according
77  *		to a detailed description by Sean Young which can be found at:
78  *		http://www.msxnet.org/tech/z80-documented.pdf
79  *****************************************************************************/
80 
81 #include "driver.h"
82 #include "cpuintrf.h"
83 #include "state.h"
84 #include "mamedbg.h"
85 #include "z80.h"
86 #include "log.h"
87 
88 /* execute main opcodes inside a big switch statement */
89 #ifndef BIG_SWITCH
90 #define BIG_SWITCH			1
91 #endif
92 
93 /* big flags array for ADD/ADC/SUB/SBC/CP results */
94 #define BIG_FLAGS_ARRAY		1
95 
96 /* Set to 1 for a more exact (but somewhat slower) Z80 emulation */
97 #define Z80_EXACT			1
98 
99 /* on JP and JR opcodes check for tight loops */
100 #define BUSY_LOOP_HACKS		1
101 
102 /* check for delay loops counting down BC */
103 #define TIME_LOOP_HACKS		1
104 
105 #ifdef X86_ASM
106 #undef	BIG_FLAGS_ARRAY
107 #define BIG_FLAGS_ARRAY		0
108 #endif
109 
110 static UINT8 z80_reg_layout[] = {
111 	Z80_PC, Z80_SP, Z80_AF, Z80_BC, Z80_DE, Z80_HL, -1,
112 	Z80_IX, Z80_IY, Z80_AF2,Z80_BC2,Z80_DE2,Z80_HL2,-1,
113 	Z80_R,	Z80_I,	Z80_IM, Z80_IFF1,Z80_IFF2, -1,
114 	Z80_NMI_STATE,Z80_IRQ_STATE,Z80_DC0,Z80_DC1,Z80_DC2,Z80_DC3, 0
115 };
116 
117 static UINT8 z80_win_layout[] = {
118 	27, 0,53, 4,	/* register window (top rows) */
119 	 0, 0,26,22,	/* disassembler window (left colums) */
120 	27, 5,53, 8,	/* memory #1 window (right, upper middle) */
121 	27,14,53, 8,	/* memory #2 window (right, lower middle) */
122 	 0,23,80, 1,	/* command line window (bottom rows) */
123 };
124 
125 /****************************************************************************/
126 /* The Z80 registers. HALT is set to 1 when the CPU is halted, the refresh	*/
127 /* register is calculated as follows: refresh=(Regs.R&127)|(Regs.R2&128)	*/
128 /****************************************************************************/
129 typedef struct {
130 /* 00 */	PAIR	PREPC,PC,SP,AF,BC,DE,HL,IX,IY;
131 /* 24 */	PAIR	AF2,BC2,DE2,HL2;
132 /* 34 */	UINT8	R,R2,IFF1,IFF2,HALT,IM,I;
133 /* 3B */	UINT8	irq_max;			/* number of daisy chain devices		*/
134 /* 3C */	INT8	request_irq;		/* daisy chain next request device		*/
135 /* 3D */	INT8	service_irq;		/* daisy chain next reti handling device */
136 /* 3E */	UINT8	nmi_state;			/* nmi line state */
137 /* 3F */	UINT8	irq_state;			/* irq line state */
138 /* 40 */	UINT8	int_state[Z80_MAXDAISY];
139 /* 44 */	Z80_DaisyChain irq[Z80_MAXDAISY];
140 /* 84 */	int		(*irq_callback)(int irqline);
141 /* 88 */	int		extra_cycles;		/* extra cycles for interrupts */
142 }	Z80_Regs;
143 
144 #define CF	0x01
145 #define NF	0x02
146 #define PF	0x04
147 #define VF	PF
148 #define XF	0x08
149 #define HF	0x10
150 #define YF	0x20
151 #define ZF	0x40
152 #define SF	0x80
153 
154 #define INT_IRQ 0x01
155 #define NMI_IRQ 0x02
156 
157 #define _PPC	Z80.PREPC.d		/* previous program counter */
158 
159 #define _PCD	Z80.PC.d
160 #define _PC		Z80.PC.w.l
161 
162 #define _SPD	Z80.SP.d
163 #define _SP		Z80.SP.w.l
164 
165 #define _AFD	Z80.AF.d
166 #define _AF		Z80.AF.w.l
167 #define _A		Z80.AF.b.h
168 #define _F		Z80.AF.b.l
169 
170 #define _BCD	Z80.BC.d
171 #define _BC		Z80.BC.w.l
172 #define _B		Z80.BC.b.h
173 #define _C		Z80.BC.b.l
174 
175 #define _DED	Z80.DE.d
176 #define _DE		Z80.DE.w.l
177 #define _D		Z80.DE.b.h
178 #define _E		Z80.DE.b.l
179 
180 #define _HLD	Z80.HL.d
181 #define _HL		Z80.HL.w.l
182 #define _H		Z80.HL.b.h
183 #define _L		Z80.HL.b.l
184 
185 #define _IXD	Z80.IX.d
186 #define _IX		Z80.IX.w.l
187 #define _HX		Z80.IX.b.h
188 #define _LX		Z80.IX.b.l
189 
190 #define _IYD	Z80.IY.d
191 #define _IY		Z80.IY.w.l
192 #define _HY		Z80.IY.b.h
193 #define _LY		Z80.IY.b.l
194 
195 #define _I		Z80.I
196 #define _R		Z80.R
197 #define _R2		Z80.R2
198 #define _IM		Z80.IM
199 #define _IFF1	Z80.IFF1
200 #define _IFF2	Z80.IFF2
201 #define _HALT	Z80.HALT
202 
203 int z80_ICount;
204 static Z80_Regs Z80;
205 static UINT32 EA;
206 static int after_EI = 0;
207 
208 static UINT8 SZ[256];		/* zero and sign flags */
209 static UINT8 SZ_BIT[256];	/* zero, sign and parity/overflow (=zero) flags for BIT opcode */
210 static UINT8 SZP[256];		/* zero, sign and parity flags */
211 static UINT8 SZHV_inc[256]; /* zero, sign, half carry and overflow flags INC r8 */
212 static UINT8 SZHV_dec[256]; /* zero, sign, half carry and overflow flags DEC r8 */
213 
214 #if BIG_FLAGS_ARRAY
215 static UINT8 *SZHVC_add = 0;
216 static UINT8 *SZHVC_sub = 0;
217 #endif
218 
219 static const UINT8 cc_op[0x100] = {
220  4,10, 7, 6, 4, 4, 7, 4, 4,11, 7, 6, 4, 4, 7, 4,
221  8,10, 7, 6, 4, 4, 7, 4,12,11, 7, 6, 4, 4, 7, 4,
222  7,10,16, 6, 4, 4, 7, 4, 7,11,16, 6, 4, 4, 7, 4,
223  7,10,13, 6,11,11,10, 4, 7,11,13, 6, 4, 4, 7, 4,
224  4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
225  4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
226  4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
227  7, 7, 7, 7, 7, 7, 4, 7, 4, 4, 4, 4, 4, 4, 7, 4,
228  4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
229  4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
230  4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
231  4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
232  5,10,10,10,10,11, 7,11, 5,10,10, 0,10,17, 7,11,
233  5,10,10,11,10,11, 7,11, 5, 4,10,11,10, 0, 7,11,
234  5,10,10,19,10,11, 7,11, 5, 4,10, 4,10, 0, 7,11,
235  5,10,10, 4,10,11, 7,11, 5, 6,10, 4,10, 0, 7,11};
236 
237 static const UINT8 cc_cb[0x100] = {
238  8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
239  8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
240  8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
241  8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
242  8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
243  8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
244  8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
245  8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
246  8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
247  8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
248  8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
249  8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
250  8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
251  8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
252  8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
253  8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8};
254 
255 static const UINT8 cc_ed[0x100] = {
256  8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
257  8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
258  8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
259  8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
260 12,12,15,20, 8, 8, 8, 9,12,12,15,20, 8, 8, 8, 9,
261 12,12,15,20, 8, 8, 8, 9,12,12,15,20, 8, 8, 8, 9,
262 12,12,15,20, 8, 8, 8,18,12,12,15,20, 8, 8, 8,18,
263 12,12,15,20, 8, 8, 8, 8,12,12,15,20, 8, 8, 8, 8,
264  8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
265  8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
266 16,16,16,16, 8, 8, 8, 8,16,16,16,16, 8, 8, 8, 8,
267 16,16,16,16, 8, 8, 8, 8,16,16,16,16, 8, 8, 8, 8,
268  8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
269  8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
270  8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
271  8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8};
272 
273 static const UINT8 cc_xy[0x100] = {
274  4, 4, 4, 4, 4, 4, 4, 4, 4,15, 4, 4, 4, 4, 4, 4,
275  4, 4, 4, 4, 4, 4, 4, 4, 4,15, 4, 4, 4, 4, 4, 4,
276  4,14,20,10, 9, 9, 9, 4, 4,15,20,10, 9, 9, 9, 4,
277  4, 4, 4, 4,23,23,19, 4, 4,15, 4, 4, 4, 4, 4, 4,
278  4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
279  4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
280  9, 9, 9, 9, 9, 9,19, 9, 9, 9, 9, 9, 9, 9,19, 9,
281 19,19,19,19,19,19, 4,19, 4, 4, 4, 4, 9, 9,19, 4,
282  4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
283  4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
284  4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
285  4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
286  4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 0, 4, 4, 4, 4,
287  4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
288  4,14, 4,23, 4,15, 4, 4, 4, 8, 4, 4, 4, 4, 4, 4,
289  4, 4, 4, 4, 4, 4, 4, 4, 4,10, 4, 4, 4, 4, 4, 4};
290 
291 static const UINT8 cc_xycb[0x100] = {
292 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
293 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
294 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
295 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
296 20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,
297 20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,
298 20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,
299 20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,
300 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
301 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
302 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
303 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
304 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
305 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
306 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
307 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23};
308 
309 /* extra cycles if jr/jp/call taken and 'interrupt latency' on rst 0-7 */
310 static const UINT8 cc_ex[0x100] = {
311  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
312  5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,	/* DJNZ */
313  5, 0, 0, 0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0,	/* JR NZ/JR Z */
314  5, 0, 0, 0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0,	/* JR NC/JR C */
315  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
316  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
317  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
318  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
319  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
320  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
321  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
322  5, 5, 5, 5, 0, 0, 0, 0, 5, 5, 5, 5, 0, 0, 0, 0,	/* LDIR/CPIR/INIR/OTIR LDDR/CPDR/INDR/OTDR */
323  6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2,
324  6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2,
325  6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2,
326  6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2};
327 
328 static const UINT8 *cc[6] = { cc_op, cc_cb, cc_ed, cc_xy, cc_xycb, cc_ex };
329 #define Z80_TABLE_dd	Z80_TABLE_xy
330 #define Z80_TABLE_fd	Z80_TABLE_xy
331 
332 static void take_interrupt(void);
333 
334 typedef void (*funcptr)(void);
335 
336 #define PROTOTYPES(tablename,prefix) \
337 static INLINE void prefix##_00(void); static INLINE void prefix##_01(void); static INLINE void prefix##_02(void); static INLINE void prefix##_03(void); \
338 static INLINE void prefix##_04(void); static INLINE void prefix##_05(void); static INLINE void prefix##_06(void); static INLINE void prefix##_07(void); \
339 static INLINE void prefix##_08(void); static INLINE void prefix##_09(void); static INLINE void prefix##_0a(void); static INLINE void prefix##_0b(void); \
340 static INLINE void prefix##_0c(void); static INLINE void prefix##_0d(void); static INLINE void prefix##_0e(void); static INLINE void prefix##_0f(void); \
341 static INLINE void prefix##_10(void); static INLINE void prefix##_11(void); static INLINE void prefix##_12(void); static INLINE void prefix##_13(void); \
342 static INLINE void prefix##_14(void); static INLINE void prefix##_15(void); static INLINE void prefix##_16(void); static INLINE void prefix##_17(void); \
343 static INLINE void prefix##_18(void); static INLINE void prefix##_19(void); static INLINE void prefix##_1a(void); static INLINE void prefix##_1b(void); \
344 static INLINE void prefix##_1c(void); static INLINE void prefix##_1d(void); static INLINE void prefix##_1e(void); static INLINE void prefix##_1f(void); \
345 static INLINE void prefix##_20(void); static INLINE void prefix##_21(void); static INLINE void prefix##_22(void); static INLINE void prefix##_23(void); \
346 static INLINE void prefix##_24(void); static INLINE void prefix##_25(void); static INLINE void prefix##_26(void); static INLINE void prefix##_27(void); \
347 static INLINE void prefix##_28(void); static INLINE void prefix##_29(void); static INLINE void prefix##_2a(void); static INLINE void prefix##_2b(void); \
348 static INLINE void prefix##_2c(void); static INLINE void prefix##_2d(void); static INLINE void prefix##_2e(void); static INLINE void prefix##_2f(void); \
349 static INLINE void prefix##_30(void); static INLINE void prefix##_31(void); static INLINE void prefix##_32(void); static INLINE void prefix##_33(void); \
350 static INLINE void prefix##_34(void); static INLINE void prefix##_35(void); static INLINE void prefix##_36(void); static INLINE void prefix##_37(void); \
351 static INLINE void prefix##_38(void); static INLINE void prefix##_39(void); static INLINE void prefix##_3a(void); static INLINE void prefix##_3b(void); \
352 static INLINE void prefix##_3c(void); static INLINE void prefix##_3d(void); static INLINE void prefix##_3e(void); static INLINE void prefix##_3f(void); \
353 static INLINE void prefix##_40(void); static INLINE void prefix##_41(void); static INLINE void prefix##_42(void); static INLINE void prefix##_43(void); \
354 static INLINE void prefix##_44(void); static INLINE void prefix##_45(void); static INLINE void prefix##_46(void); static INLINE void prefix##_47(void); \
355 static INLINE void prefix##_48(void); static INLINE void prefix##_49(void); static INLINE void prefix##_4a(void); static INLINE void prefix##_4b(void); \
356 static INLINE void prefix##_4c(void); static INLINE void prefix##_4d(void); static INLINE void prefix##_4e(void); static INLINE void prefix##_4f(void); \
357 static INLINE void prefix##_50(void); static INLINE void prefix##_51(void); static INLINE void prefix##_52(void); static INLINE void prefix##_53(void); \
358 static INLINE void prefix##_54(void); static INLINE void prefix##_55(void); static INLINE void prefix##_56(void); static INLINE void prefix##_57(void); \
359 static INLINE void prefix##_58(void); static INLINE void prefix##_59(void); static INLINE void prefix##_5a(void); static INLINE void prefix##_5b(void); \
360 static INLINE void prefix##_5c(void); static INLINE void prefix##_5d(void); static INLINE void prefix##_5e(void); static INLINE void prefix##_5f(void); \
361 static INLINE void prefix##_60(void); static INLINE void prefix##_61(void); static INLINE void prefix##_62(void); static INLINE void prefix##_63(void); \
362 static INLINE void prefix##_64(void); static INLINE void prefix##_65(void); static INLINE void prefix##_66(void); static INLINE void prefix##_67(void); \
363 static INLINE void prefix##_68(void); static INLINE void prefix##_69(void); static INLINE void prefix##_6a(void); static INLINE void prefix##_6b(void); \
364 static INLINE void prefix##_6c(void); static INLINE void prefix##_6d(void); static INLINE void prefix##_6e(void); static INLINE void prefix##_6f(void); \
365 static INLINE void prefix##_70(void); static INLINE void prefix##_71(void); static INLINE void prefix##_72(void); static INLINE void prefix##_73(void); \
366 static INLINE void prefix##_74(void); static INLINE void prefix##_75(void); static INLINE void prefix##_76(void); static INLINE void prefix##_77(void); \
367 static INLINE void prefix##_78(void); static INLINE void prefix##_79(void); static INLINE void prefix##_7a(void); static INLINE void prefix##_7b(void); \
368 static INLINE void prefix##_7c(void); static INLINE void prefix##_7d(void); static INLINE void prefix##_7e(void); static INLINE void prefix##_7f(void); \
369 static INLINE void prefix##_80(void); static INLINE void prefix##_81(void); static INLINE void prefix##_82(void); static INLINE void prefix##_83(void); \
370 static INLINE void prefix##_84(void); static INLINE void prefix##_85(void); static INLINE void prefix##_86(void); static INLINE void prefix##_87(void); \
371 static INLINE void prefix##_88(void); static INLINE void prefix##_89(void); static INLINE void prefix##_8a(void); static INLINE void prefix##_8b(void); \
372 static INLINE void prefix##_8c(void); static INLINE void prefix##_8d(void); static INLINE void prefix##_8e(void); static INLINE void prefix##_8f(void); \
373 static INLINE void prefix##_90(void); static INLINE void prefix##_91(void); static INLINE void prefix##_92(void); static INLINE void prefix##_93(void); \
374 static INLINE void prefix##_94(void); static INLINE void prefix##_95(void); static INLINE void prefix##_96(void); static INLINE void prefix##_97(void); \
375 static INLINE void prefix##_98(void); static INLINE void prefix##_99(void); static INLINE void prefix##_9a(void); static INLINE void prefix##_9b(void); \
376 static INLINE void prefix##_9c(void); static INLINE void prefix##_9d(void); static INLINE void prefix##_9e(void); static INLINE void prefix##_9f(void); \
377 static INLINE void prefix##_a0(void); static INLINE void prefix##_a1(void); static INLINE void prefix##_a2(void); static INLINE void prefix##_a3(void); \
378 static INLINE void prefix##_a4(void); static INLINE void prefix##_a5(void); static INLINE void prefix##_a6(void); static INLINE void prefix##_a7(void); \
379 static INLINE void prefix##_a8(void); static INLINE void prefix##_a9(void); static INLINE void prefix##_aa(void); static INLINE void prefix##_ab(void); \
380 static INLINE void prefix##_ac(void); static INLINE void prefix##_ad(void); static INLINE void prefix##_ae(void); static INLINE void prefix##_af(void); \
381 static INLINE void prefix##_b0(void); static INLINE void prefix##_b1(void); static INLINE void prefix##_b2(void); static INLINE void prefix##_b3(void); \
382 static INLINE void prefix##_b4(void); static INLINE void prefix##_b5(void); static INLINE void prefix##_b6(void); static INLINE void prefix##_b7(void); \
383 static INLINE void prefix##_b8(void); static INLINE void prefix##_b9(void); static INLINE void prefix##_ba(void); static INLINE void prefix##_bb(void); \
384 static INLINE void prefix##_bc(void); static INLINE void prefix##_bd(void); static INLINE void prefix##_be(void); static INLINE void prefix##_bf(void); \
385 static INLINE void prefix##_c0(void); static INLINE void prefix##_c1(void); static INLINE void prefix##_c2(void); static INLINE void prefix##_c3(void); \
386 static INLINE void prefix##_c4(void); static INLINE void prefix##_c5(void); static INLINE void prefix##_c6(void); static INLINE void prefix##_c7(void); \
387 static INLINE void prefix##_c8(void); static INLINE void prefix##_c9(void); static INLINE void prefix##_ca(void); static INLINE void prefix##_cb(void); \
388 static INLINE void prefix##_cc(void); static INLINE void prefix##_cd(void); static INLINE void prefix##_ce(void); static INLINE void prefix##_cf(void); \
389 static INLINE void prefix##_d0(void); static INLINE void prefix##_d1(void); static INLINE void prefix##_d2(void); static INLINE void prefix##_d3(void); \
390 static INLINE void prefix##_d4(void); static INLINE void prefix##_d5(void); static INLINE void prefix##_d6(void); static INLINE void prefix##_d7(void); \
391 static INLINE void prefix##_d8(void); static INLINE void prefix##_d9(void); static INLINE void prefix##_da(void); static INLINE void prefix##_db(void); \
392 static INLINE void prefix##_dc(void); static INLINE void prefix##_dd(void); static INLINE void prefix##_de(void); static INLINE void prefix##_df(void); \
393 static INLINE void prefix##_e0(void); static INLINE void prefix##_e1(void); static INLINE void prefix##_e2(void); static INLINE void prefix##_e3(void); \
394 static INLINE void prefix##_e4(void); static INLINE void prefix##_e5(void); static INLINE void prefix##_e6(void); static INLINE void prefix##_e7(void); \
395 static INLINE void prefix##_e8(void); static INLINE void prefix##_e9(void); static INLINE void prefix##_ea(void); static INLINE void prefix##_eb(void); \
396 static INLINE void prefix##_ec(void); static INLINE void prefix##_ed(void); static INLINE void prefix##_ee(void); static INLINE void prefix##_ef(void); \
397 static INLINE void prefix##_f0(void); static INLINE void prefix##_f1(void); static INLINE void prefix##_f2(void); static INLINE void prefix##_f3(void); \
398 static INLINE void prefix##_f4(void); static INLINE void prefix##_f5(void); static INLINE void prefix##_f6(void); static INLINE void prefix##_f7(void); \
399 static INLINE void prefix##_f8(void); static INLINE void prefix##_f9(void); static INLINE void prefix##_fa(void); static INLINE void prefix##_fb(void); \
400 static INLINE void prefix##_fc(void); static INLINE void prefix##_fd(void); static INLINE void prefix##_fe(void); static INLINE void prefix##_ff(void); \
401 static const funcptr tablename[0x100] = {	\
402 	prefix##_00,prefix##_01,prefix##_02,prefix##_03,prefix##_04,prefix##_05,prefix##_06,prefix##_07, \
403 	prefix##_08,prefix##_09,prefix##_0a,prefix##_0b,prefix##_0c,prefix##_0d,prefix##_0e,prefix##_0f, \
404 	prefix##_10,prefix##_11,prefix##_12,prefix##_13,prefix##_14,prefix##_15,prefix##_16,prefix##_17, \
405 	prefix##_18,prefix##_19,prefix##_1a,prefix##_1b,prefix##_1c,prefix##_1d,prefix##_1e,prefix##_1f, \
406 	prefix##_20,prefix##_21,prefix##_22,prefix##_23,prefix##_24,prefix##_25,prefix##_26,prefix##_27, \
407 	prefix##_28,prefix##_29,prefix##_2a,prefix##_2b,prefix##_2c,prefix##_2d,prefix##_2e,prefix##_2f, \
408 	prefix##_30,prefix##_31,prefix##_32,prefix##_33,prefix##_34,prefix##_35,prefix##_36,prefix##_37, \
409 	prefix##_38,prefix##_39,prefix##_3a,prefix##_3b,prefix##_3c,prefix##_3d,prefix##_3e,prefix##_3f, \
410 	prefix##_40,prefix##_41,prefix##_42,prefix##_43,prefix##_44,prefix##_45,prefix##_46,prefix##_47, \
411 	prefix##_48,prefix##_49,prefix##_4a,prefix##_4b,prefix##_4c,prefix##_4d,prefix##_4e,prefix##_4f, \
412 	prefix##_50,prefix##_51,prefix##_52,prefix##_53,prefix##_54,prefix##_55,prefix##_56,prefix##_57, \
413 	prefix##_58,prefix##_59,prefix##_5a,prefix##_5b,prefix##_5c,prefix##_5d,prefix##_5e,prefix##_5f, \
414 	prefix##_60,prefix##_61,prefix##_62,prefix##_63,prefix##_64,prefix##_65,prefix##_66,prefix##_67, \
415 	prefix##_68,prefix##_69,prefix##_6a,prefix##_6b,prefix##_6c,prefix##_6d,prefix##_6e,prefix##_6f, \
416 	prefix##_70,prefix##_71,prefix##_72,prefix##_73,prefix##_74,prefix##_75,prefix##_76,prefix##_77, \
417 	prefix##_78,prefix##_79,prefix##_7a,prefix##_7b,prefix##_7c,prefix##_7d,prefix##_7e,prefix##_7f, \
418 	prefix##_80,prefix##_81,prefix##_82,prefix##_83,prefix##_84,prefix##_85,prefix##_86,prefix##_87, \
419 	prefix##_88,prefix##_89,prefix##_8a,prefix##_8b,prefix##_8c,prefix##_8d,prefix##_8e,prefix##_8f, \
420 	prefix##_90,prefix##_91,prefix##_92,prefix##_93,prefix##_94,prefix##_95,prefix##_96,prefix##_97, \
421 	prefix##_98,prefix##_99,prefix##_9a,prefix##_9b,prefix##_9c,prefix##_9d,prefix##_9e,prefix##_9f, \
422 	prefix##_a0,prefix##_a1,prefix##_a2,prefix##_a3,prefix##_a4,prefix##_a5,prefix##_a6,prefix##_a7, \
423 	prefix##_a8,prefix##_a9,prefix##_aa,prefix##_ab,prefix##_ac,prefix##_ad,prefix##_ae,prefix##_af, \
424 	prefix##_b0,prefix##_b1,prefix##_b2,prefix##_b3,prefix##_b4,prefix##_b5,prefix##_b6,prefix##_b7, \
425 	prefix##_b8,prefix##_b9,prefix##_ba,prefix##_bb,prefix##_bc,prefix##_bd,prefix##_be,prefix##_bf, \
426 	prefix##_c0,prefix##_c1,prefix##_c2,prefix##_c3,prefix##_c4,prefix##_c5,prefix##_c6,prefix##_c7, \
427 	prefix##_c8,prefix##_c9,prefix##_ca,prefix##_cb,prefix##_cc,prefix##_cd,prefix##_ce,prefix##_cf, \
428 	prefix##_d0,prefix##_d1,prefix##_d2,prefix##_d3,prefix##_d4,prefix##_d5,prefix##_d6,prefix##_d7, \
429 	prefix##_d8,prefix##_d9,prefix##_da,prefix##_db,prefix##_dc,prefix##_dd,prefix##_de,prefix##_df, \
430 	prefix##_e0,prefix##_e1,prefix##_e2,prefix##_e3,prefix##_e4,prefix##_e5,prefix##_e6,prefix##_e7, \
431 	prefix##_e8,prefix##_e9,prefix##_ea,prefix##_eb,prefix##_ec,prefix##_ed,prefix##_ee,prefix##_ef, \
432 	prefix##_f0,prefix##_f1,prefix##_f2,prefix##_f3,prefix##_f4,prefix##_f5,prefix##_f6,prefix##_f7, \
433 	prefix##_f8,prefix##_f9,prefix##_fa,prefix##_fb,prefix##_fc,prefix##_fd,prefix##_fe,prefix##_ff  \
434 }
435 
436 PROTOTYPES(Z80op,op);
437 PROTOTYPES(Z80cb,cb);
438 PROTOTYPES(Z80dd,dd);
439 PROTOTYPES(Z80ed,ed);
440 PROTOTYPES(Z80fd,fd);
441 PROTOTYPES(Z80xycb,xycb);
442 
443 /****************************************************************************/
444 /* Burn an odd amount of cycles, that is instructions taking something		*/
445 /* different from 4 T-states per opcode (and R increment)					*/
446 /****************************************************************************/
BURNODD(int cycles,int opcodes,int cyclesum)447 static INLINE void BURNODD(int cycles, int opcodes, int cyclesum)
448 {
449 	if( cycles > 0 )
450 	{
451 		_R += (cycles / cyclesum) * opcodes;
452 		z80_ICount -= (cycles / cyclesum) * cyclesum;
453 	}
454 }
455 
456 /***************************************************************
457  * define an opcode function
458  ***************************************************************/
459 #define OP(prefix,opcode)  static INLINE void prefix##_##opcode(void)
460 
461 /***************************************************************
462  * adjust cycle count by n T-states
463  ***************************************************************/
464 #define CC(prefix,opcode) z80_ICount -= cc[Z80_TABLE_##prefix][opcode]
465 
466 /***************************************************************
467  * execute an opcode
468  ***************************************************************/
469 #define EXEC(prefix,opcode)										\
470 {																\
471 	unsigned op = opcode;										\
472 	CC(prefix,op);												\
473 	(*Z80##prefix[op])();										\
474 }
475 
476 #if BIG_SWITCH
477 #define EXEC_INLINE(prefix,opcode)								\
478 {																\
479 	unsigned op = opcode;										\
480 	CC(prefix,op);												\
481 	switch(op)													\
482 	{															\
483 	case 0x00:prefix##_##00();break; case 0x01:prefix##_##01();break; case 0x02:prefix##_##02();break; case 0x03:prefix##_##03();break; \
484 	case 0x04:prefix##_##04();break; case 0x05:prefix##_##05();break; case 0x06:prefix##_##06();break; case 0x07:prefix##_##07();break; \
485 	case 0x08:prefix##_##08();break; case 0x09:prefix##_##09();break; case 0x0a:prefix##_##0a();break; case 0x0b:prefix##_##0b();break; \
486 	case 0x0c:prefix##_##0c();break; case 0x0d:prefix##_##0d();break; case 0x0e:prefix##_##0e();break; case 0x0f:prefix##_##0f();break; \
487 	case 0x10:prefix##_##10();break; case 0x11:prefix##_##11();break; case 0x12:prefix##_##12();break; case 0x13:prefix##_##13();break; \
488 	case 0x14:prefix##_##14();break; case 0x15:prefix##_##15();break; case 0x16:prefix##_##16();break; case 0x17:prefix##_##17();break; \
489 	case 0x18:prefix##_##18();break; case 0x19:prefix##_##19();break; case 0x1a:prefix##_##1a();break; case 0x1b:prefix##_##1b();break; \
490 	case 0x1c:prefix##_##1c();break; case 0x1d:prefix##_##1d();break; case 0x1e:prefix##_##1e();break; case 0x1f:prefix##_##1f();break; \
491 	case 0x20:prefix##_##20();break; case 0x21:prefix##_##21();break; case 0x22:prefix##_##22();break; case 0x23:prefix##_##23();break; \
492 	case 0x24:prefix##_##24();break; case 0x25:prefix##_##25();break; case 0x26:prefix##_##26();break; case 0x27:prefix##_##27();break; \
493 	case 0x28:prefix##_##28();break; case 0x29:prefix##_##29();break; case 0x2a:prefix##_##2a();break; case 0x2b:prefix##_##2b();break; \
494 	case 0x2c:prefix##_##2c();break; case 0x2d:prefix##_##2d();break; case 0x2e:prefix##_##2e();break; case 0x2f:prefix##_##2f();break; \
495 	case 0x30:prefix##_##30();break; case 0x31:prefix##_##31();break; case 0x32:prefix##_##32();break; case 0x33:prefix##_##33();break; \
496 	case 0x34:prefix##_##34();break; case 0x35:prefix##_##35();break; case 0x36:prefix##_##36();break; case 0x37:prefix##_##37();break; \
497 	case 0x38:prefix##_##38();break; case 0x39:prefix##_##39();break; case 0x3a:prefix##_##3a();break; case 0x3b:prefix##_##3b();break; \
498 	case 0x3c:prefix##_##3c();break; case 0x3d:prefix##_##3d();break; case 0x3e:prefix##_##3e();break; case 0x3f:prefix##_##3f();break; \
499 	case 0x40:prefix##_##40();break; case 0x41:prefix##_##41();break; case 0x42:prefix##_##42();break; case 0x43:prefix##_##43();break; \
500 	case 0x44:prefix##_##44();break; case 0x45:prefix##_##45();break; case 0x46:prefix##_##46();break; case 0x47:prefix##_##47();break; \
501 	case 0x48:prefix##_##48();break; case 0x49:prefix##_##49();break; case 0x4a:prefix##_##4a();break; case 0x4b:prefix##_##4b();break; \
502 	case 0x4c:prefix##_##4c();break; case 0x4d:prefix##_##4d();break; case 0x4e:prefix##_##4e();break; case 0x4f:prefix##_##4f();break; \
503 	case 0x50:prefix##_##50();break; case 0x51:prefix##_##51();break; case 0x52:prefix##_##52();break; case 0x53:prefix##_##53();break; \
504 	case 0x54:prefix##_##54();break; case 0x55:prefix##_##55();break; case 0x56:prefix##_##56();break; case 0x57:prefix##_##57();break; \
505 	case 0x58:prefix##_##58();break; case 0x59:prefix##_##59();break; case 0x5a:prefix##_##5a();break; case 0x5b:prefix##_##5b();break; \
506 	case 0x5c:prefix##_##5c();break; case 0x5d:prefix##_##5d();break; case 0x5e:prefix##_##5e();break; case 0x5f:prefix##_##5f();break; \
507 	case 0x60:prefix##_##60();break; case 0x61:prefix##_##61();break; case 0x62:prefix##_##62();break; case 0x63:prefix##_##63();break; \
508 	case 0x64:prefix##_##64();break; case 0x65:prefix##_##65();break; case 0x66:prefix##_##66();break; case 0x67:prefix##_##67();break; \
509 	case 0x68:prefix##_##68();break; case 0x69:prefix##_##69();break; case 0x6a:prefix##_##6a();break; case 0x6b:prefix##_##6b();break; \
510 	case 0x6c:prefix##_##6c();break; case 0x6d:prefix##_##6d();break; case 0x6e:prefix##_##6e();break; case 0x6f:prefix##_##6f();break; \
511 	case 0x70:prefix##_##70();break; case 0x71:prefix##_##71();break; case 0x72:prefix##_##72();break; case 0x73:prefix##_##73();break; \
512 	case 0x74:prefix##_##74();break; case 0x75:prefix##_##75();break; case 0x76:prefix##_##76();break; case 0x77:prefix##_##77();break; \
513 	case 0x78:prefix##_##78();break; case 0x79:prefix##_##79();break; case 0x7a:prefix##_##7a();break; case 0x7b:prefix##_##7b();break; \
514 	case 0x7c:prefix##_##7c();break; case 0x7d:prefix##_##7d();break; case 0x7e:prefix##_##7e();break; case 0x7f:prefix##_##7f();break; \
515 	case 0x80:prefix##_##80();break; case 0x81:prefix##_##81();break; case 0x82:prefix##_##82();break; case 0x83:prefix##_##83();break; \
516 	case 0x84:prefix##_##84();break; case 0x85:prefix##_##85();break; case 0x86:prefix##_##86();break; case 0x87:prefix##_##87();break; \
517 	case 0x88:prefix##_##88();break; case 0x89:prefix##_##89();break; case 0x8a:prefix##_##8a();break; case 0x8b:prefix##_##8b();break; \
518 	case 0x8c:prefix##_##8c();break; case 0x8d:prefix##_##8d();break; case 0x8e:prefix##_##8e();break; case 0x8f:prefix##_##8f();break; \
519 	case 0x90:prefix##_##90();break; case 0x91:prefix##_##91();break; case 0x92:prefix##_##92();break; case 0x93:prefix##_##93();break; \
520 	case 0x94:prefix##_##94();break; case 0x95:prefix##_##95();break; case 0x96:prefix##_##96();break; case 0x97:prefix##_##97();break; \
521 	case 0x98:prefix##_##98();break; case 0x99:prefix##_##99();break; case 0x9a:prefix##_##9a();break; case 0x9b:prefix##_##9b();break; \
522 	case 0x9c:prefix##_##9c();break; case 0x9d:prefix##_##9d();break; case 0x9e:prefix##_##9e();break; case 0x9f:prefix##_##9f();break; \
523 	case 0xa0:prefix##_##a0();break; case 0xa1:prefix##_##a1();break; case 0xa2:prefix##_##a2();break; case 0xa3:prefix##_##a3();break; \
524 	case 0xa4:prefix##_##a4();break; case 0xa5:prefix##_##a5();break; case 0xa6:prefix##_##a6();break; case 0xa7:prefix##_##a7();break; \
525 	case 0xa8:prefix##_##a8();break; case 0xa9:prefix##_##a9();break; case 0xaa:prefix##_##aa();break; case 0xab:prefix##_##ab();break; \
526 	case 0xac:prefix##_##ac();break; case 0xad:prefix##_##ad();break; case 0xae:prefix##_##ae();break; case 0xaf:prefix##_##af();break; \
527 	case 0xb0:prefix##_##b0();break; case 0xb1:prefix##_##b1();break; case 0xb2:prefix##_##b2();break; case 0xb3:prefix##_##b3();break; \
528 	case 0xb4:prefix##_##b4();break; case 0xb5:prefix##_##b5();break; case 0xb6:prefix##_##b6();break; case 0xb7:prefix##_##b7();break; \
529 	case 0xb8:prefix##_##b8();break; case 0xb9:prefix##_##b9();break; case 0xba:prefix##_##ba();break; case 0xbb:prefix##_##bb();break; \
530 	case 0xbc:prefix##_##bc();break; case 0xbd:prefix##_##bd();break; case 0xbe:prefix##_##be();break; case 0xbf:prefix##_##bf();break; \
531 	case 0xc0:prefix##_##c0();break; case 0xc1:prefix##_##c1();break; case 0xc2:prefix##_##c2();break; case 0xc3:prefix##_##c3();break; \
532 	case 0xc4:prefix##_##c4();break; case 0xc5:prefix##_##c5();break; case 0xc6:prefix##_##c6();break; case 0xc7:prefix##_##c7();break; \
533 	case 0xc8:prefix##_##c8();break; case 0xc9:prefix##_##c9();break; case 0xca:prefix##_##ca();break; case 0xcb:prefix##_##cb();break; \
534 	case 0xcc:prefix##_##cc();break; case 0xcd:prefix##_##cd();break; case 0xce:prefix##_##ce();break; case 0xcf:prefix##_##cf();break; \
535 	case 0xd0:prefix##_##d0();break; case 0xd1:prefix##_##d1();break; case 0xd2:prefix##_##d2();break; case 0xd3:prefix##_##d3();break; \
536 	case 0xd4:prefix##_##d4();break; case 0xd5:prefix##_##d5();break; case 0xd6:prefix##_##d6();break; case 0xd7:prefix##_##d7();break; \
537 	case 0xd8:prefix##_##d8();break; case 0xd9:prefix##_##d9();break; case 0xda:prefix##_##da();break; case 0xdb:prefix##_##db();break; \
538 	case 0xdc:prefix##_##dc();break; case 0xdd:prefix##_##dd();break; case 0xde:prefix##_##de();break; case 0xdf:prefix##_##df();break; \
539 	case 0xe0:prefix##_##e0();break; case 0xe1:prefix##_##e1();break; case 0xe2:prefix##_##e2();break; case 0xe3:prefix##_##e3();break; \
540 	case 0xe4:prefix##_##e4();break; case 0xe5:prefix##_##e5();break; case 0xe6:prefix##_##e6();break; case 0xe7:prefix##_##e7();break; \
541 	case 0xe8:prefix##_##e8();break; case 0xe9:prefix##_##e9();break; case 0xea:prefix##_##ea();break; case 0xeb:prefix##_##eb();break; \
542 	case 0xec:prefix##_##ec();break; case 0xed:prefix##_##ed();break; case 0xee:prefix##_##ee();break; case 0xef:prefix##_##ef();break; \
543 	case 0xf0:prefix##_##f0();break; case 0xf1:prefix##_##f1();break; case 0xf2:prefix##_##f2();break; case 0xf3:prefix##_##f3();break; \
544 	case 0xf4:prefix##_##f4();break; case 0xf5:prefix##_##f5();break; case 0xf6:prefix##_##f6();break; case 0xf7:prefix##_##f7();break; \
545 	case 0xf8:prefix##_##f8();break; case 0xf9:prefix##_##f9();break; case 0xfa:prefix##_##fa();break; case 0xfb:prefix##_##fb();break; \
546 	case 0xfc:prefix##_##fc();break; case 0xfd:prefix##_##fd();break; case 0xfe:prefix##_##fe();break; case 0xff:prefix##_##ff();break; \
547 	}																																	\
548 }
549 #else
550 #define EXEC_INLINE EXEC
551 #endif
552 
553 
554 /***************************************************************
555  * Enter HALT state; write 1 to fake port on first execution
556  ***************************************************************/
557 #define ENTER_HALT {											\
558 	_PC--;														\
559 	_HALT = 1;													\
560 	if( !after_EI )												\
561 		z80_burn( z80_ICount );									\
562 }
563 
564 /***************************************************************
565  * Leave HALT state; write 0 to fake port
566  ***************************************************************/
567 #define LEAVE_HALT {											\
568 	if( _HALT )													\
569 	{															\
570 		_HALT = 0;												\
571 		_PC++;													\
572 	}															\
573 }
574 
575 /***************************************************************
576  * Input a byte from given I/O port
577  ***************************************************************/
578 #define IN(port)   ((UINT8)cpu_readport16(port))
579 
580 /***************************************************************
581  * Output a byte to given I/O port
582  ***************************************************************/
583 #define OUT(port,value) cpu_writeport16(port,value)
584 
585 /***************************************************************
586  * Read a byte from given memory location
587  ***************************************************************/
588 #define RM(addr) (UINT8)cpu_readmem16(addr)
589 
590 /***************************************************************
591  * Read a word from given memory location
592  ***************************************************************/
RM16(UINT32 addr,PAIR * r)593 static INLINE void RM16( UINT32 addr, PAIR *r )
594 {
595 	r->b.l = RM(addr);
596 	r->b.h = RM((addr+1)&0xffff);
597 }
598 
599 /***************************************************************
600  * Write a byte to given memory location
601  ***************************************************************/
602 #define WM(addr,value) cpu_writemem16(addr,value)
603 
604 /***************************************************************
605  * Write a word to given memory location
606  ***************************************************************/
WM16(UINT32 addr,PAIR * r)607 static INLINE void WM16( UINT32 addr, PAIR *r )
608 {
609 	WM(addr,r->b.l);
610 	WM((addr+1)&0xffff,r->b.h);
611 }
612 
613 /***************************************************************
614  * ROP() is identical to RM() except it is used for
615  * reading opcodes. In case of system with memory mapped I/O,
616  * this function can be used to greatly speed up emulation
617  ***************************************************************/
ROP(void)618 static INLINE UINT8 ROP(void)
619 {
620 	unsigned pc = _PCD;
621 	_PC++;
622 	return cpu_readop(pc);
623 }
624 
625 /****************************************************************
626  * ARG() is identical to ROP() except it is used
627  * for reading opcode arguments. This difference can be used to
628  * support systems that use different encoding mechanisms for
629  * opcodes and opcode arguments
630  ***************************************************************/
ARG(void)631 static INLINE UINT8 ARG(void)
632 {
633 	unsigned pc = _PCD;
634 	_PC++;
635 	return cpu_readop_arg(pc);
636 }
637 
ARG16(void)638 static INLINE UINT32 ARG16(void)
639 {
640 	unsigned pc = _PCD;
641 	_PC += 2;
642 	return cpu_readop_arg(pc) | (cpu_readop_arg((pc+1)&0xffff) << 8);
643 }
644 
645 /***************************************************************
646  * Calculate the effective address EA of an opcode using
647  * IX+offset resp. IY+offset addressing.
648  ***************************************************************/
649 #define EAX EA = (UINT32)(UINT16)(_IX+(INT8)ARG())
650 #define EAY EA = (UINT32)(UINT16)(_IY+(INT8)ARG())
651 
652 /***************************************************************
653  * POP
654  ***************************************************************/
655 #define POP(DR) { RM16( _SPD, &Z80.DR ); _SP += 2; }
656 
657 /***************************************************************
658  * PUSH
659  ***************************************************************/
660 #define PUSH(SR) { _SP -= 2; WM16( _SPD, &Z80.SR ); }
661 
662 /***************************************************************
663  * JP
664  ***************************************************************/
665 #if BUSY_LOOP_HACKS
666 #define JP {													\
667 	unsigned oldpc = _PCD-1;									\
668 	_PCD = ARG16();												\
669 	change_pc16(_PCD);											\
670 	/* speed up busy loop */									\
671 	if( _PCD == oldpc )											\
672 	{															\
673 		if( !after_EI )											\
674 			BURNODD( z80_ICount, 1, cc[Z80_TABLE_op][0xc3] );	\
675 	}															\
676 	else														\
677 	{															\
678 		UINT8 op = cpu_readop(_PCD);							\
679 		if( _PCD == oldpc-1 )									\
680 		{														\
681 			/* NOP - JP $-1 or EI - JP $-1 */					\
682 			if ( op == 0x00 || op == 0xfb )						\
683 			{													\
684 				if( !after_EI )									\
685 					BURNODD( z80_ICount-cc[Z80_TABLE_op][0x00], \
686 						2, cc[Z80_TABLE_op][0x00]+cc[Z80_TABLE_op][0xc3]); \
687 			}													\
688 		}														\
689 		else													\
690 		/* LD SP,#xxxx - JP $-3 (Galaga) */						\
691 		if( _PCD == oldpc-3 && op == 0x31 )						\
692 		{														\
693 			if( !after_EI )										\
694 				BURNODD( z80_ICount-cc[Z80_TABLE_op][0x31],		\
695 					2, cc[Z80_TABLE_op][0x31]+cc[Z80_TABLE_op][0xc3]); \
696 		}														\
697 	}															\
698 }
699 #else
700 #define JP {													\
701 	_PCD = ARG16();												\
702 	change_pc16(_PCD);											\
703 }
704 #endif
705 
706 /***************************************************************
707  * JP_COND
708  ***************************************************************/
709 
710 #define JP_COND(cond)											\
711 	if( cond )													\
712 	{															\
713 		_PCD = ARG16();											\
714 		change_pc16(_PCD);										\
715 	}															\
716 	else														\
717 	{															\
718 		_PC += 2;												\
719 	}
720 
721 /***************************************************************
722  * JR
723  ***************************************************************/
724 #define JR()													\
725 {																\
726 	unsigned oldpc = _PCD-1;									\
727 	INT8 arg = (INT8)ARG(); /* ARG() also increments _PC */		\
728 	_PC += arg;				/* so don't do _PC += ARG() */		\
729 	change_pc16(_PCD);											\
730 	/* speed up busy loop */									\
731 	if( _PCD == oldpc )											\
732 	{															\
733 		if( !after_EI )											\
734 			BURNODD( z80_ICount, 1, cc[Z80_TABLE_op][0x18] );	\
735 	}															\
736 	else														\
737 	{															\
738 		UINT8 op = cpu_readop(_PCD);							\
739 		if( _PCD == oldpc-1 )									\
740 		{														\
741 			/* NOP - JR $-1 or EI - JR $-1 */					\
742 			if ( op == 0x00 || op == 0xfb )						\
743 			{													\
744 				if( !after_EI )									\
745 				   BURNODD( z80_ICount-cc[Z80_TABLE_op][0x00],	\
746 					   2, cc[Z80_TABLE_op][0x00]+cc[Z80_TABLE_op][0x18]); \
747 			}													\
748 		}														\
749 		else													\
750 		/* LD SP,#xxxx - JR $-3 */								\
751 		if( _PCD == oldpc-3 && op == 0x31 )						\
752 		{														\
753 			if( !after_EI )										\
754 			   BURNODD( z80_ICount-cc[Z80_TABLE_op][0x31],		\
755 				   2, cc[Z80_TABLE_op][0x31]+cc[Z80_TABLE_op][0x18]); \
756 		}														\
757 	}															\
758 }
759 
760 /***************************************************************
761  * JR_COND
762  ***************************************************************/
763 #define JR_COND(cond,opcode)									\
764 	if( cond )													\
765 	{															\
766 		INT8 arg = (INT8)ARG(); /* ARG() also increments _PC */ \
767 		_PC += arg;				/* so don't do _PC += ARG() */	\
768 		CC(ex,opcode);											\
769 		change_pc16(_PCD);										\
770 	}															\
771 	else _PC++;													\
772 
773 /***************************************************************
774  * CALL
775  ***************************************************************/
776 #define CALL()													\
777 	EA = ARG16();												\
778 	PUSH( PC );													\
779 	_PCD = EA;													\
780 	change_pc16(_PCD)
781 
782 /***************************************************************
783  * CALL_COND
784  ***************************************************************/
785 #define CALL_COND(cond,opcode)									\
786 	if( cond )													\
787 	{															\
788 		EA = ARG16();											\
789 		PUSH( PC );												\
790 		_PCD = EA;												\
791 		CC(ex,opcode);											\
792 		change_pc16(_PCD);										\
793 	}															\
794 	else														\
795 	{															\
796 		_PC+=2;													\
797 	}
798 
799 /***************************************************************
800  * RET_COND
801  ***************************************************************/
802 #define RET_COND(cond,opcode)									\
803 	if( cond )													\
804 	{															\
805 		POP(PC);												\
806 		change_pc16(_PCD);										\
807 		CC(ex,opcode);											\
808 	}
809 
810 /***************************************************************
811  * RETN
812  ***************************************************************/
813 #define RETN	{												\
814 	log_cb(RETRO_LOG_DEBUG, LOGPRE "Z80 #%d RETN IFF1:%d IFF2:%d\n", cpu_getactivecpu(), _IFF1, _IFF2); \
815 	POP(PC);													\
816 	change_pc16(_PCD);											\
817 	if( _IFF1 == 0 && _IFF2 == 1 )								\
818 	{															\
819 		_IFF1 = 1;												\
820 		if( Z80.irq_state != CLEAR_LINE ||						\
821 			Z80.request_irq >= 0 )								\
822 		{														\
823 			log_cb(RETRO_LOG_DEBUG, LOGPRE "Z80 #%d RETN takes IRQ\n",					\
824 				cpu_getactivecpu());							\
825 			take_interrupt();									\
826 		}														\
827 	}															\
828 	else _IFF1 = _IFF2;											\
829 }
830 
831 /***************************************************************
832  * RETI
833  ***************************************************************/
834 #define RETI	{												\
835 	int device = Z80.service_irq;								\
836 	POP(PC);													\
837 	change_pc16(_PCD);											\
838 /* according to http://www.msxnet.org/tech/z80-documented.pdf */\
839 /*	_IFF1 = _IFF2;	*/											\
840 	if( device >= 0 )											\
841 	{															\
842 		log_cb(RETRO_LOG_DEBUG, LOGPRE "Z80 #%d RETI device %d: $%02x\n",					\
843 			cpu_getactivecpu(), device, Z80.irq[device].irq_param); \
844 		Z80.irq[device].interrupt_reti(Z80.irq[device].irq_param); \
845 	}															\
846 }
847 
848 /***************************************************************
849  * LD	R,A
850  ***************************************************************/
851 #define LD_R_A {												\
852 	_R = _A;													\
853 	_R2 = _A & 0x80;				/* keep bit 7 of R */		\
854 }
855 
856 /***************************************************************
857  * LD	A,R
858  ***************************************************************/
859 #define LD_A_R {												\
860 	_A = (_R & 0x7f) | _R2;										\
861 	_F = (_F & CF) | SZ[_A] | ( _IFF2 << 2 );					\
862 }
863 
864 /***************************************************************
865  * LD	I,A
866  ***************************************************************/
867 #define LD_I_A {												\
868 	_I = _A;													\
869 }
870 
871 /***************************************************************
872  * LD	A,I
873  ***************************************************************/
874 #define LD_A_I {												\
875 	_A = _I;													\
876 	_F = (_F & CF) | SZ[_A] | ( _IFF2 << 2 );					\
877 }
878 
879 /***************************************************************
880  * RST
881  ***************************************************************/
882 #define RST(addr)												\
883 	PUSH( PC );													\
884 	_PCD = addr;												\
885 	change_pc16(_PCD)
886 
887 /***************************************************************
888  * INC	r8
889  ***************************************************************/
INC(UINT8 value)890 static INLINE UINT8 INC(UINT8 value)
891 {
892 	UINT8 res = value + 1;
893 	_F = (_F & CF) | SZHV_inc[res];
894 	return (UINT8)res;
895 }
896 
897 /***************************************************************
898  * DEC	r8
899  ***************************************************************/
DEC(UINT8 value)900 static INLINE UINT8 DEC(UINT8 value)
901 {
902 	UINT8 res = value - 1;
903 	_F = (_F & CF) | SZHV_dec[res];
904 	return res;
905 }
906 
907 /***************************************************************
908  * RLCA
909  ***************************************************************/
910 #if Z80_EXACT
911 #define RLCA													\
912 	_A = (_A << 1) | (_A >> 7);									\
913 	_F = (_F & (SF | ZF | PF)) | (_A & (YF | XF | CF))
914 #else
915 #define RLCA													\
916 	_A = (_A << 1) | (_A >> 7);									\
917 	_F = (_F & (SF | ZF | YF | XF | PF)) | (_A & CF)
918 #endif
919 
920 /***************************************************************
921  * RRCA
922  ***************************************************************/
923 #if Z80_EXACT
924 #define RRCA													\
925 	_F = (_F & (SF | ZF | PF)) | (_A & CF);						\
926 	_A = (_A >> 1) | (_A << 7);									\
927 	_F |= (_A & (YF | XF) )
928 #else
929 #define RRCA													\
930 	_F = (_F & (SF | ZF | YF | XF | PF)) | (_A & CF);			\
931 	_A = (_A >> 1) | (_A << 7)
932 #endif
933 
934 /***************************************************************
935  * RLA
936  ***************************************************************/
937 #if Z80_EXACT
938 #define RLA {													\
939 	UINT8 res = (_A << 1) | (_F & CF);							\
940 	UINT8 c = (_A & 0x80) ? CF : 0;								\
941 	_F = (_F & (SF | ZF | PF)) | c | (res & (YF | XF));			\
942 	_A = res;													\
943 }
944 #else
945 #define RLA {													\
946 	UINT8 res = (_A << 1) | (_F & CF);							\
947 	UINT8 c = (_A & 0x80) ? CF : 0;								\
948 	_F = (_F & (SF | ZF | YF | XF | PF)) | c;					\
949 	_A = res;													\
950 }
951 #endif
952 
953 /***************************************************************
954  * RRA
955  ***************************************************************/
956 #if Z80_EXACT
957 #define RRA {													\
958 	UINT8 res = (_A >> 1) | (_F << 7);							\
959 	UINT8 c = (_A & 0x01) ? CF : 0;								\
960 	_F = (_F & (SF | ZF | PF)) | c | (res & (YF | XF));			\
961 	_A = res;													\
962 }
963 #else
964 #define RRA {													\
965 	UINT8 res = (_A >> 1) | (_F << 7);							\
966 	UINT8 c = (_A & 0x01) ? CF : 0;								\
967 	_F = (_F & (SF | ZF | YF | XF | PF)) | c;					\
968 	_A = res;													\
969 }
970 #endif
971 
972 /***************************************************************
973  * RRD
974  ***************************************************************/
975 #define RRD {													\
976 	UINT8 n = RM(_HL);											\
977 	WM( _HL, (n >> 4) | (_A << 4) );							\
978 	_A = (_A & 0xf0) | (n & 0x0f);								\
979 	_F = (_F & CF) | SZP[_A];									\
980 }
981 
982 /***************************************************************
983  * RLD
984  ***************************************************************/
985 #define RLD {													\
986 	UINT8 n = RM(_HL);											\
987 	WM( _HL, (n << 4) | (_A & 0x0f) );							\
988 	_A = (_A & 0xf0) | (n >> 4);								\
989 	_F = (_F & CF) | SZP[_A];									\
990 }
991 
992 /***************************************************************
993  * ADD	A,n
994  ***************************************************************/
995 #ifdef X86_ASM
996 #if Z80_EXACT
997 #define ADD(value)												\
998  asm (															\
999  " addb %2,%0			\n"										\
1000  " lahf					\n"										\
1001  " setob %1				\n" /* al = 1 if overflow */			\
1002  " addb %1,%1			\n"										\
1003  " addb %1,%1			\n" /* shift to P/V bit position */		\
1004  " andb $0xd1,%%ah		\n" /* sign, zero, half carry, carry */ \
1005  " orb %%ah,%1			\n"										\
1006  " movb %0,%%ah			\n" /* get result */					\
1007  " andb $0x28,%%ah		\n" /* maks flags 5+3 */				\
1008  " orb %%ah,%1			\n" /* put them into flags */			\
1009  :"=q" (_A), "=q" (_F)											\
1010  :"q" (value), "1" (_F), "0" (_A)								\
1011  )
1012 #else
1013 #define ADD(value)												\
1014  asm (															\
1015  " addb %2,%0			\n"										\
1016  " lahf					\n"										\
1017  " setob %1				\n" /* al = 1 if overflow */			\
1018  " addb %1,%1			\n"										\
1019  " addb %1,%1			\n" /* shift to P/V bit position */		\
1020  " andb $0xd1,%%ah		\n" /* sign, zero, half carry, carry */ \
1021  " orb %%ah,%1			\n"										\
1022  :"=q" (_A), "=q" (_F)											\
1023  :"q" (value), "1" (_F), "0" (_A)								\
1024  )
1025 #endif
1026 #else
1027 #if BIG_FLAGS_ARRAY
1028 #define ADD(value)												\
1029 {																\
1030 	UINT32 ah = _AFD & 0xff00;									\
1031 	UINT32 res = (UINT8)((ah >> 8) + value);					\
1032 	_F = SZHVC_add[ah | res];									\
1033 	_A = res;													\
1034 }
1035 #else
1036 #define ADD(value)												\
1037 {																\
1038 	unsigned val = value;										\
1039 	unsigned res = _A + val;									\
1040 	_F = SZ[(UINT8)res] | ((res >> 8) & CF) |					\
1041 		((_A ^ res ^ val) & HF) |								\
1042 		(((val ^ _A ^ 0x80) & (val ^ res) & 0x80) >> 5);		\
1043 	_A = (UINT8)res;											\
1044 }
1045 #endif
1046 #endif
1047 
1048 /***************************************************************
1049  * ADC	A,n
1050  ***************************************************************/
1051 #ifdef X86_ASM
1052 #if Z80_EXACT
1053 #define ADC(value)												\
1054  asm (															\
1055  " shrb $1,%1			\n"										\
1056  " adcb %2,%0			\n"										\
1057  " lahf					\n"										\
1058  " setob %1				\n" /* al = 1 if overflow */			\
1059  " addb %1,%1			\n" /* shift to P/V bit position */		\
1060  " addb %1,%1			\n"										\
1061  " andb $0xd1,%%ah		\n" /* sign, zero, half carry, carry */ \
1062  " orb %%ah,%1			\n" /* combine with P/V */				\
1063  " movb %0,%%ah			\n" /* get result */					\
1064  " andb $0x28,%%ah		\n" /* maks flags 5+3 */				\
1065  " orb %%ah,%1			\n" /* put them into flags */			\
1066  :"=q" (_A), "=q" (_F)											\
1067  :"q" (value), "1" (_F), "0" (_A)								\
1068  )
1069 #else
1070 #define ADC(value)												\
1071  asm (															\
1072  " shrb $1,%1			\n"										\
1073  " adcb %2,%0			\n"										\
1074  " lahf					\n"										\
1075  " setob %1				\n" /* al = 1 if overflow */			\
1076  " addb %1,%1			\n" /* shift to P/V bit position */		\
1077  " addb %1,%1			\n"										\
1078  " andb $0xd1,%%ah		\n" /* sign, zero, half carry, carry */ \
1079  " orb %%ah,%1			\n" /* combine with P/V */				\
1080  :"=q" (_A), "=q" (_F)											\
1081  :"q" (value), "1" (_F), "0" (_A)								\
1082  )
1083 #endif
1084 #else
1085 #if BIG_FLAGS_ARRAY
1086 #define ADC(value)												\
1087 {																\
1088 	UINT32 ah = _AFD & 0xff00, c = _AFD & 1;					\
1089 	UINT32 res = (UINT8)((ah >> 8) + value + c);				\
1090 	_F = SZHVC_add[(c << 16) | ah | res];						\
1091 	_A = res;													\
1092 }
1093 #else
1094 #define ADC(value)												\
1095 {																\
1096 	unsigned val = value;										\
1097 	unsigned res = _A + val + (_F & CF);						\
1098 	_F = SZ[res & 0xff] | ((res >> 8) & CF) |					\
1099 		((_A ^ res ^ val) & HF) |								\
1100 		(((val ^ _A ^ 0x80) & (val ^ res) & 0x80) >> 5);		\
1101 	_A = res;													\
1102 }
1103 #endif
1104 #endif
1105 
1106 /***************************************************************
1107  * SUB	n
1108  ***************************************************************/
1109 #ifdef X86_ASM
1110 #if Z80_EXACT
1111 #define SUB(value)												\
1112  asm (															\
1113  " subb %2,%0			\n"										\
1114  " lahf					\n"										\
1115  " setob %1				\n" /* al = 1 if overflow */			\
1116  " stc					\n" /* prepare to set N flag */			\
1117  " adcb %1,%1			\n" /* shift to P/V bit position */		\
1118  " addb %1,%1			\n"										\
1119  " andb $0xd1,%%ah		\n" /* sign, zero, half carry, carry */ \
1120  " orb %%ah,%1			\n" /* combine with P/V */				\
1121  " movb %0,%%ah			\n" /* get result */					\
1122  " andb $0x28,%%ah		\n" /* maks flags 5+3 */				\
1123  " orb %%ah,%1			\n" /* put them into flags */			\
1124  :"=q" (_A), "=q" (_F)											\
1125  :"q" (value), "1" (_F), "0" (_A)								\
1126  )
1127 #else
1128 #define SUB(value)												\
1129  asm (															\
1130  " subb %2,%0			\n"										\
1131  " lahf					\n"										\
1132  " setob %1				\n" /* al = 1 if overflow */			\
1133  " stc					\n" /* prepare to set N flag */			\
1134  " adcb %1,%1			\n" /* shift to P/V bit position */		\
1135  " addb %1,%1			\n"										\
1136  " andb $0xd1,%%ah		\n" /* sign, zero, half carry, carry */ \
1137  " orb %%ah,%1			\n" /* combine with P/V */				\
1138  :"=q" (_A), "=q" (_F)											\
1139  :"q" (value), "1" (_F), "0" (_A)								\
1140  )
1141 #endif
1142 #else
1143 #if BIG_FLAGS_ARRAY
1144 #define SUB(value)												\
1145 {																\
1146 	UINT32 ah = _AFD & 0xff00;									\
1147 	UINT32 res = (UINT8)((ah >> 8) - value);					\
1148 	_F = SZHVC_sub[ah | res];									\
1149 	_A = res;													\
1150 }
1151 #else
1152 #define SUB(value)												\
1153 {																\
1154 	unsigned val = value;										\
1155 	unsigned res = _A - val;									\
1156 	_F = SZ[res & 0xff] | ((res >> 8) & CF) | NF |				\
1157 		((_A ^ res ^ val) & HF) |								\
1158 		(((val ^ _A) & (_A ^ res) & 0x80) >> 5);				\
1159 	_A = res;													\
1160 }
1161 #endif
1162 #endif
1163 
1164 /***************************************************************
1165  * SBC	A,n
1166  ***************************************************************/
1167 #ifdef X86_ASM
1168 #if Z80_EXACT
1169 #define SBC(value)												\
1170  asm (															\
1171  " shrb $1,%1			\n"										\
1172  " sbbb %2,%0			\n"										\
1173  " lahf					\n"										\
1174  " setob %1				\n" /* al = 1 if overflow */			\
1175  " stc					\n" /* prepare to set N flag */			\
1176  " adcb %1,%1			\n" /* shift to P/V bit position */		\
1177  " addb %1,%1			\n"										\
1178  " andb $0xd1,%%ah		\n" /* sign, zero, half carry, carry */ \
1179  " orb %%ah,%1			\n" /* combine with P/V */				\
1180  " movb %0,%%ah			\n" /* get result */					\
1181  " andb $0x28,%%ah		\n" /* maks flags 5+3 */				\
1182  " orb %%ah,%1			\n" /* put them into flags */			\
1183  :"=q" (_A), "=q" (_F)											\
1184  :"q" (value), "1" (_F), "0" (_A)								\
1185  )
1186 #else
1187 #define SBC(value)												\
1188  asm (															\
1189  " shrb $1,%1			\n"										\
1190  " sbbb %2,%0			\n"										\
1191  " lahf					\n"										\
1192  " setob %1				\n" /* al = 1 if overflow */			\
1193  " stc					\n" /* prepare to set N flag */			\
1194  " adcb %1,%1			\n" /* shift to P/V bit position */		\
1195  " addb %1,%1			\n"										\
1196  " andb $0xd1,%%ah		\n" /* sign, zero, half carry, carry */ \
1197  " orb %%ah,%1			\n" /* combine with P/V */				\
1198  :"=q" (_A), "=q" (_F)											\
1199  :"q" (value), "1" (_F), "0" (_A)								\
1200  )
1201 #endif
1202 #else
1203 #if BIG_FLAGS_ARRAY
1204 #define SBC(value)												\
1205 {																\
1206 	UINT32 ah = _AFD & 0xff00, c = _AFD & 1;					\
1207 	UINT32 res = (UINT8)((ah >> 8) - value - c);				\
1208 	_F = SZHVC_sub[(c<<16) | ah | res];							\
1209 	_A = res;													\
1210 }
1211 #else
1212 #define SBC(value)												\
1213 {																\
1214 	unsigned val = value;										\
1215 	unsigned res = _A - val - (_F & CF);						\
1216 	_F = SZ[res & 0xff] | ((res >> 8) & CF) | NF |				\
1217 		((_A ^ res ^ val) & HF) |								\
1218 		(((val ^ _A) & (_A ^ res) & 0x80) >> 5);				\
1219 	_A = res;													\
1220 }
1221 #endif
1222 #endif
1223 
1224 /***************************************************************
1225  * NEG
1226  ***************************************************************/
1227 #define NEG {													\
1228 	UINT8 value = _A;											\
1229 	_A = 0;														\
1230 	SUB(value);													\
1231 }
1232 
1233 /***************************************************************
1234  * DAA
1235  ***************************************************************/
1236 #define DAA {													\
1237 	UINT8 cf, nf, hf, lo, hi, diff;								\
1238 	cf = _F & CF;												\
1239 	nf = _F & NF;												\
1240 	hf = _F & HF;												\
1241 	lo = _A & 15;												\
1242 	hi = _A / 16;												\
1243 																\
1244 	if (cf)														\
1245 	{															\
1246 		diff = (lo <= 9 && !hf) ? 0x60 : 0x66;					\
1247 	}															\
1248 	else														\
1249 	{															\
1250 		if (lo >= 10)											\
1251 		{														\
1252 			diff = hi <= 8 ? 0x06 : 0x66;						\
1253 		}														\
1254 		else													\
1255 		{														\
1256 			if (hi >= 10)										\
1257 			{													\
1258 				diff = hf ? 0x66 : 0x60;						\
1259 			}													\
1260 			else												\
1261 			{													\
1262 				diff = hf ? 0x06 : 0x00;						\
1263 			}													\
1264 		}														\
1265 	}															\
1266 	if (nf) _A -= diff;											\
1267 	else _A += diff;											\
1268 																\
1269 	_F = SZP[_A] | (_F & NF);									\
1270 	if (cf || (lo <= 9 ? hi >= 10 : hi >= 9)) _F |= CF;			\
1271 	if (nf ? hf && lo <= 5 : lo >= 10)	_F |= HF;				\
1272 }
1273 
1274 /***************************************************************
1275  * AND	n
1276  ***************************************************************/
1277 #define AND(value)												\
1278 	_A &= value;												\
1279 	_F = SZP[_A] | HF
1280 
1281 /***************************************************************
1282  * OR	n
1283  ***************************************************************/
1284 #define OR(value)												\
1285 	_A |= value;												\
1286 	_F = SZP[_A]
1287 
1288 /***************************************************************
1289  * XOR	n
1290  ***************************************************************/
1291 #define XOR(value)												\
1292 	_A ^= value;												\
1293 	_F = SZP[_A]
1294 
1295 /***************************************************************
1296  * CP	n
1297  ***************************************************************/
1298 #ifdef X86_ASM
1299 #if Z80_EXACT
1300 #define CP(value)												\
1301  asm (															\
1302  " cmpb %2,%0			\n"										\
1303  " lahf					\n"										\
1304  " setob %1				\n" /* al = 1 if overflow */			\
1305  " stc					\n" /* prepare to set N flag */			\
1306  " adcb %1,%1			\n" /* shift to P/V bit position */		\
1307  " addb %1,%1			\n"										\
1308  " andb $0xd1,%%ah		\n" /* sign, zero, half carry, carry */ \
1309  " orb %%ah,%1			\n" /* combine with P/V */				\
1310  " movb %2,%%ah			\n" /* get result */					\
1311  " andb $0x28,%%ah		\n" /* maks flags 5+3 */				\
1312  " orb %%ah,%1			\n" /* put them into flags */			\
1313  :"=q" (_A), "=q" (_F)											\
1314  :"q" (value), "1" (_F), "0" (_A)								\
1315  )
1316 #else
1317 #define CP(value)												\
1318  asm (															\
1319  " cmpb %2,%0			\n"										\
1320  " lahf					\n"										\
1321  " setob %1				\n" /* al = 1 if overflow */			\
1322  " stc					\n" /* prepare to set N flag */			\
1323  " adcb %1,%1			\n" /* shift to P/V bit position */		\
1324  " addb %1,%1			\n"										\
1325  " andb $0xd1,%%ah		\n" /* sign, zero, half carry, carry */ \
1326  " orb %%ah,%1			\n" /* combine with P/V */				\
1327  :"=q" (_A), "=q" (_F)											\
1328  :"q" (value), "1" (_F), "0" (_A)								\
1329  )
1330 #endif
1331 #else
1332 #if BIG_FLAGS_ARRAY
1333 #define CP(value)												\
1334 {																\
1335 	unsigned val = value;										\
1336 	UINT32 ah = _AFD & 0xff00;									\
1337 	UINT32 res = (UINT8)((ah >> 8) - val);						\
1338 	_F = (SZHVC_sub[ah | res] & ~(YF | XF)) |					\
1339 		(val & (YF | XF));										\
1340 }
1341 #else
1342 #define CP(value)												\
1343 {																\
1344 	unsigned val = value;										\
1345 	unsigned res = _A - val;									\
1346 	_F = (SZ[res & 0xff] & (SF | ZF)) |							\
1347 		(val & (YF | XF)) | ((res >> 8) & CF) | NF |			\
1348 		((_A ^ res ^ val) & HF) |								\
1349 		((((val ^ _A) & (_A ^ res)) >> 5) & VF);				\
1350 }
1351 #endif
1352 #endif
1353 
1354 /***************************************************************
1355  * EX	AF,AF'
1356  ***************************************************************/
1357 #define EX_AF {													\
1358 	PAIR tmp;													\
1359 	tmp = Z80.AF; Z80.AF = Z80.AF2; Z80.AF2 = tmp;				\
1360 }
1361 
1362 /***************************************************************
1363  * EX	DE,HL
1364  ***************************************************************/
1365 #define EX_DE_HL {												\
1366 	PAIR tmp;													\
1367 	tmp = Z80.DE; Z80.DE = Z80.HL; Z80.HL = tmp;				\
1368 }
1369 
1370 /***************************************************************
1371  * EXX
1372  ***************************************************************/
1373 #define EXX {													\
1374 	PAIR tmp;													\
1375 	tmp = Z80.BC; Z80.BC = Z80.BC2; Z80.BC2 = tmp;				\
1376 	tmp = Z80.DE; Z80.DE = Z80.DE2; Z80.DE2 = tmp;				\
1377 	tmp = Z80.HL; Z80.HL = Z80.HL2; Z80.HL2 = tmp;				\
1378 }
1379 
1380 /***************************************************************
1381  * EX	(SP),r16
1382  ***************************************************************/
1383 #define EXSP(DR)												\
1384 {																\
1385 	PAIR tmp = { { 0, 0, 0, 0 } };								\
1386 	RM16( _SPD, &tmp );											\
1387 	WM16( _SPD, &Z80.DR );										\
1388 	Z80.DR = tmp;												\
1389 }
1390 
1391 
1392 /***************************************************************
1393  * ADD16
1394  ***************************************************************/
1395 #ifdef	X86_ASM
1396 #if Z80_EXACT
1397 #define ADD16(DR,SR)											\
1398  asm (															\
1399  " andb $0xc4,%1		\n"										\
1400  " addb %%dl,%%cl		\n"										\
1401  " adcb %%dh,%%ch		\n"										\
1402  " lahf					\n"										\
1403  " andb $0x11,%%ah		\n"										\
1404  " orb %%ah,%1			\n"										\
1405  " movb %%ch,%%ah		\n" /* get result MSB */				\
1406  " andb $0x28,%%ah		\n" /* maks flags 5+3 */				\
1407  " orb %%ah,%1			\n" /* put them into flags */			\
1408  :"=c" (Z80.DR.d), "=q" (_F)									\
1409  :"0" (Z80.DR.d), "1" (_F), "d" (Z80.SR.d)						\
1410  )
1411 #else
1412 #define ADD16(DR,SR)											\
1413  asm (															\
1414  " andb $0xc4,%1		\n"										\
1415  " addb %%dl,%%cl		\n"										\
1416  " adcb %%dh,%%ch		\n"										\
1417  " lahf					\n"										\
1418  " andb $0x11,%%ah		\n"										\
1419  " orb %%ah,%1			\n"										\
1420  :"=c" (Z80.DR.d), "=q" (_F)									\
1421  :"0" (Z80.DR.d), "1" (_F), "d" (Z80.SR.d)						\
1422  )
1423 #endif
1424 #else
1425 #define ADD16(DR,SR)											\
1426 {																\
1427 	UINT32 res = Z80.DR.d + Z80.SR.d;							\
1428 	_F = (_F & (SF | ZF | VF)) |								\
1429 		(((Z80.DR.d ^ res ^ Z80.SR.d) >> 8) & HF) |				\
1430 		((res >> 16) & CF) | ((res >> 8) & (YF | XF));			\
1431 	Z80.DR.w.l = (UINT16)res;									\
1432 }
1433 #endif
1434 
1435 /***************************************************************
1436  * ADC	r16,r16
1437  ***************************************************************/
1438 #ifdef	X86_ASM
1439 #if Z80_EXACT
1440 #define ADC16(Reg)												\
1441  asm (															\
1442  " shrb $1,%1			\n"										\
1443  " adcb %%dl,%%cl		\n"										\
1444  " lahf					\n"										\
1445  " movb %%ah,%%dl		\n"										\
1446  " adcb %%dh,%%ch		\n"										\
1447  " lahf					\n"										\
1448  " setob %1				\n"										\
1449  " orb $0xbf,%%dl		\n" /* set all but zero */				\
1450  " addb %1,%1			\n"										\
1451  " andb $0xd1,%%ah		\n" /* sign,zero,half carry and carry */\
1452  " addb %1,%1			\n"										\
1453  " orb %%ah,%1			\n" /* overflow into P/V */				\
1454  " andb %%dl,%1			\n" /* mask zero */						\
1455  " movb %%ch,%%ah		\n" /* get result MSB */				\
1456  " andb $0x28,%%ah		\n" /* maks flags 5+3 */				\
1457  " orb %%ah,%1			\n" /* put them into flags */			\
1458  :"=c" (_HLD), "=q" (_F)										\
1459  :"0" (_HLD), "1" (_F), "d" (Z80.Reg.d)							\
1460  )
1461 #else
1462 #define ADC16(Reg)												\
1463  asm (															\
1464  " shrb $1,%1			\n"										\
1465  " adcb %%dl,%%cl		\n"										\
1466  " lahf					\n"										\
1467  " movb %%ah,%%dl		\n"										\
1468  " adcb %%dh,%%ch		\n"										\
1469  " lahf					\n"										\
1470  " setob %1				\n"										\
1471  " orb $0xbf,%%dl		\n" /* set all but zero */				\
1472  " addb %1,%1			\n"										\
1473  " andb $0xd1,%%ah		\n" /* sign,zero,half carry and carry */\
1474  " addb %1,%1			\n"										\
1475  " orb %%ah,%1			\n" /* overflow into P/V */				\
1476  " andb %%dl,%1			\n" /* mask zero */						\
1477  :"=c" (_HLD), "=q" (_F)										\
1478  :"0" (_HLD), "1" (_F), "d" (Z80.Reg.d)							\
1479  )
1480 #endif
1481 #else
1482 #define ADC16(Reg)												\
1483 {																\
1484 	UINT32 res = _HLD + Z80.Reg.d + (_F & CF);					\
1485 	_F = (((_HLD ^ res ^ Z80.Reg.d) >> 8) & HF) |				\
1486 		((res >> 16) & CF) |									\
1487 		((res >> 8) & (SF | YF | XF)) |							\
1488 		((res & 0xffff) ? 0 : ZF) |								\
1489 		(((Z80.Reg.d ^ _HLD ^ 0x8000) & (Z80.Reg.d ^ res) & 0x8000) >> 13); \
1490 	_HL = (UINT16)res;											\
1491 }
1492 #endif
1493 
1494 /***************************************************************
1495  * SBC	r16,r16
1496  ***************************************************************/
1497 #ifdef	X86_ASM
1498 #if Z80_EXACT
1499 #define SBC16(Reg)												\
1500 asm (															\
1501  " shrb $1,%1			\n"										\
1502  " sbbb %%dl,%%cl		\n"										\
1503  " lahf					\n"										\
1504  " movb %%ah,%%dl		\n"										\
1505  " sbbb %%dh,%%ch		\n"										\
1506  " lahf					\n"										\
1507  " setob %1				\n"										\
1508  " orb $0xbf,%%dl		\n" /* set all but zero */				\
1509  " stc					\n"										\
1510  " adcb %1,%1			\n"										\
1511  " andb $0xd1,%%ah		\n" /* sign,zero,half carry and carry */\
1512  " addb %1,%1			\n"										\
1513  " orb %%ah,%1			\n" /* overflow into P/V */				\
1514  " andb %%dl,%1			\n" /* mask zero */						\
1515  " movb %%ch,%%ah		\n" /* get result MSB */				\
1516  " andb $0x28,%%ah		\n" /* maks flags 5+3 */				\
1517  " orb %%ah,%1			\n" /* put them into flags */			\
1518  :"=c" (_HLD), "=q" (_F)										\
1519  :"0" (_HLD), "1" (_F), "d" (Z80.Reg.d)							\
1520  )
1521 #else
1522 #define SBC16(Reg)												\
1523 asm (															\
1524  " shrb $1,%1			\n"										\
1525  " sbbb %%dl,%%cl		\n"										\
1526  " lahf					\n"										\
1527  " movb %%ah,%%dl		\n"										\
1528  " sbbb %%dh,%%ch		\n"										\
1529  " lahf					\n"										\
1530  " setob %1				\n"										\
1531  " orb $0xbf,%%dl		\n" /* set all but zero */				\
1532  " stc					\n"										\
1533  " adcb %1,%1			\n"										\
1534  " andb $0xd1,%%ah		\n" /* sign,zero,half carry and carry */\
1535  " addb %1,%1			\n"										\
1536  " orb %%ah,%1			\n" /* overflow into P/V */				\
1537  " andb %%dl,%1			\n" /* mask zero */						\
1538  :"=c" (_HLD), "=q" (_F)										\
1539  :"0" (_HLD), "1" (_F), "d" (Z80.Reg.d)							\
1540  )
1541 #endif
1542 #else
1543 #define SBC16(Reg)												\
1544 {																\
1545 	UINT32 res = _HLD - Z80.Reg.d - (_F & CF);					\
1546 	_F = (((_HLD ^ res ^ Z80.Reg.d) >> 8) & HF) | NF |			\
1547 		((res >> 16) & CF) |									\
1548 		((res >> 8) & (SF | YF | XF)) |							\
1549 		((res & 0xffff) ? 0 : ZF) |								\
1550 		(((Z80.Reg.d ^ _HLD) & (_HLD ^ res) &0x8000) >> 13);	\
1551 	_HL = (UINT16)res;											\
1552 }
1553 #endif
1554 
1555 /***************************************************************
1556  * RLC	r8
1557  ***************************************************************/
RLC(UINT8 value)1558 static INLINE UINT8 RLC(UINT8 value)
1559 {
1560 	unsigned res = value;
1561 	unsigned c = (res & 0x80) ? CF : 0;
1562 	res = ((res << 1) | (res >> 7)) & 0xff;
1563 	_F = SZP[res] | c;
1564 	return res;
1565 }
1566 
1567 /***************************************************************
1568  * RRC	r8
1569  ***************************************************************/
RRC(UINT8 value)1570 static INLINE UINT8 RRC(UINT8 value)
1571 {
1572 	unsigned res = value;
1573 	unsigned c = (res & 0x01) ? CF : 0;
1574 	res = ((res >> 1) | (res << 7)) & 0xff;
1575 	_F = SZP[res] | c;
1576 	return res;
1577 }
1578 
1579 /***************************************************************
1580  * RL	r8
1581  ***************************************************************/
RL(UINT8 value)1582 static INLINE UINT8 RL(UINT8 value)
1583 {
1584 	unsigned res = value;
1585 	unsigned c = (res & 0x80) ? CF : 0;
1586 	res = ((res << 1) | (_F & CF)) & 0xff;
1587 	_F = SZP[res] | c;
1588 	return res;
1589 }
1590 
1591 /***************************************************************
1592  * RR	r8
1593  ***************************************************************/
RR(UINT8 value)1594 static INLINE UINT8 RR(UINT8 value)
1595 {
1596 	unsigned res = value;
1597 	unsigned c = (res & 0x01) ? CF : 0;
1598 	res = ((res >> 1) | (_F << 7)) & 0xff;
1599 	_F = SZP[res] | c;
1600 	return res;
1601 }
1602 
1603 /***************************************************************
1604  * SLA	r8
1605  ***************************************************************/
SLA(UINT8 value)1606 static INLINE UINT8 SLA(UINT8 value)
1607 {
1608 	unsigned res = value;
1609 	unsigned c = (res & 0x80) ? CF : 0;
1610 	res = (res << 1) & 0xff;
1611 	_F = SZP[res] | c;
1612 	return res;
1613 }
1614 
1615 /***************************************************************
1616  * SRA	r8
1617  ***************************************************************/
SRA(UINT8 value)1618 static INLINE UINT8 SRA(UINT8 value)
1619 {
1620 	unsigned res = value;
1621 	unsigned c = (res & 0x01) ? CF : 0;
1622 	res = ((res >> 1) | (res & 0x80)) & 0xff;
1623 	_F = SZP[res] | c;
1624 	return res;
1625 }
1626 
1627 /***************************************************************
1628  * SLL	r8
1629  ***************************************************************/
SLL(UINT8 value)1630 static INLINE UINT8 SLL(UINT8 value)
1631 {
1632 	unsigned res = value;
1633 	unsigned c = (res & 0x80) ? CF : 0;
1634 	res = ((res << 1) | 0x01) & 0xff;
1635 	_F = SZP[res] | c;
1636 	return res;
1637 }
1638 
1639 /***************************************************************
1640  * SRL	r8
1641  ***************************************************************/
SRL(UINT8 value)1642 static INLINE UINT8 SRL(UINT8 value)
1643 {
1644 	unsigned res = value;
1645 	unsigned c = (res & 0x01) ? CF : 0;
1646 	res = (res >> 1) & 0xff;
1647 	_F = SZP[res] | c;
1648 	return res;
1649 }
1650 
1651 /***************************************************************
1652  * BIT	bit,r8
1653  ***************************************************************/
1654 #undef BIT
1655 #define BIT(bit,reg)											\
1656 	_F = (_F & CF) | HF | SZ_BIT[reg & (1<<bit)]
1657 
1658 /***************************************************************
1659  * BIT	bit,(IX/Y+o)
1660  ***************************************************************/
1661 #if Z80_EXACT
1662 #define BIT_XY(bit,reg)											\
1663 	_F = (_F & CF) | HF | (SZ_BIT[reg & (1<<bit)] & ~(YF|XF)) | ((EA>>8) & (YF|XF))
1664 #else
1665 #define BIT_XY	BIT
1666 #endif
1667 
1668 /***************************************************************
1669  * RES	bit,r8
1670  ***************************************************************/
RES(UINT8 bit,UINT8 value)1671 static INLINE UINT8 RES(UINT8 bit, UINT8 value)
1672 {
1673 	return value & ~(1<<bit);
1674 }
1675 
1676 /***************************************************************
1677  * SET	bit,r8
1678  ***************************************************************/
SET(UINT8 bit,UINT8 value)1679 static INLINE UINT8 SET(UINT8 bit, UINT8 value)
1680 {
1681 	return value | (1<<bit);
1682 }
1683 
1684 /***************************************************************
1685  * LDI
1686  ***************************************************************/
1687 #if Z80_EXACT
1688 #define LDI {													\
1689 	UINT8 io = RM(_HL);											\
1690 	WM( _DE, io );												\
1691 	_F &= SF | ZF | CF;											\
1692 	if( (_A + io) & 0x02 ) _F |= YF; /* bit 1 -> flag 5 */		\
1693 	if( (_A + io) & 0x08 ) _F |= XF; /* bit 3 -> flag 3 */		\
1694 	_HL++; _DE++; _BC--;										\
1695 	if( _BC ) _F |= VF;											\
1696 }
1697 #else
1698 #define LDI {													\
1699 	WM( _DE, RM(_HL) );											\
1700 	_F &= SF | ZF | YF | XF | CF;								\
1701 	_HL++; _DE++; _BC--;										\
1702 	if( _BC ) _F |= VF;											\
1703 }
1704 #endif
1705 
1706 /***************************************************************
1707  * CPI
1708  ***************************************************************/
1709 #if Z80_EXACT
1710 #define CPI {													\
1711 	UINT8 val = RM(_HL);										\
1712 	UINT8 res = _A - val;										\
1713 	_HL++; _BC--;												\
1714 	_F = (_F & CF) | (SZ[res] & ~(YF|XF)) | ((_A ^ val ^ res) & HF) | NF;  \
1715 	if( _F & HF ) res -= 1;										\
1716 	if( res & 0x02 ) _F |= YF; /* bit 1 -> flag 5 */			\
1717 	if( res & 0x08 ) _F |= XF; /* bit 3 -> flag 3 */			\
1718 	if( _BC ) _F |= VF;											\
1719 }
1720 #else
1721 #define CPI {													\
1722 	UINT8 val = RM(_HL);										\
1723 	UINT8 res = _A - val;										\
1724 	_HL++; _BC--;												\
1725 	_F = (_F & CF) | SZ[res] | ((_A ^ val ^ res) & HF) | NF;	\
1726 	if( _BC ) _F |= VF;											\
1727 }
1728 #endif
1729 
1730 /***************************************************************
1731  * INI
1732  ***************************************************************/
1733 #if Z80_EXACT
1734 #define INI {													\
1735 	unsigned t;													\
1736 	UINT8 io = IN(_BC);											\
1737 	_B--;														\
1738 	WM( _HL, io );												\
1739 	_HL++;														\
1740 	_F = SZ[_B];												\
1741 	t = (unsigned)((_C + 1) & 0xff) + (unsigned)io;				\
1742 	if( io & SF ) _F |= NF;										\
1743 	if( t & 0x100 ) _F |= HF | CF;								\
1744 	_F |= SZP[(UINT8)(t & 0x07) ^ _B] & PF;						\
1745 }
1746 #else
1747 #define INI {													\
1748 	_B--;														\
1749 	WM( _HL, IN(_BC) );											\
1750 	_HL++;														\
1751 	_F = (_B) ? NF : NF | ZF;									\
1752 }
1753 #endif
1754 
1755 /***************************************************************
1756  * OUTI
1757  ***************************************************************/
1758 #if Z80_EXACT
1759 #define OUTI {													\
1760 	unsigned t;													\
1761 	UINT8 io = RM(_HL);											\
1762 	_B--;														\
1763 	OUT( _BC, io );												\
1764 	_HL++;														\
1765 	_F = SZ[_B];												\
1766 	t = (unsigned)_L + (unsigned)io;							\
1767 	if( io & SF ) _F |= NF;										\
1768 	if( t & 0x100 ) _F |= HF | CF;								\
1769 	_F |= SZP[(UINT8)(t & 0x07) ^ _B] & PF;						\
1770 }
1771 #else
1772 #define OUTI {													\
1773 	_B--;														\
1774 	OUT( _BC, RM(_HL) );										\
1775 	_HL++;														\
1776 	_F = (_B) ? NF : NF | ZF;									\
1777 }
1778 #endif
1779 
1780 /***************************************************************
1781  * LDD
1782  ***************************************************************/
1783 #if Z80_EXACT
1784 #define LDD {													\
1785 	UINT8 io = RM(_HL);											\
1786 	WM( _DE, io );												\
1787 	_F &= SF | ZF | CF;											\
1788 	if( (_A + io) & 0x02 ) _F |= YF; /* bit 1 -> flag 5 */		\
1789 	if( (_A + io) & 0x08 ) _F |= XF; /* bit 3 -> flag 3 */		\
1790 	_HL--; _DE--; _BC--;										\
1791 	if( _BC ) _F |= VF;											\
1792 }
1793 #else
1794 #define LDD {													\
1795 	WM( _DE, RM(_HL) );											\
1796 	_F &= SF | ZF | YF | XF | CF;								\
1797 	_HL--; _DE--; _BC--;										\
1798 	if( _BC ) _F |= VF;											\
1799 }
1800 #endif
1801 
1802 /***************************************************************
1803  * CPD
1804  ***************************************************************/
1805 #if Z80_EXACT
1806 #define CPD {													\
1807 	UINT8 val = RM(_HL);										\
1808 	UINT8 res = _A - val;										\
1809 	_HL--; _BC--;												\
1810 	_F = (_F & CF) | (SZ[res] & ~(YF|XF)) | ((_A ^ val ^ res) & HF) | NF;  \
1811 	if( _F & HF ) res -= 1;										\
1812 	if( res & 0x02 ) _F |= YF; /* bit 1 -> flag 5 */			\
1813 	if( res & 0x08 ) _F |= XF; /* bit 3 -> flag 3 */			\
1814 	if( _BC ) _F |= VF;											\
1815 }
1816 #else
1817 #define CPD {													\
1818 	UINT8 val = RM(_HL);										\
1819 	UINT8 res = _A - val;										\
1820 	_HL--; _BC--;												\
1821 	_F = (_F & CF) | SZ[res] | ((_A ^ val ^ res) & HF) | NF;	\
1822 	if( _BC ) _F |= VF;											\
1823 }
1824 #endif
1825 
1826 /***************************************************************
1827  * IND
1828  ***************************************************************/
1829 #if Z80_EXACT
1830 #define IND {													\
1831 	unsigned t;													\
1832 	UINT8 io = IN(_BC);											\
1833 	_B--;														\
1834 	WM( _HL, io );												\
1835 	_HL--;														\
1836 	_F = SZ[_B];												\
1837 	t = ((unsigned)(_C - 1) & 0xff) + (unsigned)io;				\
1838 	if( io & SF ) _F |= NF;										\
1839 	if( t & 0x100 ) _F |= HF | CF;								\
1840 	_F |= SZP[(UINT8)(t & 0x07) ^ _B] & PF;						\
1841 }
1842 #else
1843 #define IND {													\
1844 	_B--;														\
1845 	WM( _HL, IN(_BC) );											\
1846 	_HL--;														\
1847 	_F = (_B) ? NF : NF | ZF;									\
1848 }
1849 #endif
1850 
1851 /***************************************************************
1852  * OUTD
1853  ***************************************************************/
1854 #if Z80_EXACT
1855 #define OUTD {													\
1856 	unsigned t;													\
1857 	UINT8 io = RM(_HL);											\
1858 	_B--;														\
1859 	OUT( _BC, io );												\
1860 	_HL--;														\
1861 	_F = SZ[_B];												\
1862 	t = (unsigned)_L + (unsigned)io;							\
1863 	if( io & SF ) _F |= NF;										\
1864 	if( t & 0x100 ) _F |= HF | CF;								\
1865 	_F |= SZP[(UINT8)(t & 0x07) ^ _B] & PF;						\
1866 }
1867 #else
1868 #define OUTD {													\
1869 	_B--;														\
1870 	OUT( _BC, RM(_HL) );										\
1871 	_HL--;														\
1872 	_F = (_B) ? NF : NF | ZF;									\
1873 }
1874 #endif
1875 
1876 /***************************************************************
1877  * LDIR
1878  ***************************************************************/
1879 #define LDIR													\
1880 	LDI;														\
1881 	if( _BC )													\
1882 	{															\
1883 		_PC -= 2;												\
1884 		CC(ex,0xb0);											\
1885 	}
1886 
1887 /***************************************************************
1888  * CPIR
1889  ***************************************************************/
1890 #define CPIR													\
1891 	CPI;														\
1892 	if( _BC && !(_F & ZF) )										\
1893 	{															\
1894 		_PC -= 2;												\
1895 		CC(ex,0xb1);											\
1896 	}
1897 
1898 /***************************************************************
1899  * INIR
1900  ***************************************************************/
1901 #define INIR													\
1902 	INI;														\
1903 	if( _B )													\
1904 	{															\
1905 		_PC -= 2;												\
1906 		CC(ex,0xb2);											\
1907 	}
1908 
1909 /***************************************************************
1910  * OTIR
1911  ***************************************************************/
1912 #define OTIR													\
1913 	OUTI;														\
1914 	if( _B )													\
1915 	{															\
1916 		_PC -= 2;												\
1917 		CC(ex,0xb3);											\
1918 	}
1919 
1920 /***************************************************************
1921  * LDDR
1922  ***************************************************************/
1923 #define LDDR													\
1924 	LDD;														\
1925 	if( _BC )													\
1926 	{															\
1927 		_PC -= 2;												\
1928 		CC(ex,0xb8);											\
1929 	}
1930 
1931 /***************************************************************
1932  * CPDR
1933  ***************************************************************/
1934 #define CPDR													\
1935 	CPD;														\
1936 	if( _BC && !(_F & ZF) )										\
1937 	{															\
1938 		_PC -= 2;												\
1939 		CC(ex,0xb9);											\
1940 	}
1941 
1942 /***************************************************************
1943  * INDR
1944  ***************************************************************/
1945 #define INDR													\
1946 	IND;														\
1947 	if( _B )													\
1948 	{															\
1949 		_PC -= 2;												\
1950 		CC(ex,0xba);											\
1951 	}
1952 
1953 /***************************************************************
1954  * OTDR
1955  ***************************************************************/
1956 #define OTDR													\
1957 	OUTD;														\
1958 	if( _B )													\
1959 	{															\
1960 		_PC -= 2;												\
1961 		CC(ex,0xbb);											\
1962 	}
1963 
1964 /***************************************************************
1965  * EI
1966  ***************************************************************/
1967 #define EI {													\
1968 	/* If interrupts were disabled, execute one more			\
1969 	 * instruction and check the IRQ line.						\
1970 	 * If not, simply set interrupt flip-flop 2					\
1971 	 */															\
1972 	if( _IFF1 == 0 )											\
1973 	{															\
1974 		_IFF1 = _IFF2 = 1;										\
1975 		_PPC = _PCD;											\
1976 		CALL_MAME_DEBUG;										\
1977 		_R++;													\
1978 		while( cpu_readop(_PCD) == 0xfb ) /* more EIs? */		\
1979 		{														\
1980 			log_cb(RETRO_LOG_DEBUG, LOGPRE "Z80 #%d multiple EI opcodes at %04X\n",		\
1981 				cpu_getactivecpu(), _PC);						\
1982 			CC(op,0xfb);										\
1983 			_PPC =_PCD;											\
1984 			CALL_MAME_DEBUG;									\
1985 			_PC++;												\
1986 			_R++;												\
1987 		}														\
1988 		if( Z80.irq_state != CLEAR_LINE ||						\
1989 			Z80.request_irq >= 0 )								\
1990 		{														\
1991 			after_EI = 1;	/* avoid cycle skip hacks */		\
1992 			EXEC(op,ROP());										\
1993 			after_EI = 0;										\
1994 			log_cb(RETRO_LOG_DEBUG, LOGPRE "Z80 #%d EI takes irq\n", cpu_getactivecpu()); \
1995 			take_interrupt();									\
1996 		} else EXEC(op,ROP());									\
1997 	} else _IFF2 = 1;											\
1998 }
1999 
2000 /**********************************************************
2001  * opcodes with CB prefix
2002  * rotate, shift and bit operations
2003  **********************************************************/
2004 OP(cb,00) { _B = RLC(_B);											} /* RLC  B			  */
2005 OP(cb,01) { _C = RLC(_C);											} /* RLC  C			  */
2006 OP(cb,02) { _D = RLC(_D);											} /* RLC  D			  */
2007 OP(cb,03) { _E = RLC(_E);											} /* RLC  E			  */
2008 OP(cb,04) { _H = RLC(_H);											} /* RLC  H			  */
2009 OP(cb,05) { _L = RLC(_L);											} /* RLC  L			  */
2010 OP(cb,06) { WM( _HL, RLC(RM(_HL)) );								} /* RLC  (HL)		  */
2011 OP(cb,07) { _A = RLC(_A);											} /* RLC  A			  */
2012 
2013 OP(cb,08) { _B = RRC(_B);											} /* RRC  B			  */
2014 OP(cb,09) { _C = RRC(_C);											} /* RRC  C			  */
2015 OP(cb,0a) { _D = RRC(_D);											} /* RRC  D			  */
2016 OP(cb,0b) { _E = RRC(_E);											} /* RRC  E			  */
2017 OP(cb,0c) { _H = RRC(_H);											} /* RRC  H			  */
2018 OP(cb,0d) { _L = RRC(_L);											} /* RRC  L			  */
2019 OP(cb,0e) { WM( _HL, RRC(RM(_HL)) );								} /* RRC  (HL)		  */
2020 OP(cb,0f) { _A = RRC(_A);											} /* RRC  A			  */
2021 
2022 OP(cb,10) { _B = RL(_B);											} /* RL   B			  */
2023 OP(cb,11) { _C = RL(_C);											} /* RL   C			  */
2024 OP(cb,12) { _D = RL(_D);											} /* RL   D			  */
2025 OP(cb,13) { _E = RL(_E);											} /* RL   E			  */
2026 OP(cb,14) { _H = RL(_H);											} /* RL   H			  */
2027 OP(cb,15) { _L = RL(_L);											} /* RL   L			  */
2028 OP(cb,16) { WM( _HL, RL(RM(_HL)) );									} /* RL   (HL)		  */
2029 OP(cb,17) { _A = RL(_A);											} /* RL   A			  */
2030 
2031 OP(cb,18) { _B = RR(_B);											} /* RR   B			  */
2032 OP(cb,19) { _C = RR(_C);											} /* RR   C			  */
2033 OP(cb,1a) { _D = RR(_D);											} /* RR   D			  */
2034 OP(cb,1b) { _E = RR(_E);											} /* RR   E			  */
2035 OP(cb,1c) { _H = RR(_H);											} /* RR   H			  */
2036 OP(cb,1d) { _L = RR(_L);											} /* RR   L			  */
2037 OP(cb,1e) { WM( _HL, RR(RM(_HL)) );									} /* RR   (HL)		  */
2038 OP(cb,1f) { _A = RR(_A);											} /* RR   A			  */
2039 
2040 OP(cb,20) { _B = SLA(_B);											} /* SLA  B			  */
2041 OP(cb,21) { _C = SLA(_C);											} /* SLA  C			  */
2042 OP(cb,22) { _D = SLA(_D);											} /* SLA  D			  */
2043 OP(cb,23) { _E = SLA(_E);											} /* SLA  E			  */
2044 OP(cb,24) { _H = SLA(_H);											} /* SLA  H			  */
2045 OP(cb,25) { _L = SLA(_L);											} /* SLA  L			  */
2046 OP(cb,26) { WM( _HL, SLA(RM(_HL)) );								} /* SLA  (HL)		  */
2047 OP(cb,27) { _A = SLA(_A);											} /* SLA  A			  */
2048 
2049 OP(cb,28) { _B = SRA(_B);											} /* SRA  B			  */
2050 OP(cb,29) { _C = SRA(_C);											} /* SRA  C			  */
2051 OP(cb,2a) { _D = SRA(_D);											} /* SRA  D			  */
2052 OP(cb,2b) { _E = SRA(_E);											} /* SRA  E			  */
2053 OP(cb,2c) { _H = SRA(_H);											} /* SRA  H			  */
2054 OP(cb,2d) { _L = SRA(_L);											} /* SRA  L			  */
2055 OP(cb,2e) { WM( _HL, SRA(RM(_HL)) );								} /* SRA  (HL)		  */
2056 OP(cb,2f) { _A = SRA(_A);											} /* SRA  A			  */
2057 
2058 OP(cb,30) { _B = SLL(_B);											} /* SLL  B			  */
2059 OP(cb,31) { _C = SLL(_C);											} /* SLL  C			  */
2060 OP(cb,32) { _D = SLL(_D);											} /* SLL  D			  */
2061 OP(cb,33) { _E = SLL(_E);											} /* SLL  E			  */
2062 OP(cb,34) { _H = SLL(_H);											} /* SLL  H			  */
2063 OP(cb,35) { _L = SLL(_L);											} /* SLL  L			  */
2064 OP(cb,36) { WM( _HL, SLL(RM(_HL)) );								} /* SLL  (HL)		  */
2065 OP(cb,37) { _A = SLL(_A);											} /* SLL  A			  */
2066 
2067 OP(cb,38) { _B = SRL(_B);											} /* SRL  B			  */
2068 OP(cb,39) { _C = SRL(_C);											} /* SRL  C			  */
2069 OP(cb,3a) { _D = SRL(_D);											} /* SRL  D			  */
2070 OP(cb,3b) { _E = SRL(_E);											} /* SRL  E			  */
2071 OP(cb,3c) { _H = SRL(_H);											} /* SRL  H			  */
2072 OP(cb,3d) { _L = SRL(_L);											} /* SRL  L			  */
2073 OP(cb,3e) { WM( _HL, SRL(RM(_HL)) );								} /* SRL  (HL)		  */
2074 OP(cb,3f) { _A = SRL(_A);											} /* SRL  A			  */
2075 
2076 OP(cb,40) { BIT(0,_B);												} /* BIT  0,B		  */
2077 OP(cb,41) { BIT(0,_C);												} /* BIT  0,C		  */
2078 OP(cb,42) { BIT(0,_D);												} /* BIT  0,D		  */
2079 OP(cb,43) { BIT(0,_E);												} /* BIT  0,E		  */
2080 OP(cb,44) { BIT(0,_H);												} /* BIT  0,H		  */
2081 OP(cb,45) { BIT(0,_L);												} /* BIT  0,L		  */
2082 OP(cb,46) { BIT(0,RM(_HL));											} /* BIT  0,(HL)	  */
2083 OP(cb,47) { BIT(0,_A);												} /* BIT  0,A		  */
2084 
2085 OP(cb,48) { BIT(1,_B);												} /* BIT  1,B		  */
2086 OP(cb,49) { BIT(1,_C);												} /* BIT  1,C		  */
2087 OP(cb,4a) { BIT(1,_D);												} /* BIT  1,D		  */
2088 OP(cb,4b) { BIT(1,_E);												} /* BIT  1,E		  */
2089 OP(cb,4c) { BIT(1,_H);												} /* BIT  1,H		  */
2090 OP(cb,4d) { BIT(1,_L);												} /* BIT  1,L		  */
2091 OP(cb,4e) { BIT(1,RM(_HL));											} /* BIT  1,(HL)	  */
2092 OP(cb,4f) { BIT(1,_A);												} /* BIT  1,A		  */
2093 
2094 OP(cb,50) { BIT(2,_B);												} /* BIT  2,B		  */
2095 OP(cb,51) { BIT(2,_C);												} /* BIT  2,C		  */
2096 OP(cb,52) { BIT(2,_D);												} /* BIT  2,D		  */
2097 OP(cb,53) { BIT(2,_E);												} /* BIT  2,E		  */
2098 OP(cb,54) { BIT(2,_H);												} /* BIT  2,H		  */
2099 OP(cb,55) { BIT(2,_L);												} /* BIT  2,L		  */
2100 OP(cb,56) { BIT(2,RM(_HL));											} /* BIT  2,(HL)	  */
2101 OP(cb,57) { BIT(2,_A);												} /* BIT  2,A		  */
2102 
2103 OP(cb,58) { BIT(3,_B);												} /* BIT  3,B		  */
2104 OP(cb,59) { BIT(3,_C);												} /* BIT  3,C		  */
2105 OP(cb,5a) { BIT(3,_D);												} /* BIT  3,D		  */
2106 OP(cb,5b) { BIT(3,_E);												} /* BIT  3,E		  */
2107 OP(cb,5c) { BIT(3,_H);												} /* BIT  3,H		  */
2108 OP(cb,5d) { BIT(3,_L);												} /* BIT  3,L		  */
2109 OP(cb,5e) { BIT(3,RM(_HL));											} /* BIT  3,(HL)	  */
2110 OP(cb,5f) { BIT(3,_A);												} /* BIT  3,A		  */
2111 
2112 OP(cb,60) { BIT(4,_B);												} /* BIT  4,B		  */
2113 OP(cb,61) { BIT(4,_C);												} /* BIT  4,C		  */
2114 OP(cb,62) { BIT(4,_D);												} /* BIT  4,D		  */
2115 OP(cb,63) { BIT(4,_E);												} /* BIT  4,E		  */
2116 OP(cb,64) { BIT(4,_H);												} /* BIT  4,H		  */
2117 OP(cb,65) { BIT(4,_L);												} /* BIT  4,L		  */
2118 OP(cb,66) { BIT(4,RM(_HL));											} /* BIT  4,(HL)	  */
2119 OP(cb,67) { BIT(4,_A);												} /* BIT  4,A		  */
2120 
2121 OP(cb,68) { BIT(5,_B);												} /* BIT  5,B		  */
2122 OP(cb,69) { BIT(5,_C);												} /* BIT  5,C		  */
2123 OP(cb,6a) { BIT(5,_D);												} /* BIT  5,D		  */
2124 OP(cb,6b) { BIT(5,_E);												} /* BIT  5,E		  */
2125 OP(cb,6c) { BIT(5,_H);												} /* BIT  5,H		  */
2126 OP(cb,6d) { BIT(5,_L);												} /* BIT  5,L		  */
2127 OP(cb,6e) { BIT(5,RM(_HL));											} /* BIT  5,(HL)	  */
2128 OP(cb,6f) { BIT(5,_A);												} /* BIT  5,A		  */
2129 
2130 OP(cb,70) { BIT(6,_B);												} /* BIT  6,B		  */
2131 OP(cb,71) { BIT(6,_C);												} /* BIT  6,C		  */
2132 OP(cb,72) { BIT(6,_D);												} /* BIT  6,D		  */
2133 OP(cb,73) { BIT(6,_E);												} /* BIT  6,E		  */
2134 OP(cb,74) { BIT(6,_H);												} /* BIT  6,H		  */
2135 OP(cb,75) { BIT(6,_L);												} /* BIT  6,L		  */
2136 OP(cb,76) { BIT(6,RM(_HL));											} /* BIT  6,(HL)	  */
2137 OP(cb,77) { BIT(6,_A);												} /* BIT  6,A		  */
2138 
2139 OP(cb,78) { BIT(7,_B);												} /* BIT  7,B		  */
2140 OP(cb,79) { BIT(7,_C);												} /* BIT  7,C		  */
2141 OP(cb,7a) { BIT(7,_D);												} /* BIT  7,D		  */
2142 OP(cb,7b) { BIT(7,_E);												} /* BIT  7,E		  */
2143 OP(cb,7c) { BIT(7,_H);												} /* BIT  7,H		  */
2144 OP(cb,7d) { BIT(7,_L);												} /* BIT  7,L		  */
2145 OP(cb,7e) { BIT(7,RM(_HL));											} /* BIT  7,(HL)	  */
2146 OP(cb,7f) { BIT(7,_A);												} /* BIT  7,A		  */
2147 
2148 OP(cb,80) { _B = RES(0,_B);											} /* RES  0,B		  */
2149 OP(cb,81) { _C = RES(0,_C);											} /* RES  0,C		  */
2150 OP(cb,82) { _D = RES(0,_D);											} /* RES  0,D		  */
2151 OP(cb,83) { _E = RES(0,_E);											} /* RES  0,E		  */
2152 OP(cb,84) { _H = RES(0,_H);											} /* RES  0,H		  */
2153 OP(cb,85) { _L = RES(0,_L);											} /* RES  0,L		  */
2154 OP(cb,86) { WM( _HL, RES(0,RM(_HL)) );								} /* RES  0,(HL)	  */
2155 OP(cb,87) { _A = RES(0,_A);											} /* RES  0,A		  */
2156 
2157 OP(cb,88) { _B = RES(1,_B);											} /* RES  1,B		  */
2158 OP(cb,89) { _C = RES(1,_C);											} /* RES  1,C		  */
2159 OP(cb,8a) { _D = RES(1,_D);											} /* RES  1,D		  */
2160 OP(cb,8b) { _E = RES(1,_E);											} /* RES  1,E		  */
2161 OP(cb,8c) { _H = RES(1,_H);											} /* RES  1,H		  */
2162 OP(cb,8d) { _L = RES(1,_L);											} /* RES  1,L		  */
2163 OP(cb,8e) { WM( _HL, RES(1,RM(_HL)) );								} /* RES  1,(HL)	  */
2164 OP(cb,8f) { _A = RES(1,_A);											} /* RES  1,A		  */
2165 
2166 OP(cb,90) { _B = RES(2,_B);											} /* RES  2,B		  */
2167 OP(cb,91) { _C = RES(2,_C);											} /* RES  2,C		  */
2168 OP(cb,92) { _D = RES(2,_D);											} /* RES  2,D		  */
2169 OP(cb,93) { _E = RES(2,_E);											} /* RES  2,E		  */
2170 OP(cb,94) { _H = RES(2,_H);											} /* RES  2,H		  */
2171 OP(cb,95) { _L = RES(2,_L);											} /* RES  2,L		  */
2172 OP(cb,96) { WM( _HL, RES(2,RM(_HL)) );								} /* RES  2,(HL)	  */
2173 OP(cb,97) { _A = RES(2,_A);											} /* RES  2,A		  */
2174 
2175 OP(cb,98) { _B = RES(3,_B);											} /* RES  3,B		  */
2176 OP(cb,99) { _C = RES(3,_C);											} /* RES  3,C		  */
2177 OP(cb,9a) { _D = RES(3,_D);											} /* RES  3,D		  */
2178 OP(cb,9b) { _E = RES(3,_E);											} /* RES  3,E		  */
2179 OP(cb,9c) { _H = RES(3,_H);											} /* RES  3,H		  */
2180 OP(cb,9d) { _L = RES(3,_L);											} /* RES  3,L		  */
2181 OP(cb,9e) { WM( _HL, RES(3,RM(_HL)) );								} /* RES  3,(HL)	  */
2182 OP(cb,9f) { _A = RES(3,_A);											} /* RES  3,A		  */
2183 
OP(cb,a0)2184 OP(cb,a0) { _B = RES(4,_B);											} /* RES  4,B		  */
OP(cb,a1)2185 OP(cb,a1) { _C = RES(4,_C);											} /* RES  4,C		  */
OP(cb,a2)2186 OP(cb,a2) { _D = RES(4,_D);											} /* RES  4,D		  */
OP(cb,a3)2187 OP(cb,a3) { _E = RES(4,_E);											} /* RES  4,E		  */
OP(cb,a4)2188 OP(cb,a4) { _H = RES(4,_H);											} /* RES  4,H		  */
OP(cb,a5)2189 OP(cb,a5) { _L = RES(4,_L);											} /* RES  4,L		  */
OP(cb,a6)2190 OP(cb,a6) { WM( _HL, RES(4,RM(_HL)) );								} /* RES  4,(HL)	  */
OP(cb,a7)2191 OP(cb,a7) { _A = RES(4,_A);											} /* RES  4,A		  */
2192 
OP(cb,a8)2193 OP(cb,a8) { _B = RES(5,_B);											} /* RES  5,B		  */
OP(cb,a9)2194 OP(cb,a9) { _C = RES(5,_C);											} /* RES  5,C		  */
OP(cb,aa)2195 OP(cb,aa) { _D = RES(5,_D);											} /* RES  5,D		  */
OP(cb,ab)2196 OP(cb,ab) { _E = RES(5,_E);											} /* RES  5,E		  */
OP(cb,ac)2197 OP(cb,ac) { _H = RES(5,_H);											} /* RES  5,H		  */
OP(cb,ad)2198 OP(cb,ad) { _L = RES(5,_L);											} /* RES  5,L		  */
OP(cb,ae)2199 OP(cb,ae) { WM( _HL, RES(5,RM(_HL)) );								} /* RES  5,(HL)	  */
OP(cb,af)2200 OP(cb,af) { _A = RES(5,_A);											} /* RES  5,A		  */
2201 
OP(cb,b0)2202 OP(cb,b0) { _B = RES(6,_B);											} /* RES  6,B		  */
OP(cb,b1)2203 OP(cb,b1) { _C = RES(6,_C);											} /* RES  6,C		  */
OP(cb,b2)2204 OP(cb,b2) { _D = RES(6,_D);											} /* RES  6,D		  */
OP(cb,b3)2205 OP(cb,b3) { _E = RES(6,_E);											} /* RES  6,E		  */
OP(cb,b4)2206 OP(cb,b4) { _H = RES(6,_H);											} /* RES  6,H		  */
OP(cb,b5)2207 OP(cb,b5) { _L = RES(6,_L);											} /* RES  6,L		  */
OP(cb,b6)2208 OP(cb,b6) { WM( _HL, RES(6,RM(_HL)) );								} /* RES  6,(HL)	  */
OP(cb,b7)2209 OP(cb,b7) { _A = RES(6,_A);											} /* RES  6,A		  */
2210 
OP(cb,b8)2211 OP(cb,b8) { _B = RES(7,_B);											} /* RES  7,B		  */
OP(cb,b9)2212 OP(cb,b9) { _C = RES(7,_C);											} /* RES  7,C		  */
OP(cb,ba)2213 OP(cb,ba) { _D = RES(7,_D);											} /* RES  7,D		  */
OP(cb,bb)2214 OP(cb,bb) { _E = RES(7,_E);											} /* RES  7,E		  */
OP(cb,bc)2215 OP(cb,bc) { _H = RES(7,_H);											} /* RES  7,H		  */
OP(cb,bd)2216 OP(cb,bd) { _L = RES(7,_L);											} /* RES  7,L		  */
OP(cb,be)2217 OP(cb,be) { WM( _HL, RES(7,RM(_HL)) );								} /* RES  7,(HL)	  */
OP(cb,bf)2218 OP(cb,bf) { _A = RES(7,_A);											} /* RES  7,A		  */
2219 
OP(cb,c0)2220 OP(cb,c0) { _B = SET(0,_B);											} /* SET  0,B		  */
OP(cb,c1)2221 OP(cb,c1) { _C = SET(0,_C);											} /* SET  0,C		  */
OP(cb,c2)2222 OP(cb,c2) { _D = SET(0,_D);											} /* SET  0,D		  */
OP(cb,c3)2223 OP(cb,c3) { _E = SET(0,_E);											} /* SET  0,E		  */
OP(cb,c4)2224 OP(cb,c4) { _H = SET(0,_H);											} /* SET  0,H		  */
OP(cb,c5)2225 OP(cb,c5) { _L = SET(0,_L);											} /* SET  0,L		  */
OP(cb,c6)2226 OP(cb,c6) { WM( _HL, SET(0,RM(_HL)) );								} /* SET  0,(HL)	  */
OP(cb,c7)2227 OP(cb,c7) { _A = SET(0,_A);											} /* SET  0,A		  */
2228 
OP(cb,c8)2229 OP(cb,c8) { _B = SET(1,_B);											} /* SET  1,B		  */
OP(cb,c9)2230 OP(cb,c9) { _C = SET(1,_C);											} /* SET  1,C		  */
OP(cb,ca)2231 OP(cb,ca) { _D = SET(1,_D);											} /* SET  1,D		  */
OP(cb,cb)2232 OP(cb,cb) { _E = SET(1,_E);											} /* SET  1,E		  */
OP(cb,cc)2233 OP(cb,cc) { _H = SET(1,_H);											} /* SET  1,H		  */
OP(cb,cd)2234 OP(cb,cd) { _L = SET(1,_L);											} /* SET  1,L		  */
OP(cb,ce)2235 OP(cb,ce) { WM( _HL, SET(1,RM(_HL)) );								} /* SET  1,(HL)	  */
OP(cb,cf)2236 OP(cb,cf) { _A = SET(1,_A);											} /* SET  1,A		  */
2237 
OP(cb,d0)2238 OP(cb,d0) { _B = SET(2,_B);											} /* SET  2,B		  */
OP(cb,d1)2239 OP(cb,d1) { _C = SET(2,_C);											} /* SET  2,C		  */
OP(cb,d2)2240 OP(cb,d2) { _D = SET(2,_D);											} /* SET  2,D		  */
OP(cb,d3)2241 OP(cb,d3) { _E = SET(2,_E);											} /* SET  2,E		  */
OP(cb,d4)2242 OP(cb,d4) { _H = SET(2,_H);											} /* SET  2,H		  */
OP(cb,d5)2243 OP(cb,d5) { _L = SET(2,_L);											} /* SET  2,L		  */
OP(cb,d6)2244 OP(cb,d6) { WM( _HL, SET(2,RM(_HL)) );								}/* SET  2,(HL)		 */
OP(cb,d7)2245 OP(cb,d7) { _A = SET(2,_A);											} /* SET  2,A		  */
2246 
OP(cb,d8)2247 OP(cb,d8) { _B = SET(3,_B);											} /* SET  3,B		  */
OP(cb,d9)2248 OP(cb,d9) { _C = SET(3,_C);											} /* SET  3,C		  */
OP(cb,da)2249 OP(cb,da) { _D = SET(3,_D);											} /* SET  3,D		  */
OP(cb,db)2250 OP(cb,db) { _E = SET(3,_E);											} /* SET  3,E		  */
OP(cb,dc)2251 OP(cb,dc) { _H = SET(3,_H);											} /* SET  3,H		  */
OP(cb,dd)2252 OP(cb,dd) { _L = SET(3,_L);											} /* SET  3,L		  */
OP(cb,de)2253 OP(cb,de) { WM( _HL, SET(3,RM(_HL)) );								} /* SET  3,(HL)	  */
OP(cb,df)2254 OP(cb,df) { _A = SET(3,_A);											} /* SET  3,A		  */
2255 
OP(cb,e0)2256 OP(cb,e0) { _B = SET(4,_B);											} /* SET  4,B		  */
OP(cb,e1)2257 OP(cb,e1) { _C = SET(4,_C);											} /* SET  4,C		  */
OP(cb,e2)2258 OP(cb,e2) { _D = SET(4,_D);											} /* SET  4,D		  */
OP(cb,e3)2259 OP(cb,e3) { _E = SET(4,_E);											} /* SET  4,E		  */
OP(cb,e4)2260 OP(cb,e4) { _H = SET(4,_H);											} /* SET  4,H		  */
OP(cb,e5)2261 OP(cb,e5) { _L = SET(4,_L);											} /* SET  4,L		  */
OP(cb,e6)2262 OP(cb,e6) { WM( _HL, SET(4,RM(_HL)) );								} /* SET  4,(HL)	  */
OP(cb,e7)2263 OP(cb,e7) { _A = SET(4,_A);											} /* SET  4,A		  */
2264 
OP(cb,e8)2265 OP(cb,e8) { _B = SET(5,_B);											} /* SET  5,B		  */
OP(cb,e9)2266 OP(cb,e9) { _C = SET(5,_C);											} /* SET  5,C		  */
OP(cb,ea)2267 OP(cb,ea) { _D = SET(5,_D);											} /* SET  5,D		  */
OP(cb,eb)2268 OP(cb,eb) { _E = SET(5,_E);											} /* SET  5,E		  */
OP(cb,ec)2269 OP(cb,ec) { _H = SET(5,_H);											} /* SET  5,H		  */
OP(cb,ed)2270 OP(cb,ed) { _L = SET(5,_L);											} /* SET  5,L		  */
OP(cb,ee)2271 OP(cb,ee) { WM( _HL, SET(5,RM(_HL)) );								} /* SET  5,(HL)	  */
OP(cb,ef)2272 OP(cb,ef) { _A = SET(5,_A);											} /* SET  5,A		  */
2273 
OP(cb,f0)2274 OP(cb,f0) { _B = SET(6,_B);											} /* SET  6,B		  */
OP(cb,f1)2275 OP(cb,f1) { _C = SET(6,_C);											} /* SET  6,C		  */
OP(cb,f2)2276 OP(cb,f2) { _D = SET(6,_D);											} /* SET  6,D		  */
OP(cb,f3)2277 OP(cb,f3) { _E = SET(6,_E);											} /* SET  6,E		  */
OP(cb,f4)2278 OP(cb,f4) { _H = SET(6,_H);											} /* SET  6,H		  */
OP(cb,f5)2279 OP(cb,f5) { _L = SET(6,_L);											} /* SET  6,L		  */
OP(cb,f6)2280 OP(cb,f6) { WM( _HL, SET(6,RM(_HL)) );								} /* SET  6,(HL)	  */
OP(cb,f7)2281 OP(cb,f7) { _A = SET(6,_A);											} /* SET  6,A		  */
2282 
OP(cb,f8)2283 OP(cb,f8) { _B = SET(7,_B);											} /* SET  7,B		  */
OP(cb,f9)2284 OP(cb,f9) { _C = SET(7,_C);											} /* SET  7,C		  */
OP(cb,fa)2285 OP(cb,fa) { _D = SET(7,_D);											} /* SET  7,D		  */
OP(cb,fb)2286 OP(cb,fb) { _E = SET(7,_E);											} /* SET  7,E		  */
OP(cb,fc)2287 OP(cb,fc) { _H = SET(7,_H);											} /* SET  7,H		  */
OP(cb,fd)2288 OP(cb,fd) { _L = SET(7,_L);											} /* SET  7,L		  */
OP(cb,fe)2289 OP(cb,fe) { WM( _HL, SET(7,RM(_HL)) );								} /* SET  7,(HL)	  */
OP(cb,ff)2290 OP(cb,ff) { _A = SET(7,_A);											} /* SET  7,A		  */
2291 
2292 
2293 /**********************************************************
2294 * opcodes with DD/FD CB prefix
2295 * rotate, shift and bit operations with (IX+o)
2296 **********************************************************/
2297 OP(xycb,00) { _B = RLC( RM(EA) ); WM( EA,_B );						} /* RLC  B=(XY+o)	  */
2298 OP(xycb,01) { _C = RLC( RM(EA) ); WM( EA,_C );						} /* RLC  C=(XY+o)	  */
2299 OP(xycb,02) { _D = RLC( RM(EA) ); WM( EA,_D );						} /* RLC  D=(XY+o)	  */
2300 OP(xycb,03) { _E = RLC( RM(EA) ); WM( EA,_E );						} /* RLC  E=(XY+o)	  */
2301 OP(xycb,04) { _H = RLC( RM(EA) ); WM( EA,_H );						} /* RLC  H=(XY+o)	  */
2302 OP(xycb,05) { _L = RLC( RM(EA) ); WM( EA,_L );						} /* RLC  L=(XY+o)	  */
2303 OP(xycb,06) { WM( EA, RLC( RM(EA) ) );								} /* RLC  (XY+o)	  */
2304 OP(xycb,07) { _A = RLC( RM(EA) ); WM( EA,_A );						} /* RLC  A=(XY+o)	  */
2305 
2306 OP(xycb,08) { _B = RRC( RM(EA) ); WM( EA,_B );						} /* RRC  B=(XY+o)	  */
2307 OP(xycb,09) { _C = RRC( RM(EA) ); WM( EA,_C );						} /* RRC  C=(XY+o)	  */
2308 OP(xycb,0a) { _D = RRC( RM(EA) ); WM( EA,_D );						} /* RRC  D=(XY+o)	  */
2309 OP(xycb,0b) { _E = RRC( RM(EA) ); WM( EA,_E );						} /* RRC  E=(XY+o)	  */
2310 OP(xycb,0c) { _H = RRC( RM(EA) ); WM( EA,_H );						} /* RRC  H=(XY+o)	  */
2311 OP(xycb,0d) { _L = RRC( RM(EA) ); WM( EA,_L );						} /* RRC  L=(XY+o)	  */
2312 OP(xycb,0e) { WM( EA,RRC( RM(EA) ) );								} /* RRC  (XY+o)	  */
2313 OP(xycb,0f) { _A = RRC( RM(EA) ); WM( EA,_A );						} /* RRC  A=(XY+o)	  */
2314 
2315 OP(xycb,10) { _B = RL( RM(EA) ); WM( EA,_B );						} /* RL   B=(XY+o)	  */
2316 OP(xycb,11) { _C = RL( RM(EA) ); WM( EA,_C );						} /* RL   C=(XY+o)	  */
2317 OP(xycb,12) { _D = RL( RM(EA) ); WM( EA,_D );						} /* RL   D=(XY+o)	  */
2318 OP(xycb,13) { _E = RL( RM(EA) ); WM( EA,_E );						} /* RL   E=(XY+o)	  */
2319 OP(xycb,14) { _H = RL( RM(EA) ); WM( EA,_H );						} /* RL   H=(XY+o)	  */
2320 OP(xycb,15) { _L = RL( RM(EA) ); WM( EA,_L );						} /* RL   L=(XY+o)	  */
2321 OP(xycb,16) { WM( EA,RL( RM(EA) ) );								} /* RL   (XY+o)	  */
2322 OP(xycb,17) { _A = RL( RM(EA) ); WM( EA,_A );						} /* RL   A=(XY+o)	  */
2323 
2324 OP(xycb,18) { _B = RR( RM(EA) ); WM( EA,_B );						} /* RR   B=(XY+o)	  */
2325 OP(xycb,19) { _C = RR( RM(EA) ); WM( EA,_C );						} /* RR   C=(XY+o)	  */
2326 OP(xycb,1a) { _D = RR( RM(EA) ); WM( EA,_D );						} /* RR   D=(XY+o)	  */
2327 OP(xycb,1b) { _E = RR( RM(EA) ); WM( EA,_E );						} /* RR   E=(XY+o)	  */
2328 OP(xycb,1c) { _H = RR( RM(EA) ); WM( EA,_H );						} /* RR   H=(XY+o)	  */
2329 OP(xycb,1d) { _L = RR( RM(EA) ); WM( EA,_L );						} /* RR   L=(XY+o)	  */
2330 OP(xycb,1e) { WM( EA,RR( RM(EA) ) );								} /* RR   (XY+o)	  */
2331 OP(xycb,1f) { _A = RR( RM(EA) ); WM( EA,_A );						} /* RR   A=(XY+o)	  */
2332 
2333 OP(xycb,20) { _B = SLA( RM(EA) ); WM( EA,_B );						} /* SLA  B=(XY+o)	  */
2334 OP(xycb,21) { _C = SLA( RM(EA) ); WM( EA,_C );						} /* SLA  C=(XY+o)	  */
2335 OP(xycb,22) { _D = SLA( RM(EA) ); WM( EA,_D );						} /* SLA  D=(XY+o)	  */
2336 OP(xycb,23) { _E = SLA( RM(EA) ); WM( EA,_E );						} /* SLA  E=(XY+o)	  */
2337 OP(xycb,24) { _H = SLA( RM(EA) ); WM( EA,_H );						} /* SLA  H=(XY+o)	  */
2338 OP(xycb,25) { _L = SLA( RM(EA) ); WM( EA,_L );						} /* SLA  L=(XY+o)	  */
2339 OP(xycb,26) { WM( EA,SLA( RM(EA) ) );								} /* SLA  (XY+o)	  */
2340 OP(xycb,27) { _A = SLA( RM(EA) ); WM( EA,_A );						} /* SLA  A=(XY+o)	  */
2341 
2342 OP(xycb,28) { _B = SRA( RM(EA) ); WM( EA,_B );						} /* SRA  B=(XY+o)	  */
2343 OP(xycb,29) { _C = SRA( RM(EA) ); WM( EA,_C );						} /* SRA  C=(XY+o)	  */
2344 OP(xycb,2a) { _D = SRA( RM(EA) ); WM( EA,_D );						} /* SRA  D=(XY+o)	  */
2345 OP(xycb,2b) { _E = SRA( RM(EA) ); WM( EA,_E );						} /* SRA  E=(XY+o)	  */
2346 OP(xycb,2c) { _H = SRA( RM(EA) ); WM( EA,_H );						} /* SRA  H=(XY+o)	  */
2347 OP(xycb,2d) { _L = SRA( RM(EA) ); WM( EA,_L );						} /* SRA  L=(XY+o)	  */
2348 OP(xycb,2e) { WM( EA,SRA( RM(EA) ) );								} /* SRA  (XY+o)	  */
2349 OP(xycb,2f) { _A = SRA( RM(EA) ); WM( EA,_A );						} /* SRA  A=(XY+o)	  */
2350 
2351 OP(xycb,30) { _B = SLL( RM(EA) ); WM( EA,_B );						} /* SLL  B=(XY+o)	  */
2352 OP(xycb,31) { _C = SLL( RM(EA) ); WM( EA,_C );						} /* SLL  C=(XY+o)	  */
2353 OP(xycb,32) { _D = SLL( RM(EA) ); WM( EA,_D );						} /* SLL  D=(XY+o)	  */
2354 OP(xycb,33) { _E = SLL( RM(EA) ); WM( EA,_E );						} /* SLL  E=(XY+o)	  */
2355 OP(xycb,34) { _H = SLL( RM(EA) ); WM( EA,_H );						} /* SLL  H=(XY+o)	  */
2356 OP(xycb,35) { _L = SLL( RM(EA) ); WM( EA,_L );						} /* SLL  L=(XY+o)	  */
2357 OP(xycb,36) { WM( EA,SLL( RM(EA) ) );								} /* SLL  (XY+o)	  */
2358 OP(xycb,37) { _A = SLL( RM(EA) ); WM( EA,_A );						} /* SLL  A=(XY+o)	  */
2359 
2360 OP(xycb,38) { _B = SRL( RM(EA) ); WM( EA,_B );						} /* SRL  B=(XY+o)	  */
2361 OP(xycb,39) { _C = SRL( RM(EA) ); WM( EA,_C );						} /* SRL  C=(XY+o)	  */
2362 OP(xycb,3a) { _D = SRL( RM(EA) ); WM( EA,_D );						} /* SRL  D=(XY+o)	  */
2363 OP(xycb,3b) { _E = SRL( RM(EA) ); WM( EA,_E );						} /* SRL  E=(XY+o)	  */
2364 OP(xycb,3c) { _H = SRL( RM(EA) ); WM( EA,_H );						} /* SRL  H=(XY+o)	  */
2365 OP(xycb,3d) { _L = SRL( RM(EA) ); WM( EA,_L );						} /* SRL  L=(XY+o)	  */
2366 OP(xycb,3e) { WM( EA,SRL( RM(EA) ) );								} /* SRL  (XY+o)	  */
2367 OP(xycb,3f) { _A = SRL( RM(EA) ); WM( EA,_A );						} /* SRL  A=(XY+o)	  */
2368 
2369 OP(xycb,40) { xycb_46();											} /* BIT  0,B=(XY+o)  */
2370 OP(xycb,41) { xycb_46();													  } /* BIT	0,C=(XY+o)	*/
2371 OP(xycb,42) { xycb_46();											} /* BIT  0,D=(XY+o)  */
2372 OP(xycb,43) { xycb_46();											} /* BIT  0,E=(XY+o)  */
2373 OP(xycb,44) { xycb_46();											} /* BIT  0,H=(XY+o)  */
2374 OP(xycb,45) { xycb_46();											} /* BIT  0,L=(XY+o)  */
2375 OP(xycb,46) { BIT_XY(0,RM(EA));										} /* BIT  0,(XY+o)	  */
2376 OP(xycb,47) { xycb_46();											} /* BIT  0,A=(XY+o)  */
2377 
2378 OP(xycb,48) { xycb_4e();											} /* BIT  1,B=(XY+o)  */
2379 OP(xycb,49) { xycb_4e();													  } /* BIT	1,C=(XY+o)	*/
2380 OP(xycb,4a) { xycb_4e();											} /* BIT  1,D=(XY+o)  */
2381 OP(xycb,4b) { xycb_4e();											} /* BIT  1,E=(XY+o)  */
2382 OP(xycb,4c) { xycb_4e();											} /* BIT  1,H=(XY+o)  */
2383 OP(xycb,4d) { xycb_4e();											} /* BIT  1,L=(XY+o)  */
2384 OP(xycb,4e) { BIT_XY(1,RM(EA));										} /* BIT  1,(XY+o)	  */
2385 OP(xycb,4f) { xycb_4e();											} /* BIT  1,A=(XY+o)  */
2386 
2387 OP(xycb,50) { xycb_56();											} /* BIT  2,B=(XY+o)  */
2388 OP(xycb,51) { xycb_56();													  } /* BIT	2,C=(XY+o)	*/
2389 OP(xycb,52) { xycb_56();											} /* BIT  2,D=(XY+o)  */
2390 OP(xycb,53) { xycb_56();											} /* BIT  2,E=(XY+o)  */
2391 OP(xycb,54) { xycb_56();											} /* BIT  2,H=(XY+o)  */
2392 OP(xycb,55) { xycb_56();											} /* BIT  2,L=(XY+o)  */
2393 OP(xycb,56) { BIT_XY(2,RM(EA));										} /* BIT  2,(XY+o)	  */
2394 OP(xycb,57) { xycb_56();											} /* BIT  2,A=(XY+o)  */
2395 
2396 OP(xycb,58) { xycb_5e();											} /* BIT  3,B=(XY+o)  */
2397 OP(xycb,59) { xycb_5e();													  } /* BIT	3,C=(XY+o)	*/
2398 OP(xycb,5a) { xycb_5e();											} /* BIT  3,D=(XY+o)  */
2399 OP(xycb,5b) { xycb_5e();											} /* BIT  3,E=(XY+o)  */
2400 OP(xycb,5c) { xycb_5e();											} /* BIT  3,H=(XY+o)  */
2401 OP(xycb,5d) { xycb_5e();											} /* BIT  3,L=(XY+o)  */
2402 OP(xycb,5e) { BIT_XY(3,RM(EA));										} /* BIT  3,(XY+o)	  */
2403 OP(xycb,5f) { xycb_5e();											} /* BIT  3,A=(XY+o)  */
2404 
2405 OP(xycb,60) { xycb_66();											} /* BIT  4,B=(XY+o)  */
2406 OP(xycb,61) { xycb_66();													  } /* BIT	4,C=(XY+o)	*/
2407 OP(xycb,62) { xycb_66();											} /* BIT  4,D=(XY+o)  */
2408 OP(xycb,63) { xycb_66();											} /* BIT  4,E=(XY+o)  */
2409 OP(xycb,64) { xycb_66();											} /* BIT  4,H=(XY+o)  */
2410 OP(xycb,65) { xycb_66();											} /* BIT  4,L=(XY+o)  */
2411 OP(xycb,66) { BIT_XY(4,RM(EA));										} /* BIT  4,(XY+o)	  */
2412 OP(xycb,67) { xycb_66();											} /* BIT  4,A=(XY+o)  */
2413 
2414 OP(xycb,68) { xycb_6e();											} /* BIT  5,B=(XY+o)  */
2415 OP(xycb,69) { xycb_6e();													  } /* BIT	5,C=(XY+o)	*/
2416 OP(xycb,6a) { xycb_6e();											} /* BIT  5,D=(XY+o)  */
2417 OP(xycb,6b) { xycb_6e();											} /* BIT  5,E=(XY+o)  */
2418 OP(xycb,6c) { xycb_6e();											} /* BIT  5,H=(XY+o)  */
2419 OP(xycb,6d) { xycb_6e();											} /* BIT  5,L=(XY+o)  */
2420 OP(xycb,6e) { BIT_XY(5,RM(EA));										} /* BIT  5,(XY+o)	  */
2421 OP(xycb,6f) { xycb_6e();											} /* BIT  5,A=(XY+o)  */
2422 
2423 OP(xycb,70) { xycb_76();											} /* BIT  6,B=(XY+o)  */
2424 OP(xycb,71) { xycb_76();													  } /* BIT	6,C=(XY+o)	*/
2425 OP(xycb,72) { xycb_76();											} /* BIT  6,D=(XY+o)  */
2426 OP(xycb,73) { xycb_76();											} /* BIT  6,E=(XY+o)  */
2427 OP(xycb,74) { xycb_76();											} /* BIT  6,H=(XY+o)  */
2428 OP(xycb,75) { xycb_76();											} /* BIT  6,L=(XY+o)  */
2429 OP(xycb,76) { BIT_XY(6,RM(EA));										} /* BIT  6,(XY+o)	  */
2430 OP(xycb,77) { xycb_76();											} /* BIT  6,A=(XY+o)  */
2431 
2432 OP(xycb,78) { xycb_7e();											} /* BIT  7,B=(XY+o)  */
2433 OP(xycb,79) { xycb_7e();													  } /* BIT	7,C=(XY+o)	*/
2434 OP(xycb,7a) { xycb_7e();											} /* BIT  7,D=(XY+o)  */
2435 OP(xycb,7b) { xycb_7e();											} /* BIT  7,E=(XY+o)  */
2436 OP(xycb,7c) { xycb_7e();											} /* BIT  7,H=(XY+o)  */
2437 OP(xycb,7d) { xycb_7e();											} /* BIT  7,L=(XY+o)  */
2438 OP(xycb,7e) { BIT_XY(7,RM(EA));										} /* BIT  7,(XY+o)	  */
2439 OP(xycb,7f) { xycb_7e();											} /* BIT  7,A=(XY+o)  */
2440 
2441 OP(xycb,80) { _B = RES(0, RM(EA) ); WM( EA,_B );					} /* RES  0,B=(XY+o)  */
2442 OP(xycb,81) { _C = RES(0, RM(EA) ); WM( EA,_C );					} /* RES  0,C=(XY+o)  */
2443 OP(xycb,82) { _D = RES(0, RM(EA) ); WM( EA,_D );					} /* RES  0,D=(XY+o)  */
2444 OP(xycb,83) { _E = RES(0, RM(EA) ); WM( EA,_E );					} /* RES  0,E=(XY+o)  */
2445 OP(xycb,84) { _H = RES(0, RM(EA) ); WM( EA,_H );					} /* RES  0,H=(XY+o)  */
2446 OP(xycb,85) { _L = RES(0, RM(EA) ); WM( EA,_L );					} /* RES  0,L=(XY+o)  */
2447 OP(xycb,86) { WM( EA, RES(0,RM(EA)) );								} /* RES  0,(XY+o)	  */
2448 OP(xycb,87) { _A = RES(0, RM(EA) ); WM( EA,_A );					} /* RES  0,A=(XY+o)  */
2449 
2450 OP(xycb,88) { _B = RES(1, RM(EA) ); WM( EA,_B );					} /* RES  1,B=(XY+o)  */
2451 OP(xycb,89) { _C = RES(1, RM(EA) ); WM( EA,_C );					} /* RES  1,C=(XY+o)  */
2452 OP(xycb,8a) { _D = RES(1, RM(EA) ); WM( EA,_D );					} /* RES  1,D=(XY+o)  */
2453 OP(xycb,8b) { _E = RES(1, RM(EA) ); WM( EA,_E );					} /* RES  1,E=(XY+o)  */
2454 OP(xycb,8c) { _H = RES(1, RM(EA) ); WM( EA,_H );					} /* RES  1,H=(XY+o)  */
2455 OP(xycb,8d) { _L = RES(1, RM(EA) ); WM( EA,_L );					} /* RES  1,L=(XY+o)  */
2456 OP(xycb,8e) { WM( EA, RES(1,RM(EA)) );								} /* RES  1,(XY+o)	  */
2457 OP(xycb,8f) { _A = RES(1, RM(EA) ); WM( EA,_A );					} /* RES  1,A=(XY+o)  */
2458 
2459 OP(xycb,90) { _B = RES(2, RM(EA) ); WM( EA,_B );					} /* RES  2,B=(XY+o)  */
2460 OP(xycb,91) { _C = RES(2, RM(EA) ); WM( EA,_C );					} /* RES  2,C=(XY+o)  */
2461 OP(xycb,92) { _D = RES(2, RM(EA) ); WM( EA,_D );					} /* RES  2,D=(XY+o)  */
2462 OP(xycb,93) { _E = RES(2, RM(EA) ); WM( EA,_E );					} /* RES  2,E=(XY+o)  */
2463 OP(xycb,94) { _H = RES(2, RM(EA) ); WM( EA,_H );					} /* RES  2,H=(XY+o)  */
2464 OP(xycb,95) { _L = RES(2, RM(EA) ); WM( EA,_L );					} /* RES  2,L=(XY+o)  */
2465 OP(xycb,96) { WM( EA, RES(2,RM(EA)) );								} /* RES  2,(XY+o)	  */
2466 OP(xycb,97) { _A = RES(2, RM(EA) ); WM( EA,_A );					} /* RES  2,A=(XY+o)  */
2467 
2468 OP(xycb,98) { _B = RES(3, RM(EA) ); WM( EA,_B );					} /* RES  3,B=(XY+o)  */
2469 OP(xycb,99) { _C = RES(3, RM(EA) ); WM( EA,_C );					} /* RES  3,C=(XY+o)  */
2470 OP(xycb,9a) { _D = RES(3, RM(EA) ); WM( EA,_D );					} /* RES  3,D=(XY+o)  */
2471 OP(xycb,9b) { _E = RES(3, RM(EA) ); WM( EA,_E );					} /* RES  3,E=(XY+o)  */
2472 OP(xycb,9c) { _H = RES(3, RM(EA) ); WM( EA,_H );					} /* RES  3,H=(XY+o)  */
2473 OP(xycb,9d) { _L = RES(3, RM(EA) ); WM( EA,_L );					} /* RES  3,L=(XY+o)  */
2474 OP(xycb,9e) { WM( EA, RES(3,RM(EA)) );								} /* RES  3,(XY+o)	  */
2475 OP(xycb,9f) { _A = RES(3, RM(EA) ); WM( EA,_A );					} /* RES  3,A=(XY+o)  */
2476 
OP(xycb,a0)2477 OP(xycb,a0) { _B = RES(4, RM(EA) ); WM( EA,_B );					} /* RES  4,B=(XY+o)  */
OP(xycb,a1)2478 OP(xycb,a1) { _C = RES(4, RM(EA) ); WM( EA,_C );					} /* RES  4,C=(XY+o)  */
OP(xycb,a2)2479 OP(xycb,a2) { _D = RES(4, RM(EA) ); WM( EA,_D );					} /* RES  4,D=(XY+o)  */
OP(xycb,a3)2480 OP(xycb,a3) { _E = RES(4, RM(EA) ); WM( EA,_E );					} /* RES  4,E=(XY+o)  */
OP(xycb,a4)2481 OP(xycb,a4) { _H = RES(4, RM(EA) ); WM( EA,_H );					} /* RES  4,H=(XY+o)  */
OP(xycb,a5)2482 OP(xycb,a5) { _L = RES(4, RM(EA) ); WM( EA,_L );					} /* RES  4,L=(XY+o)  */
OP(xycb,a6)2483 OP(xycb,a6) { WM( EA, RES(4,RM(EA)) );								} /* RES  4,(XY+o)	  */
OP(xycb,a7)2484 OP(xycb,a7) { _A = RES(4, RM(EA) ); WM( EA,_A );					} /* RES  4,A=(XY+o)  */
2485 
OP(xycb,a8)2486 OP(xycb,a8) { _B = RES(5, RM(EA) ); WM( EA,_B );					} /* RES  5,B=(XY+o)  */
OP(xycb,a9)2487 OP(xycb,a9) { _C = RES(5, RM(EA) ); WM( EA,_C );					} /* RES  5,C=(XY+o)  */
OP(xycb,aa)2488 OP(xycb,aa) { _D = RES(5, RM(EA) ); WM( EA,_D );					} /* RES  5,D=(XY+o)  */
OP(xycb,ab)2489 OP(xycb,ab) { _E = RES(5, RM(EA) ); WM( EA,_E );					} /* RES  5,E=(XY+o)  */
OP(xycb,ac)2490 OP(xycb,ac) { _H = RES(5, RM(EA) ); WM( EA,_H );					} /* RES  5,H=(XY+o)  */
OP(xycb,ad)2491 OP(xycb,ad) { _L = RES(5, RM(EA) ); WM( EA,_L );					} /* RES  5,L=(XY+o)  */
OP(xycb,ae)2492 OP(xycb,ae) { WM( EA, RES(5,RM(EA)) );								} /* RES  5,(XY+o)	  */
OP(xycb,af)2493 OP(xycb,af) { _A = RES(5, RM(EA) ); WM( EA,_A );					} /* RES  5,A=(XY+o)  */
2494 
OP(xycb,b0)2495 OP(xycb,b0) { _B = RES(6, RM(EA) ); WM( EA,_B );					} /* RES  6,B=(XY+o)  */
OP(xycb,b1)2496 OP(xycb,b1) { _C = RES(6, RM(EA) ); WM( EA,_C );					} /* RES  6,C=(XY+o)  */
OP(xycb,b2)2497 OP(xycb,b2) { _D = RES(6, RM(EA) ); WM( EA,_D );					} /* RES  6,D=(XY+o)  */
OP(xycb,b3)2498 OP(xycb,b3) { _E = RES(6, RM(EA) ); WM( EA,_E );					} /* RES  6,E=(XY+o)  */
OP(xycb,b4)2499 OP(xycb,b4) { _H = RES(6, RM(EA) ); WM( EA,_H );					} /* RES  6,H=(XY+o)  */
OP(xycb,b5)2500 OP(xycb,b5) { _L = RES(6, RM(EA) ); WM( EA,_L );					} /* RES  6,L=(XY+o)  */
OP(xycb,b6)2501 OP(xycb,b6) { WM( EA, RES(6,RM(EA)) );								} /* RES  6,(XY+o)	  */
OP(xycb,b7)2502 OP(xycb,b7) { _A = RES(6, RM(EA) ); WM( EA,_A );					} /* RES  6,A=(XY+o)  */
2503 
OP(xycb,b8)2504 OP(xycb,b8) { _B = RES(7, RM(EA) ); WM( EA,_B );					} /* RES  7,B=(XY+o)  */
OP(xycb,b9)2505 OP(xycb,b9) { _C = RES(7, RM(EA) ); WM( EA,_C );					} /* RES  7,C=(XY+o)  */
OP(xycb,ba)2506 OP(xycb,ba) { _D = RES(7, RM(EA) ); WM( EA,_D );					} /* RES  7,D=(XY+o)  */
OP(xycb,bb)2507 OP(xycb,bb) { _E = RES(7, RM(EA) ); WM( EA,_E );					} /* RES  7,E=(XY+o)  */
OP(xycb,bc)2508 OP(xycb,bc) { _H = RES(7, RM(EA) ); WM( EA,_H );					} /* RES  7,H=(XY+o)  */
OP(xycb,bd)2509 OP(xycb,bd) { _L = RES(7, RM(EA) ); WM( EA,_L );					} /* RES  7,L=(XY+o)  */
OP(xycb,be)2510 OP(xycb,be) { WM( EA, RES(7,RM(EA)) );								} /* RES  7,(XY+o)	  */
OP(xycb,bf)2511 OP(xycb,bf) { _A = RES(7, RM(EA) ); WM( EA,_A );					} /* RES  7,A=(XY+o)  */
2512 
OP(xycb,c0)2513 OP(xycb,c0) { _B = SET(0, RM(EA) ); WM( EA,_B );					} /* SET  0,B=(XY+o)  */
OP(xycb,c1)2514 OP(xycb,c1) { _C = SET(0, RM(EA) ); WM( EA,_C );					} /* SET  0,C=(XY+o)  */
OP(xycb,c2)2515 OP(xycb,c2) { _D = SET(0, RM(EA) ); WM( EA,_D );					} /* SET  0,D=(XY+o)  */
OP(xycb,c3)2516 OP(xycb,c3) { _E = SET(0, RM(EA) ); WM( EA,_E );					} /* SET  0,E=(XY+o)  */
OP(xycb,c4)2517 OP(xycb,c4) { _H = SET(0, RM(EA) ); WM( EA,_H );					} /* SET  0,H=(XY+o)  */
OP(xycb,c5)2518 OP(xycb,c5) { _L = SET(0, RM(EA) ); WM( EA,_L );					} /* SET  0,L=(XY+o)  */
OP(xycb,c6)2519 OP(xycb,c6) { WM( EA, SET(0,RM(EA)) );								} /* SET  0,(XY+o)	  */
OP(xycb,c7)2520 OP(xycb,c7) { _A = SET(0, RM(EA) ); WM( EA,_A );					} /* SET  0,A=(XY+o)  */
2521 
OP(xycb,c8)2522 OP(xycb,c8) { _B = SET(1, RM(EA) ); WM( EA,_B );					} /* SET  1,B=(XY+o)  */
OP(xycb,c9)2523 OP(xycb,c9) { _C = SET(1, RM(EA) ); WM( EA,_C );					} /* SET  1,C=(XY+o)  */
OP(xycb,ca)2524 OP(xycb,ca) { _D = SET(1, RM(EA) ); WM( EA,_D );					} /* SET  1,D=(XY+o)  */
OP(xycb,cb)2525 OP(xycb,cb) { _E = SET(1, RM(EA) ); WM( EA,_E );					} /* SET  1,E=(XY+o)  */
OP(xycb,cc)2526 OP(xycb,cc) { _H = SET(1, RM(EA) ); WM( EA,_H );					} /* SET  1,H=(XY+o)  */
OP(xycb,cd)2527 OP(xycb,cd) { _L = SET(1, RM(EA) ); WM( EA,_L );					} /* SET  1,L=(XY+o)  */
OP(xycb,ce)2528 OP(xycb,ce) { WM( EA, SET(1,RM(EA)) );								} /* SET  1,(XY+o)	  */
OP(xycb,cf)2529 OP(xycb,cf) { _A = SET(1, RM(EA) ); WM( EA,_A );					} /* SET  1,A=(XY+o)  */
2530 
OP(xycb,d0)2531 OP(xycb,d0) { _B = SET(2, RM(EA) ); WM( EA,_B );					} /* SET  2,B=(XY+o)  */
OP(xycb,d1)2532 OP(xycb,d1) { _C = SET(2, RM(EA) ); WM( EA,_C );					} /* SET  2,C=(XY+o)  */
OP(xycb,d2)2533 OP(xycb,d2) { _D = SET(2, RM(EA) ); WM( EA,_D );					} /* SET  2,D=(XY+o)  */
OP(xycb,d3)2534 OP(xycb,d3) { _E = SET(2, RM(EA) ); WM( EA,_E );					} /* SET  2,E=(XY+o)  */
OP(xycb,d4)2535 OP(xycb,d4) { _H = SET(2, RM(EA) ); WM( EA,_H );					} /* SET  2,H=(XY+o)  */
OP(xycb,d5)2536 OP(xycb,d5) { _L = SET(2, RM(EA) ); WM( EA,_L );					} /* SET  2,L=(XY+o)  */
OP(xycb,d6)2537 OP(xycb,d6) { WM( EA, SET(2,RM(EA)) );								} /* SET  2,(XY+o)	  */
OP(xycb,d7)2538 OP(xycb,d7) { _A = SET(2, RM(EA) ); WM( EA,_A );					} /* SET  2,A=(XY+o)  */
2539 
OP(xycb,d8)2540 OP(xycb,d8) { _B = SET(3, RM(EA) ); WM( EA,_B );					} /* SET  3,B=(XY+o)  */
OP(xycb,d9)2541 OP(xycb,d9) { _C = SET(3, RM(EA) ); WM( EA,_C );					} /* SET  3,C=(XY+o)  */
OP(xycb,da)2542 OP(xycb,da) { _D = SET(3, RM(EA) ); WM( EA,_D );					} /* SET  3,D=(XY+o)  */
OP(xycb,db)2543 OP(xycb,db) { _E = SET(3, RM(EA) ); WM( EA,_E );					} /* SET  3,E=(XY+o)  */
OP(xycb,dc)2544 OP(xycb,dc) { _H = SET(3, RM(EA) ); WM( EA,_H );					} /* SET  3,H=(XY+o)  */
OP(xycb,dd)2545 OP(xycb,dd) { _L = SET(3, RM(EA) ); WM( EA,_L );					} /* SET  3,L=(XY+o)  */
OP(xycb,de)2546 OP(xycb,de) { WM( EA, SET(3,RM(EA)) );								} /* SET  3,(XY+o)	  */
OP(xycb,df)2547 OP(xycb,df) { _A = SET(3, RM(EA) ); WM( EA,_A );					} /* SET  3,A=(XY+o)  */
2548 
OP(xycb,e0)2549 OP(xycb,e0) { _B = SET(4, RM(EA) ); WM( EA,_B );					} /* SET  4,B=(XY+o)  */
OP(xycb,e1)2550 OP(xycb,e1) { _C = SET(4, RM(EA) ); WM( EA,_C );					} /* SET  4,C=(XY+o)  */
OP(xycb,e2)2551 OP(xycb,e2) { _D = SET(4, RM(EA) ); WM( EA,_D );					} /* SET  4,D=(XY+o)  */
OP(xycb,e3)2552 OP(xycb,e3) { _E = SET(4, RM(EA) ); WM( EA,_E );					} /* SET  4,E=(XY+o)  */
OP(xycb,e4)2553 OP(xycb,e4) { _H = SET(4, RM(EA) ); WM( EA,_H );					} /* SET  4,H=(XY+o)  */
OP(xycb,e5)2554 OP(xycb,e5) { _L = SET(4, RM(EA) ); WM( EA,_L );					} /* SET  4,L=(XY+o)  */
OP(xycb,e6)2555 OP(xycb,e6) { WM( EA, SET(4,RM(EA)) );								} /* SET  4,(XY+o)	  */
OP(xycb,e7)2556 OP(xycb,e7) { _A = SET(4, RM(EA) ); WM( EA,_A );					} /* SET  4,A=(XY+o)  */
2557 
OP(xycb,e8)2558 OP(xycb,e8) { _B = SET(5, RM(EA) ); WM( EA,_B );					} /* SET  5,B=(XY+o)  */
OP(xycb,e9)2559 OP(xycb,e9) { _C = SET(5, RM(EA) ); WM( EA,_C );					} /* SET  5,C=(XY+o)  */
OP(xycb,ea)2560 OP(xycb,ea) { _D = SET(5, RM(EA) ); WM( EA,_D );					} /* SET  5,D=(XY+o)  */
OP(xycb,eb)2561 OP(xycb,eb) { _E = SET(5, RM(EA) ); WM( EA,_E );					} /* SET  5,E=(XY+o)  */
OP(xycb,ec)2562 OP(xycb,ec) { _H = SET(5, RM(EA) ); WM( EA,_H );					} /* SET  5,H=(XY+o)  */
OP(xycb,ed)2563 OP(xycb,ed) { _L = SET(5, RM(EA) ); WM( EA,_L );					} /* SET  5,L=(XY+o)  */
OP(xycb,ee)2564 OP(xycb,ee) { WM( EA, SET(5,RM(EA)) );								} /* SET  5,(XY+o)	  */
OP(xycb,ef)2565 OP(xycb,ef) { _A = SET(5, RM(EA) ); WM( EA,_A );					} /* SET  5,A=(XY+o)  */
2566 
OP(xycb,f0)2567 OP(xycb,f0) { _B = SET(6, RM(EA) ); WM( EA,_B );					} /* SET  6,B=(XY+o)  */
OP(xycb,f1)2568 OP(xycb,f1) { _C = SET(6, RM(EA) ); WM( EA,_C );					} /* SET  6,C=(XY+o)  */
OP(xycb,f2)2569 OP(xycb,f2) { _D = SET(6, RM(EA) ); WM( EA,_D );					} /* SET  6,D=(XY+o)  */
OP(xycb,f3)2570 OP(xycb,f3) { _E = SET(6, RM(EA) ); WM( EA,_E );					} /* SET  6,E=(XY+o)  */
OP(xycb,f4)2571 OP(xycb,f4) { _H = SET(6, RM(EA) ); WM( EA,_H );					} /* SET  6,H=(XY+o)  */
OP(xycb,f5)2572 OP(xycb,f5) { _L = SET(6, RM(EA) ); WM( EA,_L );					} /* SET  6,L=(XY+o)  */
OP(xycb,f6)2573 OP(xycb,f6) { WM( EA, SET(6,RM(EA)) );								} /* SET  6,(XY+o)	  */
OP(xycb,f7)2574 OP(xycb,f7) { _A = SET(6, RM(EA) ); WM( EA,_A );					} /* SET  6,A=(XY+o)  */
2575 
OP(xycb,f8)2576 OP(xycb,f8) { _B = SET(7, RM(EA) ); WM( EA,_B );					} /* SET  7,B=(XY+o)  */
OP(xycb,f9)2577 OP(xycb,f9) { _C = SET(7, RM(EA) ); WM( EA,_C );					} /* SET  7,C=(XY+o)  */
OP(xycb,fa)2578 OP(xycb,fa) { _D = SET(7, RM(EA) ); WM( EA,_D );					} /* SET  7,D=(XY+o)  */
OP(xycb,fb)2579 OP(xycb,fb) { _E = SET(7, RM(EA) ); WM( EA,_E );					} /* SET  7,E=(XY+o)  */
OP(xycb,fc)2580 OP(xycb,fc) { _H = SET(7, RM(EA) ); WM( EA,_H );					} /* SET  7,H=(XY+o)  */
OP(xycb,fd)2581 OP(xycb,fd) { _L = SET(7, RM(EA) ); WM( EA,_L );					} /* SET  7,L=(XY+o)  */
OP(xycb,fe)2582 OP(xycb,fe) { WM( EA, SET(7,RM(EA)) );								} /* SET  7,(XY+o)	  */
OP(xycb,ff)2583 OP(xycb,ff) { _A = SET(7, RM(EA) ); WM( EA,_A );					} /* SET  7,A=(XY+o)  */
2584 
2585 OP(illegal,1) {
2586 	log_cb(RETRO_LOG_DEBUG, LOGPRE "Z80 #%d ill. opcode $%02x $%02x\n",
2587 			cpu_getactivecpu(), cpu_readop((_PCD-1)&0xffff), cpu_readop(_PCD));
2588 }
2589 
2590 /**********************************************************
2591  * IX register related opcodes (DD prefix)
2592  **********************************************************/
2593 OP(dd,00) { illegal_1(); op_00();									} /* DB   DD		  */
2594 OP(dd,01) { illegal_1(); op_01();									} /* DB   DD		  */
2595 OP(dd,02) { illegal_1(); op_02();									} /* DB   DD		  */
2596 OP(dd,03) { illegal_1(); op_03();									} /* DB   DD		  */
2597 OP(dd,04) { illegal_1(); op_04();									} /* DB   DD		  */
2598 OP(dd,05) { illegal_1(); op_05();									} /* DB   DD		  */
2599 OP(dd,06) { illegal_1(); op_06();									} /* DB   DD		  */
2600 OP(dd,07) { illegal_1(); op_07();									} /* DB   DD		  */
2601 
2602 OP(dd,08) { illegal_1(); op_08();									} /* DB   DD		  */
2603 OP(dd,09) { _R++; ADD16(IX,BC);										} /* ADD  IX,BC		  */
2604 OP(dd,0a) { illegal_1(); op_0a();									} /* DB   DD		  */
2605 OP(dd,0b) { illegal_1(); op_0b();									} /* DB   DD		  */
2606 OP(dd,0c) { illegal_1(); op_0c();									} /* DB   DD		  */
2607 OP(dd,0d) { illegal_1(); op_0d();									} /* DB   DD		  */
2608 OP(dd,0e) { illegal_1(); op_0e();									} /* DB   DD		  */
2609 OP(dd,0f) { illegal_1(); op_0f();									} /* DB   DD		  */
2610 
2611 OP(dd,10) { illegal_1(); op_10();									} /* DB   DD		  */
2612 OP(dd,11) { illegal_1(); op_11();									} /* DB   DD		  */
2613 OP(dd,12) { illegal_1(); op_12();									} /* DB   DD		  */
2614 OP(dd,13) { illegal_1(); op_13();									} /* DB   DD		  */
2615 OP(dd,14) { illegal_1(); op_14();									} /* DB   DD		  */
2616 OP(dd,15) { illegal_1(); op_15();									} /* DB   DD		  */
2617 OP(dd,16) { illegal_1(); op_16();									} /* DB   DD		  */
2618 OP(dd,17) { illegal_1(); op_17();									} /* DB   DD		  */
2619 
2620 OP(dd,18) { illegal_1(); op_18();									} /* DB   DD		  */
2621 OP(dd,19) { _R++; ADD16(IX,DE);										} /* ADD  IX,DE		  */
2622 OP(dd,1a) { illegal_1(); op_1a();									} /* DB   DD		  */
2623 OP(dd,1b) { illegal_1(); op_1b();									} /* DB   DD		  */
2624 OP(dd,1c) { illegal_1(); op_1c();									} /* DB   DD		  */
2625 OP(dd,1d) { illegal_1(); op_1d();									} /* DB   DD		  */
2626 OP(dd,1e) { illegal_1(); op_1e();									} /* DB   DD		  */
2627 OP(dd,1f) { illegal_1(); op_1f();									} /* DB   DD		  */
2628 
2629 OP(dd,20) { illegal_1(); op_20();									} /* DB   DD		  */
2630 OP(dd,21) { _R++; _IX = ARG16();									} /* LD   IX,w		  */
2631 OP(dd,22) { _R++; EA = ARG16(); WM16( EA, &Z80.IX );				} /* LD   (w),IX	  */
2632 OP(dd,23) { _R++; _IX++;											} /* INC  IX		  */
2633 OP(dd,24) { _R++; _HX = INC(_HX);									} /* INC  HX		  */
2634 OP(dd,25) { _R++; _HX = DEC(_HX);									} /* DEC  HX		  */
2635 OP(dd,26) { _R++; _HX = ARG();										} /* LD   HX,n		  */
2636 OP(dd,27) { illegal_1(); op_27();									} /* DB   DD		  */
2637 
2638 OP(dd,28) { illegal_1(); op_28();									} /* DB   DD		  */
2639 OP(dd,29) { _R++; ADD16(IX,IX);										} /* ADD  IX,IX		  */
2640 OP(dd,2a) { _R++; EA = ARG16(); RM16( EA, &Z80.IX );				} /* LD   IX,(w)	  */
2641 OP(dd,2b) { _R++; _IX--;											} /* DEC  IX		  */
2642 OP(dd,2c) { _R++; _LX = INC(_LX);									} /* INC  LX		  */
2643 OP(dd,2d) { _R++; _LX = DEC(_LX);									} /* DEC  LX		  */
2644 OP(dd,2e) { _R++; _LX = ARG();										} /* LD   LX,n		  */
2645 OP(dd,2f) { illegal_1(); op_2f();									} /* DB   DD		  */
2646 
2647 OP(dd,30) { illegal_1(); op_30();									} /* DB   DD		  */
2648 OP(dd,31) { illegal_1(); op_31();									} /* DB   DD		  */
2649 OP(dd,32) { illegal_1(); op_32();									} /* DB   DD		  */
2650 OP(dd,33) { illegal_1(); op_33();									} /* DB   DD		  */
2651 OP(dd,34) { _R++; EAX; WM( EA, INC(RM(EA)) );						} /* INC  (IX+o)	  */
2652 OP(dd,35) { _R++; EAX; WM( EA, DEC(RM(EA)) );						} /* DEC  (IX+o)	  */
2653 OP(dd,36) { _R++; EAX; WM( EA, ARG() );								} /* LD   (IX+o),n	  */
2654 OP(dd,37) { illegal_1(); op_37();									} /* DB   DD		  */
2655 
2656 OP(dd,38) { illegal_1(); op_38();									} /* DB   DD		  */
2657 OP(dd,39) { _R++; ADD16(IX,SP);										} /* ADD  IX,SP		  */
2658 OP(dd,3a) { illegal_1(); op_3a();									} /* DB   DD		  */
2659 OP(dd,3b) { illegal_1(); op_3b();									} /* DB   DD		  */
2660 OP(dd,3c) { illegal_1(); op_3c();									} /* DB   DD		  */
2661 OP(dd,3d) { illegal_1(); op_3d();									} /* DB   DD		  */
2662 OP(dd,3e) { illegal_1(); op_3e();									} /* DB   DD		  */
2663 OP(dd,3f) { illegal_1(); op_3f();									} /* DB   DD		  */
2664 
2665 OP(dd,40) { illegal_1(); op_40();									} /* DB   DD		  */
2666 OP(dd,41) { illegal_1(); op_41();									} /* DB   DD		  */
2667 OP(dd,42) { illegal_1(); op_42();									} /* DB   DD		  */
2668 OP(dd,43) { illegal_1(); op_43();									} /* DB   DD		  */
2669 OP(dd,44) { _R++; _B = _HX;											} /* LD   B,HX		  */
2670 OP(dd,45) { _R++; _B = _LX;											} /* LD   B,LX		  */
2671 OP(dd,46) { _R++; EAX; _B = RM(EA);									} /* LD   B,(IX+o)	  */
2672 OP(dd,47) { illegal_1(); op_47();									} /* DB   DD		  */
2673 
2674 OP(dd,48) { illegal_1(); op_48();									} /* DB   DD		  */
2675 OP(dd,49) { illegal_1(); op_49();									} /* DB   DD		  */
2676 OP(dd,4a) { illegal_1(); op_4a();									} /* DB   DD		  */
2677 OP(dd,4b) { illegal_1(); op_4b();									} /* DB   DD		  */
2678 OP(dd,4c) { _R++; _C = _HX;											} /* LD   C,HX		  */
2679 OP(dd,4d) { _R++; _C = _LX;											} /* LD   C,LX		  */
2680 OP(dd,4e) { _R++; EAX; _C = RM(EA);									} /* LD   C,(IX+o)	  */
2681 OP(dd,4f) { illegal_1(); op_4f();									} /* DB   DD		  */
2682 
2683 OP(dd,50) { illegal_1(); op_50();									} /* DB   DD		  */
2684 OP(dd,51) { illegal_1(); op_51();									} /* DB   DD		  */
2685 OP(dd,52) { illegal_1(); op_52();									} /* DB   DD		  */
2686 OP(dd,53) { illegal_1(); op_53();									} /* DB   DD		  */
2687 OP(dd,54) { _R++; _D = _HX;											} /* LD   D,HX		  */
2688 OP(dd,55) { _R++; _D = _LX;											} /* LD   D,LX		  */
2689 OP(dd,56) { _R++; EAX; _D = RM(EA);									} /* LD   D,(IX+o)	  */
2690 OP(dd,57) { illegal_1(); op_57();									} /* DB   DD		  */
2691 
2692 OP(dd,58) { illegal_1(); op_58();									} /* DB   DD		  */
2693 OP(dd,59) { illegal_1(); op_59();									} /* DB   DD		  */
2694 OP(dd,5a) { illegal_1(); op_5a();									} /* DB   DD		  */
2695 OP(dd,5b) { illegal_1(); op_5b();									} /* DB   DD		  */
2696 OP(dd,5c) { _R++; _E = _HX;											} /* LD   E,HX		  */
2697 OP(dd,5d) { _R++; _E = _LX;											} /* LD   E,LX		  */
2698 OP(dd,5e) { _R++; EAX; _E = RM(EA);									} /* LD   E,(IX+o)	  */
2699 OP(dd,5f) { illegal_1(); op_5f();									} /* DB   DD		  */
2700 
2701 OP(dd,60) { _R++; _HX = _B;											} /* LD   HX,B		  */
2702 OP(dd,61) { _R++; _HX = _C;											} /* LD   HX,C		  */
2703 OP(dd,62) { _R++; _HX = _D;											} /* LD   HX,D		  */
2704 OP(dd,63) { _R++; _HX = _E;											} /* LD   HX,E		  */
2705 OP(dd,64) {															} /* LD   HX,HX		  */
2706 OP(dd,65) { _R++; _HX = _LX;										} /* LD   HX,LX		  */
2707 OP(dd,66) { _R++; EAX; _H = RM(EA);									} /* LD   H,(IX+o)	  */
2708 OP(dd,67) { _R++; _HX = _A;											} /* LD   HX,A		  */
2709 
2710 OP(dd,68) { _R++; _LX = _B;											} /* LD   LX,B		  */
2711 OP(dd,69) { _R++; _LX = _C;											} /* LD   LX,C		  */
2712 OP(dd,6a) { _R++; _LX = _D;											} /* LD   LX,D		  */
2713 OP(dd,6b) { _R++; _LX = _E;											} /* LD   LX,E		  */
2714 OP(dd,6c) { _R++; _LX = _HX;										} /* LD   LX,HX		  */
2715 OP(dd,6d) {															} /* LD   LX,LX		  */
2716 OP(dd,6e) { _R++; EAX; _L = RM(EA);									} /* LD   L,(IX+o)	  */
2717 OP(dd,6f) { _R++; _LX = _A;											} /* LD   LX,A		  */
2718 
2719 OP(dd,70) { _R++; EAX; WM( EA, _B );								} /* LD   (IX+o),B	  */
2720 OP(dd,71) { _R++; EAX; WM( EA, _C );								} /* LD   (IX+o),C	  */
2721 OP(dd,72) { _R++; EAX; WM( EA, _D );								} /* LD   (IX+o),D	  */
2722 OP(dd,73) { _R++; EAX; WM( EA, _E );								} /* LD   (IX+o),E	  */
2723 OP(dd,74) { _R++; EAX; WM( EA, _H );								} /* LD   (IX+o),H	  */
2724 OP(dd,75) { _R++; EAX; WM( EA, _L );								} /* LD   (IX+o),L	  */
2725 OP(dd,76) { illegal_1(); op_76();									}		  /* DB   DD		  */
2726 OP(dd,77) { _R++; EAX; WM( EA, _A );								} /* LD   (IX+o),A	  */
2727 
2728 OP(dd,78) { illegal_1(); op_78();									} /* DB   DD		  */
2729 OP(dd,79) { illegal_1(); op_79();									} /* DB   DD		  */
2730 OP(dd,7a) { illegal_1(); op_7a();									} /* DB   DD		  */
2731 OP(dd,7b) { illegal_1(); op_7b();									} /* DB   DD		  */
2732 OP(dd,7c) { _R++; _A = _HX;											} /* LD   A,HX		  */
2733 OP(dd,7d) { _R++; _A = _LX;											} /* LD   A,LX		  */
2734 OP(dd,7e) { _R++; EAX; _A = RM(EA);									} /* LD   A,(IX+o)	  */
2735 OP(dd,7f) { illegal_1(); op_7f();									} /* DB   DD		  */
2736 
2737 OP(dd,80) { illegal_1(); op_80();									} /* DB   DD		  */
2738 OP(dd,81) { illegal_1(); op_81();									} /* DB   DD		  */
2739 OP(dd,82) { illegal_1(); op_82();									} /* DB   DD		  */
2740 OP(dd,83) { illegal_1(); op_83();									} /* DB   DD		  */
2741 OP(dd,84) { _R++; ADD(_HX);											} /* ADD  A,HX		  */
2742 OP(dd,85) { _R++; ADD(_LX);											} /* ADD  A,LX		  */
2743 OP(dd,86) { _R++; EAX; ADD(RM(EA));									} /* ADD  A,(IX+o)	  */
2744 OP(dd,87) { illegal_1(); op_87();									} /* DB   DD		  */
2745 
2746 OP(dd,88) { illegal_1(); op_88();									} /* DB   DD		  */
2747 OP(dd,89) { illegal_1(); op_89();									} /* DB   DD		  */
2748 OP(dd,8a) { illegal_1(); op_8a();									} /* DB   DD		  */
2749 OP(dd,8b) { illegal_1(); op_8b();									} /* DB   DD		  */
2750 OP(dd,8c) { _R++; ADC(_HX);											} /* ADC  A,HX		  */
2751 OP(dd,8d) { _R++; ADC(_LX);											} /* ADC  A,LX		  */
2752 OP(dd,8e) { _R++; EAX; ADC(RM(EA));									} /* ADC  A,(IX+o)	  */
2753 OP(dd,8f) { illegal_1(); op_8f();									} /* DB   DD		  */
2754 
2755 OP(dd,90) { illegal_1(); op_90();									} /* DB   DD		  */
2756 OP(dd,91) { illegal_1(); op_91();									} /* DB   DD		  */
2757 OP(dd,92) { illegal_1(); op_92();									} /* DB   DD		  */
2758 OP(dd,93) { illegal_1(); op_93();									} /* DB   DD		  */
2759 OP(dd,94) { _R++; SUB(_HX);											} /* SUB  HX		  */
2760 OP(dd,95) { _R++; SUB(_LX);											} /* SUB  LX		  */
2761 OP(dd,96) { _R++; EAX; SUB(RM(EA));									} /* SUB  (IX+o)	  */
2762 OP(dd,97) { illegal_1(); op_97();									} /* DB   DD		  */
2763 
2764 OP(dd,98) { illegal_1(); op_98();									} /* DB   DD		  */
2765 OP(dd,99) { illegal_1(); op_99();									} /* DB   DD		  */
2766 OP(dd,9a) { illegal_1(); op_9a();									} /* DB   DD		  */
2767 OP(dd,9b) { illegal_1(); op_9b();									} /* DB   DD		  */
2768 OP(dd,9c) { _R++; SBC(_HX);											} /* SBC  A,HX		  */
2769 OP(dd,9d) { _R++; SBC(_LX);											} /* SBC  A,LX		  */
2770 OP(dd,9e) { _R++; EAX; SBC(RM(EA));									} /* SBC  A,(IX+o)	  */
2771 OP(dd,9f) { illegal_1(); op_9f();									} /* DB   DD		  */
2772 
OP(dd,a0)2773 OP(dd,a0) { illegal_1(); op_a0();									} /* DB   DD		  */
OP(dd,a1)2774 OP(dd,a1) { illegal_1(); op_a1();									} /* DB   DD		  */
OP(dd,a2)2775 OP(dd,a2) { illegal_1(); op_a2();									} /* DB   DD		  */
OP(dd,a3)2776 OP(dd,a3) { illegal_1(); op_a3();									} /* DB   DD		  */
OP(dd,a4)2777 OP(dd,a4) { _R++; AND(_HX);											} /* AND  HX		  */
OP(dd,a5)2778 OP(dd,a5) { _R++; AND(_LX);											} /* AND  LX		  */
OP(dd,a6)2779 OP(dd,a6) { _R++; EAX; AND(RM(EA));									} /* AND  (IX+o)	  */
OP(dd,a7)2780 OP(dd,a7) { illegal_1(); op_a7();									} /* DB   DD		  */
2781 
OP(dd,a8)2782 OP(dd,a8) { illegal_1(); op_a8();									} /* DB   DD		  */
OP(dd,a9)2783 OP(dd,a9) { illegal_1(); op_a9();									} /* DB   DD		  */
OP(dd,aa)2784 OP(dd,aa) { illegal_1(); op_aa();									} /* DB   DD		  */
OP(dd,ab)2785 OP(dd,ab) { illegal_1(); op_ab();									} /* DB   DD		  */
OP(dd,ac)2786 OP(dd,ac) { _R++; XOR(_HX);											} /* XOR  HX		  */
OP(dd,ad)2787 OP(dd,ad) { _R++; XOR(_LX);											} /* XOR  LX		  */
OP(dd,ae)2788 OP(dd,ae) { _R++; EAX; XOR(RM(EA));									} /* XOR  (IX+o)	  */
OP(dd,af)2789 OP(dd,af) { illegal_1(); op_af();									} /* DB   DD		  */
2790 
OP(dd,b0)2791 OP(dd,b0) { illegal_1(); op_b0();									} /* DB   DD		  */
OP(dd,b1)2792 OP(dd,b1) { illegal_1(); op_b1();									} /* DB   DD		  */
OP(dd,b2)2793 OP(dd,b2) { illegal_1(); op_b2();									} /* DB   DD		  */
OP(dd,b3)2794 OP(dd,b3) { illegal_1(); op_b3();									} /* DB   DD		  */
OP(dd,b4)2795 OP(dd,b4) { _R++; OR(_HX);											} /* OR   HX		  */
OP(dd,b5)2796 OP(dd,b5) { _R++; OR(_LX);											} /* OR   LX		  */
OP(dd,b6)2797 OP(dd,b6) { _R++; EAX; OR(RM(EA));									} /* OR   (IX+o)	  */
OP(dd,b7)2798 OP(dd,b7) { illegal_1(); op_b7();									} /* DB   DD		  */
2799 
OP(dd,b8)2800 OP(dd,b8) { illegal_1(); op_b8();									} /* DB   DD		  */
OP(dd,b9)2801 OP(dd,b9) { illegal_1(); op_b9();									} /* DB   DD		  */
OP(dd,ba)2802 OP(dd,ba) { illegal_1(); op_ba();									} /* DB   DD		  */
OP(dd,bb)2803 OP(dd,bb) { illegal_1(); op_bb();									} /* DB   DD		  */
OP(dd,bc)2804 OP(dd,bc) { _R++; CP(_HX);											} /* CP   HX		  */
OP(dd,bd)2805 OP(dd,bd) { _R++; CP(_LX);											} /* CP   LX		  */
OP(dd,be)2806 OP(dd,be) { _R++; EAX; CP(RM(EA));									} /* CP   (IX+o)	  */
OP(dd,bf)2807 OP(dd,bf) { illegal_1(); op_bf();									} /* DB   DD		  */
2808 
OP(dd,c0)2809 OP(dd,c0) { illegal_1(); op_c0();									} /* DB   DD		  */
OP(dd,c1)2810 OP(dd,c1) { illegal_1(); op_c1();									} /* DB   DD		  */
OP(dd,c2)2811 OP(dd,c2) { illegal_1(); op_c2();									} /* DB   DD		  */
OP(dd,c3)2812 OP(dd,c3) { illegal_1(); op_c3();									} /* DB   DD		  */
OP(dd,c4)2813 OP(dd,c4) { illegal_1(); op_c4();									} /* DB   DD		  */
OP(dd,c5)2814 OP(dd,c5) { illegal_1(); op_c5();									} /* DB   DD		  */
OP(dd,c6)2815 OP(dd,c6) { illegal_1(); op_c6();									} /* DB   DD		  */
OP(dd,c7)2816 OP(dd,c7) { illegal_1(); op_c7();									}		  /* DB   DD		  */
2817 
OP(dd,c8)2818 OP(dd,c8) { illegal_1(); op_c8();									} /* DB   DD		  */
OP(dd,c9)2819 OP(dd,c9) { illegal_1(); op_c9();									} /* DB   DD		  */
OP(dd,ca)2820 OP(dd,ca) { illegal_1(); op_ca();									} /* DB   DD		  */
OP(dd,cb)2821 OP(dd,cb) { _R++; EAX; EXEC(xycb,ARG());							} /* **   DD CB xx	  */
OP(dd,cc)2822 OP(dd,cc) { illegal_1(); op_cc();									} /* DB   DD		  */
OP(dd,cd)2823 OP(dd,cd) { illegal_1(); op_cd();									} /* DB   DD		  */
OP(dd,ce)2824 OP(dd,ce) { illegal_1(); op_ce();									} /* DB   DD		  */
OP(dd,cf)2825 OP(dd,cf) { illegal_1(); op_cf();									} /* DB   DD		  */
2826 
OP(dd,d0)2827 OP(dd,d0) { illegal_1(); op_d0();									} /* DB   DD		  */
OP(dd,d1)2828 OP(dd,d1) { illegal_1(); op_d1();									} /* DB   DD		  */
OP(dd,d2)2829 OP(dd,d2) { illegal_1(); op_d2();									} /* DB   DD		  */
OP(dd,d3)2830 OP(dd,d3) { illegal_1(); op_d3();									} /* DB   DD		  */
OP(dd,d4)2831 OP(dd,d4) { illegal_1(); op_d4();									} /* DB   DD		  */
OP(dd,d5)2832 OP(dd,d5) { illegal_1(); op_d5();									} /* DB   DD		  */
OP(dd,d6)2833 OP(dd,d6) { illegal_1(); op_d6();									} /* DB   DD		  */
OP(dd,d7)2834 OP(dd,d7) { illegal_1(); op_d7();									} /* DB   DD		  */
2835 
OP(dd,d8)2836 OP(dd,d8) { illegal_1(); op_d8();									} /* DB   DD		  */
OP(dd,d9)2837 OP(dd,d9) { illegal_1(); op_d9();									} /* DB   DD		  */
OP(dd,da)2838 OP(dd,da) { illegal_1(); op_da();									} /* DB   DD		  */
OP(dd,db)2839 OP(dd,db) { illegal_1(); op_db();									} /* DB   DD		  */
OP(dd,dc)2840 OP(dd,dc) { illegal_1(); op_dc();									} /* DB   DD		  */
OP(dd,dd)2841 OP(dd,dd) { illegal_1(); op_dd();									} /* DB   DD		  */
OP(dd,de)2842 OP(dd,de) { illegal_1(); op_de();									} /* DB   DD		  */
OP(dd,df)2843 OP(dd,df) { illegal_1(); op_df();									} /* DB   DD		  */
2844 
OP(dd,e0)2845 OP(dd,e0) { illegal_1(); op_e0();									} /* DB   DD		  */
OP(dd,e1)2846 OP(dd,e1) { _R++; POP(IX);											} /* POP  IX		  */
OP(dd,e2)2847 OP(dd,e2) { illegal_1(); op_e2();									} /* DB   DD		  */
OP(dd,e3)2848 OP(dd,e3) { _R++; EXSP(IX);											} /* EX   (SP),IX	  */
OP(dd,e4)2849 OP(dd,e4) { illegal_1(); op_e4();									} /* DB   DD		  */
OP(dd,e5)2850 OP(dd,e5) { _R++; PUSH( IX );										} /* PUSH IX		  */
OP(dd,e6)2851 OP(dd,e6) { illegal_1(); op_e6();									} /* DB   DD		  */
OP(dd,e7)2852 OP(dd,e7) { illegal_1(); op_e7();									} /* DB   DD		  */
2853 
OP(dd,e8)2854 OP(dd,e8) { illegal_1(); op_e8();									} /* DB   DD		  */
OP(dd,e9)2855 OP(dd,e9) { _R++; _PC = _IX; change_pc16(_PCD);						} /* JP   (IX)		  */
OP(dd,ea)2856 OP(dd,ea) { illegal_1(); op_ea();									} /* DB   DD		  */
OP(dd,eb)2857 OP(dd,eb) { illegal_1(); op_eb();									} /* DB   DD		  */
OP(dd,ec)2858 OP(dd,ec) { illegal_1(); op_ec();									} /* DB   DD		  */
OP(dd,ed)2859 OP(dd,ed) { illegal_1(); op_ed();									} /* DB   DD		  */
OP(dd,ee)2860 OP(dd,ee) { illegal_1(); op_ee();									} /* DB   DD		  */
OP(dd,ef)2861 OP(dd,ef) { illegal_1(); op_ef();									} /* DB   DD		  */
2862 
OP(dd,f0)2863 OP(dd,f0) { illegal_1(); op_f0();									} /* DB   DD		  */
OP(dd,f1)2864 OP(dd,f1) { illegal_1(); op_f1();									} /* DB   DD		  */
OP(dd,f2)2865 OP(dd,f2) { illegal_1(); op_f2();									} /* DB   DD		  */
OP(dd,f3)2866 OP(dd,f3) { illegal_1(); op_f3();									} /* DB   DD		  */
OP(dd,f4)2867 OP(dd,f4) { illegal_1(); op_f4();									} /* DB   DD		  */
OP(dd,f5)2868 OP(dd,f5) { illegal_1(); op_f5();									} /* DB   DD		  */
OP(dd,f6)2869 OP(dd,f6) { illegal_1(); op_f6();									} /* DB   DD		  */
OP(dd,f7)2870 OP(dd,f7) { illegal_1(); op_f7();									} /* DB   DD		  */
2871 
OP(dd,f8)2872 OP(dd,f8) { illegal_1(); op_f8();									} /* DB   DD		  */
OP(dd,f9)2873 OP(dd,f9) { _R++; _SP = _IX;										} /* LD   SP,IX		  */
OP(dd,fa)2874 OP(dd,fa) { illegal_1(); op_fa();									} /* DB   DD		  */
OP(dd,fb)2875 OP(dd,fb) { illegal_1(); op_fb();									} /* DB   DD		  */
OP(dd,fc)2876 OP(dd,fc) { illegal_1(); op_fc();									} /* DB   DD		  */
OP(dd,fd)2877 OP(dd,fd) { illegal_1(); op_fd();									} /* DB   DD		  */
OP(dd,fe)2878 OP(dd,fe) { illegal_1(); op_fe();									} /* DB   DD		  */
OP(dd,ff)2879 OP(dd,ff) { illegal_1(); op_ff();									} /* DB   DD		  */
2880 
2881 /**********************************************************
2882  * IY register related opcodes (FD prefix)
2883  **********************************************************/
2884 OP(fd,00) { illegal_1(); op_00();									} /* DB   FD		  */
2885 OP(fd,01) { illegal_1(); op_01();									} /* DB   FD		  */
2886 OP(fd,02) { illegal_1(); op_02();									} /* DB   FD		  */
2887 OP(fd,03) { illegal_1(); op_03();									} /* DB   FD		  */
2888 OP(fd,04) { illegal_1(); op_04();									} /* DB   FD		  */
2889 OP(fd,05) { illegal_1(); op_05();									} /* DB   FD		  */
2890 OP(fd,06) { illegal_1(); op_06();									} /* DB   FD		  */
2891 OP(fd,07) { illegal_1(); op_07();									} /* DB   FD		  */
2892 
2893 OP(fd,08) { illegal_1(); op_08();									} /* DB   FD		  */
2894 OP(fd,09) { _R++; ADD16(IY,BC);										} /* ADD  IY,BC		  */
2895 OP(fd,0a) { illegal_1(); op_0a();									} /* DB   FD		  */
2896 OP(fd,0b) { illegal_1(); op_0b();									} /* DB   FD		  */
2897 OP(fd,0c) { illegal_1(); op_0c();									} /* DB   FD		  */
2898 OP(fd,0d) { illegal_1(); op_0d();									} /* DB   FD		  */
2899 OP(fd,0e) { illegal_1(); op_0e();									} /* DB   FD		  */
2900 OP(fd,0f) { illegal_1(); op_0f();									} /* DB   FD		  */
2901 
2902 OP(fd,10) { illegal_1(); op_10();									} /* DB   FD		  */
2903 OP(fd,11) { illegal_1(); op_11();									} /* DB   FD		  */
2904 OP(fd,12) { illegal_1(); op_12();									} /* DB   FD		  */
2905 OP(fd,13) { illegal_1(); op_13();									} /* DB   FD		  */
2906 OP(fd,14) { illegal_1(); op_14();									} /* DB   FD		  */
2907 OP(fd,15) { illegal_1(); op_15();									} /* DB   FD		  */
2908 OP(fd,16) { illegal_1(); op_16();									} /* DB   FD		  */
2909 OP(fd,17) { illegal_1(); op_17();									} /* DB   FD		  */
2910 
2911 OP(fd,18) { illegal_1(); op_18();									} /* DB   FD		  */
2912 OP(fd,19) { _R++; ADD16(IY,DE);										} /* ADD  IY,DE		  */
2913 OP(fd,1a) { illegal_1(); op_1a();									} /* DB   FD		  */
2914 OP(fd,1b) { illegal_1(); op_1b();									} /* DB   FD		  */
2915 OP(fd,1c) { illegal_1(); op_1c();									} /* DB   FD		  */
2916 OP(fd,1d) { illegal_1(); op_1d();									} /* DB   FD		  */
2917 OP(fd,1e) { illegal_1(); op_1e();									} /* DB   FD		  */
2918 OP(fd,1f) { illegal_1(); op_1f();									} /* DB   FD		  */
2919 
2920 OP(fd,20) { illegal_1(); op_20();									} /* DB   FD		  */
2921 OP(fd,21) { _R++; _IY = ARG16();									} /* LD   IY,w		  */
2922 OP(fd,22) { _R++; EA = ARG16(); WM16( EA, &Z80.IY );				} /* LD   (w),IY	  */
2923 OP(fd,23) { _R++; _IY++;											} /* INC  IY		  */
2924 OP(fd,24) { _R++; _HY = INC(_HY);									} /* INC  HY		  */
2925 OP(fd,25) { _R++; _HY = DEC(_HY);									} /* DEC  HY		  */
2926 OP(fd,26) { _R++; _HY = ARG();										} /* LD   HY,n		  */
2927 OP(fd,27) { illegal_1(); op_27();									} /* DB   FD		  */
2928 
2929 OP(fd,28) { illegal_1(); op_28();									} /* DB   FD		  */
2930 OP(fd,29) { _R++; ADD16(IY,IY);										} /* ADD  IY,IY		  */
2931 OP(fd,2a) { _R++; EA = ARG16(); RM16( EA, &Z80.IY );				} /* LD   IY,(w)	  */
2932 OP(fd,2b) { _R++; _IY--;											} /* DEC  IY		  */
2933 OP(fd,2c) { _R++; _LY = INC(_LY);									} /* INC  LY		  */
2934 OP(fd,2d) { _R++; _LY = DEC(_LY);									} /* DEC  LY		  */
2935 OP(fd,2e) { _R++; _LY = ARG();										} /* LD   LY,n		  */
2936 OP(fd,2f) { illegal_1(); op_2f();									} /* DB   FD		  */
2937 
2938 OP(fd,30) { illegal_1(); op_30();									} /* DB   FD		  */
2939 OP(fd,31) { illegal_1(); op_31();									} /* DB   FD		  */
2940 OP(fd,32) { illegal_1(); op_32();									} /* DB   FD		  */
2941 OP(fd,33) { illegal_1(); op_33();									} /* DB   FD		  */
2942 OP(fd,34) { _R++; EAY; WM( EA, INC(RM(EA)) );						} /* INC  (IY+o)	  */
2943 OP(fd,35) { _R++; EAY; WM( EA, DEC(RM(EA)) );						} /* DEC  (IY+o)	  */
2944 OP(fd,36) { _R++; EAY; WM( EA, ARG() );								} /* LD   (IY+o),n	  */
2945 OP(fd,37) { illegal_1(); op_37();									} /* DB   FD		  */
2946 
2947 OP(fd,38) { illegal_1(); op_38();									} /* DB   FD		  */
2948 OP(fd,39) { _R++; ADD16(IY,SP);										} /* ADD  IY,SP		  */
2949 OP(fd,3a) { illegal_1(); op_3a();									} /* DB   FD		  */
2950 OP(fd,3b) { illegal_1(); op_3b();									} /* DB   FD		  */
2951 OP(fd,3c) { illegal_1(); op_3c();									} /* DB   FD		  */
2952 OP(fd,3d) { illegal_1(); op_3d();									} /* DB   FD		  */
2953 OP(fd,3e) { illegal_1(); op_3e();									} /* DB   FD		  */
2954 OP(fd,3f) { illegal_1(); op_3f();									} /* DB   FD		  */
2955 
2956 OP(fd,40) { illegal_1(); op_40();									} /* DB   FD		  */
2957 OP(fd,41) { illegal_1(); op_41();									} /* DB   FD		  */
2958 OP(fd,42) { illegal_1(); op_42();									} /* DB   FD		  */
2959 OP(fd,43) { illegal_1(); op_43();									} /* DB   FD		  */
2960 OP(fd,44) { _R++; _B = _HY;											} /* LD   B,HY		  */
2961 OP(fd,45) { _R++; _B = _LY;											} /* LD   B,LY		  */
2962 OP(fd,46) { _R++; EAY; _B = RM(EA);									} /* LD   B,(IY+o)	  */
2963 OP(fd,47) { illegal_1(); op_47();									} /* DB   FD		  */
2964 
2965 OP(fd,48) { illegal_1(); op_48();									} /* DB   FD		  */
2966 OP(fd,49) { illegal_1(); op_49();									} /* DB   FD		  */
2967 OP(fd,4a) { illegal_1(); op_4a();									} /* DB   FD		  */
2968 OP(fd,4b) { illegal_1(); op_4b();									} /* DB   FD		  */
2969 OP(fd,4c) { _R++; _C = _HY;											} /* LD   C,HY		  */
2970 OP(fd,4d) { _R++; _C = _LY;											} /* LD   C,LY		  */
2971 OP(fd,4e) { _R++; EAY; _C = RM(EA);									} /* LD   C,(IY+o)	  */
2972 OP(fd,4f) { illegal_1(); op_4f();									} /* DB   FD		  */
2973 
2974 OP(fd,50) { illegal_1(); op_50();									} /* DB   FD		  */
2975 OP(fd,51) { illegal_1(); op_51();									} /* DB   FD		  */
2976 OP(fd,52) { illegal_1(); op_52();									} /* DB   FD		  */
2977 OP(fd,53) { illegal_1(); op_53();									} /* DB   FD		  */
2978 OP(fd,54) { _R++; _D = _HY;											} /* LD   D,HY		  */
2979 OP(fd,55) { _R++; _D = _LY;											} /* LD   D,LY		  */
2980 OP(fd,56) { _R++; EAY; _D = RM(EA);									} /* LD   D,(IY+o)	  */
2981 OP(fd,57) { illegal_1(); op_57();									} /* DB   FD		  */
2982 
2983 OP(fd,58) { illegal_1(); op_58();									} /* DB   FD		  */
2984 OP(fd,59) { illegal_1(); op_59();									} /* DB   FD		  */
2985 OP(fd,5a) { illegal_1(); op_5a();									} /* DB   FD		  */
2986 OP(fd,5b) { illegal_1(); op_5b();									} /* DB   FD		  */
2987 OP(fd,5c) { _R++; _E = _HY;											} /* LD   E,HY		  */
2988 OP(fd,5d) { _R++; _E = _LY;											} /* LD   E,LY		  */
2989 OP(fd,5e) { _R++; EAY; _E = RM(EA);									} /* LD   E,(IY+o)	  */
2990 OP(fd,5f) { illegal_1(); op_5f();									} /* DB   FD		  */
2991 
2992 OP(fd,60) { _R++; _HY = _B;											} /* LD   HY,B		  */
2993 OP(fd,61) { _R++; _HY = _C;											} /* LD   HY,C		  */
2994 OP(fd,62) { _R++; _HY = _D;											} /* LD   HY,D		  */
2995 OP(fd,63) { _R++; _HY = _E;											} /* LD   HY,E		  */
2996 OP(fd,64) { _R++;													} /* LD   HY,HY		  */
2997 OP(fd,65) { _R++; _HY = _LY;										} /* LD   HY,LY		  */
2998 OP(fd,66) { _R++; EAY; _H = RM(EA);									} /* LD   H,(IY+o)	  */
2999 OP(fd,67) { _R++; _HY = _A;											} /* LD   HY,A		  */
3000 
3001 OP(fd,68) { _R++; _LY = _B;											} /* LD   LY,B		  */
3002 OP(fd,69) { _R++; _LY = _C;											} /* LD   LY,C		  */
3003 OP(fd,6a) { _R++; _LY = _D;											} /* LD   LY,D		  */
3004 OP(fd,6b) { _R++; _LY = _E;											} /* LD   LY,E		  */
3005 OP(fd,6c) { _R++; _LY = _HY;										} /* LD   LY,HY		  */
3006 OP(fd,6d) { _R++;													} /* LD   LY,LY		  */
3007 OP(fd,6e) { _R++; EAY; _L = RM(EA);									} /* LD   L,(IY+o)	  */
3008 OP(fd,6f) { _R++; _LY = _A;											} /* LD   LY,A		  */
3009 
3010 OP(fd,70) { _R++; EAY; WM( EA, _B );								} /* LD   (IY+o),B	  */
3011 OP(fd,71) { _R++; EAY; WM( EA, _C );								} /* LD   (IY+o),C	  */
3012 OP(fd,72) { _R++; EAY; WM( EA, _D );								} /* LD   (IY+o),D	  */
3013 OP(fd,73) { _R++; EAY; WM( EA, _E );								} /* LD   (IY+o),E	  */
3014 OP(fd,74) { _R++; EAY; WM( EA, _H );								} /* LD   (IY+o),H	  */
3015 OP(fd,75) { _R++; EAY; WM( EA, _L );								} /* LD   (IY+o),L	  */
3016 OP(fd,76) { illegal_1(); op_76();									}		  /* DB   FD		  */
3017 OP(fd,77) { _R++; EAY; WM( EA, _A );								} /* LD   (IY+o),A	  */
3018 
3019 OP(fd,78) { illegal_1(); op_78();									} /* DB   FD		  */
3020 OP(fd,79) { illegal_1(); op_79();									} /* DB   FD		  */
3021 OP(fd,7a) { illegal_1(); op_7a();									} /* DB   FD		  */
3022 OP(fd,7b) { illegal_1(); op_7b();									} /* DB   FD		  */
3023 OP(fd,7c) { _R++; _A = _HY;											} /* LD   A,HY		  */
3024 OP(fd,7d) { _R++; _A = _LY;											} /* LD   A,LY		  */
3025 OP(fd,7e) { _R++; EAY; _A = RM(EA);									} /* LD   A,(IY+o)	  */
3026 OP(fd,7f) { illegal_1(); op_7f();									} /* DB   FD		  */
3027 
3028 OP(fd,80) { illegal_1(); op_80();									} /* DB   FD		  */
3029 OP(fd,81) { illegal_1(); op_81();									} /* DB   FD		  */
3030 OP(fd,82) { illegal_1(); op_82();									} /* DB   FD		  */
3031 OP(fd,83) { illegal_1(); op_83();									} /* DB   FD		  */
3032 OP(fd,84) { _R++; ADD(_HY);											} /* ADD  A,HY		  */
3033 OP(fd,85) { _R++; ADD(_LY);											} /* ADD  A,LY		  */
3034 OP(fd,86) { _R++; EAY; ADD(RM(EA));									} /* ADD  A,(IY+o)	  */
3035 OP(fd,87) { illegal_1(); op_87();									} /* DB   FD		  */
3036 
3037 OP(fd,88) { illegal_1(); op_88();									} /* DB   FD		  */
3038 OP(fd,89) { illegal_1(); op_89();									} /* DB   FD		  */
3039 OP(fd,8a) { illegal_1(); op_8a();									} /* DB   FD		  */
3040 OP(fd,8b) { illegal_1(); op_8b();									} /* DB   FD		  */
3041 OP(fd,8c) { _R++; ADC(_HY);											} /* ADC  A,HY		  */
3042 OP(fd,8d) { _R++; ADC(_LY);											} /* ADC  A,LY		  */
3043 OP(fd,8e) { _R++; EAY; ADC(RM(EA));									} /* ADC  A,(IY+o)	  */
3044 OP(fd,8f) { illegal_1(); op_8f();									} /* DB   FD		  */
3045 
3046 OP(fd,90) { illegal_1(); op_90();									} /* DB   FD		  */
3047 OP(fd,91) { illegal_1(); op_91();									} /* DB   FD		  */
3048 OP(fd,92) { illegal_1(); op_92();									} /* DB   FD		  */
3049 OP(fd,93) { illegal_1(); op_93();									} /* DB   FD		  */
3050 OP(fd,94) { _R++; SUB(_HY);											} /* SUB  HY		  */
3051 OP(fd,95) { _R++; SUB(_LY);											} /* SUB  LY		  */
3052 OP(fd,96) { _R++; EAY; SUB(RM(EA));									} /* SUB  (IY+o)	  */
3053 OP(fd,97) { illegal_1(); op_97();									} /* DB   FD		  */
3054 
3055 OP(fd,98) { illegal_1(); op_98();									} /* DB   FD		  */
3056 OP(fd,99) { illegal_1(); op_99();									} /* DB   FD		  */
3057 OP(fd,9a) { illegal_1(); op_9a();									} /* DB   FD		  */
3058 OP(fd,9b) { illegal_1(); op_9b();									} /* DB   FD		  */
3059 OP(fd,9c) { _R++; SBC(_HY);											} /* SBC  A,HY		  */
3060 OP(fd,9d) { _R++; SBC(_LY);											} /* SBC  A,LY		  */
3061 OP(fd,9e) { _R++; EAY; SBC(RM(EA));									} /* SBC  A,(IY+o)	  */
3062 OP(fd,9f) { illegal_1(); op_9f();									} /* DB   FD		  */
3063 
OP(fd,a0)3064 OP(fd,a0) { illegal_1(); op_a0();									} /* DB   FD		  */
OP(fd,a1)3065 OP(fd,a1) { illegal_1(); op_a1();									} /* DB   FD		  */
OP(fd,a2)3066 OP(fd,a2) { illegal_1(); op_a2();									} /* DB   FD		  */
OP(fd,a3)3067 OP(fd,a3) { illegal_1(); op_a3();									} /* DB   FD		  */
OP(fd,a4)3068 OP(fd,a4) { _R++; AND(_HY);											} /* AND  HY		  */
OP(fd,a5)3069 OP(fd,a5) { _R++; AND(_LY);											} /* AND  LY		  */
OP(fd,a6)3070 OP(fd,a6) { _R++; EAY; AND(RM(EA));									} /* AND  (IY+o)	  */
OP(fd,a7)3071 OP(fd,a7) { illegal_1(); op_a7();									} /* DB   FD		  */
3072 
OP(fd,a8)3073 OP(fd,a8) { illegal_1(); op_a8();									} /* DB   FD		  */
OP(fd,a9)3074 OP(fd,a9) { illegal_1(); op_a9();									} /* DB   FD		  */
OP(fd,aa)3075 OP(fd,aa) { illegal_1(); op_aa();									} /* DB   FD		  */
OP(fd,ab)3076 OP(fd,ab) { illegal_1(); op_ab();									} /* DB   FD		  */
OP(fd,ac)3077 OP(fd,ac) { _R++; XOR(_HY);											} /* XOR  HY		  */
OP(fd,ad)3078 OP(fd,ad) { _R++; XOR(_LY);											} /* XOR  LY		  */
OP(fd,ae)3079 OP(fd,ae) { _R++; EAY; XOR(RM(EA));									} /* XOR  (IY+o)	  */
OP(fd,af)3080 OP(fd,af) { illegal_1(); op_af();									} /* DB   FD		  */
3081 
OP(fd,b0)3082 OP(fd,b0) { illegal_1(); op_b0();									} /* DB   FD		  */
OP(fd,b1)3083 OP(fd,b1) { illegal_1(); op_b1();									} /* DB   FD		  */
OP(fd,b2)3084 OP(fd,b2) { illegal_1(); op_b2();									} /* DB   FD		  */
OP(fd,b3)3085 OP(fd,b3) { illegal_1(); op_b3();									} /* DB   FD		  */
OP(fd,b4)3086 OP(fd,b4) { _R++; OR(_HY);											} /* OR   HY		  */
OP(fd,b5)3087 OP(fd,b5) { _R++; OR(_LY);											} /* OR   LY		  */
OP(fd,b6)3088 OP(fd,b6) { _R++; EAY; OR(RM(EA));									} /* OR   (IY+o)	  */
OP(fd,b7)3089 OP(fd,b7) { illegal_1(); op_b7();									} /* DB   FD		  */
3090 
OP(fd,b8)3091 OP(fd,b8) { illegal_1(); op_b8();									} /* DB   FD		  */
OP(fd,b9)3092 OP(fd,b9) { illegal_1(); op_b9();									} /* DB   FD		  */
OP(fd,ba)3093 OP(fd,ba) { illegal_1(); op_ba();									} /* DB   FD		  */
OP(fd,bb)3094 OP(fd,bb) { illegal_1(); op_bb();									} /* DB   FD		  */
OP(fd,bc)3095 OP(fd,bc) { _R++; CP(_HY);											} /* CP   HY		  */
OP(fd,bd)3096 OP(fd,bd) { _R++; CP(_LY);											} /* CP   LY		  */
OP(fd,be)3097 OP(fd,be) { _R++; EAY; CP(RM(EA));									} /* CP   (IY+o)	  */
OP(fd,bf)3098 OP(fd,bf) { illegal_1(); op_bf();									} /* DB   FD		  */
3099 
OP(fd,c0)3100 OP(fd,c0) { illegal_1(); op_c0();									} /* DB   FD		  */
OP(fd,c1)3101 OP(fd,c1) { illegal_1(); op_c1();									} /* DB   FD		  */
OP(fd,c2)3102 OP(fd,c2) { illegal_1(); op_c2();									} /* DB   FD		  */
OP(fd,c3)3103 OP(fd,c3) { illegal_1(); op_c3();									} /* DB   FD		  */
OP(fd,c4)3104 OP(fd,c4) { illegal_1(); op_c4();									} /* DB   FD		  */
OP(fd,c5)3105 OP(fd,c5) { illegal_1(); op_c5();									} /* DB   FD		  */
OP(fd,c6)3106 OP(fd,c6) { illegal_1(); op_c6();									} /* DB   FD		  */
OP(fd,c7)3107 OP(fd,c7) { illegal_1(); op_c7();									} /* DB   FD		  */
3108 
OP(fd,c8)3109 OP(fd,c8) { illegal_1(); op_c8();									} /* DB   FD		  */
OP(fd,c9)3110 OP(fd,c9) { illegal_1(); op_c9();									} /* DB   FD		  */
OP(fd,ca)3111 OP(fd,ca) { illegal_1(); op_ca();									} /* DB   FD		  */
OP(fd,cb)3112 OP(fd,cb) { _R++; EAY; EXEC(xycb,ARG());							} /* **   FD CB xx	  */
OP(fd,cc)3113 OP(fd,cc) { illegal_1(); op_cc();									} /* DB   FD		  */
OP(fd,cd)3114 OP(fd,cd) { illegal_1(); op_cd();									} /* DB   FD		  */
OP(fd,ce)3115 OP(fd,ce) { illegal_1(); op_ce();									} /* DB   FD		  */
OP(fd,cf)3116 OP(fd,cf) { illegal_1(); op_cf();									} /* DB   FD		  */
3117 
OP(fd,d0)3118 OP(fd,d0) { illegal_1(); op_d0();									} /* DB   FD		  */
OP(fd,d1)3119 OP(fd,d1) { illegal_1(); op_d1();									} /* DB   FD		  */
OP(fd,d2)3120 OP(fd,d2) { illegal_1(); op_d2();									} /* DB   FD		  */
OP(fd,d3)3121 OP(fd,d3) { illegal_1(); op_d3();									} /* DB   FD		  */
OP(fd,d4)3122 OP(fd,d4) { illegal_1(); op_d4();									} /* DB   FD		  */
OP(fd,d5)3123 OP(fd,d5) { illegal_1(); op_d5();									} /* DB   FD		  */
OP(fd,d6)3124 OP(fd,d6) { illegal_1(); op_d6();									} /* DB   FD		  */
OP(fd,d7)3125 OP(fd,d7) { illegal_1(); op_d7();									} /* DB   FD		  */
3126 
OP(fd,d8)3127 OP(fd,d8) { illegal_1(); op_d8();									} /* DB   FD		  */
OP(fd,d9)3128 OP(fd,d9) { illegal_1(); op_d9();									} /* DB   FD		  */
OP(fd,da)3129 OP(fd,da) { illegal_1(); op_da();									} /* DB   FD		  */
OP(fd,db)3130 OP(fd,db) { illegal_1(); op_db();									} /* DB   FD		  */
OP(fd,dc)3131 OP(fd,dc) { illegal_1(); op_dc();									} /* DB   FD		  */
OP(fd,dd)3132 OP(fd,dd) { illegal_1(); op_dd();									} /* DB   FD		  */
OP(fd,de)3133 OP(fd,de) { illegal_1(); op_de();									} /* DB   FD		  */
OP(fd,df)3134 OP(fd,df) { illegal_1(); op_df();									} /* DB   FD		  */
3135 
OP(fd,e0)3136 OP(fd,e0) { illegal_1(); op_e0();									} /* DB   FD		  */
OP(fd,e1)3137 OP(fd,e1) { _R++; POP(IY);											} /* POP  IY		  */
OP(fd,e2)3138 OP(fd,e2) { illegal_1(); op_e2();									} /* DB   FD		  */
OP(fd,e3)3139 OP(fd,e3) { _R++; EXSP(IY);											} /* EX   (SP),IY	  */
OP(fd,e4)3140 OP(fd,e4) { illegal_1(); op_e4();									} /* DB   FD		  */
OP(fd,e5)3141 OP(fd,e5) { _R++; PUSH( IY );										} /* PUSH IY		  */
OP(fd,e6)3142 OP(fd,e6) { illegal_1(); op_e6();									} /* DB   FD		  */
OP(fd,e7)3143 OP(fd,e7) { illegal_1(); op_e7();									} /* DB   FD		  */
3144 
OP(fd,e8)3145 OP(fd,e8) { illegal_1(); op_e8();									} /* DB   FD		  */
OP(fd,e9)3146 OP(fd,e9) { _R++; _PC = _IY; change_pc16(_PCD);						} /* JP   (IY)		  */
OP(fd,ea)3147 OP(fd,ea) { illegal_1(); op_ea();									} /* DB   FD		  */
OP(fd,eb)3148 OP(fd,eb) { illegal_1(); op_eb();									} /* DB   FD		  */
OP(fd,ec)3149 OP(fd,ec) { illegal_1(); op_ec();									} /* DB   FD		  */
OP(fd,ed)3150 OP(fd,ed) { illegal_1(); op_ed();									} /* DB   FD		  */
OP(fd,ee)3151 OP(fd,ee) { illegal_1(); op_ee();									} /* DB   FD		  */
OP(fd,ef)3152 OP(fd,ef) { illegal_1(); op_ef();									} /* DB   FD		  */
3153 
OP(fd,f0)3154 OP(fd,f0) { illegal_1(); op_f0();									} /* DB   FD		  */
OP(fd,f1)3155 OP(fd,f1) { illegal_1(); op_f1();									} /* DB   FD		  */
OP(fd,f2)3156 OP(fd,f2) { illegal_1(); op_f2();									} /* DB   FD		  */
OP(fd,f3)3157 OP(fd,f3) { illegal_1(); op_f3();									} /* DB   FD		  */
OP(fd,f4)3158 OP(fd,f4) { illegal_1(); op_f4();									} /* DB   FD		  */
OP(fd,f5)3159 OP(fd,f5) { illegal_1(); op_f5();									} /* DB   FD		  */
OP(fd,f6)3160 OP(fd,f6) { illegal_1(); op_f6();									} /* DB   FD		  */
OP(fd,f7)3161 OP(fd,f7) { illegal_1(); op_f7();									} /* DB   FD		  */
3162 
OP(fd,f8)3163 OP(fd,f8) { illegal_1(); op_f8();									} /* DB   FD		  */
OP(fd,f9)3164 OP(fd,f9) { _R++; _SP = _IY;										} /* LD   SP,IY		  */
OP(fd,fa)3165 OP(fd,fa) { illegal_1(); op_fa();									} /* DB   FD		  */
OP(fd,fb)3166 OP(fd,fb) { illegal_1(); op_fb();									} /* DB   FD		  */
OP(fd,fc)3167 OP(fd,fc) { illegal_1(); op_fc();									} /* DB   FD		  */
OP(fd,fd)3168 OP(fd,fd) { illegal_1(); op_fd();									} /* DB   FD		  */
OP(fd,fe)3169 OP(fd,fe) { illegal_1(); op_fe();									} /* DB   FD		  */
OP(fd,ff)3170 OP(fd,ff) { illegal_1(); op_ff();									} /* DB   FD		  */
3171 
3172 OP(illegal,2)
3173 {
3174 	log_cb(RETRO_LOG_DEBUG, LOGPRE "Z80 #%d ill. opcode $ed $%02x\n",
3175 			cpu_getactivecpu(), cpu_readop((_PCD-1)&0xffff));
3176 }
3177 
3178 /**********************************************************
3179  * special opcodes (ED prefix)
3180  **********************************************************/
3181 OP(ed,00) { illegal_2();											} /* DB   ED		  */
3182 OP(ed,01) { illegal_2();											} /* DB   ED		  */
3183 OP(ed,02) { illegal_2();											} /* DB   ED		  */
3184 OP(ed,03) { illegal_2();											} /* DB   ED		  */
3185 OP(ed,04) { illegal_2();											} /* DB   ED		  */
3186 OP(ed,05) { illegal_2();											} /* DB   ED		  */
3187 OP(ed,06) { illegal_2();											} /* DB   ED		  */
3188 OP(ed,07) { illegal_2();											} /* DB   ED		  */
3189 
3190 OP(ed,08) { illegal_2();											} /* DB   ED		  */
3191 OP(ed,09) { illegal_2();											} /* DB   ED		  */
3192 OP(ed,0a) { illegal_2();											} /* DB   ED		  */
3193 OP(ed,0b) { illegal_2();											} /* DB   ED		  */
3194 OP(ed,0c) { illegal_2();											} /* DB   ED		  */
3195 OP(ed,0d) { illegal_2();											} /* DB   ED		  */
3196 OP(ed,0e) { illegal_2();											} /* DB   ED		  */
3197 OP(ed,0f) { illegal_2();											} /* DB   ED		  */
3198 
3199 OP(ed,10) { illegal_2();											} /* DB   ED		  */
3200 OP(ed,11) { illegal_2();											} /* DB   ED		  */
3201 OP(ed,12) { illegal_2();											} /* DB   ED		  */
3202 OP(ed,13) { illegal_2();											} /* DB   ED		  */
3203 OP(ed,14) { illegal_2();											} /* DB   ED		  */
3204 OP(ed,15) { illegal_2();											} /* DB   ED		  */
3205 OP(ed,16) { illegal_2();											} /* DB   ED		  */
3206 OP(ed,17) { illegal_2();											} /* DB   ED		  */
3207 
3208 OP(ed,18) { illegal_2();											} /* DB   ED		  */
3209 OP(ed,19) { illegal_2();											} /* DB   ED		  */
3210 OP(ed,1a) { illegal_2();											} /* DB   ED		  */
3211 OP(ed,1b) { illegal_2();											} /* DB   ED		  */
3212 OP(ed,1c) { illegal_2();											} /* DB   ED		  */
3213 OP(ed,1d) { illegal_2();											} /* DB   ED		  */
3214 OP(ed,1e) { illegal_2();											} /* DB   ED		  */
3215 OP(ed,1f) { illegal_2();											} /* DB   ED		  */
3216 
3217 OP(ed,20) { illegal_2();											} /* DB   ED		  */
3218 OP(ed,21) { illegal_2();											} /* DB   ED		  */
3219 OP(ed,22) { illegal_2();											} /* DB   ED		  */
3220 OP(ed,23) { illegal_2();											} /* DB   ED		  */
3221 OP(ed,24) { illegal_2();											} /* DB   ED		  */
3222 OP(ed,25) { illegal_2();											} /* DB   ED		  */
3223 OP(ed,26) { illegal_2();											} /* DB   ED		  */
3224 OP(ed,27) { illegal_2();											} /* DB   ED		  */
3225 
3226 OP(ed,28) { illegal_2();											} /* DB   ED		  */
3227 OP(ed,29) { illegal_2();											} /* DB   ED		  */
3228 OP(ed,2a) { illegal_2();											} /* DB   ED		  */
3229 OP(ed,2b) { illegal_2();											} /* DB   ED		  */
3230 OP(ed,2c) { illegal_2();											} /* DB   ED		  */
3231 OP(ed,2d) { illegal_2();											} /* DB   ED		  */
3232 OP(ed,2e) { illegal_2();											} /* DB   ED		  */
3233 OP(ed,2f) { illegal_2();											} /* DB   ED		  */
3234 
3235 OP(ed,30) { illegal_2();											} /* DB   ED		  */
3236 OP(ed,31) { illegal_2();											} /* DB   ED		  */
3237 OP(ed,32) { illegal_2();											} /* DB   ED		  */
3238 OP(ed,33) { illegal_2();											} /* DB   ED		  */
3239 OP(ed,34) { illegal_2();											} /* DB   ED		  */
3240 OP(ed,35) { illegal_2();											} /* DB   ED		  */
3241 OP(ed,36) { illegal_2();											} /* DB   ED		  */
3242 OP(ed,37) { illegal_2();											} /* DB   ED		  */
3243 
3244 OP(ed,38) { illegal_2();											} /* DB   ED		  */
3245 OP(ed,39) { illegal_2();											} /* DB   ED		  */
3246 OP(ed,3a) { illegal_2();											} /* DB   ED		  */
3247 OP(ed,3b) { illegal_2();											} /* DB   ED		  */
3248 OP(ed,3c) { illegal_2();											} /* DB   ED		  */
3249 OP(ed,3d) { illegal_2();											} /* DB   ED		  */
3250 OP(ed,3e) { illegal_2();											} /* DB   ED		  */
3251 OP(ed,3f) { illegal_2();											} /* DB   ED		  */
3252 
3253 OP(ed,40) { _B = IN(_BC); _F = (_F & CF) | SZP[_B];					} /* IN   B,(C)		  */
3254 OP(ed,41) { OUT(_BC,_B);											} /* OUT  (C),B		  */
3255 OP(ed,42) { SBC16( BC );											} /* SBC  HL,BC		  */
3256 OP(ed,43) { EA = ARG16(); WM16( EA, &Z80.BC );						} /* LD   (w),BC	  */
3257 OP(ed,44) { NEG;													} /* NEG			  */
3258 OP(ed,45) { RETN;													} /* RETN;			  */
3259 OP(ed,46) { _IM = 0;												} /* IM   0			  */
3260 OP(ed,47) { LD_I_A;													} /* LD   I,A		  */
3261 
3262 OP(ed,48) { _C = IN(_BC); _F = (_F & CF) | SZP[_C];					} /* IN   C,(C)		  */
3263 OP(ed,49) { OUT(_BC,_C);											} /* OUT  (C),C		  */
3264 OP(ed,4a) { ADC16( BC );											} /* ADC  HL,BC		  */
3265 OP(ed,4b) { EA = ARG16(); RM16( EA, &Z80.BC );						} /* LD   BC,(w)	  */
3266 OP(ed,4c) { NEG;													} /* NEG			  */
3267 OP(ed,4d) { RETI;													} /* RETI			  */
3268 OP(ed,4e) { _IM = 0;												} /* IM   0			  */
3269 OP(ed,4f) { LD_R_A;													} /* LD   R,A		  */
3270 
3271 OP(ed,50) { _D = IN(_BC); _F = (_F & CF) | SZP[_D];					} /* IN   D,(C)		  */
3272 OP(ed,51) { OUT(_BC,_D);											} /* OUT  (C),D		  */
3273 OP(ed,52) { SBC16( DE );											} /* SBC  HL,DE		  */
3274 OP(ed,53) { EA = ARG16(); WM16( EA, &Z80.DE );						} /* LD   (w),DE	  */
3275 OP(ed,54) { NEG;													} /* NEG			  */
3276 OP(ed,55) { RETN;													} /* RETN;			  */
3277 OP(ed,56) { _IM = 1;												} /* IM   1			  */
3278 OP(ed,57) { LD_A_I;													} /* LD   A,I		  */
3279 
3280 OP(ed,58) { _E = IN(_BC); _F = (_F & CF) | SZP[_E];					} /* IN   E,(C)		  */
3281 OP(ed,59) { OUT(_BC,_E);											} /* OUT  (C),E		  */
3282 OP(ed,5a) { ADC16( DE );											} /* ADC  HL,DE		  */
3283 OP(ed,5b) { EA = ARG16(); RM16( EA, &Z80.DE );						} /* LD   DE,(w)	  */
3284 OP(ed,5c) { NEG;													} /* NEG			  */
3285 OP(ed,5d) { RETI;													} /* RETI			  */
3286 OP(ed,5e) { _IM = 2;												} /* IM   2			  */
3287 OP(ed,5f) { LD_A_R;													} /* LD   A,R		  */
3288 
3289 OP(ed,60) { _H = IN(_BC); _F = (_F & CF) | SZP[_H];					} /* IN   H,(C)		  */
3290 OP(ed,61) { OUT(_BC,_H);											} /* OUT  (C),H		  */
3291 OP(ed,62) { SBC16( HL );											} /* SBC  HL,HL		  */
3292 OP(ed,63) { EA = ARG16(); WM16( EA, &Z80.HL );						} /* LD   (w),HL	  */
3293 OP(ed,64) { NEG;													} /* NEG			  */
3294 OP(ed,65) { RETN;													} /* RETN;			  */
3295 OP(ed,66) { _IM = 0;												} /* IM   0			  */
3296 OP(ed,67) { RRD;													} /* RRD  (HL)		  */
3297 
3298 OP(ed,68) { _L = IN(_BC); _F = (_F & CF) | SZP[_L];					} /* IN   L,(C)		  */
3299 OP(ed,69) { OUT(_BC,_L);											} /* OUT  (C),L		  */
3300 OP(ed,6a) { ADC16( HL );											} /* ADC  HL,HL		  */
3301 OP(ed,6b) { EA = ARG16(); RM16( EA, &Z80.HL );						} /* LD   HL,(w)	  */
3302 OP(ed,6c) { NEG;													} /* NEG			  */
3303 OP(ed,6d) { RETI;													} /* RETI			  */
3304 OP(ed,6e) { _IM = 0;												} /* IM   0			  */
3305 OP(ed,6f) { RLD;													} /* RLD  (HL)		  */
3306 
3307 OP(ed,70) { UINT8 res = IN(_BC); _F = (_F & CF) | SZP[res];			} /* IN   0,(C)		  */
3308 OP(ed,71) { OUT(_BC,0);												} /* OUT  (C),0		  */
3309 OP(ed,72) { SBC16( SP );											} /* SBC  HL,SP		  */
3310 OP(ed,73) { EA = ARG16(); WM16( EA, &Z80.SP );						} /* LD   (w),SP	  */
3311 OP(ed,74) { NEG;													} /* NEG			  */
3312 OP(ed,75) { RETN;													} /* RETN;			  */
3313 OP(ed,76) { _IM = 1;												} /* IM   1			  */
3314 OP(ed,77) { illegal_2();											} /* DB   ED,77		  */
3315 
3316 OP(ed,78) { _A = IN(_BC); _F = (_F & CF) | SZP[_A];					} /* IN   E,(C)		  */
3317 OP(ed,79) { OUT(_BC,_A);											} /* OUT  (C),E		  */
3318 OP(ed,7a) { ADC16( SP );											} /* ADC  HL,SP		  */
3319 OP(ed,7b) { EA = ARG16(); RM16( EA, &Z80.SP );						} /* LD   SP,(w)	  */
3320 OP(ed,7c) { NEG;													} /* NEG			  */
3321 OP(ed,7d) { RETI;													} /* RETI			  */
3322 OP(ed,7e) { _IM = 2;												} /* IM   2			  */
3323 OP(ed,7f) { illegal_2();											} /* DB   ED,7F		  */
3324 
3325 OP(ed,80) { illegal_2();											} /* DB   ED		  */
3326 OP(ed,81) { illegal_2();											} /* DB   ED		  */
3327 OP(ed,82) { illegal_2();											} /* DB   ED		  */
3328 OP(ed,83) { illegal_2();											} /* DB   ED		  */
3329 OP(ed,84) { illegal_2();											} /* DB   ED		  */
3330 OP(ed,85) { illegal_2();											} /* DB   ED		  */
3331 OP(ed,86) { illegal_2();											} /* DB   ED		  */
3332 OP(ed,87) { illegal_2();											} /* DB   ED		  */
3333 
3334 OP(ed,88) { illegal_2();											} /* DB   ED		  */
3335 OP(ed,89) { illegal_2();											} /* DB   ED		  */
3336 OP(ed,8a) { illegal_2();											} /* DB   ED		  */
3337 OP(ed,8b) { illegal_2();											} /* DB   ED		  */
3338 OP(ed,8c) { illegal_2();											} /* DB   ED		  */
3339 OP(ed,8d) { illegal_2();											} /* DB   ED		  */
3340 OP(ed,8e) { illegal_2();											} /* DB   ED		  */
3341 OP(ed,8f) { illegal_2();											} /* DB   ED		  */
3342 
3343 OP(ed,90) { illegal_2();											} /* DB   ED		  */
3344 OP(ed,91) { illegal_2();											} /* DB   ED		  */
3345 OP(ed,92) { illegal_2();											} /* DB   ED		  */
3346 OP(ed,93) { illegal_2();											} /* DB   ED		  */
3347 OP(ed,94) { illegal_2();											} /* DB   ED		  */
3348 OP(ed,95) { illegal_2();											} /* DB   ED		  */
3349 OP(ed,96) { illegal_2();											} /* DB   ED		  */
3350 OP(ed,97) { illegal_2();											} /* DB   ED		  */
3351 
3352 OP(ed,98) { illegal_2();											} /* DB   ED		  */
3353 OP(ed,99) { illegal_2();											} /* DB   ED		  */
3354 OP(ed,9a) { illegal_2();											} /* DB   ED		  */
3355 OP(ed,9b) { illegal_2();											} /* DB   ED		  */
3356 OP(ed,9c) { illegal_2();											} /* DB   ED		  */
3357 OP(ed,9d) { illegal_2();											} /* DB   ED		  */
3358 OP(ed,9e) { illegal_2();											} /* DB   ED		  */
3359 OP(ed,9f) { illegal_2();											} /* DB   ED		  */
3360 
OP(ed,a0)3361 OP(ed,a0) { LDI;													} /* LDI			  */
OP(ed,a1)3362 OP(ed,a1) { CPI;													} /* CPI			  */
OP(ed,a2)3363 OP(ed,a2) { INI;													} /* INI			  */
OP(ed,a3)3364 OP(ed,a3) { OUTI;													} /* OUTI			  */
OP(ed,a4)3365 OP(ed,a4) { illegal_2();											} /* DB   ED		  */
OP(ed,a5)3366 OP(ed,a5) { illegal_2();											} /* DB   ED		  */
OP(ed,a6)3367 OP(ed,a6) { illegal_2();											} /* DB   ED		  */
OP(ed,a7)3368 OP(ed,a7) { illegal_2();											} /* DB   ED		  */
3369 
OP(ed,a8)3370 OP(ed,a8) { LDD;													} /* LDD			  */
OP(ed,a9)3371 OP(ed,a9) { CPD;													} /* CPD			  */
OP(ed,aa)3372 OP(ed,aa) { IND;													} /* IND			  */
OP(ed,ab)3373 OP(ed,ab) { OUTD;													} /* OUTD			  */
OP(ed,ac)3374 OP(ed,ac) { illegal_2();											} /* DB   ED		  */
OP(ed,ad)3375 OP(ed,ad) { illegal_2();											} /* DB   ED		  */
OP(ed,ae)3376 OP(ed,ae) { illegal_2();											} /* DB   ED		  */
OP(ed,af)3377 OP(ed,af) { illegal_2();											} /* DB   ED		  */
3378 
OP(ed,b0)3379 OP(ed,b0) { LDIR;													} /* LDIR			  */
OP(ed,b1)3380 OP(ed,b1) { CPIR;													} /* CPIR			  */
OP(ed,b2)3381 OP(ed,b2) { INIR;													} /* INIR			  */
OP(ed,b3)3382 OP(ed,b3) { OTIR;													} /* OTIR			  */
OP(ed,b4)3383 OP(ed,b4) { illegal_2();											} /* DB   ED		  */
OP(ed,b5)3384 OP(ed,b5) { illegal_2();											} /* DB   ED		  */
OP(ed,b6)3385 OP(ed,b6) { illegal_2();											} /* DB   ED		  */
OP(ed,b7)3386 OP(ed,b7) { illegal_2();											} /* DB   ED		  */
3387 
OP(ed,b8)3388 OP(ed,b8) { LDDR;													} /* LDDR			  */
OP(ed,b9)3389 OP(ed,b9) { CPDR;													} /* CPDR			  */
OP(ed,ba)3390 OP(ed,ba) { INDR;													} /* INDR			  */
OP(ed,bb)3391 OP(ed,bb) { OTDR;													} /* OTDR			  */
OP(ed,bc)3392 OP(ed,bc) { illegal_2();											} /* DB   ED		  */
OP(ed,bd)3393 OP(ed,bd) { illegal_2();											} /* DB   ED		  */
OP(ed,be)3394 OP(ed,be) { illegal_2();											} /* DB   ED		  */
OP(ed,bf)3395 OP(ed,bf) { illegal_2();											} /* DB   ED		  */
3396 
OP(ed,c0)3397 OP(ed,c0) { illegal_2();											} /* DB   ED		  */
OP(ed,c1)3398 OP(ed,c1) { illegal_2();											} /* DB   ED		  */
OP(ed,c2)3399 OP(ed,c2) { illegal_2();											} /* DB   ED		  */
OP(ed,c3)3400 OP(ed,c3) { illegal_2();											} /* DB   ED		  */
OP(ed,c4)3401 OP(ed,c4) { illegal_2();											} /* DB   ED		  */
OP(ed,c5)3402 OP(ed,c5) { illegal_2();											} /* DB   ED		  */
OP(ed,c6)3403 OP(ed,c6) { illegal_2();											} /* DB   ED		  */
OP(ed,c7)3404 OP(ed,c7) { illegal_2();											} /* DB   ED		  */
3405 
OP(ed,c8)3406 OP(ed,c8) { illegal_2();											} /* DB   ED		  */
OP(ed,c9)3407 OP(ed,c9) { illegal_2();											} /* DB   ED		  */
OP(ed,ca)3408 OP(ed,ca) { illegal_2();											} /* DB   ED		  */
OP(ed,cb)3409 OP(ed,cb) { illegal_2();											} /* DB   ED		  */
OP(ed,cc)3410 OP(ed,cc) { illegal_2();											} /* DB   ED		  */
OP(ed,cd)3411 OP(ed,cd) { illegal_2();											} /* DB   ED		  */
OP(ed,ce)3412 OP(ed,ce) { illegal_2();											} /* DB   ED		  */
OP(ed,cf)3413 OP(ed,cf) { illegal_2();											} /* DB   ED		  */
3414 
OP(ed,d0)3415 OP(ed,d0) { illegal_2();											} /* DB   ED		  */
OP(ed,d1)3416 OP(ed,d1) { illegal_2();											} /* DB   ED		  */
OP(ed,d2)3417 OP(ed,d2) { illegal_2();											} /* DB   ED		  */
OP(ed,d3)3418 OP(ed,d3) { illegal_2();											} /* DB   ED		  */
OP(ed,d4)3419 OP(ed,d4) { illegal_2();											} /* DB   ED		  */
OP(ed,d5)3420 OP(ed,d5) { illegal_2();											} /* DB   ED		  */
OP(ed,d6)3421 OP(ed,d6) { illegal_2();											} /* DB   ED		  */
OP(ed,d7)3422 OP(ed,d7) { illegal_2();											} /* DB   ED		  */
3423 
OP(ed,d8)3424 OP(ed,d8) { illegal_2();											} /* DB   ED		  */
OP(ed,d9)3425 OP(ed,d9) { illegal_2();											} /* DB   ED		  */
OP(ed,da)3426 OP(ed,da) { illegal_2();											} /* DB   ED		  */
OP(ed,db)3427 OP(ed,db) { illegal_2();											} /* DB   ED		  */
OP(ed,dc)3428 OP(ed,dc) { illegal_2();											} /* DB   ED		  */
OP(ed,dd)3429 OP(ed,dd) { illegal_2();											} /* DB   ED		  */
OP(ed,de)3430 OP(ed,de) { illegal_2();											} /* DB   ED		  */
OP(ed,df)3431 OP(ed,df) { illegal_2();											} /* DB   ED		  */
3432 
OP(ed,e0)3433 OP(ed,e0) { illegal_2();											} /* DB   ED		  */
OP(ed,e1)3434 OP(ed,e1) { illegal_2();											} /* DB   ED		  */
OP(ed,e2)3435 OP(ed,e2) { illegal_2();											} /* DB   ED		  */
OP(ed,e3)3436 OP(ed,e3) { illegal_2();											} /* DB   ED		  */
OP(ed,e4)3437 OP(ed,e4) { illegal_2();											} /* DB   ED		  */
OP(ed,e5)3438 OP(ed,e5) { illegal_2();											} /* DB   ED		  */
OP(ed,e6)3439 OP(ed,e6) { illegal_2();											} /* DB   ED		  */
OP(ed,e7)3440 OP(ed,e7) { illegal_2();											} /* DB   ED		  */
3441 
OP(ed,e8)3442 OP(ed,e8) { illegal_2();											} /* DB   ED		  */
OP(ed,e9)3443 OP(ed,e9) { illegal_2();											} /* DB   ED		  */
OP(ed,ea)3444 OP(ed,ea) { illegal_2();											} /* DB   ED		  */
OP(ed,eb)3445 OP(ed,eb) { illegal_2();											} /* DB   ED		  */
OP(ed,ec)3446 OP(ed,ec) { illegal_2();											} /* DB   ED		  */
OP(ed,ed)3447 OP(ed,ed) { illegal_2();											} /* DB   ED		  */
OP(ed,ee)3448 OP(ed,ee) { illegal_2();											} /* DB   ED		  */
OP(ed,ef)3449 OP(ed,ef) { illegal_2();											} /* DB   ED		  */
3450 
OP(ed,f0)3451 OP(ed,f0) { illegal_2();											} /* DB   ED		  */
OP(ed,f1)3452 OP(ed,f1) { illegal_2();											} /* DB   ED		  */
OP(ed,f2)3453 OP(ed,f2) { illegal_2();											} /* DB   ED		  */
OP(ed,f3)3454 OP(ed,f3) { illegal_2();											} /* DB   ED		  */
OP(ed,f4)3455 OP(ed,f4) { illegal_2();											} /* DB   ED		  */
OP(ed,f5)3456 OP(ed,f5) { illegal_2();											} /* DB   ED		  */
OP(ed,f6)3457 OP(ed,f6) { illegal_2();											} /* DB   ED		  */
OP(ed,f7)3458 OP(ed,f7) { illegal_2();											} /* DB   ED		  */
3459 
OP(ed,f8)3460 OP(ed,f8) { illegal_2();											} /* DB   ED		  */
OP(ed,f9)3461 OP(ed,f9) { illegal_2();											} /* DB   ED		  */
OP(ed,fa)3462 OP(ed,fa) { illegal_2();											} /* DB   ED		  */
OP(ed,fb)3463 OP(ed,fb) { illegal_2();											} /* DB   ED		  */
OP(ed,fc)3464 OP(ed,fc) { illegal_2();											} /* DB   ED		  */
OP(ed,fd)3465 OP(ed,fd) { illegal_2();											} /* DB   ED		  */
OP(ed,fe)3466 OP(ed,fe) { illegal_2();											} /* DB   ED		  */
OP(ed,ff)3467 OP(ed,ff) { illegal_2();											} /* DB   ED		  */
3468 
3469 #if TIME_LOOP_HACKS
3470 
3471 #define CHECK_BC_LOOP												\
3472 if( _BC > 1 && _PCD < 0xfffc ) {									\
3473 	UINT8 op1 = cpu_readop(_PCD);									\
3474 	UINT8 op2 = cpu_readop(_PCD+1);									\
3475 	if( (op1==0x78 && op2==0xb1) || (op1==0x79 && op2==0xb0) )		\
3476 	{																\
3477 		UINT8 op3 = cpu_readop(_PCD+2);								\
3478 		UINT8 op4 = cpu_readop(_PCD+3);								\
3479 		if( op3==0x20 && op4==0xfb )								\
3480 		{															\
3481 			int cnt =												\
3482 				cc[Z80_TABLE_op][0x78] +							\
3483 				cc[Z80_TABLE_op][0xb1] +							\
3484 				cc[Z80_TABLE_op][0x20] +							\
3485 				cc[Z80_TABLE_ex][0x20];								\
3486 			while( _BC > 0 && z80_ICount > cnt )					\
3487 			{														\
3488 				BURNODD( cnt, 4, cnt );								\
3489 				_BC--;												\
3490 			}														\
3491 		}															\
3492 		else														\
3493 		if( op3 == 0xc2 )											\
3494 		{															\
3495 			UINT8 ad1 = cpu_readop_arg(_PCD+3);						\
3496 			UINT8 ad2 = cpu_readop_arg(_PCD+4);						\
3497 			if( (ad1 + 256 * ad2) == (_PCD - 1) )					\
3498 			{														\
3499 				int cnt =											\
3500 					cc[Z80_TABLE_op][0x78] +						\
3501 					cc[Z80_TABLE_op][0xb1] +						\
3502 					cc[Z80_TABLE_op][0xc2] +						\
3503 					cc[Z80_TABLE_ex][0xc2];							\
3504 				while( _BC > 0 && z80_ICount > cnt )				\
3505 				{													\
3506 					BURNODD( cnt, 4, cnt );							\
3507 					_BC--;											\
3508 				}													\
3509 			}														\
3510 		}															\
3511 	}																\
3512 }
3513 
3514 #define CHECK_DE_LOOP												\
3515 if( _DE > 1 && _PCD < 0xfffc ) {									\
3516 	UINT8 op1 = cpu_readop(_PCD);									\
3517 	UINT8 op2 = cpu_readop(_PCD+1);									\
3518 	if( (op1==0x7a && op2==0xb3) || (op1==0x7b && op2==0xb2) )		\
3519 	{																\
3520 		UINT8 op3 = cpu_readop(_PCD+2);								\
3521 		UINT8 op4 = cpu_readop(_PCD+3);								\
3522 		if( op3==0x20 && op4==0xfb )								\
3523 		{															\
3524 			int cnt =												\
3525 				cc[Z80_TABLE_op][0x7a] +							\
3526 				cc[Z80_TABLE_op][0xb3] +							\
3527 				cc[Z80_TABLE_op][0x20] +							\
3528 				cc[Z80_TABLE_ex][0x20];								\
3529 			while( _DE > 0 && z80_ICount > cnt )					\
3530 			{														\
3531 				BURNODD( cnt, 4, cnt );								\
3532 				_DE--;												\
3533 			}														\
3534 		}															\
3535 		else														\
3536 		if( op3==0xc2 )												\
3537 		{															\
3538 			UINT8 ad1 = cpu_readop_arg(_PCD+3);						\
3539 			UINT8 ad2 = cpu_readop_arg(_PCD+4);						\
3540 			if( (ad1 + 256 * ad2) == (_PCD - 1) )					\
3541 			{														\
3542 				int cnt =											\
3543 					cc[Z80_TABLE_op][0x7a] +						\
3544 					cc[Z80_TABLE_op][0xb3] +						\
3545 					cc[Z80_TABLE_op][0xc2] +						\
3546 					cc[Z80_TABLE_ex][0xc2];							\
3547 				while( _DE > 0 && z80_ICount > cnt )				\
3548 				{													\
3549 					BURNODD( cnt, 4, cnt );							\
3550 					_DE--;											\
3551 				}													\
3552 			}														\
3553 		}															\
3554 	}																\
3555 }
3556 
3557 #define CHECK_HL_LOOP												\
3558 if( _HL > 1 && _PCD < 0xfffc ) {									\
3559 	UINT8 op1 = cpu_readop(_PCD);									\
3560 	UINT8 op2 = cpu_readop(_PCD+1);									\
3561 	if( (op1==0x7c && op2==0xb5) || (op1==0x7d && op2==0xb4) )		\
3562 	{																\
3563 		UINT8 op3 = cpu_readop(_PCD+2);								\
3564 		UINT8 op4 = cpu_readop(_PCD+3);								\
3565 		if( op3==0x20 && op4==0xfb )								\
3566 		{															\
3567 			int cnt =												\
3568 				cc[Z80_TABLE_op][0x7c] +							\
3569 				cc[Z80_TABLE_op][0xb5] +							\
3570 				cc[Z80_TABLE_op][0x20] +							\
3571 				cc[Z80_TABLE_ex][0x20];								\
3572 			while( _HL > 0 && z80_ICount > cnt )					\
3573 			{														\
3574 				BURNODD( cnt, 4, cnt );								\
3575 				_HL--;												\
3576 			}														\
3577 		}															\
3578 		else														\
3579 		if( op3==0xc2 )												\
3580 		{															\
3581 			UINT8 ad1 = cpu_readop_arg(_PCD+3);						\
3582 			UINT8 ad2 = cpu_readop_arg(_PCD+4);						\
3583 			if( (ad1 + 256 * ad2) == (_PCD - 1) )					\
3584 			{														\
3585 				int cnt =											\
3586 					cc[Z80_TABLE_op][0x7c] +						\
3587 					cc[Z80_TABLE_op][0xb5] +						\
3588 					cc[Z80_TABLE_op][0xc2] +						\
3589 					cc[Z80_TABLE_ex][0xc2];							\
3590 				while( _HL > 0 && z80_ICount > cnt )				\
3591 				{													\
3592 					BURNODD( cnt, 4, cnt );							\
3593 					_HL--;											\
3594 				}													\
3595 			}														\
3596 		}															\
3597 	}																\
3598 }
3599 
3600 #else
3601 
3602 #define CHECK_BC_LOOP
3603 #define CHECK_DE_LOOP
3604 #define CHECK_HL_LOOP
3605 
3606 #endif
3607 
3608 /**********************************************************
3609  * main opcodes
3610  **********************************************************/
3611 OP(op,00) {															} /* NOP			  */
3612 OP(op,01) { _BC = ARG16();											} /* LD   BC,w		  */
3613 OP(op,02) { WM( _BC, _A );											} /* LD   (BC),A	  */
3614 OP(op,03) { _BC++;													} /* INC  BC		  */
3615 OP(op,04) { _B = INC(_B);											} /* INC  B			  */
3616 OP(op,05) { _B = DEC(_B);											} /* DEC  B			  */
3617 OP(op,06) { _B = ARG();												} /* LD   B,n		  */
3618 OP(op,07) { RLCA;													} /* RLCA			  */
3619 
3620 OP(op,08) { EX_AF;													} /* EX   AF,AF'	  */
3621 OP(op,09) { ADD16(HL,BC);											} /* ADD  HL,BC		  */
3622 OP(op,0a) { _A = RM(_BC);											} /* LD   A,(BC)	  */
3623 OP(op,0b) { _BC--; CHECK_BC_LOOP;									} /* DEC  BC		  */
3624 OP(op,0c) { _C = INC(_C);											} /* INC  C			  */
3625 OP(op,0d) { _C = DEC(_C);											} /* DEC  C			  */
3626 OP(op,0e) { _C = ARG();												} /* LD   C,n		  */
3627 OP(op,0f) { RRCA;													} /* RRCA			  */
3628 
3629 OP(op,10) { _B--; JR_COND( _B, 0x10 );								} /* DJNZ o			  */
3630 OP(op,11) { _DE = ARG16();											} /* LD   DE,w		  */
3631 OP(op,12) { WM( _DE, _A );											} /* LD   (DE),A	  */
3632 OP(op,13) { _DE++;													} /* INC  DE		  */
3633 OP(op,14) { _D = INC(_D);											} /* INC  D			  */
3634 OP(op,15) { _D = DEC(_D);											} /* DEC  D			  */
3635 OP(op,16) { _D = ARG();												} /* LD   D,n		  */
3636 OP(op,17) { RLA;													} /* RLA			  */
3637 
3638 OP(op,18) { JR();													} /* JR   o			  */
3639 OP(op,19) { ADD16(HL,DE);											} /* ADD  HL,DE		  */
3640 OP(op,1a) { _A = RM(_DE);											} /* LD   A,(DE)	  */
3641 OP(op,1b) { _DE--; CHECK_DE_LOOP;									} /* DEC  DE		  */
3642 OP(op,1c) { _E = INC(_E);											} /* INC  E			  */
3643 OP(op,1d) { _E = DEC(_E);											} /* DEC  E			  */
3644 OP(op,1e) { _E = ARG();												} /* LD   E,n		  */
3645 OP(op,1f) { RRA;													} /* RRA			  */
3646 
3647 OP(op,20) { JR_COND( !(_F & ZF), 0x20 );							} /* JR   NZ,o		  */
3648 OP(op,21) { _HL = ARG16();											} /* LD   HL,w		  */
3649 OP(op,22) { EA = ARG16(); WM16( EA, &Z80.HL );						} /* LD   (w),HL	  */
3650 OP(op,23) { _HL++;													} /* INC  HL		  */
3651 OP(op,24) { _H = INC(_H);											} /* INC  H			  */
3652 OP(op,25) { _H = DEC(_H);											} /* DEC  H			  */
3653 OP(op,26) { _H = ARG();												} /* LD   H,n		  */
3654 OP(op,27) { DAA;													} /* DAA			  */
3655 
3656 OP(op,28) { JR_COND( _F & ZF, 0x28 );								} /* JR   Z,o		  */
3657 OP(op,29) { ADD16(HL,HL);											} /* ADD  HL,HL		  */
3658 OP(op,2a) { EA = ARG16(); RM16( EA, &Z80.HL );						} /* LD   HL,(w)	  */
3659 OP(op,2b) { _HL--; CHECK_HL_LOOP;									} /* DEC  HL		  */
3660 OP(op,2c) { _L = INC(_L);											} /* INC  L			  */
3661 OP(op,2d) { _L = DEC(_L);											} /* DEC  L			  */
3662 OP(op,2e) { _L = ARG();												} /* LD   L,n		  */
3663 OP(op,2f) { _A ^= 0xff; _F = (_F&(SF|ZF|PF|CF))|HF|NF|(_A&(YF|XF)); } /* CPL			  */
3664 
3665 OP(op,30) { JR_COND( !(_F & CF), 0x30 );							} /* JR   NC,o		  */
3666 OP(op,31) { _SP = ARG16();											} /* LD   SP,w		  */
3667 OP(op,32) { EA = ARG16(); WM( EA, _A );								} /* LD   (w),A		  */
3668 OP(op,33) { _SP++;													} /* INC  SP		  */
3669 OP(op,34) { WM( _HL, INC(RM(_HL)) );								} /* INC  (HL)		  */
3670 OP(op,35) { WM( _HL, DEC(RM(_HL)) );								} /* DEC  (HL)		  */
3671 OP(op,36) { WM( _HL, ARG() );										} /* LD   (HL),n	  */
3672 OP(op,37) { _F = (_F & (SF|ZF|PF)) | CF | (_A & (YF|XF));			} /* SCF			  */
3673 
3674 OP(op,38) { JR_COND( _F & CF, 0x38 );								} /* JR   C,o		  */
3675 OP(op,39) { ADD16(HL,SP);											} /* ADD  HL,SP		  */
3676 OP(op,3a) { EA = ARG16(); _A = RM( EA );							} /* LD   A,(w)		  */
3677 OP(op,3b) { _SP--;													} /* DEC  SP		  */
3678 OP(op,3c) { _A = INC(_A);											} /* INC  A			  */
3679 OP(op,3d) { _A = DEC(_A);											} /* DEC  A			  */
3680 OP(op,3e) { _A = ARG();												} /* LD   A,n		  */
3681 OP(op,3f) { _F = ((_F&(SF|ZF|PF|CF))|((_F&CF)<<4)|(_A&(YF|XF)))^CF; } /* CCF			  */
3682 /*OP(op,3f) { _F = ((_F & ~(HF|NF)) | ((_F & CF)<<4)) ^ CF;			  }    CCF				   */
3683 
3684 OP(op,40) {															} /* LD   B,B		  */
3685 OP(op,41) { _B = _C;												} /* LD   B,C		  */
3686 OP(op,42) { _B = _D;												} /* LD   B,D		  */
3687 OP(op,43) { _B = _E;												} /* LD   B,E		  */
3688 OP(op,44) { _B = _H;												} /* LD   B,H		  */
3689 OP(op,45) { _B = _L;												} /* LD   B,L		  */
3690 OP(op,46) { _B = RM(_HL);											} /* LD   B,(HL)	  */
3691 OP(op,47) { _B = _A;												} /* LD   B,A		  */
3692 
3693 OP(op,48) { _C = _B;												} /* LD   C,B		  */
3694 OP(op,49) {															} /* LD   C,C		  */
3695 OP(op,4a) { _C = _D;												} /* LD   C,D		  */
3696 OP(op,4b) { _C = _E;												} /* LD   C,E		  */
3697 OP(op,4c) { _C = _H;												} /* LD   C,H		  */
3698 OP(op,4d) { _C = _L;												} /* LD   C,L		  */
3699 OP(op,4e) { _C = RM(_HL);											} /* LD   C,(HL)	  */
3700 OP(op,4f) { _C = _A;												} /* LD   C,A		  */
3701 
3702 OP(op,50) { _D = _B;												} /* LD   D,B		  */
3703 OP(op,51) { _D = _C;												} /* LD   D,C		  */
3704 OP(op,52) {															} /* LD   D,D		  */
3705 OP(op,53) { _D = _E;												} /* LD   D,E		  */
3706 OP(op,54) { _D = _H;												} /* LD   D,H		  */
3707 OP(op,55) { _D = _L;												} /* LD   D,L		  */
3708 OP(op,56) { _D = RM(_HL);											} /* LD   D,(HL)	  */
3709 OP(op,57) { _D = _A;												} /* LD   D,A		  */
3710 
3711 OP(op,58) { _E = _B;												} /* LD   E,B		  */
3712 OP(op,59) { _E = _C;												} /* LD   E,C		  */
3713 OP(op,5a) { _E = _D;												} /* LD   E,D		  */
3714 OP(op,5b) {															} /* LD   E,E		  */
3715 OP(op,5c) { _E = _H;												} /* LD   E,H		  */
3716 OP(op,5d) { _E = _L;												} /* LD   E,L		  */
3717 OP(op,5e) { _E = RM(_HL);											} /* LD   E,(HL)	  */
3718 OP(op,5f) { _E = _A;												} /* LD   E,A		  */
3719 
3720 OP(op,60) { _H = _B;												} /* LD   H,B		  */
3721 OP(op,61) { _H = _C;												} /* LD   H,C		  */
3722 OP(op,62) { _H = _D;												} /* LD   H,D		  */
3723 OP(op,63) { _H = _E;												} /* LD   H,E		  */
3724 OP(op,64) {															} /* LD   H,H		  */
3725 OP(op,65) { _H = _L;												} /* LD   H,L		  */
3726 OP(op,66) { _H = RM(_HL);											} /* LD   H,(HL)	  */
3727 OP(op,67) { _H = _A;												} /* LD   H,A		  */
3728 
3729 OP(op,68) { _L = _B;												} /* LD   L,B		  */
3730 OP(op,69) { _L = _C;												} /* LD   L,C		  */
3731 OP(op,6a) { _L = _D;												} /* LD   L,D		  */
3732 OP(op,6b) { _L = _E;												} /* LD   L,E		  */
3733 OP(op,6c) { _L = _H;												} /* LD   L,H		  */
3734 OP(op,6d) {															} /* LD   L,L		  */
3735 OP(op,6e) { _L = RM(_HL);											} /* LD   L,(HL)	  */
3736 OP(op,6f) { _L = _A;												} /* LD   L,A		  */
3737 
3738 OP(op,70) { WM( _HL, _B );											} /* LD   (HL),B	  */
3739 OP(op,71) { WM( _HL, _C );											} /* LD   (HL),C	  */
3740 OP(op,72) { WM( _HL, _D );											} /* LD   (HL),D	  */
3741 OP(op,73) { WM( _HL, _E );											} /* LD   (HL),E	  */
3742 OP(op,74) { WM( _HL, _H );											} /* LD   (HL),H	  */
3743 OP(op,75) { WM( _HL, _L );											} /* LD   (HL),L	  */
3744 OP(op,76) { ENTER_HALT;												} /* HALT			  */
3745 OP(op,77) { WM( _HL, _A );											} /* LD   (HL),A	  */
3746 
3747 OP(op,78) { _A = _B;												} /* LD   A,B		  */
3748 OP(op,79) { _A = _C;												} /* LD   A,C		  */
3749 OP(op,7a) { _A = _D;												} /* LD   A,D		  */
3750 OP(op,7b) { _A = _E;												} /* LD   A,E		  */
3751 OP(op,7c) { _A = _H;												} /* LD   A,H		  */
3752 OP(op,7d) { _A = _L;												} /* LD   A,L		  */
3753 OP(op,7e) { _A = RM(_HL);											} /* LD   A,(HL)	  */
3754 OP(op,7f) {															} /* LD   A,A		  */
3755 
3756 OP(op,80) { ADD(_B);												} /* ADD  A,B		  */
3757 OP(op,81) { ADD(_C);												} /* ADD  A,C		  */
3758 OP(op,82) { ADD(_D);												} /* ADD  A,D		  */
3759 OP(op,83) { ADD(_E);												} /* ADD  A,E		  */
3760 OP(op,84) { ADD(_H);												} /* ADD  A,H		  */
3761 OP(op,85) { ADD(_L);												} /* ADD  A,L		  */
3762 OP(op,86) { ADD(RM(_HL));											} /* ADD  A,(HL)	  */
3763 OP(op,87) { ADD(_A);												} /* ADD  A,A		  */
3764 
3765 OP(op,88) { ADC(_B);												} /* ADC  A,B		  */
3766 OP(op,89) { ADC(_C);												} /* ADC  A,C		  */
3767 OP(op,8a) { ADC(_D);												} /* ADC  A,D		  */
3768 OP(op,8b) { ADC(_E);												} /* ADC  A,E		  */
3769 OP(op,8c) { ADC(_H);												} /* ADC  A,H		  */
3770 OP(op,8d) { ADC(_L);												} /* ADC  A,L		  */
3771 OP(op,8e) { ADC(RM(_HL));											} /* ADC  A,(HL)	  */
3772 OP(op,8f) { ADC(_A);												} /* ADC  A,A		  */
3773 
3774 OP(op,90) { SUB(_B);												} /* SUB  B			  */
3775 OP(op,91) { SUB(_C);												} /* SUB  C			  */
3776 OP(op,92) { SUB(_D);												} /* SUB  D			  */
3777 OP(op,93) { SUB(_E);												} /* SUB  E			  */
3778 OP(op,94) { SUB(_H);												} /* SUB  H			  */
3779 OP(op,95) { SUB(_L);												} /* SUB  L			  */
3780 OP(op,96) { SUB(RM(_HL));											} /* SUB  (HL)		  */
3781 OP(op,97) { SUB(_A);												} /* SUB  A			  */
3782 
3783 OP(op,98) { SBC(_B);												} /* SBC  A,B		  */
3784 OP(op,99) { SBC(_C);												} /* SBC  A,C		  */
3785 OP(op,9a) { SBC(_D);												} /* SBC  A,D		  */
3786 OP(op,9b) { SBC(_E);												} /* SBC  A,E		  */
3787 OP(op,9c) { SBC(_H);												} /* SBC  A,H		  */
3788 OP(op,9d) { SBC(_L);												} /* SBC  A,L		  */
3789 OP(op,9e) { SBC(RM(_HL));											} /* SBC  A,(HL)	  */
3790 OP(op,9f) { SBC(_A);												} /* SBC  A,A		  */
3791 
OP(op,a0)3792 OP(op,a0) { AND(_B);												} /* AND  B			  */
OP(op,a1)3793 OP(op,a1) { AND(_C);												} /* AND  C			  */
OP(op,a2)3794 OP(op,a2) { AND(_D);												} /* AND  D			  */
OP(op,a3)3795 OP(op,a3) { AND(_E);												} /* AND  E			  */
OP(op,a4)3796 OP(op,a4) { AND(_H);												} /* AND  H			  */
OP(op,a5)3797 OP(op,a5) { AND(_L);												} /* AND  L			  */
OP(op,a6)3798 OP(op,a6) { AND(RM(_HL));											} /* AND  (HL)		  */
OP(op,a7)3799 OP(op,a7) { AND(_A);												} /* AND  A			  */
3800 
OP(op,a8)3801 OP(op,a8) { XOR(_B);												} /* XOR  B			  */
OP(op,a9)3802 OP(op,a9) { XOR(_C);												} /* XOR  C			  */
OP(op,aa)3803 OP(op,aa) { XOR(_D);												} /* XOR  D			  */
OP(op,ab)3804 OP(op,ab) { XOR(_E);												} /* XOR  E			  */
OP(op,ac)3805 OP(op,ac) { XOR(_H);												} /* XOR  H			  */
OP(op,ad)3806 OP(op,ad) { XOR(_L);												} /* XOR  L			  */
OP(op,ae)3807 OP(op,ae) { XOR(RM(_HL));											} /* XOR  (HL)		  */
OP(op,af)3808 OP(op,af) { XOR(_A);												} /* XOR  A			  */
3809 
OP(op,b0)3810 OP(op,b0) { OR(_B);													} /* OR   B			  */
OP(op,b1)3811 OP(op,b1) { OR(_C);													} /* OR   C			  */
OP(op,b2)3812 OP(op,b2) { OR(_D);													} /* OR   D			  */
OP(op,b3)3813 OP(op,b3) { OR(_E);													} /* OR   E			  */
OP(op,b4)3814 OP(op,b4) { OR(_H);													} /* OR   H			  */
OP(op,b5)3815 OP(op,b5) { OR(_L);													} /* OR   L			  */
OP(op,b6)3816 OP(op,b6) { OR(RM(_HL));											} /* OR   (HL)		  */
OP(op,b7)3817 OP(op,b7) { OR(_A);													} /* OR   A			  */
3818 
OP(op,b8)3819 OP(op,b8) { CP(_B);													} /* CP   B			  */
OP(op,b9)3820 OP(op,b9) { CP(_C);													} /* CP   C			  */
OP(op,ba)3821 OP(op,ba) { CP(_D);													} /* CP   D			  */
OP(op,bb)3822 OP(op,bb) { CP(_E);													} /* CP   E			  */
OP(op,bc)3823 OP(op,bc) { CP(_H);													} /* CP   H			  */
OP(op,bd)3824 OP(op,bd) { CP(_L);													} /* CP   L			  */
OP(op,be)3825 OP(op,be) { CP(RM(_HL));											} /* CP   (HL)		  */
OP(op,bf)3826 OP(op,bf) { CP(_A);													} /* CP   A			  */
3827 
OP(op,c0)3828 OP(op,c0) { RET_COND( !(_F & ZF), 0xc0 );							} /* RET  NZ		  */
OP(op,c1)3829 OP(op,c1) { POP(BC);												} /* POP  BC		  */
OP(op,c2)3830 OP(op,c2) { JP_COND( !(_F & ZF) );									} /* JP   NZ,a		  */
OP(op,c3)3831 OP(op,c3) { JP;														} /* JP   a			  */
OP(op,c4)3832 OP(op,c4) { CALL_COND( !(_F & ZF), 0xc4 );							} /* CALL NZ,a		  */
OP(op,c5)3833 OP(op,c5) { PUSH( BC );												} /* PUSH BC		  */
OP(op,c6)3834 OP(op,c6) { ADD(ARG());												} /* ADD  A,n		  */
OP(op,c7)3835 OP(op,c7) { RST(0x00);												} /* RST  0			  */
3836 
OP(op,c8)3837 OP(op,c8) { RET_COND( _F & ZF, 0xc8 );								} /* RET  Z			  */
OP(op,c9)3838 OP(op,c9) { POP(PC); change_pc16(_PCD);								} /* RET			  */
OP(op,ca)3839 OP(op,ca) { JP_COND( _F & ZF );										} /* JP   Z,a		  */
OP(op,cb)3840 OP(op,cb) { _R++; EXEC(cb,ROP());									} /* **** CB xx		  */
OP(op,cc)3841 OP(op,cc) { CALL_COND( _F & ZF, 0xcc );								} /* CALL Z,a		  */
OP(op,cd)3842 OP(op,cd) { CALL();													} /* CALL a			  */
OP(op,ce)3843 OP(op,ce) { ADC(ARG());												} /* ADC  A,n		  */
OP(op,cf)3844 OP(op,cf) { RST(0x08);												} /* RST  1			  */
3845 
OP(op,d0)3846 OP(op,d0) { RET_COND( !(_F & CF), 0xd0 );							} /* RET  NC		  */
OP(op,d1)3847 OP(op,d1) { POP(DE);												} /* POP  DE		  */
OP(op,d2)3848 OP(op,d2) { JP_COND( !(_F & CF) );									} /* JP   NC,a		  */
OP(op,d3)3849 OP(op,d3) { unsigned n = ARG() | (_A << 8); OUT( n, _A );			} /* OUT  (n),A		  */
OP(op,d4)3850 OP(op,d4) { CALL_COND( !(_F & CF), 0xd4 );							} /* CALL NC,a		  */
OP(op,d5)3851 OP(op,d5) { PUSH( DE );												} /* PUSH DE		  */
OP(op,d6)3852 OP(op,d6) { SUB(ARG());												} /* SUB  n			  */
OP(op,d7)3853 OP(op,d7) { RST(0x10);												} /* RST  2			  */
3854 
OP(op,d8)3855 OP(op,d8) { RET_COND( _F & CF, 0xd8 );								} /* RET  C			  */
OP(op,d9)3856 OP(op,d9) { EXX;													} /* EXX			  */
OP(op,da)3857 OP(op,da) { JP_COND( _F & CF );										} /* JP   C,a		  */
OP(op,db)3858 OP(op,db) { unsigned n = ARG() | (_A << 8); _A = IN( n );			} /* IN   A,(n)		  */
OP(op,dc)3859 OP(op,dc) { CALL_COND( _F & CF, 0xdc );								} /* CALL C,a		  */
OP(op,dd)3860 OP(op,dd) { _R++; EXEC(dd,ROP());									} /* **** DD xx		  */
OP(op,de)3861 OP(op,de) { SBC(ARG());												} /* SBC  A,n		  */
OP(op,df)3862 OP(op,df) { RST(0x18);												} /* RST  3			  */
3863 
OP(op,e0)3864 OP(op,e0) { RET_COND( !(_F & PF), 0xe0 );							} /* RET  PO		  */
OP(op,e1)3865 OP(op,e1) { POP(HL);												} /* POP  HL		  */
OP(op,e2)3866 OP(op,e2) { JP_COND( !(_F & PF) );									} /* JP   PO,a		  */
OP(op,e3)3867 OP(op,e3) { EXSP(HL);												} /* EX   HL,(SP)	  */
OP(op,e4)3868 OP(op,e4) { CALL_COND( !(_F & PF), 0xe4 );							} /* CALL PO,a		  */
OP(op,e5)3869 OP(op,e5) { PUSH( HL );												} /* PUSH HL		  */
OP(op,e6)3870 OP(op,e6) { AND(ARG());												} /* AND  n			  */
OP(op,e7)3871 OP(op,e7) { RST(0x20);												} /* RST  4			  */
3872 
OP(op,e8)3873 OP(op,e8) { RET_COND( _F & PF, 0xe8 );								} /* RET  PE		  */
OP(op,e9)3874 OP(op,e9) { _PC = _HL; change_pc16(_PCD);							} /* JP   (HL)		  */
OP(op,ea)3875 OP(op,ea) { JP_COND( _F & PF );										} /* JP   PE,a		  */
OP(op,eb)3876 OP(op,eb) { EX_DE_HL;												} /* EX   DE,HL		  */
OP(op,ec)3877 OP(op,ec) { CALL_COND( _F & PF, 0xec );								} /* CALL PE,a		  */
OP(op,ed)3878 OP(op,ed) { _R++; EXEC(ed,ROP());									} /* **** ED xx		  */
OP(op,ee)3879 OP(op,ee) { XOR(ARG());												} /* XOR  n			  */
OP(op,ef)3880 OP(op,ef) { RST(0x28);												} /* RST  5			  */
3881 
OP(op,f0)3882 OP(op,f0) { RET_COND( !(_F & SF), 0xf0 );							} /* RET  P			  */
OP(op,f1)3883 OP(op,f1) { POP(AF);												} /* POP  AF		  */
OP(op,f2)3884 OP(op,f2) { JP_COND( !(_F & SF) );									} /* JP   P,a		  */
OP(op,f3)3885 OP(op,f3) { _IFF1 = _IFF2 = 0;										} /* DI				  */
OP(op,f4)3886 OP(op,f4) { CALL_COND( !(_F & SF), 0xf4 );							} /* CALL P,a		  */
OP(op,f5)3887 OP(op,f5) { PUSH( AF );												} /* PUSH AF		  */
OP(op,f6)3888 OP(op,f6) { OR(ARG());												} /* OR   n			  */
OP(op,f7)3889 OP(op,f7) { RST(0x30);												} /* RST  6			  */
3890 
OP(op,f8)3891 OP(op,f8) { RET_COND( _F & SF, 0xf8 );								} /* RET  M			  */
OP(op,f9)3892 OP(op,f9) { _SP = _HL;												} /* LD   SP,HL		  */
OP(op,fa)3893 OP(op,fa) { JP_COND(_F & SF);										} /* JP   M,a		  */
OP(op,fb)3894 OP(op,fb) { EI;														} /* EI				  */
OP(op,fc)3895 OP(op,fc) { CALL_COND( _F & SF, 0xfc );								} /* CALL M,a		  */
OP(op,fd)3896 OP(op,fd) { _R++; EXEC(fd,ROP());									} /* **** FD xx		  */
OP(op,fe)3897 OP(op,fe) { CP(ARG());												} /* CP   n			  */
OP(op,ff)3898 OP(op,ff) { RST(0x38);												} /* RST  7			  */
3899 
3900 
take_interrupt(void)3901 static void take_interrupt(void)
3902 {
3903 	if( _IFF1 )
3904 	{
3905 		int irq_vector;
3906 
3907 		/* there isn't a valid previous program counter */
3908 		_PPC = -1;
3909 
3910 		/* Check if processor was halted */
3911 		LEAVE_HALT;
3912 
3913 		if( Z80.irq_max )			/* daisy chain mode */
3914 		{
3915 			if( Z80.request_irq >= 0 )
3916 			{
3917 				/* Clear both interrupt flip flops */
3918 				_IFF1 = _IFF2 = 0;
3919 				irq_vector = Z80.irq[Z80.request_irq].interrupt_entry(Z80.irq[Z80.request_irq].irq_param);
3920 				log_cb(RETRO_LOG_DEBUG, LOGPRE "Z80 #%d daisy chain irq_vector $%02x\n", cpu_getactivecpu(), irq_vector);
3921 				Z80.request_irq = -1;
3922 			} else return;
3923 		}
3924 		else
3925 		{
3926 			/* Clear both interrupt flip flops */
3927 			_IFF1 = _IFF2 = 0;
3928 			/* call back the cpu interface to retrieve the vector */
3929 			irq_vector = (*Z80.irq_callback)(0);
3930 			log_cb(RETRO_LOG_DEBUG, LOGPRE "Z80 #%d single int. irq_vector $%02x\n", cpu_getactivecpu(), irq_vector);
3931 		}
3932 
3933 		/* Interrupt mode 2. Call [Z80.I:databyte] */
3934 		if( _IM == 2 )
3935 		{
3936 			irq_vector = (irq_vector & 0xff) | (_I << 8);
3937 			PUSH( PC );
3938 			RM16( irq_vector, &Z80.PC );
3939 			log_cb(RETRO_LOG_DEBUG, LOGPRE "Z80 #%d IM2 [$%04x] = $%04x\n",cpu_getactivecpu() , irq_vector, _PCD);
3940 			/* CALL opcode timing */
3941 			Z80.extra_cycles += cc[Z80_TABLE_op][0xcd];
3942 		}
3943 		else
3944 		/* Interrupt mode 1. RST 38h */
3945 		if( _IM == 1 )
3946 		{
3947 			log_cb(RETRO_LOG_DEBUG, LOGPRE "Z80 #%d IM1 $0038\n",cpu_getactivecpu());
3948 			PUSH( PC );
3949 			_PCD = 0x0038;
3950 			/* RST $38 + 'interrupt latency' cycles */
3951 			Z80.extra_cycles += cc[Z80_TABLE_op][0xff] + cc[Z80_TABLE_ex][0xff];
3952 		}
3953 		else
3954 		{
3955 			/* Interrupt mode 0. We check for CALL and JP instructions, */
3956 			/* if neither of these were found we assume a 1 byte opcode */
3957 			/* was placed on the databus								*/
3958 			log_cb(RETRO_LOG_DEBUG, LOGPRE "Z80 #%d IM0 $%04x\n",cpu_getactivecpu() , irq_vector);
3959 			switch (irq_vector & 0xff0000)
3960 			{
3961 				case 0xcd0000:	/* call */
3962 					PUSH( PC );
3963 					_PCD = irq_vector & 0xffff;
3964 					 /* CALL $xxxx + 'interrupt latency' cycles */
3965 					Z80.extra_cycles += cc[Z80_TABLE_op][0xcd] + cc[Z80_TABLE_ex][0xff];
3966 					break;
3967 				case 0xc30000:	/* jump */
3968 					_PCD = irq_vector & 0xffff;
3969 					/* JP $xxxx + 2 cycles */
3970 					Z80.extra_cycles += cc[Z80_TABLE_op][0xc3] + cc[Z80_TABLE_ex][0xff];
3971 					break;
3972 				default:		/* rst (or other opcodes?) */
3973 					PUSH( PC );
3974 					_PCD = irq_vector & 0x0038;
3975 					/* RST $xx + 2 cycles */
3976 					Z80.extra_cycles += cc[Z80_TABLE_op][_PCD] + cc[Z80_TABLE_ex][_PCD];
3977 					break;
3978 			}
3979 		}
3980 		change_pc16(_PCD);
3981 	}
3982 }
3983 
3984 /****************************************************************************
3985  * Processor initialization
3986  ****************************************************************************/
z80_init(void)3987 void z80_init(void)
3988 {
3989 	int cpu = cpu_getactivecpu();
3990 	int i, p;
3991 
3992 #if BIG_FLAGS_ARRAY
3993 	if( !SZHVC_add || !SZHVC_sub )
3994 	{
3995 		int oldval, newval, val;
3996 		UINT8 *padd, *padc, *psub, *psbc;
3997 		/* allocate big flag arrays once */
3998 		SZHVC_add = (UINT8 *)malloc(2*256*256);
3999 		SZHVC_sub = (UINT8 *)malloc(2*256*256);
4000 		if( !SZHVC_add || !SZHVC_sub )
4001 		{
4002       log_cb(RETRO_LOG_DEBUG, LOGPRE "Z80: failed to allocate 2 * 128K flags arrays!!!\n");
4003 
4004       /* TODO: Don't abort, switch back to main thread and exit cleanly:
4005       * This is only used if a malloc fails in src/cpu/z80/z80.c so not too high a priority */
4006       abort();
4007 		}
4008 		padd = &SZHVC_add[	0*256];
4009 		padc = &SZHVC_add[256*256];
4010 		psub = &SZHVC_sub[	0*256];
4011 		psbc = &SZHVC_sub[256*256];
4012 		for (oldval = 0; oldval < 256; oldval++)
4013 		{
4014 			for (newval = 0; newval < 256; newval++)
4015 			{
4016 				/* add or adc w/o carry set */
4017 				val = newval - oldval;
4018 				*padd = (newval) ? ((newval & 0x80) ? SF : 0) : ZF;
4019 #if Z80_EXACT
4020 				*padd |= (newval & (YF | XF));	/* undocumented flag bits 5+3 */
4021 #endif
4022 				if( (newval & 0x0f) < (oldval & 0x0f) ) *padd |= HF;
4023 				if( newval < oldval ) *padd |= CF;
4024 				if( (val^oldval^0x80) & (val^newval) & 0x80 ) *padd |= VF;
4025 				padd++;
4026 
4027 				/* adc with carry set */
4028 				val = newval - oldval - 1;
4029 				*padc = (newval) ? ((newval & 0x80) ? SF : 0) : ZF;
4030 #if Z80_EXACT
4031 				*padc |= (newval & (YF | XF));	/* undocumented flag bits 5+3 */
4032 #endif
4033 				if( (newval & 0x0f) <= (oldval & 0x0f) ) *padc |= HF;
4034 				if( newval <= oldval ) *padc |= CF;
4035 				if( (val^oldval^0x80) & (val^newval) & 0x80 ) *padc |= VF;
4036 				padc++;
4037 
4038 				/* cp, sub or sbc w/o carry set */
4039 				val = oldval - newval;
4040 				*psub = NF | ((newval) ? ((newval & 0x80) ? SF : 0) : ZF);
4041 #if Z80_EXACT
4042 				*psub |= (newval & (YF | XF));	/* undocumented flag bits 5+3 */
4043 #endif
4044 				if( (newval & 0x0f) > (oldval & 0x0f) ) *psub |= HF;
4045 				if( newval > oldval ) *psub |= CF;
4046 				if( (val^oldval) & (oldval^newval) & 0x80 ) *psub |= VF;
4047 				psub++;
4048 
4049 				/* sbc with carry set */
4050 				val = oldval - newval - 1;
4051 				*psbc = NF | ((newval) ? ((newval & 0x80) ? SF : 0) : ZF);
4052 #if Z80_EXACT
4053 				*psbc |= (newval & (YF | XF));	/* undocumented flag bits 5+3 */
4054 #endif
4055 				if( (newval & 0x0f) >= (oldval & 0x0f) ) *psbc |= HF;
4056 				if( newval >= oldval ) *psbc |= CF;
4057 				if( (val^oldval) & (oldval^newval) & 0x80 ) *psbc |= VF;
4058 				psbc++;
4059 			}
4060 		}
4061 	}
4062 #endif
4063 	for (i = 0; i < 256; i++)
4064 	{
4065 		p = 0;
4066 		if( i&0x01 ) ++p;
4067 		if( i&0x02 ) ++p;
4068 		if( i&0x04 ) ++p;
4069 		if( i&0x08 ) ++p;
4070 		if( i&0x10 ) ++p;
4071 		if( i&0x20 ) ++p;
4072 		if( i&0x40 ) ++p;
4073 		if( i&0x80 ) ++p;
4074 		SZ[i] = i ? i & SF : ZF;
4075 #if Z80_EXACT
4076 		SZ[i] |= (i & (YF | XF));		/* undocumented flag bits 5+3 */
4077 #endif
4078 		SZ_BIT[i] = i ? i & SF : ZF | PF;
4079 #if Z80_EXACT
4080 		SZ_BIT[i] |= (i & (YF | XF));	/* undocumented flag bits 5+3 */
4081 #endif
4082 		SZP[i] = SZ[i] | ((p & 1) ? 0 : PF);
4083 		SZHV_inc[i] = SZ[i];
4084 		if( i == 0x80 ) SZHV_inc[i] |= VF;
4085 		if( (i & 0x0f) == 0x00 ) SZHV_inc[i] |= HF;
4086 		SZHV_dec[i] = SZ[i] | NF;
4087 		if( i == 0x7f ) SZHV_dec[i] |= VF;
4088 		if( (i & 0x0f) == 0x0f ) SZHV_dec[i] |= HF;
4089 	}
4090 
4091 	state_save_register_UINT16("z80", cpu, "AF", &Z80.AF.w.l, 1);
4092 	state_save_register_UINT16("z80", cpu, "BC", &Z80.BC.w.l, 1);
4093 	state_save_register_UINT16("z80", cpu, "DE", &Z80.DE.w.l, 1);
4094 	state_save_register_UINT16("z80", cpu, "HL", &Z80.HL.w.l, 1);
4095 	state_save_register_UINT16("z80", cpu, "IX", &Z80.IX.w.l, 1);
4096 	state_save_register_UINT16("z80", cpu, "IY", &Z80.IY.w.l, 1);
4097 	state_save_register_UINT16("z80", cpu, "PC", &Z80.PC.w.l, 1);
4098 	state_save_register_UINT16("z80", cpu, "SP", &Z80.SP.w.l, 1);
4099 	state_save_register_UINT16("z80", cpu, "AF2", &Z80.AF2.w.l, 1);
4100 	state_save_register_UINT16("z80", cpu, "BC2", &Z80.BC2.w.l, 1);
4101 	state_save_register_UINT16("z80", cpu, "DE2", &Z80.DE2.w.l, 1);
4102 	state_save_register_UINT16("z80", cpu, "HL2", &Z80.HL2.w.l, 1);
4103 	state_save_register_UINT8("z80", cpu, "R", &Z80.R, 1);
4104 	state_save_register_UINT8("z80", cpu, "R2", &Z80.R2, 1);
4105 	state_save_register_UINT8("z80", cpu, "IFF1", &Z80.IFF1, 1);
4106 	state_save_register_UINT8("z80", cpu, "IFF2", &Z80.IFF2, 1);
4107 	state_save_register_UINT8("z80", cpu, "HALT", &Z80.HALT, 1);
4108 	state_save_register_UINT8("z80", cpu, "IM", &Z80.IM, 1);
4109 	state_save_register_UINT8("z80", cpu, "I", &Z80.I, 1);
4110 	state_save_register_UINT8("z80", cpu, "irq_max", &Z80.irq_max, 1);
4111 	state_save_register_INT8("z80", cpu, "request_irq", &Z80.request_irq, 1);
4112 	state_save_register_INT8("z80", cpu, "service_irq", &Z80.service_irq, 1);
4113 	state_save_register_UINT8("z80", cpu, "int_state", Z80.int_state, 4);
4114 	state_save_register_UINT8("z80", cpu, "nmi_state", &Z80.nmi_state, 1);
4115 	state_save_register_UINT8("z80", cpu, "irq_state", &Z80.irq_state, 1);
4116 	/* daisy chain needs to be saved by z80ctc.c somehow */
4117 }
4118 
4119 /****************************************************************************
4120  * Reset registers to their initial values
4121  ****************************************************************************/
z80_reset(void * param)4122 void z80_reset(void *param)
4123 {
4124 	Z80_DaisyChain *daisy_chain = (Z80_DaisyChain *)param;
4125 	memset(&Z80, 0, sizeof(Z80));
4126 	_IX = _IY = 0xffff; /* IX and IY are FFFF after a reset! */
4127 	_F = ZF;			/* Zero flag is set */
4128 	Z80.request_irq = -1;
4129 	Z80.service_irq = -1;
4130 	Z80.nmi_state = CLEAR_LINE;
4131 	Z80.irq_state = CLEAR_LINE;
4132 
4133 	if( daisy_chain )
4134 	{
4135 		while( daisy_chain->irq_param != -1 && Z80.irq_max < Z80_MAXDAISY )
4136 		{
4137 			/* set callbackhandler after reti */
4138 			Z80.irq[Z80.irq_max] = *daisy_chain;
4139 			/* device reset */
4140 			if( Z80.irq[Z80.irq_max].reset )
4141 				Z80.irq[Z80.irq_max].reset(Z80.irq[Z80.irq_max].irq_param);
4142 			Z80.irq_max++;
4143 			daisy_chain++;
4144 		}
4145 	}
4146 
4147 	change_pc16(_PCD);
4148 }
4149 
z80_exit(void)4150 void z80_exit(void)
4151 {
4152 #if BIG_FLAGS_ARRAY
4153 	if (SZHVC_add) free(SZHVC_add);
4154 	SZHVC_add = NULL;
4155 	if (SZHVC_sub) free(SZHVC_sub);
4156 	SZHVC_sub = NULL;
4157 #endif
4158 }
4159 
4160 /****************************************************************************
4161  * Execute 'cycles' T-states. Return number of T-states really executed
4162  ****************************************************************************/
z80_execute(int cycles)4163 int z80_execute(int cycles)
4164 {
4165 	z80_ICount = cycles - Z80.extra_cycles;
4166 	Z80.extra_cycles = 0;
4167 
4168 	do
4169 	{
4170 		_PPC = _PCD;
4171 		CALL_MAME_DEBUG;
4172 		_R++;
4173 		EXEC_INLINE(op,ROP());
4174 	} while( z80_ICount > 0 );
4175 
4176 	z80_ICount -= Z80.extra_cycles;
4177 	Z80.extra_cycles = 0;
4178 
4179 	return cycles - z80_ICount;
4180 }
4181 
4182 /****************************************************************************
4183  * Burn 'cycles' T-states. Adjust R register for the lost time
4184  ****************************************************************************/
z80_burn(int cycles)4185 void z80_burn(int cycles)
4186 {
4187 	if( cycles > 0 )
4188 	{
4189 		/* NOP takes 4 cycles per instruction */
4190 		int n = (cycles + 3) / 4;
4191 		_R += n;
4192 		z80_ICount -= 4 * n;
4193 	}
4194 }
4195 
4196 /****************************************************************************
4197  * Get all registers in given buffer
4198  ****************************************************************************/
z80_get_context(void * dst)4199 unsigned z80_get_context (void *dst)
4200 {
4201 	if( dst )
4202 		*(Z80_Regs*)dst = Z80;
4203 	return sizeof(Z80_Regs);
4204 }
4205 
4206 /****************************************************************************
4207  * Set all registers to given values
4208  ****************************************************************************/
z80_set_context(void * src)4209 void z80_set_context (void *src)
4210 {
4211 	if( src )
4212 		Z80 = *(Z80_Regs*)src;
4213 	change_pc16(_PCD);
4214 }
4215 
4216 /****************************************************************************
4217  * Get a pointer to a cycle count table
4218  ****************************************************************************/
z80_get_cycle_table(int which)4219 const void *z80_get_cycle_table (int which)
4220 {
4221 	if (which >= 0 && which <= Z80_TABLE_xycb)
4222 		return cc[which];
4223 	return NULL;
4224 }
4225 
4226 /****************************************************************************
4227  * Set a new cycle count table
4228  ****************************************************************************/
z80_set_cycle_table(int which,void * new_table)4229 void z80_set_cycle_table (int which, void *new_table)
4230 {
4231 	if (which >= 0 && which <= Z80_TABLE_ex)
4232 		cc[which] = new_table;
4233 }
4234 
4235 /****************************************************************************
4236  * Return a specific register
4237  ****************************************************************************/
z80_get_reg(int regnum)4238 unsigned z80_get_reg (int regnum)
4239 {
4240 	switch( regnum )
4241 	{
4242 		case REG_PC: return _PCD;
4243 		case Z80_PC: return Z80.PC.w.l;
4244 		case REG_SP: return _SPD;
4245 		case Z80_SP: return Z80.SP.w.l;
4246 		case Z80_AF: return Z80.AF.w.l;
4247 		case Z80_BC: return Z80.BC.w.l;
4248 		case Z80_DE: return Z80.DE.w.l;
4249 		case Z80_HL: return Z80.HL.w.l;
4250 		case Z80_IX: return Z80.IX.w.l;
4251 		case Z80_IY: return Z80.IY.w.l;
4252 		case Z80_R: return (Z80.R & 0x7f) | (Z80.R2 & 0x80);
4253 		case Z80_I: return Z80.I;
4254 		case Z80_AF2: return Z80.AF2.w.l;
4255 		case Z80_BC2: return Z80.BC2.w.l;
4256 		case Z80_DE2: return Z80.DE2.w.l;
4257 		case Z80_HL2: return Z80.HL2.w.l;
4258 		case Z80_IM: return Z80.IM;
4259 		case Z80_IFF1: return Z80.IFF1;
4260 		case Z80_IFF2: return Z80.IFF2;
4261 		case Z80_HALT: return Z80.HALT;
4262 		case Z80_NMI_STATE: return Z80.nmi_state;
4263 		case Z80_IRQ_STATE: return Z80.irq_state;
4264 		case Z80_DC0: return Z80.int_state[0];
4265 		case Z80_DC1: return Z80.int_state[1];
4266 		case Z80_DC2: return Z80.int_state[2];
4267 		case Z80_DC3: return Z80.int_state[3];
4268 		case REG_PREVIOUSPC: return Z80.PREPC.w.l;
4269 		default:
4270 			if( regnum <= REG_SP_CONTENTS )
4271 			{
4272 				unsigned offset = _SPD + 2 * (REG_SP_CONTENTS - regnum);
4273 				if( offset < 0xffff )
4274 					return RM( offset ) | ( RM( offset + 1) << 8 );
4275 			}
4276 	}
4277 	return 0;
4278 }
4279 
4280 /****************************************************************************
4281  * Set a specific register
4282  ****************************************************************************/
z80_set_reg(int regnum,unsigned val)4283 void z80_set_reg (int regnum, unsigned val)
4284 {
4285 	switch( regnum )
4286 	{
4287 		case REG_PC: _PC = val; change_pc16(_PCD); break;
4288 		case Z80_PC: Z80.PC.w.l = val; break;
4289 		case REG_SP: _SP = val; break;
4290 		case Z80_SP: Z80.SP.w.l = val; break;
4291 		case Z80_AF: Z80.AF.w.l = val; break;
4292 		case Z80_BC: Z80.BC.w.l = val; break;
4293 		case Z80_DE: Z80.DE.w.l = val; break;
4294 		case Z80_HL: Z80.HL.w.l = val; break;
4295 		case Z80_IX: Z80.IX.w.l = val; break;
4296 		case Z80_IY: Z80.IY.w.l = val; break;
4297 		case Z80_R: Z80.R = val; Z80.R2 = val & 0x80; break;
4298 		case Z80_I: Z80.I = val; break;
4299 		case Z80_AF2: Z80.AF2.w.l = val; break;
4300 		case Z80_BC2: Z80.BC2.w.l = val; break;
4301 		case Z80_DE2: Z80.DE2.w.l = val; break;
4302 		case Z80_HL2: Z80.HL2.w.l = val; break;
4303 		case Z80_IM: Z80.IM = val; break;
4304 		case Z80_IFF1: Z80.IFF1 = val; break;
4305 		case Z80_IFF2: Z80.IFF2 = val; break;
4306 		case Z80_HALT: Z80.HALT = val; break;
4307 		case Z80_NMI_STATE: z80_set_irq_line(IRQ_LINE_NMI,val); break;
4308 		case Z80_IRQ_STATE: z80_set_irq_line(0,val); break;
4309 		case Z80_DC0: Z80.int_state[0] = val; break;
4310 		case Z80_DC1: Z80.int_state[1] = val; break;
4311 		case Z80_DC2: Z80.int_state[2] = val; break;
4312 		case Z80_DC3: Z80.int_state[3] = val; break;
4313 		default:
4314 			if( regnum <= REG_SP_CONTENTS )
4315 			{
4316 				unsigned offset = _SPD + 2 * (REG_SP_CONTENTS - regnum);
4317 				if( offset < 0xffff )
4318 				{
4319 					WM( offset, val & 0xff );
4320 					WM( offset+1, (val >> 8) & 0xff );
4321 				}
4322 			}
4323 	}
4324 }
4325 
4326 /****************************************************************************
4327  * Set IRQ line state
4328  ****************************************************************************/
z80_set_irq_line(int irqline,int state)4329 void z80_set_irq_line(int irqline, int state)
4330 {
4331 	if (irqline == IRQ_LINE_NMI)
4332 	{
4333 		if( Z80.nmi_state == state ) return;
4334 
4335 		log_cb(RETRO_LOG_DEBUG, LOGPRE "Z80 #%d set_irq_line (NMI) %d\n", cpu_getactivecpu(), state);
4336 		Z80.nmi_state = state;
4337 		if( state == CLEAR_LINE ) return;
4338 
4339 		log_cb(RETRO_LOG_DEBUG, LOGPRE "Z80 #%d take NMI\n", cpu_getactivecpu());
4340 		_PPC = -1;			/* there isn't a valid previous program counter */
4341 		LEAVE_HALT;			/* Check if processor was halted */
4342 
4343 		_IFF1 = 0;
4344 		PUSH( PC );
4345 		_PCD = 0x0066;
4346 		Z80.extra_cycles += 11;
4347 	}
4348 	else
4349 	{
4350 		log_cb(RETRO_LOG_DEBUG, LOGPRE "Z80 #%d set_irq_line %d\n",cpu_getactivecpu() , state);
4351 		Z80.irq_state = state;
4352 		if( state == CLEAR_LINE ) return;
4353 
4354 		if( Z80.irq_max )
4355 		{
4356 			int daisychain, device, int_state;
4357 			daisychain = (*Z80.irq_callback)(irqline);
4358 			device = daisychain >> 8;
4359 			int_state = daisychain & 0xff;
4360 			log_cb(RETRO_LOG_DEBUG, LOGPRE "Z80 #%d daisy chain $%04x -> device %d, state $%02x",cpu_getactivecpu(), daisychain, device, int_state);
4361 
4362 			if( Z80.int_state[device] != int_state )
4363 			{
4364 				log_cb(RETRO_LOG_DEBUG, LOGPRE " change\n");
4365 				/* set new interrupt status */
4366 				Z80.int_state[device] = int_state;
4367 				/* check interrupt status */
4368 				Z80.request_irq = Z80.service_irq = -1;
4369 
4370 				/* search higher IRQ or IEO */
4371 				for( device = 0 ; device < Z80.irq_max ; device ++ )
4372 				{
4373 					/* IEO = disable ? */
4374 					if( Z80.int_state[device] & Z80_INT_IEO )
4375 					{
4376 						Z80.request_irq = -1;		/* if IEO is disable , masking lower IRQ */
4377 						Z80.service_irq = device;	/* set highest interrupt service device */
4378 					}
4379 					/* IRQ = request ? */
4380 					if( Z80.int_state[device] & Z80_INT_REQ )
4381 						Z80.request_irq = device;
4382 				}
4383 				log_cb(RETRO_LOG_DEBUG, LOGPRE "Z80 #%d daisy chain service_irq $%02x, request_irq $%02x\n", cpu_getactivecpu(), Z80.service_irq, Z80.request_irq);
4384 				if( Z80.request_irq < 0 ) return;
4385 			}
4386 			else
4387 			{
4388 				log_cb(RETRO_LOG_DEBUG, LOGPRE " no change\n");
4389 				return;
4390 			}
4391 		}
4392 		take_interrupt();
4393 	}
4394 }
4395 
4396 /****************************************************************************
4397  * Set IRQ vector callback
4398  ****************************************************************************/
z80_set_irq_callback(int (* callback)(int))4399 void z80_set_irq_callback(int (*callback)(int))
4400 {
4401 	log_cb(RETRO_LOG_DEBUG, LOGPRE "Z80 #%d set_irq_callback $%08x\n",cpu_getactivecpu() , (int)callback);
4402 	Z80.irq_callback = callback;
4403 }
4404 
4405 /****************************************************************************
4406  * Return a formatted string for a register
4407  ****************************************************************************/
z80_info(void * context,int regnum)4408 const char *z80_info(void *context, int regnum)
4409 {
4410 	static char buffer[32][47+1];
4411 	static int which = 0;
4412 	Z80_Regs *r = context;
4413 
4414 	which = (which+1) % 32;
4415 	buffer[which][0] = '\0';
4416 	if( !context )
4417 		r = &Z80;
4418 
4419 	switch( regnum )
4420 	{
4421 		case CPU_INFO_REG+Z80_PC: sprintf(buffer[which], "PC:%04X", r->PC.w.l); break;
4422 		case CPU_INFO_REG+Z80_SP: sprintf(buffer[which], "SP:%04X", r->SP.w.l); break;
4423 		case CPU_INFO_REG+Z80_AF: sprintf(buffer[which], "AF:%04X", r->AF.w.l); break;
4424 		case CPU_INFO_REG+Z80_BC: sprintf(buffer[which], "BC:%04X", r->BC.w.l); break;
4425 		case CPU_INFO_REG+Z80_DE: sprintf(buffer[which], "DE:%04X", r->DE.w.l); break;
4426 		case CPU_INFO_REG+Z80_HL: sprintf(buffer[which], "HL:%04X", r->HL.w.l); break;
4427 		case CPU_INFO_REG+Z80_IX: sprintf(buffer[which], "IX:%04X", r->IX.w.l); break;
4428 		case CPU_INFO_REG+Z80_IY: sprintf(buffer[which], "IY:%04X", r->IY.w.l); break;
4429 		case CPU_INFO_REG+Z80_R: sprintf(buffer[which], "R:%02X", (r->R & 0x7f) | (r->R2 & 0x80)); break;
4430 		case CPU_INFO_REG+Z80_I: sprintf(buffer[which], "I:%02X", r->I); break;
4431 		case CPU_INFO_REG+Z80_AF2: sprintf(buffer[which], "AF'%04X", r->AF2.w.l); break;
4432 		case CPU_INFO_REG+Z80_BC2: sprintf(buffer[which], "BC'%04X", r->BC2.w.l); break;
4433 		case CPU_INFO_REG+Z80_DE2: sprintf(buffer[which], "DE'%04X", r->DE2.w.l); break;
4434 		case CPU_INFO_REG+Z80_HL2: sprintf(buffer[which], "HL'%04X", r->HL2.w.l); break;
4435 		case CPU_INFO_REG+Z80_IM: sprintf(buffer[which], "IM:%X", r->IM); break;
4436 		case CPU_INFO_REG+Z80_IFF1: sprintf(buffer[which], "IFF1:%X", r->IFF1); break;
4437 		case CPU_INFO_REG+Z80_IFF2: sprintf(buffer[which], "IFF2:%X", r->IFF2); break;
4438 		case CPU_INFO_REG+Z80_HALT: sprintf(buffer[which], "HALT:%X", r->HALT); break;
4439 		case CPU_INFO_REG+Z80_NMI_STATE: sprintf(buffer[which], "NMI:%X", r->nmi_state); break;
4440 		case CPU_INFO_REG+Z80_IRQ_STATE: sprintf(buffer[which], "IRQ:%X", r->irq_state); break;
4441 		case CPU_INFO_REG+Z80_DC0: if(Z80.irq_max >= 1) sprintf(buffer[which], "DC0:%X", r->int_state[0]); break;
4442 		case CPU_INFO_REG+Z80_DC1: if(Z80.irq_max >= 2) sprintf(buffer[which], "DC1:%X", r->int_state[1]); break;
4443 		case CPU_INFO_REG+Z80_DC2: if(Z80.irq_max >= 3) sprintf(buffer[which], "DC2:%X", r->int_state[2]); break;
4444 		case CPU_INFO_REG+Z80_DC3: if(Z80.irq_max >= 4) sprintf(buffer[which], "DC3:%X", r->int_state[3]); break;
4445 		case CPU_INFO_FLAGS:
4446 			sprintf(buffer[which], "%c%c%c%c%c%c%c%c",
4447 				r->AF.b.l & 0x80 ? 'S':'.',
4448 				r->AF.b.l & 0x40 ? 'Z':'.',
4449 				r->AF.b.l & 0x20 ? '5':'.',
4450 				r->AF.b.l & 0x10 ? 'H':'.',
4451 				r->AF.b.l & 0x08 ? '3':'.',
4452 				r->AF.b.l & 0x04 ? 'P':'.',
4453 				r->AF.b.l & 0x02 ? 'N':'.',
4454 				r->AF.b.l & 0x01 ? 'C':'.');
4455 			break;
4456 		case CPU_INFO_NAME: return "Z80";
4457 		case CPU_INFO_FAMILY: return "Zilog Z80";
4458 		case CPU_INFO_VERSION: return "3.5";
4459 		case CPU_INFO_FILE: return __FILE__;
4460 		case CPU_INFO_CREDITS: return "Copyright (C) 1998,1999,2000 Juergen Buchmueller, all rights reserved.";
4461 		case CPU_INFO_REG_LAYOUT: return (const char *)z80_reg_layout;
4462 		case CPU_INFO_WIN_LAYOUT: return (const char *)z80_win_layout;
4463 	}
4464 	return buffer[which];
4465 }
4466 
z80_dasm(char * buffer,unsigned pc)4467 unsigned z80_dasm( char *buffer, unsigned pc )
4468 {
4469 #ifdef MAME_DEBUG
4470 	return DasmZ80( buffer, pc );
4471 #else
4472 	sprintf( buffer, "$%02X", cpu_readop(pc) );
4473 	return 1;
4474 #endif
4475 }
4476