1 /*
2 Timer and PCM YMF278B. The FM will be shared with the ymf262, eventually.
3
4 This chip roughly splits the difference between the Sega 315-5560 MultiPCM
5 (Multi32, Model 1/2) and YMF 292-F SCSP (later Model 2, STV, Saturn, Model 3).
6
7 By R. Belmont and O. Galibert.
8
9 Copyright (c) 2002-2003 R. Belmont and O. Galibert.
10
11 This software is dual-licensed: it may be used in MAME and properly licensed
12 MAME derivatives under the terms of the MAME license. For use outside of
13 MAME and properly licensed derivatives, it is available under the
14 terms of the GNU Lesser General Public License (LGPL), version 2.1.
15 You may read the LGPL at http://www.gnu.org/licenses/lgpl.html
16
17 Changelog:
18 Sep. 8, 2002 - fixed ymf278b_compute_rate when OCT is negative (RB)
19 Dec. 11, 2002 - added ability to set non-standard clock rates (RB)
20 fixed envelope target for release (fixes missing
21 instruments in hotdebut).
22 Thanks to Team Japump! for MP3s from a real PCB.
23 fixed crash if MAME is run with no sound.
24 June 4, 2003 - Changed to dual-license with LGPL for use in OpenMSX.
25 OpenMSX contributed a bugfix where looped samples were
26 not being addressed properly, causing pitch fluctuation.
27 */
28
29 #include <math.h>
30 #include "driver.h"
31 #include "cpuintrf.h"
32
33 #undef VERBOSE
34
35 typedef struct
36 {
37 INT16 wave; /* wavetable number */
38 INT16 FN; /* f-number */
39 INT8 OCT; /* octave */
40 INT8 PRVB; /* pseudo-reverb */
41 INT8 LD; /* level direct */
42 INT8 TL; /* total level */
43 INT8 pan; /* panpot */
44 INT8 lfo; /* LFO */
45 INT8 vib; /* vibrato */
46 INT8 AM; /* AM level */
47
48 INT8 AR;
49 INT8 D1R;
50 INT8 DL;
51 INT8 D2R;
52 INT8 RC; /* rate correction */
53 INT8 RR;
54
55 UINT32 step; /* fixed-point frequency step */
56 UINT32 stepptr; /* fixed-point pointer into the sample */
57
58 INT8 active; /* slot keyed on */
59 INT8 bits; /* width of the samples */
60 UINT32 startaddr;
61 UINT32 loopaddr;
62 UINT32 endaddr;
63
64 int env_step;
65 UINT32 env_vol;
66 UINT32 env_vol_step;
67 UINT32 env_vol_lim;
68 } YMF278BSlot;
69
70 typedef struct
71 {
72 YMF278BSlot slots[24];
73 INT8 lsitest0;
74 INT8 lsitest1;
75 INT8 wavetblhdr;
76 INT8 memmode;
77 INT32 memadr;
78
79 INT32 fm_l, fm_r;
80 INT32 pcm_l, pcm_r;
81
82 UINT8 timer_a_count, timer_b_count, enable, current_irq;
83 void *timer_a, *timer_b;
84 int irq_line;
85
86 UINT8 port_A, port_B, port_C;
87 void (*irq_callback)(int);
88
89 const UINT8 *rom;
90 float clock_ratio;
91 } YMF278BChip;
92
93 static YMF278BChip YMF278B[MAX_YMF278B];
94 static INT32 volume[256*4]; /* precalculated attenuation values with some marging for enveloppe and pan levels*/
95 static int pan_left[16], pan_right[16]; /* pan volume offsets*/
96 static INT32 mix_level[8];
97
ymf278b_compute_rate(YMF278BSlot * slot,int val)98 static int ymf278b_compute_rate(YMF278BSlot *slot, int val)
99 {
100 int res, oct;
101
102 if(val == 0)
103 return 0;
104 if(val == 15)
105 return 63;
106 if(slot->RC != 15)
107 {
108 oct = slot->OCT;
109 if (oct & 8) oct |= -8;
110
111 res = (oct+slot->RC)*2 + (slot->FN & 0x200 ? 1 : 0) + val*4;
112 }
113 else
114 res = val * 4;
115 if(res < 0)
116 res = 0;
117 else if(res > 63)
118 res = 63;
119 return res;
120 }
121
ymf278_compute_decay_rate(int num)122 static UINT32 ymf278_compute_decay_rate(int num)
123 {
124 int samples;
125
126 if (num <= 3)
127 samples = 0;
128 else if (num >= 60)
129 samples = 15 << 4;
130 else
131 {
132 samples = (15 << (21 - num / 4)) / (4 + num % 4);
133 if (num % 4 && num / 4 <= 11)
134 samples += 2;
135 else if (num == 51)
136 samples += 2;
137 }
138
139 return ((UINT64)samples * Machine->sample_rate) / 44100;
140 }
141
ymf278b_envelope_next(YMF278BSlot * slot,float clock_ratio)142 static void ymf278b_envelope_next(YMF278BSlot *slot, float clock_ratio)
143 {
144 if(slot->env_step == 0)
145 {
146 /* Attack*/
147 slot->env_vol = (256U << 23) - 1;
148 slot->env_vol_lim = 256U<<23;
149 #ifdef VERBOSE
150 log_cb(RETRO_LOG_DEBUG, LOGPRE "YMF278B: Skipping attack (rate = %d)\n", slot->AR);
151 #endif
152 slot->env_step++;
153 }
154 if(slot->env_step == 1)
155 {
156 /* Decay 1*/
157 slot->env_vol = 0;
158 slot->env_step++;
159 if(slot->DL)
160 {
161 int rate = ymf278b_compute_rate(slot, slot->D1R);
162 #ifdef VERBOSE
163 log_cb(RETRO_LOG_DEBUG, LOGPRE "YMF278B: Decay step 1, dl=%d, val = %d rate = %d, delay = %g\n", slot->DL, slot->D1R, rate, ymf278_compute_decay_rate(rate)*1000.0*clock_ratio/Machine->sample_rate);
164 #endif
165 if(rate<4)
166 slot->env_vol_step = 0;
167 else
168 slot->env_vol_step = ((slot->DL*8)<<23) / (ymf278_compute_decay_rate(rate) * clock_ratio);
169 slot->env_vol_lim = (slot->DL*8)<<23;
170 return;
171 }
172 }
173 if(slot->env_step == 2)
174 {
175 /* Decay 2*/
176 int rate = ymf278b_compute_rate(slot, slot->D2R);
177 #ifdef VERBOSE
178 log_cb(RETRO_LOG_DEBUG, LOGPRE "YMF278B: Decay step 2, val = %d, rate = %d, delay = %g, current vol = %d\n", slot->D2R, rate, ymf278_compute_decay_rate(rate)*1000.0*clock_ratio/Machine->sample_rate, slot->env_vol >> 23);
179 #endif
180 if(rate<4)
181 slot->env_vol_step = 0;
182 else
183 slot->env_vol_step = ((256U-slot->DL*8)<<23) / (ymf278_compute_decay_rate(rate) * clock_ratio);
184 slot->env_vol_lim = 256U<<23;
185 slot->env_step++;
186 return;
187 }
188 if(slot->env_step == 3)
189 {
190 /* Decay 2 reached -96dB*/
191 #ifdef VERBOSE
192 log_cb(RETRO_LOG_DEBUG, LOGPRE "YMF278B: Voice cleared because of decay 2\n");
193 #endif
194 slot->env_vol = 256U<<23;
195 slot->env_vol_step = 0;
196 slot->env_vol_lim = 0;
197 slot->active = 0;
198 return;
199 }
200 if(slot->env_step == 4)
201 {
202 /* Release*/
203 int rate = ymf278b_compute_rate(slot, slot->RR);
204 #ifdef VERBOSE
205 log_cb(RETRO_LOG_DEBUG, LOGPRE "YMF278B: Release, val = %d, rate = %d, delay = %g\n", slot->RR, rate, ymf278_compute_decay_rate(rate)*1000.0*clock_ratio/Machine->sample_rate);
206 #endif
207 if(rate<4)
208 slot->env_vol_step = 0;
209 else
210 slot->env_vol_step = ((256U<<23)-slot->env_vol) / (ymf278_compute_decay_rate(rate) * clock_ratio);
211 slot->env_vol_lim = 256U<<23;
212 slot->env_step++;
213 return;
214 }
215 if(slot->env_step == 5)
216 {
217 /* Release reached -96dB*/
218 #ifdef VERBOSE
219 log_cb(RETRO_LOG_DEBUG, LOGPRE "YMF278B: Release ends\n");
220 #endif
221 slot->env_vol = 256U<<23;
222 slot->env_vol_step = 0;
223 slot->env_vol_lim = 0;
224 slot->active = 0;
225 return;
226 }
227 }
228
ymf278b_pcm_update(int num,INT16 ** outputs,int length)229 static void ymf278b_pcm_update(int num, INT16 **outputs, int length)
230 {
231 int i, j;
232 YMF278BSlot *slot = NULL;
233 INT16 sample = 0;
234 const UINT8 *rombase;
235 INT32 mix[44100*2];
236 INT32 *mixp;
237 INT32 vl, vr;
238
239 memset(mix, 0, sizeof(mix[0])*length*2);
240
241 rombase = YMF278B[num].rom;
242
243 for (i = 0; i < 24; i++)
244 {
245 slot = &YMF278B[num].slots[i];
246
247 if (slot->active)
248 {
249 mixp = mix;
250
251 for (j = 0; j < length; j++)
252 {
253 switch (slot->bits)
254 {
255 case 8: /* 8 bit*/
256 sample = rombase[slot->startaddr + (slot->stepptr>>16)]<<8;
257 break;
258
259 case 12: /* 12 bit*/
260 if (slot->stepptr & 1)
261 sample = rombase[slot->startaddr + (slot->stepptr>>17)*3 + 2]<<8 | ((rombase[slot->startaddr + (slot->stepptr>>17)*3 + 1] << 4) & 0xf0);
262 else
263 sample = rombase[slot->startaddr + (slot->stepptr>>17)*3]<<8 | (rombase[slot->startaddr + (slot->stepptr>>17)*3 + 1] & 0xf0);
264 break;
265
266 case 16: /* 16 bit*/
267 sample = rombase[slot->startaddr + ((slot->stepptr>>16)*2)]<<8;
268 sample |= rombase[slot->startaddr + ((slot->stepptr>>16)*2) + 1];
269 break;
270 }
271
272 *mixp++ += (sample * volume[slot->TL+pan_left [slot->pan]+(slot->env_vol>>23)])>>17;
273 *mixp++ += (sample * volume[slot->TL+pan_right[slot->pan]+(slot->env_vol>>23)])>>17;
274
275 /* update frequency*/
276 slot->stepptr += slot->step;
277 if(slot->stepptr >= slot->endaddr)
278 {
279 slot->stepptr = slot->stepptr - slot->endaddr + slot->loopaddr;
280 // If the step is bigger than the loop, finish the sample forcibly
281 if(slot->stepptr >= slot->endaddr)
282 {
283 slot->env_vol = 256U<<23;
284 slot->env_vol_step = 0;
285 slot->env_vol_lim = 0;
286 slot->active = 0;
287 slot->stepptr = 0;
288 slot->step = 0;
289 }
290 }
291
292 /* update envelope*/
293 slot->env_vol += slot->env_vol_step;
294 if(((INT32)(slot->env_vol - slot->env_vol_lim)) >= 0)
295 ymf278b_envelope_next(slot, YMF278B[num].clock_ratio);
296 }
297 }
298 }
299
300 mixp = mix;
301 vl = mix_level[YMF278B[num].pcm_l];
302 vr = mix_level[YMF278B[num].pcm_r];
303 for (i = 0; i < length; i++)
304 {
305 outputs[0][i] = (*mixp++ * vl) >> 16;
306 outputs[1][i] = (*mixp++ * vr) >> 16;
307 }
308 }
309
ymf278b_irq_check(int num)310 static void ymf278b_irq_check(int num)
311 {
312 YMF278BChip *chip = &YMF278B[num];
313 int prev_line = chip->irq_line;
314 chip->irq_line = chip->current_irq ? ASSERT_LINE : CLEAR_LINE;
315 if(chip->irq_line != prev_line && chip->irq_callback)
316 chip->irq_callback(chip->irq_line);
317 }
318
ymf278b_timer_a_tick(int num)319 static void ymf278b_timer_a_tick(int num)
320 {
321 YMF278BChip *chip = &YMF278B[num];
322 if(!(chip->enable & 0x40))
323 {
324 chip->current_irq |= 0x40;
325 ymf278b_irq_check(num);
326 }
327 }
328
ymf278b_timer_b_tick(int num)329 static void ymf278b_timer_b_tick(int num)
330 {
331 YMF278BChip *chip = &YMF278B[num];
332 if(!(chip->enable & 0x20))
333 {
334 chip->current_irq |= 0x20;
335 ymf278b_irq_check(num);
336 }
337 }
338
ymf278b_timer_a_reset(int num)339 static void ymf278b_timer_a_reset(int num)
340 {
341 YMF278BChip *chip = &YMF278B[num];
342 if(chip->enable & 1)
343 {
344 double period = (256-chip->timer_a_count) * 80.8 * chip->clock_ratio;
345 timer_adjust(chip->timer_a, TIME_IN_USEC(period), num, TIME_IN_USEC(period));
346 }
347 else
348 timer_adjust(chip->timer_a, TIME_NEVER, num, 0);
349 }
350
ymf278b_timer_b_reset(int num)351 static void ymf278b_timer_b_reset(int num)
352 {
353 YMF278BChip *chip = &YMF278B[num];
354 if(chip->enable & 2)
355 {
356 double period = (256-chip->timer_b_count) * 323.1 * chip->clock_ratio;
357 timer_adjust(chip->timer_b, TIME_IN_USEC(period), num, TIME_IN_USEC(period));
358 }
359 else
360 timer_adjust(chip->timer_b, TIME_NEVER, num, 0);
361 }
362
ymf278b_A_w(int num,UINT8 reg,UINT8 data)363 static void ymf278b_A_w(int num, UINT8 reg, UINT8 data)
364 {
365 YMF278BChip *chip = &YMF278B[num];
366
367 if (!Machine->sample_rate) return;
368
369 switch(reg)
370 {
371 case 0x02:
372 chip->timer_a_count = data;
373 ymf278b_timer_a_reset(num);
374 break;
375 case 0x03:
376 chip->timer_b_count = data;
377 ymf278b_timer_b_reset(num);
378 break;
379 case 0x04:
380 if(data & 0x80)
381 chip->current_irq = 0;
382 else
383 {
384 UINT8 old_enable = chip->enable;
385 chip->enable = data;
386 chip->current_irq &= ~data;
387 if((old_enable ^ data) & 1)
388 ymf278b_timer_a_reset(num);
389 if((old_enable ^ data) & 2)
390 ymf278b_timer_b_reset(num);
391 }
392 ymf278b_irq_check(num);
393 break;
394 default:
395 log_cb(RETRO_LOG_DEBUG, LOGPRE "YMF278B: Port A write %02x, %02x\n", reg, data);
396 }
397 }
398
ymf278b_B_w(int num,UINT8 reg,UINT8 data)399 static void ymf278b_B_w(int num, UINT8 reg, UINT8 data)
400 {
401 if (!Machine->sample_rate) return;
402
403 log_cb(RETRO_LOG_DEBUG, LOGPRE "YMF278B: Port B write %02x, %02x\n", reg, data);
404 }
405
ymf278b_C_w(int num,UINT8 reg,UINT8 data)406 static void ymf278b_C_w(int num, UINT8 reg, UINT8 data)
407 {
408 YMF278BChip *chip = &YMF278B[num];
409
410 if (!Machine->sample_rate) return;
411
412 /* Handle slot registers specifically*/
413 if (reg >= 0x08 && reg <= 0xf7)
414 {
415 YMF278BSlot *slot = NULL;
416 int snum;
417 snum = (reg-8) % 24;
418 slot = &YMF278B[num].slots[snum];
419 switch((reg-8) / 24)
420 {
421 case 0:
422 {
423 const UINT8 *p;
424
425 slot->wave &= 0x100;
426 slot->wave |= data;
427
428 if(slot->wave < 384 || !chip->wavetblhdr)
429 p = chip->rom + (slot->wave * 12);
430 else
431 p = chip->rom + chip->wavetblhdr*0x80000 + ((slot->wave - 384) * 12);
432
433 switch (p[0]&0xc0)
434 {
435 case 0:
436 slot->bits = 8;
437 break;
438 case 0x40:
439 slot->bits = 12;
440 break;
441 case 0x80:
442 slot->bits = 16;
443 break;
444 }
445
446 slot->lfo = (p[7] >> 2) & 7;
447 slot->vib = p[7] & 7;
448 slot->AR = p[8] >> 4;
449 slot->D1R = p[8] & 0xf;
450 slot->DL = p[9] >> 4;
451 slot->D2R = p[9] & 0xf;
452 slot->RC = p[10] >> 4;
453 slot->RR = p[10] & 0xf;
454 slot->AM = p[11] & 7;
455
456 slot->startaddr = (p[2] | (p[1]<<8) | ((p[0]&0x3f)<<16));
457 slot->loopaddr = (p[4]<<16) | (p[3]<<24);
458 slot->endaddr = (p[6]<<16) | (p[5]<<24);
459 slot->endaddr -= 0x00010000U;
460 slot->endaddr ^= 0xffff0000U;
461 break;
462 }
463 case 1:
464 slot->wave &= 0xff;
465 slot->wave |= ((data&0x1)<<8);
466 slot->FN &= 0x380;
467 slot->FN |= (data>>1);
468 break;
469 case 2:
470 slot->FN &= 0x07f;
471 slot->FN |= ((data&0x07)<<7);
472 slot->PRVB = ((data&0x4)>>3);
473 slot->OCT = ((data&0xf0)>>4);
474 break;
475 case 3:
476 slot->TL = (data>>1);
477 slot->LD = data&0x1;
478 break;
479 case 4:
480 slot->pan = data&0xf;
481 if (data & 0x80)
482 {
483 unsigned int step;
484 int oct;
485
486 slot->active = 1;
487
488 oct = slot->OCT;
489 if(oct & 8)
490 oct |= -8;
491
492 slot->env_step = 0;
493 slot->env_vol = 256U<<23;
494 slot->env_vol_step = 0;
495 slot->env_vol_lim = 256U<<23;
496 slot->stepptr = 0;
497 slot->step = 0;
498
499 step = (slot->FN | 1024) << (oct + 7);
500 slot->step = (UINT32) ((((INT64)step)*(44100/4)) / Machine->sample_rate * chip->clock_ratio);
501
502 ymf278b_envelope_next(slot, chip->clock_ratio);
503
504 #ifdef VERBOSE
505 logerror("YMF278B: slot %2d wave %3d lfo=%d vib=%d ar=%d d1r=%d dl=%d d2r=%d rc=%d rr=%d am=%d\n", snum, slot->wave,
506 slot->lfo, slot->vib, slot->AR, slot->D1R, slot->DL, slot->D2R, slot->RC, slot->RR, slot->AM);
507 log_cb(RETRO_LOG_DEBUG, LOGPRE " b=%d, start=%x, loop=%x, end=%x, oct=%d, fn=%d, step=%x\n", slot->bits, slot->startaddr, slot->loopaddr>>16, slot->endaddr>>16, oct, slot->FN, slot->step);
508 #endif
509 }
510 else
511 {
512 #ifdef VERBOSE
513 log_cb(RETRO_LOG_DEBUG, LOGPRE "YMF278B: slot %2d off\n", snum);
514 #endif
515 if(slot->active)
516 {
517 slot->env_step = 4;
518 ymf278b_envelope_next(slot, chip->clock_ratio);
519 }
520 }
521 break;
522 case 5:
523 slot->vib = data&0x7;
524 slot->lfo = (data>>3)&0x7;
525 break;
526 case 6:
527 slot->AR = data>>4;
528 slot->D1R = data&0xf;
529 break;
530 case 7:
531 slot->DL = data>>4;
532 slot->D2R = data&0xf;
533 break;
534 case 8:
535 slot->RC = data>>4;
536 slot->RR = data&0xf;
537 break;
538 case 9:
539 slot->AM = data & 0x7;
540 break;
541 }
542 }
543 else
544 {
545 /* All non-slot registers*/
546 switch (reg)
547 {
548 case 0x00: /* TEST*/
549 case 0x01:
550 break;
551
552 case 0x02:
553 chip->wavetblhdr = (data>>2)&0x7;
554 chip->memmode = data&1;
555 break;
556
557 case 0x03:
558 chip->memadr &= 0xffff;
559 chip->memadr |= (data<<16);
560 break;
561
562 case 0x04:
563 chip->memadr &= 0xff00ff;
564 chip->memadr |= (data<<8);
565 break;
566
567 case 0x05:
568 chip->memadr &= 0xffff00;
569 chip->memadr |= data;
570 break;
571
572 case 0x06: /* memory data (ignored, we don't support RAM)*/
573 case 0x07: /* unused*/
574 break;
575
576 case 0xf8:
577 chip->fm_l = data & 0x7;
578 chip->fm_r = (data>>3)&0x7;
579 break;
580
581 case 0xf9:
582 chip->pcm_l = data & 0x7;
583 chip->pcm_r = (data>>3)&0x7;
584 break;
585 }
586 }
587 }
588
ymf278b_status_port_r(int num)589 static UINT8 ymf278b_status_port_r(int num)
590 {
591 return YMF278B[num].current_irq | (YMF278B[num].irq_line == ASSERT_LINE ? 0x80 : 0x00);
592 }
593
594 /* Not implemented yet*/
ymf278b_data_port_r(int num)595 static UINT8 ymf278b_data_port_r(int num)
596 {
597 return 0;
598 }
599
ymf278b_control_port_A_w(int num,UINT8 data)600 static void ymf278b_control_port_A_w(int num, UINT8 data)
601 {
602 YMF278B[num].port_A = data;
603 }
604
ymf278b_data_port_A_w(int num,UINT8 data)605 static void ymf278b_data_port_A_w(int num, UINT8 data)
606 {
607 ymf278b_A_w(num, YMF278B[num].port_A, data);
608 }
609
ymf278b_control_port_B_w(int num,UINT8 data)610 static void ymf278b_control_port_B_w(int num, UINT8 data)
611 {
612 YMF278B[num].port_B = data;
613 }
614
ymf278b_data_port_B_w(int num,UINT8 data)615 static void ymf278b_data_port_B_w(int num, UINT8 data)
616 {
617 ymf278b_B_w(num, YMF278B[num].port_B, data);
618 }
619
ymf278b_control_port_C_w(int num,UINT8 data)620 static void ymf278b_control_port_C_w(int num, UINT8 data)
621 {
622 YMF278B[num].port_C = data;
623 }
624
ymf278b_data_port_C_w(int num,UINT8 data)625 static void ymf278b_data_port_C_w(int num, UINT8 data)
626 {
627 ymf278b_C_w(num, YMF278B[num].port_C, data);
628 }
629
ymf278b_init(INT8 num,UINT8 * rom,void (* cb)(int),int clock)630 static void ymf278b_init(INT8 num, UINT8 *rom, void (*cb)(int), int clock)
631 {
632 memset(&YMF278B[num], 0, sizeof(YMF278BChip));
633 YMF278B[num].rom = rom;
634 YMF278B[num].irq_callback = cb;
635 YMF278B[num].timer_a = timer_alloc(ymf278b_timer_a_tick);
636 YMF278B[num].timer_b = timer_alloc(ymf278b_timer_b_tick);
637 YMF278B[num].irq_line = CLEAR_LINE;
638 YMF278B[num].clock_ratio = (float)clock / (float)YMF278B_STD_CLOCK;
639 }
640
YMF278B_sh_start(const struct MachineSound * msound)641 int YMF278B_sh_start( const struct MachineSound *msound )
642 {
643 char buf[2][40];
644 const char *name[2];
645 int vol[2];
646 struct YMF278B_interface *intf;
647 int i;
648
649 intf = msound->sound_interface;
650
651 for(i=0; i<intf->num; i++)
652 {
653 sprintf(buf[0], "YMF278B %d L", i);
654 sprintf(buf[1], "YMF278B %d R", i);
655 name[0] = buf[0];
656 name[1] = buf[1];
657 vol[0]=intf->mixing_level[i] >> 16;
658 vol[1]=intf->mixing_level[i] & 0xffff;
659 ymf278b_init(i, memory_region(intf->region[0]), intf->irq_callback[i], intf->clock[i]);
660 stream_init_multi(2, name, vol, Machine->sample_rate, i, ymf278b_pcm_update);
661 }
662
663 /* Volume table, 1 = -0.375dB, 8 = -3dB, 256 = -96dB*/
664 for(i = 0; i < 256; i++)
665 volume[i] = 65536*pow(2.0, (-0.375/6)*i);
666 for(i = 256; i < 256*4; i++)
667 volume[i] = 0;
668
669 /* Pan values, units are -3dB, i.e. 8.*/
670 for(i = 0; i < 16; i++)
671 {
672 pan_left[i] = i < 7 ? i*8 : i < 9 ? 256 : 0;
673 pan_right[i] = i < 8 ? 0 : i < 10 ? 256 : (16-i)*8;
674 }
675
676 /* Mixing levels, units are -3dB, and add some marging to avoid clipping*/
677 for(i=0; i<7; i++)
678 mix_level[i] = volume[8*i+8];
679 mix_level[7] = 0;
680
681 return 0;
682 }
683
YMF278B_sh_stop(void)684 void YMF278B_sh_stop( void )
685 {
686 }
687
688
READ_HANDLER(YMF278B_status_port_0_r)689 READ_HANDLER( YMF278B_status_port_0_r )
690 {
691 return ymf278b_status_port_r(0);
692 }
693
READ_HANDLER(YMF278B_data_port_0_r)694 READ_HANDLER( YMF278B_data_port_0_r )
695 {
696 return ymf278b_data_port_r(0);
697 }
698
WRITE_HANDLER(YMF278B_control_port_0_A_w)699 WRITE_HANDLER( YMF278B_control_port_0_A_w )
700 {
701 ymf278b_control_port_A_w(0, data);
702 }
703
WRITE_HANDLER(YMF278B_data_port_0_A_w)704 WRITE_HANDLER( YMF278B_data_port_0_A_w )
705 {
706 ymf278b_data_port_A_w(0, data);
707 }
708
WRITE_HANDLER(YMF278B_control_port_0_B_w)709 WRITE_HANDLER( YMF278B_control_port_0_B_w )
710 {
711 ymf278b_control_port_B_w(0, data);
712 }
713
WRITE_HANDLER(YMF278B_data_port_0_B_w)714 WRITE_HANDLER( YMF278B_data_port_0_B_w )
715 {
716 ymf278b_data_port_B_w(0, data);
717 }
718
WRITE_HANDLER(YMF278B_control_port_0_C_w)719 WRITE_HANDLER( YMF278B_control_port_0_C_w )
720 {
721 ymf278b_control_port_C_w(0, data);
722 }
723
WRITE_HANDLER(YMF278B_data_port_0_C_w)724 WRITE_HANDLER( YMF278B_data_port_0_C_w )
725 {
726 ymf278b_data_port_C_w(0, data);
727 }
728
729
READ_HANDLER(YMF278B_status_port_1_r)730 READ_HANDLER( YMF278B_status_port_1_r )
731 {
732 return ymf278b_status_port_r(1);
733 }
734
READ_HANDLER(YMF278B_data_port_1_r)735 READ_HANDLER( YMF278B_data_port_1_r )
736 {
737 return ymf278b_data_port_r(1);
738 }
739
WRITE_HANDLER(YMF278B_control_port_1_A_w)740 WRITE_HANDLER( YMF278B_control_port_1_A_w )
741 {
742 ymf278b_control_port_A_w(1, data);
743 }
744
WRITE_HANDLER(YMF278B_data_port_1_A_w)745 WRITE_HANDLER( YMF278B_data_port_1_A_w )
746 {
747 ymf278b_data_port_A_w(1, data);
748 }
749
WRITE_HANDLER(YMF278B_control_port_1_B_w)750 WRITE_HANDLER( YMF278B_control_port_1_B_w )
751 {
752 ymf278b_control_port_B_w(1, data);
753 }
754
WRITE_HANDLER(YMF278B_data_port_1_B_w)755 WRITE_HANDLER( YMF278B_data_port_1_B_w )
756 {
757 ymf278b_data_port_B_w(1, data);
758 }
759
WRITE_HANDLER(YMF278B_control_port_1_C_w)760 WRITE_HANDLER( YMF278B_control_port_1_C_w )
761 {
762 ymf278b_control_port_C_w(1, data);
763 }
764
WRITE_HANDLER(YMF278B_data_port_1_C_w)765 WRITE_HANDLER( YMF278B_data_port_1_C_w )
766 {
767 ymf278b_data_port_C_w(1, data);
768 }
769