1 // Copyright 2009-2021 Intel Corporation
2 // SPDX-License-Identifier: Apache-2.0
3 
4 #pragma once
5 
6 #define CACHELINE_SIZE 64
7 
8 #if !defined(PAGE_SIZE)
9   #define PAGE_SIZE 4096
10 #endif
11 
12 #define PAGE_SIZE_2M (2*1024*1024)
13 #define PAGE_SIZE_4K (4*1024)
14 
15 #include "platform.h"
16 
17 /* define isa namespace and ISA bitvector */
18 #if defined (__AVX512VL__)
19 #  define isa avx512
20 #  define ISA AVX512
21 #  define ISA_STR "AVX512"
22 #elif defined (__AVX2__)
23 #  define isa avx2
24 #  define ISA AVX2
25 #  define ISA_STR "AVX2"
26 #elif defined(__AVXI__)
27 #  define isa avxi
28 #  define ISA AVXI
29 #  define ISA_STR "AVXI"
30 #elif defined(__AVX__)
31 #  define isa avx
32 #  define ISA AVX
33 #  define ISA_STR "AVX"
34 #elif defined (__SSE4_2__)
35 #  define isa sse42
36 #  define ISA SSE42
37 #  define ISA_STR "SSE4.2"
38 //#elif defined (__SSE4_1__) //  we demote this to SSE2, MacOSX code compiles with SSE41 by default with XCode 11
39 //#  define isa sse41
40 //#  define ISA SSE41
41 //#  define ISA_STR "SSE4.1"
42 //#elif defined(__SSSE3__) // we demote this to SSE2, MacOSX code compiles with SSSE3 by default with ICC
43 //#  define isa ssse3
44 //#  define ISA SSSE3
45 //#  define ISA_STR "SSSE3"
46 //#elif defined(__SSE3__) // we demote this to SSE2, MacOSX code compiles with SSE3 by default with clang
47 //#  define isa sse3
48 //#  define ISA SSE3
49 //#  define ISA_STR "SSE3"
50 #elif defined(__SSE2__) || defined(__SSE3__) || defined(__SSSE3__)
51 #  define isa sse2
52 #  define ISA SSE2
53 #  define ISA_STR "SSE2"
54 #elif defined(__SSE__)
55 #  define isa sse
56 #  define ISA SSE
57 #  define ISA_STR "SSE"
58 #else
59 #error Unknown ISA
60 #endif
61 
62 namespace embree
63 {
64   enum class CPU
65   {
66     XEON_ICE_LAKE,
67     CORE_ICE_LAKE,
68     CORE_TIGER_LAKE,
69     CORE_COMET_LAKE,
70     CORE_CANNON_LAKE,
71     CORE_KABY_LAKE,
72     XEON_SKY_LAKE,
73     CORE_SKY_LAKE,
74     XEON_PHI_KNIGHTS_MILL,
75     XEON_PHI_KNIGHTS_LANDING,
76     XEON_BROADWELL,
77     CORE_BROADWELL,
78     XEON_HASWELL,
79     CORE_HASWELL,
80     XEON_IVY_BRIDGE,
81     CORE_IVY_BRIDGE,
82     SANDY_BRIDGE,
83     NEHALEM,
84     CORE2,
85     CORE1,
86     ARM,
87     UNKNOWN,
88   };
89 
90   /*! get the full path to the running executable */
91   std::string getExecutableFileName();
92 
93   /*! return platform name */
94   std::string getPlatformName();
95 
96   /*! get the full name of the compiler */
97   std::string getCompilerName();
98 
99   /*! return the name of the CPU */
100   std::string getCPUVendor();
101 
102   /*! get microprocessor model */
103   CPU getCPUModel();
104 
105   /*! converts CPU model into string */
106   std::string stringOfCPUModel(CPU model);
107 
108   /*! CPU features */
109   static const int CPU_FEATURE_SSE    = 1 << 0;
110   static const int CPU_FEATURE_SSE2   = 1 << 1;
111   static const int CPU_FEATURE_SSE3   = 1 << 2;
112   static const int CPU_FEATURE_SSSE3  = 1 << 3;
113   static const int CPU_FEATURE_SSE41  = 1 << 4;
114   static const int CPU_FEATURE_SSE42  = 1 << 5;
115   static const int CPU_FEATURE_POPCNT = 1 << 6;
116   static const int CPU_FEATURE_AVX    = 1 << 7;
117   static const int CPU_FEATURE_F16C   = 1 << 8;
118   static const int CPU_FEATURE_RDRAND = 1 << 9;
119   static const int CPU_FEATURE_AVX2   = 1 << 10;
120   static const int CPU_FEATURE_FMA3   = 1 << 11;
121   static const int CPU_FEATURE_LZCNT  = 1 << 12;
122   static const int CPU_FEATURE_BMI1   = 1 << 13;
123   static const int CPU_FEATURE_BMI2   = 1 << 14;
124   static const int CPU_FEATURE_AVX512F = 1 << 16;
125   static const int CPU_FEATURE_AVX512DQ = 1 << 17;
126   static const int CPU_FEATURE_AVX512PF = 1 << 18;
127   static const int CPU_FEATURE_AVX512ER = 1 << 19;
128   static const int CPU_FEATURE_AVX512CD = 1 << 20;
129   static const int CPU_FEATURE_AVX512BW = 1 << 21;
130   static const int CPU_FEATURE_AVX512VL = 1 << 22;
131   static const int CPU_FEATURE_AVX512IFMA = 1 << 23;
132   static const int CPU_FEATURE_AVX512VBMI = 1 << 24;
133   static const int CPU_FEATURE_XMM_ENABLED = 1 << 25;
134   static const int CPU_FEATURE_YMM_ENABLED = 1 << 26;
135   static const int CPU_FEATURE_ZMM_ENABLED = 1 << 27;
136 
137   /*! get CPU features */
138   int getCPUFeatures();
139 
140   /*! convert CPU features into a string */
141   std::string stringOfCPUFeatures(int features);
142 
143   /*! creates a string of all supported targets that are supported */
144   std::string supportedTargetList (int isa);
145 
146   /*! ISAs */
147   static const int SSE    = CPU_FEATURE_SSE | CPU_FEATURE_XMM_ENABLED;
148   static const int SSE2   = SSE | CPU_FEATURE_SSE2;
149   static const int SSE3   = SSE2 | CPU_FEATURE_SSE3;
150   static const int SSSE3  = SSE3 | CPU_FEATURE_SSSE3;
151   static const int SSE41  = SSSE3 | CPU_FEATURE_SSE41;
152   static const int SSE42  = SSE41 | CPU_FEATURE_SSE42 | CPU_FEATURE_POPCNT;
153   static const int AVX    = SSE42 | CPU_FEATURE_AVX | CPU_FEATURE_YMM_ENABLED;
154   static const int AVXI   = AVX | CPU_FEATURE_F16C | CPU_FEATURE_RDRAND;
155   static const int AVX2   = AVXI | CPU_FEATURE_AVX2 | CPU_FEATURE_FMA3 | CPU_FEATURE_BMI1 | CPU_FEATURE_BMI2 | CPU_FEATURE_LZCNT;
156   static const int AVX512 = AVX2 | CPU_FEATURE_AVX512F | CPU_FEATURE_AVX512DQ | CPU_FEATURE_AVX512CD | CPU_FEATURE_AVX512BW | CPU_FEATURE_AVX512VL | CPU_FEATURE_ZMM_ENABLED;
157 
158   /*! converts ISA bitvector into a string */
159   std::string stringOfISA(int features);
160 
161   /*! return the number of logical threads of the system */
162   unsigned int getNumberOfLogicalThreads();
163 
164   /*! returns the size of the terminal window in characters */
165   int getTerminalWidth();
166 
167   /*! returns performance counter in seconds */
168   double getSeconds();
169 
170   /*! sleeps the specified number of seconds */
171   void sleepSeconds(double t);
172 
173   /*! returns virtual address space occupied by process */
174   size_t getVirtualMemoryBytes();
175 
176   /*! returns resident memory required by process */
177   size_t getResidentMemoryBytes();
178 }
179