1 /*
2  * Copyright © 2012 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  */
23 
24 #include "brw_fs.h"
25 #include "brw_cfg.h"
26 
27 /** @file brw_fs_cse.cpp
28  *
29  * Support for local common subexpression elimination.
30  *
31  * See Muchnick's Advanced Compiler Design and Implementation, section
32  * 13.1 (p378).
33  */
34 
35 using namespace brw;
36 
37 namespace {
38 struct aeb_entry : public exec_node {
39    /** The instruction that generates the expression value. */
40    fs_inst *generator;
41 
42    /** The temporary where the value is stored. */
43    fs_reg tmp;
44 };
45 }
46 
47 static bool
is_expression(const fs_visitor * v,const fs_inst * const inst)48 is_expression(const fs_visitor *v, const fs_inst *const inst)
49 {
50    switch (inst->opcode) {
51    case BRW_OPCODE_MOV:
52    case BRW_OPCODE_SEL:
53    case BRW_OPCODE_NOT:
54    case BRW_OPCODE_AND:
55    case BRW_OPCODE_OR:
56    case BRW_OPCODE_XOR:
57    case BRW_OPCODE_SHR:
58    case BRW_OPCODE_SHL:
59    case BRW_OPCODE_ASR:
60    case BRW_OPCODE_CMP:
61    case BRW_OPCODE_CMPN:
62    case BRW_OPCODE_ADD:
63    case BRW_OPCODE_MUL:
64    case SHADER_OPCODE_MULH:
65    case BRW_OPCODE_FRC:
66    case BRW_OPCODE_RNDU:
67    case BRW_OPCODE_RNDD:
68    case BRW_OPCODE_RNDE:
69    case BRW_OPCODE_RNDZ:
70    case BRW_OPCODE_LINE:
71    case BRW_OPCODE_PLN:
72    case BRW_OPCODE_MAD:
73    case BRW_OPCODE_LRP:
74    case FS_OPCODE_FB_READ_LOGICAL:
75    case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
76    case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_LOGICAL:
77    case FS_OPCODE_LINTERP:
78    case SHADER_OPCODE_FIND_LIVE_CHANNEL:
79    case FS_OPCODE_LOAD_LIVE_CHANNELS:
80    case SHADER_OPCODE_BROADCAST:
81    case SHADER_OPCODE_MOV_INDIRECT:
82    case SHADER_OPCODE_TEX_LOGICAL:
83    case SHADER_OPCODE_TXD_LOGICAL:
84    case SHADER_OPCODE_TXF_LOGICAL:
85    case SHADER_OPCODE_TXL_LOGICAL:
86    case SHADER_OPCODE_TXS_LOGICAL:
87    case FS_OPCODE_TXB_LOGICAL:
88    case SHADER_OPCODE_TXF_CMS_LOGICAL:
89    case SHADER_OPCODE_TXF_CMS_W_LOGICAL:
90    case SHADER_OPCODE_TXF_UMS_LOGICAL:
91    case SHADER_OPCODE_TXF_MCS_LOGICAL:
92    case SHADER_OPCODE_LOD_LOGICAL:
93    case SHADER_OPCODE_TG4_LOGICAL:
94    case SHADER_OPCODE_TG4_OFFSET_LOGICAL:
95    case FS_OPCODE_PACK:
96       return true;
97    case SHADER_OPCODE_RCP:
98    case SHADER_OPCODE_RSQ:
99    case SHADER_OPCODE_SQRT:
100    case SHADER_OPCODE_EXP2:
101    case SHADER_OPCODE_LOG2:
102    case SHADER_OPCODE_POW:
103    case SHADER_OPCODE_INT_QUOTIENT:
104    case SHADER_OPCODE_INT_REMAINDER:
105    case SHADER_OPCODE_SIN:
106    case SHADER_OPCODE_COS:
107       return inst->mlen < 2;
108    case SHADER_OPCODE_LOAD_PAYLOAD:
109       return !is_coalescing_payload(v->alloc, inst);
110    default:
111       return inst->is_send_from_grf() && !inst->has_side_effects() &&
112          !inst->is_volatile();
113    }
114 }
115 
116 static bool
operands_match(const fs_inst * a,const fs_inst * b,bool * negate)117 operands_match(const fs_inst *a, const fs_inst *b, bool *negate)
118 {
119    fs_reg *xs = a->src;
120    fs_reg *ys = b->src;
121 
122    if (a->opcode == BRW_OPCODE_MAD) {
123       return xs[0].equals(ys[0]) &&
124              ((xs[1].equals(ys[1]) && xs[2].equals(ys[2])) ||
125               (xs[2].equals(ys[1]) && xs[1].equals(ys[2])));
126    } else if (a->opcode == BRW_OPCODE_MUL && a->dst.type == BRW_REGISTER_TYPE_F) {
127       bool xs0_negate = xs[0].negate;
128       bool xs1_negate = xs[1].file == IMM ? xs[1].f < 0.0f
129                                           : xs[1].negate;
130       bool ys0_negate = ys[0].negate;
131       bool ys1_negate = ys[1].file == IMM ? ys[1].f < 0.0f
132                                           : ys[1].negate;
133       float xs1_imm = xs[1].f;
134       float ys1_imm = ys[1].f;
135 
136       xs[0].negate = false;
137       xs[1].negate = false;
138       ys[0].negate = false;
139       ys[1].negate = false;
140       xs[1].f = fabsf(xs[1].f);
141       ys[1].f = fabsf(ys[1].f);
142 
143       bool ret = (xs[0].equals(ys[0]) && xs[1].equals(ys[1])) ||
144                  (xs[1].equals(ys[0]) && xs[0].equals(ys[1]));
145 
146       xs[0].negate = xs0_negate;
147       xs[1].negate = xs[1].file == IMM ? false : xs1_negate;
148       ys[0].negate = ys0_negate;
149       ys[1].negate = ys[1].file == IMM ? false : ys1_negate;
150       xs[1].f = xs1_imm;
151       ys[1].f = ys1_imm;
152 
153       *negate = (xs0_negate != xs1_negate) != (ys0_negate != ys1_negate);
154       if (*negate && (a->saturate || b->saturate))
155          return false;
156       return ret;
157    } else if (!a->is_commutative()) {
158       bool match = true;
159       for (int i = 0; i < a->sources; i++) {
160          if (!xs[i].equals(ys[i])) {
161             match = false;
162             break;
163          }
164       }
165       return match;
166    } else {
167       return (xs[0].equals(ys[0]) && xs[1].equals(ys[1])) ||
168              (xs[1].equals(ys[0]) && xs[0].equals(ys[1]));
169    }
170 }
171 
172 static bool
instructions_match(fs_inst * a,fs_inst * b,bool * negate)173 instructions_match(fs_inst *a, fs_inst *b, bool *negate)
174 {
175    return a->opcode == b->opcode &&
176           a->force_writemask_all == b->force_writemask_all &&
177           a->exec_size == b->exec_size &&
178           a->group == b->group &&
179           a->saturate == b->saturate &&
180           a->predicate == b->predicate &&
181           a->predicate_inverse == b->predicate_inverse &&
182           a->conditional_mod == b->conditional_mod &&
183           a->flag_subreg == b->flag_subreg &&
184           a->dst.type == b->dst.type &&
185           a->offset == b->offset &&
186           a->mlen == b->mlen &&
187           a->ex_mlen == b->ex_mlen &&
188           a->sfid == b->sfid &&
189           a->desc == b->desc &&
190           a->size_written == b->size_written &&
191           a->base_mrf == b->base_mrf &&
192           a->check_tdr == b->check_tdr &&
193           a->send_has_side_effects == b->send_has_side_effects &&
194           a->eot == b->eot &&
195           a->header_size == b->header_size &&
196           a->shadow_compare == b->shadow_compare &&
197           a->pi_noperspective == b->pi_noperspective &&
198           a->target == b->target &&
199           a->sources == b->sources &&
200           operands_match(a, b, negate);
201 }
202 
203 static void
create_copy_instr(const fs_builder & bld,fs_inst * inst,fs_reg src,bool negate)204 create_copy_instr(const fs_builder &bld, fs_inst *inst, fs_reg src, bool negate)
205 {
206    unsigned written = regs_written(inst);
207    unsigned dst_width =
208       DIV_ROUND_UP(inst->dst.component_size(inst->exec_size), REG_SIZE);
209    fs_inst *copy;
210 
211    if (inst->opcode == SHADER_OPCODE_LOAD_PAYLOAD) {
212       assert(src.file == VGRF);
213       fs_reg *payload = ralloc_array(bld.shader->mem_ctx, fs_reg,
214                                      inst->sources);
215       for (int i = 0; i < inst->header_size; i++) {
216          payload[i] = src;
217          src.offset += REG_SIZE;
218       }
219       for (int i = inst->header_size; i < inst->sources; i++) {
220          src.type = inst->src[i].type;
221          payload[i] = src;
222          src = offset(src, bld, 1);
223       }
224       copy = bld.LOAD_PAYLOAD(inst->dst, payload, inst->sources,
225                               inst->header_size);
226    } else if (written != dst_width) {
227       assert(src.file == VGRF);
228       assert(written % dst_width == 0);
229       const int sources = written / dst_width;
230       fs_reg *payload = ralloc_array(bld.shader->mem_ctx, fs_reg, sources);
231       for (int i = 0; i < sources; i++) {
232          payload[i] = src;
233          src = offset(src, bld, 1);
234       }
235       copy = bld.LOAD_PAYLOAD(inst->dst, payload, sources, 0);
236    } else {
237       copy = bld.MOV(inst->dst, src);
238       copy->group = inst->group;
239       copy->force_writemask_all = inst->force_writemask_all;
240       copy->src[0].negate = negate;
241    }
242    assert(regs_written(copy) == written);
243 }
244 
245 bool
opt_cse_local(const fs_live_variables & live,bblock_t * block,int & ip)246 fs_visitor::opt_cse_local(const fs_live_variables &live, bblock_t *block, int &ip)
247 {
248    bool progress = false;
249    exec_list aeb;
250 
251    void *cse_ctx = ralloc_context(NULL);
252 
253    foreach_inst_in_block(fs_inst, inst, block) {
254       /* Skip some cases. */
255       if (is_expression(this, inst) && !inst->is_partial_write() &&
256           ((inst->dst.file != ARF && inst->dst.file != FIXED_GRF) ||
257            inst->dst.is_null()))
258       {
259          bool found = false;
260          bool negate = false;
261 
262          foreach_in_list_use_after(aeb_entry, entry, &aeb) {
263             /* Match current instruction's expression against those in AEB. */
264             if (!(entry->generator->dst.is_null() && !inst->dst.is_null()) &&
265                 instructions_match(inst, entry->generator, &negate)) {
266                found = true;
267                progress = true;
268                break;
269             }
270          }
271 
272          if (!found) {
273             if (inst->opcode != BRW_OPCODE_MOV ||
274                 (inst->opcode == BRW_OPCODE_MOV &&
275                  inst->src[0].file == IMM &&
276                  inst->src[0].type == BRW_REGISTER_TYPE_VF)) {
277                /* Our first sighting of this expression.  Create an entry. */
278                aeb_entry *entry = ralloc(cse_ctx, aeb_entry);
279                entry->tmp = reg_undef;
280                entry->generator = inst;
281                aeb.push_tail(entry);
282             }
283          } else {
284             /* This is at least our second sighting of this expression.
285              * If we don't have a temporary already, make one.
286              */
287             bool no_existing_temp = entry->tmp.file == BAD_FILE;
288             if (no_existing_temp && !entry->generator->dst.is_null()) {
289                const fs_builder ibld = fs_builder(this, block, entry->generator)
290                                        .at(block, entry->generator->next);
291                int written = regs_written(entry->generator);
292 
293                entry->tmp = fs_reg(VGRF, alloc.allocate(written),
294                                    entry->generator->dst.type);
295 
296                create_copy_instr(ibld, entry->generator, entry->tmp, false);
297 
298                entry->generator->dst = entry->tmp;
299             }
300 
301             /* dest <- temp */
302             if (!inst->dst.is_null()) {
303                assert(inst->size_written == entry->generator->size_written);
304                assert(inst->dst.type == entry->tmp.type);
305                const fs_builder ibld(this, block, inst);
306 
307                create_copy_instr(ibld, inst, entry->tmp, negate);
308             }
309 
310             /* Set our iterator so that next time through the loop inst->next
311              * will get the instruction in the basic block after the one we've
312              * removed.
313              */
314             fs_inst *prev = (fs_inst *)inst->prev;
315 
316             inst->remove(block);
317             inst = prev;
318          }
319       }
320 
321       /* Discard jumps aren't represented in the CFG unfortunately, so we need
322        * to make sure that they behave as a CSE barrier, since we lack global
323        * dataflow information.  This is particularly likely to cause problems
324        * with instructions dependent on the current execution mask like
325        * SHADER_OPCODE_FIND_LIVE_CHANNEL.
326        */
327       if (inst->opcode == BRW_OPCODE_HALT ||
328           inst->opcode == SHADER_OPCODE_HALT_TARGET)
329          aeb.make_empty();
330 
331       foreach_in_list_safe(aeb_entry, entry, &aeb) {
332          /* Kill all AEB entries that write a different value to or read from
333           * the flag register if we just wrote it.
334           */
335          if (inst->flags_written(devinfo)) {
336             bool negate; /* dummy */
337             if (entry->generator->flags_read(devinfo) ||
338                 (entry->generator->flags_written(devinfo) &&
339                  !instructions_match(inst, entry->generator, &negate))) {
340                entry->remove();
341                ralloc_free(entry);
342                continue;
343             }
344          }
345 
346          for (int i = 0; i < entry->generator->sources; i++) {
347             fs_reg *src_reg = &entry->generator->src[i];
348 
349             /* Kill all AEB entries that use the destination we just
350              * overwrote.
351              */
352             if (regions_overlap(inst->dst, inst->size_written,
353                                 entry->generator->src[i],
354                                 entry->generator->size_read(i))) {
355                entry->remove();
356                ralloc_free(entry);
357                break;
358             }
359 
360             /* Kill any AEB entries using registers that don't get reused any
361              * more -- a sure sign they'll fail operands_match().
362              */
363             if (src_reg->file == VGRF && live.vgrf_end[src_reg->nr] < ip) {
364                entry->remove();
365                ralloc_free(entry);
366                break;
367             }
368          }
369       }
370 
371       ip++;
372    }
373 
374    ralloc_free(cse_ctx);
375 
376    return progress;
377 }
378 
379 bool
opt_cse()380 fs_visitor::opt_cse()
381 {
382    const fs_live_variables &live = live_analysis.require();
383    bool progress = false;
384    int ip = 0;
385 
386    foreach_block (block, cfg) {
387       progress = opt_cse_local(live, block, ip) || progress;
388    }
389 
390    if (progress)
391       invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
392 
393    return progress;
394 }
395