1# RUN: llc %s -o - -experimental-debug-variable-locations \ 2# RUN: -run-pass=livedebugvalues | \ 3# RUN: FileCheck %s --implicit-check-not=DBG_VALUE 4# 5# Test that spills of live values to the stack are tracked by LiveDebugValues. 6# (Note that I've retained the original reduced LLVM-IR in this test to ease 7# regeneration of this test). 8# 9# Prior versions of LiveDebugValues only recognised spills to the stack if the 10# source register was also killed. This often isn't the case, if a value is 11# needed immediately and later in a function: for example in this test. 12# 13# Test that instr-ref LiveDebugValues is able to track r10's value from the 14# entry block through its stored to the stack, to where it's reloaded in block 15# 8 and used for a comparison and a DBG_INSTR_REF. A valid variable location 16# should be emitted -- it's not too important what the location is, this test 17# is that LiveDebugValues can track the value, not where it puts it. 18# 19## Capture variable num, 20# CHECK: ![[VARNUM:[0-9]+]] = !DILocalVariable 21# 22# CHECK-LABEL: bb.8: 23# CHECK: DBG_VALUE $rsp, 0, ![[VARNUM]], !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_LLVM_fragment, 64, 64), 24# CHECK-LABEL: bb.9: 25# CHECK: DBG_VALUE $rsp, 0, ![[VARNUM]], !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_LLVM_fragment, 64, 64), 26 27--- | 28 ; ModuleID = 'missingvar.ll' 29 source_filename = "/fast/fs/llvm34/lib/Analysis/LoopPass.cpp" 30 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" 31 target triple = "x86_64-unknown-linux-gnu" 32 33 %"class.std::deque" = type { %"class.std::_Deque_base" } 34 %"class.std::_Deque_base" = type { %"struct.std::_Deque_base<llvm::Loop *, std::allocator<llvm::Loop *>>::_Deque_impl" } 35 %"struct.std::_Deque_base<llvm::Loop *, std::allocator<llvm::Loop *>>::_Deque_impl" = type { %"class.llvm::Loop"***, i64, %"struct.std::_Deque_iterator", %"struct.std::_Deque_iterator" } 36 %"class.llvm::Loop" = type opaque 37 %"struct.std::_Deque_iterator" = type { %"class.llvm::Loop"**, %"class.llvm::Loop"**, %"class.llvm::Loop"**, %"class.llvm::Loop"*** } 38 39 define linkonce_odr void @_ZNSt5dequeIPN4llvm4LoopESaIS2_EE13_M_insert_auxESt15_Deque_iteratorIS2_RS2_PS2_EmRKS2_(%"class.std::deque"* %this, %"struct.std::_Deque_iterator"* %__pos, i64 %__n) local_unnamed_addr align 2 !dbg !3 { 40 entry: 41 %0 = load %"class.llvm::Loop"**, %"class.llvm::Loop"*** undef, align 8, !dbg !7 42 %_M_cur6.i = getelementptr inbounds %"class.std::deque", %"class.std::deque"* %this, i64 0, i32 0, i32 0, i32 2, i32 0, !dbg !7 43 %1 = load %"class.llvm::Loop"**, %"class.llvm::Loop"*** %_M_cur6.i, align 8, !dbg !7 44 %2 = load %"class.llvm::Loop"**, %"class.llvm::Loop"*** undef, align 8, !dbg !7 45 br i1 undef, label %if.then.i851, label %if.end.i856, !dbg !7 46 47 if.then.i851: ; preds = %entry 48 %.pre1038 = load %"class.llvm::Loop"**, %"class.llvm::Loop"*** undef, align 8, !dbg !7 49 %3 = bitcast %"class.std::deque"* %this to i8*, !dbg !7 50 %sunkaddr = getelementptr inbounds i8, i8* %3, i64 40, !dbg !7 51 %4 = bitcast i8* %sunkaddr to %"class.llvm::Loop"****, !dbg !7 52 %.pre1039 = load %"class.llvm::Loop"***, %"class.llvm::Loop"**** %4, align 8, !dbg !7 53 br label %if.end.i856, !dbg !7 54 55 if.end.i856: ; preds = %if.then.i851, %entry 56 %5 = phi %"class.llvm::Loop"*** [ %.pre1039, %if.then.i851 ], [ undef, %entry ], !dbg !7 57 %6 = phi %"class.llvm::Loop"** [ %.pre1038, %if.then.i851 ], [ %0, %entry ], !dbg !7 58 %sub.i.i.i853 = sub nsw i64 0, %__n, !dbg !7 59 %add.ptr.i.i.i.i859 = getelementptr inbounds %"class.llvm::Loop"*, %"class.llvm::Loop"** %1, i64 %sub.i.i.i853, !dbg !7 60 store %"class.llvm::Loop"** %6, %"class.llvm::Loop"*** undef, align 8, !dbg !7 61 %7 = bitcast %"struct.std::_Deque_iterator"* %__pos to i8*, !dbg !7 62 %sunkaddr1 = getelementptr inbounds i8, i8* %7, i64 24, !dbg !7 63 %8 = bitcast i8* %sunkaddr1 to %"class.llvm::Loop"****, !dbg !7 64 store %"class.llvm::Loop"*** %5, %"class.llvm::Loop"**** %8, align 8, !dbg !7 65 %9 = bitcast %"class.std::deque"* %this to i8*, !dbg !7 66 %sunkaddr2 = getelementptr inbounds i8, i8* %9, i64 16, !dbg !7 67 %10 = bitcast i8* %sunkaddr2 to %"class.llvm::Loop"***, !dbg !7 68 %11 = load %"class.llvm::Loop"**, %"class.llvm::Loop"*** %10, align 8, !dbg !7 69 %12 = load %"class.llvm::Loop"**, %"class.llvm::Loop"*** undef, align 8, !dbg !7 70 %13 = bitcast %"class.std::deque"* %this to i8*, !dbg !7 71 %sunkaddr3 = getelementptr inbounds i8, i8* %13, i64 40, !dbg !7 72 %14 = bitcast i8* %sunkaddr3 to %"class.llvm::Loop"****, !dbg !7 73 %15 = load %"class.llvm::Loop"***, %"class.llvm::Loop"**** %14, align 8, !dbg !7 74 br i1 undef, label %if.then.i.i775, label %cond.true.i.i777, !dbg !7 75 76 if.then.i.i775: ; preds = %if.end.i856 77 %add.ptr.i.i774 = getelementptr inbounds %"class.llvm::Loop"*, %"class.llvm::Loop"** %11, i64 %__n, !dbg !7 78 br label %_ZNKSt15_Deque_iteratorIPN4llvm4LoopERS2_PS2_EplEl.exit796, !dbg !7 79 80 cond.true.i.i777: ; preds = %if.end.i856 81 %16 = load %"class.llvm::Loop"**, %"class.llvm::Loop"*** undef, align 8, !dbg !7 82 %.pre1043 = ptrtoint %"class.llvm::Loop"** %16 to i64, !dbg !7 83 br label %_ZNKSt15_Deque_iteratorIPN4llvm4LoopERS2_PS2_EplEl.exit796 84 85 _ZNKSt15_Deque_iteratorIPN4llvm4LoopERS2_PS2_EplEl.exit796: ; preds = %cond.true.i.i777, %if.then.i.i775 86 %sub.ptr.rhs.cast3.i.i.i.i.i.i.i.i.i690.pre-phi = phi i64 [ undef, %if.then.i.i775 ], [ %.pre1043, %cond.true.i.i777 ], !dbg !7 87 %__tmp.sroa.13.0.i788 = phi %"class.llvm::Loop"*** [ %15, %if.then.i.i775 ], [ undef, %cond.true.i.i777 ], !dbg !7 88 %__tmp.sroa.10.0.i789 = phi %"class.llvm::Loop"** [ %12, %if.then.i.i775 ], [ undef, %cond.true.i.i777 ], !dbg !7 89 %storemerge.i.i791 = phi %"class.llvm::Loop"** [ %add.ptr.i.i774, %if.then.i.i775 ], [ undef, %cond.true.i.i777 ], !dbg !7 90 %17 = ptrtoint %"class.llvm::Loop"** %11 to i64, !dbg !7 91 %sub.ptr.lhs.cast.i.i.i.i.i.i.i.i.i685 = ptrtoint %"class.llvm::Loop"*** %__tmp.sroa.13.0.i788 to i64, !dbg !7 92 %sub.ptr.rhs.cast.i.i.i.i.i.i.i.i.i686 = ptrtoint %"class.llvm::Loop"*** %15 to i64, !dbg !7 93 %sub.ptr.sub.i.i.i.i.i.i.i.i.i687 = sub i64 %sub.ptr.lhs.cast.i.i.i.i.i.i.i.i.i685, %sub.ptr.rhs.cast.i.i.i.i.i.i.i.i.i686, !dbg !7 94 %sub.i.i.i.i.i.i.i.i.i688 = shl i64 %sub.ptr.sub.i.i.i.i.i.i.i.i.i687, 3, !dbg !7 95 %sub.ptr.lhs.cast2.i.i.i.i.i.i.i.i.i689 = ptrtoint %"class.llvm::Loop"** %storemerge.i.i791 to i64, !dbg !7 96 %sub.ptr.sub4.i.i.i.i.i.i.i.i.i691 = sub i64 %sub.ptr.lhs.cast2.i.i.i.i.i.i.i.i.i689, %sub.ptr.rhs.cast3.i.i.i.i.i.i.i.i.i690.pre-phi, !dbg !7 97 %sub.ptr.div5.i.i.i.i.i.i.i.i.i692 = ashr exact i64 %sub.ptr.sub4.i.i.i.i.i.i.i.i.i691, 3, !dbg !7 98 %sub.ptr.lhs.cast7.i.i.i.i.i.i.i.i.i693 = ptrtoint %"class.llvm::Loop"** %12 to i64, !dbg !7 99 %sub.ptr.sub9.i.i.i.i.i.i.i.i.i695 = sub i64 %sub.ptr.lhs.cast7.i.i.i.i.i.i.i.i.i693, %17, !dbg !7 100 %sub.ptr.div10.i.i.i.i.i.i.i.i.i696 = ashr exact i64 %sub.ptr.sub9.i.i.i.i.i.i.i.i.i695, 3, !dbg !7 101 %mul.i.i.i.i.i.i.i.i.i697 = add nsw i64 %sub.ptr.div10.i.i.i.i.i.i.i.i.i696, -64, !dbg !7 102 %add.i.i.i.i.i.i.i.i.i698 = add i64 %mul.i.i.i.i.i.i.i.i.i697, %sub.i.i.i.i.i.i.i.i.i688, !dbg !7 103 %add11.i.i.i.i.i.i.i.i.i699 = add i64 %add.i.i.i.i.i.i.i.i.i698, %sub.ptr.div5.i.i.i.i.i.i.i.i.i692, !dbg !7 104 %cmp27.i.i.i.i.i.i.i.i700 = icmp sgt i64 %add11.i.i.i.i.i.i.i.i.i699, 0, !dbg !7 105 br i1 %cmp27.i.i.i.i.i.i.i.i700, label %for.body.i.i.i.i.i.i.i.i711.preheader, label %_ZSt22__uninitialized_move_aISt15_Deque_iteratorIPN4llvm4LoopERS3_PS3_ES6_SaIS3_EET0_T_S9_S8_RT1_.exit737, !dbg !7 106 107 for.body.i.i.i.i.i.i.i.i711.preheader: ; preds = %_ZNKSt15_Deque_iteratorIPN4llvm4LoopERS2_PS2_EplEl.exit796 108 %18 = load %"class.llvm::Loop"*, %"class.llvm::Loop"** %11, align 8, !dbg !7 109 store %"class.llvm::Loop"* %18, %"class.llvm::Loop"** %add.ptr.i.i.i.i859, align 8, !dbg !7 110 ret void 111 112 _ZSt22__uninitialized_move_aISt15_Deque_iteratorIPN4llvm4LoopERS3_PS3_ES6_SaIS3_EET0_T_S9_S8_RT1_.exit737: ; preds = %_ZNKSt15_Deque_iteratorIPN4llvm4LoopERS2_PS2_EplEl.exit796 113 %19 = ptrtoint %"class.llvm::Loop"** %storemerge.i.i791 to i64, !dbg !7 114 %20 = ptrtoint %"class.llvm::Loop"*** %__tmp.sroa.13.0.i788 to i64, !dbg !7 115 %21 = bitcast %"class.std::deque"* %this to i8*, !dbg !7 116 %sunkaddr4 = getelementptr inbounds i8, i8* %21, i64 16, !dbg !7 117 %22 = bitcast i8* %sunkaddr4 to %"class.llvm::Loop"***, !dbg !7 118 store %"class.llvm::Loop"** %add.ptr.i.i.i.i859, %"class.llvm::Loop"*** %22, align 8, !dbg !7 119 store %"class.llvm::Loop"** %2, %"class.llvm::Loop"*** undef, align 8, !dbg !7 120 store %"class.llvm::Loop"** %6, %"class.llvm::Loop"*** undef, align 8, !dbg !7 121 %23 = bitcast %"class.std::deque"* %this to i8*, !dbg !7 122 %sunkaddr5 = getelementptr inbounds i8, i8* %23, i64 40, !dbg !7 123 %24 = bitcast i8* %sunkaddr5 to %"class.llvm::Loop"****, !dbg !7 124 store %"class.llvm::Loop"*** %5, %"class.llvm::Loop"**** %24, align 8, !dbg !7 125 %25 = bitcast %"struct.std::_Deque_iterator"* %__pos to i8*, !dbg !7 126 %sunkaddr6 = getelementptr inbounds i8, i8* %25, i64 24, !dbg !7 127 %26 = bitcast i8* %sunkaddr6 to %"class.llvm::Loop"****, !dbg !7 128 %27 = load %"class.llvm::Loop"***, %"class.llvm::Loop"**** %26, align 8, !dbg !7 129 call void @llvm.dbg.value(metadata %"class.llvm::Loop"** %2, metadata !8, metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64)), !dbg !7 130 %sub.ptr.lhs.cast.i.i.i597 = ptrtoint %"class.llvm::Loop"*** %27 to i64, !dbg !7 131 %sub.ptr.sub.i.i.i599 = sub i64 %sub.ptr.lhs.cast.i.i.i597, %20, !dbg !7 132 %sub.i.i.i600 = shl i64 %sub.ptr.sub.i.i.i599, 3, !dbg !7 133 %sub.ptr.div5.i.i.i604 = ashr exact i64 undef, 3, !dbg !7 134 %sub.ptr.lhs.cast7.i.i.i605 = ptrtoint %"class.llvm::Loop"** %__tmp.sroa.10.0.i789 to i64, !dbg !7 135 %sub.ptr.sub9.i.i.i607 = sub i64 %sub.ptr.lhs.cast7.i.i.i605, %19, !dbg !7 136 %sub.ptr.div10.i.i.i608 = ashr exact i64 %sub.ptr.sub9.i.i.i607, 3, !dbg !7 137 %mul.i.i.i609 = add nsw i64 %sub.ptr.div10.i.i.i608, -64, !dbg !7 138 %add.i.i.i610 = add nsw i64 %mul.i.i.i609, %sub.ptr.div5.i.i.i604, !dbg !7 139 %add11.i.i.i611 = add i64 %add.i.i.i610, %sub.i.i.i600, !dbg !7 140 %cmp68.i.i = icmp sgt i64 %add11.i.i.i611, 0, !dbg !7 141 br i1 %cmp68.i.i, label %while.body.i.i625, label %_ZSt4moveIPN4llvm4LoopEESt15_Deque_iteratorIT_RS4_PS4_ES7_S7_S7_.exit, !dbg !7 142 143 while.body.i.i625: ; preds = %_ZSt22__uninitialized_move_aISt15_Deque_iteratorIPN4llvm4LoopERS3_PS3_ES6_SaIS3_EET0_T_S9_S8_RT1_.exit737 144 ret void 145 146 _ZSt4moveIPN4llvm4LoopEESt15_Deque_iteratorIT_RS4_PS4_ES7_S7_S7_.exit: ; preds = %_ZSt22__uninitialized_move_aISt15_Deque_iteratorIPN4llvm4LoopERS3_PS3_ES6_SaIS3_EET0_T_S9_S8_RT1_.exit737 147 %add.i.i.i562 = sub i64 %sub.ptr.div5.i.i.i604, %__n, !dbg !7 148 %cmp.i.i.i563 = icmp sgt i64 %add.i.i.i562, -1, !dbg !7 149 br i1 %cmp.i.i.i563, label %land.lhs.true.i.i.i565, label %cond.false.i.i.i572, !dbg !7 150 151 land.lhs.true.i.i.i565: ; preds = %_ZSt4moveIPN4llvm4LoopEESt15_Deque_iteratorIT_RS4_PS4_ES7_S7_S7_.exit 152 ret void 153 154 cond.false.i.i.i572: ; preds = %_ZSt4moveIPN4llvm4LoopEESt15_Deque_iteratorIT_RS4_PS4_ES7_S7_S7_.exit 155 ret void 156 } 157 158 ; Function Attrs: nofree nosync nounwind readnone speculatable willreturn 159 declare void @llvm.dbg.value(metadata, metadata, metadata) #0 160 161 attributes #0 = { nofree nosync nounwind readnone speculatable willreturn } 162 163 !llvm.module.flags = !{!0} 164 !llvm.dbg.cu = !{!1} 165 166 !0 = !{i32 2, !"Debug Info Version", i32 3} 167 !1 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !2, producer: "beards", isOptimized: true, runtimeVersion: 4, emissionKind: FullDebug) 168 !2 = !DIFile(filename: "bees.cpp", directory: "") 169 !3 = distinct !DISubprogram(name: "nope", scope: !2, file: !2, line: 1, type: !4, spFlags: DISPFlagDefinition, unit: !1) 170 !4 = !DISubroutineType(types: !5) 171 !5 = !{!6} 172 !6 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed) 173 !7 = !DILocation(line: 1, scope: !3) 174 !8 = !DILocalVariable(name: "flannel", scope: !3) 175 176... 177--- 178name: _ZNSt5dequeIPN4llvm4LoopESaIS2_EE13_M_insert_auxESt15_Deque_iteratorIS2_RS2_PS2_EmRKS2_ 179alignment: 16 180tracksRegLiveness: true 181liveins: 182 - { reg: '$rdi' } 183 - { reg: '$rsi' } 184 - { reg: '$rdx' } 185frameInfo: 186 stackSize: 48 187 offsetAdjustment: -48 188 maxAlignment: 8 189 maxCallFrameSize: 0 190 cvBytesOfCalleeSavedRegisters: 48 191fixedStack: 192 - { id: 0, type: spill-slot, offset: -56, size: 8, alignment: 8, callee-saved-register: '$rbx' } 193 - { id: 1, type: spill-slot, offset: -48, size: 8, alignment: 16, callee-saved-register: '$r12' } 194 - { id: 2, type: spill-slot, offset: -40, size: 8, alignment: 8, callee-saved-register: '$r13' } 195 - { id: 3, type: spill-slot, offset: -32, size: 8, alignment: 16, callee-saved-register: '$r14' } 196 - { id: 4, type: spill-slot, offset: -24, size: 8, alignment: 8, callee-saved-register: '$r15' } 197 - { id: 5, type: spill-slot, offset: -16, size: 8, alignment: 16, callee-saved-register: '$rbp' } 198stack: 199 - { id: 0, type: spill-slot, offset: -64, size: 8, alignment: 8 } 200machineFunctionInfo: {} 201body: | 202 bb.0.entry: 203 successors: %bb.2, %bb.1 204 liveins: $rdi, $rdx, $rsi, $rbp, $r15, $r14, $r13, $r12, $rbx 205 206 frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp, debug-location !7 207 CFI_INSTRUCTION def_cfa_offset 16 208 frame-setup PUSH64r killed $r15, implicit-def $rsp, implicit $rsp, debug-location !7 209 CFI_INSTRUCTION def_cfa_offset 24 210 frame-setup PUSH64r killed $r14, implicit-def $rsp, implicit $rsp, debug-location !7 211 CFI_INSTRUCTION def_cfa_offset 32 212 frame-setup PUSH64r killed $r13, implicit-def $rsp, implicit $rsp, debug-location !7 213 CFI_INSTRUCTION def_cfa_offset 40 214 frame-setup PUSH64r killed $r12, implicit-def $rsp, implicit $rsp, debug-location !7 215 CFI_INSTRUCTION def_cfa_offset 48 216 frame-setup PUSH64r killed $rbx, implicit-def $rsp, implicit $rsp, debug-location !7 217 CFI_INSTRUCTION def_cfa_offset 56 218 CFI_INSTRUCTION offset $rbx, -56 219 CFI_INSTRUCTION offset $r12, -48 220 CFI_INSTRUCTION offset $r13, -40 221 CFI_INSTRUCTION offset $r14, -32 222 CFI_INSTRUCTION offset $r15, -24 223 CFI_INSTRUCTION offset $rbp, -16 224 renamable $r10 = MOV64rm undef renamable $rax, 1, $noreg, 0, $noreg, debug-instr-number 1, debug-location !7 :: (load 8 from `%"class.llvm::Loop"*** undef`) 225 renamable $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags 226 TEST8rr renamable $al, renamable $al, implicit-def $eflags, implicit killed $eax, debug-location !7 227 MOV64mr $rsp, 1, $noreg, -8, $noreg, renamable $r10 :: (store 8 into %stack.0) 228 JCC_1 %bb.1, 5, implicit $eflags, debug-location !7 229 230 bb.2.if.then.i851: 231 liveins: $rdi, $rdx, $rsi 232 233 renamable $r10 = MOV64rm undef renamable $rax, 1, $noreg, 0, $noreg, debug-location !7 :: (load 8 from `%"class.llvm::Loop"*** undef`) 234 renamable $r9 = MOV64rm renamable $rdi, 1, $noreg, 40, $noreg, debug-location !7 :: (load 8 from %ir.4) 235 JMP_1 %bb.3 236 237 bb.1: 238 liveins: $rdi, $rdx, $rsi, $r10 239 240 renamable $r9 = IMPLICIT_DEF debug-location !7 241 242 bb.3.if.end.i856: 243 successors: %bb.4, %bb.5 244 liveins: $rdi, $rdx, $rsi, $r9, $r10 245 246 renamable $rax = MOV64rm renamable $rdi, 1, $noreg, 16, $noreg, debug-location !7 :: (load 8 from %ir._M_cur6.i) 247 renamable $r15 = LEA64r $noreg, 8, renamable $rdx, 0, $noreg, debug-location !7 248 MOV64mr undef renamable $rax, 1, $noreg, 0, $noreg, renamable $r10, debug-location !7 :: (store 8 into `%"class.llvm::Loop"*** undef`) 249 MOV64mr renamable $rsi, 1, $noreg, 24, $noreg, renamable $r9, debug-location !7 :: (store 8 into %ir.8) 250 renamable $r13 = MOV64rm renamable $rdi, 1, $noreg, 16, $noreg, debug-location !7 :: (load 8 from %ir.10) 251 renamable $r11 = MOV64rm renamable $rdi, 1, $noreg, 40, $noreg, debug-location !7 :: (load 8 from %ir.14) 252 renamable $r8 = MOV64rm undef renamable $rax, 1, $noreg, 0, $noreg, debug-location !7 :: (load 8 from `%"class.llvm::Loop"*** undef`) 253 renamable $ebp = XOR32rr undef $ebp, undef $ebp, implicit-def dead $eflags 254 TEST8rr renamable $bpl, renamable $bpl, implicit-def $eflags, implicit killed $ebp, debug-location !7 255 JCC_1 %bb.5, 5, implicit killed $eflags, debug-location !7 256 257 bb.4.if.then.i.i775: 258 liveins: $rax, $rdi, $rdx, $rsi, $r8, $r9, $r10, $r11, $r13, $r15 259 260 renamable $r14 = LEA64r renamable $r13, 8, renamable $rdx, 0, $noreg, debug-location !7 261 renamable $r12 = IMPLICIT_DEF debug-location !7 262 JMP_1 %bb.6 263 264 bb.5.cond.true.i.i777: 265 liveins: $rax, $rdi, $rdx, $rsi, $r8, $r9, $r10, $r11, $r13, $r15 266 267 renamable $r12 = MOV64rm undef renamable $rax, 1, $noreg, 0, $noreg, debug-location !7 :: (load 8 from `%"class.llvm::Loop"*** undef`) 268 renamable $r14 = IMPLICIT_DEF debug-location !7 269 270 bb.6._ZNKSt15_Deque_iteratorIPN4llvm4LoopERS2_PS2_EplEl.exit796: 271 successors: %bb.7(0x50000000), %bb.8(0x30000000) 272 liveins: $rax, $rdi, $rdx, $rsi, $r8, $r9, $r10, $r11, $r12, $r13, $r14, $r15 273 274 renamable $rax = SUB64rr killed renamable $rax, killed renamable $r15, implicit-def dead $eflags, debug-location !7 275 $rbp = MOV64rr $r11, debug-location !7 276 renamable $rbp = SUB64rr killed renamable $rbp, renamable $r11, implicit-def dead $eflags, debug-location !7 277 $rbx = MOV64rr $r14, debug-location !7 278 renamable $rbx = SUB64rr killed renamable $rbx, killed renamable $r12, implicit-def dead $eflags, debug-location !7 279 renamable $rbx = exact SAR64ri killed renamable $rbx, 3, implicit-def dead $eflags, debug-location !7 280 $rcx = MOV64rr $r8, debug-location !7 281 renamable $rcx = SUB64rr killed renamable $rcx, renamable $r13, implicit-def dead $eflags, debug-location !7 282 renamable $rcx = exact SAR64ri killed renamable $rcx, 3, implicit-def dead $eflags, debug-location !7 283 renamable $rcx = LEA64r killed renamable $rcx, 8, killed renamable $rbp, 0, $noreg, debug-location !7 284 renamable $rcx = LEA64r killed renamable $rbx, 1, killed renamable $rcx, -64, $noreg, debug-location !7 285 TEST64rr killed renamable $rcx, renamable $rcx, implicit-def $eflags, debug-location !7 286 JCC_1 %bb.8, 14, implicit killed $eflags, debug-location !7 287 288 bb.7.for.body.i.i.i.i.i.i.i.i711.preheader: 289 liveins: $rax, $r13 290 291 renamable $rcx = MOV64rm killed renamable $r13, 1, $noreg, 0, $noreg, debug-location !7 :: (load 8 from %ir.11) 292 MOV64mr killed renamable $rax, 1, $noreg, 0, $noreg, killed renamable $rcx, debug-location !7 :: (store 8 into %ir.add.ptr.i.i.i.i859) 293 JMP_1 %bb.10 294 295 bb.8: 296 successors: %bb.10(0x50000000), %bb.9(0x30000000) 297 liveins: $rax, $rdi, $rdx, $rsi, $r8, $r9, $r10, $r11, $r14 298 299 MOV64mr renamable $rdi, 1, $noreg, 16, $noreg, killed renamable $rax, debug-location !7 :: (store 8 into %ir.22) 300 renamable $rax = MOV64rm $rsp, 1, $noreg, -8, $noreg :: (load 8 from %stack.0) 301 MOV64mr undef renamable $rax, 1, $noreg, 0, $noreg, killed renamable $rax, debug-location !7 :: (store 8 into `%"class.llvm::Loop"*** undef`) 302 MOV64mr undef renamable $rax, 1, $noreg, 0, $noreg, killed renamable $r10, debug-location !7 :: (store 8 into `%"class.llvm::Loop"*** undef`) 303 MOV64mr killed renamable $rdi, 1, $noreg, 40, $noreg, killed renamable $r9, debug-location !7 :: (store 8 into %ir.24) 304 renamable $rax = MOV64rm killed renamable $rsi, 1, $noreg, 24, $noreg, debug-location !7 :: (load 8 from %ir.26) 305 DBG_INSTR_REF 1, 0, !8, !DIExpression(DW_OP_LLVM_fragment, 64, 64), debug-location !7 306 renamable $rax = SUB64rr killed renamable $rax, killed renamable $r11, implicit-def dead $eflags, debug-location !7 307 renamable $r8 = SUB64rr killed renamable $r8, killed renamable $r14, implicit-def dead $eflags, debug-location !7 308 renamable $r8 = exact SAR64ri killed renamable $r8, 3, implicit-def dead $eflags, debug-location !7 309 renamable $rax = LEA64r killed renamable $r8, 8, killed renamable $rax, -64, $noreg, debug-location !7 310 TEST64rr killed renamable $rax, renamable $rax, implicit-def $eflags, debug-location !7 311 JCC_1 %bb.10, 15, implicit $eflags, debug-location !7 312 313 bb.9: 314 liveins: $rdx 315 316 dead renamable $rdx = NEG64r killed renamable $rdx, implicit-def $eflags, debug-location !7 317 318 bb.10.while.body.i.i625: 319 $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp 320 CFI_INSTRUCTION def_cfa_offset 48 321 $r12 = frame-destroy POP64r implicit-def $rsp, implicit $rsp 322 CFI_INSTRUCTION def_cfa_offset 40 323 $r13 = frame-destroy POP64r implicit-def $rsp, implicit $rsp 324 CFI_INSTRUCTION def_cfa_offset 32 325 $r14 = frame-destroy POP64r implicit-def $rsp, implicit $rsp 326 CFI_INSTRUCTION def_cfa_offset 24 327 $r15 = frame-destroy POP64r implicit-def $rsp, implicit $rsp 328 CFI_INSTRUCTION def_cfa_offset 16 329 $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp 330 CFI_INSTRUCTION def_cfa_offset 8 331 RETQ 332 333... 334