1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #ifndef SVGA_CONTEXT_H
27 #define SVGA_CONTEXT_H
28
29
30 #include "pipe/p_context.h"
31 #include "pipe/p_defines.h"
32 #include "pipe/p_state.h"
33
34 #include "util/os_time.h"
35
36 #include "util/u_blitter.h"
37 #include "util/list.h"
38
39 #include "tgsi/tgsi_scan.h"
40
41 #include "svga_screen.h"
42 #include "svga_state.h"
43 #include "svga_winsys.h"
44 #include "svga_hw_reg.h"
45 #include "svga3d_shaderdefs.h"
46 #include "svga_image_view.h"
47 #include "svga_shader_buffer.h"
48 #include "svga_debug.h"
49
50 /** Non-GPU queries for gallium HUD */
51 enum svga_hud {
52 /* per-frame counters */
53 SVGA_QUERY_NUM_DRAW_CALLS = PIPE_QUERY_DRIVER_SPECIFIC,
54 SVGA_QUERY_NUM_FALLBACKS,
55 SVGA_QUERY_NUM_FLUSHES,
56 SVGA_QUERY_NUM_VALIDATIONS,
57 SVGA_QUERY_MAP_BUFFER_TIME,
58 SVGA_QUERY_NUM_BUFFERS_MAPPED,
59 SVGA_QUERY_NUM_TEXTURES_MAPPED,
60 SVGA_QUERY_NUM_BYTES_UPLOADED,
61 SVGA_QUERY_NUM_COMMAND_BUFFERS,
62 SVGA_QUERY_COMMAND_BUFFER_SIZE,
63 SVGA_QUERY_FLUSH_TIME,
64 SVGA_QUERY_SURFACE_WRITE_FLUSHES,
65 SVGA_QUERY_NUM_READBACKS,
66 SVGA_QUERY_NUM_RESOURCE_UPDATES,
67 SVGA_QUERY_NUM_BUFFER_UPLOADS,
68 SVGA_QUERY_NUM_CONST_BUF_UPDATES,
69 SVGA_QUERY_NUM_CONST_UPDATES,
70 SVGA_QUERY_NUM_SHADER_RELOCATIONS,
71 SVGA_QUERY_NUM_SURFACE_RELOCATIONS,
72
73 /* running total counters */
74 SVGA_QUERY_MEMORY_USED,
75 SVGA_QUERY_NUM_SHADERS,
76 SVGA_QUERY_NUM_RESOURCES,
77 SVGA_QUERY_NUM_STATE_OBJECTS,
78 SVGA_QUERY_NUM_SURFACE_VIEWS,
79 SVGA_QUERY_NUM_GENERATE_MIPMAP,
80 SVGA_QUERY_NUM_FAILED_ALLOCATIONS,
81 SVGA_QUERY_NUM_COMMANDS_PER_DRAW,
82 SVGA_QUERY_SHADER_MEM_USED,
83
84 /*SVGA_QUERY_MAX has to be last because it is size of an array*/
85 SVGA_QUERY_MAX
86 };
87
88
89 /**
90 * Maximum supported number of constant buffers per shader
91 * including the zero slot for the default constant buffer.
92 */
93 #define SVGA_MAX_CONST_BUFS 15
94
95 /**
96 * Maximum constant buffer size that can be set in the
97 * DXSetSingleConstantBuffer command is
98 * DX10 constant buffer element count * 4 4-bytes components
99 */
100 #define SVGA_MAX_CONST_BUF_SIZE (4096 * 4 * sizeof(int))
101
102 #define CONST0_UPLOAD_ALIGNMENT 256
103 #define SVGA_MAX_IMAGES SVGA3D_MAX_UAVIEWS
104 #define SVGA_MAX_SHADER_BUFFERS SVGA3D_MAX_UAVIEWS
105 #define SVGA_MAX_ATOMIC_BUFFERS SVGA3D_MAX_UAVIEWS
106 #define SVGA_MAX_UAVIEWS SVGA3D_DX11_1_MAX_UAVIEWS
107
108 enum svga_surface_state
109 {
110 SVGA_SURFACE_STATE_CREATED,
111 SVGA_SURFACE_STATE_INVALIDATED,
112 SVGA_SURFACE_STATE_UPDATED,
113 SVGA_SURFACE_STATE_RENDERED,
114 };
115
116 struct draw_vertex_shader;
117 struct draw_fragment_shader;
118 struct svga_shader_variant;
119 struct SVGACmdMemory;
120 struct util_bitmask;
121
122
123 struct svga_cache_context;
124 struct svga_tracked_state;
125
126 struct svga_blend_state {
127 unsigned need_white_fragments:1;
128 unsigned independent_blend_enable:1;
129 unsigned alpha_to_coverage:1;
130 unsigned alpha_to_one:1;
131 unsigned blend_color_alpha:1; /**< set blend color to alpha value */
132 unsigned logicop_enabled:1;
133 unsigned logicop_mode:5;
134
135 /** Per-render target state */
136 struct {
137 uint8_t writemask;
138
139 boolean blend_enable;
140 uint8_t srcblend;
141 uint8_t dstblend;
142 uint8_t blendeq;
143
144 boolean separate_alpha_blend_enable;
145 uint8_t srcblend_alpha;
146 uint8_t dstblend_alpha;
147 uint8_t blendeq_alpha;
148 } rt[PIPE_MAX_COLOR_BUFS];
149
150 SVGA3dBlendStateId id; /**< vgpu10 */
151 };
152
153 struct svga_depth_stencil_state {
154 unsigned zfunc:8;
155 unsigned zenable:1;
156 unsigned zwriteenable:1;
157
158 unsigned alphatestenable:1;
159 unsigned alphafunc:8;
160
161 struct {
162 unsigned enabled:1;
163 unsigned func:8;
164 unsigned fail:8;
165 unsigned zfail:8;
166 unsigned pass:8;
167 } stencil[2];
168
169 /* SVGA3D has one ref/mask/writemask triple shared between front &
170 * back face stencil. We really need two:
171 */
172 unsigned stencil_mask:8;
173 unsigned stencil_writemask:8;
174
175 float alpharef;
176
177 SVGA3dDepthStencilStateId id; /**< vgpu10 */
178 };
179
180 #define SVGA_UNFILLED_DISABLE 0
181 #define SVGA_UNFILLED_LINE 1
182 #define SVGA_UNFILLED_POINT 2
183
184 #define SVGA_PIPELINE_FLAG_POINTS (1<<PIPE_PRIM_POINTS)
185 #define SVGA_PIPELINE_FLAG_LINES (1<<PIPE_PRIM_LINES)
186 #define SVGA_PIPELINE_FLAG_TRIS (1<<PIPE_PRIM_TRIANGLES)
187
188 #define SVGA_MAX_FRAMEBUFFER_DEFAULT_SAMPLES 4
189
190 struct svga_rasterizer_state {
191 struct pipe_rasterizer_state templ; /* needed for draw module */
192
193 unsigned shademode:8;
194 unsigned cullmode:8;
195 unsigned scissortestenable:1;
196 unsigned multisampleantialias:1;
197 unsigned antialiasedlineenable:1;
198 unsigned lastpixel:1;
199 unsigned pointsprite:1;
200
201 unsigned linepattern;
202
203 float slopescaledepthbias;
204 float depthbias;
205 float pointsize;
206 float linewidth;
207
208 unsigned hw_fillmode:2; /* PIPE_POLYGON_MODE_x */
209
210 /** Which prims do we need help for? Bitmask of (1 << PIPE_PRIM_x) flags */
211 unsigned need_pipeline:16;
212
213 SVGA3dRasterizerStateId id; /**< vgpu10 */
214
215 /* Alternate SVGA rasterizer state object with forcedSampleCount */
216 int altRastIds[SVGA_MAX_FRAMEBUFFER_DEFAULT_SAMPLES+1];
217
218 struct svga_rasterizer_state *no_cull_rasterizer;
219
220 /** For debugging: */
221 const char* need_pipeline_tris_str;
222 const char* need_pipeline_lines_str;
223 const char* need_pipeline_points_str;
224 };
225
226 struct svga_sampler_state {
227 unsigned mipfilter;
228 unsigned magfilter;
229 unsigned minfilter;
230 unsigned aniso_level;
231 float lod_bias;
232 unsigned addressu;
233 unsigned addressv;
234 unsigned addressw;
235 unsigned bordercolor;
236 unsigned normalized_coords:1;
237 unsigned compare_mode:1;
238 unsigned compare_func:3;
239
240 unsigned min_lod;
241 unsigned view_min_lod;
242 unsigned view_max_lod;
243
244 SVGA3dSamplerId id[2];
245 };
246
247
248 struct svga_pipe_sampler_view
249 {
250 struct pipe_sampler_view base;
251
252 SVGA3dShaderResourceViewId id;
253 };
254
255
256 static inline struct svga_pipe_sampler_view *
svga_pipe_sampler_view(struct pipe_sampler_view * v)257 svga_pipe_sampler_view(struct pipe_sampler_view *v)
258 {
259 return (struct svga_pipe_sampler_view *) v;
260 }
261
262
263 struct svga_velems_state {
264 unsigned count;
265 struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
266 SVGA3dDeclType decl_type[PIPE_MAX_ATTRIBS]; /**< vertex attrib formats */
267
268 /** Bitmasks indicating which attributes need format conversion */
269 unsigned adjust_attrib_range; /**< range adjustment */
270 unsigned attrib_is_pure_int; /**< pure int */
271 unsigned adjust_attrib_w_1; /**< set w = 1 */
272 unsigned adjust_attrib_itof; /**< int->float */
273 unsigned adjust_attrib_utof; /**< uint->float */
274 unsigned attrib_is_bgra; /**< R / B swizzling */
275 unsigned attrib_puint_to_snorm; /**< 10_10_10_2 packed uint -> snorm */
276 unsigned attrib_puint_to_uscaled; /**< 10_10_10_2 packed uint -> uscaled */
277 unsigned attrib_puint_to_sscaled; /**< 10_10_10_2 packed uint -> sscaled */
278
279 boolean need_swvfetch;
280
281 SVGA3dElementLayoutId id; /**< VGPU10 */
282 };
283
284 struct svga_constant_buffer {
285 struct svga_winsys_surface *handle;
286 unsigned size;
287 };
288
289 struct svga_raw_buffer {
290 struct svga_winsys_surface *handle;
291 unsigned buffer_offset;
292 unsigned buffer_size;
293 struct pipe_resource *buffer;
294 int32 srvid;
295 };
296
297 /* Use to calculate differences between state emitted to hardware and
298 * current driver-calculated state.
299 */
300 struct svga_state
301 {
302 const struct svga_blend_state *blend;
303 const struct svga_depth_stencil_state *depth;
304 const struct svga_sampler_state *sampler[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
305 const struct svga_velems_state *velems;
306
307 struct svga_rasterizer_state *rast;
308 struct pipe_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; /* or texture ID's? */
309 struct svga_fragment_shader *fs;
310 struct svga_vertex_shader *vs;
311 struct svga_geometry_shader *user_gs; /* user-specified GS */
312 struct svga_geometry_shader *gs; /* derived GS */
313 /* derived tessellation control shader */
314 struct svga_tcs_shader *tcs;
315 /* derived tessellation evaluation shader */
316 struct svga_tes_shader *tes;
317 struct svga_compute_shader *cs;
318
319 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
320 /** Constant buffers for each shader.
321 * The size should probably always match with that of
322 * svga_shader_emitter_v10.num_shader_consts.
323 */
324 struct pipe_constant_buffer constbufs[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
325 struct svga_raw_buffer rawbufs[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
326
327 struct pipe_framebuffer_state framebuffer;
328 float depthscale;
329
330 /* Hack to limit the number of different render targets between
331 * flushes. Helps avoid blowing out our surface cache in EXA.
332 */
333 int nr_fbs;
334
335 struct pipe_poly_stipple poly_stipple;
336 struct pipe_scissor_state scissor[SVGA3D_DX_MAX_VIEWPORTS];
337 struct pipe_blend_color blend_color;
338 struct pipe_stencil_ref stencil_ref;
339 struct pipe_clip_state clip;
340 struct pipe_viewport_state viewport[SVGA3D_DX_MAX_VIEWPORTS];
341
342 unsigned num_samplers[PIPE_SHADER_TYPES];
343 unsigned num_sampler_views[PIPE_SHADER_TYPES];
344 unsigned num_vertex_buffers;
345 enum pipe_prim_type reduced_prim;
346
347 unsigned vertex_id_bias;
348
349 struct {
350 unsigned flag_1d;
351 unsigned flag_srgb;
352 } tex_flags;
353
354 unsigned sample_mask;
355 unsigned vertices_per_patch;
356 float default_tesslevels[6]; /* tessellation (outer[4] + inner[2]) levels */
357
358 /* Image views */
359 unsigned num_image_views[PIPE_SHADER_TYPES];
360 struct svga_image_view image_views[PIPE_SHADER_TYPES][SVGA_MAX_IMAGES];
361
362 /* Shader buffers */
363 unsigned num_shader_buffers[PIPE_SHADER_TYPES];
364 struct svga_shader_buffer shader_buffers[PIPE_SHADER_TYPES][SVGA_MAX_SHADER_BUFFERS];
365
366 /* HW atomic buffers */
367 unsigned num_atomic_buffers;
368 struct svga_shader_buffer atomic_buffers[SVGA_MAX_SHADER_BUFFERS];
369
370 struct {
371 /* Determine the layout of the grid (in block units) to be used. */
372 unsigned size[3];
373 /* If DispatchIndirect is used, this will has grid size info*/
374 struct pipe_resource *indirect;
375 } grid_info;
376
377 };
378
379 struct svga_prescale {
380 float translate[4];
381 float scale[4];
382 boolean enabled;
383 };
384
385 struct svga_depthrange {
386 float zmin;
387 float zmax;
388 };
389
390 /* Updated by calling svga_update_state( SVGA_STATE_HW_CLEAR )
391 */
392 struct svga_hw_clear_state
393 {
394 struct pipe_framebuffer_state framebuffer;
395
396 /* VGPU9 only */
397 SVGA3dRect viewport;
398 struct svga_depthrange depthrange;
399
400 /* VGPU10 state */
401 SVGA3dViewport viewports[SVGA3D_DX_MAX_VIEWPORTS];
402 struct svga_prescale prescale[SVGA3D_DX_MAX_VIEWPORTS];
403 struct pipe_scissor_state scissors[SVGA3D_DX_MAX_VIEWPORTS];
404 unsigned num_prescale;
405
406 unsigned num_rendertargets;
407 struct pipe_surface *rtv[SVGA3D_MAX_RENDER_TARGETS];
408 struct pipe_surface *dsv;
409 };
410
411 struct svga_hw_view_state
412 {
413 struct pipe_resource *texture;
414 struct svga_sampler_view *v;
415 unsigned min_lod;
416 unsigned max_lod;
417 boolean dirty;
418 };
419
420 /* Updated by calling svga_update_state( SVGA_STATE_HW_DRAW )
421 */
422 struct svga_hw_draw_state
423 {
424 /** VGPU9 rasterization state */
425 unsigned rs[SVGA3D_RS_MAX];
426 /** VGPU9 texture sampler and bindings state */
427 unsigned ts[SVGA3D_PIXEL_SAMPLERREG_MAX][SVGA3D_TS_MAX];
428
429 /** VGPU9 texture views */
430 unsigned num_views;
431 unsigned num_backed_views; /* views with backing copy of texture */
432 struct svga_hw_view_state views[PIPE_MAX_SAMPLERS];
433
434 /** VGPU9 constant buffer values */
435 float cb[PIPE_SHADER_TYPES][SVGA3D_CONSTREG_MAX][4];
436
437 /** Currently bound shaders */
438 struct svga_shader_variant *fs;
439 struct svga_shader_variant *vs;
440 struct svga_shader_variant *gs;
441 struct svga_shader_variant *tcs;
442 struct svga_shader_variant *tes;
443 struct svga_shader_variant *cs;
444
445 /** Currently bound constant buffer, per shader stage */
446 struct pipe_resource *constbuf[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
447 struct svga_constant_buffer constbufoffsets[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
448 struct svga_raw_buffer rawbufs[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
449 unsigned enabled_rawbufs[PIPE_SHADER_TYPES];
450
451 /** Bitmask of enabled constant buffers */
452 unsigned enabled_constbufs[PIPE_SHADER_TYPES];
453
454 /**
455 * These are used to reduce the number of times we call u_upload_unmap()
456 * while updating the zero-th/default VGPU10 constant buffer.
457 */
458 struct pipe_resource *const0_buffer;
459 struct svga_winsys_surface *const0_handle;
460
461 /** VGPU10 HW state (used to prevent emitting redundant state) */
462 SVGA3dDepthStencilStateId depth_stencil_id;
463 unsigned stencil_ref;
464 SVGA3dBlendStateId blend_id;
465 float blend_factor[4];
466 unsigned blend_sample_mask;
467 SVGA3dRasterizerStateId rasterizer_id;
468 SVGA3dElementLayoutId layout_id;
469 SVGA3dPrimitiveType topology;
470
471 /** Vertex buffer state */
472 SVGA3dVertexBuffer_v2 vbuffer_attrs[PIPE_MAX_ATTRIBS];
473 struct pipe_resource *vbuffers[PIPE_MAX_ATTRIBS];
474 unsigned num_vbuffers;
475
476 struct pipe_resource *ib; /**< index buffer for drawing */
477 SVGA3dSurfaceFormat ib_format;
478 unsigned ib_offset;
479
480 unsigned num_samplers[PIPE_SHADER_TYPES];
481 SVGA3dSamplerId samplers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
482
483 unsigned num_sampler_views[PIPE_SHADER_TYPES];
484 struct pipe_sampler_view
485 *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
486
487 /* used for rebinding */
488 unsigned default_constbuf_size[PIPE_SHADER_TYPES];
489
490 boolean rasterizer_discard; /* set if rasterization is disabled */
491 boolean has_backed_views; /* set if any of the rtv/dsv is a backed surface view */
492
493 /* Image Views */
494 int uavSpliceIndex;
495 unsigned num_image_views[PIPE_SHADER_TYPES];
496 struct svga_image_view image_views[PIPE_SHADER_TYPES][SVGA_MAX_IMAGES];
497
498 /* Shader Buffers */
499 unsigned num_shader_buffers[PIPE_SHADER_TYPES];
500 struct svga_shader_buffer shader_buffers[PIPE_SHADER_TYPES][SVGA_MAX_SHADER_BUFFERS];
501
502 /* HW Atomic Buffers */
503 unsigned num_atomic_buffers;
504 struct svga_shader_buffer atomic_buffers[SVGA_MAX_SHADER_BUFFERS];
505
506 /* UAV state */
507 unsigned num_uavs;
508 SVGA3dUAViewId uaViewIds[SVGA_MAX_UAVIEWS];
509 struct svga_winsys_surface *uaViews[SVGA_MAX_UAVIEWS];
510
511 /* Compute UAV state */
512 unsigned num_cs_uavs;
513 SVGA3dUAViewId csUAViewIds[SVGA_MAX_UAVIEWS];
514 struct svga_winsys_surface *csUAViews[SVGA_MAX_UAVIEWS];
515
516 /* starting uav index for each shader */
517 unsigned uav_start_index[PIPE_SHADER_TYPES];
518
519 /* starting uav index for HW atomic buffers */
520 unsigned uav_atomic_buf_index;
521 };
522
523
524 /* Updated by calling svga_update_state( SVGA_STATE_NEED_SWTNL )
525 */
526 struct svga_sw_state
527 {
528 /* which parts we need */
529 boolean need_swvfetch;
530 boolean need_pipeline;
531 boolean need_swtnl;
532
533 /* Flag to make sure that need sw is on while
534 * updating state within a swtnl call.
535 */
536 boolean in_swtnl_draw;
537 };
538
539
540 /* Queue some state updates (like rss) and submit them to hardware in
541 * a single packet.
542 */
543 struct svga_hw_queue;
544
545 struct svga_query;
546 struct svga_qmem_alloc_entry;
547
548 enum svga_uav_type
549 {
550 SVGA_IMAGE_VIEW = 0,
551 SVGA_SHADER_BUFFER
552 };
553
554 struct svga_uav
555 {
556 enum svga_uav_type type;
557 union {
558 struct svga_image_view image_view;
559 struct svga_shader_buffer shader_buffer;
560 } desc;
561 struct pipe_resource *resource;
562 unsigned next_uaView;
563 SVGA3dUAViewId uaViewId;
564 unsigned timestamp[2];
565 };
566
567 struct svga_cache_uav
568 {
569 unsigned num_uaViews;
570 unsigned next_uaView;
571 struct svga_uav uaViews[SVGA3D_DX11_1_MAX_UAVIEWS];
572 };
573
574 struct svga_context
575 {
576 struct pipe_context pipe;
577 struct svga_winsys_context *swc;
578 struct blitter_context *blitter;
579 struct u_upload_mgr *const0_upload;
580 struct u_upload_mgr *tex_upload;
581
582 struct {
583 boolean no_swtnl;
584 boolean force_swtnl;
585 boolean use_min_mipmap;
586
587 /* incremented for each shader */
588 unsigned shader_id;
589
590 boolean no_line_width;
591 boolean force_hw_line_stipple;
592
593 /** To report perf/conformance/etc issues to the gallium frontend */
594 struct pipe_debug_callback callback;
595 } debug;
596
597 struct {
598 struct draw_context *draw;
599 struct vbuf_render *backend;
600 unsigned hw_prim;
601 boolean new_vbuf;
602 boolean new_vdecl;
603 } swtnl;
604
605 /* Bitmask of blend state objects IDs */
606 struct util_bitmask *blend_object_id_bm;
607
608 /* Bitmask of depth/stencil state objects IDs */
609 struct util_bitmask *ds_object_id_bm;
610
611 /* Bitmask of input element object IDs */
612 struct util_bitmask *input_element_object_id_bm;
613
614 /* Bitmask of rasterizer object IDs */
615 struct util_bitmask *rast_object_id_bm;
616
617 /* Bitmask of sampler state objects IDs */
618 struct util_bitmask *sampler_object_id_bm;
619
620 /* Bitmask of sampler view IDs */
621 struct util_bitmask *sampler_view_id_bm;
622
623 /* Bitmask of to-free sampler view IDs created for raw buffer srv */
624 struct util_bitmask *sampler_view_to_free_id_bm;
625
626 /* Bitmask of used shader IDs */
627 struct util_bitmask *shader_id_bm;
628
629 /* Bitmask of used surface view IDs */
630 struct util_bitmask *surface_view_id_bm;
631
632 /* Bitmask of used stream output IDs */
633 struct util_bitmask *stream_output_id_bm;
634
635 /* Bitmask of used query IDs */
636 struct util_bitmask *query_id_bm;
637
638 /* Bitmask of used uav IDs */
639 struct util_bitmask *uav_id_bm;
640
641 /* Bitmask of to-free uav IDs */
642 struct util_bitmask *uav_to_free_id_bm;
643
644 struct {
645 uint64_t dirty[SVGA_STATE_MAX];
646
647 /** bitmasks of which const buffers are changed */
648 unsigned dirty_constbufs[PIPE_SHADER_TYPES];
649
650 /** bitmasks of which const buffers to be bound as raw buffers */
651 unsigned raw_constbufs[PIPE_SHADER_TYPES];
652
653 unsigned texture_timestamp;
654 unsigned uav_timestamp[2];
655
656 struct svga_sw_state sw;
657 struct svga_hw_draw_state hw_draw;
658 struct svga_hw_clear_state hw_clear;
659 } state;
660
661 struct svga_state curr; /* state from the gallium frontend */
662 uint64_t dirty; /* statechanges since last update_state() */
663
664 union {
665 struct {
666 unsigned rendertargets:1;
667 unsigned texture_samplers:1;
668 unsigned constbufs:1;
669 unsigned vs:1;
670 unsigned fs:1;
671 unsigned gs:1;
672 unsigned tcs:1;
673 unsigned tes:1;
674 unsigned cs:1;
675 unsigned query:1;
676 unsigned images:1;
677 unsigned shaderbufs:1;
678 unsigned atomicbufs:1;
679 unsigned uav:1;
680 unsigned indexbuf:1;
681 unsigned vertexbufs:1;
682 } flags;
683 unsigned val;
684 } rebind;
685
686 struct svga_hwtnl *hwtnl;
687
688 /** Queries states */
689 struct svga_winsys_gb_query *gb_query; /**< gb query object, one per context */
690 unsigned gb_query_len; /**< gb query object size */
691 struct util_bitmask *gb_query_alloc_mask; /**< gb query object allocation mask */
692 struct svga_qmem_alloc_entry *gb_query_map[SVGA_QUERY_MAX];
693 /**< query mem block mapping */
694 struct svga_query *sq[SVGA_QUERY_MAX+12]; /**< queries currently in progress */
695 /* The last 12 entries are for streamout
696 * queries for stream 0..3
697 */
698
699 /** List of buffers with queued transfers */
700 struct list_head dirty_buffers;
701
702 /** performance / info queries for HUD */
703 struct {
704 uint64_t num_draw_calls; /**< SVGA_QUERY_DRAW_CALLS */
705 uint64_t num_fallbacks; /**< SVGA_QUERY_NUM_FALLBACKS */
706 uint64_t num_flushes; /**< SVGA_QUERY_NUM_FLUSHES */
707 uint64_t num_validations; /**< SVGA_QUERY_NUM_VALIDATIONS */
708 uint64_t map_buffer_time; /**< SVGA_QUERY_MAP_BUFFER_TIME */
709 uint64_t num_buffers_mapped; /**< SVGA_QUERY_NUM_BUFFERS_MAPPED */
710 uint64_t num_textures_mapped; /**< SVGA_QUERY_NUM_TEXTURES_MAPPED */
711 uint64_t num_command_buffers; /**< SVGA_QUERY_NUM_COMMAND_BUFFERS */
712 uint64_t command_buffer_size; /**< SVGA_QUERY_COMMAND_BUFFER_SIZE */
713 uint64_t flush_time; /**< SVGA_QUERY_FLUSH_TIME */
714 uint64_t surface_write_flushes; /**< SVGA_QUERY_SURFACE_WRITE_FLUSHES */
715 uint64_t num_readbacks; /**< SVGA_QUERY_NUM_READBACKS */
716 uint64_t num_resource_updates; /**< SVGA_QUERY_NUM_RESOURCE_UPDATES */
717 uint64_t num_buffer_uploads; /**< SVGA_QUERY_NUM_BUFFER_UPLOADS */
718 uint64_t num_const_buf_updates; /**< SVGA_QUERY_NUM_CONST_BUF_UPDATES */
719 uint64_t num_const_updates; /**< SVGA_QUERY_NUM_CONST_UPDATES */
720 uint64_t num_shaders; /**< SVGA_QUERY_NUM_SHADERS */
721
722 /** The following are summed for SVGA_QUERY_NUM_STATE_OBJECTS */
723 uint64_t num_blend_objects;
724 uint64_t num_depthstencil_objects;
725 uint64_t num_rasterizer_objects;
726 uint64_t num_sampler_objects;
727 uint64_t num_samplerview_objects;
728 uint64_t num_vertexelement_objects;
729
730 uint64_t num_surface_views; /**< SVGA_QUERY_NUM_SURFACE_VIEWS */
731 uint64_t num_bytes_uploaded; /**< SVGA_QUERY_NUM_BYTES_UPLOADED */
732 uint64_t num_generate_mipmap; /**< SVGA_QUERY_NUM_GENERATE_MIPMAP */
733 uint64_t shader_mem_used; /**< SVGA_QUERY_SHADER_MEM_USED */
734
735 boolean uses_time; /**< os_time_get() calls needed? */
736 } hud;
737
738 /** The currently bound stream output targets */
739 boolean in_streamout; /* Set if streamout is active */
740 unsigned num_so_targets;
741 struct svga_winsys_surface *so_surfaces[SVGA3D_DX_MAX_SOTARGETS];
742 struct pipe_stream_output_target *so_targets[SVGA3D_DX_MAX_SOTARGETS];
743 struct svga_stream_output *current_so;
744
745 /**
746 * The following states are used in the workaround for auto draw with
747 * stream instancing.
748 */
749
750 /* Last bound SO targets that can be used to get vertex count */
751 struct pipe_stream_output_target *vcount_so_targets[SVGA3D_DX_MAX_SOTARGETS];
752 unsigned vcount_buffer_stream; /* SO buffer to stream index mask */
753 struct pipe_query *so_queries[4]; /* SO stat queries for each stream */
754
755 /** A blend state with blending disabled, for falling back to when blending
756 * is illegal (e.g. an integer texture is bound)
757 */
758 struct svga_blend_state *noop_blend;
759
760 struct {
761 struct pipe_resource *texture;
762 struct svga_pipe_sampler_view *sampler_view;
763 void *sampler;
764 } polygon_stipple;
765
766 /** Depth stencil state created to disable depth stencil test */
767 struct svga_depth_stencil_state *depthstencil_disable;
768
769 /** Current conditional rendering predicate */
770 struct {
771 SVGA3dQueryId query_id;
772 boolean cond;
773 } pred;
774
775 boolean render_condition;
776 boolean disable_rasterizer; /* Set if to disable rasterization */
777 uint8_t patch_vertices;
778
779 struct {
780 struct svga_tcs_shader *passthrough_tcs;
781 struct svga_vertex_shader *vs;
782 struct svga_tes_shader *tes;
783 unsigned vertices_per_patch;
784 boolean passthrough;
785 } tcs;
786
787 struct svga_cache_uav cache_uav;
788 struct pipe_resource *dummy_resource;
789 };
790
791 /* A flag for each frontend state object:
792 */
793 #define SVGA_NEW_BLEND ((uint64_t) 0x1)
794 #define SVGA_NEW_DEPTH_STENCIL_ALPHA ((uint64_t) 0x2)
795 #define SVGA_NEW_RAST ((uint64_t) 0x4)
796 #define SVGA_NEW_SAMPLER ((uint64_t) 0x8)
797 #define SVGA_NEW_TEXTURE ((uint64_t) 0x10)
798 #define SVGA_NEW_VBUFFER ((uint64_t) 0x20)
799 #define SVGA_NEW_VELEMENT ((uint64_t) 0x40)
800 #define SVGA_NEW_FS ((uint64_t) 0x80)
801 #define SVGA_NEW_VS ((uint64_t) 0x100)
802 #define SVGA_NEW_FS_CONST_BUFFER ((uint64_t) 0x200)
803 #define SVGA_NEW_VS_CONST_BUFFER ((uint64_t) 0x400)
804 #define SVGA_NEW_FRAME_BUFFER ((uint64_t) 0x800)
805 #define SVGA_NEW_STIPPLE ((uint64_t) 0x1000)
806 #define SVGA_NEW_SCISSOR ((uint64_t) 0x2000)
807 #define SVGA_NEW_BLEND_COLOR ((uint64_t) 0x4000)
808 #define SVGA_NEW_CLIP ((uint64_t) 0x8000)
809 #define SVGA_NEW_VIEWPORT ((uint64_t) 0x10000)
810 #define SVGA_NEW_PRESCALE ((uint64_t) 0x20000)
811 #define SVGA_NEW_REDUCED_PRIMITIVE ((uint64_t) 0x40000)
812 #define SVGA_NEW_TEXTURE_BINDING ((uint64_t) 0x80000)
813 #define SVGA_NEW_NEED_PIPELINE ((uint64_t) 0x100000)
814 #define SVGA_NEW_NEED_SWVFETCH ((uint64_t) 0x200000)
815 #define SVGA_NEW_NEED_SWTNL ((uint64_t) 0x400000)
816 #define SVGA_NEW_FS_VARIANT ((uint64_t) 0x800000)
817 #define SVGA_NEW_VS_VARIANT ((uint64_t) 0x1000000)
818 #define SVGA_NEW_TEXTURE_FLAGS ((uint64_t) 0x4000000)
819 #define SVGA_NEW_STENCIL_REF ((uint64_t) 0x8000000)
820 #define SVGA_NEW_GS ((uint64_t) 0x10000000)
821 #define SVGA_NEW_GS_CONST_BUFFER ((uint64_t) 0x20000000)
822 #define SVGA_NEW_GS_VARIANT ((uint64_t) 0x40000000)
823 #define SVGA_NEW_TEXTURE_CONSTS ((uint64_t) 0x80000000)
824 #define SVGA_NEW_TCS ((uint64_t) 0x100000000)
825 #define SVGA_NEW_TES ((uint64_t) 0x200000000)
826 #define SVGA_NEW_TCS_VARIANT ((uint64_t) 0x400000000)
827 #define SVGA_NEW_TES_VARIANT ((uint64_t) 0x800000000)
828 #define SVGA_NEW_TCS_CONST_BUFFER ((uint64_t) 0x1000000000)
829 #define SVGA_NEW_TES_CONST_BUFFER ((uint64_t) 0x2000000000)
830 #define SVGA_NEW_TCS_PARAM ((uint64_t) 0x4000000000)
831 #define SVGA_NEW_IMAGE_VIEW ((uint64_t) 0x8000000000)
832 #define SVGA_NEW_SHADER_BUFFER ((uint64_t) 0x10000000000)
833 #define SVGA_NEW_CS ((uint64_t) 0x20000000000)
834 #define SVGA_NEW_CS_VARIANT ((uint64_t) 0x40000000000)
835 #define SVGA_NEW_CS_CONST_BUFFER ((uint64_t) 0x80000000000)
836 #define SVGA_NEW_FS_CONSTS ((uint64_t) 0x100000000000)
837 #define SVGA_NEW_VS_CONSTS ((uint64_t) 0x200000000000)
838 #define SVGA_NEW_GS_CONSTS ((uint64_t) 0x400000000000)
839 #define SVGA_NEW_TCS_CONSTS ((uint64_t) 0x800000000000)
840 #define SVGA_NEW_TES_CONSTS ((uint64_t) 0x1000000000000)
841 #define SVGA_NEW_CS_CONSTS ((uint64_t) 0x2000000000000)
842 #define SVGA_NEW_FS_RAW_BUFFER ((uint64_t) 0x4000000000000)
843 #define SVGA_NEW_VS_RAW_BUFFER ((uint64_t) 0x8000000000000)
844 #define SVGA_NEW_GS_RAW_BUFFER ((uint64_t) 0x10000000000000)
845 #define SVGA_NEW_TCS_RAW_BUFFER ((uint64_t) 0x20000000000000)
846 #define SVGA_NEW_TES_RAW_BUFFER ((uint64_t) 0x40000000000000)
847 #define SVGA_NEW_CS_RAW_BUFFER ((uint64_t) 0x80000000000000)
848 #define SVGA_NEW_ALL ((uint64_t) 0xFFFFFFFFFFFFFFFF)
849
850 #define SVGA_NEW_CONST_BUFFER \
851 (SVGA_NEW_FS_CONST_BUFFER | SVGA_NEW_VS_CONST_BUFFER | \
852 SVGA_NEW_GS_CONST_BUFFER | SVGA_NEW_CS_CONST_BUFFER | \
853 SVGA_NEW_TCS_CONST_BUFFER | SVGA_NEW_TES_CONST_BUFFER)
854
855
856 /** Program pipelines */
857 enum svga_pipe_type
858 {
859 SVGA_PIPE_GRAPHICS = 0,
860 SVGA_PIPE_COMPUTE = 1
861 };
862
863 void svga_init_state_functions( struct svga_context *svga );
864 void svga_init_flush_functions( struct svga_context *svga );
865 void svga_init_string_functions( struct svga_context *svga );
866 void svga_init_blit_functions(struct svga_context *svga);
867
868 void svga_init_blend_functions( struct svga_context *svga );
869 void svga_init_depth_stencil_functions( struct svga_context *svga );
870 void svga_init_misc_functions( struct svga_context *svga );
871 void svga_init_rasterizer_functions( struct svga_context *svga );
872 void svga_init_sampler_functions( struct svga_context *svga );
873 void svga_init_cs_functions( struct svga_context *svga );
874 void svga_init_fs_functions( struct svga_context *svga );
875 void svga_init_vs_functions( struct svga_context *svga );
876 void svga_init_gs_functions( struct svga_context *svga );
877 void svga_init_ts_functions( struct svga_context *svga );
878 void svga_init_vertex_functions( struct svga_context *svga );
879 void svga_init_constbuffer_functions( struct svga_context *svga );
880 void svga_init_draw_functions( struct svga_context *svga );
881 void svga_init_query_functions( struct svga_context *svga );
882 void svga_init_surface_functions(struct svga_context *svga);
883 void svga_init_stream_output_functions( struct svga_context *svga );
884 void svga_init_clear_functions( struct svga_context *svga );
885 void svga_init_shader_image_functions( struct svga_context *svga );
886
887 void svga_cleanup_vertex_state( struct svga_context *svga );
888 void svga_cleanup_sampler_state( struct svga_context *svga );
889 void svga_cleanup_tss_binding( struct svga_context *svga );
890 void svga_cleanup_framebuffer( struct svga_context *svga );
891 void svga_cleanup_tcs_state( struct svga_context *svga );
892
893 void svga_context_flush( struct svga_context *svga,
894 struct pipe_fence_handle **pfence );
895
896 void svga_context_finish(struct svga_context *svga);
897
898 void svga_hwtnl_flush_retry( struct svga_context *svga );
899 void svga_hwtnl_flush_buffer( struct svga_context *svga,
900 struct pipe_resource *buffer );
901 boolean svga_hwtnl_has_pending_prim(struct svga_hwtnl *);
902
903 void svga_surfaces_flush(struct svga_context *svga);
904
905 struct pipe_context *
906 svga_context_create(struct pipe_screen *screen,
907 void *priv, unsigned flags);
908
909 void svga_toggle_render_condition(struct svga_context *svga,
910 boolean render_condition_enabled,
911 boolean on);
912
913 int svga_define_rasterizer_object(struct svga_context *svga,
914 struct svga_rasterizer_state *,
915 unsigned samples);
916
917 enum pipe_error
918 svga_validate_sampler_resources(struct svga_context *svga,
919 enum svga_pipe_type);
920
921 enum pipe_error
922 svga_validate_constant_buffers(struct svga_context *svga,
923 enum svga_pipe_type);
924
925 enum pipe_error
926 svga_validate_image_views(struct svga_context *svga,
927 enum svga_pipe_type);
928
929 enum pipe_error
930 svga_validate_shader_buffers(struct svga_context *svga,
931 enum svga_pipe_type);
932
933 void
934 svga_destroy_rawbuf_srv(struct svga_context *svga);
935
936 void
937 svga_uav_cache_init(struct svga_context *svga);
938
939 void
940 svga_destroy_rawbuf_srv(struct svga_context *svga);
941
942
943 /***********************************************************************
944 * Inline conversion functions. These are better-typed than the
945 * macros used previously:
946 */
947 static inline struct svga_context *
svga_context(struct pipe_context * pipe)948 svga_context( struct pipe_context *pipe )
949 {
950 return (struct svga_context *)pipe;
951 }
952
953 static inline struct svga_winsys_screen *
svga_sws(struct svga_context * svga)954 svga_sws(struct svga_context *svga)
955 {
956 return svga_screen(svga->pipe.screen)->sws;
957 }
958
959 static inline boolean
svga_have_gb_objects(const struct svga_context * svga)960 svga_have_gb_objects(const struct svga_context *svga)
961 {
962 return svga_screen(svga->pipe.screen)->sws->have_gb_objects;
963 }
964
965 static inline boolean
svga_have_gb_dma(const struct svga_context * svga)966 svga_have_gb_dma(const struct svga_context *svga)
967 {
968 return svga_screen(svga->pipe.screen)->sws->have_gb_dma;
969 }
970
971 static inline boolean
svga_have_vgpu10(const struct svga_context * svga)972 svga_have_vgpu10(const struct svga_context *svga)
973 {
974 return svga_screen(svga->pipe.screen)->sws->have_vgpu10;
975 }
976
977 static inline boolean
svga_have_sm4_1(const struct svga_context * svga)978 svga_have_sm4_1(const struct svga_context *svga)
979 {
980 return svga_screen(svga->pipe.screen)->sws->have_sm4_1;
981 }
982
983 static inline boolean
svga_have_sm5(const struct svga_context * svga)984 svga_have_sm5(const struct svga_context *svga)
985 {
986 return svga_screen(svga->pipe.screen)->sws->have_sm5;
987 }
988
989 static inline boolean
svga_have_gl43(const struct svga_context * svga)990 svga_have_gl43(const struct svga_context *svga)
991 {
992 return svga_screen(svga->pipe.screen)->sws->have_gl43;
993 }
994
995 static inline boolean
svga_need_to_rebind_resources(const struct svga_context * svga)996 svga_need_to_rebind_resources(const struct svga_context *svga)
997 {
998 return svga_screen(svga->pipe.screen)->sws->need_to_rebind_resources;
999 }
1000
1001 static inline boolean
svga_rects_equal(const SVGA3dRect * r1,const SVGA3dRect * r2)1002 svga_rects_equal(const SVGA3dRect *r1, const SVGA3dRect *r2)
1003 {
1004 return memcmp(r1, r2, sizeof(*r1)) == 0;
1005 }
1006
1007
1008 /* A helper function to return TRUE if sampler state mapping is
1009 * to be used. Sampler state mapping is used in GL43 context
1010 * if the number of sampler states exceeds the SVGA device limit or
1011 * the sampler state mapping environment variable is set.
1012 */
1013 static inline boolean
svga_use_sampler_state_mapping(const struct svga_context * svga,unsigned num_sampler_states)1014 svga_use_sampler_state_mapping(const struct svga_context *svga,
1015 unsigned num_sampler_states)
1016 {
1017 return svga_have_gl43(svga) &&
1018 (svga_screen(svga->pipe.screen)->debug.sampler_state_mapping ||
1019 num_sampler_states > SVGA3D_DX_MAX_SAMPLERS);
1020 }
1021
1022 /**
1023 * If the Gallium HUD is enabled, this will return the current time.
1024 * Otherwise, just return zero.
1025 */
1026 static inline int64_t
svga_get_time(struct svga_context * svga)1027 svga_get_time(struct svga_context *svga)
1028 {
1029 return svga->hud.uses_time ? os_time_get() : 0;
1030 }
1031
1032 /*
1033 * The SVGA_TRY_XX family of macros can be used to optionally replace a
1034 * function call with an error value, the purpose is to trigger and test
1035 * retry path handling.
1036 */
1037 #ifdef DEBUG
1038
1039 /*
1040 * Optionally replace a function call with a PIPE_ERROR_OUT_OF_MEMORY
1041 * return value
1042 */
1043 #define SVGA_TRY(_func) \
1044 ((SVGA_DEBUG & DEBUG_RETRY) ? PIPE_ERROR_OUT_OF_MEMORY : (_func))
1045
1046 /* Optionally replace a function call with a NULL return value */
1047 #define SVGA_TRY_PTR(_func) \
1048 ((SVGA_DEBUG & DEBUG_RETRY) ? NULL : (_func))
1049
1050 /*
1051 * Optionally replace a function call with a NULL return value, and set
1052 * the _retry parameter to TRUE.
1053 */
1054 #define SVGA_TRY_MAP(_func, _retry) \
1055 ((SVGA_DEBUG & DEBUG_RETRY) ? (_retry) = TRUE, NULL : (_func))
1056 #else
1057
1058 #define SVGA_TRY(_func) (_func)
1059
1060 #define SVGA_TRY_PTR(_func) (_func)
1061
1062 #define SVGA_TRY_MAP(_func, _retry) (_func)
1063 #endif
1064
1065 /**
1066 * Enter retry processing after hitting out-of-command space
1067 */
1068 static inline void
svga_retry_enter(struct svga_context * svga)1069 svga_retry_enter(struct svga_context *svga)
1070 {
1071 /* We shouldn't nest retries, but currently we do. */
1072 if ((SVGA_DEBUG & DEBUG_RETRY) && svga->swc->in_retry) {
1073 debug_printf("WARNING: Recursive retry. Level: %u.\n",
1074 svga->swc->in_retry);
1075 }
1076 svga->swc->in_retry++;
1077 }
1078
1079 /**
1080 * Exit retry processing after hitting out-of-command space
1081 */
1082 static inline void
svga_retry_exit(struct svga_context * svga)1083 svga_retry_exit(struct svga_context *svga)
1084 {
1085 assert(svga->swc->in_retry > 0);
1086 svga->swc->in_retry--;
1087 }
1088
1089 /**
1090 * Perform a function call, and on failure flush the context and retry,
1091 * asserting that the retry succeeded. On return, the boolean argument
1092 * _retried indicates whether the function call was retried or not.
1093 */
1094 #define SVGA_RETRY_CHECK(_svga, _func, _retried) \
1095 do { \
1096 enum pipe_error ret; \
1097 \
1098 ret = SVGA_TRY(_func); \
1099 (_retried) = (ret != PIPE_OK); \
1100 if (_retried) { \
1101 svga_retry_enter(_svga); \
1102 svga_context_flush(_svga, NULL); \
1103 ret = (_func); \
1104 assert(ret == PIPE_OK); \
1105 svga_retry_exit(_svga); \
1106 } \
1107 } while(0)
1108
1109 /**
1110 * Perform a function call, and on failure flush the context and retry,
1111 * asserting that the retry succeeded.
1112 */
1113 #define SVGA_RETRY(_svga, _func) \
1114 do { \
1115 UNUSED boolean retried; \
1116 \
1117 SVGA_RETRY_CHECK(_svga, _func, retried); \
1118 } while(0)
1119
1120 /**
1121 * Perform a function call, and on out-of-memory, flush the context and
1122 * retry. The retry return value is stored in _ret for reuse.
1123 */
1124 #define SVGA_RETRY_OOM(_svga, _ret, _func) \
1125 do { \
1126 (_ret) = SVGA_TRY(_func); \
1127 if ((_ret) == PIPE_ERROR_OUT_OF_MEMORY) { \
1128 svga_retry_enter(_svga); \
1129 svga_context_flush(_svga, NULL); \
1130 (_ret) = (_func); \
1131 svga_retry_exit(_svga); \
1132 } \
1133 } while (0);
1134
1135 #endif
1136