1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "nir_instr_set.h"
25 #include "nir_vla.h"
26 #include "util/half_float.h"
27
28 static bool
src_is_ssa(nir_src * src,void * data)29 src_is_ssa(nir_src *src, void *data)
30 {
31 (void) data;
32 return src->is_ssa;
33 }
34
35 static bool
dest_is_ssa(nir_dest * dest,void * data)36 dest_is_ssa(nir_dest *dest, void *data)
37 {
38 (void) data;
39 return dest->is_ssa;
40 }
41
42 ASSERTED static inline bool
instr_each_src_and_dest_is_ssa(const nir_instr * instr)43 instr_each_src_and_dest_is_ssa(const nir_instr *instr)
44 {
45 if (!nir_foreach_dest((nir_instr *)instr, dest_is_ssa, NULL) ||
46 !nir_foreach_src((nir_instr *)instr, src_is_ssa, NULL))
47 return false;
48
49 return true;
50 }
51
52 /* This function determines if uses of an instruction can safely be rewritten
53 * to use another identical instruction instead. Note that this function must
54 * be kept in sync with hash_instr() and nir_instrs_equal() -- only
55 * instructions that pass this test will be handed on to those functions, and
56 * conversely they must handle everything that this function returns true for.
57 */
58 static bool
instr_can_rewrite(const nir_instr * instr)59 instr_can_rewrite(const nir_instr *instr)
60 {
61 /* We only handle SSA. */
62 assert(instr_each_src_and_dest_is_ssa(instr));
63
64 switch (instr->type) {
65 case nir_instr_type_alu:
66 case nir_instr_type_deref:
67 case nir_instr_type_tex:
68 case nir_instr_type_load_const:
69 case nir_instr_type_phi:
70 return true;
71 case nir_instr_type_intrinsic:
72 return nir_intrinsic_can_reorder(nir_instr_as_intrinsic(instr));
73 case nir_instr_type_call:
74 case nir_instr_type_jump:
75 case nir_instr_type_ssa_undef:
76 return false;
77 case nir_instr_type_parallel_copy:
78 default:
79 unreachable("Invalid instruction type");
80 }
81
82 return false;
83 }
84
85
86 #define HASH(hash, data) XXH32(&(data), sizeof(data), hash)
87
88 static uint32_t
hash_src(uint32_t hash,const nir_src * src)89 hash_src(uint32_t hash, const nir_src *src)
90 {
91 assert(src->is_ssa);
92 hash = HASH(hash, src->ssa);
93 return hash;
94 }
95
96 static uint32_t
hash_alu_src(uint32_t hash,const nir_alu_src * src,unsigned num_components)97 hash_alu_src(uint32_t hash, const nir_alu_src *src, unsigned num_components)
98 {
99 hash = HASH(hash, src->abs);
100 hash = HASH(hash, src->negate);
101
102 for (unsigned i = 0; i < num_components; i++)
103 hash = HASH(hash, src->swizzle[i]);
104
105 hash = hash_src(hash, &src->src);
106 return hash;
107 }
108
109 static uint32_t
hash_alu(uint32_t hash,const nir_alu_instr * instr)110 hash_alu(uint32_t hash, const nir_alu_instr *instr)
111 {
112 hash = HASH(hash, instr->op);
113
114 /* We explicitly don't hash instr->exact. */
115 uint8_t flags = instr->no_signed_wrap |
116 instr->no_unsigned_wrap << 1;
117 hash = HASH(hash, flags);
118
119 hash = HASH(hash, instr->dest.dest.ssa.num_components);
120 hash = HASH(hash, instr->dest.dest.ssa.bit_size);
121
122 if (nir_op_infos[instr->op].algebraic_properties & NIR_OP_IS_2SRC_COMMUTATIVE) {
123 assert(nir_op_infos[instr->op].num_inputs >= 2);
124
125 uint32_t hash0 = hash_alu_src(hash, &instr->src[0],
126 nir_ssa_alu_instr_src_components(instr, 0));
127 uint32_t hash1 = hash_alu_src(hash, &instr->src[1],
128 nir_ssa_alu_instr_src_components(instr, 1));
129 /* For commutative operations, we need some commutative way of
130 * combining the hashes. One option would be to XOR them but that
131 * means that anything with two identical sources will hash to 0 and
132 * that's common enough we probably don't want the guaranteed
133 * collision. Either addition or multiplication will also work.
134 */
135 hash = hash0 * hash1;
136
137 for (unsigned i = 2; i < nir_op_infos[instr->op].num_inputs; i++) {
138 hash = hash_alu_src(hash, &instr->src[i],
139 nir_ssa_alu_instr_src_components(instr, i));
140 }
141 } else {
142 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
143 hash = hash_alu_src(hash, &instr->src[i],
144 nir_ssa_alu_instr_src_components(instr, i));
145 }
146 }
147
148 return hash;
149 }
150
151 static uint32_t
hash_deref(uint32_t hash,const nir_deref_instr * instr)152 hash_deref(uint32_t hash, const nir_deref_instr *instr)
153 {
154 hash = HASH(hash, instr->deref_type);
155 hash = HASH(hash, instr->modes);
156 hash = HASH(hash, instr->type);
157
158 if (instr->deref_type == nir_deref_type_var)
159 return HASH(hash, instr->var);
160
161 hash = hash_src(hash, &instr->parent);
162
163 switch (instr->deref_type) {
164 case nir_deref_type_struct:
165 hash = HASH(hash, instr->strct.index);
166 break;
167
168 case nir_deref_type_array:
169 case nir_deref_type_ptr_as_array:
170 hash = hash_src(hash, &instr->arr.index);
171 break;
172
173 case nir_deref_type_cast:
174 hash = HASH(hash, instr->cast.ptr_stride);
175 hash = HASH(hash, instr->cast.align_mul);
176 hash = HASH(hash, instr->cast.align_offset);
177 break;
178
179 case nir_deref_type_var:
180 case nir_deref_type_array_wildcard:
181 /* Nothing to do */
182 break;
183
184 default:
185 unreachable("Invalid instruction deref type");
186 }
187
188 return hash;
189 }
190
191 static uint32_t
hash_load_const(uint32_t hash,const nir_load_const_instr * instr)192 hash_load_const(uint32_t hash, const nir_load_const_instr *instr)
193 {
194 hash = HASH(hash, instr->def.num_components);
195
196 if (instr->def.bit_size == 1) {
197 for (unsigned i = 0; i < instr->def.num_components; i++) {
198 uint8_t b = instr->value[i].b;
199 hash = HASH(hash, b);
200 }
201 } else {
202 unsigned size = instr->def.num_components * sizeof(*instr->value);
203 hash = XXH32(instr->value, size, hash);
204 }
205
206 return hash;
207 }
208
209 static int
cmp_phi_src(const void * data1,const void * data2)210 cmp_phi_src(const void *data1, const void *data2)
211 {
212 nir_phi_src *src1 = *(nir_phi_src **)data1;
213 nir_phi_src *src2 = *(nir_phi_src **)data2;
214 return src1->pred - src2->pred;
215 }
216
217 static uint32_t
hash_phi(uint32_t hash,const nir_phi_instr * instr)218 hash_phi(uint32_t hash, const nir_phi_instr *instr)
219 {
220 hash = HASH(hash, instr->instr.block);
221
222 /* sort sources by predecessor, since the order shouldn't matter */
223 unsigned num_preds = instr->instr.block->predecessors->entries;
224 NIR_VLA(nir_phi_src *, srcs, num_preds);
225 unsigned i = 0;
226 nir_foreach_phi_src(src, instr) {
227 srcs[i++] = src;
228 }
229
230 qsort(srcs, num_preds, sizeof(nir_phi_src *), cmp_phi_src);
231
232 for (i = 0; i < num_preds; i++) {
233 hash = hash_src(hash, &srcs[i]->src);
234 hash = HASH(hash, srcs[i]->pred);
235 }
236
237 return hash;
238 }
239
240 static uint32_t
hash_intrinsic(uint32_t hash,const nir_intrinsic_instr * instr)241 hash_intrinsic(uint32_t hash, const nir_intrinsic_instr *instr)
242 {
243 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
244 hash = HASH(hash, instr->intrinsic);
245
246 if (info->has_dest) {
247 hash = HASH(hash, instr->dest.ssa.num_components);
248 hash = HASH(hash, instr->dest.ssa.bit_size);
249 }
250
251 hash = XXH32(instr->const_index, info->num_indices * sizeof(instr->const_index[0]), hash);
252
253 for (unsigned i = 0; i < nir_intrinsic_infos[instr->intrinsic].num_srcs; i++)
254 hash = hash_src(hash, &instr->src[i]);
255
256 return hash;
257 }
258
259 static uint32_t
hash_tex(uint32_t hash,const nir_tex_instr * instr)260 hash_tex(uint32_t hash, const nir_tex_instr *instr)
261 {
262 hash = HASH(hash, instr->op);
263 hash = HASH(hash, instr->num_srcs);
264
265 for (unsigned i = 0; i < instr->num_srcs; i++) {
266 hash = HASH(hash, instr->src[i].src_type);
267 hash = hash_src(hash, &instr->src[i].src);
268 }
269
270 hash = HASH(hash, instr->coord_components);
271 hash = HASH(hash, instr->sampler_dim);
272 hash = HASH(hash, instr->is_array);
273 hash = HASH(hash, instr->is_shadow);
274 hash = HASH(hash, instr->is_new_style_shadow);
275 hash = HASH(hash, instr->is_sparse);
276 unsigned component = instr->component;
277 hash = HASH(hash, component);
278 for (unsigned i = 0; i < 4; ++i)
279 for (unsigned j = 0; j < 2; ++j)
280 hash = HASH(hash, instr->tg4_offsets[i][j]);
281 hash = HASH(hash, instr->texture_index);
282 hash = HASH(hash, instr->sampler_index);
283 hash = HASH(hash, instr->texture_non_uniform);
284 hash = HASH(hash, instr->sampler_non_uniform);
285
286 return hash;
287 }
288
289 /* Computes a hash of an instruction for use in a hash table. Note that this
290 * will only work for instructions where instr_can_rewrite() returns true, and
291 * it should return identical hashes for two instructions that are the same
292 * according nir_instrs_equal().
293 */
294
295 static uint32_t
hash_instr(const void * data)296 hash_instr(const void *data)
297 {
298 const nir_instr *instr = data;
299 uint32_t hash = 0;
300
301 switch (instr->type) {
302 case nir_instr_type_alu:
303 hash = hash_alu(hash, nir_instr_as_alu(instr));
304 break;
305 case nir_instr_type_deref:
306 hash = hash_deref(hash, nir_instr_as_deref(instr));
307 break;
308 case nir_instr_type_load_const:
309 hash = hash_load_const(hash, nir_instr_as_load_const(instr));
310 break;
311 case nir_instr_type_phi:
312 hash = hash_phi(hash, nir_instr_as_phi(instr));
313 break;
314 case nir_instr_type_intrinsic:
315 hash = hash_intrinsic(hash, nir_instr_as_intrinsic(instr));
316 break;
317 case nir_instr_type_tex:
318 hash = hash_tex(hash, nir_instr_as_tex(instr));
319 break;
320 default:
321 unreachable("Invalid instruction type");
322 }
323
324 return hash;
325 }
326
327 bool
nir_srcs_equal(nir_src src1,nir_src src2)328 nir_srcs_equal(nir_src src1, nir_src src2)
329 {
330 if (src1.is_ssa) {
331 if (src2.is_ssa) {
332 return src1.ssa == src2.ssa;
333 } else {
334 return false;
335 }
336 } else {
337 if (src2.is_ssa) {
338 return false;
339 } else {
340 if ((src1.reg.indirect == NULL) != (src2.reg.indirect == NULL))
341 return false;
342
343 if (src1.reg.indirect) {
344 if (!nir_srcs_equal(*src1.reg.indirect, *src2.reg.indirect))
345 return false;
346 }
347
348 return src1.reg.reg == src2.reg.reg &&
349 src1.reg.base_offset == src2.reg.base_offset;
350 }
351 }
352 }
353
354 /**
355 * If the \p s is an SSA value that was generated by a negation instruction,
356 * that instruction is returned as a \c nir_alu_instr. Otherwise \c NULL is
357 * returned.
358 */
359 static nir_alu_instr *
get_neg_instr(nir_src s)360 get_neg_instr(nir_src s)
361 {
362 nir_alu_instr *alu = nir_src_as_alu_instr(s);
363
364 return alu != NULL && (alu->op == nir_op_fneg || alu->op == nir_op_ineg)
365 ? alu : NULL;
366 }
367
368 bool
nir_const_value_negative_equal(nir_const_value c1,nir_const_value c2,nir_alu_type full_type)369 nir_const_value_negative_equal(nir_const_value c1,
370 nir_const_value c2,
371 nir_alu_type full_type)
372 {
373 assert(nir_alu_type_get_base_type(full_type) != nir_type_invalid);
374 assert(nir_alu_type_get_type_size(full_type) != 0);
375
376 switch (full_type) {
377 case nir_type_float16:
378 return _mesa_half_to_float(c1.u16) == -_mesa_half_to_float(c2.u16);
379
380 case nir_type_float32:
381 return c1.f32 == -c2.f32;
382
383 case nir_type_float64:
384 return c1.f64 == -c2.f64;
385
386 case nir_type_int8:
387 case nir_type_uint8:
388 return c1.i8 == -c2.i8;
389
390 case nir_type_int16:
391 case nir_type_uint16:
392 return c1.i16 == -c2.i16;
393
394 case nir_type_int32:
395 case nir_type_uint32:
396 return c1.i32 == -c2.i32;
397
398 case nir_type_int64:
399 case nir_type_uint64:
400 return c1.i64 == -c2.i64;
401
402 default:
403 break;
404 }
405
406 return false;
407 }
408
409 /**
410 * Shallow compare of ALU srcs to determine if one is the negation of the other
411 *
412 * This function detects cases where \p alu1 is a constant and \p alu2 is a
413 * constant that is its negation. It will also detect cases where \p alu2 is
414 * an SSA value that is a \c nir_op_fneg applied to \p alu1 (and vice versa).
415 *
416 * This function does not detect the general case when \p alu1 and \p alu2 are
417 * SSA values that are the negations of each other (e.g., \p alu1 represents
418 * (a * b) and \p alu2 represents (-a * b)).
419 *
420 * \warning
421 * It is the responsibility of the caller to ensure that the component counts,
422 * write masks, and base types of the sources being compared are compatible.
423 */
424 bool
nir_alu_srcs_negative_equal(const nir_alu_instr * alu1,const nir_alu_instr * alu2,unsigned src1,unsigned src2)425 nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
426 const nir_alu_instr *alu2,
427 unsigned src1, unsigned src2)
428 {
429 #ifndef NDEBUG
430 for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
431 assert(nir_alu_instr_channel_used(alu1, src1, i) ==
432 nir_alu_instr_channel_used(alu2, src2, i));
433 }
434
435 if (nir_op_infos[alu1->op].input_types[src1] == nir_type_float) {
436 assert(nir_op_infos[alu1->op].input_types[src1] ==
437 nir_op_infos[alu2->op].input_types[src2]);
438 } else {
439 assert(nir_op_infos[alu1->op].input_types[src1] == nir_type_int);
440 assert(nir_op_infos[alu2->op].input_types[src2] == nir_type_int);
441 }
442 #endif
443
444 if (alu1->src[src1].abs != alu2->src[src2].abs)
445 return false;
446
447 bool parity = alu1->src[src1].negate != alu2->src[src2].negate;
448
449 /* Handling load_const instructions is tricky. */
450
451 const nir_const_value *const const1 =
452 nir_src_as_const_value(alu1->src[src1].src);
453
454 if (const1 != NULL) {
455 /* Assume that constant folding will eliminate source mods and unary
456 * ops.
457 */
458 if (parity)
459 return false;
460
461 const nir_const_value *const const2 =
462 nir_src_as_const_value(alu2->src[src2].src);
463
464 if (const2 == NULL)
465 return false;
466
467 if (nir_src_bit_size(alu1->src[src1].src) !=
468 nir_src_bit_size(alu2->src[src2].src))
469 return false;
470
471 const nir_alu_type full_type = nir_op_infos[alu1->op].input_types[src1] |
472 nir_src_bit_size(alu1->src[src1].src);
473 for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
474 if (nir_alu_instr_channel_used(alu1, src1, i) &&
475 !nir_const_value_negative_equal(const1[alu1->src[src1].swizzle[i]],
476 const2[alu2->src[src2].swizzle[i]],
477 full_type))
478 return false;
479 }
480
481 return true;
482 }
483
484 uint8_t alu1_swizzle[NIR_MAX_VEC_COMPONENTS] = {0};
485 nir_src alu1_actual_src;
486 nir_alu_instr *neg1 = get_neg_instr(alu1->src[src1].src);
487
488 if (neg1) {
489 parity = !parity;
490 alu1_actual_src = neg1->src[0].src;
491
492 for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(neg1, 0); i++)
493 alu1_swizzle[i] = neg1->src[0].swizzle[i];
494 } else {
495 alu1_actual_src = alu1->src[src1].src;
496
497 for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++)
498 alu1_swizzle[i] = i;
499 }
500
501 uint8_t alu2_swizzle[NIR_MAX_VEC_COMPONENTS] = {0};
502 nir_src alu2_actual_src;
503 nir_alu_instr *neg2 = get_neg_instr(alu2->src[src2].src);
504
505 if (neg2) {
506 parity = !parity;
507 alu2_actual_src = neg2->src[0].src;
508
509 for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(neg2, 0); i++)
510 alu2_swizzle[i] = neg2->src[0].swizzle[i];
511 } else {
512 alu2_actual_src = alu2->src[src2].src;
513
514 for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu2, src2); i++)
515 alu2_swizzle[i] = i;
516 }
517
518 for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++) {
519 if (alu1_swizzle[alu1->src[src1].swizzle[i]] !=
520 alu2_swizzle[alu2->src[src2].swizzle[i]])
521 return false;
522 }
523
524 return parity && nir_srcs_equal(alu1_actual_src, alu2_actual_src);
525 }
526
527 bool
nir_alu_srcs_equal(const nir_alu_instr * alu1,const nir_alu_instr * alu2,unsigned src1,unsigned src2)528 nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
529 unsigned src1, unsigned src2)
530 {
531 if (alu1->src[src1].abs != alu2->src[src2].abs ||
532 alu1->src[src1].negate != alu2->src[src2].negate)
533 return false;
534
535 for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++) {
536 if (alu1->src[src1].swizzle[i] != alu2->src[src2].swizzle[i])
537 return false;
538 }
539
540 return nir_srcs_equal(alu1->src[src1].src, alu2->src[src2].src);
541 }
542
543 /* Returns "true" if two instructions are equal. Note that this will only
544 * work for the subset of instructions defined by instr_can_rewrite(). Also,
545 * it should only return "true" for instructions that hash_instr() will return
546 * the same hash for (ignoring collisions, of course).
547 */
548
549 bool
nir_instrs_equal(const nir_instr * instr1,const nir_instr * instr2)550 nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2)
551 {
552 assert(instr_can_rewrite(instr1) && instr_can_rewrite(instr2));
553
554 if (instr1->type != instr2->type)
555 return false;
556
557 switch (instr1->type) {
558 case nir_instr_type_alu: {
559 nir_alu_instr *alu1 = nir_instr_as_alu(instr1);
560 nir_alu_instr *alu2 = nir_instr_as_alu(instr2);
561
562 if (alu1->op != alu2->op)
563 return false;
564
565 /* We explicitly don't compare instr->exact. */
566
567 if (alu1->no_signed_wrap != alu2->no_signed_wrap)
568 return false;
569
570 if (alu1->no_unsigned_wrap != alu2->no_unsigned_wrap)
571 return false;
572
573 /* TODO: We can probably acutally do something more inteligent such
574 * as allowing different numbers and taking a maximum or something
575 * here */
576 if (alu1->dest.dest.ssa.num_components != alu2->dest.dest.ssa.num_components)
577 return false;
578
579 if (alu1->dest.dest.ssa.bit_size != alu2->dest.dest.ssa.bit_size)
580 return false;
581
582 if (nir_op_infos[alu1->op].algebraic_properties & NIR_OP_IS_2SRC_COMMUTATIVE) {
583 if ((!nir_alu_srcs_equal(alu1, alu2, 0, 0) ||
584 !nir_alu_srcs_equal(alu1, alu2, 1, 1)) &&
585 (!nir_alu_srcs_equal(alu1, alu2, 0, 1) ||
586 !nir_alu_srcs_equal(alu1, alu2, 1, 0)))
587 return false;
588
589 for (unsigned i = 2; i < nir_op_infos[alu1->op].num_inputs; i++) {
590 if (!nir_alu_srcs_equal(alu1, alu2, i, i))
591 return false;
592 }
593 } else {
594 for (unsigned i = 0; i < nir_op_infos[alu1->op].num_inputs; i++) {
595 if (!nir_alu_srcs_equal(alu1, alu2, i, i))
596 return false;
597 }
598 }
599 return true;
600 }
601 case nir_instr_type_deref: {
602 nir_deref_instr *deref1 = nir_instr_as_deref(instr1);
603 nir_deref_instr *deref2 = nir_instr_as_deref(instr2);
604
605 if (deref1->deref_type != deref2->deref_type ||
606 deref1->modes != deref2->modes ||
607 deref1->type != deref2->type)
608 return false;
609
610 if (deref1->deref_type == nir_deref_type_var)
611 return deref1->var == deref2->var;
612
613 if (!nir_srcs_equal(deref1->parent, deref2->parent))
614 return false;
615
616 switch (deref1->deref_type) {
617 case nir_deref_type_struct:
618 if (deref1->strct.index != deref2->strct.index)
619 return false;
620 break;
621
622 case nir_deref_type_array:
623 case nir_deref_type_ptr_as_array:
624 if (!nir_srcs_equal(deref1->arr.index, deref2->arr.index))
625 return false;
626 break;
627
628 case nir_deref_type_cast:
629 if (deref1->cast.ptr_stride != deref2->cast.ptr_stride ||
630 deref1->cast.align_mul != deref2->cast.align_mul ||
631 deref1->cast.align_offset != deref2->cast.align_offset)
632 return false;
633 break;
634
635 case nir_deref_type_var:
636 case nir_deref_type_array_wildcard:
637 /* Nothing to do */
638 break;
639
640 default:
641 unreachable("Invalid instruction deref type");
642 }
643 return true;
644 }
645 case nir_instr_type_tex: {
646 nir_tex_instr *tex1 = nir_instr_as_tex(instr1);
647 nir_tex_instr *tex2 = nir_instr_as_tex(instr2);
648
649 if (tex1->op != tex2->op)
650 return false;
651
652 if (tex1->num_srcs != tex2->num_srcs)
653 return false;
654 for (unsigned i = 0; i < tex1->num_srcs; i++) {
655 if (tex1->src[i].src_type != tex2->src[i].src_type ||
656 !nir_srcs_equal(tex1->src[i].src, tex2->src[i].src)) {
657 return false;
658 }
659 }
660
661 if (tex1->coord_components != tex2->coord_components ||
662 tex1->sampler_dim != tex2->sampler_dim ||
663 tex1->is_array != tex2->is_array ||
664 tex1->is_shadow != tex2->is_shadow ||
665 tex1->is_new_style_shadow != tex2->is_new_style_shadow ||
666 tex1->component != tex2->component ||
667 tex1->texture_index != tex2->texture_index ||
668 tex1->sampler_index != tex2->sampler_index) {
669 return false;
670 }
671
672 if (memcmp(tex1->tg4_offsets, tex2->tg4_offsets,
673 sizeof(tex1->tg4_offsets)))
674 return false;
675
676 return true;
677 }
678 case nir_instr_type_load_const: {
679 nir_load_const_instr *load1 = nir_instr_as_load_const(instr1);
680 nir_load_const_instr *load2 = nir_instr_as_load_const(instr2);
681
682 if (load1->def.num_components != load2->def.num_components)
683 return false;
684
685 if (load1->def.bit_size != load2->def.bit_size)
686 return false;
687
688 if (load1->def.bit_size == 1) {
689 for (unsigned i = 0; i < load1->def.num_components; ++i) {
690 if (load1->value[i].b != load2->value[i].b)
691 return false;
692 }
693 } else {
694 unsigned size = load1->def.num_components * sizeof(*load1->value);
695 if (memcmp(load1->value, load2->value, size) != 0)
696 return false;
697 }
698 return true;
699 }
700 case nir_instr_type_phi: {
701 nir_phi_instr *phi1 = nir_instr_as_phi(instr1);
702 nir_phi_instr *phi2 = nir_instr_as_phi(instr2);
703
704 if (phi1->instr.block != phi2->instr.block)
705 return false;
706
707 nir_foreach_phi_src(src1, phi1) {
708 nir_foreach_phi_src(src2, phi2) {
709 if (src1->pred == src2->pred) {
710 if (!nir_srcs_equal(src1->src, src2->src))
711 return false;
712
713 break;
714 }
715 }
716 }
717
718 return true;
719 }
720 case nir_instr_type_intrinsic: {
721 nir_intrinsic_instr *intrinsic1 = nir_instr_as_intrinsic(instr1);
722 nir_intrinsic_instr *intrinsic2 = nir_instr_as_intrinsic(instr2);
723 const nir_intrinsic_info *info =
724 &nir_intrinsic_infos[intrinsic1->intrinsic];
725
726 if (intrinsic1->intrinsic != intrinsic2->intrinsic ||
727 intrinsic1->num_components != intrinsic2->num_components)
728 return false;
729
730 if (info->has_dest && intrinsic1->dest.ssa.num_components !=
731 intrinsic2->dest.ssa.num_components)
732 return false;
733
734 if (info->has_dest && intrinsic1->dest.ssa.bit_size !=
735 intrinsic2->dest.ssa.bit_size)
736 return false;
737
738 for (unsigned i = 0; i < info->num_srcs; i++) {
739 if (!nir_srcs_equal(intrinsic1->src[i], intrinsic2->src[i]))
740 return false;
741 }
742
743 for (unsigned i = 0; i < info->num_indices; i++) {
744 if (intrinsic1->const_index[i] != intrinsic2->const_index[i])
745 return false;
746 }
747
748 return true;
749 }
750 case nir_instr_type_call:
751 case nir_instr_type_jump:
752 case nir_instr_type_ssa_undef:
753 case nir_instr_type_parallel_copy:
754 default:
755 unreachable("Invalid instruction type");
756 }
757
758 unreachable("All cases in the above switch should return");
759 }
760
761 static nir_ssa_def *
nir_instr_get_dest_ssa_def(nir_instr * instr)762 nir_instr_get_dest_ssa_def(nir_instr *instr)
763 {
764 switch (instr->type) {
765 case nir_instr_type_alu:
766 assert(nir_instr_as_alu(instr)->dest.dest.is_ssa);
767 return &nir_instr_as_alu(instr)->dest.dest.ssa;
768 case nir_instr_type_deref:
769 assert(nir_instr_as_deref(instr)->dest.is_ssa);
770 return &nir_instr_as_deref(instr)->dest.ssa;
771 case nir_instr_type_load_const:
772 return &nir_instr_as_load_const(instr)->def;
773 case nir_instr_type_phi:
774 assert(nir_instr_as_phi(instr)->dest.is_ssa);
775 return &nir_instr_as_phi(instr)->dest.ssa;
776 case nir_instr_type_intrinsic:
777 assert(nir_instr_as_intrinsic(instr)->dest.is_ssa);
778 return &nir_instr_as_intrinsic(instr)->dest.ssa;
779 case nir_instr_type_tex:
780 assert(nir_instr_as_tex(instr)->dest.is_ssa);
781 return &nir_instr_as_tex(instr)->dest.ssa;
782 default:
783 unreachable("We never ask for any of these");
784 }
785 }
786
787 static bool
cmp_func(const void * data1,const void * data2)788 cmp_func(const void *data1, const void *data2)
789 {
790 return nir_instrs_equal(data1, data2);
791 }
792
793 struct set *
nir_instr_set_create(void * mem_ctx)794 nir_instr_set_create(void *mem_ctx)
795 {
796 return _mesa_set_create(mem_ctx, hash_instr, cmp_func);
797 }
798
799 void
nir_instr_set_destroy(struct set * instr_set)800 nir_instr_set_destroy(struct set *instr_set)
801 {
802 _mesa_set_destroy(instr_set, NULL);
803 }
804
805 bool
nir_instr_set_add_or_rewrite(struct set * instr_set,nir_instr * instr,bool (* cond_function)(const nir_instr * a,const nir_instr * b))806 nir_instr_set_add_or_rewrite(struct set *instr_set, nir_instr *instr,
807 bool (*cond_function) (const nir_instr *a,
808 const nir_instr *b))
809 {
810 if (!instr_can_rewrite(instr))
811 return false;
812
813 struct set_entry *e = _mesa_set_search_or_add(instr_set, instr, NULL);
814 nir_instr *match = (nir_instr *) e->key;
815 if (match == instr)
816 return false;
817
818 if (!cond_function || cond_function(match, instr)) {
819 /* rewrite instruction if condition is matched */
820 nir_ssa_def *def = nir_instr_get_dest_ssa_def(instr);
821 nir_ssa_def *new_def = nir_instr_get_dest_ssa_def(match);
822
823 /* It's safe to replace an exact instruction with an inexact one as
824 * long as we make it exact. If we got here, the two instructions are
825 * exactly identical in every other way so, once we've set the exact
826 * bit, they are the same.
827 */
828 if (instr->type == nir_instr_type_alu && nir_instr_as_alu(instr)->exact)
829 nir_instr_as_alu(match)->exact = true;
830
831 nir_ssa_def_rewrite_uses(def, new_def);
832
833 nir_instr_remove(instr);
834
835 return true;
836 } else {
837 /* otherwise, replace hashed instruction */
838 e->key = instr;
839 return false;
840 }
841 }
842
843 void
nir_instr_set_remove(struct set * instr_set,nir_instr * instr)844 nir_instr_set_remove(struct set *instr_set, nir_instr *instr)
845 {
846 if (!instr_can_rewrite(instr))
847 return;
848
849 struct set_entry *entry = _mesa_set_search(instr_set, instr);
850 if (entry)
851 _mesa_set_remove(instr_set, entry);
852 }
853
854