1 /*
2 * Copyright © 2020 Google, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include "util/ralloc.h"
25 #include "util/u_dynarray.h"
26
27 #include "ir3.h"
28
29 /**
30 * A bit more extra cleanup after sched pass. In particular, prior to
31 * instruction scheduling, we can't easily eliminate unneeded mov's
32 * from "arrays", because we don't yet know if there is an intervening
33 * array-write scheduled before the use of the array-read.
34 *
35 * NOTE array is equivalent to nir "registers".. ie. it can be length of
36 * one. It is basically anything that is not SSA.
37 */
38
39 /**
40 * Check if any instruction before `use` and after `src` writes to the
41 * specified array. If `offset` is negative, it is a relative (a0.x)
42 * access and we care about all writes to the array (as we don't know
43 * which array element is read). Otherwise in the case of non-relative
44 * access, we only have to care about the write to the specified (>= 0)
45 * offset. In this case, we update `def` to point to the last write in
46 * between `use` and `src` to the same array, so that `use` points to
47 * the correct array write.
48 */
49 static bool
has_conflicting_write(struct ir3_instruction * src,struct ir3_instruction * use,struct ir3_register ** def,unsigned id,int offset)50 has_conflicting_write(struct ir3_instruction *src, struct ir3_instruction *use,
51 struct ir3_register **def, unsigned id, int offset)
52 {
53 assert(src->block == use->block);
54 bool last_write = true;
55
56 /* NOTE that since src and use are in the same block, src by
57 * definition appears in the block's instr_list before use:
58 */
59 foreach_instr_rev (instr, &use->node) {
60 if (instr == src)
61 break;
62
63 /* if we are looking at a RELATIV read, we can't move
64 * it past an a0.x write:
65 */
66 if ((offset < 0) && (dest_regs(instr) > 0) &&
67 (instr->dsts[0]->num == regid(REG_A0, 0)))
68 return true;
69
70 if (!writes_gpr(instr))
71 continue;
72
73 struct ir3_register *dst = instr->dsts[0];
74 if (!(dst->flags & IR3_REG_ARRAY))
75 continue;
76
77 if (dst->array.id != id)
78 continue;
79
80 /*
81 * At this point, we have narrowed down an instruction
82 * that writes to the same array.. check if it the write
83 * is to an array element that we care about:
84 */
85
86 /* is write to an unknown array element? */
87 if (dst->flags & IR3_REG_RELATIV)
88 return true;
89
90 /* is read from an unknown array element? */
91 if (offset < 0)
92 return true;
93
94 /* is write to same array element? */
95 if (dst->array.offset == offset)
96 return true;
97
98 if (last_write)
99 *def = dst;
100
101 last_write = false;
102 }
103
104 return false;
105 }
106
107 /* Can we fold the mov src into use without invalid flags? */
108 static bool
valid_flags(struct ir3_instruction * use,struct ir3_instruction * mov)109 valid_flags(struct ir3_instruction *use, struct ir3_instruction *mov)
110 {
111 struct ir3_register *src = mov->srcs[0];
112
113 foreach_src_n (reg, n, use) {
114 if (ssa(reg) != mov)
115 continue;
116
117 if (!ir3_valid_flags(use, n, reg->flags | src->flags))
118 return false;
119 }
120
121 return true;
122 }
123
124 static bool
instr_cp_postsched(struct ir3_instruction * mov)125 instr_cp_postsched(struct ir3_instruction *mov)
126 {
127 struct ir3_register *src = mov->srcs[0];
128
129 /* only consider mov's from "arrays", other cases we have
130 * already considered already:
131 */
132 if (!(src->flags & IR3_REG_ARRAY))
133 return false;
134
135 int offset = (src->flags & IR3_REG_RELATIV) ? -1 : src->array.offset;
136
137 /* Once we move the array read directly into the consuming
138 * instruction(s), we will also need to update instructions
139 * that had a false-dep on the original mov to have deps
140 * on the consuming instructions:
141 */
142 struct util_dynarray newdeps;
143 util_dynarray_init(&newdeps, mov->uses);
144
145 foreach_ssa_use (use, mov) {
146 if (use->block != mov->block)
147 continue;
148
149 if (is_meta(use))
150 continue;
151
152 struct ir3_register *def = src->def;
153 if (has_conflicting_write(mov, use, &def, src->array.id, offset))
154 continue;
155
156 if (conflicts(mov->address, use->address))
157 continue;
158
159 if (!valid_flags(use, mov))
160 continue;
161
162 /* Ok, we've established that it is safe to remove this copy: */
163
164 bool removed = false;
165 foreach_src_n (reg, n, use) {
166 if (ssa(reg) != mov)
167 continue;
168
169 use->srcs[n] = ir3_reg_clone(mov->block->shader, src);
170
171 /* preserve (abs)/etc modifiers: */
172 use->srcs[n]->flags |= reg->flags;
173
174 /* If we're sinking the array read past any writes, make
175 * sure to update it to point to the new previous write:
176 */
177 use->srcs[n]->def = def;
178
179 removed = true;
180 }
181
182 /* the use could have been only a false-dep, only add to the newdeps
183 * array and update the address if we've actually updated a real src
184 * reg for the use:
185 */
186 if (removed) {
187 if (src->flags & IR3_REG_RELATIV)
188 ir3_instr_set_address(use, mov->address->def->instr);
189
190 util_dynarray_append(&newdeps, struct ir3_instruction *, use);
191
192 /* Remove the use from the src instruction: */
193 _mesa_set_remove_key(mov->uses, use);
194 }
195 }
196
197 /* Once we have the complete set of instruction(s) that are are now
198 * directly reading from the array, update any false-dep uses to
199 * now depend on these instructions. The only remaining uses at
200 * this point should be false-deps:
201 */
202 foreach_ssa_use (use, mov) {
203 util_dynarray_foreach (&newdeps, struct ir3_instruction *, instrp) {
204 struct ir3_instruction *newdep = *instrp;
205 ir3_instr_add_dep(use, newdep);
206 }
207 }
208
209 return util_dynarray_num_elements(&newdeps, struct ir3_instruction **) > 0;
210 }
211
212 bool
ir3_cp_postsched(struct ir3 * ir)213 ir3_cp_postsched(struct ir3 *ir)
214 {
215 void *mem_ctx = ralloc_context(NULL);
216 bool progress = false;
217
218 ir3_find_ssa_uses(ir, mem_ctx, false);
219
220 foreach_block (block, &ir->block_list) {
221 foreach_instr_safe (instr, &block->instr_list) {
222 if (is_same_type_mov(instr))
223 progress |= instr_cp_postsched(instr);
224 }
225 }
226
227 ralloc_free(mem_ctx);
228
229 return progress;
230 }
231