1 /*
2 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
3 
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7 
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15 
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19 
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 */
28 
29 #ifndef _R200_REG_H_
30 #define _R200_REG_H_
31 
32 #define R200_PP_MISC                      0x1c14
33 #define     R200_REF_ALPHA_MASK        0x000000ff
34 #define     R200_ALPHA_TEST_FAIL       (0 << 8)
35 #define     R200_ALPHA_TEST_LESS       (1 << 8)
36 #define     R200_ALPHA_TEST_LEQUAL     (2 << 8)
37 #define     R200_ALPHA_TEST_EQUAL      (3 << 8)
38 #define     R200_ALPHA_TEST_GEQUAL     (4 << 8)
39 #define     R200_ALPHA_TEST_GREATER    (5 << 8)
40 #define     R200_ALPHA_TEST_NEQUAL     (6 << 8)
41 #define     R200_ALPHA_TEST_PASS       (7 << 8)
42 #define     R200_ALPHA_TEST_OP_MASK    (7 << 8)
43 #define     R200_CHROMA_FUNC_FAIL      (0 << 16)
44 #define     R200_CHROMA_FUNC_PASS      (1 << 16)
45 #define     R200_CHROMA_FUNC_NEQUAL    (2 << 16)
46 #define     R200_CHROMA_FUNC_EQUAL     (3 << 16)
47 #define     R200_CHROMA_KEY_NEAREST    (0 << 18)
48 #define     R200_CHROMA_KEY_ZERO       (1 << 18)
49 #define     R200_RIGHT_HAND_CUBE_D3D   (0 << 24)
50 #define     R200_RIGHT_HAND_CUBE_OGL   (1 << 24)
51 #define R200_PP_FOG_COLOR                 0x1c18
52 #define     R200_FOG_COLOR_MASK        0x00ffffff
53 #define     R200_FOG_VERTEX            (0 << 24)
54 #define     R200_FOG_TABLE             (1 << 24)
55 #define     R200_FOG_USE_DEPTH         (0 << 25)
56 #define     R200_FOG_USE_W             (1 << 25)
57 #define     R200_FOG_USE_DIFFUSE_ALPHA (2 << 25)
58 #define     R200_FOG_USE_SPEC_ALPHA    (3 << 25)
59 #define     R200_FOG_USE_VTX_FOG       (4 << 25)
60 #define     R200_FOG_USE_MASK          (7 << 25)
61 #define R200_RE_SOLID_COLOR               0x1c1c
62 #define R200_RB3D_BLENDCNTL               0x1c20
63 #define     R200_COMB_FCN_MASK                    (7  << 12)
64 #define     R200_COMB_FCN_ADD_CLAMP               (0  << 12)
65 #define     R200_COMB_FCN_ADD_NOCLAMP             (1  << 12)
66 #define     R200_COMB_FCN_SUB_CLAMP               (2  << 12)
67 #define     R200_COMB_FCN_SUB_NOCLAMP             (3  << 12)
68 #define     R200_COMB_FCN_MIN                     (4  << 12)
69 #define     R200_COMB_FCN_MAX                     (5  << 12)
70 #define     R200_COMB_FCN_RSUB_CLAMP              (6  << 12)
71 #define     R200_COMB_FCN_RSUB_NOCLAMP            (7  << 12)
72 #define       R200_BLEND_GL_ZERO                  (32)
73 #define       R200_BLEND_GL_ONE                   (33)
74 #define       R200_BLEND_GL_SRC_COLOR             (34)
75 #define       R200_BLEND_GL_ONE_MINUS_SRC_COLOR   (35)
76 #define       R200_BLEND_GL_DST_COLOR             (36)
77 #define       R200_BLEND_GL_ONE_MINUS_DST_COLOR   (37)
78 #define       R200_BLEND_GL_SRC_ALPHA             (38)
79 #define       R200_BLEND_GL_ONE_MINUS_SRC_ALPHA   (39)
80 #define       R200_BLEND_GL_DST_ALPHA             (40)
81 #define       R200_BLEND_GL_ONE_MINUS_DST_ALPHA   (41)
82 #define       R200_BLEND_GL_SRC_ALPHA_SATURATE    (42) /* src factor only */
83 #define       R200_BLEND_GL_CONST_COLOR           (43)
84 #define       R200_BLEND_GL_ONE_MINUS_CONST_COLOR (44)
85 #define       R200_BLEND_GL_CONST_ALPHA           (45)
86 #define       R200_BLEND_GL_ONE_MINUS_CONST_ALPHA (46)
87 #define       R200_BLEND_MASK                     (63)
88 #define     R200_SRC_BLEND_SHIFT                  (16)
89 #define     R200_DST_BLEND_SHIFT                  (24)
90 #define R200_RB3D_DEPTHOFFSET             0x1c24
91 #define R200_RB3D_DEPTHPITCH              0x1c28
92 #define     R200_DEPTHPITCH_MASK         0x00001ff8
93 #define     R200_DEPTH_HYPERZ            (3 << 16)
94 #define     R200_DEPTH_ENDIAN_NO_SWAP    (0 << 18)
95 #define     R200_DEPTH_ENDIAN_WORD_SWAP  (1 << 18)
96 #define     R200_DEPTH_ENDIAN_DWORD_SWAP (2 << 18)
97 #define R200_RB3D_ZSTENCILCNTL            0x1c2c
98 #define     R200_DEPTH_FORMAT_MASK          (0xf << 0)
99 #define     R200_DEPTH_FORMAT_16BIT_INT_Z   (0  <<  0)
100 #define     R200_DEPTH_FORMAT_24BIT_INT_Z   (2  <<  0)
101 #define     R200_DEPTH_FORMAT_24BIT_FLOAT_Z (3  <<  0)
102 #define     R200_DEPTH_FORMAT_32BIT_INT_Z   (4  <<  0)
103 #define     R200_DEPTH_FORMAT_32BIT_FLOAT_Z (5  <<  0)
104 #define     R200_DEPTH_FORMAT_24BIT_FLOAT_W (9  <<  0)
105 #define     R200_DEPTH_FORMAT_32BIT_FLOAT_W (11 <<  0)
106 #define     R200_Z_TEST_NEVER               (0  <<  4)
107 #define     R200_Z_TEST_LESS                (1  <<  4)
108 #define     R200_Z_TEST_LEQUAL              (2  <<  4)
109 #define     R200_Z_TEST_EQUAL               (3  <<  4)
110 #define     R200_Z_TEST_GEQUAL              (4  <<  4)
111 #define     R200_Z_TEST_GREATER             (5  <<  4)
112 #define     R200_Z_TEST_NEQUAL              (6  <<  4)
113 #define     R200_Z_TEST_ALWAYS              (7  <<  4)
114 #define     R200_Z_TEST_MASK                (7  <<  4)
115 #define     R200_Z_HIERARCHY_ENABLE         (1  <<  8)
116 #define     R200_STENCIL_TEST_NEVER         (0  << 12)
117 #define     R200_STENCIL_TEST_LESS          (1  << 12)
118 #define     R200_STENCIL_TEST_LEQUAL        (2  << 12)
119 #define     R200_STENCIL_TEST_EQUAL         (3  << 12)
120 #define     R200_STENCIL_TEST_GEQUAL        (4  << 12)
121 #define     R200_STENCIL_TEST_GREATER       (5  << 12)
122 #define     R200_STENCIL_TEST_NEQUAL        (6  << 12)
123 #define     R200_STENCIL_TEST_ALWAYS        (7  << 12)
124 #define     R200_STENCIL_TEST_MASK          (0x7 << 12)
125 #define     R200_STENCIL_FAIL_KEEP          (0  << 16)
126 #define     R200_STENCIL_FAIL_ZERO          (1  << 16)
127 #define     R200_STENCIL_FAIL_REPLACE       (2  << 16)
128 #define     R200_STENCIL_FAIL_INC           (3  << 16)
129 #define     R200_STENCIL_FAIL_DEC           (4  << 16)
130 #define     R200_STENCIL_FAIL_INVERT        (5  << 16)
131 #define     R200_STENCIL_FAIL_INC_WRAP      (6  << 16)
132 #define     R200_STENCIL_FAIL_DEC_WRAP      (7  << 16)
133 #define     R200_STENCIL_FAIL_MASK          (0x7 << 16)
134 #define     R200_STENCIL_ZPASS_KEEP         (0  << 20)
135 #define     R200_STENCIL_ZPASS_ZERO         (1  << 20)
136 #define     R200_STENCIL_ZPASS_REPLACE      (2  << 20)
137 #define     R200_STENCIL_ZPASS_INC          (3  << 20)
138 #define     R200_STENCIL_ZPASS_DEC          (4  << 20)
139 #define     R200_STENCIL_ZPASS_INVERT       (5  << 20)
140 #define     R200_STENCIL_ZPASS_INC_WRAP     (6  << 20)
141 #define     R200_STENCIL_ZPASS_DEC_WRAP     (7  << 20)
142 #define     R200_STENCIL_ZPASS_MASK         (0x7 << 20)
143 #define     R200_STENCIL_ZFAIL_KEEP         (0  << 24)
144 #define     R200_STENCIL_ZFAIL_ZERO         (1  << 24)
145 #define     R200_STENCIL_ZFAIL_REPLACE      (2  << 24)
146 #define     R200_STENCIL_ZFAIL_INC          (3  << 24)
147 #define     R200_STENCIL_ZFAIL_DEC          (4  << 24)
148 #define     R200_STENCIL_ZFAIL_INVERT       (5  << 24)
149 #define     R200_STENCIL_ZFAIL_INC_WRAP     (6  << 24)
150 #define     R200_STENCIL_ZFAIL_DEC_WRAP     (7  << 24)
151 #define     R200_STENCIL_ZFAIL_MASK         (0x7 << 24)
152 #define     R200_Z_COMPRESSION_ENABLE       (1  << 28)
153 #define     R200_FORCE_Z_DIRTY              (1  << 29)
154 #define     R200_Z_WRITE_ENABLE             (1  << 30)
155 #define     R200_Z_DECOMPRESSION_ENABLE     (1  << 31)
156 /*gap*/
157 #define R200_PP_CNTL                      0x1c38
158 #define     R200_TEX_0_ENABLE                         0x00000010
159 #define     R200_TEX_1_ENABLE                         0x00000020
160 #define     R200_TEX_2_ENABLE                         0x00000040
161 #define     R200_TEX_3_ENABLE                         0x00000080
162 #define     R200_TEX_4_ENABLE                         0x00000100
163 #define     R200_TEX_5_ENABLE                         0x00000200
164 #define     R200_TEX_ENABLE_MASK                      0x000003f0
165 #define     R200_FILTER_ROUND_MODE_MASK               0x00000400
166 #define     R200_TEX_BLEND_7_ENABLE                   0x00000800
167 #define     R200_TEX_BLEND_0_ENABLE                   0x00001000
168 #define     R200_TEX_BLEND_1_ENABLE                   0x00002000
169 #define     R200_TEX_BLEND_2_ENABLE                   0x00004000
170 #define     R200_TEX_BLEND_3_ENABLE                   0x00008000
171 #define     R200_TEX_BLEND_4_ENABLE                   0x00010000
172 #define     R200_TEX_BLEND_5_ENABLE                   0x00020000
173 #define     R200_TEX_BLEND_6_ENABLE                   0x00040000
174 #define     R200_TEX_BLEND_ENABLE_MASK                0x0007f800
175 #define     R200_TEX_BLEND_0_ENABLE_SHIFT             (12)
176 #define     R200_MULTI_PASS_ENABLE                    0x00080000
177 #define     R200_SPECULAR_ENABLE                      0x00200000
178 #define     R200_FOG_ENABLE                           0x00400000
179 #define     R200_ALPHA_TEST_ENABLE                    0x00800000
180 #define     R200_ANTI_ALIAS_NONE                       0x00000000
181 #define     R200_ANTI_ALIAS_LINE                       0x01000000
182 #define     R200_ANTI_ALIAS_POLY                       0x02000000
183 #define     R200_ANTI_ALIAS_MASK                       0x03000000
184 #define R200_RB3D_CNTL                    0x1c3c
185 #define     R200_ALPHA_BLEND_ENABLE       (1  <<  0)
186 #define     R200_PLANE_MASK_ENABLE        (1  <<  1)
187 #define     R200_DITHER_ENABLE            (1  <<  2)
188 #define     R200_ROUND_ENABLE             (1  <<  3)
189 #define     R200_SCALE_DITHER_ENABLE      (1  <<  4)
190 #define     R200_DITHER_INIT              (1  <<  5)
191 #define     R200_ROP_ENABLE               (1  <<  6)
192 #define     R200_STENCIL_ENABLE           (1  <<  7)
193 #define     R200_Z_ENABLE                 (1  <<  8)
194 #define     R200_DEPTH_XZ_OFFEST_ENABLE   (1  <<  9)
195 #define     R200_COLOR_FORMAT_ARGB1555    (3  << 10)
196 #define     R200_COLOR_FORMAT_RGB565      (4  << 10)
197 #define     R200_COLOR_FORMAT_ARGB8888    (6  << 10)
198 #define     R200_COLOR_FORMAT_RGB332      (7  << 10)
199 #define     R200_COLOR_FORMAT_Y8          (8  << 10)
200 #define     R200_COLOR_FORMAT_RGB8        (9  << 10)
201 #define     R200_COLOR_FORMAT_YUV422_VYUY (11 << 10)
202 #define     R200_COLOR_FORMAT_YUV422_YVYU (12 << 10)
203 #define     R200_COLOR_FORMAT_aYUV444     (14 << 10)
204 #define     R200_COLOR_FORMAT_ARGB4444    (15 << 10)
205 #define     R200_CLRCMP_FLIP_ENABLE       (1  << 14)
206 #define     R200_SEPARATE_ALPHA_ENABLE    (1  << 16)
207 #define R200_RB3D_COLOROFFSET             0x1c40
208 #define     R200_COLOROFFSET_MASK      0xfffffff0
209 #define R200_RE_WIDTH_HEIGHT              0x1c44
210 #define     R200_RE_WIDTH_SHIFT        0
211 #define     R200_RE_HEIGHT_SHIFT       16
212 #define R200_RB3D_COLORPITCH              0x1c48
213 #define     R200_COLORPITCH_MASK         0x000001ff8
214 #define     R200_COLOR_TILE_ENABLE       (1 << 16)
215 #define     R200_COLOR_MICROTILE_ENABLE  (1 << 17)
216 #define     R200_COLOR_ENDIAN_NO_SWAP    (0 << 18)
217 #define     R200_COLOR_ENDIAN_WORD_SWAP  (1 << 18)
218 #define     R200_COLOR_ENDIAN_DWORD_SWAP (2 << 18)
219 #define R200_SE_CNTL                      0x1c4c
220 #define     R200_FFACE_CULL_CW          (0 <<  0)
221 #define     R200_FFACE_CULL_CCW         (1 <<  0)
222 #define     R200_FFACE_CULL_DIR_MASK    (1 <<  0)
223 #define     R200_BFACE_CULL             (0 <<  1)
224 #define     R200_BFACE_SOLID            (3 <<  1)
225 #define     R200_FFACE_CULL             (0 <<  3)
226 #define     R200_FFACE_SOLID            (3 <<  3)
227 #define     R200_FFACE_CULL_MASK        (3 <<  3)
228 #define     R200_FLAT_SHADE_VTX_0       (0 <<  6)
229 #define     R200_FLAT_SHADE_VTX_1       (1 <<  6)
230 #define     R200_FLAT_SHADE_VTX_2       (2 <<  6)
231 #define     R200_FLAT_SHADE_VTX_LAST    (3 <<  6)
232 #define     R200_DIFFUSE_SHADE_SOLID    (0 <<  8)
233 #define     R200_DIFFUSE_SHADE_FLAT     (1 <<  8)
234 #define     R200_DIFFUSE_SHADE_GOURAUD  (2 <<  8)
235 #define     R200_DIFFUSE_SHADE_MASK     (3 <<  8)
236 #define     R200_ALPHA_SHADE_SOLID      (0 << 10)
237 #define     R200_ALPHA_SHADE_FLAT       (1 << 10)
238 #define     R200_ALPHA_SHADE_GOURAUD    (2 << 10)
239 #define     R200_ALPHA_SHADE_MASK       (3 << 10)
240 #define     R200_SPECULAR_SHADE_SOLID   (0 << 12)
241 #define     R200_SPECULAR_SHADE_FLAT    (1 << 12)
242 #define     R200_SPECULAR_SHADE_GOURAUD (2 << 12)
243 #define     R200_SPECULAR_SHADE_MASK    (3 << 12)
244 #define     R200_FOG_SHADE_SOLID        (0 << 14)
245 #define     R200_FOG_SHADE_FLAT         (1 << 14)
246 #define     R200_FOG_SHADE_GOURAUD      (2 << 14)
247 #define     R200_FOG_SHADE_MASK         (3 << 14)
248 #define     R200_ZBIAS_ENABLE_POINT     (1 << 16)
249 #define     R200_ZBIAS_ENABLE_LINE      (1 << 17)
250 #define     R200_ZBIAS_ENABLE_TRI       (1 << 18)
251 #define     R200_WIDELINE_ENABLE        (1 << 20)
252 #define     R200_DISC_FOG_SHADE_SOLID   (0 << 24)
253 #define     R200_DISC_FOG_SHADE_FLAT    (1 << 24)
254 #define     R200_DISC_FOG_SHADE_GOURAUD (2 << 24)
255 #define     R200_DISC_FOG_SHADE_MASK    (3 << 24)
256 #define     R200_VTX_PIX_CENTER_D3D     (0 << 27)
257 #define     R200_VTX_PIX_CENTER_OGL     (1 << 27)
258 #define     R200_ROUND_MODE_TRUNC       (0 << 28)
259 #define     R200_ROUND_MODE_ROUND       (1 << 28)
260 #define     R200_ROUND_MODE_ROUND_EVEN  (2 << 28)
261 #define     R200_ROUND_MODE_ROUND_ODD   (3 << 28)
262 #define     R200_ROUND_PREC_16TH_PIX    (0 << 30)
263 #define     R200_ROUND_PREC_8TH_PIX     (1 << 30)
264 #define     R200_ROUND_PREC_4TH_PIX     (2 << 30)
265 #define     R200_ROUND_PREC_HALF_PIX    (3 << 30)
266 #define R200_RE_CNTL                      0x1c50
267 #define     R200_STIPPLE_ENABLE                     0x1
268 #define     R200_SCISSOR_ENABLE                     0x2
269 #define     R200_PATTERN_ENABLE                     0x4
270 #define     R200_PERSPECTIVE_ENABLE                 0x8
271 #define     R200_POINT_SMOOTH                       0x20
272 #define     R200_VTX_STQ0_D3D                       0x00010000
273 #define     R200_VTX_STQ1_D3D                       0x00040000
274 #define     R200_VTX_STQ2_D3D                       0x00100000
275 #define     R200_VTX_STQ3_D3D                       0x00400000
276 #define     R200_VTX_STQ4_D3D                       0x01000000
277 #define     R200_VTX_STQ5_D3D                       0x04000000
278 /* gap */
279 #define R200_RE_STIPPLE_ADDR              0x1cc8
280 #define R200_RE_STIPPLE_DATA              0x1ccc
281 #define R200_RE_LINE_PATTERN              0x1cd0
282 #define     R200_LINE_PATTERN_MASK             0x0000ffff
283 #define     R200_LINE_REPEAT_COUNT_SHIFT       16
284 #define     R200_LINE_PATTERN_START_SHIFT      24
285 #define     R200_LINE_PATTERN_LITTLE_BIT_ORDER (0 << 28)
286 #define     R200_LINE_PATTERN_BIG_BIT_ORDER    (1 << 28)
287 #define     R200_LINE_PATTERN_AUTO_RESET       (1 << 29)
288 #define R200_RE_LINE_STATE                0x1cd4
289 #define     R200_LINE_CURRENT_PTR_SHIFT       0
290 #define     R200_LINE_CURRENT_COUNT_SHIFT     8
291 #define R200_RE_SCISSOR_TL_0              0x1cd8
292 #define R200_RE_SCISSOR_BR_0              0x1cdc
293 #define R200_RE_SCISSOR_TL_1              0x1ce0
294 #define R200_RE_SCISSOR_BR_1              0x1ce4
295 #define R200_RE_SCISSOR_TL_2              0x1ce8
296 #define R200_RE_SCISSOR_BR_2              0x1cec
297 /* gap */
298 #define R200_RB3D_DEPTHXY_OFFSET          0x1d60
299 #define     R200_DEPTHX_SHIFT  0
300 #define     R200_DEPTHY_SHIFT  16
301 /* gap */
302 #define R200_RB3D_STENCILREFMASK          0x1d7c
303 #define     R200_STENCIL_REF_SHIFT           0
304 #define     R200_STENCIL_REF_MASK            (0xff << 0)
305 #define     R200_STENCIL_MASK_SHIFT          16
306 #define     R200_STENCIL_VALUE_MASK          (0xff << 16)
307 #define     R200_STENCIL_WRITEMASK_SHIFT     24
308 #define     R200_STENCIL_WRITE_MASK          (0xff << 24)
309 #define R200_RB3D_ROPCNTL                 0x1d80
310 #define     R200_ROP_MASK                    (15 << 8)
311 #define     R200_ROP_CLEAR                   (0  << 8)
312 #define     R200_ROP_NOR                     (1  << 8)
313 #define     R200_ROP_AND_INVERTED            (2  << 8)
314 #define     R200_ROP_COPY_INVERTED           (3  << 8)
315 #define     R200_ROP_AND_REVERSE             (4  << 8)
316 #define     R200_ROP_INVERT                  (5  << 8)
317 #define     R200_ROP_XOR                     (6  << 8)
318 #define     R200_ROP_NAND                    (7  << 8)
319 #define     R200_ROP_AND                     (8  << 8)
320 #define     R200_ROP_EQUIV                   (9  << 8)
321 #define     R200_ROP_NOOP                    (10 << 8)
322 #define     R200_ROP_OR_INVERTED             (11 << 8)
323 #define     R200_ROP_COPY                    (12 << 8)
324 #define     R200_ROP_OR_REVERSE              (13 << 8)
325 #define     R200_ROP_OR                      (14 << 8)
326 #define     R200_ROP_SET                     (15 << 8)
327 #define R200_RB3D_PLANEMASK               0x1d84
328 /* gap */
329 #define R200_SE_VPORT_XSCALE              0x1d98
330 #define R200_SE_VPORT_XOFFSET             0x1d9c
331 #define R200_SE_VPORT_YSCALE              0x1da0
332 #define R200_SE_VPORT_YOFFSET             0x1da4
333 #define R200_SE_VPORT_ZSCALE              0x1da8
334 #define R200_SE_VPORT_ZOFFSET             0x1dac
335 #define R200_SE_ZBIAS_FACTOR              0x1db0
336 #define R200_SE_ZBIAS_CONSTANT            0x1db4
337 #define R200_SE_LINE_WIDTH                0x1db8
338 #define	    R200_LINE_WIDTH_SHIFT                   0x00000000
339 #define	    R200_MINPOINTSIZE_SHIFT                 0x00000010
340 /* gap */
341 #define R200_SE_VAP_CNTL                           0x2080
342 #define     R200_VAP_TCL_ENABLE                       0x00000001
343 #define     R200_VAP_PROG_VTX_SHADER_ENABLE           0x00000004
344 #define     R200_VAP_SINGLE_BUF_STATE_ENABLE          0x00000010
345 #define     R200_VAP_FORCE_W_TO_ONE                   0x00010000
346 #define     R200_VAP_D3D_TEX_DEFAULT                  0x00020000
347 #define     R200_VAP_VF_MAX_VTX_NUM__SHIFT            18
348 #define     R200_VAP_DX_CLIP_SPACE_DEF                0x00400000
349 #define R200_SE_VF_CNTL                           0x2084
350 #define     R200_VF_PRIM_NONE                         0x00000000
351 #define     R200_VF_PRIM_POINTS                       0x00000001
352 #define     R200_VF_PRIM_LINES                        0x00000002
353 #define     R200_VF_PRIM_LINE_STRIP                   0x00000003
354 #define     R200_VF_PRIM_TRIANGLES                    0x00000004
355 #define     R200_VF_PRIM_TRIANGLE_FAN                 0x00000005
356 #define     R200_VF_PRIM_TRIANGLE_STRIP               0x00000006
357 #define     R200_VF_PRIM_RECT_LIST                    0x00000008
358 #define     R200_VF_PRIM_3VRT_POINTS                  0x00000009
359 #define     R200_VF_PRIM_3VRT_LINES                   0x0000000a
360 #define     R200_VF_PRIM_POINT_SPRITES                0x0000000b
361 #define     R200_VF_PRIM_LINE_LOOP                    0x0000000c
362 #define     R200_VF_PRIM_QUADS                        0x0000000d
363 #define     R200_VF_PRIM_QUAD_STRIP                   0x0000000e
364 #define     R200_VF_PRIM_POLYGON                      0x0000000f
365 #define     R200_VF_PRIM_MASK                         0x0000000f
366 #define     R200_VF_PRIM_WALK_IND                     0x00000010
367 #define     R200_VF_PRIM_WALK_LIST                    0x00000020
368 #define     R200_VF_PRIM_WALK_RING                    0x00000030
369 #define     R200_VF_PRIM_WALK_MASK                    0x00000030
370 #define     R200_VF_COLOR_ORDER_RGBA                  0x00000040
371 #define     R200_VF_TCL_OUTPUT_VTX_ENABLE             0x00000200
372 #define     R200_VF_INDEX_SZ_4                        0x00000800
373 #define     R200_VF_VERTEX_NUMBER_MASK                0xffff0000
374 #define     R200_VF_VERTEX_NUMBER_SHIFT               16
375 #define R200_SE_VTX_FMT_0                 0x2088
376 #define     R200_VTX_XY                     0 /* always have xy */
377 #define     R200_VTX_Z0                     (1<<0)
378 #define     R200_VTX_W0                     (1<<1)
379 #define     R200_VTX_WEIGHT_COUNT_SHIFT     (2)
380 #define     R200_VTX_PV_MATRIX_SEL          (1<<5)
381 #define     R200_VTX_N0                     (1<<6)
382 #define     R200_VTX_POINT_SIZE             (1<<7)
383 #define     R200_VTX_DISCRETE_FOG           (1<<8)
384 #define     R200_VTX_SHININESS_0            (1<<9)
385 #define     R200_VTX_SHININESS_1            (1<<10)
386 #define       R200_VTX_COLOR_NOT_PRESENT      0
387 #define       R200_VTX_PK_RGBA          1
388 #define       R200_VTX_FP_RGB           2
389 #define       R200_VTX_FP_RGBA          3
390 #define       R200_VTX_COLOR_MASK             3
391 #define     R200_VTX_COLOR_0_SHIFT          11
392 #define     R200_VTX_COLOR_1_SHIFT          13
393 #define     R200_VTX_COLOR_2_SHIFT          15
394 #define     R200_VTX_COLOR_3_SHIFT          17
395 #define     R200_VTX_COLOR_4_SHIFT          19
396 #define     R200_VTX_COLOR_5_SHIFT          21
397 #define     R200_VTX_COLOR_6_SHIFT          23
398 #define     R200_VTX_COLOR_7_SHIFT          25
399 #define     R200_VTX_XY1                    (1<<28)
400 #define     R200_VTX_Z1                     (1<<29)
401 #define     R200_VTX_W1                     (1<<30)
402 #define     R200_VTX_N1                     (1<<31)
403 #define R200_SE_VTX_FMT_1                 0x208c
404 #define     R200_VTX_TEX0_COMP_CNT_SHIFT        0
405 #define     R200_VTX_TEX1_COMP_CNT_SHIFT        3
406 #define     R200_VTX_TEX2_COMP_CNT_SHIFT        6
407 #define     R200_VTX_TEX3_COMP_CNT_SHIFT        9
408 #define     R200_VTX_TEX4_COMP_CNT_SHIFT        12
409 #define     R200_VTX_TEX5_COMP_CNT_SHIFT        15
410 #define R200_SE_TCL_OUTPUT_VTX_FMT_0      0x2090
411 #define R200_SE_TCL_OUTPUT_VTX_FMT_1      0x2094
412 /* gap */
413 #define R200_SE_VTE_CNTL                  0x20b0
414 #define     R200_VPORT_X_SCALE_ENA                0x00000001
415 #define     R200_VPORT_X_OFFSET_ENA               0x00000002
416 #define     R200_VPORT_Y_SCALE_ENA                0x00000004
417 #define     R200_VPORT_Y_OFFSET_ENA               0x00000008
418 #define     R200_VPORT_Z_SCALE_ENA                0x00000010
419 #define     R200_VPORT_Z_OFFSET_ENA               0x00000020
420 #define     R200_VTX_XY_FMT                       0x00000100
421 #define     R200_VTX_Z_FMT                        0x00000200
422 #define     R200_VTX_W0_FMT                       0x00000400
423 #define     R200_VTX_W0_NORMALIZE                 0x00000800
424 #define     R200_VTX_ST_DENORMALIZED              0x00001000
425 /* gap */
426 #define R200_SE_VTX_NUM_ARRAYS            0x20c0
427 #define R200_SE_VTX_AOS_ATTR01            0x20c4
428 #define R200_SE_VTX_AOS_ADDR0             0x20c8
429 #define R200_SE_VTX_AOS_ADDR1             0x20cc
430 #define R200_SE_VTX_AOS_ATTR23            0x20d0
431 #define R200_SE_VTX_AOS_ADDR2             0x20d4
432 #define R200_SE_VTX_AOS_ADDR3             0x20d8
433 #define R200_SE_VTX_AOS_ATTR45            0x20dc
434 #define R200_SE_VTX_AOS_ADDR4             0x20e0
435 #define R200_SE_VTX_AOS_ADDR5             0x20e4
436 #define R200_SE_VTX_AOS_ATTR67            0x20e8
437 #define R200_SE_VTX_AOS_ADDR6             0x20ec
438 #define R200_SE_VTX_AOS_ADDR7             0x20f0
439 #define R200_SE_VTX_AOS_ATTR89            0x20f4
440 #define R200_SE_VTX_AOS_ADDR8             0x20f8
441 #define R200_SE_VTX_AOS_ADDR9             0x20fc
442 #define R200_SE_VTX_AOS_ATTR1011          0x2100
443 #define R200_SE_VTX_AOS_ADDR10            0x2104
444 #define R200_SE_VTX_AOS_ADDR11            0x2108
445 #define R200_SE_VF_MAX_VTX_INDX           0x210c
446 #define R200_SE_VF_MIN_VTX_INDX           0x2110
447 /* gap */
448 #define R200_SE_VAP_CNTL_STATUS           0x2140
449 #define     R200_VC_NO_SWAP                  (0 << 0)
450 #define     R200_VC_16BIT_SWAP               (1 << 0)
451 #define     R200_VC_32BIT_SWAP               (2 << 0)
452 /* gap */
453 #define R200_SE_VTX_STATE_CNTL                     0x2180
454 #define     R200_VSC_COLOR_0_ASSEMBLY_CNTL_SHIFT    0x00000000
455 #define     R200_VSC_COLOR_1_ASSEMBLY_CNTL_SHIFT    0x00000002
456 #define     R200_VSC_COLOR_2_ASSEMBLY_CNTL_SHIFT    0x00000004
457 #define     R200_VSC_COLOR_3_ASSEMBLY_CNTL_SHIFT    0x00000006
458 #define     R200_VSC_COLOR_4_ASSEMBLY_CNTL_SHIFT    0x00000008
459 #define     R200_VSC_COLOR_5_ASSEMBLY_CNTL_SHIFT    0x0000000a
460 #define     R200_VSC_COLOR_6_ASSEMBLY_CNTL_SHIFT    0x0000000c
461 #define     R200_VSC_COLOR_7_ASSEMBLY_CNTL_SHIFT    0x0000000e
462 #define     R200_VSC_UPDATE_USER_COLOR_0_ENABLE    0x00010000
463 #define     R200_VSC_UPDATE_USER_COLOR_1_ENABLE    0x00020000
464 /* gap */
465 #define R200_SE_TCL_VECTOR_INDX_REG                0x2200
466 #       define RADEON_VEC_INDX_OCTWORD_STRIDE_SHIFT  16
467 #       define RADEON_VEC_INDX_DWORD_COUNT_SHIFT     28
468 #define R200_SE_TCL_VECTOR_DATA_REG                0x2204
469 #define R200_SE_TCL_SCALAR_INDX_REG                0x2208
470 #       define RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT  16
471 #define R200_SE_TCL_SCALAR_DATA_REG                0x220c
472 /* gap */
473 #define R200_SE_TCL_MATRIX_SEL_0                   0x2230
474 #define     R200_MODELVIEW_0_SHIFT           (0)
475 #define     R200_MODELVIEW_1_SHIFT           (8)
476 #define     R200_MODELVIEW_2_SHIFT           (16)
477 #define     R200_MODELVIEW_3_SHIFT           (24)
478 #define R200_SE_TCL_MATRIX_SEL_1                   0x2234
479 #define     R200_IT_MODELVIEW_0_SHIFT        (0)
480 #define     R200_IT_MODELVIEW_1_SHIFT        (8)
481 #define     R200_IT_MODELVIEW_2_SHIFT        (16)
482 #define     R200_IT_MODELVIEW_3_SHIFT        (24)
483 #define R200_SE_TCL_MATRIX_SEL_2                   0x2238
484 #define     R200_MODELPROJECT_0_SHIFT         (0)
485 #define     R200_MODELPROJECT_1_SHIFT         (8)
486 #define     R200_MODELPROJECT_2_SHIFT         (16)
487 #define     R200_MODELPROJECT_3_SHIFT         (24)
488 #define R200_SE_TCL_MATRIX_SEL_3                   0x223c
489 #define     R200_TEXMAT_0_SHIFT    0
490 #define     R200_TEXMAT_1_SHIFT    8
491 #define     R200_TEXMAT_2_SHIFT    16
492 #define     R200_TEXMAT_3_SHIFT    24
493 #define R200_SE_TCL_MATRIX_SEL_4                   0x2240
494 #define     R200_TEXMAT_4_SHIFT    0
495 #define     R200_TEXMAT_5_SHIFT    8
496 /* gap */
497 #define R200_SE_TCL_OUTPUT_VTX_COMP_SEL     0x2250
498 #define     R200_OUTPUT_XYZW                    (1<<0)
499 #define     R200_OUTPUT_COLOR_0                 (1<<8)
500 #define     R200_OUTPUT_COLOR_1                 (1<<9)
501 #define     R200_OUTPUT_TEX_0                   (1<<16)
502 #define     R200_OUTPUT_TEX_1                   (1<<17)
503 #define     R200_OUTPUT_TEX_2                   (1<<18)
504 #define     R200_OUTPUT_TEX_3                   (1<<19)
505 #define     R200_OUTPUT_TEX_4                   (1<<20)
506 #define     R200_OUTPUT_TEX_5                   (1<<21)
507 #define     R200_OUTPUT_TEX_MASK                (0x3f<<16)
508 #define     R200_OUTPUT_DISCRETE_FOG            (1<<24)
509 #define     R200_OUTPUT_PT_SIZE                 (1<<25)
510 #define     R200_FORCE_INORDER_PROC             (1<<31)
511 #define R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0  0x2254
512 #define	    R200_VERTEX_POSITION_ADDR__SHIFT     0x00000000
513 #define R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_1  0x2258
514 #define	    R200_VTX_COLOR_0_ADDR__SHIFT         0x00000000
515 #define	    R200_VTX_COLOR_1_ADDR__SHIFT         0x00000008
516 #define R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_2  0x225c
517 #define	    R200_VTX_TEX_0_ADDR__SHIFT           0x00000000
518 #define	    R200_VTX_TEX_1_ADDR__SHIFT           0x00000008
519 #define	    R200_VTX_TEX_2_ADDR__SHIFT           0x00000010
520 #define	    R200_VTX_TEX_3_ADDR__SHIFT           0x00000018
521 #define R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_3  0x2260
522 #define	    R200_VTX_TEX_4_ADDR__SHIFT           0x00000000
523 #define	    R200_VTX_TEX_5_ADDR__SHIFT           0x00000008
524 
525 /* gap */
526 #define R200_SE_TCL_LIGHT_MODEL_CTL_0       0x2268
527 #define     R200_LIGHTING_ENABLE                (1<<0)
528 #define     R200_LIGHT_IN_MODELSPACE            (1<<1)
529 #define     R200_LOCAL_VIEWER                   (1<<2)
530 #define     R200_NORMALIZE_NORMALS              (1<<3)
531 #define     R200_RESCALE_NORMALS                (1<<4)
532 #define     R200_SPECULAR_LIGHTS                (1<<5)
533 #define     R200_DIFFUSE_SPECULAR_COMBINE       (1<<6)
534 #define     R200_LIGHT_ALPHA                    (1<<7)
535 #define     R200_LOCAL_LIGHT_VEC_GL             (1<<8)
536 #define     R200_LIGHT_NO_NORMAL_AMBIENT_ONLY   (1<<9)
537 #define     R200_LIGHT_TWOSIDE                  (1<<10)
538 #define     R200_FRONT_SHININESS_SOURCE_SHIFT       (0xb)
539 #define     R200_BACK_SHININESS_SOURCE_SHIFT        (0xd)
540 #define       R200_LM0_SOURCE_MATERIAL_0           (0)
541 #define       R200_LM0_SOURCE_MATERIAL_1           (1)
542 #define       R200_LM0_SOURCE_VERTEX_SHININESS_0   (2)
543 #define       R200_LM0_SOURCE_VERTEX_SHININESS_1   (3)
544 #define R200_SE_TCL_LIGHT_MODEL_CTL_1       0x226c
545 #define       R200_LM1_SOURCE_LIGHT_PREMULT        (0)
546 #define       R200_LM1_SOURCE_MATERIAL_0           (1)
547 #define       R200_LM1_SOURCE_VERTEX_COLOR_0       (2)
548 #define       R200_LM1_SOURCE_VERTEX_COLOR_1       (3)
549 #define       R200_LM1_SOURCE_VERTEX_COLOR_2       (4)
550 #define       R200_LM1_SOURCE_VERTEX_COLOR_3       (5)
551 #define       R200_LM1_SOURCE_VERTEX_COLOR_4       (6)
552 #define       R200_LM1_SOURCE_VERTEX_COLOR_5       (7)
553 #define       R200_LM1_SOURCE_VERTEX_COLOR_6       (8)
554 #define       R200_LM1_SOURCE_VERTEX_COLOR_7       (9)
555 #define       R200_LM1_SOURCE_MATERIAL_1           (0xf)
556 #define     R200_FRONT_EMISSIVE_SOURCE_SHIFT        (0)
557 #define     R200_FRONT_AMBIENT_SOURCE_SHIFT         (4)
558 #define     R200_FRONT_DIFFUSE_SOURCE_SHIFT         (8)
559 #define     R200_FRONT_SPECULAR_SOURCE_SHIFT        (12)
560 #define     R200_BACK_EMISSIVE_SOURCE_SHIFT         (16)
561 #define     R200_BACK_AMBIENT_SOURCE_SHIFT          (20)
562 #define     R200_BACK_DIFFUSE_SOURCE_SHIFT          (24)
563 #define     R200_BACK_SPECULAR_SOURCE_SHIFT         (28)
564 #define R200_SE_TCL_PER_LIGHT_CTL_0       0x2270
565 #define     R200_LIGHT_0_ENABLE                    (1<<0)
566 #define     R200_LIGHT_0_ENABLE_AMBIENT            (1<<1)
567 #define     R200_LIGHT_0_ENABLE_SPECULAR           (1<<2)
568 #define     R200_LIGHT_0_IS_LOCAL                  (1<<3)
569 #define     R200_LIGHT_0_IS_SPOT                   (1<<4)
570 #define     R200_LIGHT_0_DUAL_CONE                 (1<<5)
571 #define     R200_LIGHT_0_ENABLE_RANGE_ATTEN        (1<<6)
572 #define     R200_LIGHT_0_CONSTANT_RANGE_ATTEN      (1<<7)
573 #define     R200_LIGHT_1_ENABLE                    (1<<16)
574 #define     R200_LIGHT_1_ENABLE_AMBIENT            (1<<17)
575 #define     R200_LIGHT_1_ENABLE_SPECULAR           (1<<18)
576 #define     R200_LIGHT_1_IS_LOCAL                  (1<<19)
577 #define     R200_LIGHT_1_IS_SPOT                   (1<<20)
578 #define     R200_LIGHT_1_DUAL_CONE                 (1<<21)
579 #define     R200_LIGHT_1_ENABLE_RANGE_ATTEN        (1<<22)
580 #define     R200_LIGHT_1_CONSTANT_RANGE_ATTEN      (1<<23)
581 #define     R200_LIGHT_0_SHIFT                   (0)
582 #define     R200_LIGHT_1_SHIFT                   (16)
583 #define R200_SE_TCL_PER_LIGHT_CTL_1       0x2274
584 #define     R200_LIGHT_2_SHIFT                   (0)
585 #define     R200_LIGHT_3_SHIFT                   (16)
586 #define R200_SE_TCL_PER_LIGHT_CTL_2       0x2278
587 #define     R200_LIGHT_4_SHIFT                   (0)
588 #define     R200_LIGHT_5_SHIFT                   (16)
589 #define R200_SE_TCL_PER_LIGHT_CTL_3       0x227c
590 #define     R200_LIGHT_6_SHIFT                   (0)
591 #define     R200_LIGHT_7_SHIFT                   (16)
592 /* gap */
593 #define R200_SE_TCL_TEX_PROC_CTL_2        0x22a8
594 #define     R200_TEXGEN_COMP_MASK                (0xf)
595 #define     R200_TEXGEN_COMP_S                   (0x1)
596 #define     R200_TEXGEN_COMP_T                   (0x2)
597 #define     R200_TEXGEN_COMP_R                   (0x4)
598 #define     R200_TEXGEN_COMP_Q                   (0x8)
599 #define     R200_TEXGEN_0_COMP_MASK_SHIFT        (0)
600 #define     R200_TEXGEN_1_COMP_MASK_SHIFT        (4)
601 #define     R200_TEXGEN_2_COMP_MASK_SHIFT        (8)
602 #define     R200_TEXGEN_3_COMP_MASK_SHIFT        (12)
603 #define     R200_TEXGEN_4_COMP_MASK_SHIFT        (16)
604 #define     R200_TEXGEN_5_COMP_MASK_SHIFT        (20)
605 #define R200_SE_TCL_TEX_PROC_CTL_3        0x22ac
606 #define     R200_TEXGEN_0_INPUT_TEX_SHIFT        (0)
607 #define     R200_TEXGEN_1_INPUT_TEX_SHIFT        (4)
608 #define     R200_TEXGEN_2_INPUT_TEX_SHIFT        (8)
609 #define     R200_TEXGEN_3_INPUT_TEX_SHIFT        (12)
610 #define     R200_TEXGEN_4_INPUT_TEX_SHIFT        (16)
611 #define     R200_TEXGEN_5_INPUT_TEX_SHIFT        (20)
612 #define R200_SE_TCL_TEX_PROC_CTL_0        0x22b0
613 #define     R200_TEXGEN_TEXMAT_0_ENABLE         (1<<0)
614 #define     R200_TEXGEN_TEXMAT_1_ENABLE         (1<<1)
615 #define     R200_TEXGEN_TEXMAT_2_ENABLE         (1<<2)
616 #define     R200_TEXGEN_TEXMAT_3_ENABLE         (1<<3)
617 #define     R200_TEXGEN_TEXMAT_4_ENABLE         (1<<4)
618 #define     R200_TEXGEN_TEXMAT_5_ENABLE         (1<<5)
619 #define     R200_TEXMAT_0_ENABLE                (1<<8)
620 #define     R200_TEXMAT_1_ENABLE                (1<<9)
621 #define     R200_TEXMAT_2_ENABLE                (1<<10)
622 #define     R200_TEXMAT_3_ENABLE                (1<<11)
623 #define     R200_TEXMAT_4_ENABLE                (1<<12)
624 #define     R200_TEXMAT_5_ENABLE                (1<<13)
625 #define     R200_TEXGEN_FORCE_W_TO_ONE          (1<<16)
626 #define R200_SE_TCL_TEX_PROC_CTL_1        0x22b4
627 #define       R200_TEXGEN_INPUT_MASK           (0xf)
628 #define       R200_TEXGEN_INPUT_TEXCOORD_0     (0)
629 #define       R200_TEXGEN_INPUT_TEXCOORD_1     (1)
630 #define       R200_TEXGEN_INPUT_TEXCOORD_2     (2)
631 #define       R200_TEXGEN_INPUT_TEXCOORD_3     (3)
632 #define       R200_TEXGEN_INPUT_TEXCOORD_4     (4)
633 #define       R200_TEXGEN_INPUT_TEXCOORD_5     (5)
634 #define       R200_TEXGEN_INPUT_OBJ            (8)
635 #define       R200_TEXGEN_INPUT_EYE            (9)
636 #define       R200_TEXGEN_INPUT_EYE_NORMAL     (0xa)
637 #define       R200_TEXGEN_INPUT_EYE_REFLECT    (0xb)
638 #define       R200_TEXGEN_INPUT_SPHERE         (0xd)
639 #define     R200_TEXGEN_0_INPUT_SHIFT        (0)
640 #define     R200_TEXGEN_1_INPUT_SHIFT        (4)
641 #define     R200_TEXGEN_2_INPUT_SHIFT        (8)
642 #define     R200_TEXGEN_3_INPUT_SHIFT        (12)
643 #define     R200_TEXGEN_4_INPUT_SHIFT        (16)
644 #define     R200_TEXGEN_5_INPUT_SHIFT        (20)
645 #define R200_SE_TC_TEX_CYL_WRAP_CTL       0x22b8
646 /* gap */
647 #define R200_SE_TCL_UCP_VERT_BLEND_CTL    0x22c0
648 #define     R200_UCP_IN_CLIP_SPACE              (1<<0)
649 #define     R200_UCP_IN_MODEL_SPACE             (1<<1)
650 #define     R200_UCP_ENABLE_0                   (1<<2)
651 #define     R200_UCP_ENABLE_1                   (1<<3)
652 #define     R200_UCP_ENABLE_2                   (1<<4)
653 #define     R200_UCP_ENABLE_3                   (1<<5)
654 #define     R200_UCP_ENABLE_4                   (1<<6)
655 #define     R200_UCP_ENABLE_5                   (1<<7)
656 #define     R200_TCL_FOG_MASK                   (3<<8)
657 #define     R200_TCL_FOG_DISABLE                (0<<8)
658 #define     R200_TCL_FOG_EXP                    (1<<8)
659 #define     R200_TCL_FOG_EXP2                   (2<<8)
660 #define     R200_TCL_FOG_LINEAR                 (3<<8)
661 #define     R200_RNG_BASED_FOG                  (1<<10)
662 #define     R200_CLIP_DISABLE                   (1<<11)
663 #define     R200_CULL_FRONT_IS_CW               (0<<28)
664 #define     R200_CULL_FRONT_IS_CCW              (1<<28)
665 #define     R200_CULL_FRONT                     (1<<29)
666 #define     R200_CULL_BACK                      (1<<30)
667 #define R200_SE_TCL_POINT_SPRITE_CNTL     0x22c4
668 #define     R200_PS_MULT_PVATTENCONST           (0<<0)
669 #define     R200_PS_MULT_PVATTEN                (1<<0)
670 #define     R200_PS_MULT_ATTENCONST             (2<<0)
671 #define     R200_PS_MULT_PVCONST                (3<<0)
672 #define     R200_PS_MULT_CONST                  (4<<0)
673 #define     R200_PS_MULT_MASK                   (7<<0)
674 #define     R200_PS_LIN_ATT_ZERO                (1<<3)
675 #define     R200_PS_USE_MODEL_EYE_VEC           (1<<4)
676 #define     R200_PS_ATT_ALPHA                   (1<<5)
677 #define     R200_PS_UCP_MODE_MASK               (3<<6)
678 #define     R200_PS_GEN_TEX_0                   (1<<8)
679 #define     R200_PS_GEN_TEX_1                   (1<<9)
680 #define     R200_PS_GEN_TEX_2                   (1<<10)
681 #define     R200_PS_GEN_TEX_3                   (1<<11)
682 #define     R200_PS_GEN_TEX_4                   (1<<12)
683 #define     R200_PS_GEN_TEX_5                   (1<<13)
684 #define     R200_PS_GEN_TEX_0_SHIFT             (8)
685 #define     R200_PS_GEN_TEX_MASK                (0x3f<<8)
686 #define     R200_PS_SE_SEL_STATE                (1<<16)
687 /* gap */
688 /* taken from r300, see comments there */
689 #define R200_VAP_PVS_CNTL_1                 0x22d0
690 #       define R200_PVS_CNTL_1_PROGRAM_START_SHIFT   0
691 #       define R200_PVS_CNTL_1_POS_END_SHIFT         10
692 #       define R200_PVS_CNTL_1_PROGRAM_END_SHIFT     20
693 /* Addresses are relative to the vertex program parameters area. */
694 #define R200_VAP_PVS_CNTL_2                 0x22d4
695 #       define R200_PVS_CNTL_2_PARAM_OFFSET_SHIFT 0
696 #       define R200_PVS_CNTL_2_PARAM_COUNT_SHIFT  16
697 /* gap */
698 
699 #define R200_SE_VTX_ST_POS_0_X_4                   0x2300
700 #define R200_SE_VTX_ST_POS_0_Y_4                   0x2304
701 #define R200_SE_VTX_ST_POS_0_Z_4                   0x2308
702 #define R200_SE_VTX_ST_POS_0_W_4                   0x230c
703 #define R200_SE_VTX_ST_NORM_0_X                    0x2310
704 #define R200_SE_VTX_ST_NORM_0_Y                    0x2314
705 #define R200_SE_VTX_ST_NORM_0_Z                    0x2318
706 #define R200_SE_VTX_ST_PVMS                        0x231c
707 #define R200_SE_VTX_ST_CLR_0_R                     0x2320
708 #define R200_SE_VTX_ST_CLR_0_G                     0x2324
709 #define R200_SE_VTX_ST_CLR_0_B                     0x2328
710 #define R200_SE_VTX_ST_CLR_0_A                     0x232c
711 #define R200_SE_VTX_ST_CLR_1_R                     0x2330
712 #define R200_SE_VTX_ST_CLR_1_G                     0x2334
713 #define R200_SE_VTX_ST_CLR_1_B                     0x2338
714 #define R200_SE_VTX_ST_CLR_1_A                     0x233c
715 #define R200_SE_VTX_ST_CLR_2_R                     0x2340
716 #define R200_SE_VTX_ST_CLR_2_G                     0x2344
717 #define R200_SE_VTX_ST_CLR_2_B                     0x2348
718 #define R200_SE_VTX_ST_CLR_2_A                     0x234c
719 #define R200_SE_VTX_ST_CLR_3_R                     0x2350
720 #define R200_SE_VTX_ST_CLR_3_G                     0x2354
721 #define R200_SE_VTX_ST_CLR_3_B                     0x2358
722 #define R200_SE_VTX_ST_CLR_3_A                     0x235c
723 #define R200_SE_VTX_ST_CLR_4_R                     0x2360
724 #define R200_SE_VTX_ST_CLR_4_G                     0x2364
725 #define R200_SE_VTX_ST_CLR_4_B                     0x2368
726 #define R200_SE_VTX_ST_CLR_4_A                     0x236c
727 #define R200_SE_VTX_ST_CLR_5_R                     0x2370
728 #define R200_SE_VTX_ST_CLR_5_G                     0x2374
729 #define R200_SE_VTX_ST_CLR_5_B                     0x2378
730 #define R200_SE_VTX_ST_CLR_5_A                     0x237c
731 #define R200_SE_VTX_ST_CLR_6_R                     0x2380
732 #define R200_SE_VTX_ST_CLR_6_G                     0x2384
733 #define R200_SE_VTX_ST_CLR_6_B                     0x2388
734 #define R200_SE_VTX_ST_CLR_6_A                     0x238c
735 #define R200_SE_VTX_ST_CLR_7_R                     0x2390
736 #define R200_SE_VTX_ST_CLR_7_G                     0x2394
737 #define R200_SE_VTX_ST_CLR_7_B                     0x2398
738 #define R200_SE_VTX_ST_CLR_7_A                     0x239c
739 #define R200_SE_VTX_ST_TEX_0_S                     0x23a0
740 #define R200_SE_VTX_ST_TEX_0_T                     0x23a4
741 #define R200_SE_VTX_ST_TEX_0_R                     0x23a8
742 #define R200_SE_VTX_ST_TEX_0_Q                     0x23ac
743 #define R200_SE_VTX_ST_TEX_1_S                     0x23b0
744 #define R200_SE_VTX_ST_TEX_1_T                     0x23b4
745 #define R200_SE_VTX_ST_TEX_1_R                     0x23b8
746 #define R200_SE_VTX_ST_TEX_1_Q                     0x23bc
747 #define R200_SE_VTX_ST_TEX_2_S                     0x23c0
748 #define R200_SE_VTX_ST_TEX_2_T                     0x23c4
749 #define R200_SE_VTX_ST_TEX_2_R                     0x23c8
750 #define R200_SE_VTX_ST_TEX_2_Q                     0x23cc
751 #define R200_SE_VTX_ST_TEX_3_S                     0x23d0
752 #define R200_SE_VTX_ST_TEX_3_T                     0x23d4
753 #define R200_SE_VTX_ST_TEX_3_R                     0x23d8
754 #define R200_SE_VTX_ST_TEX_3_Q                     0x23dc
755 #define R200_SE_VTX_ST_TEX_4_S                     0x23e0
756 #define R200_SE_VTX_ST_TEX_4_T                     0x23e4
757 #define R200_SE_VTX_ST_TEX_4_R                     0x23e8
758 #define R200_SE_VTX_ST_TEX_4_Q                     0x23ec
759 #define R200_SE_VTX_ST_TEX_5_S                     0x23f0
760 #define R200_SE_VTX_ST_TEX_5_T                     0x23f4
761 #define R200_SE_VTX_ST_TEX_5_R                     0x23f8
762 #define R200_SE_VTX_ST_TEX_5_Q                     0x23fc
763 #define R200_SE_VTX_ST_PNT_SPRT_SZ                 0x2400
764 #define R200_SE_VTX_ST_DISC_FOG                    0x2404
765 #define R200_SE_VTX_ST_SHININESS_0                 0x2408
766 #define R200_SE_VTX_ST_SHININESS_1                 0x240c
767 #define R200_SE_VTX_ST_BLND_WT_0                   0x2410
768 #define R200_SE_VTX_ST_BLND_WT_1                   0x2414
769 #define R200_SE_VTX_ST_BLND_WT_2                   0x2418
770 #define R200_SE_VTX_ST_BLND_WT_3                   0x241c
771 #define R200_SE_VTX_ST_POS_1_X                     0x2420
772 #define R200_SE_VTX_ST_POS_1_Y                     0x2424
773 #define R200_SE_VTX_ST_POS_1_Z                     0x2428
774 #define R200_SE_VTX_ST_POS_1_W                     0x242c
775 #define R200_SE_VTX_ST_NORM_1_X                    0x2430
776 #define R200_SE_VTX_ST_NORM_1_Y                    0x2434
777 #define R200_SE_VTX_ST_NORM_1_Z                    0x2438
778 #define R200_SE_VTX_ST_USR_CLR_0_R                 0x2440
779 #define R200_SE_VTX_ST_USR_CLR_0_G                 0x2444
780 #define R200_SE_VTX_ST_USR_CLR_0_B                 0x2448
781 #define R200_SE_VTX_ST_USR_CLR_0_A                 0x244c
782 #define R200_SE_VTX_ST_USR_CLR_1_R                 0x2450
783 #define R200_SE_VTX_ST_USR_CLR_1_G                 0x2454
784 #define R200_SE_VTX_ST_USR_CLR_1_B                 0x2458
785 #define R200_SE_VTX_ST_USR_CLR_1_A                 0x245c
786 #define R200_SE_VTX_ST_CLR_0_PKD                   0x2460
787 #define R200_SE_VTX_ST_CLR_1_PKD                   0x2464
788 #define R200_SE_VTX_ST_CLR_2_PKD                   0x2468
789 #define R200_SE_VTX_ST_CLR_3_PKD                   0x246c
790 #define R200_SE_VTX_ST_CLR_4_PKD                   0x2470
791 #define R200_SE_VTX_ST_CLR_5_PKD                   0x2474
792 #define R200_SE_VTX_ST_CLR_6_PKD                   0x2478
793 #define R200_SE_VTX_ST_CLR_7_PKD                   0x247c
794 #define R200_SE_VTX_ST_POS_0_X_2                   0x2480
795 #define R200_SE_VTX_ST_POS_0_Y_2                   0x2484
796 #define R200_SE_VTX_ST_PAR_CLR_LD                  0x2488
797 #define R200_SE_VTX_ST_USR_CLR_PKD                 0x248c
798 #define R200_SE_VTX_ST_POS_0_X_3                   0x2490
799 #define R200_SE_VTX_ST_POS_0_Y_3                   0x2494
800 #define R200_SE_VTX_ST_POS_0_Z_3                   0x2498
801 #define R200_SE_VTX_ST_END_OF_PKT                  0x249c
802 /* gap */
803 #define R200_RE_POINTSIZE                          0x2648
804 #define     R200_POINTSIZE_SHIFT                       0
805 #define     R200_MAXPOINTSIZE_SHIFT                    16
806 /* gap */
807 #define R200_RE_TOP_LEFT                  0x26c0
808 #define     R200_RE_LEFT_SHIFT         0
809 #define     R200_RE_TOP_SHIFT          16
810 #define R200_RE_MISC                      0x26c4
811 #define     R200_STIPPLE_COORD_MASK           0x1f
812 #define     R200_STIPPLE_X_OFFSET_SHIFT       0
813 #define     R200_STIPPLE_X_OFFSET_MASK        (0x1f << 0)
814 #define     R200_STIPPLE_Y_OFFSET_SHIFT       8
815 #define     R200_STIPPLE_Y_OFFSET_MASK        (0x1f << 8)
816 #define     R200_STIPPLE_LITTLE_BIT_ORDER     (0 << 16)
817 #define     R200_STIPPLE_BIG_BIT_ORDER        (1 << 16)
818 /* gap */
819 #define R200_RE_AUX_SCISSOR_CNTL                   0x26f0
820 #define     R200_EXCLUSIVE_SCISSOR_0      0x01000000
821 #define     R200_EXCLUSIVE_SCISSOR_1      0x02000000
822 #define     R200_EXCLUSIVE_SCISSOR_2      0x04000000
823 #define     R200_SCISSOR_ENABLE_0         0x10000000
824 #define     R200_SCISSOR_ENABLE_1         0x20000000
825 #define     R200_SCISSOR_ENABLE_2         0x40000000
826 /* gap */
827 #define R200_PP_TXFILTER_0                0x2c00
828 #define     R200_MAG_FILTER_NEAREST                   (0  <<  0)
829 #define     R200_MAG_FILTER_LINEAR                    (1  <<  0)
830 #define     R200_MAG_FILTER_MASK                      (1  <<  0)
831 #define     R200_MIN_FILTER_NEAREST                   (0  <<  1)
832 #define     R200_MIN_FILTER_LINEAR                    (1  <<  1)
833 #define     R200_MIN_FILTER_NEAREST_MIP_NEAREST       (2  <<  1)
834 #define     R200_MIN_FILTER_NEAREST_MIP_LINEAR        (3  <<  1)
835 #define     R200_MIN_FILTER_LINEAR_MIP_NEAREST        (6  <<  1)
836 #define     R200_MIN_FILTER_LINEAR_MIP_LINEAR         (7  <<  1)
837 #define     R200_MIN_FILTER_ANISO_NEAREST             (8  <<  1)
838 #define     R200_MIN_FILTER_ANISO_LINEAR              (9  <<  1)
839 #define     R200_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST (10 <<  1)
840 #define     R200_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR  (11 <<  1)
841 #define     R200_MIN_FILTER_MASK                      (15 <<  1)
842 #define     R200_MAX_ANISO_1_TO_1                     (0  <<  5)
843 #define     R200_MAX_ANISO_2_TO_1                     (1  <<  5)
844 #define     R200_MAX_ANISO_4_TO_1                     (2  <<  5)
845 #define     R200_MAX_ANISO_8_TO_1                     (3  <<  5)
846 #define     R200_MAX_ANISO_16_TO_1                    (4  <<  5)
847 #define     R200_MAX_ANISO_MASK                       (7  <<  5)
848 #define     R200_MAX_MIP_LEVEL_MASK                   (0x0f << 16)
849 #define     R200_MAX_MIP_LEVEL_SHIFT                  16
850 #define     R200_YUV_TO_RGB                           (1  << 20)
851 #define     R200_YUV_TEMPERATURE_COOL                 (0  << 21)
852 #define     R200_YUV_TEMPERATURE_HOT                  (1  << 21)
853 #define     R200_YUV_TEMPERATURE_MASK                 (1  << 21)
854 #define     R200_WRAPEN_S                             (1  << 22)
855 #define     R200_CLAMP_S_WRAP                         (0  << 23)
856 #define     R200_CLAMP_S_MIRROR                       (1  << 23)
857 #define     R200_CLAMP_S_CLAMP_LAST                   (2  << 23)
858 #define     R200_CLAMP_S_MIRROR_CLAMP_LAST            (3  << 23)
859 #define     R200_CLAMP_S_CLAMP_BORDER                 (4  << 23)
860 #define     R200_CLAMP_S_MIRROR_CLAMP_BORDER          (5  << 23)
861 #define     R200_CLAMP_S_CLAMP_GL                     (6  << 23)
862 #define     R200_CLAMP_S_MIRROR_CLAMP_GL              (7  << 23)
863 #define     R200_CLAMP_S_MASK                         (7  << 23)
864 #define     R200_WRAPEN_T                             (1  << 26)
865 #define     R200_CLAMP_T_WRAP                         (0  << 27)
866 #define     R200_CLAMP_T_MIRROR                       (1  << 27)
867 #define     R200_CLAMP_T_CLAMP_LAST                   (2  << 27)
868 #define     R200_CLAMP_T_MIRROR_CLAMP_LAST            (3  << 27)
869 #define     R200_CLAMP_T_CLAMP_BORDER                 (4  << 27)
870 #define     R200_CLAMP_T_MIRROR_CLAMP_BORDER          (5  << 27)
871 #define     R200_CLAMP_T_CLAMP_GL                     (6  << 27)
872 #define     R200_CLAMP_T_MIRROR_CLAMP_GL              (7  << 27)
873 #define     R200_CLAMP_T_MASK                         (7  << 27)
874 #define     R200_KILL_LT_ZERO                         (1  << 30)
875 #define     R200_BORDER_MODE_OGL                      (0  << 31)
876 #define     R200_BORDER_MODE_D3D                      (1  << 31)
877 #define R200_PP_TXFORMAT_0                0x2c04
878 #define     R200_TXFORMAT_I8                 (0  <<  0)
879 #define     R200_TXFORMAT_AI88               (1  <<  0)
880 #define     R200_TXFORMAT_RGB332             (2  <<  0)
881 #define     R200_TXFORMAT_ARGB1555           (3  <<  0)
882 #define     R200_TXFORMAT_RGB565             (4  <<  0)
883 #define     R200_TXFORMAT_ARGB4444           (5  <<  0)
884 #define     R200_TXFORMAT_ARGB8888           (6  <<  0)
885 #define     R200_TXFORMAT_RGBA8888           (7  <<  0)
886 #define     R200_TXFORMAT_Y8                 (8  <<  0)
887 #define     R200_TXFORMAT_AVYU4444           (9  <<  0)
888 #define     R200_TXFORMAT_VYUY422            (10  <<  0)
889 #define     R200_TXFORMAT_YVYU422            (11  <<  0)
890 #define     R200_TXFORMAT_DXT1               (12  <<  0)
891 #define     R200_TXFORMAT_DXT23              (14  <<  0)
892 #define     R200_TXFORMAT_DXT45              (15  <<  0)
893 #define     R200_TXFORMAT_DVDU88             (18  <<  0)
894 #define     R200_TXFORMAT_LDVDU655           (19  <<  0)
895 #define     R200_TXFORMAT_LDVDU8888          (20  <<  0)
896 #define     R200_TXFORMAT_GR1616             (21  <<  0)
897 #define     R200_TXFORMAT_ABGR8888           (22  <<  0)
898 #define     R200_TXFORMAT_BGR111110          (23  <<  0)
899 #define     R200_TXFORMAT_FORMAT_MASK        (31 <<  0)
900 #define     R200_TXFORMAT_FORMAT_SHIFT       0
901 #define     R200_TXFORMAT_APPLE_YUV          (1  <<  5)
902 #define     R200_TXFORMAT_ALPHA_IN_MAP       (1  <<  6)
903 #define     R200_TXFORMAT_NON_POWER2         (1  <<  7)
904 #define     R200_TXFORMAT_WIDTH_MASK         (15 <<  8)
905 #define     R200_TXFORMAT_WIDTH_SHIFT        8
906 #define     R200_TXFORMAT_HEIGHT_MASK        (15 << 12)
907 #define     R200_TXFORMAT_HEIGHT_SHIFT       12
908 #define     R200_TXFORMAT_F5_WIDTH_MASK      (15 << 16)	/* cube face 5 */
909 #define     R200_TXFORMAT_F5_WIDTH_SHIFT     16
910 #define     R200_TXFORMAT_F5_HEIGHT_MASK     (15 << 20)
911 #define     R200_TXFORMAT_F5_HEIGHT_SHIFT    20
912 #define     R200_TXFORMAT_ST_ROUTE_STQ0      (0  << 24)
913 #define     R200_TXFORMAT_ST_ROUTE_STQ1      (1  << 24)
914 #define     R200_TXFORMAT_ST_ROUTE_STQ2      (2  << 24)
915 #define     R200_TXFORMAT_ST_ROUTE_STQ3      (3  << 24)
916 #define     R200_TXFORMAT_ST_ROUTE_STQ4      (4  << 24)
917 #define     R200_TXFORMAT_ST_ROUTE_STQ5      (5  << 24)
918 #define     R200_TXFORMAT_ST_ROUTE_MASK      (7  << 24)
919 #define     R200_TXFORMAT_ST_ROUTE_SHIFT     24
920 #define     R200_TXFORMAT_LOOKUP_DISABLE     (1  << 27)
921 #define     R200_TXFORMAT_ALPHA_MASK_ENABLE  (1  << 28)
922 #define     R200_TXFORMAT_CHROMA_KEY_ENABLE  (1  << 29)
923 #define     R200_TXFORMAT_CUBIC_MAP_ENABLE   (1  << 30)
924 #define R200_PP_TXFORMAT_X_0              0x2c08
925 #define     R200_DEPTH_LOG2_MASK                      (0xf << 0)
926 #define     R200_DEPTH_LOG2_SHIFT                     0
927 #define     R200_VOLUME_FILTER_SHIFT                  4
928 #define     R200_VOLUME_FILTER_MASK                   (1 << 4)
929 #define     R200_VOLUME_FILTER_NEAREST                (0 << 4)
930 #define     R200_VOLUME_FILTER_LINEAR                 (1 << 4)
931 #define     R200_WRAPEN_Q                             (1  << 8)
932 #define     R200_CLAMP_Q_WRAP                         (0  << 9)
933 #define     R200_CLAMP_Q_MIRROR                       (1  << 9)
934 #define     R200_CLAMP_Q_CLAMP_LAST                   (2  << 9)
935 #define     R200_CLAMP_Q_MIRROR_CLAMP_LAST            (3  << 9)
936 #define     R200_CLAMP_Q_CLAMP_BORDER                 (4  << 9)
937 #define     R200_CLAMP_Q_MIRROR_CLAMP_BORDER          (5  << 9)
938 #define     R200_CLAMP_Q_CLAMP_GL                     (6  << 9)
939 #define     R200_CLAMP_Q_MIRROR_CLAMP_GL              (7  << 9)
940 #define     R200_CLAMP_Q_MASK                         (7  << 9)
941 #define     R200_MIN_MIP_LEVEL_MASK                   (0x0f << 12)
942 #define     R200_MIN_MIP_LEVEL_SHIFT                  12
943 #define     R200_TEXCOORD_NONPROJ                     (0  << 16)
944 #define     R200_TEXCOORD_CUBIC_ENV                   (1  << 16)
945 #define     R200_TEXCOORD_VOLUME                      (2  << 16)
946 #define     R200_TEXCOORD_PROJ                        (3  << 16)
947 #define     R200_TEXCOORD_DEPTH                       (4  << 16)
948 #define     R200_TEXCOORD_1D_PROJ                     (5  << 16)
949 #define     R200_TEXCOORD_1D                          (6  << 16)
950 #define     R200_TEXCOORD_ZERO                        (7  << 16)
951 #define     R200_TEXCOORD_MASK                        (7  << 16)
952 #define     R200_LOD_BIAS_MASK                        (0xfff80000)
953 #define     R200_LOD_BIAS_FIXED_ONE                   (0x08000000)
954 #define     R200_LOD_BIAS_CORRECTION                  (0x00600000)
955 #define     R200_LOD_BIAS_SHIFT                       19
956 #define R200_PP_TXSIZE_0                  0x2c0c /* NPOT only */
957 #define R200_PP_TX_WIDTHMASK_SHIFT 0
958 #define R200_PP_TX_HEIGHTMASK_SHIFT 16
959 
960 #define R200_PP_TXPITCH_0                 0x2c10 /* NPOT only */
961 #define R200_PP_BORDER_COLOR_0            0x2c14
962 #define R200_PP_CUBIC_FACES_0             0x2c18
963 #define     R200_FACE_WIDTH_1_SHIFT                   0
964 #define     R200_FACE_HEIGHT_1_SHIFT                  4
965 #define     R200_FACE_WIDTH_1_MASK                   (0xf << 0)
966 #define     R200_FACE_HEIGHT_1_MASK                  (0xf << 4)
967 #define     R200_FACE_WIDTH_2_SHIFT                   8
968 #define     R200_FACE_HEIGHT_2_SHIFT                 12
969 #define     R200_FACE_WIDTH_2_MASK                   (0xf << 8)
970 #define     R200_FACE_HEIGHT_2_MASK                  (0xf << 12)
971 #define     R200_FACE_WIDTH_3_SHIFT                  16
972 #define     R200_FACE_HEIGHT_3_SHIFT                 20
973 #define     R200_FACE_WIDTH_3_MASK                   (0xf << 16)
974 #define     R200_FACE_HEIGHT_3_MASK                  (0xf << 20)
975 #define     R200_FACE_WIDTH_4_SHIFT                  24
976 #define     R200_FACE_HEIGHT_4_SHIFT                 28
977 #define     R200_FACE_WIDTH_4_MASK                   (0xf << 24)
978 #define     R200_FACE_HEIGHT_4_MASK                  (0xf << 28)
979 #define R200_PP_TXMULTI_CTL_0                  0x2c1c /* name from ddx, rest RE... */
980 #define     R200_PASS1_TXFORMAT_LOOKUP_DISABLE (1 << 0)
981 #define     R200_PASS1_TEXCOORD_NONPROJ        (0 << 1)
982 #define     R200_PASS1_TEXCOORD_CUBIC_ENV      (1 << 1)
983 #define     R200_PASS1_TEXCOORD_VOLUME         (2 << 1)
984 #define     R200_PASS1_TEXCOORD_PROJ           (3 << 1)
985 #define     R200_PASS1_TEXCOORD_DEPTH          (4 << 1)
986 #define     R200_PASS1_TEXCOORD_1D_PROJ        (5 << 1)
987 #define     R200_PASS1_TEXCOORD_1D             (6 << 1) /* pass1 texcoords only */
988 #define     R200_PASS1_TEXCOORD_ZERO           (7 << 1) /* verifed for 2d targets! */
989 #define     R200_PASS1_TEXCOORD_MASK           (7 << 1) /* assumed same values as for pass2 */
990 #define     R200_PASS1_ST_ROUTE_STQ0           (0 << 4)
991 #define     R200_PASS1_ST_ROUTE_STQ1           (1 << 4)
992 #define     R200_PASS1_ST_ROUTE_STQ2           (2 << 4)
993 #define     R200_PASS1_ST_ROUTE_STQ3           (3 << 4)
994 #define     R200_PASS1_ST_ROUTE_STQ4           (4 << 4)
995 #define     R200_PASS1_ST_ROUTE_STQ5           (5 << 4)
996 #define     R200_PASS1_ST_ROUTE_MASK           (7 << 4)
997 #define     R200_PASS1_ST_ROUTE_SHIFT          (4)
998 #define     R200_PASS2_COORDS_REG_0            (2 << 24)
999 #define     R200_PASS2_COORDS_REG_1            (3 << 24)
1000 #define     R200_PASS2_COORDS_REG_2            (4 << 24)
1001 #define     R200_PASS2_COORDS_REG_3            (5 << 24)
1002 #define     R200_PASS2_COORDS_REG_4            (6 << 24)
1003 #define     R200_PASS2_COORDS_REG_5            (7 << 24)
1004 #define     R200_PASS2_COORDS_REG_MASK         (0x7 << 24)
1005 #define     R200_PASS2_COORDS_REG_SHIFT        (24)
1006 #define R200_PP_TXFILTER_1                0x2c20
1007 #define R200_PP_TXFORMAT_1                0x2c24
1008 #define R200_PP_TXFORMAT_X_1              0x2c28
1009 #define R200_PP_TXSIZE_1                  0x2c2c
1010 #define R200_PP_TXPITCH_1                 0x2c30
1011 #define R200_PP_BORDER_COLOR_1            0x2c34
1012 #define R200_PP_CUBIC_FACES_1             0x2c38
1013 #define R200_PP_TXMULTI_CTL_1             0x2c3c
1014 #define R200_PP_TXFILTER_2                0x2c40
1015 #define R200_PP_TXFORMAT_2                0x2c44
1016 #define R200_PP_TXSIZE_2                  0x2c4c
1017 #define R200_PP_TXFORMAT_X_2              0x2c48
1018 #define R200_PP_TXPITCH_2                 0x2c50
1019 #define R200_PP_BORDER_COLOR_2            0x2c54
1020 #define R200_PP_CUBIC_FACES_2             0x2c58
1021 #define R200_PP_TXMULTI_CTL_2             0x2c5c
1022 #define R200_PP_TXFILTER_3                0x2c60
1023 #define R200_PP_TXFORMAT_3                0x2c64
1024 #define R200_PP_TXSIZE_3                  0x2c6c
1025 #define R200_PP_TXFORMAT_X_3              0x2c68
1026 #define R200_PP_TXPITCH_3                 0x2c70
1027 #define R200_PP_BORDER_COLOR_3            0x2c74
1028 #define R200_PP_CUBIC_FACES_3             0x2c78
1029 #define R200_PP_TXMULTI_CTL_3             0x2c7c
1030 #define R200_PP_TXFILTER_4                0x2c80
1031 #define R200_PP_TXFORMAT_4                0x2c84
1032 #define R200_PP_TXSIZE_4                  0x2c8c
1033 #define R200_PP_TXFORMAT_X_4              0x2c88
1034 #define R200_PP_TXPITCH_4                 0x2c90
1035 #define R200_PP_BORDER_COLOR_4            0x2c94
1036 #define R200_PP_CUBIC_FACES_4             0x2c98
1037 #define R200_PP_TXMULTI_CTL_4             0x2c9c
1038 #define R200_PP_TXFILTER_5                0x2ca0
1039 #define R200_PP_TXFORMAT_5                0x2ca4
1040 #define R200_PP_TXSIZE_5                  0x2cac
1041 #define R200_PP_TXFORMAT_X_5              0x2ca8
1042 #define R200_PP_TXPITCH_5                 0x2cb0
1043 #define R200_PP_BORDER_COLOR_5            0x2cb4
1044 #define R200_PP_CUBIC_FACES_5             0x2cb8
1045 #define R200_PP_TXMULTI_CTL_5             0x2cbc
1046 /* gap */
1047 #define R200_PP_CNTL_X             0x2cc4  /* Reveree engineered from fglrx */
1048 #define     R200_PPX_TEX_0_ENABLE      (1 <<  0)
1049 #define     R200_PPX_TEX_1_ENABLE      (1 <<  1)
1050 #define     R200_PPX_TEX_2_ENABLE      (1 <<  2)
1051 #define     R200_PPX_TEX_3_ENABLE      (1 <<  3)
1052 #define     R200_PPX_TEX_4_ENABLE      (1 <<  4)
1053 #define     R200_PPX_TEX_5_ENABLE      (1 <<  5)
1054 #define     R200_PPX_TEX_ENABLE_MASK   (0x3f << 0)
1055 #define     R200_PPX_OUTPUT_REG_0      (1 <<  6)
1056 #define     R200_PPX_OUTPUT_REG_1      (1 <<  7)
1057 #define     R200_PPX_OUTPUT_REG_2      (1 <<  8)
1058 #define     R200_PPX_OUTPUT_REG_3      (1 <<  9)
1059 #define     R200_PPX_OUTPUT_REG_4      (1 << 10)
1060 #define     R200_PPX_OUTPUT_REG_5      (1 << 11)
1061 #define     R200_PPX_OUTPUT_REG_MASK   (0x3f << 6)
1062 #define     R200_PPX_OUTPUT_REG_0_SHIFT (6)
1063 #define     R200_PPX_PFS_INST0_ENABLE  (1 << 12)
1064 #define     R200_PPX_PFS_INST1_ENABLE  (1 << 13)
1065 #define     R200_PPX_PFS_INST2_ENABLE  (1 << 14)
1066 #define     R200_PPX_PFS_INST3_ENABLE  (1 << 15)
1067 #define     R200_PPX_PFS_INST4_ENABLE  (1 << 16)
1068 #define     R200_PPX_PFS_INST5_ENABLE  (1 << 17)
1069 #define     R200_PPX_PFS_INST6_ENABLE  (1 << 18)
1070 #define     R200_PPX_PFS_INST7_ENABLE  (1 << 19)
1071 #define     R200_PPX_PFS_INST_ENABLE_MASK (0xff << 12)
1072 #define     R200_PPX_FPS_INST0_ENABLE_SHIFT (12)
1073 /* gap */
1074 #define R200_PP_TRI_PERF                  0x2cf8
1075 #define     R200_TRI_CUTOFF_MASK            (0x1f << 0)
1076 #define R200_PP_PERF_CNTL                 0x2cfc
1077 #define R200_PP_TXOFFSET_0                0x2d00
1078 #define     R200_TXO_ENDIAN_NO_SWAP     (0 << 0)
1079 #define     R200_TXO_ENDIAN_BYTE_SWAP   (1 << 0)
1080 #define     R200_TXO_ENDIAN_WORD_SWAP   (2 << 0)
1081 #define     R200_TXO_ENDIAN_HALFDW_SWAP (3 << 0)
1082 #define     R200_TXO_MACRO_TILE         (1 << 2)
1083 #define     R200_TXO_MICRO_TILE         (1 << 3)
1084 #define     R200_TXO_OFFSET_MASK        0xffffffe0
1085 #define     R200_TXO_OFFSET_SHIFT       5
1086 #define R200_PP_CUBIC_OFFSET_F1_0         0x2d04
1087 #define R200_PP_CUBIC_OFFSET_F2_0         0x2d08
1088 #define R200_PP_CUBIC_OFFSET_F3_0         0x2d0c
1089 #define R200_PP_CUBIC_OFFSET_F4_0         0x2d10
1090 #define R200_PP_CUBIC_OFFSET_F5_0         0x2d14
1091 #define R200_PP_TXOFFSET_1                0x2d18
1092 #define R200_PP_CUBIC_OFFSET_F1_1         0x2d1c
1093 #define R200_PP_CUBIC_OFFSET_F2_1         0x2d20
1094 #define R200_PP_CUBIC_OFFSET_F3_1         0x2d24
1095 #define R200_PP_CUBIC_OFFSET_F4_1         0x2d28
1096 #define R200_PP_CUBIC_OFFSET_F5_1         0x2d2c
1097 #define R200_PP_TXOFFSET_2                0x2d30
1098 #define R200_PP_CUBIC_OFFSET_F1_2         0x2d34
1099 #define R200_PP_CUBIC_OFFSET_F2_2         0x2d38
1100 #define R200_PP_CUBIC_OFFSET_F3_2         0x2d3c
1101 #define R200_PP_CUBIC_OFFSET_F4_2         0x2d40
1102 #define R200_PP_CUBIC_OFFSET_F5_2         0x2d44
1103 #define R200_PP_TXOFFSET_3                0x2d48
1104 #define R200_PP_CUBIC_OFFSET_F1_3         0x2d4c
1105 #define R200_PP_CUBIC_OFFSET_F2_3         0x2d50
1106 #define R200_PP_CUBIC_OFFSET_F3_3         0x2d54
1107 #define R200_PP_CUBIC_OFFSET_F4_3         0x2d58
1108 #define R200_PP_CUBIC_OFFSET_F5_3         0x2d5c
1109 #define R200_PP_TXOFFSET_4                0x2d60
1110 #define R200_PP_CUBIC_OFFSET_F1_4         0x2d64
1111 #define R200_PP_CUBIC_OFFSET_F2_4         0x2d68
1112 #define R200_PP_CUBIC_OFFSET_F3_4         0x2d6c
1113 #define R200_PP_CUBIC_OFFSET_F4_4         0x2d70
1114 #define R200_PP_CUBIC_OFFSET_F5_4         0x2d74
1115 #define R200_PP_TXOFFSET_5                0x2d78
1116 #define R200_PP_CUBIC_OFFSET_F1_5         0x2d7c
1117 #define R200_PP_CUBIC_OFFSET_F2_5         0x2d80
1118 #define R200_PP_CUBIC_OFFSET_F3_5         0x2d84
1119 #define R200_PP_CUBIC_OFFSET_F4_5         0x2d88
1120 #define R200_PP_CUBIC_OFFSET_F5_5         0x2d8c
1121 /* gap */
1122 #define R200_PP_TAM_DEBUG3                0x2d9c
1123 /* gap */
1124 #define R200_PP_TFACTOR_0                 0x2ee0
1125 #define R200_PP_TFACTOR_1                 0x2ee4
1126 #define R200_PP_TFACTOR_2                 0x2ee8
1127 #define R200_PP_TFACTOR_3                 0x2eec
1128 #define R200_PP_TFACTOR_4                 0x2ef0
1129 #define R200_PP_TFACTOR_5                 0x2ef4
1130 #define R200_PP_TFACTOR_6                 0x2ef8
1131 #define R200_PP_TFACTOR_7                 0x2efc
1132 #define R200_PP_TXCBLEND_0                0x2f00
1133 #define     R200_TXC_ARG_A_ZERO                (0)
1134 #define     R200_TXC_ARG_A_CURRENT_COLOR       (2)
1135 #define     R200_TXC_ARG_A_CURRENT_ALPHA       (3)
1136 #define     R200_TXC_ARG_A_DIFFUSE_COLOR       (4)
1137 #define     R200_TXC_ARG_A_DIFFUSE_ALPHA       (5)
1138 #define     R200_TXC_ARG_A_SPECULAR_COLOR      (6)
1139 #define     R200_TXC_ARG_A_SPECULAR_ALPHA      (7)
1140 #define     R200_TXC_ARG_A_TFACTOR_COLOR       (8)
1141 #define     R200_TXC_ARG_A_TFACTOR_ALPHA       (9)
1142 #define     R200_TXC_ARG_A_R0_COLOR            (10)
1143 #define     R200_TXC_ARG_A_R0_ALPHA            (11)
1144 #define     R200_TXC_ARG_A_R1_COLOR            (12)
1145 #define     R200_TXC_ARG_A_R1_ALPHA            (13)
1146 #define     R200_TXC_ARG_A_R2_COLOR            (14)
1147 #define     R200_TXC_ARG_A_R2_ALPHA            (15)
1148 #define     R200_TXC_ARG_A_R3_COLOR            (16)
1149 #define     R200_TXC_ARG_A_R3_ALPHA            (17)
1150 #define     R200_TXC_ARG_A_R4_COLOR            (18)
1151 #define     R200_TXC_ARG_A_R4_ALPHA            (19)
1152 #define     R200_TXC_ARG_A_R5_COLOR            (20)
1153 #define     R200_TXC_ARG_A_R5_ALPHA            (21)
1154 #define     R200_TXC_ARG_A_TFACTOR1_COLOR      (26)
1155 #define     R200_TXC_ARG_A_TFACTOR1_ALPHA      (27)
1156 #define     R200_TXC_ARG_A_MASK			(31 << 0)
1157 #define     R200_TXC_ARG_A_SHIFT			0
1158 #define     R200_TXC_ARG_B_ZERO                (0<<5)
1159 #define     R200_TXC_ARG_B_CURRENT_COLOR       (2<<5)
1160 #define     R200_TXC_ARG_B_CURRENT_ALPHA       (3<<5)
1161 #define     R200_TXC_ARG_B_DIFFUSE_COLOR       (4<<5)
1162 #define     R200_TXC_ARG_B_DIFFUSE_ALPHA       (5<<5)
1163 #define     R200_TXC_ARG_B_SPECULAR_COLOR      (6<<5)
1164 #define     R200_TXC_ARG_B_SPECULAR_ALPHA      (7<<5)
1165 #define     R200_TXC_ARG_B_TFACTOR_COLOR       (8<<5)
1166 #define     R200_TXC_ARG_B_TFACTOR_ALPHA       (9<<5)
1167 #define     R200_TXC_ARG_B_R0_COLOR            (10<<5)
1168 #define     R200_TXC_ARG_B_R0_ALPHA            (11<<5)
1169 #define     R200_TXC_ARG_B_R1_COLOR            (12<<5)
1170 #define     R200_TXC_ARG_B_R1_ALPHA            (13<<5)
1171 #define     R200_TXC_ARG_B_R2_COLOR            (14<<5)
1172 #define     R200_TXC_ARG_B_R2_ALPHA            (15<<5)
1173 #define     R200_TXC_ARG_B_R3_COLOR            (16<<5)
1174 #define     R200_TXC_ARG_B_R3_ALPHA            (17<<5)
1175 #define     R200_TXC_ARG_B_R4_COLOR            (18<<5)
1176 #define     R200_TXC_ARG_B_R4_ALPHA            (19<<5)
1177 #define     R200_TXC_ARG_B_R5_COLOR            (20<<5)
1178 #define     R200_TXC_ARG_B_R5_ALPHA            (21<<5)
1179 #define     R200_TXC_ARG_B_TFACTOR1_COLOR      (26<<5)
1180 #define     R200_TXC_ARG_B_TFACTOR1_ALPHA      (27<<5)
1181 #define     R200_TXC_ARG_B_MASK			(31 << 5)
1182 #define     R200_TXC_ARG_B_SHIFT			5
1183 #define     R200_TXC_ARG_C_ZERO                (0<<10)
1184 #define     R200_TXC_ARG_C_CURRENT_COLOR       (2<<10)
1185 #define     R200_TXC_ARG_C_CURRENT_ALPHA       (3<<10)
1186 #define     R200_TXC_ARG_C_DIFFUSE_COLOR       (4<<10)
1187 #define     R200_TXC_ARG_C_DIFFUSE_ALPHA       (5<<10)
1188 #define     R200_TXC_ARG_C_SPECULAR_COLOR      (6<<10)
1189 #define     R200_TXC_ARG_C_SPECULAR_ALPHA      (7<<10)
1190 #define     R200_TXC_ARG_C_TFACTOR_COLOR       (8<<10)
1191 #define     R200_TXC_ARG_C_TFACTOR_ALPHA       (9<<10)
1192 #define     R200_TXC_ARG_C_R0_COLOR            (10<<10)
1193 #define     R200_TXC_ARG_C_R0_ALPHA            (11<<10)
1194 #define     R200_TXC_ARG_C_R1_COLOR            (12<<10)
1195 #define     R200_TXC_ARG_C_R1_ALPHA            (13<<10)
1196 #define     R200_TXC_ARG_C_R2_COLOR            (14<<10)
1197 #define     R200_TXC_ARG_C_R2_ALPHA            (15<<10)
1198 #define     R200_TXC_ARG_C_R3_COLOR            (16<<10)
1199 #define     R200_TXC_ARG_C_R3_ALPHA            (17<<10)
1200 #define     R200_TXC_ARG_C_R4_COLOR            (18<<10)
1201 #define     R200_TXC_ARG_C_R4_ALPHA            (19<<10)
1202 #define     R200_TXC_ARG_C_R5_COLOR            (20<<10)
1203 #define     R200_TXC_ARG_C_R5_ALPHA            (21<<10)
1204 #define     R200_TXC_ARG_C_TFACTOR1_COLOR      (26<<10)
1205 #define     R200_TXC_ARG_C_TFACTOR1_ALPHA      (27<<10)
1206 #define     R200_TXC_ARG_C_MASK			(31 << 10)
1207 #define     R200_TXC_ARG_C_SHIFT			10
1208 #define     R200_TXC_COMP_ARG_A                    (1 << 16)
1209 #define     R200_TXC_COMP_ARG_A_SHIFT              (16)
1210 #define     R200_TXC_BIAS_ARG_A                    (1 << 17)
1211 #define     R200_TXC_SCALE_ARG_A                   (1 << 18)
1212 #define     R200_TXC_NEG_ARG_A                     (1 << 19)
1213 #define     R200_TXC_COMP_ARG_B                    (1 << 20)
1214 #define     R200_TXC_COMP_ARG_B_SHIFT              (20)
1215 #define     R200_TXC_BIAS_ARG_B                    (1 << 21)
1216 #define     R200_TXC_SCALE_ARG_B                   (1 << 22)
1217 #define     R200_TXC_NEG_ARG_B                     (1 << 23)
1218 #define     R200_TXC_COMP_ARG_C                    (1 << 24)
1219 #define     R200_TXC_COMP_ARG_C_SHIFT              (24)
1220 #define     R200_TXC_BIAS_ARG_C                    (1 << 25)
1221 #define     R200_TXC_SCALE_ARG_C                   (1 << 26)
1222 #define     R200_TXC_NEG_ARG_C                     (1 << 27)
1223 #define     R200_TXC_OP_MADD                        (0 << 28)
1224 #define     R200_TXC_OP_CND0                       (2 << 28)
1225 #define     R200_TXC_OP_LERP                       (3 << 28)
1226 #define     R200_TXC_OP_DOT3                       (4 << 28)
1227 #define     R200_TXC_OP_DOT4                       (5 << 28)
1228 #define     R200_TXC_OP_CONDITIONAL                (6 << 28)
1229 #define     R200_TXC_OP_DOT2_ADD                   (7 << 28)
1230 #define     R200_TXC_OP_MASK                       (7 << 28)
1231 #define R200_PP_TXCBLEND2_0                0x2f04
1232 #define     R200_TXC_TFACTOR_SEL_SHIFT             0
1233 #define     R200_TXC_TFACTOR_SEL_MASK              0x7
1234 #define     R200_TXC_TFACTOR1_SEL_SHIFT            4
1235 #define     R200_TXC_TFACTOR1_SEL_MASK             (0x7 << 4)
1236 #define     R200_TXC_SCALE_SHIFT                   8
1237 #define     R200_TXC_SCALE_MASK                    (7 << 8)
1238 #define     R200_TXC_SCALE_1X                      (0 << 8)
1239 #define     R200_TXC_SCALE_2X                      (1 << 8)
1240 #define     R200_TXC_SCALE_4X                      (2 << 8)
1241 #define     R200_TXC_SCALE_8X                      (3 << 8)
1242 #define     R200_TXC_SCALE_INV2                    (5 << 8)
1243 #define     R200_TXC_SCALE_INV4                    (6 << 8)
1244 #define     R200_TXC_SCALE_INV8                    (7 << 8)
1245 #define     R200_TXC_CLAMP_SHIFT                   12
1246 #define     R200_TXC_CLAMP_MASK                    (3 << 12)
1247 #define     R200_TXC_CLAMP_WRAP                    (0 << 12)
1248 #define     R200_TXC_CLAMP_0_1                     (1 << 12)
1249 #define     R200_TXC_CLAMP_8_8                     (2 << 12)
1250 #define     R200_TXC_OUTPUT_REG_SHIFT              16
1251 #define     R200_TXC_OUTPUT_REG_MASK               (7 << 16)
1252 #define     R200_TXC_OUTPUT_REG_NONE               (0 << 16)
1253 #define     R200_TXC_OUTPUT_REG_R0                 (1 << 16)
1254 #define     R200_TXC_OUTPUT_REG_R1                 (2 << 16)
1255 #define     R200_TXC_OUTPUT_REG_R2                 (3 << 16)
1256 #define     R200_TXC_OUTPUT_REG_R3                 (4 << 16)
1257 #define     R200_TXC_OUTPUT_REG_R4                 (5 << 16)
1258 #define     R200_TXC_OUTPUT_REG_R5                 (6 << 16)
1259 #define     R200_TXC_OUTPUT_MASK_MASK              (7 << 20)
1260 #define     R200_TXC_OUTPUT_MASK_RGB               (0 << 20)
1261 #define     R200_TXC_OUTPUT_MASK_RG                (1 << 20)
1262 #define     R200_TXC_OUTPUT_MASK_RB                (2 << 20)
1263 #define     R200_TXC_OUTPUT_MASK_R                 (3 << 20)
1264 #define     R200_TXC_OUTPUT_MASK_GB                (4 << 20)
1265 #define     R200_TXC_OUTPUT_MASK_G                 (5 << 20)
1266 #define     R200_TXC_OUTPUT_MASK_B                 (6 << 20)
1267 #define     R200_TXC_OUTPUT_MASK_NONE              (7 << 20)
1268 #define     R200_TXC_OUTPUT_ROTATE_RGB             (0 << 24)
1269 #define     R200_TXC_OUTPUT_ROTATE_ARG             (1 << 24)
1270 #define     R200_TXC_OUTPUT_ROTATE_GBA             (2 << 24)
1271 #define     R200_TXC_OUTPUT_ROTATE_RGA             (3 << 24)
1272 #define     R200_TXC_REPL_NORMAL                   0
1273 #define     R200_TXC_REPL_RED                      1
1274 #define     R200_TXC_REPL_GREEN                    2
1275 #define     R200_TXC_REPL_BLUE                     3
1276 #define     R200_TXC_REPL_ARG_A_SHIFT              26
1277 #define     R200_TXC_REPL_ARG_A_MASK               (3 << 26)
1278 #define     R200_TXC_REPL_ARG_B_SHIFT              28
1279 #define     R200_TXC_REPL_ARG_B_MASK               (3 << 28)
1280 #define     R200_TXC_REPL_ARG_C_SHIFT              30
1281 #define     R200_TXC_REPL_ARG_C_MASK               (3 << 30)
1282 #define R200_PP_TXABLEND_0                0x2f08
1283 #define     R200_TXA_ARG_A_ZERO              (0)
1284 #define     R200_TXA_ARG_A_CURRENT_ALPHA     (2) /* guess */
1285 #define     R200_TXA_ARG_A_CURRENT_BLUE      (3) /* guess */
1286 #define     R200_TXA_ARG_A_DIFFUSE_ALPHA     (4)
1287 #define     R200_TXA_ARG_A_DIFFUSE_BLUE      (5)
1288 #define     R200_TXA_ARG_A_SPECULAR_ALPHA    (6)
1289 #define     R200_TXA_ARG_A_SPECULAR_BLUE     (7)
1290 #define     R200_TXA_ARG_A_TFACTOR_ALPHA     (8)
1291 #define     R200_TXA_ARG_A_TFACTOR_BLUE      (9)
1292 #define     R200_TXA_ARG_A_R0_ALPHA          (10)
1293 #define     R200_TXA_ARG_A_R0_BLUE           (11)
1294 #define     R200_TXA_ARG_A_R1_ALPHA          (12)
1295 #define     R200_TXA_ARG_A_R1_BLUE           (13)
1296 #define     R200_TXA_ARG_A_R2_ALPHA          (14)
1297 #define     R200_TXA_ARG_A_R2_BLUE           (15)
1298 #define     R200_TXA_ARG_A_R3_ALPHA          (16)
1299 #define     R200_TXA_ARG_A_R3_BLUE           (17)
1300 #define     R200_TXA_ARG_A_R4_ALPHA          (18)
1301 #define     R200_TXA_ARG_A_R4_BLUE           (19)
1302 #define     R200_TXA_ARG_A_R5_ALPHA          (20)
1303 #define     R200_TXA_ARG_A_R5_BLUE           (21)
1304 #define     R200_TXA_ARG_A_TFACTOR1_ALPHA    (26)
1305 #define     R200_TXA_ARG_A_TFACTOR1_BLUE     (27)
1306 #define     R200_TXA_ARG_A_MASK			(31 << 0)
1307 #define     R200_TXA_ARG_A_SHIFT			0
1308 #define     R200_TXA_ARG_B_ZERO              (0<<5)
1309 #define     R200_TXA_ARG_B_CURRENT_ALPHA     (2<<5) /* guess */
1310 #define     R200_TXA_ARG_B_CURRENT_BLUE      (3<<5) /* guess */
1311 #define     R200_TXA_ARG_B_DIFFUSE_ALPHA     (4<<5)
1312 #define     R200_TXA_ARG_B_DIFFUSE_BLUE      (5<<5)
1313 #define     R200_TXA_ARG_B_SPECULAR_ALPHA    (6<<5)
1314 #define     R200_TXA_ARG_B_SPECULAR_BLUE     (7<<5)
1315 #define     R200_TXA_ARG_B_TFACTOR_ALPHA     (8<<5)
1316 #define     R200_TXA_ARG_B_TFACTOR_BLUE      (9<<5)
1317 #define     R200_TXA_ARG_B_R0_ALPHA          (10<<5)
1318 #define     R200_TXA_ARG_B_R0_BLUE           (11<<5)
1319 #define     R200_TXA_ARG_B_R1_ALPHA          (12<<5)
1320 #define     R200_TXA_ARG_B_R1_BLUE           (13<<5)
1321 #define     R200_TXA_ARG_B_R2_ALPHA          (14<<5)
1322 #define     R200_TXA_ARG_B_R2_BLUE           (15<<5)
1323 #define     R200_TXA_ARG_B_R3_ALPHA          (16<<5)
1324 #define     R200_TXA_ARG_B_R3_BLUE           (17<<5)
1325 #define     R200_TXA_ARG_B_R4_ALPHA          (18<<5)
1326 #define     R200_TXA_ARG_B_R4_BLUE           (19<<5)
1327 #define     R200_TXA_ARG_B_R5_ALPHA          (20<<5)
1328 #define     R200_TXA_ARG_B_R5_BLUE           (21<<5)
1329 #define     R200_TXA_ARG_B_TFACTOR1_ALPHA    (26<<5)
1330 #define     R200_TXA_ARG_B_TFACTOR1_BLUE     (27<<5)
1331 #define     R200_TXA_ARG_B_MASK			(31 << 5)
1332 #define     R200_TXA_ARG_B_SHIFT			5
1333 #define     R200_TXA_ARG_C_ZERO              (0<<10)
1334 #define     R200_TXA_ARG_C_CURRENT_ALPHA     (2<<10) /* guess */
1335 #define     R200_TXA_ARG_C_CURRENT_BLUE      (3<<10) /* guess */
1336 #define     R200_TXA_ARG_C_DIFFUSE_ALPHA     (4<<10)
1337 #define     R200_TXA_ARG_C_DIFFUSE_BLUE      (5<<10)
1338 #define     R200_TXA_ARG_C_SPECULAR_ALPHA    (6<<10)
1339 #define     R200_TXA_ARG_C_SPECULAR_BLUE     (7<<10)
1340 #define     R200_TXA_ARG_C_TFACTOR_ALPHA     (8<<10)
1341 #define     R200_TXA_ARG_C_TFACTOR_BLUE      (9<<10)
1342 #define     R200_TXA_ARG_C_R0_ALPHA          (10<<10)
1343 #define     R200_TXA_ARG_C_R0_BLUE           (11<<10)
1344 #define     R200_TXA_ARG_C_R1_ALPHA          (12<<10)
1345 #define     R200_TXA_ARG_C_R1_BLUE           (13<<10)
1346 #define     R200_TXA_ARG_C_R2_ALPHA          (14<<10)
1347 #define     R200_TXA_ARG_C_R2_BLUE           (15<<10)
1348 #define     R200_TXA_ARG_C_R3_ALPHA          (16<<10)
1349 #define     R200_TXA_ARG_C_R3_BLUE           (17<<10)
1350 #define     R200_TXA_ARG_C_R4_ALPHA          (18<<10)
1351 #define     R200_TXA_ARG_C_R4_BLUE           (19<<10)
1352 #define     R200_TXA_ARG_C_R5_ALPHA          (20<<10)
1353 #define     R200_TXA_ARG_C_R5_BLUE           (21<<10)
1354 #define     R200_TXA_ARG_C_TFACTOR1_ALPHA    (26<<10)
1355 #define     R200_TXA_ARG_C_TFACTOR1_BLUE     (27<<10)
1356 #define     R200_TXA_ARG_C_MASK			(31 << 10)
1357 #define     R200_TXA_ARG_C_SHIFT			10
1358 #define     R200_TXA_COMP_ARG_A                    (1 << 16)
1359 #define     R200_TXA_COMP_ARG_A_SHIFT              (16)
1360 #define     R200_TXA_BIAS_ARG_A                    (1 << 17)
1361 #define     R200_TXA_SCALE_ARG_A                   (1 << 18)
1362 #define     R200_TXA_NEG_ARG_A                     (1 << 19)
1363 #define     R200_TXA_COMP_ARG_B                    (1 << 20)
1364 #define     R200_TXA_COMP_ARG_B_SHIFT              (20)
1365 #define     R200_TXA_BIAS_ARG_B                    (1 << 21)
1366 #define     R200_TXA_SCALE_ARG_B                   (1 << 22)
1367 #define     R200_TXA_NEG_ARG_B                     (1 << 23)
1368 #define     R200_TXA_COMP_ARG_C                    (1 << 24)
1369 #define     R200_TXA_COMP_ARG_C_SHIFT              (24)
1370 #define     R200_TXA_BIAS_ARG_C                    (1 << 25)
1371 #define     R200_TXA_SCALE_ARG_C                   (1 << 26)
1372 #define     R200_TXA_NEG_ARG_C                     (1 << 27)
1373 #define     R200_TXA_OP_MADD                       (0 << 28)
1374 #define     R200_TXA_OP_CND0                       (2 << 28)
1375 #define     R200_TXA_OP_LERP                       (3 << 28)
1376 #define     R200_TXA_OP_CONDITIONAL                (6 << 28)
1377 #define     R200_TXA_OP_MASK                       (7 << 28)
1378 #define R200_PP_TXABLEND2_0                0x2f0c
1379 #define     R200_TXA_TFACTOR_SEL_SHIFT             0
1380 #define     R200_TXA_TFACTOR_SEL_MASK              0x7
1381 #define     R200_TXA_TFACTOR1_SEL_SHIFT            4
1382 #define     R200_TXA_TFACTOR1_SEL_MASK             (0x7 << 4)
1383 #define     R200_TXA_SCALE_SHIFT                   8
1384 #define     R200_TXA_SCALE_MASK                    (7 << 8)
1385 #define     R200_TXA_SCALE_1X                      (0 << 8)
1386 #define     R200_TXA_SCALE_2X                      (1 << 8)
1387 #define     R200_TXA_SCALE_4X                      (2 << 8)
1388 #define     R200_TXA_SCALE_8X                      (3 << 8)
1389 #define     R200_TXA_SCALE_INV2                    (5 << 8)
1390 #define     R200_TXA_SCALE_INV4                    (6 << 8)
1391 #define     R200_TXA_SCALE_INV8                    (7 << 8)
1392 #define     R200_TXA_CLAMP_SHIFT                   12
1393 #define     R200_TXA_CLAMP_MASK                    (3 << 12)
1394 #define     R200_TXA_CLAMP_WRAP                    (0 << 12)
1395 #define     R200_TXA_CLAMP_0_1                     (1 << 12)
1396 #define     R200_TXA_CLAMP_8_8                     (2 << 12)
1397 #define     R200_TXA_OUTPUT_REG_SHIFT              16
1398 #define     R200_TXA_OUTPUT_REG_MASK               (7 << 16)
1399 #define     R200_TXA_OUTPUT_REG_NONE               (0 << 16)
1400 #define     R200_TXA_OUTPUT_REG_R0                 (1 << 16)
1401 #define     R200_TXA_OUTPUT_REG_R1                 (2 << 16)
1402 #define     R200_TXA_OUTPUT_REG_R2                 (3 << 16)
1403 #define     R200_TXA_OUTPUT_REG_R3                 (4 << 16)
1404 #define     R200_TXA_OUTPUT_REG_R4                 (5 << 16)
1405 #define     R200_TXA_OUTPUT_REG_R5                 (6 << 16)
1406 #define     R200_TXA_DOT_ALPHA                     (1 << 20)
1407 #define     R200_TXA_REPL_NORMAL                   0
1408 #define     R200_TXA_REPL_RED                      1
1409 #define     R200_TXA_REPL_GREEN                    2
1410 #define     R200_TXA_REPL_ARG_A_SHIFT              26
1411 #define     R200_TXA_REPL_ARG_A_MASK               (3 << 26)
1412 #define     R200_TXA_REPL_ARG_B_SHIFT              28
1413 #define     R200_TXA_REPL_ARG_B_MASK               (3 << 28)
1414 #define     R200_TXA_REPL_ARG_C_SHIFT              30
1415 #define     R200_TXA_REPL_ARG_C_MASK               (3 << 30)
1416 #define R200_PP_TXCBLEND_1                0x2f10
1417 #define R200_PP_TXCBLEND2_1               0x2f14
1418 #define R200_PP_TXABLEND_1                0x2f18
1419 #define R200_PP_TXABLEND2_1               0x2f1c
1420 #define R200_PP_TXCBLEND_2                0x2f20
1421 #define R200_PP_TXCBLEND2_2               0x2f24
1422 #define R200_PP_TXABLEND_2                0x2f28
1423 #define R200_PP_TXABLEND2_2               0x2f2c
1424 #define R200_PP_TXCBLEND_3                0x2f30
1425 #define R200_PP_TXCBLEND2_3               0x2f34
1426 #define R200_PP_TXABLEND_3                0x2f38
1427 #define R200_PP_TXABLEND2_3               0x2f3c
1428 #define R200_PP_TXCBLEND_4                0x2f40
1429 #define R200_PP_TXCBLEND2_4               0x2f44
1430 #define R200_PP_TXABLEND_4                0x2f48
1431 #define R200_PP_TXABLEND2_4               0x2f4c
1432 #define R200_PP_TXCBLEND_5                0x2f50
1433 #define R200_PP_TXCBLEND2_5               0x2f54
1434 #define R200_PP_TXABLEND_5                0x2f58
1435 #define R200_PP_TXABLEND2_5               0x2f5c
1436 #define R200_PP_TXCBLEND_6                0x2f60
1437 #define R200_PP_TXCBLEND2_6               0x2f64
1438 #define R200_PP_TXABLEND_6                0x2f68
1439 #define R200_PP_TXABLEND2_6               0x2f6c
1440 #define R200_PP_TXCBLEND_7                0x2f70
1441 #define R200_PP_TXCBLEND2_7               0x2f74
1442 #define R200_PP_TXABLEND_7                0x2f78
1443 #define R200_PP_TXABLEND2_7               0x2f7c
1444 #define R200_PP_TXCBLEND_8                0x2f80
1445 #define R200_PP_TXCBLEND2_8               0x2f84
1446 #define R200_PP_TXABLEND_8                0x2f88
1447 #define R200_PP_TXABLEND2_8               0x2f8c
1448 #define R200_PP_TXCBLEND_9                0x2f90
1449 #define R200_PP_TXCBLEND2_9               0x2f94
1450 #define R200_PP_TXABLEND_9                0x2f98
1451 #define R200_PP_TXABLEND2_9               0x2f9c
1452 #define R200_PP_TXCBLEND_10               0x2fa0
1453 #define R200_PP_TXCBLEND2_10              0x2fa4
1454 #define R200_PP_TXABLEND_10               0x2fa8
1455 #define R200_PP_TXABLEND2_10              0x2fac
1456 #define R200_PP_TXCBLEND_11               0x2fb0
1457 #define R200_PP_TXCBLEND2_11              0x2fb4
1458 #define R200_PP_TXABLEND_11               0x2fb8
1459 #define R200_PP_TXABLEND2_11              0x2fbc
1460 #define R200_PP_TXCBLEND_12               0x2fc0
1461 #define R200_PP_TXCBLEND2_12              0x2fc4
1462 #define R200_PP_TXABLEND_12               0x2fc8
1463 #define R200_PP_TXABLEND2_12              0x2fcc
1464 #define R200_PP_TXCBLEND_13               0x2fd0
1465 #define R200_PP_TXCBLEND2_13              0x2fd4
1466 #define R200_PP_TXABLEND_13               0x2fd8
1467 #define R200_PP_TXABLEND2_13              0x2fdc
1468 #define R200_PP_TXCBLEND_14               0x2fe0
1469 #define R200_PP_TXCBLEND2_14              0x2fe4
1470 #define R200_PP_TXABLEND_14               0x2fe8
1471 #define R200_PP_TXABLEND2_14              0x2fec
1472 #define R200_PP_TXCBLEND_15               0x2ff0
1473 #define R200_PP_TXCBLEND2_15              0x2ff4
1474 #define R200_PP_TXABLEND_15               0x2ff8
1475 #define R200_PP_TXABLEND2_15              0x2ffc
1476 /* gap */
1477 #define R200_RB3D_BLENDCOLOR               0x3218 /* ARGB 8888 */
1478 #define R200_RB3D_ABLENDCNTL               0x321C /* see BLENDCTL */
1479 #define R200_RB3D_CBLENDCNTL               0x3220 /* see BLENDCTL */
1480 
1481 
1482 /*
1483  * Offsets in TCL vector state.  NOTE: Hardwiring matrix positions.
1484  * Multiple contexts could collaberate to eliminate state bouncing.
1485  */
1486 #define R200_VS_LIGHT_AMBIENT_ADDR          0x00000028
1487 #define R200_VS_LIGHT_DIFFUSE_ADDR          0x00000030
1488 #define R200_VS_LIGHT_SPECULAR_ADDR         0x00000038
1489 #define R200_VS_LIGHT_DIRPOS_ADDR           0x00000040
1490 #define R200_VS_LIGHT_HWVSPOT_ADDR          0x00000048
1491 #define R200_VS_LIGHT_ATTENUATION_ADDR      0x00000050
1492 #define R200_VS_SPOT_DUAL_CONE              0x00000058
1493 #define R200_VS_GLOBAL_AMBIENT_ADDR         0x0000005C
1494 #define R200_VS_FOG_PARAM_ADDR              0x0000005D
1495 #define R200_VS_EYE_VECTOR_ADDR             0x0000005E
1496 #define R200_VS_UCP_ADDR                    0x00000060
1497 #define R200_VS_PNT_SPRITE_VPORT_SCALE      0x00000068
1498 #define R200_VS_MATRIX_0_MV                 0x00000080
1499 #define R200_VS_MATRIX_1_INV_MV        	    0x00000084
1500 #define R200_VS_MATRIX_2_MVP        	    0x00000088
1501 #define R200_VS_MATRIX_3_TEX0        	    0x0000008C
1502 #define R200_VS_MATRIX_4_TEX1        	    0x00000090
1503 #define R200_VS_MATRIX_5_TEX2        	    0x00000094
1504 #define R200_VS_MATRIX_6_TEX3        	    0x00000098
1505 #define R200_VS_MATRIX_7_TEX4        	    0x0000009C
1506 #define R200_VS_MATRIX_8_TEX5        	    0x000000A0
1507 #define R200_VS_MAT_0_EMISS                 0x000000B0
1508 #define R200_VS_MAT_0_AMB                   0x000000B1
1509 #define R200_VS_MAT_0_DIF                   0x000000B2
1510 #define R200_VS_MAT_0_SPEC                  0x000000B3
1511 #define R200_VS_MAT_1_EMISS                 0x000000B4
1512 #define R200_VS_MAT_1_AMB                   0x000000B5
1513 #define R200_VS_MAT_1_DIF                   0x000000B6
1514 #define R200_VS_MAT_1_SPEC                  0x000000B7
1515 #define R200_VS_EYE2CLIP_MTX                0x000000B8
1516 #define R200_VS_PNT_SPRITE_ATT_CONST        0x000000BC
1517 #define R200_VS_PNT_SPRITE_EYE_IN_MODEL     0x000000BD
1518 #define R200_VS_PNT_SPRITE_CLAMP            0x000000BE
1519 #define R200_VS_MAX                         0x000001C0
1520 
1521 #define R200_PVS_PROG0                      0x00000080
1522 #define R200_PVS_PROG1                      0x00000180
1523 #define R200_PVS_PARAM0                     0x00000000
1524 #define R200_PVS_PARAM1                     0x00000100
1525 
1526 /*
1527  * Offsets in TCL scalar state
1528  */
1529 #define R200_SS_LIGHT_DCD_ADDR              0x00000000
1530 #define R200_SS_LIGHT_DCM_ADDR              0x00000008
1531 #define R200_SS_LIGHT_SPOT_EXPONENT_ADDR    0x00000010
1532 #define R200_SS_LIGHT_SPOT_CUTOFF_ADDR      0x00000018
1533 #define R200_SS_LIGHT_SPECULAR_THRESH_ADDR  0x00000020
1534 #define R200_SS_LIGHT_RANGE_CUTOFF_SQRD     0x00000028
1535 #define R200_SS_LIGHT_RANGE_ATT_CONST       0x00000030
1536 #define R200_SS_VERT_GUARD_CLIP_ADJ_ADDR    0x00000080
1537 #define R200_SS_VERT_GUARD_DISCARD_ADJ_ADDR 0x00000081
1538 #define R200_SS_HORZ_GUARD_CLIP_ADJ_ADDR    0x00000082
1539 #define R200_SS_HORZ_GUARD_DISCARD_ADJ_ADDR 0x00000083
1540 #define R200_SS_MAT_0_SHININESS             0x00000100
1541 #define R200_SS_MAT_1_SHININESS             0x00000101
1542 
1543 
1544 /*
1545  * Matrix indices
1546  */
1547 #define R200_MTX_MV                        0
1548 #define R200_MTX_IMV                       1
1549 #define R200_MTX_MVP                       2
1550 #define R200_MTX_TEX0                      3
1551 #define R200_MTX_TEX1                      4
1552 #define R200_MTX_TEX2                      5
1553 #define R200_MTX_TEX3                      6
1554 #define R200_MTX_TEX4                      7
1555 #define R200_MTX_TEX5                      8
1556 
1557 /* Color formats for 2d packets
1558  */
1559 #define R200_CP_COLOR_FORMAT_CI8	2
1560 #define R200_CP_COLOR_FORMAT_ARGB1555	3
1561 #define R200_CP_COLOR_FORMAT_RGB565	4
1562 #define R200_CP_COLOR_FORMAT_ARGB8888	6
1563 #define R200_CP_COLOR_FORMAT_RGB332	7
1564 #define R200_CP_COLOR_FORMAT_RGB8	9
1565 #define R200_CP_COLOR_FORMAT_ARGB4444	15
1566 
1567 
1568 /*
1569  * CP type-3 packets
1570  */
1571 #define R200_CP_CMD_NOP                 0xC0001000
1572 #define R200_CP_CMD_NEXT_CHAR           0xC0001900
1573 #define R200_CP_CMD_PLY_NEXTSCAN        0xC0001D00
1574 #define R200_CP_CMD_SET_SCISSORS        0xC0001E00
1575 #define R200_CP_CMD_LOAD_MICROCODE      0xC0002400
1576 #define R200_CP_CMD_WAIT_FOR_IDLE       0xC0002600
1577 #define R200_CP_CMD_3D_DRAW_VBUF        0xC0002800
1578 #define R200_CP_CMD_3D_DRAW_IMMD        0xC0002900
1579 #define R200_CP_CMD_3D_DRAW_INDX        0xC0002A00
1580 #define R200_CP_CMD_LOAD_PALETTE        0xC0002C00
1581 #define R200_CP_CMD_3D_LOAD_VBPNTR      0xC0002F00
1582 #define R200_CP_CMD_INDX_BUFFER         0xC0003300
1583 #define R200_CP_CMD_3D_DRAW_VBUF_2      0xC0003400
1584 #define R200_CP_CMD_3D_DRAW_IMMD_2      0xC0003500
1585 #define R200_CP_CMD_3D_DRAW_INDX_2      0xC0003600
1586 #define R200_CP_CMD_PAINT		0xC0009100
1587 #define R200_CP_CMD_BITBLT		0xC0009200
1588 #define R200_CP_CMD_SMALLTEXT		0xC0009300
1589 #define R200_CP_CMD_HOSTDATA_BLT	0xC0009400
1590 #define R200_CP_CMD_POLYLINE		0xC0009500
1591 #define R200_CP_CMD_POLYSCANLINES	0xC0009800
1592 #define R200_CP_CMD_PAINT_MULTI		0xC0009A00
1593 #define R200_CP_CMD_BITBLT_MULTI	0xC0009B00
1594 #define R200_CP_CMD_TRANS_BITBLT	0xC0009C00
1595 
1596 #endif
1597 
1598