1 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=OMP45 --check-prefix=CHECK
2 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
4 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fopenmp-version=45 -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=TERM_DEBUG
5 
6 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=OMP50 --check-prefix=CHECK
7 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
8 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
9 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=TERM_DEBUG
10 
11 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck --check-prefix SIMD-ONLY0 %s
12 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
13 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
14 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp-simd -fopenmp-version=45 -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
15 
16 // RUN: %clang_cc1 -verify -fopenmp-simd  -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck --check-prefix SIMD-ONLY0 %s
17 // RUN: %clang_cc1 -fopenmp-simd  -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
18 // RUN: %clang_cc1 -fopenmp-simd  -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
19 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp-simd  -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
20 // expected-no-diagnostics
21 // SIMD-ONLY0-NOT: {{__kmpc|__tgt}}
22 #ifndef HEADER
23 #define HEADER
24 
get_val()25 long long get_val() { extern void mayThrow(); mayThrow(); return 0; }
26 double *g_ptr;
27 
28 // CHECK-LABEL: define {{.*void}} @{{.*}}simple{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
simple(float * a,float * b,float * c,float * d)29 void simple(float *a, float *b, float *c, float *d) {
30 // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(
31 // CHECK: [[K0:%.+]] = call {{.*}}i64 @{{.*}}get_val
32 // CHECK-NEXT: store i64 [[K0]], i64* [[K_VAR:%[^,]+]]
33 // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(
34 // CHECK: store i32 12, i32* [[LIN_VAR:%[^,]+]]
35 // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(
36 // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(
37 // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(
38 // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(
39 // CHECK: store i32 -1, i32* [[A:%.+]],
40 // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(
41 // CHECK: store i32 -1, i32* [[R:%[^,]+]],
42 // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(
43   #pragma omp parallel for simd
44 // CHECK: call void @__kmpc_for_static_init_4(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1)
45 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
46 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 5
47 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
48 // CHECK: [[TRUE]]:
49 // CHECK: br label %[[SWITCH:[^,]+]]
50 // CHECK: [[FALSE]]:
51 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
52 // CHECK: br label %[[SWITCH]]
53 // CHECK: [[SWITCH]]:
54 // CHECK: [[UP:%.+]] = phi i32 [ 5, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
55 // CHECK: store i32 [[UP]], i32* [[UB]],
56 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
57 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV:%[^,]+]],
58 
59 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
60 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]
61 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB_VAL]]
62 // CHECK-NEXT: br i1 [[CMP]], label %[[SIMPLE_LOOP1_BODY:.+]], label %[[SIMPLE_LOOP1_END:[^,]+]]
63   for (int i = 3; i < 32; i += 5) {
64 // CHECK: [[SIMPLE_LOOP1_BODY]]:
65 // Start of body: calculate i from IV:
66 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]
67 // CHECK: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 5
68 // CHECK-NEXT: [[CALC_I_2:%.+]] = add nsw i32 3, [[CALC_I_1]]
69 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
70 // ... loop body ...
71 // End of body: store into a[i]:
72 // CHECK: store float [[RESULT:%.+]], float*
73     a[i] = b[i] * c[i] * d[i];
74 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]
75 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1
76 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]
77 // br label %{{.+}}, !llvm.loop !{{.+}}
78   }
79 // CHECK: [[SIMPLE_LOOP1_END]]:
80 // CHECK: call void @__kmpc_for_static_fini(%struct.ident_t* {{.+}}, i32 %{{.+}})
81 
82   long long k = get_val();
83 
84   #pragma omp parallel for simd linear(k : 3) schedule(dynamic)
85 // CHECK: [[K0LOAD:%.+]] = load i64, i64* [[K_VAR:%[^,]+]]
86 // CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]]
87 
88 // CHECK: call void @__kmpc_dispatch_init_4(%struct.ident_t* {{.+}}, i32 %{{.+}}, i32 {{35|1073741859}}, i32 0, i32 8, i32 1, i32 1)
89 // CHECK: [[NEXT:%.+]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* {{.+}}, i32 %{{.+}}, i32* %{{.+}}, i32* [[LB:%.+]], i32* [[UB:%.+]], i32* %{{.+}})
90 // CHECK: [[COND:%.+]] = icmp ne i32 [[NEXT]], 0
91 // CHECK: br i1 [[COND]], label %[[CONT:.+]], label %[[END:.+]]
92 // CHECK: [[CONT]]:
93 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
94 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV2:%[^,]+]],
95 
96 // CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.access.group
97 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]{{.*}}!llvm.access.group
98 // CHECK-NEXT: [[CMP2:%.+]] = icmp sle i32 [[IV2]], [[UB_VAL]]
99 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP2_BODY:.+]], label %[[SIMPLE_LOOP2_END:[^,]+]]
100   for (int i = 10; i > 1; i--) {
101 // CHECK: [[SIMPLE_LOOP2_BODY]]:
102 // Start of body: calculate i from IV:
103 // CHECK: [[IV2_0:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.access.group
104 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
105 // CHECK-NEXT: [[IV2_1:%.+]] = mul nsw i32 [[IV2_0]], 1
106 // CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV2_1]]
107 // CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.access.group
108 //
109 // CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.access.group
110 // CHECK-NEXT: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.access.group
111 // CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV2_2]], 3
112 // CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64
113 // CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]
114 // Update of the privatized version of linear variable!
115 // CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]]
116     a[k]++;
117     k = k + 3;
118 // CHECK: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.access.group
119 // CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV2_2]], 1
120 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV2]]{{.*}}!llvm.access.group
121 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP2_ID]]
122   }
123 // CHECK: [[SIMPLE_LOOP2_END]]:
124 //
125 // Update linear vars after loop, as the loop was operating on a private version.
126 // CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
127 // CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27
128 // CHECK-NEXT: store i64 [[LIN_ADD2]], i64* %{{.+}}
129 
130   int lin = 12;
131   #pragma omp parallel for simd linear(lin : get_val()), linear(g_ptr)
132 
133 // CHECK: alloca i32,
134 // Init linear private var.
135 // CHECK: [[LIN_VAR:%.+]] = load i32*, i32** %
136 // CHECK: [[LIN_LOAD:%.+]] = load i32, i32* [[LIN_VAR]]
137 // CHECK-NEXT: store i32 [[LIN_LOAD]], i32* [[LIN_START:%[^,]+]]
138 // Remember linear step.
139 // CHECK: [[CALL_VAL:%.+]] = invoke
140 // CHECK: store i64 [[CALL_VAL]], i64* [[LIN_STEP:%[^,]+]]
141 
142 // CHECK: [[GLIN_LOAD:%.+]] = load double*, double** [[GLIN_VAR:%.+]],
143 // CHECK-NEXT: store double* [[GLIN_LOAD]], double** [[GLIN_START:%[^,]+]]
144 
145 // CHECK: call void @__kmpc_for_static_init_8u(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1)
146 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
147 // CHECK: [[CMP:%.+]] = icmp ugt i64 [[UB_VAL]], 3
148 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
149 // CHECK: [[TRUE]]:
150 // CHECK: br label %[[SWITCH:[^,]+]]
151 // CHECK: [[FALSE]]:
152 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
153 // CHECK: br label %[[SWITCH]]
154 // CHECK: [[SWITCH]]:
155 // CHECK: [[UP:%.+]] = phi i64 [ 3, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
156 // CHECK: store i64 [[UP]], i64* [[UB]],
157 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
158 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV3:%[^,]+]],
159 
160 // CHECK: [[IV3:%.+]] = load i64, i64* [[OMP_IV3]]
161 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
162 // CHECK-NEXT: [[CMP3:%.+]] = icmp ule i64 [[IV3]], [[UB_VAL]]
163 // CHECK-NEXT: br i1 [[CMP3]], label %[[SIMPLE_LOOP3_BODY:.+]], label %[[SIMPLE_LOOP3_END:[^,]+]]
164   for (unsigned long long it = 2000; it >= 600; it-=400) {
165 // CHECK: [[SIMPLE_LOOP3_BODY]]:
166 // Start of body: calculate it from IV:
167 // CHECK: [[IV3_0:%.+]] = load i64, i64* [[OMP_IV3]]
168 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul i64 [[IV3_0]], 400
169 // CHECK-NEXT: [[LC_IT_2:%.+]] = sub i64 2000, [[LC_IT_1]]
170 // CHECK-NEXT: store i64 [[LC_IT_2]], i64* {{.+}}
171 //
172 // Linear start and step are used to calculate current value of the linear variable.
173 // CHECK: [[LINSTART:.+]] = load i32, i32* [[LIN_START]]
174 // CHECK: [[LINSTEP:.+]] = load i64, i64* [[LIN_STEP]]
175 // CHECK-NOT: store i32 {{.+}}, i32* [[LIN_VAR]]
176 // CHECK: [[GLINSTART:.+]] = load double*, double** [[GLIN_START]]
177 // CHECK-NEXT: [[IV3_1:%.+]] = load i64, i64* [[OMP_IV3]]
178 // CHECK-NEXT: [[MUL:%.+]] = mul i64 [[IV3_1]], 1
179 // CHECK: [[GEP:%.+]] = getelementptr{{.*}}[[GLINSTART]]
180 // CHECK-NEXT: store double* [[GEP]], double** [[G_PTR_CUR:%[^,]+]]
181     *g_ptr++ = 0.0;
182 // CHECK: [[GEP_VAL:%.+]] = load double{{.*}}[[G_PTR_CUR]]
183 // CHECK: store double{{.*}}[[GEP_VAL]]
184     a[it + lin]++;
185 // CHECK: [[FLT_INC:%.+]] = fadd float
186 // CHECK-NEXT: store float [[FLT_INC]],
187 // CHECK: [[IV3_2:%.+]] = load i64, i64* [[OMP_IV3]]
188 // CHECK-NEXT: [[ADD3_2:%.+]] = add i64 [[IV3_2]], 1
189 // CHECK-NEXT: store i64 [[ADD3_2]], i64* [[OMP_IV3]]
190   }
191 // CHECK: [[SIMPLE_LOOP3_END]]:
192 // CHECK: call void @__kmpc_for_static_fini(%struct.ident_t* {{.+}}, i32 %{{.+}})
193 //
194 // Linear start and step are used to calculate final value of the linear variables.
195 // CHECK: [[LINSTART:.+]] = load i32, i32* [[LIN_START]]
196 // CHECK: [[LINSTEP:.+]] = load i64, i64* [[LIN_STEP]]
197 // CHECK: store i32 {{.+}}, i32* [[LIN_VAR]],
198 // CHECK: [[GLINSTART:.+]] = load double*, double** [[GLIN_START]]
199 // CHECK: store double* {{.*}}[[GLIN_VAR]]
200 
201   #pragma omp parallel for simd
202 // CHECK: call void @__kmpc_for_static_init_4(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1)
203 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
204 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 3
205 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
206 // CHECK: [[TRUE]]:
207 // CHECK: br label %[[SWITCH:[^,]+]]
208 // CHECK: [[FALSE]]:
209 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
210 // CHECK: br label %[[SWITCH]]
211 // CHECK: [[SWITCH]]:
212 // CHECK: [[UP:%.+]] = phi i32 [ 3, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
213 // CHECK: store i32 [[UP]], i32* [[UB]],
214 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
215 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV4:%[^,]+]],
216 
217 // CHECK: [[IV4:%.+]] = load i32, i32* [[OMP_IV4]]
218 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]
219 // CHECK-NEXT: [[CMP4:%.+]] = icmp sle i32 [[IV4]], [[UB_VAL]]
220 // CHECK-NEXT: br i1 [[CMP4]], label %[[SIMPLE_LOOP4_BODY:.+]], label %[[SIMPLE_LOOP4_END:[^,]+]]
221   for (short it = 6; it <= 20; it-=-4) {
222 // CHECK: [[SIMPLE_LOOP4_BODY]]:
223 // Start of body: calculate it from IV:
224 // CHECK: [[IV4_0:%.+]] = load i32, i32* [[OMP_IV4]]
225 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i32 [[IV4_0]], 4
226 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i32 6, [[LC_IT_1]]
227 // CHECK-NEXT: [[LC_IT_3:%.+]] = trunc i32 [[LC_IT_2]] to i16
228 // CHECK-NEXT: store i16 [[LC_IT_3]], i16*
229 
230 // CHECK: [[IV4_2:%.+]] = load i32, i32* [[OMP_IV4]]
231 // CHECK-NEXT: [[ADD4_2:%.+]] = add nsw i32 [[IV4_2]], 1
232 // CHECK-NEXT: store i32 [[ADD4_2]], i32* [[OMP_IV4]]
233   }
234 // CHECK: [[SIMPLE_LOOP4_END]]:
235 // CHECK: call void @__kmpc_for_static_fini(%struct.ident_t* {{.+}}, i32 %{{.+}})
236 
237   #pragma omp parallel for simd
238 // CHECK: call void @__kmpc_for_static_init_4(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1)
239 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
240 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 25
241 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
242 // CHECK: [[TRUE]]:
243 // CHECK: br label %[[SWITCH:[^,]+]]
244 // CHECK: [[FALSE]]:
245 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
246 // CHECK: br label %[[SWITCH]]
247 // CHECK: [[SWITCH]]:
248 // CHECK: [[UP:%.+]] = phi i32 [ 25, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
249 // CHECK: store i32 [[UP]], i32* [[UB]],
250 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
251 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV5:%[^,]+]],
252 
253 // CHECK: [[IV5:%.+]] = load i32, i32* [[OMP_IV5]]
254 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]
255 // CHECK-NEXT: [[CMP5:%.+]] = icmp sle i32 [[IV5]], [[UB_VAL]]
256 // CHECK-NEXT: br i1 [[CMP5]], label %[[SIMPLE_LOOP5_BODY:.+]], label %[[SIMPLE_LOOP5_END:[^,]+]]
257   for (unsigned char it = 'z'; it >= 'a'; it+=-1) {
258 // CHECK: [[SIMPLE_LOOP5_BODY]]:
259 // Start of body: calculate it from IV:
260 // CHECK: [[IV5_0:%.+]] = load i32, i32* [[OMP_IV5]]
261 // CHECK-NEXT: [[IV5_1:%.+]] = mul nsw i32 [[IV5_0]], 1
262 // CHECK-NEXT: [[LC_IT_1:%.+]] = sub nsw i32 122, [[IV5_1]]
263 // CHECK-NEXT: [[LC_IT_2:%.+]] = trunc i32 [[LC_IT_1]] to i8
264 // CHECK-NEXT: store i8 [[LC_IT_2]], i8* {{.+}},
265 
266 // CHECK: [[IV5_2:%.+]] = load i32, i32* [[OMP_IV5]]
267 // CHECK-NEXT: [[ADD5_2:%.+]] = add nsw i32 [[IV5_2]], 1
268 // CHECK-NEXT: store i32 [[ADD5_2]], i32* [[OMP_IV5]]
269   }
270 // CHECK: [[SIMPLE_LOOP5_END]]:
271 // CHECK: call void @__kmpc_for_static_fini(%struct.ident_t* {{.+}}, i32 %{{.+}})
272 
273 // CHECK-NOT: mul i32 %{{.+}}, 10
274   #pragma omp parallel for simd
275   for (unsigned i=100; i<10; i+=10) {
276   }
277 
278   int A;
279   {
280   A = -1;
281   #pragma omp parallel for simd lastprivate(A)
282 // CHECK: call void @__kmpc_for_static_init_8(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1)
283 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
284 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 6
285 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
286 // CHECK: [[TRUE]]:
287 // CHECK: br label %[[SWITCH:[^,]+]]
288 // CHECK: [[FALSE]]:
289 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
290 // CHECK: br label %[[SWITCH]]
291 // CHECK: [[SWITCH]]:
292 // CHECK: [[UP:%.+]] = phi i64 [ 6, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
293 // CHECK: store i64 [[UP]], i64* [[UB]],
294 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
295 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV7:%[^,]+]],
296 
297 // CHECK: br label %[[SIMD_LOOP7_COND:[^,]+]]
298 // CHECK: [[SIMD_LOOP7_COND]]:
299 // CHECK-NEXT: [[IV7:%.+]] = load i64, i64* [[OMP_IV7]]
300 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
301 // CHECK-NEXT: [[CMP7:%.+]] = icmp sle i64 [[IV7]], [[UB_VAL]]
302 // CHECK-NEXT: br i1 [[CMP7]], label %[[SIMPLE_LOOP7_BODY:.+]], label %[[SIMPLE_LOOP7_END:[^,]+]]
303   for (long long i = -10; i < 10; i += 3) {
304 // CHECK: [[SIMPLE_LOOP7_BODY]]:
305 // Start of body: calculate i from IV:
306 // CHECK: [[IV7_0:%.+]] = load i64, i64* [[OMP_IV7]]
307 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV7_0]], 3
308 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]
309 // CHECK-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]],
310 // CHECK-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]]
311 // CHECK-NEXT: [[CONV:%.+]] = trunc i64 [[LC_VAL]] to i32
312 // CHECK-NEXT: store i32 [[CONV]], i32* [[A_PRIV:%[^,]+]],
313     A = i;
314 // CHECK: [[IV7_2:%.+]] = load i64, i64* [[OMP_IV7]]
315 // CHECK-NEXT: [[ADD7_2:%.+]] = add nsw i64 [[IV7_2]], 1
316 // CHECK-NEXT: store i64 [[ADD7_2]], i64* [[OMP_IV7]]
317   }
318 // CHECK: [[SIMPLE_LOOP7_END]]:
319 // CHECK: call void @__kmpc_for_static_fini(%struct.ident_t* {{.+}}, i32 %{{.+}})
320 // CHECK: load i32, i32*
321 // CHECK: icmp ne i32 %{{.+}}, 0
322 // CHECK: br i1 %{{.+}}, label
323 // CHECK: [[A_PRIV_VAL:%.+]] = load i32, i32* [[A_PRIV]],
324 // CHECK-NEXT: store i32 [[A_PRIV_VAL]], i32* %{{.+}},
325 // CHECK-NEXT: br label
326   }
327   int R;
328   {
329   R = -1;
330 // CHECK: store i32 1, i32* [[R_PRIV:%[^,]+]],
331   #pragma omp parallel for simd reduction(*:R)
332 // CHECK: call void @__kmpc_for_static_init_8(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1)
333 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
334 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 6
335 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
336 // CHECK: [[TRUE]]:
337 // CHECK: br label %[[SWITCH:[^,]+]]
338 // CHECK: [[FALSE]]:
339 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
340 // CHECK: br label %[[SWITCH]]
341 // CHECK: [[SWITCH]]:
342 // CHECK: [[UP:%.+]] = phi i64 [ 6, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
343 // CHECK: store i64 [[UP]], i64* [[UB]],
344 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
345 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV8:%[^,]+]],
346 
347 // CHECK: br label %[[SIMD_LOOP8_COND:[^,]+]]
348 // CHECK: [[SIMD_LOOP8_COND]]:
349 // CHECK-NEXT: [[IV8:%.+]] = load i64, i64* [[OMP_IV8]]
350 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
351 // CHECK-NEXT: [[CMP8:%.+]] = icmp sle i64 [[IV8]], [[UB_VAL]]
352 // CHECK-NEXT: br i1 [[CMP8]], label %[[SIMPLE_LOOP8_BODY:.+]], label %[[SIMPLE_LOOP8_END:[^,]+]]
353   for (long long i = -10; i < 10; i += 3) {
354 // CHECK: [[SIMPLE_LOOP8_BODY]]:
355 // Start of body: calculate i from IV:
356 // CHECK: [[IV8_0:%.+]] = load i64, i64* [[OMP_IV8]]
357 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV8_0]], 3
358 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]
359 // CHECK-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]],
360 // CHECK-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]]
361 // CHECK: store i32 %{{.+}}, i32* [[R_PRIV]],
362     R *= i;
363 // CHECK: [[IV8_2:%.+]] = load i64, i64* [[OMP_IV8]]
364 // CHECK-NEXT: [[ADD8_2:%.+]] = add nsw i64 [[IV8_2]], 1
365 // CHECK-NEXT: store i64 [[ADD8_2]], i64* [[OMP_IV8]]
366   }
367 // CHECK: [[SIMPLE_LOOP8_END]]:
368 // CHECK: call void @__kmpc_for_static_fini(%struct.ident_t* {{.+}}, i32 %{{.+}})
369 // CHECK: call i32 @__kmpc_reduce_nowait(
370 // CHECK: [[R_PRIV_VAL:%.+]] = load i32, i32* [[R_PRIV]],
371 // CHECK: [[RED:%.+]] = mul nsw i32 %{{.+}}, [[R_PRIV_VAL]]
372 // CHECK-NEXT: store i32 [[RED]], i32* %{{.+}},
373 // CHECK-NEXT: call void @__kmpc_end_reduce_nowait(
374   }
375 }
376 
377 template <class T, unsigned K> T tfoo(T a) { return a + K; }
378 
379 template <typename T, unsigned N>
templ1(T a,T * z)380 int templ1(T a, T *z) {
381   #pragma omp parallel for simd collapse(N)
382   for (int i = 0; i < N * 2; i++) {
383     for (long long j = 0; j < (N + N + N + N); j += 2) {
384       z[i + j] = a + tfoo<T, N>(i + j);
385     }
386   }
387   return 0;
388 }
389 
390 // Instatiation templ1<float,2>
391 // CHECK-LABEL: define {{.*i32}} @{{.*}}templ1{{.*}}(float {{.+}}, float* {{.+}})
392 // CHECK: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(
inst_templ1()393 void inst_templ1() {
394   float a;
395   float z[100];
396   templ1<float,2> (a, z);
397 }
398 
399 // OMP50: call void @__kmpc_for_static_init_8(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1)
400 // OMP50: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
401 // OMP50: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 15
402 // OMP50: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
403 // OMP50: [[TRUE]]:
404 // OMP50: br label %[[SWITCH:[^,]+]]
405 // OMP50: [[FALSE]]:
406 // OMP50: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
407 // OMP50: br label %[[SWITCH]]
408 // OMP50: [[SWITCH]]:
409 // OMP50: [[UP:%.+]] = phi i64 [ 15, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
410 // OMP50: store i64 [[UP]], i64* [[UB]],
411 // OMP50: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
412 // OMP50: store i64 [[LB_VAL]], i64* [[T1_OMP_IV:%[^,]+]],
413 
414 // ...
415 // OMP50: [[IV:%.+]] = load i64, i64* [[T1_OMP_IV]]
416 // OMP50-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
417 // OMP50-NEXT: [[CMP1:%.+]] = icmp sle i64 [[IV]], [[UB_VAL]]
418 // OMP50-NEXT: br i1 [[CMP1]], label %[[T1_BODY:.+]], label %[[T1_END:[^,]+]]
419 // OMP50: [[T1_BODY]]:
420 // Loop counters i and j updates:
421 // OMP50: [[IV1:%.+]] = load i64, i64* [[T1_OMP_IV]]
422 // OMP50-NEXT: [[I_1:%.+]] = sdiv i64 [[IV1]], 4
423 // OMP50-NEXT: [[I_1_MUL1:%.+]] = mul nsw i64 [[I_1]], 1
424 // OMP50-NEXT: [[I_1_ADD0:%.+]] = add nsw i64 0, [[I_1_MUL1]]
425 // OMP50-NEXT: [[I_2:%.+]] = trunc i64 [[I_1_ADD0]] to i32
426 // OMP50-NEXT: store i32 [[I_2]], i32*
427 // OMP50: [[IV2:%.+]] = load i64, i64* [[T1_OMP_IV]]
428 // OMP50: [[IV2_1:%.+]] = load i64, i64* [[T1_OMP_IV]]
429 // OMP50-NEXT: [[DIV_1:%.+]] = sdiv i64 [[IV2_1]], 4
430 // OMP50-NEXT: [[MUL_1:%.+]] = mul nsw i64 [[DIV_1]], 4
431 // OMP50-NEXT: [[J_1:%.+]] = sub nsw i64 [[IV2]], [[MUL_1]]
432 // OMP50-NEXT: [[J_2:%.+]] = mul nsw i64 [[J_1]], 2
433 // OMP50-NEXT: [[J_2_ADD0:%.+]] = add nsw i64 0, [[J_2]]
434 // OMP50-NEXT: store i64 [[J_2_ADD0]], i64*
435 // simd.for.inc:
436 // OMP50: [[IV3:%.+]] = load i64, i64* [[T1_OMP_IV]]
437 // OMP50-NEXT: [[INC:%.+]] = add nsw i64 [[IV3]], 1
438 // OMP50-NEXT: store i64 [[INC]], i64*
439 // OMP50-NEXT: br label {{%.+}}
440 // OMP50: [[T1_END]]:
441 // OMP50: call void @__kmpc_for_static_fini(%struct.ident_t* {{.+}}, i32 %{{.+}})
442 // OMP50: ret void
443 //
444 
445 typedef int MyIdx;
446 
447 class IterDouble {
448   double *Ptr;
449 public:
operator ++() const450   IterDouble operator++ () const {
451     IterDouble n;
452     n.Ptr = Ptr + 1;
453     return n;
454   }
operator <(const IterDouble & that) const455   bool operator < (const IterDouble &that) const {
456     return Ptr < that.Ptr;
457   }
operator *() const458   double & operator *() const {
459     return *Ptr;
460   }
operator -(const IterDouble & that) const461   MyIdx operator - (const IterDouble &that) const {
462     return (MyIdx) (Ptr - that.Ptr);
463   }
operator +(int Delta)464   IterDouble operator + (int Delta) {
465     IterDouble re;
466     re.Ptr = Ptr + Delta;
467     return re;
468   }
469 
470   ///~IterDouble() {}
471 };
472 
473 // CHECK-LABEL: define {{.*void}} @{{.*}}iter_simple{{.*}}
iter_simple(IterDouble ia,IterDouble ib,IterDouble ic)474 void iter_simple(IterDouble ia, IterDouble ib, IterDouble ic) {
475 //
476 // Calculate number of iterations before the loop body.
477 // CHECK: [[DIFF1:%.+]] = invoke {{.*}}i32 @{{.*}}IterDouble{{.*}}
478 // CHECK: [[DIFF2:%.+]] = sub nsw i32 [[DIFF1]], 1
479 // CHECK-NEXT: [[DIFF3:%.+]] = add nsw i32 [[DIFF2]], 1
480 // CHECK-NEXT: [[DIFF4:%.+]] = sdiv i32 [[DIFF3]], 1
481 // CHECK-NEXT: [[DIFF5:%.+]] = sub nsw i32 [[DIFF4]], 1
482 // CHECK-NEXT: store i32 [[DIFF5]], i32* [[OMP_LAST_IT:%[^,]+]]{{.+}}
483   #pragma omp parallel for simd
484 
485 // CHECK: call void @__kmpc_for_static_init_4(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1)
486 // CHECK-DAG: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
487 // CHECK-DAG: [[OMP_LAST_IT_VAL:%.+]] = load i32, i32* [[OMP_LAST_IT]],
488 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], [[OMP_LAST_IT_VAL]]
489 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
490 // CHECK: [[TRUE]]:
491 // CHECK: [[OMP_LAST_IT_VAL:%.+]] = load i32, i32* [[OMP_LAST_IT]],
492 // CHECK: br label %[[SWITCH:[^,]+]]
493 // CHECK: [[FALSE]]:
494 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
495 // CHECK: br label %[[SWITCH]]
496 // CHECK: [[SWITCH]]:
497 // CHECK: [[UP:%.+]] = phi i32 [ [[OMP_LAST_IT_VAL]], %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
498 // CHECK: store i32 [[UP]], i32* [[UB]],
499 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
500 // CHECK: store i32 [[LB_VAL]], i32* [[IT_OMP_IV:%[^,]+]],
501 
502 // CHECK: [[IV:%.+]] = load i32, i32* [[IT_OMP_IV]]
503 // CHECK-NEXT: [[UB_VAL:%.+]] = load i32, i32* [[UB]]
504 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB_VAL]]
505 // CHECK-NEXT: br i1 [[CMP]], label %[[IT_BODY:[^,]+]], label %[[IT_END:[^,]+]]
506   for (IterDouble i = ia; i < ib; ++i) {
507 // CHECK: [[IT_BODY]]:
508 // Start of body: calculate i from index:
509 // CHECK: [[IV1:%.+]] = load i32, i32* [[IT_OMP_IV]]
510 // Call of operator+ (i, IV).
511 // CHECK: {{%.+}} = invoke {{.+}} @{{.*}}IterDouble{{.*}}
512 // ... loop body ...
513    *i = *ic * 0.5;
514 // Float multiply and save result.
515 // CHECK: [[MULR:%.+]] = fmul double {{%.+}}, 5.000000e-01
516 // CHECK-NEXT: invoke {{.+}} @{{.*}}IterDouble{{.*}}
517 // CHECK: store double [[MULR:%.+]], double* [[RESULT_ADDR:%.+]]
518    ++ic;
519 //
520 // CHECK: [[IV2:%.+]] = load i32, i32* [[IT_OMP_IV]]
521 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i32 [[IV2]], 1
522 // CHECK-NEXT: store i32 [[ADD2]], i32* [[IT_OMP_IV]]
523 // br label %{{.*}}, !llvm.loop ![[ITER_LOOP_ID]]
524   }
525 // CHECK: [[IT_END]]:
526 // CHECK: call void @__kmpc_for_static_fini(%struct.ident_t* {{.+}}, i32 %{{.+}})
527 // CHECK: ret void
528 }
529 
530 
531 // CHECK-LABEL: define {{.*void}} @{{.*}}collapsed{{.*}}
collapsed(float * a,float * b,float * c,float * d)532 void collapsed(float *a, float *b, float *c, float *d) {
533   int i; // outer loop counter
534   unsigned j; // middle loop couter, leads to unsigned icmp in loop header.
535   // k declared in the loop init below
536   short l; // inner loop counter
537 // CHECK: call void @__kmpc_for_static_init_4u(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1)
538 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
539 // CHECK: [[CMP:%.+]] = icmp ugt i32 [[UB_VAL]], 119
540 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
541 // CHECK: [[TRUE]]:
542 // CHECK: br label %[[SWITCH:[^,]+]]
543 // CHECK: [[FALSE]]:
544 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
545 // CHECK: br label %[[SWITCH]]
546 // CHECK: [[SWITCH]]:
547 // CHECK: [[UP:%.+]] = phi i32 [ 119, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
548 // CHECK: store i32 [[UP]], i32* [[UB]],
549 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
550 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV:%[^,]+]],
551 //
552   #pragma omp parallel for simd collapse(4)
553 
554 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
555 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]
556 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i32 [[IV]], [[UB_VAL]]
557 // CHECK-NEXT: br i1 [[CMP]], label %[[COLL1_BODY:[^,]+]], label %[[COLL1_END:[^,]+]]
558   for (i = 1; i < 3; i++) // 2 iterations
559     for (j = 2u; j < 5u; j++) //3 iterations
560       for (int k = 3; k <= 6; k++) // 4 iterations
561         for (l = 4; l < 9; ++l) // 5 iterations
562         {
563 // CHECK: [[COLL1_BODY]]:
564 // Start of body: calculate i from index:
565 // CHECK: [[IV1:%.+]] = load i32, i32* [[OMP_IV]]
566 // Calculation of the loop counters values.
567 // CHECK: [[CALC_I_1:%.+]] = udiv i32 [[IV1]], 60
568 // CHECK-NEXT: [[CALC_I_1_MUL1:%.+]] = mul i32 [[CALC_I_1]], 1
569 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i32 1, [[CALC_I_1_MUL1]]
570 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
571 
572 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]
573 // CHECK: [[IV1_2_1:%.+]] = load i32, i32* [[OMP_IV]]
574 // CHECK-NEXT: [[CALC_J_1:%.+]] = udiv i32 [[IV1_2_1]], 60
575 // CHECK-NEXT: [[MUL_1:%.+]] = mul i32 [[CALC_J_1]], 60
576 // CHECK-NEXT: [[SUB_3:%.+]] = sub i32 [[IV1_2]], [[MUL_1]]
577 // CHECK-NEXT: [[CALC_J_2:%.+]] = udiv i32 [[SUB_3]], 20
578 // CHECK-NEXT: [[CALC_J_2_MUL1:%.+]] = mul i32 [[CALC_J_2]], 1
579 // CHECK-NEXT: [[CALC_J_3:%.+]] = add i32 2, [[CALC_J_2_MUL1]]
580 // CHECK-NEXT: store i32 [[CALC_J_3]], i32* [[LC_J:.+]]
581 
582 // CHECK: [[IV1_3:%.+]] = load i32, i32* [[OMP_IV]]
583 // CHECK: [[IV1_3_1:%.+]] = load i32, i32* [[OMP_IV]]
584 // CHECK-NEXT: [[DIV_1:%.+]] = udiv i32 [[IV1_3_1]], 60
585 // CHECK-NEXT: [[MUL_2:%.+]] = mul i32 [[DIV_1]], 60
586 // CHECK-NEXT: [[ADD_3:%.+]] = sub i32 [[IV1_3]], [[MUL_2]]
587 
588 // CHECK: [[IV1_4:%.+]] = load i32, i32* [[OMP_IV]]
589 // CHECK: [[IV1_4_1:%.+]] = load i32, i32* [[OMP_IV]]
590 // CHECK-NEXT: [[DIV_2:%.+]] = udiv i32 [[IV1_4_1]], 60
591 // CHECK-NEXT: [[MUL_3:%.+]] = mul i32 [[DIV_2]], 60
592 // CHECK-NEXT: [[SUB_6:%.+]] = sub i32 [[IV1_4]], [[MUL_3]]
593 // CHECK-NEXT: [[DIV_3:%.+]] = udiv i32 [[SUB_6]], 20
594 // CHECK-NEXT: [[MUL_4:%.+]] = mul i32 [[DIV_3]], 20
595 // CHECK-NEXT: [[SUB_7:%.+]] = sub i32 [[ADD_3]], [[MUL_4]]
596 // CHECK-NEXT: [[DIV_4:%.+]] = udiv i32 [[SUB_7]], 5
597 // CHECK-NEXT: [[MUL_5:%.+]] = mul i32 [[DIV_4]], 1
598 // CHECK-NEXT: [[ADD_6:%.+]] = add i32 3, [[MUL_5]]
599 // CHECK-NEXT: store i32 [[ADD_6]], i32* [[LC_K:.+]]
600 
601 // CHECK: [[IV1_5:%.+]] = load i32, i32* [[OMP_IV]]
602 // CHECK: [[IV1_5_1:%.+]] = load i32, i32* [[OMP_IV]]
603 // CHECK-NEXT: [[DIV_5:%.+]] = udiv i32 [[IV1_5_1]], 60
604 // CHECK-NEXT: [[MUL_6:%.+]] = mul i32 [[DIV_5]], 60
605 // CHECK-NEXT: [[ADD_7:%.+]] = sub i32 [[IV1_5]], [[MUL_6]]
606 
607 // CHECK: [[IV1_6:%.+]] = load i32, i32* [[OMP_IV]]
608 // CHECK: [[IV1_6_1:%.+]] = load i32, i32* [[OMP_IV]]
609 // CHECK-NEXT: [[DIV_6:%.+]] = udiv i32 [[IV1_6_1]], 60
610 // CHECK-NEXT: [[MUL_7:%.+]] = mul i32 [[DIV_6]], 60
611 // CHECK-NEXT: [[SUB_10:%.+]] = sub i32 [[IV1_6]], [[MUL_7]]
612 // CHECK-NEXT: [[DIV_7:%.+]] = udiv i32 [[SUB_10]], 20
613 // CHECK-NEXT: [[MUL_8:%.+]] = mul i32 [[DIV_7]], 20
614 // CHECK-NEXT: [[ADD_9:%.+]] = sub i32 [[ADD_7]], [[MUL_8]]
615 
616 // CHECK: [[IV1_7:%.+]] = load i32, i32* [[OMP_IV]]
617 // CHECK: [[IV1_7_1:%.+]] = load i32, i32* [[OMP_IV]]
618 // CHECK-NEXT: [[DIV_8:%.+]] = udiv i32 [[IV1_7_1]], 60
619 // CHECK-NEXT: [[MUL_9:%.+]] = mul i32 [[DIV_8]], 60
620 // CHECK-NEXT: [[ADD_10:%.+]] = sub i32 [[IV1_7]], [[MUL_9]]
621 
622 // CHECK: [[IV1_8:%.+]] = load i32, i32* [[OMP_IV]]
623 // CHECK: [[IV1_8_1:%.+]] = load i32, i32* [[OMP_IV]]
624 // CHECK-NEXT: [[DIV_3:%.+]] = udiv i32 [[IV1_8_1]], 60
625 // CHECK-NEXT: [[MUL_4:%.+]] = mul i32 [[DIV_3]], 60
626 // CHECK-NEXT: [[SUB_7:%.+]] = sub i32 [[IV1_8]], [[MUL_4]]
627 // CHECK-NEXT: [[DIV_4:%.+]] = udiv i32 [[SUB_7]], 20
628 // CHECK-NEXT: [[MUL_5:%.+]] = mul i32 [[DIV_4]], 20
629 // CHECK-NEXT: [[SUB_8:%.+]] = sub i32 [[ADD_10]], [[MUL_5]]
630 // CHECK-NEXT: [[DIV_5:%.+]] = udiv i32 [[SUB_8]], 5
631 // CHECK-NEXT: [[MUL_6:%.+]] = mul i32 [[DIV_5]], 5
632 // CHECK-NEXT: [[SUB_9:%.+]] = sub i32 [[ADD_9]], [[MUL_6]]
633 // CHECK-NEXT: [[MUL_6:%.+]] = mul i32 [[SUB_9]], 1
634 // CHECK-NEXT: [[CALC_L_2:%.+]] = add i32 4, [[MUL_6]]
635 // CHECK-NEXT: [[CALC_L_3:%.+]] = trunc i32 [[CALC_L_2]] to i16
636 // CHECK-NEXT: store i16 [[CALC_L_3]], i16* [[LC_L:.+]]
637 // ... loop body ...
638 // End of body: store into a[i]:
639 // CHECK: store float [[RESULT:%.+]], float* [[RESULT_ADDR:%.+]]
640     float res = b[j] * c[k];
641     a[i] = res * d[l];
642 // CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV]]
643 // CHECK-NEXT: [[ADD2:%.+]] = add i32 [[IV2]], 1
644 // CHECK-NEXT: store i32 [[ADD2]], i32* [[OMP_IV]]
645 // br label %{{[^,]+}}, !llvm.loop ![[COLL1_LOOP_ID]]
646 // CHECK: [[COLL1_END]]:
647   }
648 // i,j,l are updated; k is not updated.
649 // CHECK: call void @__kmpc_for_static_fini(%struct.ident_t* {{.+}}, i32 %{{.+}})
650 // CHECK: store i32 3, i32* [[I:%[^,]+]]
651 // CHECK: store i32 5, i32* [[I:%[^,]+]]
652 // CHECK: store i16 9, i16* [[I:%[^,]+]]
653 // CHECK: ret void
654 }
655 
656 extern char foo();
657 extern double globalfloat;
658 
659 // CHECK-LABEL: define {{.*void}} @{{.*}}widened{{.*}}
widened(float * a,float * b,float * c,float * d)660 void widened(float *a, float *b, float *c, float *d) {
661   int i; // outer loop counter
662   short j; // inner loop counter
663   globalfloat = 1.0;
664   int localint = 1;
665 // CHECK: store double {{.+}}, double* [[GLOBALFLOAT:@.+]]
666 // Counter is widened to 64 bits.
667 // CHECK:     [[MUL:%.+]] = mul nsw i64 2, %{{.+}}
668 // CHECK-NEXT: [[SUB:%.+]] = sub nsw i64 [[MUL]], 1
669 // CHECK-NEXT: store i64 [[SUB]], i64* [[OMP_LAST_IT:%[^,]+]],
670 // CHECK: call void @__kmpc_for_static_init_8(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1)
671 // CHECK-DAG: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
672 // CHECK-DAG: [[OMP_LAST_IT_VAL:%.+]] = load i64, i64* [[OMP_LAST_IT]],
673 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], [[OMP_LAST_IT_VAL]]
674 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
675 // CHECK: [[TRUE]]:
676 // CHECK: [[OMP_LAST_IT_VAL:%.+]] = load i64, i64* [[OMP_LAST_IT]],
677 // CHECK: br label %[[SWITCH:[^,]+]]
678 // CHECK: [[FALSE]]:
679 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
680 // CHECK: br label %[[SWITCH]]
681 // CHECK: [[SWITCH]]:
682 // CHECK: [[UP:%.+]] = phi i64 [ [[OMP_LAST_IT_VAL]], %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
683 // CHECK: store i64 [[UP]], i64* [[UB]],
684 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
685 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV:%[^,]+]],
686 //
687   #pragma omp parallel for simd collapse(2) private(globalfloat, localint)
688 
689 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]]
690 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
691 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i64 [[IV]], [[UB_VAL]]
692 // CHECK-NEXT: br i1 [[CMP]], label %[[WIDE1_BODY:[^,]+]], label %[[WIDE1_END:[^,]+]]
693   for (i = 1; i < 3; i++) // 2 iterations
694     for (j = 0; j < foo(); j++) // foo() iterations
695   {
696 // CHECK: [[WIDE1_BODY]]:
697 // Start of body: calculate i from index:
698 // CHECK: [[IV1:%.+]] = load i64, i64* [[OMP_IV]]
699 // Calculation of the loop counters values...
700 // CHECK: store i32 {{[^,]+}}, i32* [[LC_I:.+]]
701 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]
702 // CHECK: store i16 {{[^,]+}}, i16* [[LC_J:.+]]
703 // ... loop body ...
704 //
705 // Here we expect store into private double var, not global
706 // CHECK-NOT: store double {{.+}}, double* [[GLOBALFLOAT]]
707     globalfloat = (float)j/i;
708     float res = b[j] * c[j];
709 // Store into a[i]:
710 // CHECK: store float [[RESULT:%.+]], float* [[RESULT_ADDR:%.+]]
711     a[i] = res * d[i];
712 // Then there's a store into private var localint:
713 // CHECK: store i32 {{.+}}, i32* [[LOCALINT:%[^,]+]]
714     localint = (int)j;
715 // CHECK: [[IV2:%.+]] = load i64, i64* [[OMP_IV]]
716 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i64 [[IV2]], 1
717 // CHECK-NEXT: store i64 [[ADD2]], i64* [[OMP_IV]]
718 //
719 // br label %{{[^,]+}}, !llvm.loop ![[WIDE1_LOOP_ID]]
720 // CHECK: [[WIDE1_END]]:
721   }
722 // i,j are updated.
723 // CHECK: store i32 3, i32* [[I:%[^,]+]]
724 // CHECK: store i16
725 //
726 // Here we expect store into original localint, not its privatized version.
727 // CHECK-NOT: store i32 {{.+}}, i32* [[LOCALINT]]
728   localint = (int)j;
729 // CHECK: ret void
730 }
731 
732 // CHECK-LABEL: if_clause
if_clause(int a)733 void if_clause(int a) {
734   #pragma omp parallel for simd if(a) schedule(static, 1)
735 for (int i = 0; i < 10; ++i);
736 }
737 // CHECK: call void @__kmpc_for_static_init_4(
738 // OMP50: [[COND:%.+]] = trunc i8 %{{.+}} to i1
739 // OMP50: br i1 [[COND]], label {{%?}}[[THEN:.+]], label {{%?}}[[ELSE:.+]]
740 
741 // OMP50: [[THEN]]:
742 // OMP45: br label {{.+}}, !llvm.loop ![[VECT:.+]]
743 // OMP50: br label {{.+}}, !llvm.loop ![[VECT:.+]]
744 // OMP50: [[ELSE]]:
745 // OMP50: br label {{.+}}, !llvm.loop ![[NOVECT:.+]]
746 // CHECK: call void @__kmpc_for_static_fini(
747 
748 // OMP45: call void @__kmpc_for_static_init_8(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1)
749 // OMP45: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
750 // OMP45: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 15
751 // OMP45: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
752 // OMP45: [[TRUE]]:
753 // OMP45: br label %[[SWITCH:[^,]+]]
754 // OMP45: [[FALSE]]:
755 // OMP45: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
756 // OMP45: br label %[[SWITCH]]
757 // OMP45: [[SWITCH]]:
758 // OMP45: [[UP:%.+]] = phi i64 [ 15, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
759 // OMP45: store i64 [[UP]], i64* [[UB]],
760 // OMP45: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
761 // OMP45: store i64 [[LB_VAL]], i64* [[T1_OMP_IV:%[^,]+]],
762 
763 // ...
764 // OMP45: [[IV:%.+]] = load i64, i64* [[T1_OMP_IV]]
765 // OMP45-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
766 // OMP45-NEXT: [[CMP1:%.+]] = icmp sle i64 [[IV]], [[UB_VAL]]
767 // OMP45-NEXT: br i1 [[CMP1]], label %[[T1_BODY:.+]], label %[[T1_END:[^,]+]]
768 // OMP45: [[T1_BODY]]:
769 // Loop counters i and j updates:
770 // OMP45: [[IV1:%.+]] = load i64, i64* [[T1_OMP_IV]]
771 // OMP45-NEXT: [[I_1:%.+]] = sdiv i64 [[IV1]], 4
772 // OMP45-NEXT: [[I_1_MUL1:%.+]] = mul nsw i64 [[I_1]], 1
773 // OMP45-NEXT: [[I_1_ADD0:%.+]] = add nsw i64 0, [[I_1_MUL1]]
774 // OMP45-NEXT: [[I_2:%.+]] = trunc i64 [[I_1_ADD0]] to i32
775 // OMP45-NEXT: store i32 [[I_2]], i32*
776 // OMP45: [[IV2:%.+]] = load i64, i64* [[T1_OMP_IV]]
777 // OMP45: [[IV2_1:%.+]] = load i64, i64* [[T1_OMP_IV]]
778 // OMP45-NEXT: [[DIV_1:%.+]] = sdiv i64 [[IV2_1]], 4
779 // OMP45-NEXT: [[MUL_1:%.+]] = mul nsw i64 [[DIV_1]], 4
780 // OMP45-NEXT: [[J_1:%.+]] = sub nsw i64 [[IV2]], [[MUL_1]]
781 // OMP45-NEXT: [[J_2:%.+]] = mul nsw i64 [[J_1]], 2
782 // OMP45-NEXT: [[J_2_ADD0:%.+]] = add nsw i64 0, [[J_2]]
783 // OMP45-NEXT: store i64 [[J_2_ADD0]], i64*
784 // simd.for.inc:
785 // OMP45: [[IV3:%.+]] = load i64, i64* [[T1_OMP_IV]]
786 // OMP45-NEXT: [[INC:%.+]] = add nsw i64 [[IV3]], 1
787 // OMP45-NEXT: store i64 [[INC]], i64*
788 // OMP45-NEXT: br label {{%.+}}
789 // OMP45: [[T1_END]]:
790 // OMP45: call void @__kmpc_for_static_fini(%struct.ident_t* {{.+}}, i32 %{{.+}})
791 // OMP45: ret void
792 //
793 
794 // OMP45-NOT: !{!"llvm.loop.vectorize.enable", i1 false}
795 // OMP45-DAG: ![[VECT]] = distinct !{![[VECT]], ![[PA:.+]], ![[VM:.+]]}
796 // OMP45-DAG: ![[PA]] = !{!"llvm.loop.parallel_accesses", !{{.+}}}
797 // OMP45-DAG: ![[VM]] = !{!"llvm.loop.vectorize.enable", i1 true}
798 // OMP45-NOT: !{!"llvm.loop.vectorize.enable", i1 false}
799 // OMP50-DAG: ![[VECT]] = distinct !{![[VECT]], ![[PA:.+]], ![[VM:.+]]}
800 // OMP50-DAG  ![[PA]] = !{!"llvm.loop.parallel_accesses", !{{.+}}}
801 // OMP50-DAG: ![[VM]] = !{!"llvm.loop.vectorize.enable", i1 true}
802 // OMP50-DAG: ![[NOVECT]] = distinct !{![[NOVECT]], ![[NOVM:.+]]}
803 // OMP50-DAG: ![[NOVM]] = !{!"llvm.loop.vectorize.enable", i1 false}
804 
805 // TERM_DEBUG-LABEL: bar
bar()806 int bar() { extern void mayThrow(); mayThrow(); return 0; };
807 
808 // TERM_DEBUG-LABEL: parallel_simd
parallel_simd(float * a)809 void parallel_simd(float *a) {
810 #pragma omp parallel for simd
811   // TERM_DEBUG-NOT: __kmpc_global_thread_num
812   // TERM_DEBUG:     invoke i32 {{.*}}bar{{.*}}()
813   // TERM_DEBUG:     unwind label %[[TERM_LPAD:[a-zA-Z0-9\.]+]],
814   // TERM_DEBUG-NOT: __kmpc_global_thread_num
815   // TERM_DEBUG:     [[TERM_LPAD]]
816   // TERM_DEBUG:     call void @__clang_call_terminate
817   // TERM_DEBUG:     unreachable
818   for (unsigned i = 131071; i <= 2147483647; i += 127)
819     a[i] += bar();
820 }
821 // TERM_DEBUG: !{{[0-9]+}} = !DILocation(line: [[@LINE-11]],
822 // TERM_DEBUG-NOT: line: 0,
823 #endif // HEADER
824 
825