1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // Test host codegen.
3 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK1
4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
5 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK2
6 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK3
7 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
8 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK4
9
10 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
11 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
13 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
14 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
15 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
16
17 // Test target codegen - host bc file has to be created first.
18 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
19 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK9
20 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
21 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK10
22 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
23 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK11
24 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
25 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK12
26
27 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
28 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
29 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
30 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
31 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
32 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
33 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
34 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
35
36 // Test host codegen.
37 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK17
38 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
39 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK18
40 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK19
41 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
42 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK20
43
44 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
45 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
46 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
47 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
48 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
49 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
50
51 // Test target codegen - host bc file has to be created first.
52 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
53 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK25
54 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
55 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK26
56 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
57 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK27
58 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
59 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK28
60
61 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
62 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
63 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
64 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
65 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
66 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
67 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
68 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
69
70 // expected-no-diagnostics
71 #ifndef HEADER
72 #define HEADER
73
74
75
76
77 // We have 8 target regions, but only 7 that actually will generate offloading
78 // code, only 6 will have mapped arguments, and only 4 have all-constant map
79 // sizes.
80
81
82
83 // Check target registration is registered as a Ctor.
84
85
86 template<typename tx, typename ty>
87 struct TT{
88 tx X;
89 ty Y;
90 };
91
92 int global;
93
foo(int n)94 int foo(int n) {
95 int a = 0;
96 short aa = 0;
97 float b[10];
98 float bn[n];
99 double c[5][10];
100 double cn[5][n];
101 TT<long long, char> d;
102
103 #pragma omp target teams distribute num_teams(a) thread_limit(a) firstprivate(aa) nowait
104 for (int i = 0; i < 10; ++i) {
105 }
106
107 #pragma omp target teams distribute if(target: 0)
108 for (int i = 0; i < 10; ++i) {
109 a += 1;
110 }
111
112
113 #pragma omp target teams distribute if(target: 1)
114 for (int i = 0; i < 10; ++i) {
115 aa += 1;
116 }
117
118
119
120 #pragma omp target teams distribute if(target: n>10)
121 for (int i = 0; i < 10; ++i) {
122 a += 1;
123 aa += 1;
124 }
125
126 // We capture 3 VLA sizes in this target region
127
128
129
130
131
132 // The names below are not necessarily consistent with the names used for the
133 // addresses above as some are repeated.
134
135
136
137
138
139
140
141
142
143
144
145 #pragma omp target teams distribute if(target: n>20) dist_schedule(static, n)
146 for (int i = 0; i < 10; ++i) {
147 a += 1;
148 b[2] += 1.0;
149 bn[3] += 1.0;
150 c[1][2] += 1.0;
151 cn[1][3] += 1.0;
152 d.X += 1;
153 d.Y += 1;
154 }
155
156 return a;
157 }
158
159 // Check that the offloading functions are emitted and that the arguments are
160 // correct and loaded correctly for the target regions in foo().
161
162
163
164
165 // Create stack storage and store argument in there.
166
167 // Create stack storage and store argument in there.
168
169 // Create stack storage and store argument in there.
170
171 // Create local storage for each capture.
172
173
174
175 // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function.
176
177 template<typename tx>
ftemplate(int n)178 tx ftemplate(int n) {
179 tx a = 0;
180 short aa = 0;
181 tx b[10];
182
183 #pragma omp target teams distribute if(target: n>40)
184 for (int i = 0; i < 10; ++i) {
185 a += 1;
186 aa += 1;
187 b[2] += 1;
188 }
189
190 return a;
191 }
192
193 static
fstatic(int n)194 int fstatic(int n) {
195 int a = 0;
196 short aa = 0;
197 char aaa = 0;
198 int b[10];
199
200 #pragma omp target teams distribute if(target: n>50)
201 for (int i = a; i < n; ++i) {
202 a += 1;
203 aa += 1;
204 aaa += 1;
205 b[2] += 1;
206 }
207
208 return a;
209 }
210
211 struct S1 {
212 double a;
213
r1S1214 int r1(int n){
215 int b = n+1;
216 short int c[2][n];
217
218 #pragma omp target teams distribute if(target: n>60)
219 for (int i = 0; i < 10; ++i) {
220 this->a = (double)b + 1.5;
221 c[1][1] = ++a;
222 }
223
224 return c[1][1] + (int)b;
225 }
226 };
227
bar(int n)228 int bar(int n){
229 int a = 0;
230
231 a += foo(n);
232
233 S1 S;
234 a += S.r1(n);
235
236 a += fstatic(n);
237
238 a += ftemplate<int>(n);
239
240 return a;
241 }
242
243
244
245 // We capture 2 VLA sizes in this target region
246
247
248 // The names below are not necessarily consistent with the names used for the
249 // addresses above as some are repeated.
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271 // Check that the offloading functions are emitted and that the arguments are
272 // correct and loaded correctly for the target regions of the callees of bar().
273
274 // Create local storage for each capture.
275 // Store captures in the context.
276
277
278 // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function.
279
280
281 // Create local storage for each capture.
282 // Store captures in the context.
283
284
285
286
287 // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function.
288
289 // Create local storage for each capture.
290 // Store captures in the context.
291
292
293
294 // To reduce complexity, we're only going as far as validating the signature of the outlined parallel function.
295
296 #endif
297 // CHECK1-LABEL: define {{[^@]+}}@_Z3fooi
298 // CHECK1-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
299 // CHECK1-NEXT: entry:
300 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
301 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4
302 // CHECK1-NEXT: [[AA:%.*]] = alloca i16, align 2
303 // CHECK1-NEXT: [[B:%.*]] = alloca [10 x float], align 4
304 // CHECK1-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
305 // CHECK1-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
306 // CHECK1-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8
307 // CHECK1-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8
308 // CHECK1-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 8
309 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
310 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
311 // CHECK1-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
312 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
313 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED4:%.*]] = alloca i64, align 8
314 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
315 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
316 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
317 // CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4
318 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
319 // CHECK1-NEXT: [[AA_CASTED7:%.*]] = alloca i64, align 8
320 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS9:%.*]] = alloca [1 x i8*], align 8
321 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS10:%.*]] = alloca [1 x i8*], align 8
322 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS11:%.*]] = alloca [1 x i8*], align 8
323 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
324 // CHECK1-NEXT: [[A_CASTED12:%.*]] = alloca i64, align 8
325 // CHECK1-NEXT: [[AA_CASTED14:%.*]] = alloca i64, align 8
326 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS16:%.*]] = alloca [2 x i8*], align 8
327 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS17:%.*]] = alloca [2 x i8*], align 8
328 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS18:%.*]] = alloca [2 x i8*], align 8
329 // CHECK1-NEXT: [[_TMP19:%.*]] = alloca i32, align 4
330 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4
331 // CHECK1-NEXT: [[A_CASTED23:%.*]] = alloca i64, align 8
332 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED25:%.*]] = alloca i64, align 8
333 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS29:%.*]] = alloca [10 x i8*], align 8
334 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS30:%.*]] = alloca [10 x i8*], align 8
335 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS31:%.*]] = alloca [10 x i8*], align 8
336 // CHECK1-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [10 x i64], align 8
337 // CHECK1-NEXT: [[_TMP32:%.*]] = alloca i32, align 4
338 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
339 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
340 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4
341 // CHECK1-NEXT: store i16 0, i16* [[AA]], align 2
342 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
343 // CHECK1-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
344 // CHECK1-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave()
345 // CHECK1-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8
346 // CHECK1-NEXT: [[VLA:%.*]] = alloca float, i64 [[TMP2]], align 4
347 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8
348 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
349 // CHECK1-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64
350 // CHECK1-NEXT: [[TMP6:%.*]] = mul nuw i64 5, [[TMP5]]
351 // CHECK1-NEXT: [[VLA1:%.*]] = alloca double, i64 [[TMP6]], align 8
352 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[__VLA_EXPR1]], align 8
353 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4
354 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_]], align 4
355 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4
356 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTCAPTURE_EXPR_2]], align 4
357 // CHECK1-NEXT: [[TMP9:%.*]] = load i16, i16* [[AA]], align 2
358 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
359 // CHECK1-NEXT: store i16 [[TMP9]], i16* [[CONV]], align 2
360 // CHECK1-NEXT: [[TMP10:%.*]] = load i64, i64* [[AA_CASTED]], align 8
361 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
362 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
363 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[CONV3]], align 4
364 // CHECK1-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
365 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
366 // CHECK1-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED4]] to i32*
367 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[CONV5]], align 4
368 // CHECK1-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED4]], align 8
369 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
370 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64*
371 // CHECK1-NEXT: store i64 [[TMP10]], i64* [[TMP16]], align 8
372 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
373 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64*
374 // CHECK1-NEXT: store i64 [[TMP10]], i64* [[TMP18]], align 8
375 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
376 // CHECK1-NEXT: store i8* null, i8** [[TMP19]], align 8
377 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
378 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
379 // CHECK1-NEXT: store i64 [[TMP12]], i64* [[TMP21]], align 8
380 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
381 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
382 // CHECK1-NEXT: store i64 [[TMP12]], i64* [[TMP23]], align 8
383 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
384 // CHECK1-NEXT: store i8* null, i8** [[TMP24]], align 8
385 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
386 // CHECK1-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64*
387 // CHECK1-NEXT: store i64 [[TMP14]], i64* [[TMP26]], align 8
388 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
389 // CHECK1-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i64*
390 // CHECK1-NEXT: store i64 [[TMP14]], i64* [[TMP28]], align 8
391 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
392 // CHECK1-NEXT: store i8* null, i8** [[TMP29]], align 8
393 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
394 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
395 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 0
396 // CHECK1-NEXT: [[TMP33:%.*]] = load i16, i16* [[AA]], align 2
397 // CHECK1-NEXT: store i16 [[TMP33]], i16* [[TMP32]], align 4
398 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 1
399 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
400 // CHECK1-NEXT: store i32 [[TMP35]], i32* [[TMP34]], align 4
401 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 2
402 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
403 // CHECK1-NEXT: store i32 [[TMP37]], i32* [[TMP36]], align 4
404 // CHECK1-NEXT: [[TMP38:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 1, i64 120, i64 12, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1)
405 // CHECK1-NEXT: [[TMP39:%.*]] = bitcast i8* [[TMP38]] to %struct.kmp_task_t_with_privates*
406 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP39]], i32 0, i32 0
407 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP40]], i32 0, i32 0
408 // CHECK1-NEXT: [[TMP42:%.*]] = load i8*, i8** [[TMP41]], align 8
409 // CHECK1-NEXT: [[TMP43:%.*]] = bitcast %struct.anon* [[AGG_CAPTURED]] to i8*
410 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP42]], i8* align 4 [[TMP43]], i64 12, i1 false)
411 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP39]], i32 0, i32 1
412 // CHECK1-NEXT: [[TMP45:%.*]] = bitcast i8* [[TMP42]] to %struct.anon*
413 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 0
414 // CHECK1-NEXT: [[TMP47:%.*]] = bitcast [3 x i8*]* [[TMP46]] to i8*
415 // CHECK1-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP30]] to i8*
416 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP47]], i8* align 8 [[TMP48]], i64 24, i1 false)
417 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 1
418 // CHECK1-NEXT: [[TMP50:%.*]] = bitcast [3 x i8*]* [[TMP49]] to i8*
419 // CHECK1-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP31]] to i8*
420 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP50]], i8* align 8 [[TMP51]], i64 24, i1 false)
421 // CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 2
422 // CHECK1-NEXT: [[TMP53:%.*]] = bitcast [3 x i64]* [[TMP52]] to i8*
423 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP53]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false)
424 // CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 3
425 // CHECK1-NEXT: [[TMP55:%.*]] = load i16, i16* [[AA]], align 2
426 // CHECK1-NEXT: store i16 [[TMP55]], i16* [[TMP54]], align 8
427 // CHECK1-NEXT: [[TMP56:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i8* [[TMP38]])
428 // CHECK1-NEXT: [[TMP57:%.*]] = load i32, i32* [[A]], align 4
429 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32*
430 // CHECK1-NEXT: store i32 [[TMP57]], i32* [[CONV6]], align 4
431 // CHECK1-NEXT: [[TMP58:%.*]] = load i64, i64* [[A_CASTED]], align 8
432 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107(i64 [[TMP58]]) #[[ATTR3:[0-9]+]]
433 // CHECK1-NEXT: [[TMP59:%.*]] = load i16, i16* [[AA]], align 2
434 // CHECK1-NEXT: [[CONV8:%.*]] = bitcast i64* [[AA_CASTED7]] to i16*
435 // CHECK1-NEXT: store i16 [[TMP59]], i16* [[CONV8]], align 2
436 // CHECK1-NEXT: [[TMP60:%.*]] = load i64, i64* [[AA_CASTED7]], align 8
437 // CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0
438 // CHECK1-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i64*
439 // CHECK1-NEXT: store i64 [[TMP60]], i64* [[TMP62]], align 8
440 // CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0
441 // CHECK1-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to i64*
442 // CHECK1-NEXT: store i64 [[TMP60]], i64* [[TMP64]], align 8
443 // CHECK1-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 0
444 // CHECK1-NEXT: store i8* null, i8** [[TMP65]], align 8
445 // CHECK1-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0
446 // CHECK1-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0
447 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
448 // CHECK1-NEXT: [[TMP68:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113.region_id, i32 1, i8** [[TMP66]], i8** [[TMP67]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
449 // CHECK1-NEXT: [[TMP69:%.*]] = icmp ne i32 [[TMP68]], 0
450 // CHECK1-NEXT: br i1 [[TMP69]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
451 // CHECK1: omp_offload.failed:
452 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113(i64 [[TMP60]]) #[[ATTR3]]
453 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
454 // CHECK1: omp_offload.cont:
455 // CHECK1-NEXT: [[TMP70:%.*]] = load i32, i32* [[A]], align 4
456 // CHECK1-NEXT: [[CONV13:%.*]] = bitcast i64* [[A_CASTED12]] to i32*
457 // CHECK1-NEXT: store i32 [[TMP70]], i32* [[CONV13]], align 4
458 // CHECK1-NEXT: [[TMP71:%.*]] = load i64, i64* [[A_CASTED12]], align 8
459 // CHECK1-NEXT: [[TMP72:%.*]] = load i16, i16* [[AA]], align 2
460 // CHECK1-NEXT: [[CONV15:%.*]] = bitcast i64* [[AA_CASTED14]] to i16*
461 // CHECK1-NEXT: store i16 [[TMP72]], i16* [[CONV15]], align 2
462 // CHECK1-NEXT: [[TMP73:%.*]] = load i64, i64* [[AA_CASTED14]], align 8
463 // CHECK1-NEXT: [[TMP74:%.*]] = load i32, i32* [[N_ADDR]], align 4
464 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP74]], 10
465 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
466 // CHECK1: omp_if.then:
467 // CHECK1-NEXT: [[TMP75:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0
468 // CHECK1-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64*
469 // CHECK1-NEXT: store i64 [[TMP71]], i64* [[TMP76]], align 8
470 // CHECK1-NEXT: [[TMP77:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0
471 // CHECK1-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64*
472 // CHECK1-NEXT: store i64 [[TMP71]], i64* [[TMP78]], align 8
473 // CHECK1-NEXT: [[TMP79:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 0
474 // CHECK1-NEXT: store i8* null, i8** [[TMP79]], align 8
475 // CHECK1-NEXT: [[TMP80:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 1
476 // CHECK1-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64*
477 // CHECK1-NEXT: store i64 [[TMP73]], i64* [[TMP81]], align 8
478 // CHECK1-NEXT: [[TMP82:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 1
479 // CHECK1-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64*
480 // CHECK1-NEXT: store i64 [[TMP73]], i64* [[TMP83]], align 8
481 // CHECK1-NEXT: [[TMP84:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 1
482 // CHECK1-NEXT: store i8* null, i8** [[TMP84]], align 8
483 // CHECK1-NEXT: [[TMP85:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0
484 // CHECK1-NEXT: [[TMP86:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0
485 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
486 // CHECK1-NEXT: [[TMP87:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120.region_id, i32 2, i8** [[TMP85]], i8** [[TMP86]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
487 // CHECK1-NEXT: [[TMP88:%.*]] = icmp ne i32 [[TMP87]], 0
488 // CHECK1-NEXT: br i1 [[TMP88]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
489 // CHECK1: omp_offload.failed20:
490 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i64 [[TMP71]], i64 [[TMP73]]) #[[ATTR3]]
491 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT21]]
492 // CHECK1: omp_offload.cont21:
493 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]]
494 // CHECK1: omp_if.else:
495 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i64 [[TMP71]], i64 [[TMP73]]) #[[ATTR3]]
496 // CHECK1-NEXT: br label [[OMP_IF_END]]
497 // CHECK1: omp_if.end:
498 // CHECK1-NEXT: [[TMP89:%.*]] = load i32, i32* [[N_ADDR]], align 4
499 // CHECK1-NEXT: store i32 [[TMP89]], i32* [[DOTCAPTURE_EXPR_22]], align 4
500 // CHECK1-NEXT: [[TMP90:%.*]] = load i32, i32* [[A]], align 4
501 // CHECK1-NEXT: [[CONV24:%.*]] = bitcast i64* [[A_CASTED23]] to i32*
502 // CHECK1-NEXT: store i32 [[TMP90]], i32* [[CONV24]], align 4
503 // CHECK1-NEXT: [[TMP91:%.*]] = load i64, i64* [[A_CASTED23]], align 8
504 // CHECK1-NEXT: [[TMP92:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_22]], align 4
505 // CHECK1-NEXT: [[CONV26:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED25]] to i32*
506 // CHECK1-NEXT: store i32 [[TMP92]], i32* [[CONV26]], align 4
507 // CHECK1-NEXT: [[TMP93:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED25]], align 8
508 // CHECK1-NEXT: [[TMP94:%.*]] = load i32, i32* [[N_ADDR]], align 4
509 // CHECK1-NEXT: [[CMP27:%.*]] = icmp sgt i32 [[TMP94]], 20
510 // CHECK1-NEXT: br i1 [[CMP27]], label [[OMP_IF_THEN28:%.*]], label [[OMP_IF_ELSE35:%.*]]
511 // CHECK1: omp_if.then28:
512 // CHECK1-NEXT: [[TMP95:%.*]] = mul nuw i64 [[TMP2]], 4
513 // CHECK1-NEXT: [[TMP96:%.*]] = mul nuw i64 5, [[TMP5]]
514 // CHECK1-NEXT: [[TMP97:%.*]] = mul nuw i64 [[TMP96]], 8
515 // CHECK1-NEXT: [[TMP98:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0
516 // CHECK1-NEXT: [[TMP99:%.*]] = bitcast i8** [[TMP98]] to i64*
517 // CHECK1-NEXT: store i64 [[TMP91]], i64* [[TMP99]], align 8
518 // CHECK1-NEXT: [[TMP100:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 0
519 // CHECK1-NEXT: [[TMP101:%.*]] = bitcast i8** [[TMP100]] to i64*
520 // CHECK1-NEXT: store i64 [[TMP91]], i64* [[TMP101]], align 8
521 // CHECK1-NEXT: [[TMP102:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
522 // CHECK1-NEXT: store i64 4, i64* [[TMP102]], align 8
523 // CHECK1-NEXT: [[TMP103:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 0
524 // CHECK1-NEXT: store i8* null, i8** [[TMP103]], align 8
525 // CHECK1-NEXT: [[TMP104:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 1
526 // CHECK1-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to [10 x float]**
527 // CHECK1-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP105]], align 8
528 // CHECK1-NEXT: [[TMP106:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 1
529 // CHECK1-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to [10 x float]**
530 // CHECK1-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP107]], align 8
531 // CHECK1-NEXT: [[TMP108:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
532 // CHECK1-NEXT: store i64 40, i64* [[TMP108]], align 8
533 // CHECK1-NEXT: [[TMP109:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 1
534 // CHECK1-NEXT: store i8* null, i8** [[TMP109]], align 8
535 // CHECK1-NEXT: [[TMP110:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 2
536 // CHECK1-NEXT: [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64*
537 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP111]], align 8
538 // CHECK1-NEXT: [[TMP112:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 2
539 // CHECK1-NEXT: [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64*
540 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP113]], align 8
541 // CHECK1-NEXT: [[TMP114:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
542 // CHECK1-NEXT: store i64 8, i64* [[TMP114]], align 8
543 // CHECK1-NEXT: [[TMP115:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 2
544 // CHECK1-NEXT: store i8* null, i8** [[TMP115]], align 8
545 // CHECK1-NEXT: [[TMP116:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 3
546 // CHECK1-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to float**
547 // CHECK1-NEXT: store float* [[VLA]], float** [[TMP117]], align 8
548 // CHECK1-NEXT: [[TMP118:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 3
549 // CHECK1-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to float**
550 // CHECK1-NEXT: store float* [[VLA]], float** [[TMP119]], align 8
551 // CHECK1-NEXT: [[TMP120:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
552 // CHECK1-NEXT: store i64 [[TMP95]], i64* [[TMP120]], align 8
553 // CHECK1-NEXT: [[TMP121:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 3
554 // CHECK1-NEXT: store i8* null, i8** [[TMP121]], align 8
555 // CHECK1-NEXT: [[TMP122:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 4
556 // CHECK1-NEXT: [[TMP123:%.*]] = bitcast i8** [[TMP122]] to [5 x [10 x double]]**
557 // CHECK1-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP123]], align 8
558 // CHECK1-NEXT: [[TMP124:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 4
559 // CHECK1-NEXT: [[TMP125:%.*]] = bitcast i8** [[TMP124]] to [5 x [10 x double]]**
560 // CHECK1-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP125]], align 8
561 // CHECK1-NEXT: [[TMP126:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
562 // CHECK1-NEXT: store i64 400, i64* [[TMP126]], align 8
563 // CHECK1-NEXT: [[TMP127:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 4
564 // CHECK1-NEXT: store i8* null, i8** [[TMP127]], align 8
565 // CHECK1-NEXT: [[TMP128:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 5
566 // CHECK1-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to i64*
567 // CHECK1-NEXT: store i64 5, i64* [[TMP129]], align 8
568 // CHECK1-NEXT: [[TMP130:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 5
569 // CHECK1-NEXT: [[TMP131:%.*]] = bitcast i8** [[TMP130]] to i64*
570 // CHECK1-NEXT: store i64 5, i64* [[TMP131]], align 8
571 // CHECK1-NEXT: [[TMP132:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 5
572 // CHECK1-NEXT: store i64 8, i64* [[TMP132]], align 8
573 // CHECK1-NEXT: [[TMP133:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 5
574 // CHECK1-NEXT: store i8* null, i8** [[TMP133]], align 8
575 // CHECK1-NEXT: [[TMP134:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 6
576 // CHECK1-NEXT: [[TMP135:%.*]] = bitcast i8** [[TMP134]] to i64*
577 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP135]], align 8
578 // CHECK1-NEXT: [[TMP136:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 6
579 // CHECK1-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64*
580 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP137]], align 8
581 // CHECK1-NEXT: [[TMP138:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 6
582 // CHECK1-NEXT: store i64 8, i64* [[TMP138]], align 8
583 // CHECK1-NEXT: [[TMP139:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 6
584 // CHECK1-NEXT: store i8* null, i8** [[TMP139]], align 8
585 // CHECK1-NEXT: [[TMP140:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 7
586 // CHECK1-NEXT: [[TMP141:%.*]] = bitcast i8** [[TMP140]] to double**
587 // CHECK1-NEXT: store double* [[VLA1]], double** [[TMP141]], align 8
588 // CHECK1-NEXT: [[TMP142:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 7
589 // CHECK1-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to double**
590 // CHECK1-NEXT: store double* [[VLA1]], double** [[TMP143]], align 8
591 // CHECK1-NEXT: [[TMP144:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7
592 // CHECK1-NEXT: store i64 [[TMP97]], i64* [[TMP144]], align 8
593 // CHECK1-NEXT: [[TMP145:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 7
594 // CHECK1-NEXT: store i8* null, i8** [[TMP145]], align 8
595 // CHECK1-NEXT: [[TMP146:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 8
596 // CHECK1-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to %struct.TT**
597 // CHECK1-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP147]], align 8
598 // CHECK1-NEXT: [[TMP148:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 8
599 // CHECK1-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to %struct.TT**
600 // CHECK1-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP149]], align 8
601 // CHECK1-NEXT: [[TMP150:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 8
602 // CHECK1-NEXT: store i64 16, i64* [[TMP150]], align 8
603 // CHECK1-NEXT: [[TMP151:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 8
604 // CHECK1-NEXT: store i8* null, i8** [[TMP151]], align 8
605 // CHECK1-NEXT: [[TMP152:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 9
606 // CHECK1-NEXT: [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i64*
607 // CHECK1-NEXT: store i64 [[TMP93]], i64* [[TMP153]], align 8
608 // CHECK1-NEXT: [[TMP154:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 9
609 // CHECK1-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i64*
610 // CHECK1-NEXT: store i64 [[TMP93]], i64* [[TMP155]], align 8
611 // CHECK1-NEXT: [[TMP156:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 9
612 // CHECK1-NEXT: store i64 4, i64* [[TMP156]], align 8
613 // CHECK1-NEXT: [[TMP157:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 9
614 // CHECK1-NEXT: store i8* null, i8** [[TMP157]], align 8
615 // CHECK1-NEXT: [[TMP158:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0
616 // CHECK1-NEXT: [[TMP159:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 0
617 // CHECK1-NEXT: [[TMP160:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
618 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
619 // CHECK1-NEXT: [[TMP161:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145.region_id, i32 10, i8** [[TMP158]], i8** [[TMP159]], i64* [[TMP160]], i64* getelementptr inbounds ([10 x i64], [10 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
620 // CHECK1-NEXT: [[TMP162:%.*]] = icmp ne i32 [[TMP161]], 0
621 // CHECK1-NEXT: br i1 [[TMP162]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]]
622 // CHECK1: omp_offload.failed33:
623 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i64 [[TMP91]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]], i64 [[TMP93]]) #[[ATTR3]]
624 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT34]]
625 // CHECK1: omp_offload.cont34:
626 // CHECK1-NEXT: br label [[OMP_IF_END36:%.*]]
627 // CHECK1: omp_if.else35:
628 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i64 [[TMP91]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]], i64 [[TMP93]]) #[[ATTR3]]
629 // CHECK1-NEXT: br label [[OMP_IF_END36]]
630 // CHECK1: omp_if.end36:
631 // CHECK1-NEXT: [[TMP163:%.*]] = load i32, i32* [[A]], align 4
632 // CHECK1-NEXT: [[TMP164:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
633 // CHECK1-NEXT: call void @llvm.stackrestore(i8* [[TMP164]])
634 // CHECK1-NEXT: ret i32 [[TMP163]]
635 //
636 //
637 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103
638 // CHECK1-SAME: (i64 [[AA:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]], i64 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR2:[0-9]+]] {
639 // CHECK1-NEXT: entry:
640 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
641 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
642 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8
643 // CHECK1-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
644 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
645 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
646 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
647 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8
648 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
649 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
650 // CHECK1-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32*
651 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV3]], align 8
652 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV4]], align 8
653 // CHECK1-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]])
654 // CHECK1-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 8
655 // CHECK1-NEXT: [[CONV5:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
656 // CHECK1-NEXT: store i16 [[TMP3]], i16* [[CONV5]], align 2
657 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8
658 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP4]])
659 // CHECK1-NEXT: ret void
660 //
661 //
662 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
663 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[AA:%.*]]) #[[ATTR2]] {
664 // CHECK1-NEXT: entry:
665 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
666 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
667 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
668 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
669 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
670 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
671 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
672 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
673 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
674 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
675 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
676 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
677 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
678 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
679 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
680 // CHECK1-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
681 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
682 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
683 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
684 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
685 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
686 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
687 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
688 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
689 // CHECK1: cond.true:
690 // CHECK1-NEXT: br label [[COND_END:%.*]]
691 // CHECK1: cond.false:
692 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
693 // CHECK1-NEXT: br label [[COND_END]]
694 // CHECK1: cond.end:
695 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
696 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
697 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
698 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
699 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
700 // CHECK1: omp.inner.for.cond:
701 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
702 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
703 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
704 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
705 // CHECK1: omp.inner.for.body:
706 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
707 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
708 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
709 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
710 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
711 // CHECK1: omp.body.continue:
712 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
713 // CHECK1: omp.inner.for.inc:
714 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
715 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
716 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
717 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
718 // CHECK1: omp.inner.for.end:
719 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
720 // CHECK1: omp.loop.exit:
721 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
722 // CHECK1-NEXT: ret void
723 //
724 //
725 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_privates_map.
726 // CHECK1-SAME: (%struct..kmp_privates.t* noalias [[TMP0:%.*]], i16** noalias [[TMP1:%.*]], [3 x i8*]** noalias [[TMP2:%.*]], [3 x i8*]** noalias [[TMP3:%.*]], [3 x i64]** noalias [[TMP4:%.*]]) #[[ATTR4:[0-9]+]] {
727 // CHECK1-NEXT: entry:
728 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 8
729 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i16**, align 8
730 // CHECK1-NEXT: [[DOTADDR2:%.*]] = alloca [3 x i8*]**, align 8
731 // CHECK1-NEXT: [[DOTADDR3:%.*]] = alloca [3 x i8*]**, align 8
732 // CHECK1-NEXT: [[DOTADDR4:%.*]] = alloca [3 x i64]**, align 8
733 // CHECK1-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 8
734 // CHECK1-NEXT: store i16** [[TMP1]], i16*** [[DOTADDR1]], align 8
735 // CHECK1-NEXT: store [3 x i8*]** [[TMP2]], [3 x i8*]*** [[DOTADDR2]], align 8
736 // CHECK1-NEXT: store [3 x i8*]** [[TMP3]], [3 x i8*]*** [[DOTADDR3]], align 8
737 // CHECK1-NEXT: store [3 x i64]** [[TMP4]], [3 x i64]*** [[DOTADDR4]], align 8
738 // CHECK1-NEXT: [[TMP5:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 8
739 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 0
740 // CHECK1-NEXT: [[TMP7:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR2]], align 8
741 // CHECK1-NEXT: store [3 x i8*]* [[TMP6]], [3 x i8*]** [[TMP7]], align 8
742 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 1
743 // CHECK1-NEXT: [[TMP9:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR3]], align 8
744 // CHECK1-NEXT: store [3 x i8*]* [[TMP8]], [3 x i8*]** [[TMP9]], align 8
745 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 2
746 // CHECK1-NEXT: [[TMP11:%.*]] = load [3 x i64]**, [3 x i64]*** [[DOTADDR4]], align 8
747 // CHECK1-NEXT: store [3 x i64]* [[TMP10]], [3 x i64]** [[TMP11]], align 8
748 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 3
749 // CHECK1-NEXT: [[TMP13:%.*]] = load i16**, i16*** [[DOTADDR1]], align 8
750 // CHECK1-NEXT: store i16* [[TMP12]], i16** [[TMP13]], align 8
751 // CHECK1-NEXT: ret void
752 //
753 //
754 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry.
755 // CHECK1-SAME: (i32 signext [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
756 // CHECK1-NEXT: entry:
757 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4
758 // CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8
759 // CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8
760 // CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8
761 // CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8
762 // CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon*, align 8
763 // CHECK1-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca i16*, align 8
764 // CHECK1-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca [3 x i8*]*, align 8
765 // CHECK1-NEXT: [[DOTFIRSTPRIV_PTR_ADDR2_I:%.*]] = alloca [3 x i8*]*, align 8
766 // CHECK1-NEXT: [[DOTFIRSTPRIV_PTR_ADDR3_I:%.*]] = alloca [3 x i64]*, align 8
767 // CHECK1-NEXT: [[AA_CASTED_I:%.*]] = alloca i64, align 8
768 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED_I:%.*]] = alloca i64, align 8
769 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED5_I:%.*]] = alloca i64, align 8
770 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4
771 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 8
772 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4
773 // CHECK1-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8
774 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4
775 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8
776 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0
777 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2
778 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0
779 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
780 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon*
781 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 1
782 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8*
783 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8*
784 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
785 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
786 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]])
787 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]])
788 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !21
789 // CHECK1-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !21
790 // CHECK1-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !21
791 // CHECK1-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !21
792 // CHECK1-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !21
793 // CHECK1-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !21
794 // CHECK1-NEXT: [[TMP12:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !21
795 // CHECK1-NEXT: [[TMP13:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !21
796 // CHECK1-NEXT: [[TMP14:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !21
797 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast void (i8*, ...)* [[TMP13]] to void (i8*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)*
798 // CHECK1-NEXT: call void [[TMP15]](i8* [[TMP14]], i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]]) #[[ATTR3]]
799 // CHECK1-NEXT: [[TMP16:%.*]] = load i16*, i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !21
800 // CHECK1-NEXT: [[TMP17:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias !21
801 // CHECK1-NEXT: [[TMP18:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 8, !noalias !21
802 // CHECK1-NEXT: [[TMP19:%.*]] = load [3 x i64]*, [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 8, !noalias !21
803 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP17]], i64 0, i64 0
804 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP18]], i64 0, i64 0
805 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[TMP19]], i64 0, i64 0
806 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP12]], i32 0, i32 1
807 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2
808 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP23]], align 4
809 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP24]], align 4
810 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) #[[ATTR3]]
811 // CHECK1-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP25]], i32 [[TMP26]], i32 0, i8* null, i32 0, i8* null) #[[ATTR3]]
812 // CHECK1-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
813 // CHECK1-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]]
814 // CHECK1: omp_offload.failed.i:
815 // CHECK1-NEXT: [[TMP29:%.*]] = load i16, i16* [[TMP16]], align 2
816 // CHECK1-NEXT: [[CONV_I:%.*]] = bitcast i64* [[AA_CASTED_I]] to i16*
817 // CHECK1-NEXT: store i16 [[TMP29]], i16* [[CONV_I]], align 2, !noalias !21
818 // CHECK1-NEXT: [[TMP30:%.*]] = load i64, i64* [[AA_CASTED_I]], align 8, !noalias !21
819 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP23]], align 4
820 // CHECK1-NEXT: [[CONV4_I:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED_I]] to i32*
821 // CHECK1-NEXT: store i32 [[TMP31]], i32* [[CONV4_I]], align 4, !noalias !21
822 // CHECK1-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED_I]], align 8, !noalias !21
823 // CHECK1-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP24]], align 4
824 // CHECK1-NEXT: [[CONV6_I:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED5_I]] to i32*
825 // CHECK1-NEXT: store i32 [[TMP33]], i32* [[CONV6_I]], align 4, !noalias !21
826 // CHECK1-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED5_I]], align 8, !noalias !21
827 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103(i64 [[TMP30]], i64 [[TMP32]], i64 [[TMP34]]) #[[ATTR3]]
828 // CHECK1-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]]
829 // CHECK1: .omp_outlined..1.exit:
830 // CHECK1-NEXT: ret i32 0
831 //
832 //
833 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107
834 // CHECK1-SAME: (i64 [[A:%.*]]) #[[ATTR2]] {
835 // CHECK1-NEXT: entry:
836 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
837 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
838 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
839 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
840 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
841 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32*
842 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV1]], align 4
843 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
844 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP1]])
845 // CHECK1-NEXT: ret void
846 //
847 //
848 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
849 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]]) #[[ATTR2]] {
850 // CHECK1-NEXT: entry:
851 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
852 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
853 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
854 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
855 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
856 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
857 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
858 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
859 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
860 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
861 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
862 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
863 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
864 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
865 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
866 // CHECK1-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
867 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
868 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
869 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
870 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
871 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
872 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
873 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
874 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
875 // CHECK1: cond.true:
876 // CHECK1-NEXT: br label [[COND_END:%.*]]
877 // CHECK1: cond.false:
878 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
879 // CHECK1-NEXT: br label [[COND_END]]
880 // CHECK1: cond.end:
881 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
882 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
883 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
884 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
885 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
886 // CHECK1: omp.inner.for.cond:
887 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
888 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
889 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
890 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
891 // CHECK1: omp.inner.for.body:
892 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
893 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
894 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
895 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
896 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 8
897 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
898 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[CONV]], align 8
899 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
900 // CHECK1: omp.body.continue:
901 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
902 // CHECK1: omp.inner.for.inc:
903 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
904 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
905 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
906 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
907 // CHECK1: omp.inner.for.end:
908 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
909 // CHECK1: omp.loop.exit:
910 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
911 // CHECK1-NEXT: ret void
912 //
913 //
914 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113
915 // CHECK1-SAME: (i64 [[AA:%.*]]) #[[ATTR2]] {
916 // CHECK1-NEXT: entry:
917 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
918 // CHECK1-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
919 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
920 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
921 // CHECK1-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 8
922 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
923 // CHECK1-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2
924 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[AA_CASTED]], align 8
925 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP1]])
926 // CHECK1-NEXT: ret void
927 //
928 //
929 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
930 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[AA:%.*]]) #[[ATTR2]] {
931 // CHECK1-NEXT: entry:
932 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
933 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
934 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
935 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
936 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
937 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
938 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
939 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
940 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
941 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
942 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
943 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
944 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
945 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
946 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
947 // CHECK1-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
948 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
949 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
950 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
951 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
952 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
953 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
954 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
955 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
956 // CHECK1: cond.true:
957 // CHECK1-NEXT: br label [[COND_END:%.*]]
958 // CHECK1: cond.false:
959 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
960 // CHECK1-NEXT: br label [[COND_END]]
961 // CHECK1: cond.end:
962 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
963 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
964 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
965 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
966 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
967 // CHECK1: omp.inner.for.cond:
968 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
969 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
970 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
971 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
972 // CHECK1: omp.inner.for.body:
973 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
974 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
975 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
976 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
977 // CHECK1-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 8
978 // CHECK1-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32
979 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1
980 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16
981 // CHECK1-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 8
982 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
983 // CHECK1: omp.body.continue:
984 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
985 // CHECK1: omp.inner.for.inc:
986 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
987 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1
988 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
989 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
990 // CHECK1: omp.inner.for.end:
991 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
992 // CHECK1: omp.loop.exit:
993 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
994 // CHECK1-NEXT: ret void
995 //
996 //
997 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120
998 // CHECK1-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR2]] {
999 // CHECK1-NEXT: entry:
1000 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
1001 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
1002 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
1003 // CHECK1-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
1004 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
1005 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
1006 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
1007 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
1008 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
1009 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
1010 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV2]], align 4
1011 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
1012 // CHECK1-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 8
1013 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
1014 // CHECK1-NEXT: store i16 [[TMP2]], i16* [[CONV3]], align 2
1015 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8
1016 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]])
1017 // CHECK1-NEXT: ret void
1018 //
1019 //
1020 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6
1021 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR2]] {
1022 // CHECK1-NEXT: entry:
1023 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1024 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1025 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
1026 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
1027 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1028 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1029 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1030 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1031 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1032 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1033 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1034 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1035 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1036 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
1037 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
1038 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
1039 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
1040 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1041 // CHECK1-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
1042 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1043 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1044 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1045 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1046 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1047 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1048 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
1049 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1050 // CHECK1: cond.true:
1051 // CHECK1-NEXT: br label [[COND_END:%.*]]
1052 // CHECK1: cond.false:
1053 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1054 // CHECK1-NEXT: br label [[COND_END]]
1055 // CHECK1: cond.end:
1056 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1057 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1058 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1059 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1060 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1061 // CHECK1: omp.inner.for.cond:
1062 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1063 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1064 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1065 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1066 // CHECK1: omp.inner.for.body:
1067 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1068 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
1069 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1070 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1071 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 8
1072 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1
1073 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 8
1074 // CHECK1-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV1]], align 8
1075 // CHECK1-NEXT: [[CONV4:%.*]] = sext i16 [[TMP9]] to i32
1076 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1
1077 // CHECK1-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
1078 // CHECK1-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 8
1079 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1080 // CHECK1: omp.body.continue:
1081 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1082 // CHECK1: omp.inner.for.inc:
1083 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1084 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP10]], 1
1085 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
1086 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1087 // CHECK1: omp.inner.for.end:
1088 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1089 // CHECK1: omp.loop.exit:
1090 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1091 // CHECK1-NEXT: ret void
1092 //
1093 //
1094 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145
1095 // CHECK1-SAME: (i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
1096 // CHECK1-NEXT: entry:
1097 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
1098 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8
1099 // CHECK1-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1100 // CHECK1-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8
1101 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8
1102 // CHECK1-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
1103 // CHECK1-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8
1104 // CHECK1-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8
1105 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8
1106 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1107 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
1108 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
1109 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
1110 // CHECK1-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8
1111 // CHECK1-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1112 // CHECK1-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8
1113 // CHECK1-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8
1114 // CHECK1-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
1115 // CHECK1-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8
1116 // CHECK1-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8
1117 // CHECK1-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8
1118 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1119 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
1120 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8
1121 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1122 // CHECK1-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8
1123 // CHECK1-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8
1124 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
1125 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8
1126 // CHECK1-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8
1127 // CHECK1-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8
1128 // CHECK1-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
1129 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 8
1130 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32*
1131 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[CONV6]], align 4
1132 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, i64* [[A_CASTED]], align 8
1133 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV5]], align 8
1134 // CHECK1-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
1135 // CHECK1-NEXT: store i32 [[TMP10]], i32* [[CONV7]], align 4
1136 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
1137 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [10 x float]*, i64, float*, [5 x [10 x double]]*, i64, i64, double*, %struct.TT*, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], [10 x float]* [[TMP0]], i64 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i64 [[TMP4]], i64 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i64 [[TMP11]])
1138 // CHECK1-NEXT: ret void
1139 //
1140 //
1141 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9
1142 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
1143 // CHECK1-NEXT: entry:
1144 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1145 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1146 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
1147 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8
1148 // CHECK1-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1149 // CHECK1-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8
1150 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8
1151 // CHECK1-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
1152 // CHECK1-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8
1153 // CHECK1-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8
1154 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8
1155 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1156 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1157 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1158 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1159 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1160 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1161 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1162 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1163 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1164 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1165 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
1166 // CHECK1-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8
1167 // CHECK1-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1168 // CHECK1-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8
1169 // CHECK1-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8
1170 // CHECK1-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
1171 // CHECK1-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8
1172 // CHECK1-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8
1173 // CHECK1-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8
1174 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1175 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
1176 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8
1177 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1178 // CHECK1-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8
1179 // CHECK1-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8
1180 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
1181 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8
1182 // CHECK1-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8
1183 // CHECK1-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8
1184 // CHECK1-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
1185 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1186 // CHECK1-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
1187 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1188 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1189 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV5]], align 8
1190 // CHECK1-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1191 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
1192 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]])
1193 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1194 // CHECK1: omp.dispatch.cond:
1195 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1196 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9
1197 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1198 // CHECK1: cond.true:
1199 // CHECK1-NEXT: br label [[COND_END:%.*]]
1200 // CHECK1: cond.false:
1201 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1202 // CHECK1-NEXT: br label [[COND_END]]
1203 // CHECK1: cond.end:
1204 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1205 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1206 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1207 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
1208 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1209 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1210 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
1211 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1212 // CHECK1: omp.dispatch.body:
1213 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1214 // CHECK1: omp.inner.for.cond:
1215 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
1216 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
1217 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
1218 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1219 // CHECK1: omp.inner.for.body:
1220 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
1221 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
1222 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1223 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
1224 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !22
1225 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
1226 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[CONV]], align 8, !llvm.access.group !22
1227 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i64 0, i64 2
1228 // CHECK1-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !22
1229 // CHECK1-NEXT: [[CONV9:%.*]] = fpext float [[TMP20]] to double
1230 // CHECK1-NEXT: [[ADD10:%.*]] = fadd double [[CONV9]], 1.000000e+00
1231 // CHECK1-NEXT: [[CONV11:%.*]] = fptrunc double [[ADD10]] to float
1232 // CHECK1-NEXT: store float [[CONV11]], float* [[ARRAYIDX]], align 4, !llvm.access.group !22
1233 // CHECK1-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 3
1234 // CHECK1-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX12]], align 4, !llvm.access.group !22
1235 // CHECK1-NEXT: [[CONV13:%.*]] = fpext float [[TMP21]] to double
1236 // CHECK1-NEXT: [[ADD14:%.*]] = fadd double [[CONV13]], 1.000000e+00
1237 // CHECK1-NEXT: [[CONV15:%.*]] = fptrunc double [[ADD14]] to float
1238 // CHECK1-NEXT: store float [[CONV15]], float* [[ARRAYIDX12]], align 4, !llvm.access.group !22
1239 // CHECK1-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i64 0, i64 1
1240 // CHECK1-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX16]], i64 0, i64 2
1241 // CHECK1-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX17]], align 8, !llvm.access.group !22
1242 // CHECK1-NEXT: [[ADD18:%.*]] = fadd double [[TMP22]], 1.000000e+00
1243 // CHECK1-NEXT: store double [[ADD18]], double* [[ARRAYIDX17]], align 8, !llvm.access.group !22
1244 // CHECK1-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP5]]
1245 // CHECK1-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds double, double* [[TMP6]], i64 [[TMP23]]
1246 // CHECK1-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX19]], i64 3
1247 // CHECK1-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX20]], align 8, !llvm.access.group !22
1248 // CHECK1-NEXT: [[ADD21:%.*]] = fadd double [[TMP24]], 1.000000e+00
1249 // CHECK1-NEXT: store double [[ADD21]], double* [[ARRAYIDX20]], align 8, !llvm.access.group !22
1250 // CHECK1-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0
1251 // CHECK1-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8, !llvm.access.group !22
1252 // CHECK1-NEXT: [[ADD22:%.*]] = add nsw i64 [[TMP25]], 1
1253 // CHECK1-NEXT: store i64 [[ADD22]], i64* [[X]], align 8, !llvm.access.group !22
1254 // CHECK1-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1
1255 // CHECK1-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8, !llvm.access.group !22
1256 // CHECK1-NEXT: [[CONV23:%.*]] = sext i8 [[TMP26]] to i32
1257 // CHECK1-NEXT: [[ADD24:%.*]] = add nsw i32 [[CONV23]], 1
1258 // CHECK1-NEXT: [[CONV25:%.*]] = trunc i32 [[ADD24]] to i8
1259 // CHECK1-NEXT: store i8 [[CONV25]], i8* [[Y]], align 8, !llvm.access.group !22
1260 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1261 // CHECK1: omp.body.continue:
1262 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1263 // CHECK1: omp.inner.for.inc:
1264 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
1265 // CHECK1-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP27]], 1
1266 // CHECK1-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
1267 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
1268 // CHECK1: omp.inner.for.end:
1269 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1270 // CHECK1: omp.dispatch.inc:
1271 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1272 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1273 // CHECK1-NEXT: [[ADD27:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
1274 // CHECK1-NEXT: store i32 [[ADD27]], i32* [[DOTOMP_LB]], align 4
1275 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1276 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1277 // CHECK1-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
1278 // CHECK1-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_UB]], align 4
1279 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
1280 // CHECK1: omp.dispatch.end:
1281 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]])
1282 // CHECK1-NEXT: ret void
1283 //
1284 //
1285 // CHECK1-LABEL: define {{[^@]+}}@_Z3bari
1286 // CHECK1-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] {
1287 // CHECK1-NEXT: entry:
1288 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1289 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4
1290 // CHECK1-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8
1291 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1292 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4
1293 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
1294 // CHECK1-NEXT: [[CALL:%.*]] = call signext i32 @_Z3fooi(i32 signext [[TMP0]])
1295 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
1296 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
1297 // CHECK1-NEXT: store i32 [[ADD]], i32* [[A]], align 4
1298 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
1299 // CHECK1-NEXT: [[CALL1:%.*]] = call signext i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 8 dereferenceable(8) [[S]], i32 signext [[TMP2]])
1300 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4
1301 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
1302 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[A]], align 4
1303 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
1304 // CHECK1-NEXT: [[CALL3:%.*]] = call signext i32 @_ZL7fstatici(i32 signext [[TMP4]])
1305 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4
1306 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
1307 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[A]], align 4
1308 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
1309 // CHECK1-NEXT: [[CALL5:%.*]] = call signext i32 @_Z9ftemplateIiET_i(i32 signext [[TMP6]])
1310 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4
1311 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]]
1312 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[A]], align 4
1313 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4
1314 // CHECK1-NEXT: ret i32 [[TMP8]]
1315 //
1316 //
1317 // CHECK1-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
1318 // CHECK1-SAME: (%struct.S1* nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 signext [[N:%.*]]) #[[ATTR0]] comdat align 2 {
1319 // CHECK1-NEXT: entry:
1320 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
1321 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1322 // CHECK1-NEXT: [[B:%.*]] = alloca i32, align 4
1323 // CHECK1-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
1324 // CHECK1-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
1325 // CHECK1-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8
1326 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
1327 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
1328 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
1329 // CHECK1-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8
1330 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1331 // CHECK1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
1332 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1333 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
1334 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
1335 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
1336 // CHECK1-NEXT: store i32 [[ADD]], i32* [[B]], align 4
1337 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
1338 // CHECK1-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
1339 // CHECK1-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave()
1340 // CHECK1-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8
1341 // CHECK1-NEXT: [[TMP4:%.*]] = mul nuw i64 2, [[TMP2]]
1342 // CHECK1-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP4]], align 2
1343 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8
1344 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[B]], align 4
1345 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[B_CASTED]] to i32*
1346 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV]], align 4
1347 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8
1348 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[N_ADDR]], align 4
1349 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 60
1350 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1351 // CHECK1: omp_if.then:
1352 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
1353 // CHECK1-NEXT: [[TMP8:%.*]] = mul nuw i64 2, [[TMP2]]
1354 // CHECK1-NEXT: [[TMP9:%.*]] = mul nuw i64 [[TMP8]], 2
1355 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1356 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to %struct.S1**
1357 // CHECK1-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP11]], align 8
1358 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1359 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to double**
1360 // CHECK1-NEXT: store double* [[A]], double** [[TMP13]], align 8
1361 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
1362 // CHECK1-NEXT: store i64 8, i64* [[TMP14]], align 8
1363 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1364 // CHECK1-NEXT: store i8* null, i8** [[TMP15]], align 8
1365 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1366 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
1367 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP17]], align 8
1368 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1369 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
1370 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP19]], align 8
1371 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
1372 // CHECK1-NEXT: store i64 4, i64* [[TMP20]], align 8
1373 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1374 // CHECK1-NEXT: store i8* null, i8** [[TMP21]], align 8
1375 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1376 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
1377 // CHECK1-NEXT: store i64 2, i64* [[TMP23]], align 8
1378 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1379 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
1380 // CHECK1-NEXT: store i64 2, i64* [[TMP25]], align 8
1381 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
1382 // CHECK1-NEXT: store i64 8, i64* [[TMP26]], align 8
1383 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1384 // CHECK1-NEXT: store i8* null, i8** [[TMP27]], align 8
1385 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1386 // CHECK1-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64*
1387 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP29]], align 8
1388 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1389 // CHECK1-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64*
1390 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP31]], align 8
1391 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
1392 // CHECK1-NEXT: store i64 8, i64* [[TMP32]], align 8
1393 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1394 // CHECK1-NEXT: store i8* null, i8** [[TMP33]], align 8
1395 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1396 // CHECK1-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i16**
1397 // CHECK1-NEXT: store i16* [[VLA]], i16** [[TMP35]], align 8
1398 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1399 // CHECK1-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i16**
1400 // CHECK1-NEXT: store i16* [[VLA]], i16** [[TMP37]], align 8
1401 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
1402 // CHECK1-NEXT: store i64 [[TMP9]], i64* [[TMP38]], align 8
1403 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
1404 // CHECK1-NEXT: store i8* null, i8** [[TMP39]], align 8
1405 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1406 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1407 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
1408 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
1409 // CHECK1-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218.region_id, i32 5, i8** [[TMP40]], i8** [[TMP41]], i64* [[TMP42]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1410 // CHECK1-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
1411 // CHECK1-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1412 // CHECK1: omp_offload.failed:
1413 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]]
1414 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
1415 // CHECK1: omp_offload.cont:
1416 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]]
1417 // CHECK1: omp_if.else:
1418 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]]
1419 // CHECK1-NEXT: br label [[OMP_IF_END]]
1420 // CHECK1: omp_if.end:
1421 // CHECK1-NEXT: [[TMP45:%.*]] = mul nsw i64 1, [[TMP2]]
1422 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i64 [[TMP45]]
1423 // CHECK1-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1
1424 // CHECK1-NEXT: [[TMP46:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2
1425 // CHECK1-NEXT: [[CONV3:%.*]] = sext i16 [[TMP46]] to i32
1426 // CHECK1-NEXT: [[TMP47:%.*]] = load i32, i32* [[B]], align 4
1427 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], [[TMP47]]
1428 // CHECK1-NEXT: [[TMP48:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
1429 // CHECK1-NEXT: call void @llvm.stackrestore(i8* [[TMP48]])
1430 // CHECK1-NEXT: ret i32 [[ADD4]]
1431 //
1432 //
1433 // CHECK1-LABEL: define {{[^@]+}}@_ZL7fstatici
1434 // CHECK1-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] {
1435 // CHECK1-NEXT: entry:
1436 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1437 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4
1438 // CHECK1-NEXT: [[AA:%.*]] = alloca i16, align 2
1439 // CHECK1-NEXT: [[AAA:%.*]] = alloca i8, align 1
1440 // CHECK1-NEXT: [[B:%.*]] = alloca [10 x i32], align 4
1441 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1442 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
1443 // CHECK1-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
1444 // CHECK1-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8
1445 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
1446 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
1447 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
1448 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1449 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1450 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
1451 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4
1452 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1453 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4
1454 // CHECK1-NEXT: store i16 0, i16* [[AA]], align 2
1455 // CHECK1-NEXT: store i8 0, i8* [[AAA]], align 1
1456 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
1457 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1458 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
1459 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[N_CASTED]], align 8
1460 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4
1461 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32*
1462 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
1463 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, i64* [[A_CASTED]], align 8
1464 // CHECK1-NEXT: [[TMP4:%.*]] = load i16, i16* [[AA]], align 2
1465 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
1466 // CHECK1-NEXT: store i16 [[TMP4]], i16* [[CONV2]], align 2
1467 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[AA_CASTED]], align 8
1468 // CHECK1-NEXT: [[TMP6:%.*]] = load i8, i8* [[AAA]], align 1
1469 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_CASTED]] to i8*
1470 // CHECK1-NEXT: store i8 [[TMP6]], i8* [[CONV3]], align 1
1471 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[AAA_CASTED]], align 8
1472 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[N_ADDR]], align 4
1473 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 50
1474 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1475 // CHECK1: omp_if.then:
1476 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1477 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
1478 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP10]], align 8
1479 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1480 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
1481 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP12]], align 8
1482 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1483 // CHECK1-NEXT: store i8* null, i8** [[TMP13]], align 8
1484 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1485 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
1486 // CHECK1-NEXT: store i64 [[TMP3]], i64* [[TMP15]], align 8
1487 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1488 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
1489 // CHECK1-NEXT: store i64 [[TMP3]], i64* [[TMP17]], align 8
1490 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1491 // CHECK1-NEXT: store i8* null, i8** [[TMP18]], align 8
1492 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1493 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64*
1494 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP20]], align 8
1495 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1496 // CHECK1-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i64*
1497 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8
1498 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1499 // CHECK1-NEXT: store i8* null, i8** [[TMP23]], align 8
1500 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1501 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
1502 // CHECK1-NEXT: store i64 [[TMP7]], i64* [[TMP25]], align 8
1503 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1504 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
1505 // CHECK1-NEXT: store i64 [[TMP7]], i64* [[TMP27]], align 8
1506 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1507 // CHECK1-NEXT: store i8* null, i8** [[TMP28]], align 8
1508 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1509 // CHECK1-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [10 x i32]**
1510 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP30]], align 8
1511 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1512 // CHECK1-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to [10 x i32]**
1513 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP32]], align 8
1514 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
1515 // CHECK1-NEXT: store i8* null, i8** [[TMP33]], align 8
1516 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1517 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1518 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[A]], align 4
1519 // CHECK1-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4
1520 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4
1521 // CHECK1-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_4]], align 4
1522 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1523 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1524 // CHECK1-NEXT: [[SUB:%.*]] = sub i32 [[TMP38]], [[TMP39]]
1525 // CHECK1-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1
1526 // CHECK1-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1
1527 // CHECK1-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
1528 // CHECK1-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1
1529 // CHECK1-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4
1530 // CHECK1-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
1531 // CHECK1-NEXT: [[ADD8:%.*]] = add i32 [[TMP40]], 1
1532 // CHECK1-NEXT: [[TMP41:%.*]] = zext i32 [[ADD8]] to i64
1533 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP41]])
1534 // CHECK1-NEXT: [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1535 // CHECK1-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
1536 // CHECK1-NEXT: br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1537 // CHECK1: omp_offload.failed:
1538 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], i64 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]]
1539 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
1540 // CHECK1: omp_offload.cont:
1541 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]]
1542 // CHECK1: omp_if.else:
1543 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], i64 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]]
1544 // CHECK1-NEXT: br label [[OMP_IF_END]]
1545 // CHECK1: omp_if.end:
1546 // CHECK1-NEXT: [[TMP44:%.*]] = load i32, i32* [[A]], align 4
1547 // CHECK1-NEXT: ret i32 [[TMP44]]
1548 //
1549 //
1550 // CHECK1-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
1551 // CHECK1-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] comdat {
1552 // CHECK1-NEXT: entry:
1553 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1554 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4
1555 // CHECK1-NEXT: [[AA:%.*]] = alloca i16, align 2
1556 // CHECK1-NEXT: [[B:%.*]] = alloca [10 x i32], align 4
1557 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
1558 // CHECK1-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
1559 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
1560 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
1561 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
1562 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1563 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1564 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4
1565 // CHECK1-NEXT: store i16 0, i16* [[AA]], align 2
1566 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4
1567 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32*
1568 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
1569 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
1570 // CHECK1-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2
1571 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
1572 // CHECK1-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2
1573 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8
1574 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
1575 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40
1576 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1577 // CHECK1: omp_if.then:
1578 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1579 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
1580 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP6]], align 8
1581 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1582 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
1583 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8
1584 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1585 // CHECK1-NEXT: store i8* null, i8** [[TMP9]], align 8
1586 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1587 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64*
1588 // CHECK1-NEXT: store i64 [[TMP3]], i64* [[TMP11]], align 8
1589 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1590 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
1591 // CHECK1-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8
1592 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1593 // CHECK1-NEXT: store i8* null, i8** [[TMP14]], align 8
1594 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1595 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]**
1596 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 8
1597 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1598 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]**
1599 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 8
1600 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1601 // CHECK1-NEXT: store i8* null, i8** [[TMP19]], align 8
1602 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1603 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1604 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
1605 // CHECK1-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.17, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.18, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1606 // CHECK1-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
1607 // CHECK1-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1608 // CHECK1: omp_offload.failed:
1609 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]]
1610 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
1611 // CHECK1: omp_offload.cont:
1612 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]]
1613 // CHECK1: omp_if.else:
1614 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]]
1615 // CHECK1-NEXT: br label [[OMP_IF_END]]
1616 // CHECK1: omp_if.end:
1617 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4
1618 // CHECK1-NEXT: ret i32 [[TMP24]]
1619 //
1620 //
1621 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218
1622 // CHECK1-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] {
1623 // CHECK1-NEXT: entry:
1624 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
1625 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8
1626 // CHECK1-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1627 // CHECK1-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
1628 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8
1629 // CHECK1-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8
1630 // CHECK1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
1631 // CHECK1-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8
1632 // CHECK1-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1633 // CHECK1-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
1634 // CHECK1-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8
1635 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
1636 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
1637 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1638 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
1639 // CHECK1-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8
1640 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
1641 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i32*
1642 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
1643 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[B_CASTED]], align 8
1644 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64, i64, i64, i16*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i64 [[TMP5]], i64 [[TMP1]], i64 [[TMP2]], i16* [[TMP3]])
1645 // CHECK1-NEXT: ret void
1646 //
1647 //
1648 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11
1649 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] {
1650 // CHECK1-NEXT: entry:
1651 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1652 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1653 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
1654 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8
1655 // CHECK1-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1656 // CHECK1-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
1657 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8
1658 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1659 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1660 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1661 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1662 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1663 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1664 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1665 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1666 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1667 // CHECK1-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
1668 // CHECK1-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8
1669 // CHECK1-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1670 // CHECK1-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
1671 // CHECK1-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8
1672 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
1673 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
1674 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1675 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
1676 // CHECK1-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8
1677 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1678 // CHECK1-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
1679 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1680 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1681 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1682 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
1683 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1684 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1685 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9
1686 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1687 // CHECK1: cond.true:
1688 // CHECK1-NEXT: br label [[COND_END:%.*]]
1689 // CHECK1: cond.false:
1690 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1691 // CHECK1-NEXT: br label [[COND_END]]
1692 // CHECK1: cond.end:
1693 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
1694 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1695 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1696 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1697 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1698 // CHECK1: omp.inner.for.cond:
1699 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1700 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1701 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1702 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1703 // CHECK1: omp.inner.for.body:
1704 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1705 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1706 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1707 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1708 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
1709 // CHECK1-NEXT: [[CONV4:%.*]] = sitofp i32 [[TMP12]] to double
1710 // CHECK1-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.500000e+00
1711 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
1712 // CHECK1-NEXT: store double [[ADD5]], double* [[A]], align 8
1713 // CHECK1-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0
1714 // CHECK1-NEXT: [[TMP13:%.*]] = load double, double* [[A6]], align 8
1715 // CHECK1-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00
1716 // CHECK1-NEXT: store double [[INC]], double* [[A6]], align 8
1717 // CHECK1-NEXT: [[CONV7:%.*]] = fptosi double [[INC]] to i16
1718 // CHECK1-NEXT: [[TMP14:%.*]] = mul nsw i64 1, [[TMP2]]
1719 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i64 [[TMP14]]
1720 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1
1721 // CHECK1-NEXT: store i16 [[CONV7]], i16* [[ARRAYIDX8]], align 2
1722 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1723 // CHECK1: omp.body.continue:
1724 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1725 // CHECK1: omp.inner.for.inc:
1726 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1727 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1
1728 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
1729 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1730 // CHECK1: omp.inner.for.end:
1731 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1732 // CHECK1: omp.loop.exit:
1733 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
1734 // CHECK1-NEXT: ret void
1735 //
1736 //
1737 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200
1738 // CHECK1-SAME: (i64 [[N:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
1739 // CHECK1-NEXT: entry:
1740 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1741 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
1742 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
1743 // CHECK1-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8
1744 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
1745 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1746 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
1747 // CHECK1-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
1748 // CHECK1-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8
1749 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1750 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
1751 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
1752 // CHECK1-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8
1753 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
1754 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1755 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32*
1756 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
1757 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8*
1758 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
1759 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
1760 // CHECK1-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1761 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV4]], align 4
1762 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8
1763 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8
1764 // CHECK1-NEXT: [[CONV5:%.*]] = bitcast i64* [[A_CASTED]] to i32*
1765 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV5]], align 4
1766 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8
1767 // CHECK1-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV2]], align 8
1768 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
1769 // CHECK1-NEXT: store i16 [[TMP5]], i16* [[CONV6]], align 2
1770 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[AA_CASTED]], align 8
1771 // CHECK1-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV3]], align 8
1772 // CHECK1-NEXT: [[CONV7:%.*]] = bitcast i64* [[AAA_CASTED]] to i8*
1773 // CHECK1-NEXT: store i8 [[TMP7]], i8* [[CONV7]], align 1
1774 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[AAA_CASTED]], align 8
1775 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]], [10 x i32]* [[TMP0]])
1776 // CHECK1-NEXT: ret void
1777 //
1778 //
1779 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..13
1780 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
1781 // CHECK1-NEXT: entry:
1782 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1783 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1784 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1785 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
1786 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
1787 // CHECK1-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8
1788 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
1789 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1790 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1791 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1792 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
1793 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4
1794 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1795 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1796 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1797 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1798 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1799 // CHECK1-NEXT: [[I8:%.*]] = alloca i32, align 4
1800 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1801 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1802 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1803 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
1804 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
1805 // CHECK1-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8
1806 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
1807 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1808 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32*
1809 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
1810 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8*
1811 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
1812 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 8
1813 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1814 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
1815 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_4]], align 4
1816 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1817 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1818 // CHECK1-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]]
1819 // CHECK1-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1
1820 // CHECK1-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1
1821 // CHECK1-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
1822 // CHECK1-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1
1823 // CHECK1-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4
1824 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1825 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[I]], align 4
1826 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1827 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1828 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]]
1829 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1830 // CHECK1: omp.precond.then:
1831 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1832 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
1833 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
1834 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1835 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1836 // CHECK1-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1837 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
1838 // CHECK1-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1839 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1840 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
1841 // CHECK1-NEXT: [[CMP9:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]]
1842 // CHECK1-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1843 // CHECK1: cond.true:
1844 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
1845 // CHECK1-NEXT: br label [[COND_END:%.*]]
1846 // CHECK1: cond.false:
1847 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1848 // CHECK1-NEXT: br label [[COND_END]]
1849 // CHECK1: cond.end:
1850 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
1851 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1852 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1853 // CHECK1-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
1854 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1855 // CHECK1: omp.inner.for.cond:
1856 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1857 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1858 // CHECK1-NEXT: [[ADD10:%.*]] = add i32 [[TMP17]], 1
1859 // CHECK1-NEXT: [[CMP11:%.*]] = icmp ult i32 [[TMP16]], [[ADD10]]
1860 // CHECK1-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1861 // CHECK1: omp.inner.for.body:
1862 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1863 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1864 // CHECK1-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1
1865 // CHECK1-NEXT: [[ADD12:%.*]] = add i32 [[TMP18]], [[MUL]]
1866 // CHECK1-NEXT: store i32 [[ADD12]], i32* [[I8]], align 4
1867 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 8
1868 // CHECK1-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP20]], 1
1869 // CHECK1-NEXT: store i32 [[ADD13]], i32* [[CONV1]], align 8
1870 // CHECK1-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV2]], align 8
1871 // CHECK1-NEXT: [[CONV14:%.*]] = sext i16 [[TMP21]] to i32
1872 // CHECK1-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1
1873 // CHECK1-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i16
1874 // CHECK1-NEXT: store i16 [[CONV16]], i16* [[CONV2]], align 8
1875 // CHECK1-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV3]], align 8
1876 // CHECK1-NEXT: [[CONV17:%.*]] = sext i8 [[TMP22]] to i32
1877 // CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[CONV17]], 1
1878 // CHECK1-NEXT: [[CONV19:%.*]] = trunc i32 [[ADD18]] to i8
1879 // CHECK1-NEXT: store i8 [[CONV19]], i8* [[CONV3]], align 8
1880 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2
1881 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
1882 // CHECK1-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP23]], 1
1883 // CHECK1-NEXT: store i32 [[ADD20]], i32* [[ARRAYIDX]], align 4
1884 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1885 // CHECK1: omp.body.continue:
1886 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1887 // CHECK1: omp.inner.for.inc:
1888 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1889 // CHECK1-NEXT: [[ADD21:%.*]] = add i32 [[TMP24]], 1
1890 // CHECK1-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4
1891 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1892 // CHECK1: omp.inner.for.end:
1893 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1894 // CHECK1: omp.loop.exit:
1895 // CHECK1-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1896 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
1897 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
1898 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
1899 // CHECK1: omp.precond.end:
1900 // CHECK1-NEXT: ret void
1901 //
1902 //
1903 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183
1904 // CHECK1-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
1905 // CHECK1-NEXT: entry:
1906 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
1907 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
1908 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
1909 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
1910 // CHECK1-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
1911 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
1912 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
1913 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
1914 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
1915 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
1916 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
1917 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
1918 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
1919 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV2]], align 4
1920 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8
1921 // CHECK1-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 8
1922 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
1923 // CHECK1-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2
1924 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8
1925 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..16 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], [10 x i32]* [[TMP0]])
1926 // CHECK1-NEXT: ret void
1927 //
1928 //
1929 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..16
1930 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
1931 // CHECK1-NEXT: entry:
1932 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1933 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1934 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
1935 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
1936 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
1937 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1938 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1939 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1940 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1941 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1942 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1943 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1944 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1945 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1946 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
1947 // CHECK1-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
1948 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
1949 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
1950 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
1951 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
1952 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1953 // CHECK1-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
1954 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1955 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1956 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1957 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1958 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1959 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1960 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
1961 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1962 // CHECK1: cond.true:
1963 // CHECK1-NEXT: br label [[COND_END:%.*]]
1964 // CHECK1: cond.false:
1965 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1966 // CHECK1-NEXT: br label [[COND_END]]
1967 // CHECK1: cond.end:
1968 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1969 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1970 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1971 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1972 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1973 // CHECK1: omp.inner.for.cond:
1974 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1975 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1976 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1977 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1978 // CHECK1: omp.inner.for.body:
1979 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1980 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1981 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1982 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1983 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8
1984 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
1985 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 8
1986 // CHECK1-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV1]], align 8
1987 // CHECK1-NEXT: [[CONV4:%.*]] = sext i16 [[TMP10]] to i32
1988 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1
1989 // CHECK1-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
1990 // CHECK1-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 8
1991 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2
1992 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
1993 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], 1
1994 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX]], align 4
1995 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1996 // CHECK1: omp.body.continue:
1997 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1998 // CHECK1: omp.inner.for.inc:
1999 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2000 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP12]], 1
2001 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
2002 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
2003 // CHECK1: omp.inner.for.end:
2004 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2005 // CHECK1: omp.loop.exit:
2006 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2007 // CHECK1-NEXT: ret void
2008 //
2009 //
2010 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2011 // CHECK1-SAME: () #[[ATTR4]] {
2012 // CHECK1-NEXT: entry:
2013 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
2014 // CHECK1-NEXT: ret void
2015 //
2016 //
2017 // CHECK2-LABEL: define {{[^@]+}}@_Z3fooi
2018 // CHECK2-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
2019 // CHECK2-NEXT: entry:
2020 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2021 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4
2022 // CHECK2-NEXT: [[AA:%.*]] = alloca i16, align 2
2023 // CHECK2-NEXT: [[B:%.*]] = alloca [10 x float], align 4
2024 // CHECK2-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
2025 // CHECK2-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
2026 // CHECK2-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8
2027 // CHECK2-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8
2028 // CHECK2-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 8
2029 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2030 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2031 // CHECK2-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
2032 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2033 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED4:%.*]] = alloca i64, align 8
2034 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
2035 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
2036 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
2037 // CHECK2-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4
2038 // CHECK2-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
2039 // CHECK2-NEXT: [[AA_CASTED7:%.*]] = alloca i64, align 8
2040 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS9:%.*]] = alloca [1 x i8*], align 8
2041 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS10:%.*]] = alloca [1 x i8*], align 8
2042 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS11:%.*]] = alloca [1 x i8*], align 8
2043 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2044 // CHECK2-NEXT: [[A_CASTED12:%.*]] = alloca i64, align 8
2045 // CHECK2-NEXT: [[AA_CASTED14:%.*]] = alloca i64, align 8
2046 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS16:%.*]] = alloca [2 x i8*], align 8
2047 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS17:%.*]] = alloca [2 x i8*], align 8
2048 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS18:%.*]] = alloca [2 x i8*], align 8
2049 // CHECK2-NEXT: [[_TMP19:%.*]] = alloca i32, align 4
2050 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4
2051 // CHECK2-NEXT: [[A_CASTED23:%.*]] = alloca i64, align 8
2052 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED25:%.*]] = alloca i64, align 8
2053 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS29:%.*]] = alloca [10 x i8*], align 8
2054 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS30:%.*]] = alloca [10 x i8*], align 8
2055 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS31:%.*]] = alloca [10 x i8*], align 8
2056 // CHECK2-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [10 x i64], align 8
2057 // CHECK2-NEXT: [[_TMP32:%.*]] = alloca i32, align 4
2058 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
2059 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2060 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4
2061 // CHECK2-NEXT: store i16 0, i16* [[AA]], align 2
2062 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
2063 // CHECK2-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
2064 // CHECK2-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave()
2065 // CHECK2-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8
2066 // CHECK2-NEXT: [[VLA:%.*]] = alloca float, i64 [[TMP2]], align 4
2067 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8
2068 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
2069 // CHECK2-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64
2070 // CHECK2-NEXT: [[TMP6:%.*]] = mul nuw i64 5, [[TMP5]]
2071 // CHECK2-NEXT: [[VLA1:%.*]] = alloca double, i64 [[TMP6]], align 8
2072 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[__VLA_EXPR1]], align 8
2073 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4
2074 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_]], align 4
2075 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4
2076 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTCAPTURE_EXPR_2]], align 4
2077 // CHECK2-NEXT: [[TMP9:%.*]] = load i16, i16* [[AA]], align 2
2078 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
2079 // CHECK2-NEXT: store i16 [[TMP9]], i16* [[CONV]], align 2
2080 // CHECK2-NEXT: [[TMP10:%.*]] = load i64, i64* [[AA_CASTED]], align 8
2081 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2082 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
2083 // CHECK2-NEXT: store i32 [[TMP11]], i32* [[CONV3]], align 4
2084 // CHECK2-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2085 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2086 // CHECK2-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED4]] to i32*
2087 // CHECK2-NEXT: store i32 [[TMP13]], i32* [[CONV5]], align 4
2088 // CHECK2-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED4]], align 8
2089 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2090 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64*
2091 // CHECK2-NEXT: store i64 [[TMP10]], i64* [[TMP16]], align 8
2092 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2093 // CHECK2-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64*
2094 // CHECK2-NEXT: store i64 [[TMP10]], i64* [[TMP18]], align 8
2095 // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2096 // CHECK2-NEXT: store i8* null, i8** [[TMP19]], align 8
2097 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2098 // CHECK2-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
2099 // CHECK2-NEXT: store i64 [[TMP12]], i64* [[TMP21]], align 8
2100 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2101 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
2102 // CHECK2-NEXT: store i64 [[TMP12]], i64* [[TMP23]], align 8
2103 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
2104 // CHECK2-NEXT: store i8* null, i8** [[TMP24]], align 8
2105 // CHECK2-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2106 // CHECK2-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64*
2107 // CHECK2-NEXT: store i64 [[TMP14]], i64* [[TMP26]], align 8
2108 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2109 // CHECK2-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i64*
2110 // CHECK2-NEXT: store i64 [[TMP14]], i64* [[TMP28]], align 8
2111 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
2112 // CHECK2-NEXT: store i8* null, i8** [[TMP29]], align 8
2113 // CHECK2-NEXT: [[TMP30:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2114 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2115 // CHECK2-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 0
2116 // CHECK2-NEXT: [[TMP33:%.*]] = load i16, i16* [[AA]], align 2
2117 // CHECK2-NEXT: store i16 [[TMP33]], i16* [[TMP32]], align 4
2118 // CHECK2-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 1
2119 // CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2120 // CHECK2-NEXT: store i32 [[TMP35]], i32* [[TMP34]], align 4
2121 // CHECK2-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 2
2122 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2123 // CHECK2-NEXT: store i32 [[TMP37]], i32* [[TMP36]], align 4
2124 // CHECK2-NEXT: [[TMP38:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 1, i64 120, i64 12, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1)
2125 // CHECK2-NEXT: [[TMP39:%.*]] = bitcast i8* [[TMP38]] to %struct.kmp_task_t_with_privates*
2126 // CHECK2-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP39]], i32 0, i32 0
2127 // CHECK2-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP40]], i32 0, i32 0
2128 // CHECK2-NEXT: [[TMP42:%.*]] = load i8*, i8** [[TMP41]], align 8
2129 // CHECK2-NEXT: [[TMP43:%.*]] = bitcast %struct.anon* [[AGG_CAPTURED]] to i8*
2130 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP42]], i8* align 4 [[TMP43]], i64 12, i1 false)
2131 // CHECK2-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP39]], i32 0, i32 1
2132 // CHECK2-NEXT: [[TMP45:%.*]] = bitcast i8* [[TMP42]] to %struct.anon*
2133 // CHECK2-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 0
2134 // CHECK2-NEXT: [[TMP47:%.*]] = bitcast [3 x i8*]* [[TMP46]] to i8*
2135 // CHECK2-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP30]] to i8*
2136 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP47]], i8* align 8 [[TMP48]], i64 24, i1 false)
2137 // CHECK2-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 1
2138 // CHECK2-NEXT: [[TMP50:%.*]] = bitcast [3 x i8*]* [[TMP49]] to i8*
2139 // CHECK2-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP31]] to i8*
2140 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP50]], i8* align 8 [[TMP51]], i64 24, i1 false)
2141 // CHECK2-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 2
2142 // CHECK2-NEXT: [[TMP53:%.*]] = bitcast [3 x i64]* [[TMP52]] to i8*
2143 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP53]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false)
2144 // CHECK2-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 3
2145 // CHECK2-NEXT: [[TMP55:%.*]] = load i16, i16* [[AA]], align 2
2146 // CHECK2-NEXT: store i16 [[TMP55]], i16* [[TMP54]], align 8
2147 // CHECK2-NEXT: [[TMP56:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i8* [[TMP38]])
2148 // CHECK2-NEXT: [[TMP57:%.*]] = load i32, i32* [[A]], align 4
2149 // CHECK2-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32*
2150 // CHECK2-NEXT: store i32 [[TMP57]], i32* [[CONV6]], align 4
2151 // CHECK2-NEXT: [[TMP58:%.*]] = load i64, i64* [[A_CASTED]], align 8
2152 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107(i64 [[TMP58]]) #[[ATTR3:[0-9]+]]
2153 // CHECK2-NEXT: [[TMP59:%.*]] = load i16, i16* [[AA]], align 2
2154 // CHECK2-NEXT: [[CONV8:%.*]] = bitcast i64* [[AA_CASTED7]] to i16*
2155 // CHECK2-NEXT: store i16 [[TMP59]], i16* [[CONV8]], align 2
2156 // CHECK2-NEXT: [[TMP60:%.*]] = load i64, i64* [[AA_CASTED7]], align 8
2157 // CHECK2-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0
2158 // CHECK2-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i64*
2159 // CHECK2-NEXT: store i64 [[TMP60]], i64* [[TMP62]], align 8
2160 // CHECK2-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0
2161 // CHECK2-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to i64*
2162 // CHECK2-NEXT: store i64 [[TMP60]], i64* [[TMP64]], align 8
2163 // CHECK2-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 0
2164 // CHECK2-NEXT: store i8* null, i8** [[TMP65]], align 8
2165 // CHECK2-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0
2166 // CHECK2-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0
2167 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
2168 // CHECK2-NEXT: [[TMP68:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113.region_id, i32 1, i8** [[TMP66]], i8** [[TMP67]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2169 // CHECK2-NEXT: [[TMP69:%.*]] = icmp ne i32 [[TMP68]], 0
2170 // CHECK2-NEXT: br i1 [[TMP69]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2171 // CHECK2: omp_offload.failed:
2172 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113(i64 [[TMP60]]) #[[ATTR3]]
2173 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]]
2174 // CHECK2: omp_offload.cont:
2175 // CHECK2-NEXT: [[TMP70:%.*]] = load i32, i32* [[A]], align 4
2176 // CHECK2-NEXT: [[CONV13:%.*]] = bitcast i64* [[A_CASTED12]] to i32*
2177 // CHECK2-NEXT: store i32 [[TMP70]], i32* [[CONV13]], align 4
2178 // CHECK2-NEXT: [[TMP71:%.*]] = load i64, i64* [[A_CASTED12]], align 8
2179 // CHECK2-NEXT: [[TMP72:%.*]] = load i16, i16* [[AA]], align 2
2180 // CHECK2-NEXT: [[CONV15:%.*]] = bitcast i64* [[AA_CASTED14]] to i16*
2181 // CHECK2-NEXT: store i16 [[TMP72]], i16* [[CONV15]], align 2
2182 // CHECK2-NEXT: [[TMP73:%.*]] = load i64, i64* [[AA_CASTED14]], align 8
2183 // CHECK2-NEXT: [[TMP74:%.*]] = load i32, i32* [[N_ADDR]], align 4
2184 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP74]], 10
2185 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2186 // CHECK2: omp_if.then:
2187 // CHECK2-NEXT: [[TMP75:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0
2188 // CHECK2-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64*
2189 // CHECK2-NEXT: store i64 [[TMP71]], i64* [[TMP76]], align 8
2190 // CHECK2-NEXT: [[TMP77:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0
2191 // CHECK2-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64*
2192 // CHECK2-NEXT: store i64 [[TMP71]], i64* [[TMP78]], align 8
2193 // CHECK2-NEXT: [[TMP79:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 0
2194 // CHECK2-NEXT: store i8* null, i8** [[TMP79]], align 8
2195 // CHECK2-NEXT: [[TMP80:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 1
2196 // CHECK2-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64*
2197 // CHECK2-NEXT: store i64 [[TMP73]], i64* [[TMP81]], align 8
2198 // CHECK2-NEXT: [[TMP82:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 1
2199 // CHECK2-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64*
2200 // CHECK2-NEXT: store i64 [[TMP73]], i64* [[TMP83]], align 8
2201 // CHECK2-NEXT: [[TMP84:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 1
2202 // CHECK2-NEXT: store i8* null, i8** [[TMP84]], align 8
2203 // CHECK2-NEXT: [[TMP85:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0
2204 // CHECK2-NEXT: [[TMP86:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0
2205 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
2206 // CHECK2-NEXT: [[TMP87:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120.region_id, i32 2, i8** [[TMP85]], i8** [[TMP86]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2207 // CHECK2-NEXT: [[TMP88:%.*]] = icmp ne i32 [[TMP87]], 0
2208 // CHECK2-NEXT: br i1 [[TMP88]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
2209 // CHECK2: omp_offload.failed20:
2210 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i64 [[TMP71]], i64 [[TMP73]]) #[[ATTR3]]
2211 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT21]]
2212 // CHECK2: omp_offload.cont21:
2213 // CHECK2-NEXT: br label [[OMP_IF_END:%.*]]
2214 // CHECK2: omp_if.else:
2215 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i64 [[TMP71]], i64 [[TMP73]]) #[[ATTR3]]
2216 // CHECK2-NEXT: br label [[OMP_IF_END]]
2217 // CHECK2: omp_if.end:
2218 // CHECK2-NEXT: [[TMP89:%.*]] = load i32, i32* [[N_ADDR]], align 4
2219 // CHECK2-NEXT: store i32 [[TMP89]], i32* [[DOTCAPTURE_EXPR_22]], align 4
2220 // CHECK2-NEXT: [[TMP90:%.*]] = load i32, i32* [[A]], align 4
2221 // CHECK2-NEXT: [[CONV24:%.*]] = bitcast i64* [[A_CASTED23]] to i32*
2222 // CHECK2-NEXT: store i32 [[TMP90]], i32* [[CONV24]], align 4
2223 // CHECK2-NEXT: [[TMP91:%.*]] = load i64, i64* [[A_CASTED23]], align 8
2224 // CHECK2-NEXT: [[TMP92:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_22]], align 4
2225 // CHECK2-NEXT: [[CONV26:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED25]] to i32*
2226 // CHECK2-NEXT: store i32 [[TMP92]], i32* [[CONV26]], align 4
2227 // CHECK2-NEXT: [[TMP93:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED25]], align 8
2228 // CHECK2-NEXT: [[TMP94:%.*]] = load i32, i32* [[N_ADDR]], align 4
2229 // CHECK2-NEXT: [[CMP27:%.*]] = icmp sgt i32 [[TMP94]], 20
2230 // CHECK2-NEXT: br i1 [[CMP27]], label [[OMP_IF_THEN28:%.*]], label [[OMP_IF_ELSE35:%.*]]
2231 // CHECK2: omp_if.then28:
2232 // CHECK2-NEXT: [[TMP95:%.*]] = mul nuw i64 [[TMP2]], 4
2233 // CHECK2-NEXT: [[TMP96:%.*]] = mul nuw i64 5, [[TMP5]]
2234 // CHECK2-NEXT: [[TMP97:%.*]] = mul nuw i64 [[TMP96]], 8
2235 // CHECK2-NEXT: [[TMP98:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0
2236 // CHECK2-NEXT: [[TMP99:%.*]] = bitcast i8** [[TMP98]] to i64*
2237 // CHECK2-NEXT: store i64 [[TMP91]], i64* [[TMP99]], align 8
2238 // CHECK2-NEXT: [[TMP100:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 0
2239 // CHECK2-NEXT: [[TMP101:%.*]] = bitcast i8** [[TMP100]] to i64*
2240 // CHECK2-NEXT: store i64 [[TMP91]], i64* [[TMP101]], align 8
2241 // CHECK2-NEXT: [[TMP102:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2242 // CHECK2-NEXT: store i64 4, i64* [[TMP102]], align 8
2243 // CHECK2-NEXT: [[TMP103:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 0
2244 // CHECK2-NEXT: store i8* null, i8** [[TMP103]], align 8
2245 // CHECK2-NEXT: [[TMP104:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 1
2246 // CHECK2-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to [10 x float]**
2247 // CHECK2-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP105]], align 8
2248 // CHECK2-NEXT: [[TMP106:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 1
2249 // CHECK2-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to [10 x float]**
2250 // CHECK2-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP107]], align 8
2251 // CHECK2-NEXT: [[TMP108:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
2252 // CHECK2-NEXT: store i64 40, i64* [[TMP108]], align 8
2253 // CHECK2-NEXT: [[TMP109:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 1
2254 // CHECK2-NEXT: store i8* null, i8** [[TMP109]], align 8
2255 // CHECK2-NEXT: [[TMP110:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 2
2256 // CHECK2-NEXT: [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64*
2257 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP111]], align 8
2258 // CHECK2-NEXT: [[TMP112:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 2
2259 // CHECK2-NEXT: [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64*
2260 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP113]], align 8
2261 // CHECK2-NEXT: [[TMP114:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
2262 // CHECK2-NEXT: store i64 8, i64* [[TMP114]], align 8
2263 // CHECK2-NEXT: [[TMP115:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 2
2264 // CHECK2-NEXT: store i8* null, i8** [[TMP115]], align 8
2265 // CHECK2-NEXT: [[TMP116:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 3
2266 // CHECK2-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to float**
2267 // CHECK2-NEXT: store float* [[VLA]], float** [[TMP117]], align 8
2268 // CHECK2-NEXT: [[TMP118:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 3
2269 // CHECK2-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to float**
2270 // CHECK2-NEXT: store float* [[VLA]], float** [[TMP119]], align 8
2271 // CHECK2-NEXT: [[TMP120:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
2272 // CHECK2-NEXT: store i64 [[TMP95]], i64* [[TMP120]], align 8
2273 // CHECK2-NEXT: [[TMP121:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 3
2274 // CHECK2-NEXT: store i8* null, i8** [[TMP121]], align 8
2275 // CHECK2-NEXT: [[TMP122:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 4
2276 // CHECK2-NEXT: [[TMP123:%.*]] = bitcast i8** [[TMP122]] to [5 x [10 x double]]**
2277 // CHECK2-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP123]], align 8
2278 // CHECK2-NEXT: [[TMP124:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 4
2279 // CHECK2-NEXT: [[TMP125:%.*]] = bitcast i8** [[TMP124]] to [5 x [10 x double]]**
2280 // CHECK2-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP125]], align 8
2281 // CHECK2-NEXT: [[TMP126:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
2282 // CHECK2-NEXT: store i64 400, i64* [[TMP126]], align 8
2283 // CHECK2-NEXT: [[TMP127:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 4
2284 // CHECK2-NEXT: store i8* null, i8** [[TMP127]], align 8
2285 // CHECK2-NEXT: [[TMP128:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 5
2286 // CHECK2-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to i64*
2287 // CHECK2-NEXT: store i64 5, i64* [[TMP129]], align 8
2288 // CHECK2-NEXT: [[TMP130:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 5
2289 // CHECK2-NEXT: [[TMP131:%.*]] = bitcast i8** [[TMP130]] to i64*
2290 // CHECK2-NEXT: store i64 5, i64* [[TMP131]], align 8
2291 // CHECK2-NEXT: [[TMP132:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 5
2292 // CHECK2-NEXT: store i64 8, i64* [[TMP132]], align 8
2293 // CHECK2-NEXT: [[TMP133:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 5
2294 // CHECK2-NEXT: store i8* null, i8** [[TMP133]], align 8
2295 // CHECK2-NEXT: [[TMP134:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 6
2296 // CHECK2-NEXT: [[TMP135:%.*]] = bitcast i8** [[TMP134]] to i64*
2297 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[TMP135]], align 8
2298 // CHECK2-NEXT: [[TMP136:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 6
2299 // CHECK2-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64*
2300 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[TMP137]], align 8
2301 // CHECK2-NEXT: [[TMP138:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 6
2302 // CHECK2-NEXT: store i64 8, i64* [[TMP138]], align 8
2303 // CHECK2-NEXT: [[TMP139:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 6
2304 // CHECK2-NEXT: store i8* null, i8** [[TMP139]], align 8
2305 // CHECK2-NEXT: [[TMP140:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 7
2306 // CHECK2-NEXT: [[TMP141:%.*]] = bitcast i8** [[TMP140]] to double**
2307 // CHECK2-NEXT: store double* [[VLA1]], double** [[TMP141]], align 8
2308 // CHECK2-NEXT: [[TMP142:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 7
2309 // CHECK2-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to double**
2310 // CHECK2-NEXT: store double* [[VLA1]], double** [[TMP143]], align 8
2311 // CHECK2-NEXT: [[TMP144:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7
2312 // CHECK2-NEXT: store i64 [[TMP97]], i64* [[TMP144]], align 8
2313 // CHECK2-NEXT: [[TMP145:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 7
2314 // CHECK2-NEXT: store i8* null, i8** [[TMP145]], align 8
2315 // CHECK2-NEXT: [[TMP146:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 8
2316 // CHECK2-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to %struct.TT**
2317 // CHECK2-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP147]], align 8
2318 // CHECK2-NEXT: [[TMP148:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 8
2319 // CHECK2-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to %struct.TT**
2320 // CHECK2-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP149]], align 8
2321 // CHECK2-NEXT: [[TMP150:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 8
2322 // CHECK2-NEXT: store i64 16, i64* [[TMP150]], align 8
2323 // CHECK2-NEXT: [[TMP151:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 8
2324 // CHECK2-NEXT: store i8* null, i8** [[TMP151]], align 8
2325 // CHECK2-NEXT: [[TMP152:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 9
2326 // CHECK2-NEXT: [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i64*
2327 // CHECK2-NEXT: store i64 [[TMP93]], i64* [[TMP153]], align 8
2328 // CHECK2-NEXT: [[TMP154:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 9
2329 // CHECK2-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i64*
2330 // CHECK2-NEXT: store i64 [[TMP93]], i64* [[TMP155]], align 8
2331 // CHECK2-NEXT: [[TMP156:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 9
2332 // CHECK2-NEXT: store i64 4, i64* [[TMP156]], align 8
2333 // CHECK2-NEXT: [[TMP157:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 9
2334 // CHECK2-NEXT: store i8* null, i8** [[TMP157]], align 8
2335 // CHECK2-NEXT: [[TMP158:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0
2336 // CHECK2-NEXT: [[TMP159:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 0
2337 // CHECK2-NEXT: [[TMP160:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2338 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
2339 // CHECK2-NEXT: [[TMP161:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145.region_id, i32 10, i8** [[TMP158]], i8** [[TMP159]], i64* [[TMP160]], i64* getelementptr inbounds ([10 x i64], [10 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2340 // CHECK2-NEXT: [[TMP162:%.*]] = icmp ne i32 [[TMP161]], 0
2341 // CHECK2-NEXT: br i1 [[TMP162]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]]
2342 // CHECK2: omp_offload.failed33:
2343 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i64 [[TMP91]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]], i64 [[TMP93]]) #[[ATTR3]]
2344 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT34]]
2345 // CHECK2: omp_offload.cont34:
2346 // CHECK2-NEXT: br label [[OMP_IF_END36:%.*]]
2347 // CHECK2: omp_if.else35:
2348 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i64 [[TMP91]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]], i64 [[TMP93]]) #[[ATTR3]]
2349 // CHECK2-NEXT: br label [[OMP_IF_END36]]
2350 // CHECK2: omp_if.end36:
2351 // CHECK2-NEXT: [[TMP163:%.*]] = load i32, i32* [[A]], align 4
2352 // CHECK2-NEXT: [[TMP164:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
2353 // CHECK2-NEXT: call void @llvm.stackrestore(i8* [[TMP164]])
2354 // CHECK2-NEXT: ret i32 [[TMP163]]
2355 //
2356 //
2357 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103
2358 // CHECK2-SAME: (i64 [[AA:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]], i64 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR2:[0-9]+]] {
2359 // CHECK2-NEXT: entry:
2360 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
2361 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2362 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8
2363 // CHECK2-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
2364 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
2365 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
2366 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2367 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8
2368 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
2369 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
2370 // CHECK2-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32*
2371 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV3]], align 8
2372 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV4]], align 8
2373 // CHECK2-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]])
2374 // CHECK2-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 8
2375 // CHECK2-NEXT: [[CONV5:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
2376 // CHECK2-NEXT: store i16 [[TMP3]], i16* [[CONV5]], align 2
2377 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8
2378 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP4]])
2379 // CHECK2-NEXT: ret void
2380 //
2381 //
2382 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
2383 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[AA:%.*]]) #[[ATTR2]] {
2384 // CHECK2-NEXT: entry:
2385 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2386 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2387 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
2388 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2389 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2390 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2391 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2392 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2393 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2394 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2395 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2396 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2397 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
2398 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
2399 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2400 // CHECK2-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
2401 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2402 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2403 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2404 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2405 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2406 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2407 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
2408 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2409 // CHECK2: cond.true:
2410 // CHECK2-NEXT: br label [[COND_END:%.*]]
2411 // CHECK2: cond.false:
2412 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2413 // CHECK2-NEXT: br label [[COND_END]]
2414 // CHECK2: cond.end:
2415 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2416 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2417 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2418 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2419 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2420 // CHECK2: omp.inner.for.cond:
2421 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2422 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2423 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2424 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2425 // CHECK2: omp.inner.for.body:
2426 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2427 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
2428 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2429 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2430 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2431 // CHECK2: omp.body.continue:
2432 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2433 // CHECK2: omp.inner.for.inc:
2434 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2435 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
2436 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
2437 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2438 // CHECK2: omp.inner.for.end:
2439 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2440 // CHECK2: omp.loop.exit:
2441 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2442 // CHECK2-NEXT: ret void
2443 //
2444 //
2445 // CHECK2-LABEL: define {{[^@]+}}@.omp_task_privates_map.
2446 // CHECK2-SAME: (%struct..kmp_privates.t* noalias [[TMP0:%.*]], i16** noalias [[TMP1:%.*]], [3 x i8*]** noalias [[TMP2:%.*]], [3 x i8*]** noalias [[TMP3:%.*]], [3 x i64]** noalias [[TMP4:%.*]]) #[[ATTR4:[0-9]+]] {
2447 // CHECK2-NEXT: entry:
2448 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 8
2449 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i16**, align 8
2450 // CHECK2-NEXT: [[DOTADDR2:%.*]] = alloca [3 x i8*]**, align 8
2451 // CHECK2-NEXT: [[DOTADDR3:%.*]] = alloca [3 x i8*]**, align 8
2452 // CHECK2-NEXT: [[DOTADDR4:%.*]] = alloca [3 x i64]**, align 8
2453 // CHECK2-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 8
2454 // CHECK2-NEXT: store i16** [[TMP1]], i16*** [[DOTADDR1]], align 8
2455 // CHECK2-NEXT: store [3 x i8*]** [[TMP2]], [3 x i8*]*** [[DOTADDR2]], align 8
2456 // CHECK2-NEXT: store [3 x i8*]** [[TMP3]], [3 x i8*]*** [[DOTADDR3]], align 8
2457 // CHECK2-NEXT: store [3 x i64]** [[TMP4]], [3 x i64]*** [[DOTADDR4]], align 8
2458 // CHECK2-NEXT: [[TMP5:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 8
2459 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 0
2460 // CHECK2-NEXT: [[TMP7:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR2]], align 8
2461 // CHECK2-NEXT: store [3 x i8*]* [[TMP6]], [3 x i8*]** [[TMP7]], align 8
2462 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 1
2463 // CHECK2-NEXT: [[TMP9:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR3]], align 8
2464 // CHECK2-NEXT: store [3 x i8*]* [[TMP8]], [3 x i8*]** [[TMP9]], align 8
2465 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 2
2466 // CHECK2-NEXT: [[TMP11:%.*]] = load [3 x i64]**, [3 x i64]*** [[DOTADDR4]], align 8
2467 // CHECK2-NEXT: store [3 x i64]* [[TMP10]], [3 x i64]** [[TMP11]], align 8
2468 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 3
2469 // CHECK2-NEXT: [[TMP13:%.*]] = load i16**, i16*** [[DOTADDR1]], align 8
2470 // CHECK2-NEXT: store i16* [[TMP12]], i16** [[TMP13]], align 8
2471 // CHECK2-NEXT: ret void
2472 //
2473 //
2474 // CHECK2-LABEL: define {{[^@]+}}@.omp_task_entry.
2475 // CHECK2-SAME: (i32 signext [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
2476 // CHECK2-NEXT: entry:
2477 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4
2478 // CHECK2-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8
2479 // CHECK2-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8
2480 // CHECK2-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8
2481 // CHECK2-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8
2482 // CHECK2-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon*, align 8
2483 // CHECK2-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca i16*, align 8
2484 // CHECK2-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca [3 x i8*]*, align 8
2485 // CHECK2-NEXT: [[DOTFIRSTPRIV_PTR_ADDR2_I:%.*]] = alloca [3 x i8*]*, align 8
2486 // CHECK2-NEXT: [[DOTFIRSTPRIV_PTR_ADDR3_I:%.*]] = alloca [3 x i64]*, align 8
2487 // CHECK2-NEXT: [[AA_CASTED_I:%.*]] = alloca i64, align 8
2488 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED_I:%.*]] = alloca i64, align 8
2489 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED5_I:%.*]] = alloca i64, align 8
2490 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4
2491 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 8
2492 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4
2493 // CHECK2-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8
2494 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4
2495 // CHECK2-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8
2496 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0
2497 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2
2498 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0
2499 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
2500 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon*
2501 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 1
2502 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8*
2503 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8*
2504 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
2505 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
2506 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]])
2507 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]])
2508 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !21
2509 // CHECK2-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !21
2510 // CHECK2-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !21
2511 // CHECK2-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !21
2512 // CHECK2-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !21
2513 // CHECK2-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !21
2514 // CHECK2-NEXT: [[TMP12:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !21
2515 // CHECK2-NEXT: [[TMP13:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !21
2516 // CHECK2-NEXT: [[TMP14:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !21
2517 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast void (i8*, ...)* [[TMP13]] to void (i8*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)*
2518 // CHECK2-NEXT: call void [[TMP15]](i8* [[TMP14]], i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]]) #[[ATTR3]]
2519 // CHECK2-NEXT: [[TMP16:%.*]] = load i16*, i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !21
2520 // CHECK2-NEXT: [[TMP17:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias !21
2521 // CHECK2-NEXT: [[TMP18:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 8, !noalias !21
2522 // CHECK2-NEXT: [[TMP19:%.*]] = load [3 x i64]*, [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 8, !noalias !21
2523 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP17]], i64 0, i64 0
2524 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP18]], i64 0, i64 0
2525 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[TMP19]], i64 0, i64 0
2526 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP12]], i32 0, i32 1
2527 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2
2528 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP23]], align 4
2529 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP24]], align 4
2530 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) #[[ATTR3]]
2531 // CHECK2-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP25]], i32 [[TMP26]], i32 0, i8* null, i32 0, i8* null) #[[ATTR3]]
2532 // CHECK2-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
2533 // CHECK2-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]]
2534 // CHECK2: omp_offload.failed.i:
2535 // CHECK2-NEXT: [[TMP29:%.*]] = load i16, i16* [[TMP16]], align 2
2536 // CHECK2-NEXT: [[CONV_I:%.*]] = bitcast i64* [[AA_CASTED_I]] to i16*
2537 // CHECK2-NEXT: store i16 [[TMP29]], i16* [[CONV_I]], align 2, !noalias !21
2538 // CHECK2-NEXT: [[TMP30:%.*]] = load i64, i64* [[AA_CASTED_I]], align 8, !noalias !21
2539 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP23]], align 4
2540 // CHECK2-NEXT: [[CONV4_I:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED_I]] to i32*
2541 // CHECK2-NEXT: store i32 [[TMP31]], i32* [[CONV4_I]], align 4, !noalias !21
2542 // CHECK2-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED_I]], align 8, !noalias !21
2543 // CHECK2-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP24]], align 4
2544 // CHECK2-NEXT: [[CONV6_I:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED5_I]] to i32*
2545 // CHECK2-NEXT: store i32 [[TMP33]], i32* [[CONV6_I]], align 4, !noalias !21
2546 // CHECK2-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED5_I]], align 8, !noalias !21
2547 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103(i64 [[TMP30]], i64 [[TMP32]], i64 [[TMP34]]) #[[ATTR3]]
2548 // CHECK2-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]]
2549 // CHECK2: .omp_outlined..1.exit:
2550 // CHECK2-NEXT: ret i32 0
2551 //
2552 //
2553 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107
2554 // CHECK2-SAME: (i64 [[A:%.*]]) #[[ATTR2]] {
2555 // CHECK2-NEXT: entry:
2556 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
2557 // CHECK2-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
2558 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
2559 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
2560 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
2561 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32*
2562 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[CONV1]], align 4
2563 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
2564 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP1]])
2565 // CHECK2-NEXT: ret void
2566 //
2567 //
2568 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2
2569 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]]) #[[ATTR2]] {
2570 // CHECK2-NEXT: entry:
2571 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2572 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2573 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
2574 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2575 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2576 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2577 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2578 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2579 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2580 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2581 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2582 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2583 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
2584 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
2585 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2586 // CHECK2-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
2587 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2588 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2589 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2590 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2591 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2592 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2593 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
2594 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2595 // CHECK2: cond.true:
2596 // CHECK2-NEXT: br label [[COND_END:%.*]]
2597 // CHECK2: cond.false:
2598 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2599 // CHECK2-NEXT: br label [[COND_END]]
2600 // CHECK2: cond.end:
2601 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2602 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2603 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2604 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2605 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2606 // CHECK2: omp.inner.for.cond:
2607 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2608 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2609 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2610 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2611 // CHECK2: omp.inner.for.body:
2612 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2613 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
2614 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2615 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2616 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 8
2617 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
2618 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[CONV]], align 8
2619 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2620 // CHECK2: omp.body.continue:
2621 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2622 // CHECK2: omp.inner.for.inc:
2623 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2624 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
2625 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2626 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2627 // CHECK2: omp.inner.for.end:
2628 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2629 // CHECK2: omp.loop.exit:
2630 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2631 // CHECK2-NEXT: ret void
2632 //
2633 //
2634 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113
2635 // CHECK2-SAME: (i64 [[AA:%.*]]) #[[ATTR2]] {
2636 // CHECK2-NEXT: entry:
2637 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
2638 // CHECK2-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
2639 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
2640 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
2641 // CHECK2-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 8
2642 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
2643 // CHECK2-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2
2644 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[AA_CASTED]], align 8
2645 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP1]])
2646 // CHECK2-NEXT: ret void
2647 //
2648 //
2649 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3
2650 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[AA:%.*]]) #[[ATTR2]] {
2651 // CHECK2-NEXT: entry:
2652 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2653 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2654 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
2655 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2656 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2657 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2658 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2659 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2660 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2661 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2662 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2663 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2664 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
2665 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
2666 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2667 // CHECK2-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
2668 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2669 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2670 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2671 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2672 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2673 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2674 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
2675 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2676 // CHECK2: cond.true:
2677 // CHECK2-NEXT: br label [[COND_END:%.*]]
2678 // CHECK2: cond.false:
2679 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2680 // CHECK2-NEXT: br label [[COND_END]]
2681 // CHECK2: cond.end:
2682 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2683 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2684 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2685 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2686 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2687 // CHECK2: omp.inner.for.cond:
2688 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2689 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2690 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2691 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2692 // CHECK2: omp.inner.for.body:
2693 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2694 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
2695 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2696 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2697 // CHECK2-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 8
2698 // CHECK2-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32
2699 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1
2700 // CHECK2-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16
2701 // CHECK2-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 8
2702 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2703 // CHECK2: omp.body.continue:
2704 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2705 // CHECK2: omp.inner.for.inc:
2706 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2707 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1
2708 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
2709 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2710 // CHECK2: omp.inner.for.end:
2711 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2712 // CHECK2: omp.loop.exit:
2713 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2714 // CHECK2-NEXT: ret void
2715 //
2716 //
2717 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120
2718 // CHECK2-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR2]] {
2719 // CHECK2-NEXT: entry:
2720 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
2721 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
2722 // CHECK2-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
2723 // CHECK2-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
2724 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
2725 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
2726 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
2727 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
2728 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
2729 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
2730 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[CONV2]], align 4
2731 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
2732 // CHECK2-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 8
2733 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
2734 // CHECK2-NEXT: store i16 [[TMP2]], i16* [[CONV3]], align 2
2735 // CHECK2-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8
2736 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]])
2737 // CHECK2-NEXT: ret void
2738 //
2739 //
2740 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..6
2741 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR2]] {
2742 // CHECK2-NEXT: entry:
2743 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2744 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2745 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
2746 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
2747 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2748 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2749 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2750 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2751 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2752 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2753 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2754 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2755 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2756 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
2757 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
2758 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
2759 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
2760 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2761 // CHECK2-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
2762 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2763 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2764 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2765 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2766 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2767 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2768 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
2769 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2770 // CHECK2: cond.true:
2771 // CHECK2-NEXT: br label [[COND_END:%.*]]
2772 // CHECK2: cond.false:
2773 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2774 // CHECK2-NEXT: br label [[COND_END]]
2775 // CHECK2: cond.end:
2776 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2777 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2778 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2779 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2780 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2781 // CHECK2: omp.inner.for.cond:
2782 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2783 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2784 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2785 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2786 // CHECK2: omp.inner.for.body:
2787 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2788 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
2789 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2790 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2791 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 8
2792 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1
2793 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 8
2794 // CHECK2-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV1]], align 8
2795 // CHECK2-NEXT: [[CONV4:%.*]] = sext i16 [[TMP9]] to i32
2796 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1
2797 // CHECK2-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
2798 // CHECK2-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 8
2799 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2800 // CHECK2: omp.body.continue:
2801 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2802 // CHECK2: omp.inner.for.inc:
2803 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2804 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP10]], 1
2805 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
2806 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2807 // CHECK2: omp.inner.for.end:
2808 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2809 // CHECK2: omp.loop.exit:
2810 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2811 // CHECK2-NEXT: ret void
2812 //
2813 //
2814 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145
2815 // CHECK2-SAME: (i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
2816 // CHECK2-NEXT: entry:
2817 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
2818 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8
2819 // CHECK2-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
2820 // CHECK2-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8
2821 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8
2822 // CHECK2-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
2823 // CHECK2-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8
2824 // CHECK2-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8
2825 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8
2826 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2827 // CHECK2-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
2828 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2829 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
2830 // CHECK2-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8
2831 // CHECK2-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2832 // CHECK2-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8
2833 // CHECK2-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8
2834 // CHECK2-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
2835 // CHECK2-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8
2836 // CHECK2-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8
2837 // CHECK2-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8
2838 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2839 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
2840 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8
2841 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2842 // CHECK2-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8
2843 // CHECK2-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8
2844 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
2845 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8
2846 // CHECK2-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8
2847 // CHECK2-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8
2848 // CHECK2-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
2849 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 8
2850 // CHECK2-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32*
2851 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[CONV6]], align 4
2852 // CHECK2-NEXT: [[TMP9:%.*]] = load i64, i64* [[A_CASTED]], align 8
2853 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV5]], align 8
2854 // CHECK2-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
2855 // CHECK2-NEXT: store i32 [[TMP10]], i32* [[CONV7]], align 4
2856 // CHECK2-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2857 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [10 x float]*, i64, float*, [5 x [10 x double]]*, i64, i64, double*, %struct.TT*, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], [10 x float]* [[TMP0]], i64 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i64 [[TMP4]], i64 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i64 [[TMP11]])
2858 // CHECK2-NEXT: ret void
2859 //
2860 //
2861 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..9
2862 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
2863 // CHECK2-NEXT: entry:
2864 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2865 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2866 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
2867 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8
2868 // CHECK2-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
2869 // CHECK2-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8
2870 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8
2871 // CHECK2-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
2872 // CHECK2-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8
2873 // CHECK2-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8
2874 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8
2875 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2876 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2877 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2878 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2879 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2880 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2881 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2882 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2883 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2884 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2885 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
2886 // CHECK2-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8
2887 // CHECK2-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2888 // CHECK2-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8
2889 // CHECK2-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8
2890 // CHECK2-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
2891 // CHECK2-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8
2892 // CHECK2-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8
2893 // CHECK2-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8
2894 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2895 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
2896 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8
2897 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2898 // CHECK2-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8
2899 // CHECK2-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8
2900 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
2901 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8
2902 // CHECK2-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8
2903 // CHECK2-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8
2904 // CHECK2-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
2905 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2906 // CHECK2-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
2907 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2908 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2909 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV5]], align 8
2910 // CHECK2-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2911 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
2912 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]])
2913 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2914 // CHECK2: omp.dispatch.cond:
2915 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2916 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9
2917 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2918 // CHECK2: cond.true:
2919 // CHECK2-NEXT: br label [[COND_END:%.*]]
2920 // CHECK2: cond.false:
2921 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2922 // CHECK2-NEXT: br label [[COND_END]]
2923 // CHECK2: cond.end:
2924 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2925 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2926 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2927 // CHECK2-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
2928 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2929 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2930 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2931 // CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2932 // CHECK2: omp.dispatch.body:
2933 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2934 // CHECK2: omp.inner.for.cond:
2935 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
2936 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
2937 // CHECK2-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
2938 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2939 // CHECK2: omp.inner.for.body:
2940 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
2941 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
2942 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2943 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
2944 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !22
2945 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
2946 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[CONV]], align 8, !llvm.access.group !22
2947 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i64 0, i64 2
2948 // CHECK2-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !22
2949 // CHECK2-NEXT: [[CONV9:%.*]] = fpext float [[TMP20]] to double
2950 // CHECK2-NEXT: [[ADD10:%.*]] = fadd double [[CONV9]], 1.000000e+00
2951 // CHECK2-NEXT: [[CONV11:%.*]] = fptrunc double [[ADD10]] to float
2952 // CHECK2-NEXT: store float [[CONV11]], float* [[ARRAYIDX]], align 4, !llvm.access.group !22
2953 // CHECK2-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 3
2954 // CHECK2-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX12]], align 4, !llvm.access.group !22
2955 // CHECK2-NEXT: [[CONV13:%.*]] = fpext float [[TMP21]] to double
2956 // CHECK2-NEXT: [[ADD14:%.*]] = fadd double [[CONV13]], 1.000000e+00
2957 // CHECK2-NEXT: [[CONV15:%.*]] = fptrunc double [[ADD14]] to float
2958 // CHECK2-NEXT: store float [[CONV15]], float* [[ARRAYIDX12]], align 4, !llvm.access.group !22
2959 // CHECK2-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i64 0, i64 1
2960 // CHECK2-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX16]], i64 0, i64 2
2961 // CHECK2-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX17]], align 8, !llvm.access.group !22
2962 // CHECK2-NEXT: [[ADD18:%.*]] = fadd double [[TMP22]], 1.000000e+00
2963 // CHECK2-NEXT: store double [[ADD18]], double* [[ARRAYIDX17]], align 8, !llvm.access.group !22
2964 // CHECK2-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP5]]
2965 // CHECK2-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds double, double* [[TMP6]], i64 [[TMP23]]
2966 // CHECK2-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX19]], i64 3
2967 // CHECK2-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX20]], align 8, !llvm.access.group !22
2968 // CHECK2-NEXT: [[ADD21:%.*]] = fadd double [[TMP24]], 1.000000e+00
2969 // CHECK2-NEXT: store double [[ADD21]], double* [[ARRAYIDX20]], align 8, !llvm.access.group !22
2970 // CHECK2-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0
2971 // CHECK2-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8, !llvm.access.group !22
2972 // CHECK2-NEXT: [[ADD22:%.*]] = add nsw i64 [[TMP25]], 1
2973 // CHECK2-NEXT: store i64 [[ADD22]], i64* [[X]], align 8, !llvm.access.group !22
2974 // CHECK2-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1
2975 // CHECK2-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8, !llvm.access.group !22
2976 // CHECK2-NEXT: [[CONV23:%.*]] = sext i8 [[TMP26]] to i32
2977 // CHECK2-NEXT: [[ADD24:%.*]] = add nsw i32 [[CONV23]], 1
2978 // CHECK2-NEXT: [[CONV25:%.*]] = trunc i32 [[ADD24]] to i8
2979 // CHECK2-NEXT: store i8 [[CONV25]], i8* [[Y]], align 8, !llvm.access.group !22
2980 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2981 // CHECK2: omp.body.continue:
2982 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2983 // CHECK2: omp.inner.for.inc:
2984 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
2985 // CHECK2-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP27]], 1
2986 // CHECK2-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
2987 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
2988 // CHECK2: omp.inner.for.end:
2989 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2990 // CHECK2: omp.dispatch.inc:
2991 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2992 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2993 // CHECK2-NEXT: [[ADD27:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
2994 // CHECK2-NEXT: store i32 [[ADD27]], i32* [[DOTOMP_LB]], align 4
2995 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2996 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2997 // CHECK2-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
2998 // CHECK2-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_UB]], align 4
2999 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]]
3000 // CHECK2: omp.dispatch.end:
3001 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]])
3002 // CHECK2-NEXT: ret void
3003 //
3004 //
3005 // CHECK2-LABEL: define {{[^@]+}}@_Z3bari
3006 // CHECK2-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] {
3007 // CHECK2-NEXT: entry:
3008 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3009 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4
3010 // CHECK2-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8
3011 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3012 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4
3013 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
3014 // CHECK2-NEXT: [[CALL:%.*]] = call signext i32 @_Z3fooi(i32 signext [[TMP0]])
3015 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
3016 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
3017 // CHECK2-NEXT: store i32 [[ADD]], i32* [[A]], align 4
3018 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
3019 // CHECK2-NEXT: [[CALL1:%.*]] = call signext i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 8 dereferenceable(8) [[S]], i32 signext [[TMP2]])
3020 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4
3021 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
3022 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[A]], align 4
3023 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
3024 // CHECK2-NEXT: [[CALL3:%.*]] = call signext i32 @_ZL7fstatici(i32 signext [[TMP4]])
3025 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4
3026 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
3027 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[A]], align 4
3028 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
3029 // CHECK2-NEXT: [[CALL5:%.*]] = call signext i32 @_Z9ftemplateIiET_i(i32 signext [[TMP6]])
3030 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4
3031 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]]
3032 // CHECK2-NEXT: store i32 [[ADD6]], i32* [[A]], align 4
3033 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4
3034 // CHECK2-NEXT: ret i32 [[TMP8]]
3035 //
3036 //
3037 // CHECK2-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
3038 // CHECK2-SAME: (%struct.S1* nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 signext [[N:%.*]]) #[[ATTR0]] comdat align 2 {
3039 // CHECK2-NEXT: entry:
3040 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
3041 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3042 // CHECK2-NEXT: [[B:%.*]] = alloca i32, align 4
3043 // CHECK2-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
3044 // CHECK2-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
3045 // CHECK2-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8
3046 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
3047 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
3048 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
3049 // CHECK2-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8
3050 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
3051 // CHECK2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
3052 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3053 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
3054 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
3055 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
3056 // CHECK2-NEXT: store i32 [[ADD]], i32* [[B]], align 4
3057 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
3058 // CHECK2-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
3059 // CHECK2-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave()
3060 // CHECK2-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8
3061 // CHECK2-NEXT: [[TMP4:%.*]] = mul nuw i64 2, [[TMP2]]
3062 // CHECK2-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP4]], align 2
3063 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8
3064 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[B]], align 4
3065 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[B_CASTED]] to i32*
3066 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[CONV]], align 4
3067 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8
3068 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[N_ADDR]], align 4
3069 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 60
3070 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3071 // CHECK2: omp_if.then:
3072 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
3073 // CHECK2-NEXT: [[TMP8:%.*]] = mul nuw i64 2, [[TMP2]]
3074 // CHECK2-NEXT: [[TMP9:%.*]] = mul nuw i64 [[TMP8]], 2
3075 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3076 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to %struct.S1**
3077 // CHECK2-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP11]], align 8
3078 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3079 // CHECK2-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to double**
3080 // CHECK2-NEXT: store double* [[A]], double** [[TMP13]], align 8
3081 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3082 // CHECK2-NEXT: store i64 8, i64* [[TMP14]], align 8
3083 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3084 // CHECK2-NEXT: store i8* null, i8** [[TMP15]], align 8
3085 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3086 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
3087 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP17]], align 8
3088 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3089 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
3090 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP19]], align 8
3091 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
3092 // CHECK2-NEXT: store i64 4, i64* [[TMP20]], align 8
3093 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
3094 // CHECK2-NEXT: store i8* null, i8** [[TMP21]], align 8
3095 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3096 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
3097 // CHECK2-NEXT: store i64 2, i64* [[TMP23]], align 8
3098 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3099 // CHECK2-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
3100 // CHECK2-NEXT: store i64 2, i64* [[TMP25]], align 8
3101 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
3102 // CHECK2-NEXT: store i64 8, i64* [[TMP26]], align 8
3103 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
3104 // CHECK2-NEXT: store i8* null, i8** [[TMP27]], align 8
3105 // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
3106 // CHECK2-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64*
3107 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP29]], align 8
3108 // CHECK2-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
3109 // CHECK2-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64*
3110 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP31]], align 8
3111 // CHECK2-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
3112 // CHECK2-NEXT: store i64 8, i64* [[TMP32]], align 8
3113 // CHECK2-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
3114 // CHECK2-NEXT: store i8* null, i8** [[TMP33]], align 8
3115 // CHECK2-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
3116 // CHECK2-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i16**
3117 // CHECK2-NEXT: store i16* [[VLA]], i16** [[TMP35]], align 8
3118 // CHECK2-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
3119 // CHECK2-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i16**
3120 // CHECK2-NEXT: store i16* [[VLA]], i16** [[TMP37]], align 8
3121 // CHECK2-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
3122 // CHECK2-NEXT: store i64 [[TMP9]], i64* [[TMP38]], align 8
3123 // CHECK2-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
3124 // CHECK2-NEXT: store i8* null, i8** [[TMP39]], align 8
3125 // CHECK2-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3126 // CHECK2-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3127 // CHECK2-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3128 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
3129 // CHECK2-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218.region_id, i32 5, i8** [[TMP40]], i8** [[TMP41]], i64* [[TMP42]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3130 // CHECK2-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
3131 // CHECK2-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3132 // CHECK2: omp_offload.failed:
3133 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]]
3134 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]]
3135 // CHECK2: omp_offload.cont:
3136 // CHECK2-NEXT: br label [[OMP_IF_END:%.*]]
3137 // CHECK2: omp_if.else:
3138 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]]
3139 // CHECK2-NEXT: br label [[OMP_IF_END]]
3140 // CHECK2: omp_if.end:
3141 // CHECK2-NEXT: [[TMP45:%.*]] = mul nsw i64 1, [[TMP2]]
3142 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i64 [[TMP45]]
3143 // CHECK2-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1
3144 // CHECK2-NEXT: [[TMP46:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2
3145 // CHECK2-NEXT: [[CONV3:%.*]] = sext i16 [[TMP46]] to i32
3146 // CHECK2-NEXT: [[TMP47:%.*]] = load i32, i32* [[B]], align 4
3147 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], [[TMP47]]
3148 // CHECK2-NEXT: [[TMP48:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
3149 // CHECK2-NEXT: call void @llvm.stackrestore(i8* [[TMP48]])
3150 // CHECK2-NEXT: ret i32 [[ADD4]]
3151 //
3152 //
3153 // CHECK2-LABEL: define {{[^@]+}}@_ZL7fstatici
3154 // CHECK2-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] {
3155 // CHECK2-NEXT: entry:
3156 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3157 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4
3158 // CHECK2-NEXT: [[AA:%.*]] = alloca i16, align 2
3159 // CHECK2-NEXT: [[AAA:%.*]] = alloca i8, align 1
3160 // CHECK2-NEXT: [[B:%.*]] = alloca [10 x i32], align 4
3161 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
3162 // CHECK2-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
3163 // CHECK2-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
3164 // CHECK2-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8
3165 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
3166 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
3167 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
3168 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
3169 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3170 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
3171 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4
3172 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3173 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4
3174 // CHECK2-NEXT: store i16 0, i16* [[AA]], align 2
3175 // CHECK2-NEXT: store i8 0, i8* [[AAA]], align 1
3176 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
3177 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
3178 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
3179 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[N_CASTED]], align 8
3180 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4
3181 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32*
3182 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
3183 // CHECK2-NEXT: [[TMP3:%.*]] = load i64, i64* [[A_CASTED]], align 8
3184 // CHECK2-NEXT: [[TMP4:%.*]] = load i16, i16* [[AA]], align 2
3185 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
3186 // CHECK2-NEXT: store i16 [[TMP4]], i16* [[CONV2]], align 2
3187 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[AA_CASTED]], align 8
3188 // CHECK2-NEXT: [[TMP6:%.*]] = load i8, i8* [[AAA]], align 1
3189 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_CASTED]] to i8*
3190 // CHECK2-NEXT: store i8 [[TMP6]], i8* [[CONV3]], align 1
3191 // CHECK2-NEXT: [[TMP7:%.*]] = load i64, i64* [[AAA_CASTED]], align 8
3192 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[N_ADDR]], align 4
3193 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 50
3194 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3195 // CHECK2: omp_if.then:
3196 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3197 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
3198 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP10]], align 8
3199 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3200 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
3201 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP12]], align 8
3202 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3203 // CHECK2-NEXT: store i8* null, i8** [[TMP13]], align 8
3204 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3205 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
3206 // CHECK2-NEXT: store i64 [[TMP3]], i64* [[TMP15]], align 8
3207 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3208 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
3209 // CHECK2-NEXT: store i64 [[TMP3]], i64* [[TMP17]], align 8
3210 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
3211 // CHECK2-NEXT: store i8* null, i8** [[TMP18]], align 8
3212 // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3213 // CHECK2-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64*
3214 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[TMP20]], align 8
3215 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3216 // CHECK2-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i64*
3217 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8
3218 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
3219 // CHECK2-NEXT: store i8* null, i8** [[TMP23]], align 8
3220 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
3221 // CHECK2-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
3222 // CHECK2-NEXT: store i64 [[TMP7]], i64* [[TMP25]], align 8
3223 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
3224 // CHECK2-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
3225 // CHECK2-NEXT: store i64 [[TMP7]], i64* [[TMP27]], align 8
3226 // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
3227 // CHECK2-NEXT: store i8* null, i8** [[TMP28]], align 8
3228 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
3229 // CHECK2-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [10 x i32]**
3230 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP30]], align 8
3231 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
3232 // CHECK2-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to [10 x i32]**
3233 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP32]], align 8
3234 // CHECK2-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
3235 // CHECK2-NEXT: store i8* null, i8** [[TMP33]], align 8
3236 // CHECK2-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3237 // CHECK2-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3238 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[A]], align 4
3239 // CHECK2-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4
3240 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4
3241 // CHECK2-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_4]], align 4
3242 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3243 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3244 // CHECK2-NEXT: [[SUB:%.*]] = sub i32 [[TMP38]], [[TMP39]]
3245 // CHECK2-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1
3246 // CHECK2-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1
3247 // CHECK2-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
3248 // CHECK2-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1
3249 // CHECK2-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4
3250 // CHECK2-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
3251 // CHECK2-NEXT: [[ADD8:%.*]] = add i32 [[TMP40]], 1
3252 // CHECK2-NEXT: [[TMP41:%.*]] = zext i32 [[ADD8]] to i64
3253 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP41]])
3254 // CHECK2-NEXT: [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3255 // CHECK2-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
3256 // CHECK2-NEXT: br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3257 // CHECK2: omp_offload.failed:
3258 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], i64 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]]
3259 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]]
3260 // CHECK2: omp_offload.cont:
3261 // CHECK2-NEXT: br label [[OMP_IF_END:%.*]]
3262 // CHECK2: omp_if.else:
3263 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], i64 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]]
3264 // CHECK2-NEXT: br label [[OMP_IF_END]]
3265 // CHECK2: omp_if.end:
3266 // CHECK2-NEXT: [[TMP44:%.*]] = load i32, i32* [[A]], align 4
3267 // CHECK2-NEXT: ret i32 [[TMP44]]
3268 //
3269 //
3270 // CHECK2-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
3271 // CHECK2-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] comdat {
3272 // CHECK2-NEXT: entry:
3273 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3274 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4
3275 // CHECK2-NEXT: [[AA:%.*]] = alloca i16, align 2
3276 // CHECK2-NEXT: [[B:%.*]] = alloca [10 x i32], align 4
3277 // CHECK2-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
3278 // CHECK2-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
3279 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
3280 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
3281 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
3282 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
3283 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3284 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4
3285 // CHECK2-NEXT: store i16 0, i16* [[AA]], align 2
3286 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4
3287 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32*
3288 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
3289 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
3290 // CHECK2-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2
3291 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
3292 // CHECK2-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2
3293 // CHECK2-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8
3294 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
3295 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40
3296 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3297 // CHECK2: omp_if.then:
3298 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3299 // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
3300 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP6]], align 8
3301 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3302 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
3303 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8
3304 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3305 // CHECK2-NEXT: store i8* null, i8** [[TMP9]], align 8
3306 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3307 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64*
3308 // CHECK2-NEXT: store i64 [[TMP3]], i64* [[TMP11]], align 8
3309 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3310 // CHECK2-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
3311 // CHECK2-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8
3312 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
3313 // CHECK2-NEXT: store i8* null, i8** [[TMP14]], align 8
3314 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3315 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]**
3316 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 8
3317 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3318 // CHECK2-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]**
3319 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 8
3320 // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
3321 // CHECK2-NEXT: store i8* null, i8** [[TMP19]], align 8
3322 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3323 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3324 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
3325 // CHECK2-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.17, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.18, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3326 // CHECK2-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
3327 // CHECK2-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3328 // CHECK2: omp_offload.failed:
3329 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]]
3330 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]]
3331 // CHECK2: omp_offload.cont:
3332 // CHECK2-NEXT: br label [[OMP_IF_END:%.*]]
3333 // CHECK2: omp_if.else:
3334 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]]
3335 // CHECK2-NEXT: br label [[OMP_IF_END]]
3336 // CHECK2: omp_if.end:
3337 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4
3338 // CHECK2-NEXT: ret i32 [[TMP24]]
3339 //
3340 //
3341 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218
3342 // CHECK2-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] {
3343 // CHECK2-NEXT: entry:
3344 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
3345 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8
3346 // CHECK2-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
3347 // CHECK2-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
3348 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8
3349 // CHECK2-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8
3350 // CHECK2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
3351 // CHECK2-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8
3352 // CHECK2-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
3353 // CHECK2-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
3354 // CHECK2-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8
3355 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
3356 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
3357 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
3358 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
3359 // CHECK2-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8
3360 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
3361 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i32*
3362 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
3363 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[B_CASTED]], align 8
3364 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64, i64, i64, i16*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i64 [[TMP5]], i64 [[TMP1]], i64 [[TMP2]], i16* [[TMP3]])
3365 // CHECK2-NEXT: ret void
3366 //
3367 //
3368 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..11
3369 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] {
3370 // CHECK2-NEXT: entry:
3371 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3372 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3373 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
3374 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8
3375 // CHECK2-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
3376 // CHECK2-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
3377 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8
3378 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3379 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
3380 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3381 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3382 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3383 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3384 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
3385 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3386 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3387 // CHECK2-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
3388 // CHECK2-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8
3389 // CHECK2-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
3390 // CHECK2-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
3391 // CHECK2-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8
3392 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
3393 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
3394 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
3395 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
3396 // CHECK2-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8
3397 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3398 // CHECK2-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
3399 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3400 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3401 // CHECK2-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3402 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
3403 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3404 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3405 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9
3406 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3407 // CHECK2: cond.true:
3408 // CHECK2-NEXT: br label [[COND_END:%.*]]
3409 // CHECK2: cond.false:
3410 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3411 // CHECK2-NEXT: br label [[COND_END]]
3412 // CHECK2: cond.end:
3413 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
3414 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3415 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3416 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
3417 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3418 // CHECK2: omp.inner.for.cond:
3419 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3420 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3421 // CHECK2-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
3422 // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3423 // CHECK2: omp.inner.for.body:
3424 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3425 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
3426 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3427 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3428 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
3429 // CHECK2-NEXT: [[CONV4:%.*]] = sitofp i32 [[TMP12]] to double
3430 // CHECK2-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.500000e+00
3431 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
3432 // CHECK2-NEXT: store double [[ADD5]], double* [[A]], align 8
3433 // CHECK2-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0
3434 // CHECK2-NEXT: [[TMP13:%.*]] = load double, double* [[A6]], align 8
3435 // CHECK2-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00
3436 // CHECK2-NEXT: store double [[INC]], double* [[A6]], align 8
3437 // CHECK2-NEXT: [[CONV7:%.*]] = fptosi double [[INC]] to i16
3438 // CHECK2-NEXT: [[TMP14:%.*]] = mul nsw i64 1, [[TMP2]]
3439 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i64 [[TMP14]]
3440 // CHECK2-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1
3441 // CHECK2-NEXT: store i16 [[CONV7]], i16* [[ARRAYIDX8]], align 2
3442 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3443 // CHECK2: omp.body.continue:
3444 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3445 // CHECK2: omp.inner.for.inc:
3446 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3447 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1
3448 // CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
3449 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
3450 // CHECK2: omp.inner.for.end:
3451 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3452 // CHECK2: omp.loop.exit:
3453 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
3454 // CHECK2-NEXT: ret void
3455 //
3456 //
3457 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200
3458 // CHECK2-SAME: (i64 [[N:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
3459 // CHECK2-NEXT: entry:
3460 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3461 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
3462 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
3463 // CHECK2-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8
3464 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
3465 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
3466 // CHECK2-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
3467 // CHECK2-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
3468 // CHECK2-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8
3469 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3470 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
3471 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
3472 // CHECK2-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8
3473 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
3474 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3475 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32*
3476 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
3477 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8*
3478 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
3479 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
3480 // CHECK2-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32*
3481 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[CONV4]], align 4
3482 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8
3483 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8
3484 // CHECK2-NEXT: [[CONV5:%.*]] = bitcast i64* [[A_CASTED]] to i32*
3485 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[CONV5]], align 4
3486 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8
3487 // CHECK2-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV2]], align 8
3488 // CHECK2-NEXT: [[CONV6:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
3489 // CHECK2-NEXT: store i16 [[TMP5]], i16* [[CONV6]], align 2
3490 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[AA_CASTED]], align 8
3491 // CHECK2-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV3]], align 8
3492 // CHECK2-NEXT: [[CONV7:%.*]] = bitcast i64* [[AAA_CASTED]] to i8*
3493 // CHECK2-NEXT: store i8 [[TMP7]], i8* [[CONV7]], align 1
3494 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, i64* [[AAA_CASTED]], align 8
3495 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]], [10 x i32]* [[TMP0]])
3496 // CHECK2-NEXT: ret void
3497 //
3498 //
3499 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..13
3500 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
3501 // CHECK2-NEXT: entry:
3502 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3503 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3504 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3505 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
3506 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
3507 // CHECK2-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8
3508 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
3509 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3510 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
3511 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3512 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
3513 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4
3514 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
3515 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3516 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3517 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3518 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3519 // CHECK2-NEXT: [[I8:%.*]] = alloca i32, align 4
3520 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3521 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3522 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3523 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
3524 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
3525 // CHECK2-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8
3526 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
3527 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3528 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32*
3529 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
3530 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8*
3531 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
3532 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 8
3533 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
3534 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
3535 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_4]], align 4
3536 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3537 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3538 // CHECK2-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]]
3539 // CHECK2-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1
3540 // CHECK2-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1
3541 // CHECK2-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
3542 // CHECK2-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1
3543 // CHECK2-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4
3544 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3545 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[I]], align 4
3546 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3547 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3548 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]]
3549 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3550 // CHECK2: omp.precond.then:
3551 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3552 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
3553 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
3554 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3555 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3556 // CHECK2-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3557 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
3558 // CHECK2-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3559 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3560 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
3561 // CHECK2-NEXT: [[CMP9:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]]
3562 // CHECK2-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3563 // CHECK2: cond.true:
3564 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
3565 // CHECK2-NEXT: br label [[COND_END:%.*]]
3566 // CHECK2: cond.false:
3567 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3568 // CHECK2-NEXT: br label [[COND_END]]
3569 // CHECK2: cond.end:
3570 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
3571 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3572 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3573 // CHECK2-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
3574 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3575 // CHECK2: omp.inner.for.cond:
3576 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3577 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3578 // CHECK2-NEXT: [[ADD10:%.*]] = add i32 [[TMP17]], 1
3579 // CHECK2-NEXT: [[CMP11:%.*]] = icmp ult i32 [[TMP16]], [[ADD10]]
3580 // CHECK2-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3581 // CHECK2: omp.inner.for.body:
3582 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3583 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3584 // CHECK2-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1
3585 // CHECK2-NEXT: [[ADD12:%.*]] = add i32 [[TMP18]], [[MUL]]
3586 // CHECK2-NEXT: store i32 [[ADD12]], i32* [[I8]], align 4
3587 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 8
3588 // CHECK2-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP20]], 1
3589 // CHECK2-NEXT: store i32 [[ADD13]], i32* [[CONV1]], align 8
3590 // CHECK2-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV2]], align 8
3591 // CHECK2-NEXT: [[CONV14:%.*]] = sext i16 [[TMP21]] to i32
3592 // CHECK2-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1
3593 // CHECK2-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i16
3594 // CHECK2-NEXT: store i16 [[CONV16]], i16* [[CONV2]], align 8
3595 // CHECK2-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV3]], align 8
3596 // CHECK2-NEXT: [[CONV17:%.*]] = sext i8 [[TMP22]] to i32
3597 // CHECK2-NEXT: [[ADD18:%.*]] = add nsw i32 [[CONV17]], 1
3598 // CHECK2-NEXT: [[CONV19:%.*]] = trunc i32 [[ADD18]] to i8
3599 // CHECK2-NEXT: store i8 [[CONV19]], i8* [[CONV3]], align 8
3600 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2
3601 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
3602 // CHECK2-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP23]], 1
3603 // CHECK2-NEXT: store i32 [[ADD20]], i32* [[ARRAYIDX]], align 4
3604 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3605 // CHECK2: omp.body.continue:
3606 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3607 // CHECK2: omp.inner.for.inc:
3608 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3609 // CHECK2-NEXT: [[ADD21:%.*]] = add i32 [[TMP24]], 1
3610 // CHECK2-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4
3611 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
3612 // CHECK2: omp.inner.for.end:
3613 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3614 // CHECK2: omp.loop.exit:
3615 // CHECK2-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3616 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
3617 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
3618 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
3619 // CHECK2: omp.precond.end:
3620 // CHECK2-NEXT: ret void
3621 //
3622 //
3623 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183
3624 // CHECK2-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
3625 // CHECK2-NEXT: entry:
3626 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
3627 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
3628 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
3629 // CHECK2-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
3630 // CHECK2-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
3631 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
3632 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
3633 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
3634 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
3635 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
3636 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
3637 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
3638 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
3639 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[CONV2]], align 4
3640 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8
3641 // CHECK2-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 8
3642 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
3643 // CHECK2-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2
3644 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8
3645 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..16 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], [10 x i32]* [[TMP0]])
3646 // CHECK2-NEXT: ret void
3647 //
3648 //
3649 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..16
3650 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
3651 // CHECK2-NEXT: entry:
3652 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3653 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3654 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
3655 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
3656 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
3657 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3658 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
3659 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3660 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3661 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3662 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3663 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
3664 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3665 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3666 // CHECK2-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
3667 // CHECK2-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
3668 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
3669 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
3670 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
3671 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
3672 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3673 // CHECK2-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
3674 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3675 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3676 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3677 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3678 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3679 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3680 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
3681 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3682 // CHECK2: cond.true:
3683 // CHECK2-NEXT: br label [[COND_END:%.*]]
3684 // CHECK2: cond.false:
3685 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3686 // CHECK2-NEXT: br label [[COND_END]]
3687 // CHECK2: cond.end:
3688 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3689 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3690 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3691 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3692 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3693 // CHECK2: omp.inner.for.cond:
3694 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3695 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3696 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3697 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3698 // CHECK2: omp.inner.for.body:
3699 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3700 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3701 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3702 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3703 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8
3704 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
3705 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 8
3706 // CHECK2-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV1]], align 8
3707 // CHECK2-NEXT: [[CONV4:%.*]] = sext i16 [[TMP10]] to i32
3708 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1
3709 // CHECK2-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
3710 // CHECK2-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 8
3711 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2
3712 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
3713 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], 1
3714 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX]], align 4
3715 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3716 // CHECK2: omp.body.continue:
3717 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3718 // CHECK2: omp.inner.for.inc:
3719 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3720 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP12]], 1
3721 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
3722 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
3723 // CHECK2: omp.inner.for.end:
3724 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3725 // CHECK2: omp.loop.exit:
3726 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3727 // CHECK2-NEXT: ret void
3728 //
3729 //
3730 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3731 // CHECK2-SAME: () #[[ATTR4]] {
3732 // CHECK2-NEXT: entry:
3733 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1)
3734 // CHECK2-NEXT: ret void
3735 //
3736 //
3737 // CHECK3-LABEL: define {{[^@]+}}@_Z3fooi
3738 // CHECK3-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
3739 // CHECK3-NEXT: entry:
3740 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3741 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4
3742 // CHECK3-NEXT: [[AA:%.*]] = alloca i16, align 2
3743 // CHECK3-NEXT: [[B:%.*]] = alloca [10 x float], align 4
3744 // CHECK3-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
3745 // CHECK3-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
3746 // CHECK3-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8
3747 // CHECK3-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4
3748 // CHECK3-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 4
3749 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3750 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
3751 // CHECK3-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
3752 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
3753 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED3:%.*]] = alloca i32, align 4
3754 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
3755 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
3756 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
3757 // CHECK3-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4
3758 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
3759 // CHECK3-NEXT: [[AA_CASTED4:%.*]] = alloca i32, align 4
3760 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS6:%.*]] = alloca [1 x i8*], align 4
3761 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS7:%.*]] = alloca [1 x i8*], align 4
3762 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS8:%.*]] = alloca [1 x i8*], align 4
3763 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3764 // CHECK3-NEXT: [[A_CASTED9:%.*]] = alloca i32, align 4
3765 // CHECK3-NEXT: [[AA_CASTED10:%.*]] = alloca i32, align 4
3766 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS12:%.*]] = alloca [2 x i8*], align 4
3767 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS13:%.*]] = alloca [2 x i8*], align 4
3768 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS14:%.*]] = alloca [2 x i8*], align 4
3769 // CHECK3-NEXT: [[_TMP15:%.*]] = alloca i32, align 4
3770 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
3771 // CHECK3-NEXT: [[A_CASTED19:%.*]] = alloca i32, align 4
3772 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED20:%.*]] = alloca i32, align 4
3773 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [10 x i8*], align 4
3774 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS24:%.*]] = alloca [10 x i8*], align 4
3775 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [10 x i8*], align 4
3776 // CHECK3-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [10 x i64], align 4
3777 // CHECK3-NEXT: [[_TMP26:%.*]] = alloca i32, align 4
3778 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
3779 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3780 // CHECK3-NEXT: store i32 0, i32* [[A]], align 4
3781 // CHECK3-NEXT: store i16 0, i16* [[AA]], align 2
3782 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
3783 // CHECK3-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
3784 // CHECK3-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4
3785 // CHECK3-NEXT: [[VLA:%.*]] = alloca float, i32 [[TMP1]], align 4
3786 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4
3787 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
3788 // CHECK3-NEXT: [[TMP4:%.*]] = mul nuw i32 5, [[TMP3]]
3789 // CHECK3-NEXT: [[VLA1:%.*]] = alloca double, i32 [[TMP4]], align 8
3790 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[__VLA_EXPR1]], align 4
3791 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4
3792 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4
3793 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[A]], align 4
3794 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_2]], align 4
3795 // CHECK3-NEXT: [[TMP7:%.*]] = load i16, i16* [[AA]], align 2
3796 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
3797 // CHECK3-NEXT: store i16 [[TMP7]], i16* [[CONV]], align 2
3798 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[AA_CASTED]], align 4
3799 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3800 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
3801 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
3802 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3803 // CHECK3-NEXT: store i32 [[TMP11]], i32* [[DOTCAPTURE_EXPR__CASTED3]], align 4
3804 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED3]], align 4
3805 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3806 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32*
3807 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[TMP14]], align 4
3808 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3809 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32*
3810 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[TMP16]], align 4
3811 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3812 // CHECK3-NEXT: store i8* null, i8** [[TMP17]], align 4
3813 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3814 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32*
3815 // CHECK3-NEXT: store i32 [[TMP10]], i32* [[TMP19]], align 4
3816 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3817 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
3818 // CHECK3-NEXT: store i32 [[TMP10]], i32* [[TMP21]], align 4
3819 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
3820 // CHECK3-NEXT: store i8* null, i8** [[TMP22]], align 4
3821 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3822 // CHECK3-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i32*
3823 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[TMP24]], align 4
3824 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3825 // CHECK3-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i32*
3826 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[TMP26]], align 4
3827 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
3828 // CHECK3-NEXT: store i8* null, i8** [[TMP27]], align 4
3829 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3830 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3831 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 0
3832 // CHECK3-NEXT: [[TMP31:%.*]] = load i16, i16* [[AA]], align 2
3833 // CHECK3-NEXT: store i16 [[TMP31]], i16* [[TMP30]], align 4
3834 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 1
3835 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3836 // CHECK3-NEXT: store i32 [[TMP33]], i32* [[TMP32]], align 4
3837 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 2
3838 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3839 // CHECK3-NEXT: store i32 [[TMP35]], i32* [[TMP34]], align 4
3840 // CHECK3-NEXT: [[TMP36:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 1, i32 72, i32 12, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1)
3841 // CHECK3-NEXT: [[TMP37:%.*]] = bitcast i8* [[TMP36]] to %struct.kmp_task_t_with_privates*
3842 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP37]], i32 0, i32 0
3843 // CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP38]], i32 0, i32 0
3844 // CHECK3-NEXT: [[TMP40:%.*]] = load i8*, i8** [[TMP39]], align 4
3845 // CHECK3-NEXT: [[TMP41:%.*]] = bitcast %struct.anon* [[AGG_CAPTURED]] to i8*
3846 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP40]], i8* align 4 [[TMP41]], i32 12, i1 false)
3847 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP37]], i32 0, i32 1
3848 // CHECK3-NEXT: [[TMP43:%.*]] = bitcast i8* [[TMP40]] to %struct.anon*
3849 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 0
3850 // CHECK3-NEXT: [[TMP45:%.*]] = bitcast [3 x i64]* [[TMP44]] to i8*
3851 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP45]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false)
3852 // CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 1
3853 // CHECK3-NEXT: [[TMP47:%.*]] = bitcast [3 x i8*]* [[TMP46]] to i8*
3854 // CHECK3-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP28]] to i8*
3855 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP47]], i8* align 4 [[TMP48]], i32 12, i1 false)
3856 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 2
3857 // CHECK3-NEXT: [[TMP50:%.*]] = bitcast [3 x i8*]* [[TMP49]] to i8*
3858 // CHECK3-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP29]] to i8*
3859 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP50]], i8* align 4 [[TMP51]], i32 12, i1 false)
3860 // CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 3
3861 // CHECK3-NEXT: [[TMP53:%.*]] = load i16, i16* [[AA]], align 2
3862 // CHECK3-NEXT: store i16 [[TMP53]], i16* [[TMP52]], align 4
3863 // CHECK3-NEXT: [[TMP54:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i8* [[TMP36]])
3864 // CHECK3-NEXT: [[TMP55:%.*]] = load i32, i32* [[A]], align 4
3865 // CHECK3-NEXT: store i32 [[TMP55]], i32* [[A_CASTED]], align 4
3866 // CHECK3-NEXT: [[TMP56:%.*]] = load i32, i32* [[A_CASTED]], align 4
3867 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107(i32 [[TMP56]]) #[[ATTR3:[0-9]+]]
3868 // CHECK3-NEXT: [[TMP57:%.*]] = load i16, i16* [[AA]], align 2
3869 // CHECK3-NEXT: [[CONV5:%.*]] = bitcast i32* [[AA_CASTED4]] to i16*
3870 // CHECK3-NEXT: store i16 [[TMP57]], i16* [[CONV5]], align 2
3871 // CHECK3-NEXT: [[TMP58:%.*]] = load i32, i32* [[AA_CASTED4]], align 4
3872 // CHECK3-NEXT: [[TMP59:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS6]], i32 0, i32 0
3873 // CHECK3-NEXT: [[TMP60:%.*]] = bitcast i8** [[TMP59]] to i32*
3874 // CHECK3-NEXT: store i32 [[TMP58]], i32* [[TMP60]], align 4
3875 // CHECK3-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS7]], i32 0, i32 0
3876 // CHECK3-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i32*
3877 // CHECK3-NEXT: store i32 [[TMP58]], i32* [[TMP62]], align 4
3878 // CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS8]], i32 0, i32 0
3879 // CHECK3-NEXT: store i8* null, i8** [[TMP63]], align 4
3880 // CHECK3-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS6]], i32 0, i32 0
3881 // CHECK3-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS7]], i32 0, i32 0
3882 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
3883 // CHECK3-NEXT: [[TMP66:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113.region_id, i32 1, i8** [[TMP64]], i8** [[TMP65]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3884 // CHECK3-NEXT: [[TMP67:%.*]] = icmp ne i32 [[TMP66]], 0
3885 // CHECK3-NEXT: br i1 [[TMP67]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3886 // CHECK3: omp_offload.failed:
3887 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113(i32 [[TMP58]]) #[[ATTR3]]
3888 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
3889 // CHECK3: omp_offload.cont:
3890 // CHECK3-NEXT: [[TMP68:%.*]] = load i32, i32* [[A]], align 4
3891 // CHECK3-NEXT: store i32 [[TMP68]], i32* [[A_CASTED9]], align 4
3892 // CHECK3-NEXT: [[TMP69:%.*]] = load i32, i32* [[A_CASTED9]], align 4
3893 // CHECK3-NEXT: [[TMP70:%.*]] = load i16, i16* [[AA]], align 2
3894 // CHECK3-NEXT: [[CONV11:%.*]] = bitcast i32* [[AA_CASTED10]] to i16*
3895 // CHECK3-NEXT: store i16 [[TMP70]], i16* [[CONV11]], align 2
3896 // CHECK3-NEXT: [[TMP71:%.*]] = load i32, i32* [[AA_CASTED10]], align 4
3897 // CHECK3-NEXT: [[TMP72:%.*]] = load i32, i32* [[N_ADDR]], align 4
3898 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP72]], 10
3899 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3900 // CHECK3: omp_if.then:
3901 // CHECK3-NEXT: [[TMP73:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0
3902 // CHECK3-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i32*
3903 // CHECK3-NEXT: store i32 [[TMP69]], i32* [[TMP74]], align 4
3904 // CHECK3-NEXT: [[TMP75:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0
3905 // CHECK3-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32*
3906 // CHECK3-NEXT: store i32 [[TMP69]], i32* [[TMP76]], align 4
3907 // CHECK3-NEXT: [[TMP77:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i32 0, i32 0
3908 // CHECK3-NEXT: store i8* null, i8** [[TMP77]], align 4
3909 // CHECK3-NEXT: [[TMP78:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 1
3910 // CHECK3-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32*
3911 // CHECK3-NEXT: store i32 [[TMP71]], i32* [[TMP79]], align 4
3912 // CHECK3-NEXT: [[TMP80:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 1
3913 // CHECK3-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32*
3914 // CHECK3-NEXT: store i32 [[TMP71]], i32* [[TMP81]], align 4
3915 // CHECK3-NEXT: [[TMP82:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i32 0, i32 1
3916 // CHECK3-NEXT: store i8* null, i8** [[TMP82]], align 4
3917 // CHECK3-NEXT: [[TMP83:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0
3918 // CHECK3-NEXT: [[TMP84:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0
3919 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
3920 // CHECK3-NEXT: [[TMP85:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120.region_id, i32 2, i8** [[TMP83]], i8** [[TMP84]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3921 // CHECK3-NEXT: [[TMP86:%.*]] = icmp ne i32 [[TMP85]], 0
3922 // CHECK3-NEXT: br i1 [[TMP86]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
3923 // CHECK3: omp_offload.failed16:
3924 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i32 [[TMP69]], i32 [[TMP71]]) #[[ATTR3]]
3925 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT17]]
3926 // CHECK3: omp_offload.cont17:
3927 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
3928 // CHECK3: omp_if.else:
3929 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i32 [[TMP69]], i32 [[TMP71]]) #[[ATTR3]]
3930 // CHECK3-NEXT: br label [[OMP_IF_END]]
3931 // CHECK3: omp_if.end:
3932 // CHECK3-NEXT: [[TMP87:%.*]] = load i32, i32* [[N_ADDR]], align 4
3933 // CHECK3-NEXT: store i32 [[TMP87]], i32* [[DOTCAPTURE_EXPR_18]], align 4
3934 // CHECK3-NEXT: [[TMP88:%.*]] = load i32, i32* [[A]], align 4
3935 // CHECK3-NEXT: store i32 [[TMP88]], i32* [[A_CASTED19]], align 4
3936 // CHECK3-NEXT: [[TMP89:%.*]] = load i32, i32* [[A_CASTED19]], align 4
3937 // CHECK3-NEXT: [[TMP90:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4
3938 // CHECK3-NEXT: store i32 [[TMP90]], i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4
3939 // CHECK3-NEXT: [[TMP91:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4
3940 // CHECK3-NEXT: [[TMP92:%.*]] = load i32, i32* [[N_ADDR]], align 4
3941 // CHECK3-NEXT: [[CMP21:%.*]] = icmp sgt i32 [[TMP92]], 20
3942 // CHECK3-NEXT: br i1 [[CMP21]], label [[OMP_IF_THEN22:%.*]], label [[OMP_IF_ELSE29:%.*]]
3943 // CHECK3: omp_if.then22:
3944 // CHECK3-NEXT: [[TMP93:%.*]] = mul nuw i32 [[TMP1]], 4
3945 // CHECK3-NEXT: [[TMP94:%.*]] = sext i32 [[TMP93]] to i64
3946 // CHECK3-NEXT: [[TMP95:%.*]] = mul nuw i32 5, [[TMP3]]
3947 // CHECK3-NEXT: [[TMP96:%.*]] = mul nuw i32 [[TMP95]], 8
3948 // CHECK3-NEXT: [[TMP97:%.*]] = sext i32 [[TMP96]] to i64
3949 // CHECK3-NEXT: [[TMP98:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
3950 // CHECK3-NEXT: [[TMP99:%.*]] = bitcast i8** [[TMP98]] to i32*
3951 // CHECK3-NEXT: store i32 [[TMP89]], i32* [[TMP99]], align 4
3952 // CHECK3-NEXT: [[TMP100:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
3953 // CHECK3-NEXT: [[TMP101:%.*]] = bitcast i8** [[TMP100]] to i32*
3954 // CHECK3-NEXT: store i32 [[TMP89]], i32* [[TMP101]], align 4
3955 // CHECK3-NEXT: [[TMP102:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3956 // CHECK3-NEXT: store i64 4, i64* [[TMP102]], align 4
3957 // CHECK3-NEXT: [[TMP103:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 0
3958 // CHECK3-NEXT: store i8* null, i8** [[TMP103]], align 4
3959 // CHECK3-NEXT: [[TMP104:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 1
3960 // CHECK3-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to [10 x float]**
3961 // CHECK3-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP105]], align 4
3962 // CHECK3-NEXT: [[TMP106:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 1
3963 // CHECK3-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to [10 x float]**
3964 // CHECK3-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP107]], align 4
3965 // CHECK3-NEXT: [[TMP108:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
3966 // CHECK3-NEXT: store i64 40, i64* [[TMP108]], align 4
3967 // CHECK3-NEXT: [[TMP109:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 1
3968 // CHECK3-NEXT: store i8* null, i8** [[TMP109]], align 4
3969 // CHECK3-NEXT: [[TMP110:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 2
3970 // CHECK3-NEXT: [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i32*
3971 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP111]], align 4
3972 // CHECK3-NEXT: [[TMP112:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 2
3973 // CHECK3-NEXT: [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i32*
3974 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP113]], align 4
3975 // CHECK3-NEXT: [[TMP114:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
3976 // CHECK3-NEXT: store i64 4, i64* [[TMP114]], align 4
3977 // CHECK3-NEXT: [[TMP115:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 2
3978 // CHECK3-NEXT: store i8* null, i8** [[TMP115]], align 4
3979 // CHECK3-NEXT: [[TMP116:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 3
3980 // CHECK3-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to float**
3981 // CHECK3-NEXT: store float* [[VLA]], float** [[TMP117]], align 4
3982 // CHECK3-NEXT: [[TMP118:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 3
3983 // CHECK3-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to float**
3984 // CHECK3-NEXT: store float* [[VLA]], float** [[TMP119]], align 4
3985 // CHECK3-NEXT: [[TMP120:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
3986 // CHECK3-NEXT: store i64 [[TMP94]], i64* [[TMP120]], align 4
3987 // CHECK3-NEXT: [[TMP121:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 3
3988 // CHECK3-NEXT: store i8* null, i8** [[TMP121]], align 4
3989 // CHECK3-NEXT: [[TMP122:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 4
3990 // CHECK3-NEXT: [[TMP123:%.*]] = bitcast i8** [[TMP122]] to [5 x [10 x double]]**
3991 // CHECK3-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP123]], align 4
3992 // CHECK3-NEXT: [[TMP124:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 4
3993 // CHECK3-NEXT: [[TMP125:%.*]] = bitcast i8** [[TMP124]] to [5 x [10 x double]]**
3994 // CHECK3-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP125]], align 4
3995 // CHECK3-NEXT: [[TMP126:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
3996 // CHECK3-NEXT: store i64 400, i64* [[TMP126]], align 4
3997 // CHECK3-NEXT: [[TMP127:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 4
3998 // CHECK3-NEXT: store i8* null, i8** [[TMP127]], align 4
3999 // CHECK3-NEXT: [[TMP128:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 5
4000 // CHECK3-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to i32*
4001 // CHECK3-NEXT: store i32 5, i32* [[TMP129]], align 4
4002 // CHECK3-NEXT: [[TMP130:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 5
4003 // CHECK3-NEXT: [[TMP131:%.*]] = bitcast i8** [[TMP130]] to i32*
4004 // CHECK3-NEXT: store i32 5, i32* [[TMP131]], align 4
4005 // CHECK3-NEXT: [[TMP132:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 5
4006 // CHECK3-NEXT: store i64 4, i64* [[TMP132]], align 4
4007 // CHECK3-NEXT: [[TMP133:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 5
4008 // CHECK3-NEXT: store i8* null, i8** [[TMP133]], align 4
4009 // CHECK3-NEXT: [[TMP134:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 6
4010 // CHECK3-NEXT: [[TMP135:%.*]] = bitcast i8** [[TMP134]] to i32*
4011 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TMP135]], align 4
4012 // CHECK3-NEXT: [[TMP136:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 6
4013 // CHECK3-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i32*
4014 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TMP137]], align 4
4015 // CHECK3-NEXT: [[TMP138:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 6
4016 // CHECK3-NEXT: store i64 4, i64* [[TMP138]], align 4
4017 // CHECK3-NEXT: [[TMP139:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 6
4018 // CHECK3-NEXT: store i8* null, i8** [[TMP139]], align 4
4019 // CHECK3-NEXT: [[TMP140:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 7
4020 // CHECK3-NEXT: [[TMP141:%.*]] = bitcast i8** [[TMP140]] to double**
4021 // CHECK3-NEXT: store double* [[VLA1]], double** [[TMP141]], align 4
4022 // CHECK3-NEXT: [[TMP142:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 7
4023 // CHECK3-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to double**
4024 // CHECK3-NEXT: store double* [[VLA1]], double** [[TMP143]], align 4
4025 // CHECK3-NEXT: [[TMP144:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7
4026 // CHECK3-NEXT: store i64 [[TMP97]], i64* [[TMP144]], align 4
4027 // CHECK3-NEXT: [[TMP145:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 7
4028 // CHECK3-NEXT: store i8* null, i8** [[TMP145]], align 4
4029 // CHECK3-NEXT: [[TMP146:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 8
4030 // CHECK3-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to %struct.TT**
4031 // CHECK3-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP147]], align 4
4032 // CHECK3-NEXT: [[TMP148:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 8
4033 // CHECK3-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to %struct.TT**
4034 // CHECK3-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP149]], align 4
4035 // CHECK3-NEXT: [[TMP150:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 8
4036 // CHECK3-NEXT: store i64 12, i64* [[TMP150]], align 4
4037 // CHECK3-NEXT: [[TMP151:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 8
4038 // CHECK3-NEXT: store i8* null, i8** [[TMP151]], align 4
4039 // CHECK3-NEXT: [[TMP152:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 9
4040 // CHECK3-NEXT: [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32*
4041 // CHECK3-NEXT: store i32 [[TMP91]], i32* [[TMP153]], align 4
4042 // CHECK3-NEXT: [[TMP154:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 9
4043 // CHECK3-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32*
4044 // CHECK3-NEXT: store i32 [[TMP91]], i32* [[TMP155]], align 4
4045 // CHECK3-NEXT: [[TMP156:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 9
4046 // CHECK3-NEXT: store i64 4, i64* [[TMP156]], align 4
4047 // CHECK3-NEXT: [[TMP157:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 9
4048 // CHECK3-NEXT: store i8* null, i8** [[TMP157]], align 4
4049 // CHECK3-NEXT: [[TMP158:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
4050 // CHECK3-NEXT: [[TMP159:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
4051 // CHECK3-NEXT: [[TMP160:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4052 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
4053 // CHECK3-NEXT: [[TMP161:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145.region_id, i32 10, i8** [[TMP158]], i8** [[TMP159]], i64* [[TMP160]], i64* getelementptr inbounds ([10 x i64], [10 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4054 // CHECK3-NEXT: [[TMP162:%.*]] = icmp ne i32 [[TMP161]], 0
4055 // CHECK3-NEXT: br i1 [[TMP162]], label [[OMP_OFFLOAD_FAILED27:%.*]], label [[OMP_OFFLOAD_CONT28:%.*]]
4056 // CHECK3: omp_offload.failed27:
4057 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i32 [[TMP89]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]], i32 [[TMP91]]) #[[ATTR3]]
4058 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT28]]
4059 // CHECK3: omp_offload.cont28:
4060 // CHECK3-NEXT: br label [[OMP_IF_END30:%.*]]
4061 // CHECK3: omp_if.else29:
4062 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i32 [[TMP89]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]], i32 [[TMP91]]) #[[ATTR3]]
4063 // CHECK3-NEXT: br label [[OMP_IF_END30]]
4064 // CHECK3: omp_if.end30:
4065 // CHECK3-NEXT: [[TMP163:%.*]] = load i32, i32* [[A]], align 4
4066 // CHECK3-NEXT: [[TMP164:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
4067 // CHECK3-NEXT: call void @llvm.stackrestore(i8* [[TMP164]])
4068 // CHECK3-NEXT: ret i32 [[TMP163]]
4069 //
4070 //
4071 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103
4072 // CHECK3-SAME: (i32 [[AA:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]], i32 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR2:[0-9]+]] {
4073 // CHECK3-NEXT: entry:
4074 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
4075 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
4076 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4
4077 // CHECK3-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
4078 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
4079 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
4080 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4081 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
4082 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
4083 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4084 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
4085 // CHECK3-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]])
4086 // CHECK3-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4
4087 // CHECK3-NEXT: [[CONV3:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
4088 // CHECK3-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2
4089 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4
4090 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP4]])
4091 // CHECK3-NEXT: ret void
4092 //
4093 //
4094 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
4095 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[AA:%.*]]) #[[ATTR2]] {
4096 // CHECK3-NEXT: entry:
4097 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4098 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4099 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
4100 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4101 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
4102 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4103 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4104 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4105 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4106 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
4107 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4108 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4109 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
4110 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
4111 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4112 // CHECK3-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
4113 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4114 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4115 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4116 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4117 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4118 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4119 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
4120 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4121 // CHECK3: cond.true:
4122 // CHECK3-NEXT: br label [[COND_END:%.*]]
4123 // CHECK3: cond.false:
4124 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4125 // CHECK3-NEXT: br label [[COND_END]]
4126 // CHECK3: cond.end:
4127 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4128 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4129 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4130 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4131 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4132 // CHECK3: omp.inner.for.cond:
4133 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4134 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4135 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4136 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4137 // CHECK3: omp.inner.for.body:
4138 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4139 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
4140 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4141 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4142 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4143 // CHECK3: omp.body.continue:
4144 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4145 // CHECK3: omp.inner.for.inc:
4146 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4147 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
4148 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
4149 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
4150 // CHECK3: omp.inner.for.end:
4151 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4152 // CHECK3: omp.loop.exit:
4153 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4154 // CHECK3-NEXT: ret void
4155 //
4156 //
4157 // CHECK3-LABEL: define {{[^@]+}}@.omp_task_privates_map.
4158 // CHECK3-SAME: (%struct..kmp_privates.t* noalias [[TMP0:%.*]], i16** noalias [[TMP1:%.*]], [3 x i8*]** noalias [[TMP2:%.*]], [3 x i8*]** noalias [[TMP3:%.*]], [3 x i64]** noalias [[TMP4:%.*]]) #[[ATTR4:[0-9]+]] {
4159 // CHECK3-NEXT: entry:
4160 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 4
4161 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i16**, align 4
4162 // CHECK3-NEXT: [[DOTADDR2:%.*]] = alloca [3 x i8*]**, align 4
4163 // CHECK3-NEXT: [[DOTADDR3:%.*]] = alloca [3 x i8*]**, align 4
4164 // CHECK3-NEXT: [[DOTADDR4:%.*]] = alloca [3 x i64]**, align 4
4165 // CHECK3-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 4
4166 // CHECK3-NEXT: store i16** [[TMP1]], i16*** [[DOTADDR1]], align 4
4167 // CHECK3-NEXT: store [3 x i8*]** [[TMP2]], [3 x i8*]*** [[DOTADDR2]], align 4
4168 // CHECK3-NEXT: store [3 x i8*]** [[TMP3]], [3 x i8*]*** [[DOTADDR3]], align 4
4169 // CHECK3-NEXT: store [3 x i64]** [[TMP4]], [3 x i64]*** [[DOTADDR4]], align 4
4170 // CHECK3-NEXT: [[TMP5:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 4
4171 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 0
4172 // CHECK3-NEXT: [[TMP7:%.*]] = load [3 x i64]**, [3 x i64]*** [[DOTADDR4]], align 4
4173 // CHECK3-NEXT: store [3 x i64]* [[TMP6]], [3 x i64]** [[TMP7]], align 4
4174 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 1
4175 // CHECK3-NEXT: [[TMP9:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR2]], align 4
4176 // CHECK3-NEXT: store [3 x i8*]* [[TMP8]], [3 x i8*]** [[TMP9]], align 4
4177 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 2
4178 // CHECK3-NEXT: [[TMP11:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR3]], align 4
4179 // CHECK3-NEXT: store [3 x i8*]* [[TMP10]], [3 x i8*]** [[TMP11]], align 4
4180 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 3
4181 // CHECK3-NEXT: [[TMP13:%.*]] = load i16**, i16*** [[DOTADDR1]], align 4
4182 // CHECK3-NEXT: store i16* [[TMP12]], i16** [[TMP13]], align 4
4183 // CHECK3-NEXT: ret void
4184 //
4185 //
4186 // CHECK3-LABEL: define {{[^@]+}}@.omp_task_entry.
4187 // CHECK3-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
4188 // CHECK3-NEXT: entry:
4189 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4
4190 // CHECK3-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 4
4191 // CHECK3-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 4
4192 // CHECK3-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 4
4193 // CHECK3-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 4
4194 // CHECK3-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon*, align 4
4195 // CHECK3-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca i16*, align 4
4196 // CHECK3-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca [3 x i8*]*, align 4
4197 // CHECK3-NEXT: [[DOTFIRSTPRIV_PTR_ADDR2_I:%.*]] = alloca [3 x i8*]*, align 4
4198 // CHECK3-NEXT: [[DOTFIRSTPRIV_PTR_ADDR3_I:%.*]] = alloca [3 x i64]*, align 4
4199 // CHECK3-NEXT: [[AA_CASTED_I:%.*]] = alloca i32, align 4
4200 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED_I:%.*]] = alloca i32, align 4
4201 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED4_I:%.*]] = alloca i32, align 4
4202 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4
4203 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 4
4204 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4
4205 // CHECK3-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4
4206 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4
4207 // CHECK3-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4
4208 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0
4209 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2
4210 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0
4211 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
4212 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon*
4213 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 1
4214 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8*
4215 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8*
4216 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]])
4217 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META16:![0-9]+]])
4218 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]])
4219 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]])
4220 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !22
4221 // CHECK3-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 4, !noalias !22
4222 // CHECK3-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 4, !noalias !22
4223 // CHECK3-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 4, !noalias !22
4224 // CHECK3-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 4, !noalias !22
4225 // CHECK3-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 4, !noalias !22
4226 // CHECK3-NEXT: [[TMP12:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 4, !noalias !22
4227 // CHECK3-NEXT: [[TMP13:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 4, !noalias !22
4228 // CHECK3-NEXT: [[TMP14:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 4, !noalias !22
4229 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast void (i8*, ...)* [[TMP13]] to void (i8*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)*
4230 // CHECK3-NEXT: call void [[TMP15]](i8* [[TMP14]], i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]]) #[[ATTR3]]
4231 // CHECK3-NEXT: [[TMP16:%.*]] = load i16*, i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 4, !noalias !22
4232 // CHECK3-NEXT: [[TMP17:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 4, !noalias !22
4233 // CHECK3-NEXT: [[TMP18:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 4, !noalias !22
4234 // CHECK3-NEXT: [[TMP19:%.*]] = load [3 x i64]*, [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 4, !noalias !22
4235 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP17]], i32 0, i32 0
4236 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP18]], i32 0, i32 0
4237 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[TMP19]], i32 0, i32 0
4238 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP12]], i32 0, i32 1
4239 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2
4240 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP23]], align 4
4241 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP24]], align 4
4242 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) #[[ATTR3]]
4243 // CHECK3-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP25]], i32 [[TMP26]], i32 0, i8* null, i32 0, i8* null) #[[ATTR3]]
4244 // CHECK3-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
4245 // CHECK3-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]]
4246 // CHECK3: omp_offload.failed.i:
4247 // CHECK3-NEXT: [[TMP29:%.*]] = load i16, i16* [[TMP16]], align 2
4248 // CHECK3-NEXT: [[CONV_I:%.*]] = bitcast i32* [[AA_CASTED_I]] to i16*
4249 // CHECK3-NEXT: store i16 [[TMP29]], i16* [[CONV_I]], align 2, !noalias !22
4250 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[AA_CASTED_I]], align 4, !noalias !22
4251 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP23]], align 4
4252 // CHECK3-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR__CASTED_I]], align 4, !noalias !22
4253 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED_I]], align 4, !noalias !22
4254 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP24]], align 4
4255 // CHECK3-NEXT: store i32 [[TMP33]], i32* [[DOTCAPTURE_EXPR__CASTED4_I]], align 4, !noalias !22
4256 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED4_I]], align 4, !noalias !22
4257 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103(i32 [[TMP30]], i32 [[TMP32]], i32 [[TMP34]]) #[[ATTR3]]
4258 // CHECK3-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]]
4259 // CHECK3: .omp_outlined..1.exit:
4260 // CHECK3-NEXT: ret i32 0
4261 //
4262 //
4263 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107
4264 // CHECK3-SAME: (i32 [[A:%.*]]) #[[ATTR2]] {
4265 // CHECK3-NEXT: entry:
4266 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
4267 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
4268 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
4269 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4270 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4
4271 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
4272 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP1]])
4273 // CHECK3-NEXT: ret void
4274 //
4275 //
4276 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2
4277 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]]) #[[ATTR2]] {
4278 // CHECK3-NEXT: entry:
4279 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4280 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4281 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
4282 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4283 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
4284 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4285 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4286 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4287 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4288 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
4289 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4290 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4291 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
4292 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4293 // CHECK3-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
4294 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4295 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4296 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4297 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4298 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4299 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4300 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
4301 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4302 // CHECK3: cond.true:
4303 // CHECK3-NEXT: br label [[COND_END:%.*]]
4304 // CHECK3: cond.false:
4305 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4306 // CHECK3-NEXT: br label [[COND_END]]
4307 // CHECK3: cond.end:
4308 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4309 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4310 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4311 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4312 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4313 // CHECK3: omp.inner.for.cond:
4314 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4315 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4316 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4317 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4318 // CHECK3: omp.inner.for.body:
4319 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4320 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
4321 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4322 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4323 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4
4324 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
4325 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4
4326 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4327 // CHECK3: omp.body.continue:
4328 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4329 // CHECK3: omp.inner.for.inc:
4330 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4331 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
4332 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4333 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
4334 // CHECK3: omp.inner.for.end:
4335 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4336 // CHECK3: omp.loop.exit:
4337 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4338 // CHECK3-NEXT: ret void
4339 //
4340 //
4341 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113
4342 // CHECK3-SAME: (i32 [[AA:%.*]]) #[[ATTR2]] {
4343 // CHECK3-NEXT: entry:
4344 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
4345 // CHECK3-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
4346 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
4347 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
4348 // CHECK3-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
4349 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
4350 // CHECK3-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2
4351 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[AA_CASTED]], align 4
4352 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP1]])
4353 // CHECK3-NEXT: ret void
4354 //
4355 //
4356 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3
4357 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[AA:%.*]]) #[[ATTR2]] {
4358 // CHECK3-NEXT: entry:
4359 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4360 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4361 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
4362 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4363 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
4364 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4365 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4366 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4367 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4368 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
4369 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4370 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4371 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
4372 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
4373 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4374 // CHECK3-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
4375 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4376 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4377 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4378 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4379 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4380 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4381 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
4382 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4383 // CHECK3: cond.true:
4384 // CHECK3-NEXT: br label [[COND_END:%.*]]
4385 // CHECK3: cond.false:
4386 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4387 // CHECK3-NEXT: br label [[COND_END]]
4388 // CHECK3: cond.end:
4389 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4390 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4391 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4392 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4393 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4394 // CHECK3: omp.inner.for.cond:
4395 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4396 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4397 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4398 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4399 // CHECK3: omp.inner.for.body:
4400 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4401 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
4402 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4403 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4404 // CHECK3-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 4
4405 // CHECK3-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32
4406 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1
4407 // CHECK3-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16
4408 // CHECK3-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 4
4409 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4410 // CHECK3: omp.body.continue:
4411 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4412 // CHECK3: omp.inner.for.inc:
4413 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4414 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1
4415 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
4416 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
4417 // CHECK3: omp.inner.for.end:
4418 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4419 // CHECK3: omp.loop.exit:
4420 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4421 // CHECK3-NEXT: ret void
4422 //
4423 //
4424 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120
4425 // CHECK3-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR2]] {
4426 // CHECK3-NEXT: entry:
4427 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
4428 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
4429 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
4430 // CHECK3-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
4431 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
4432 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
4433 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
4434 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4435 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4
4436 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
4437 // CHECK3-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV]], align 4
4438 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
4439 // CHECK3-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2
4440 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4
4441 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]])
4442 // CHECK3-NEXT: ret void
4443 //
4444 //
4445 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..6
4446 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR2]] {
4447 // CHECK3-NEXT: entry:
4448 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4449 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4450 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
4451 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
4452 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4453 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
4454 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4455 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4456 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4457 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4458 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
4459 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4460 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4461 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
4462 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
4463 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
4464 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4465 // CHECK3-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
4466 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4467 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4468 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4469 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4470 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4471 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4472 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
4473 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4474 // CHECK3: cond.true:
4475 // CHECK3-NEXT: br label [[COND_END:%.*]]
4476 // CHECK3: cond.false:
4477 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4478 // CHECK3-NEXT: br label [[COND_END]]
4479 // CHECK3: cond.end:
4480 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4481 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4482 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4483 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4484 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4485 // CHECK3: omp.inner.for.cond:
4486 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4487 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4488 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4489 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4490 // CHECK3: omp.inner.for.body:
4491 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4492 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
4493 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4494 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4495 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4
4496 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
4497 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4
4498 // CHECK3-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV]], align 4
4499 // CHECK3-NEXT: [[CONV3:%.*]] = sext i16 [[TMP9]] to i32
4500 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1
4501 // CHECK3-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16
4502 // CHECK3-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 4
4503 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4504 // CHECK3: omp.body.continue:
4505 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4506 // CHECK3: omp.inner.for.inc:
4507 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4508 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1
4509 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
4510 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
4511 // CHECK3: omp.inner.for.end:
4512 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4513 // CHECK3: omp.loop.exit:
4514 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4515 // CHECK3-NEXT: ret void
4516 //
4517 //
4518 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145
4519 // CHECK3-SAME: (i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
4520 // CHECK3-NEXT: entry:
4521 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
4522 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4
4523 // CHECK3-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
4524 // CHECK3-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4
4525 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4
4526 // CHECK3-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
4527 // CHECK3-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4
4528 // CHECK3-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4
4529 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4
4530 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
4531 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
4532 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
4533 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
4534 // CHECK3-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4
4535 // CHECK3-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4536 // CHECK3-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4
4537 // CHECK3-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4
4538 // CHECK3-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
4539 // CHECK3-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4
4540 // CHECK3-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4
4541 // CHECK3-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4
4542 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4543 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4
4544 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4545 // CHECK3-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4
4546 // CHECK3-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4
4547 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
4548 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4
4549 // CHECK3-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4
4550 // CHECK3-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4
4551 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4
4552 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[A_CASTED]], align 4
4553 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_CASTED]], align 4
4554 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4555 // CHECK3-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
4556 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
4557 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [10 x float]*, i32, float*, [5 x [10 x double]]*, i32, i32, double*, %struct.TT*, i32)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP9]], [10 x float]* [[TMP0]], i32 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i32 [[TMP4]], i32 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i32 [[TMP11]])
4558 // CHECK3-NEXT: ret void
4559 //
4560 //
4561 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..9
4562 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
4563 // CHECK3-NEXT: entry:
4564 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4565 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4566 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
4567 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4
4568 // CHECK3-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
4569 // CHECK3-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4
4570 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4
4571 // CHECK3-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
4572 // CHECK3-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4
4573 // CHECK3-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4
4574 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4
4575 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
4576 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4577 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
4578 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4579 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4580 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4581 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4582 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
4583 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4584 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4585 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
4586 // CHECK3-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4
4587 // CHECK3-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4588 // CHECK3-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4
4589 // CHECK3-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4
4590 // CHECK3-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
4591 // CHECK3-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4
4592 // CHECK3-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4
4593 // CHECK3-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4
4594 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4595 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4
4596 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4597 // CHECK3-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4
4598 // CHECK3-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4
4599 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
4600 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4
4601 // CHECK3-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4
4602 // CHECK3-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4
4603 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4604 // CHECK3-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
4605 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4606 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4607 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4608 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4609 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
4610 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]])
4611 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
4612 // CHECK3: omp.dispatch.cond:
4613 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4614 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9
4615 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4616 // CHECK3: cond.true:
4617 // CHECK3-NEXT: br label [[COND_END:%.*]]
4618 // CHECK3: cond.false:
4619 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4620 // CHECK3-NEXT: br label [[COND_END]]
4621 // CHECK3: cond.end:
4622 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
4623 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4624 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4625 // CHECK3-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
4626 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4627 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4628 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
4629 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4630 // CHECK3: omp.dispatch.body:
4631 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4632 // CHECK3: omp.inner.for.cond:
4633 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
4634 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !23
4635 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
4636 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4637 // CHECK3: omp.inner.for.body:
4638 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
4639 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
4640 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4641 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !23
4642 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group !23
4643 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
4644 // CHECK3-NEXT: store i32 [[ADD7]], i32* [[A_ADDR]], align 4, !llvm.access.group !23
4645 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i32 0, i32 2
4646 // CHECK3-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !23
4647 // CHECK3-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double
4648 // CHECK3-NEXT: [[ADD8:%.*]] = fadd double [[CONV]], 1.000000e+00
4649 // CHECK3-NEXT: [[CONV9:%.*]] = fptrunc double [[ADD8]] to float
4650 // CHECK3-NEXT: store float [[CONV9]], float* [[ARRAYIDX]], align 4, !llvm.access.group !23
4651 // CHECK3-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, float* [[TMP2]], i32 3
4652 // CHECK3-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX10]], align 4, !llvm.access.group !23
4653 // CHECK3-NEXT: [[CONV11:%.*]] = fpext float [[TMP21]] to double
4654 // CHECK3-NEXT: [[ADD12:%.*]] = fadd double [[CONV11]], 1.000000e+00
4655 // CHECK3-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float
4656 // CHECK3-NEXT: store float [[CONV13]], float* [[ARRAYIDX10]], align 4, !llvm.access.group !23
4657 // CHECK3-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i32 0, i32 1
4658 // CHECK3-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX14]], i32 0, i32 2
4659 // CHECK3-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX15]], align 8, !llvm.access.group !23
4660 // CHECK3-NEXT: [[ADD16:%.*]] = fadd double [[TMP22]], 1.000000e+00
4661 // CHECK3-NEXT: store double [[ADD16]], double* [[ARRAYIDX15]], align 8, !llvm.access.group !23
4662 // CHECK3-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP5]]
4663 // CHECK3-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP6]], i32 [[TMP23]]
4664 // CHECK3-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX17]], i32 3
4665 // CHECK3-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX18]], align 8, !llvm.access.group !23
4666 // CHECK3-NEXT: [[ADD19:%.*]] = fadd double [[TMP24]], 1.000000e+00
4667 // CHECK3-NEXT: store double [[ADD19]], double* [[ARRAYIDX18]], align 8, !llvm.access.group !23
4668 // CHECK3-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0
4669 // CHECK3-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4, !llvm.access.group !23
4670 // CHECK3-NEXT: [[ADD20:%.*]] = add nsw i64 [[TMP25]], 1
4671 // CHECK3-NEXT: store i64 [[ADD20]], i64* [[X]], align 4, !llvm.access.group !23
4672 // CHECK3-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1
4673 // CHECK3-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4, !llvm.access.group !23
4674 // CHECK3-NEXT: [[CONV21:%.*]] = sext i8 [[TMP26]] to i32
4675 // CHECK3-NEXT: [[ADD22:%.*]] = add nsw i32 [[CONV21]], 1
4676 // CHECK3-NEXT: [[CONV23:%.*]] = trunc i32 [[ADD22]] to i8
4677 // CHECK3-NEXT: store i8 [[CONV23]], i8* [[Y]], align 4, !llvm.access.group !23
4678 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4679 // CHECK3: omp.body.continue:
4680 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4681 // CHECK3: omp.inner.for.inc:
4682 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
4683 // CHECK3-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP27]], 1
4684 // CHECK3-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
4685 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
4686 // CHECK3: omp.inner.for.end:
4687 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
4688 // CHECK3: omp.dispatch.inc:
4689 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4690 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4691 // CHECK3-NEXT: [[ADD25:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
4692 // CHECK3-NEXT: store i32 [[ADD25]], i32* [[DOTOMP_LB]], align 4
4693 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4694 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4695 // CHECK3-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
4696 // CHECK3-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_UB]], align 4
4697 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
4698 // CHECK3: omp.dispatch.end:
4699 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]])
4700 // CHECK3-NEXT: ret void
4701 //
4702 //
4703 // CHECK3-LABEL: define {{[^@]+}}@_Z3bari
4704 // CHECK3-SAME: (i32 [[N:%.*]]) #[[ATTR0]] {
4705 // CHECK3-NEXT: entry:
4706 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4707 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4
4708 // CHECK3-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4
4709 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4710 // CHECK3-NEXT: store i32 0, i32* [[A]], align 4
4711 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
4712 // CHECK3-NEXT: [[CALL:%.*]] = call i32 @_Z3fooi(i32 [[TMP0]])
4713 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
4714 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
4715 // CHECK3-NEXT: store i32 [[ADD]], i32* [[A]], align 4
4716 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
4717 // CHECK3-NEXT: [[CALL1:%.*]] = call i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 4 dereferenceable(8) [[S]], i32 [[TMP2]])
4718 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4
4719 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
4720 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[A]], align 4
4721 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
4722 // CHECK3-NEXT: [[CALL3:%.*]] = call i32 @_ZL7fstatici(i32 [[TMP4]])
4723 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4
4724 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
4725 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[A]], align 4
4726 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
4727 // CHECK3-NEXT: [[CALL5:%.*]] = call i32 @_Z9ftemplateIiET_i(i32 [[TMP6]])
4728 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4
4729 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]]
4730 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[A]], align 4
4731 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4
4732 // CHECK3-NEXT: ret i32 [[TMP8]]
4733 //
4734 //
4735 // CHECK3-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
4736 // CHECK3-SAME: (%struct.S1* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[N:%.*]]) #[[ATTR0]] comdat align 2 {
4737 // CHECK3-NEXT: entry:
4738 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
4739 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4740 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4
4741 // CHECK3-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
4742 // CHECK3-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
4743 // CHECK3-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4
4744 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
4745 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
4746 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
4747 // CHECK3-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4
4748 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
4749 // CHECK3-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
4750 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4751 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
4752 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
4753 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
4754 // CHECK3-NEXT: store i32 [[ADD]], i32* [[B]], align 4
4755 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
4756 // CHECK3-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
4757 // CHECK3-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4
4758 // CHECK3-NEXT: [[TMP3:%.*]] = mul nuw i32 2, [[TMP1]]
4759 // CHECK3-NEXT: [[VLA:%.*]] = alloca i16, i32 [[TMP3]], align 2
4760 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4
4761 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[B]], align 4
4762 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4
4763 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4
4764 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
4765 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 60
4766 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4767 // CHECK3: omp_if.then:
4768 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
4769 // CHECK3-NEXT: [[TMP7:%.*]] = mul nuw i32 2, [[TMP1]]
4770 // CHECK3-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP7]], 2
4771 // CHECK3-NEXT: [[TMP9:%.*]] = sext i32 [[TMP8]] to i64
4772 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4773 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to %struct.S1**
4774 // CHECK3-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP11]], align 4
4775 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4776 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to double**
4777 // CHECK3-NEXT: store double* [[A]], double** [[TMP13]], align 4
4778 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4779 // CHECK3-NEXT: store i64 8, i64* [[TMP14]], align 4
4780 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4781 // CHECK3-NEXT: store i8* null, i8** [[TMP15]], align 4
4782 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4783 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
4784 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[TMP17]], align 4
4785 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4786 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32*
4787 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[TMP19]], align 4
4788 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
4789 // CHECK3-NEXT: store i64 4, i64* [[TMP20]], align 4
4790 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
4791 // CHECK3-NEXT: store i8* null, i8** [[TMP21]], align 4
4792 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4793 // CHECK3-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
4794 // CHECK3-NEXT: store i32 2, i32* [[TMP23]], align 4
4795 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4796 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32*
4797 // CHECK3-NEXT: store i32 2, i32* [[TMP25]], align 4
4798 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
4799 // CHECK3-NEXT: store i64 4, i64* [[TMP26]], align 4
4800 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
4801 // CHECK3-NEXT: store i8* null, i8** [[TMP27]], align 4
4802 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
4803 // CHECK3-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32*
4804 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP29]], align 4
4805 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
4806 // CHECK3-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i32*
4807 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP31]], align 4
4808 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
4809 // CHECK3-NEXT: store i64 4, i64* [[TMP32]], align 4
4810 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
4811 // CHECK3-NEXT: store i8* null, i8** [[TMP33]], align 4
4812 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
4813 // CHECK3-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i16**
4814 // CHECK3-NEXT: store i16* [[VLA]], i16** [[TMP35]], align 4
4815 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
4816 // CHECK3-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i16**
4817 // CHECK3-NEXT: store i16* [[VLA]], i16** [[TMP37]], align 4
4818 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
4819 // CHECK3-NEXT: store i64 [[TMP9]], i64* [[TMP38]], align 4
4820 // CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
4821 // CHECK3-NEXT: store i8* null, i8** [[TMP39]], align 4
4822 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4823 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4824 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4825 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
4826 // CHECK3-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218.region_id, i32 5, i8** [[TMP40]], i8** [[TMP41]], i64* [[TMP42]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4827 // CHECK3-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
4828 // CHECK3-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4829 // CHECK3: omp_offload.failed:
4830 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]]
4831 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
4832 // CHECK3: omp_offload.cont:
4833 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
4834 // CHECK3: omp_if.else:
4835 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]]
4836 // CHECK3-NEXT: br label [[OMP_IF_END]]
4837 // CHECK3: omp_if.end:
4838 // CHECK3-NEXT: [[TMP45:%.*]] = mul nsw i32 1, [[TMP1]]
4839 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i32 [[TMP45]]
4840 // CHECK3-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1
4841 // CHECK3-NEXT: [[TMP46:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2
4842 // CHECK3-NEXT: [[CONV:%.*]] = sext i16 [[TMP46]] to i32
4843 // CHECK3-NEXT: [[TMP47:%.*]] = load i32, i32* [[B]], align 4
4844 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV]], [[TMP47]]
4845 // CHECK3-NEXT: [[TMP48:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
4846 // CHECK3-NEXT: call void @llvm.stackrestore(i8* [[TMP48]])
4847 // CHECK3-NEXT: ret i32 [[ADD3]]
4848 //
4849 //
4850 // CHECK3-LABEL: define {{[^@]+}}@_ZL7fstatici
4851 // CHECK3-SAME: (i32 [[N:%.*]]) #[[ATTR0]] {
4852 // CHECK3-NEXT: entry:
4853 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4854 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4
4855 // CHECK3-NEXT: [[AA:%.*]] = alloca i16, align 2
4856 // CHECK3-NEXT: [[AAA:%.*]] = alloca i8, align 1
4857 // CHECK3-NEXT: [[B:%.*]] = alloca [10 x i32], align 4
4858 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
4859 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
4860 // CHECK3-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
4861 // CHECK3-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4
4862 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
4863 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
4864 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
4865 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
4866 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4867 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
4868 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
4869 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4870 // CHECK3-NEXT: store i32 0, i32* [[A]], align 4
4871 // CHECK3-NEXT: store i16 0, i16* [[AA]], align 2
4872 // CHECK3-NEXT: store i8 0, i8* [[AAA]], align 1
4873 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
4874 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[N_CASTED]], align 4
4875 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_CASTED]], align 4
4876 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4
4877 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[A_CASTED]], align 4
4878 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_CASTED]], align 4
4879 // CHECK3-NEXT: [[TMP4:%.*]] = load i16, i16* [[AA]], align 2
4880 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
4881 // CHECK3-NEXT: store i16 [[TMP4]], i16* [[CONV]], align 2
4882 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[AA_CASTED]], align 4
4883 // CHECK3-NEXT: [[TMP6:%.*]] = load i8, i8* [[AAA]], align 1
4884 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_CASTED]] to i8*
4885 // CHECK3-NEXT: store i8 [[TMP6]], i8* [[CONV1]], align 1
4886 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[AAA_CASTED]], align 4
4887 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[N_ADDR]], align 4
4888 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 50
4889 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4890 // CHECK3: omp_if.then:
4891 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4892 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
4893 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP10]], align 4
4894 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4895 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
4896 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP12]], align 4
4897 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4898 // CHECK3-NEXT: store i8* null, i8** [[TMP13]], align 4
4899 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4900 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
4901 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TMP15]], align 4
4902 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4903 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
4904 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TMP17]], align 4
4905 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
4906 // CHECK3-NEXT: store i8* null, i8** [[TMP18]], align 4
4907 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4908 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32*
4909 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[TMP20]], align 4
4910 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4911 // CHECK3-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i32*
4912 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[TMP22]], align 4
4913 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
4914 // CHECK3-NEXT: store i8* null, i8** [[TMP23]], align 4
4915 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
4916 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32*
4917 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[TMP25]], align 4
4918 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
4919 // CHECK3-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32*
4920 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[TMP27]], align 4
4921 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
4922 // CHECK3-NEXT: store i8* null, i8** [[TMP28]], align 4
4923 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
4924 // CHECK3-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [10 x i32]**
4925 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP30]], align 4
4926 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
4927 // CHECK3-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to [10 x i32]**
4928 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP32]], align 4
4929 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
4930 // CHECK3-NEXT: store i8* null, i8** [[TMP33]], align 4
4931 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4932 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4933 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[A]], align 4
4934 // CHECK3-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4
4935 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4
4936 // CHECK3-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_2]], align 4
4937 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4938 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4939 // CHECK3-NEXT: [[SUB:%.*]] = sub i32 [[TMP38]], [[TMP39]]
4940 // CHECK3-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1
4941 // CHECK3-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1
4942 // CHECK3-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
4943 // CHECK3-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1
4944 // CHECK3-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
4945 // CHECK3-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
4946 // CHECK3-NEXT: [[ADD6:%.*]] = add i32 [[TMP40]], 1
4947 // CHECK3-NEXT: [[TMP41:%.*]] = zext i32 [[ADD6]] to i64
4948 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP41]])
4949 // CHECK3-NEXT: [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4950 // CHECK3-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
4951 // CHECK3-NEXT: br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4952 // CHECK3: omp_offload.failed:
4953 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], i32 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]]
4954 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
4955 // CHECK3: omp_offload.cont:
4956 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
4957 // CHECK3: omp_if.else:
4958 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], i32 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]]
4959 // CHECK3-NEXT: br label [[OMP_IF_END]]
4960 // CHECK3: omp_if.end:
4961 // CHECK3-NEXT: [[TMP44:%.*]] = load i32, i32* [[A]], align 4
4962 // CHECK3-NEXT: ret i32 [[TMP44]]
4963 //
4964 //
4965 // CHECK3-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
4966 // CHECK3-SAME: (i32 [[N:%.*]]) #[[ATTR0]] comdat {
4967 // CHECK3-NEXT: entry:
4968 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4969 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4
4970 // CHECK3-NEXT: [[AA:%.*]] = alloca i16, align 2
4971 // CHECK3-NEXT: [[B:%.*]] = alloca [10 x i32], align 4
4972 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
4973 // CHECK3-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
4974 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
4975 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
4976 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
4977 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
4978 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4979 // CHECK3-NEXT: store i32 0, i32* [[A]], align 4
4980 // CHECK3-NEXT: store i16 0, i16* [[AA]], align 2
4981 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4
4982 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4
4983 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
4984 // CHECK3-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2
4985 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
4986 // CHECK3-NEXT: store i16 [[TMP2]], i16* [[CONV]], align 2
4987 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4
4988 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
4989 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40
4990 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4991 // CHECK3: omp_if.then:
4992 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4993 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32*
4994 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP6]], align 4
4995 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4996 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
4997 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4
4998 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4999 // CHECK3-NEXT: store i8* null, i8** [[TMP9]], align 4
5000 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
5001 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32*
5002 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TMP11]], align 4
5003 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
5004 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
5005 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4
5006 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
5007 // CHECK3-NEXT: store i8* null, i8** [[TMP14]], align 4
5008 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
5009 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]**
5010 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 4
5011 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
5012 // CHECK3-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]**
5013 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 4
5014 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
5015 // CHECK3-NEXT: store i8* null, i8** [[TMP19]], align 4
5016 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5017 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5018 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
5019 // CHECK3-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.17, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.18, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5020 // CHECK3-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
5021 // CHECK3-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5022 // CHECK3: omp_offload.failed:
5023 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]]
5024 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
5025 // CHECK3: omp_offload.cont:
5026 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
5027 // CHECK3: omp_if.else:
5028 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]]
5029 // CHECK3-NEXT: br label [[OMP_IF_END]]
5030 // CHECK3: omp_if.end:
5031 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4
5032 // CHECK3-NEXT: ret i32 [[TMP24]]
5033 //
5034 //
5035 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218
5036 // CHECK3-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] {
5037 // CHECK3-NEXT: entry:
5038 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
5039 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
5040 // CHECK3-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
5041 // CHECK3-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
5042 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4
5043 // CHECK3-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4
5044 // CHECK3-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
5045 // CHECK3-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4
5046 // CHECK3-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
5047 // CHECK3-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
5048 // CHECK3-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4
5049 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
5050 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
5051 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
5052 // CHECK3-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4
5053 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[B_ADDR]], align 4
5054 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4
5055 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4
5056 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32, i32, i32, i16*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i32 [[TMP5]], i32 [[TMP1]], i32 [[TMP2]], i16* [[TMP3]])
5057 // CHECK3-NEXT: ret void
5058 //
5059 //
5060 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11
5061 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] {
5062 // CHECK3-NEXT: entry:
5063 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5064 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5065 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
5066 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
5067 // CHECK3-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
5068 // CHECK3-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
5069 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4
5070 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5071 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
5072 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5073 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5074 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5075 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5076 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
5077 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5078 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5079 // CHECK3-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
5080 // CHECK3-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4
5081 // CHECK3-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
5082 // CHECK3-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
5083 // CHECK3-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4
5084 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
5085 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
5086 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
5087 // CHECK3-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4
5088 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5089 // CHECK3-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
5090 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5091 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5092 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5093 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
5094 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5095 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5096 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9
5097 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5098 // CHECK3: cond.true:
5099 // CHECK3-NEXT: br label [[COND_END:%.*]]
5100 // CHECK3: cond.false:
5101 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5102 // CHECK3-NEXT: br label [[COND_END]]
5103 // CHECK3: cond.end:
5104 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
5105 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5106 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5107 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
5108 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5109 // CHECK3: omp.inner.for.cond:
5110 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5111 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5112 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
5113 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5114 // CHECK3: omp.inner.for.body:
5115 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5116 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
5117 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5118 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
5119 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[B_ADDR]], align 4
5120 // CHECK3-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP12]] to double
5121 // CHECK3-NEXT: [[ADD4:%.*]] = fadd double [[CONV]], 1.500000e+00
5122 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
5123 // CHECK3-NEXT: store double [[ADD4]], double* [[A]], align 4
5124 // CHECK3-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0
5125 // CHECK3-NEXT: [[TMP13:%.*]] = load double, double* [[A5]], align 4
5126 // CHECK3-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00
5127 // CHECK3-NEXT: store double [[INC]], double* [[A5]], align 4
5128 // CHECK3-NEXT: [[CONV6:%.*]] = fptosi double [[INC]] to i16
5129 // CHECK3-NEXT: [[TMP14:%.*]] = mul nsw i32 1, [[TMP2]]
5130 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i32 [[TMP14]]
5131 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1
5132 // CHECK3-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX7]], align 2
5133 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5134 // CHECK3: omp.body.continue:
5135 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5136 // CHECK3: omp.inner.for.inc:
5137 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5138 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
5139 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
5140 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
5141 // CHECK3: omp.inner.for.end:
5142 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5143 // CHECK3: omp.loop.exit:
5144 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
5145 // CHECK3-NEXT: ret void
5146 //
5147 //
5148 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200
5149 // CHECK3-SAME: (i32 [[N:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
5150 // CHECK3-NEXT: entry:
5151 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
5152 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
5153 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
5154 // CHECK3-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4
5155 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
5156 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
5157 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
5158 // CHECK3-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
5159 // CHECK3-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4
5160 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
5161 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
5162 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
5163 // CHECK3-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4
5164 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
5165 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
5166 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8*
5167 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
5168 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
5169 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4
5170 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4
5171 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4
5172 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[A_CASTED]], align 4
5173 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4
5174 // CHECK3-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV]], align 4
5175 // CHECK3-NEXT: [[CONV2:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
5176 // CHECK3-NEXT: store i16 [[TMP5]], i16* [[CONV2]], align 2
5177 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[AA_CASTED]], align 4
5178 // CHECK3-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV1]], align 4
5179 // CHECK3-NEXT: [[CONV3:%.*]] = bitcast i32* [[AAA_CASTED]] to i8*
5180 // CHECK3-NEXT: store i8 [[TMP7]], i8* [[CONV3]], align 1
5181 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[AAA_CASTED]], align 4
5182 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP8]], [10 x i32]* [[TMP0]])
5183 // CHECK3-NEXT: ret void
5184 //
5185 //
5186 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..13
5187 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
5188 // CHECK3-NEXT: entry:
5189 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5190 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5191 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
5192 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
5193 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
5194 // CHECK3-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4
5195 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
5196 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5197 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
5198 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5199 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5200 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
5201 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
5202 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5203 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5204 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5205 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5206 // CHECK3-NEXT: [[I6:%.*]] = alloca i32, align 4
5207 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5208 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5209 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
5210 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
5211 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
5212 // CHECK3-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4
5213 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
5214 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
5215 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8*
5216 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
5217 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
5218 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
5219 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
5220 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
5221 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5222 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5223 // CHECK3-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]]
5224 // CHECK3-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1
5225 // CHECK3-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1
5226 // CHECK3-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
5227 // CHECK3-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1
5228 // CHECK3-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
5229 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5230 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[I]], align 4
5231 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5232 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5233 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]]
5234 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5235 // CHECK3: omp.precond.then:
5236 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5237 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5238 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
5239 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5240 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5241 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5242 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
5243 // CHECK3-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5244 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5245 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5246 // CHECK3-NEXT: [[CMP7:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]]
5247 // CHECK3-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5248 // CHECK3: cond.true:
5249 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5250 // CHECK3-NEXT: br label [[COND_END:%.*]]
5251 // CHECK3: cond.false:
5252 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5253 // CHECK3-NEXT: br label [[COND_END]]
5254 // CHECK3: cond.end:
5255 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
5256 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5257 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5258 // CHECK3-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
5259 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5260 // CHECK3: omp.inner.for.cond:
5261 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5262 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5263 // CHECK3-NEXT: [[ADD8:%.*]] = add i32 [[TMP17]], 1
5264 // CHECK3-NEXT: [[CMP9:%.*]] = icmp ult i32 [[TMP16]], [[ADD8]]
5265 // CHECK3-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5266 // CHECK3: omp.inner.for.body:
5267 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5268 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5269 // CHECK3-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1
5270 // CHECK3-NEXT: [[ADD10:%.*]] = add i32 [[TMP18]], [[MUL]]
5271 // CHECK3-NEXT: store i32 [[ADD10]], i32* [[I6]], align 4
5272 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[A_ADDR]], align 4
5273 // CHECK3-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1
5274 // CHECK3-NEXT: store i32 [[ADD11]], i32* [[A_ADDR]], align 4
5275 // CHECK3-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV]], align 4
5276 // CHECK3-NEXT: [[CONV12:%.*]] = sext i16 [[TMP21]] to i32
5277 // CHECK3-NEXT: [[ADD13:%.*]] = add nsw i32 [[CONV12]], 1
5278 // CHECK3-NEXT: [[CONV14:%.*]] = trunc i32 [[ADD13]] to i16
5279 // CHECK3-NEXT: store i16 [[CONV14]], i16* [[CONV]], align 4
5280 // CHECK3-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV1]], align 4
5281 // CHECK3-NEXT: [[CONV15:%.*]] = sext i8 [[TMP22]] to i32
5282 // CHECK3-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV15]], 1
5283 // CHECK3-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i8
5284 // CHECK3-NEXT: store i8 [[CONV17]], i8* [[CONV1]], align 4
5285 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2
5286 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
5287 // CHECK3-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], 1
5288 // CHECK3-NEXT: store i32 [[ADD18]], i32* [[ARRAYIDX]], align 4
5289 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5290 // CHECK3: omp.body.continue:
5291 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5292 // CHECK3: omp.inner.for.inc:
5293 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5294 // CHECK3-NEXT: [[ADD19:%.*]] = add i32 [[TMP24]], 1
5295 // CHECK3-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4
5296 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
5297 // CHECK3: omp.inner.for.end:
5298 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5299 // CHECK3: omp.loop.exit:
5300 // CHECK3-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5301 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
5302 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
5303 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
5304 // CHECK3: omp.precond.end:
5305 // CHECK3-NEXT: ret void
5306 //
5307 //
5308 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183
5309 // CHECK3-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
5310 // CHECK3-NEXT: entry:
5311 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
5312 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
5313 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
5314 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
5315 // CHECK3-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
5316 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
5317 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
5318 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
5319 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
5320 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
5321 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
5322 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[A_CASTED]], align 4
5323 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4
5324 // CHECK3-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4
5325 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
5326 // CHECK3-NEXT: store i16 [[TMP3]], i16* [[CONV1]], align 2
5327 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4
5328 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..16 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], [10 x i32]* [[TMP0]])
5329 // CHECK3-NEXT: ret void
5330 //
5331 //
5332 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..16
5333 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
5334 // CHECK3-NEXT: entry:
5335 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5336 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5337 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
5338 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
5339 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
5340 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5341 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
5342 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5343 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5344 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5345 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5346 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
5347 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5348 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5349 // CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
5350 // CHECK3-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
5351 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
5352 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
5353 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
5354 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5355 // CHECK3-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
5356 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5357 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5358 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5359 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5360 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5361 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5362 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
5363 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5364 // CHECK3: cond.true:
5365 // CHECK3-NEXT: br label [[COND_END:%.*]]
5366 // CHECK3: cond.false:
5367 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5368 // CHECK3-NEXT: br label [[COND_END]]
5369 // CHECK3: cond.end:
5370 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5371 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5372 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5373 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5374 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5375 // CHECK3: omp.inner.for.cond:
5376 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5377 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5378 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5379 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5380 // CHECK3: omp.inner.for.body:
5381 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5382 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
5383 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5384 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
5385 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4
5386 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1
5387 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4
5388 // CHECK3-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV]], align 4
5389 // CHECK3-NEXT: [[CONV3:%.*]] = sext i16 [[TMP10]] to i32
5390 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1
5391 // CHECK3-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16
5392 // CHECK3-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 4
5393 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2
5394 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
5395 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], 1
5396 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4
5397 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5398 // CHECK3: omp.body.continue:
5399 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5400 // CHECK3: omp.inner.for.inc:
5401 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5402 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1
5403 // CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
5404 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
5405 // CHECK3: omp.inner.for.end:
5406 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5407 // CHECK3: omp.loop.exit:
5408 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5409 // CHECK3-NEXT: ret void
5410 //
5411 //
5412 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
5413 // CHECK3-SAME: () #[[ATTR4]] {
5414 // CHECK3-NEXT: entry:
5415 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
5416 // CHECK3-NEXT: ret void
5417 //
5418 //
5419 // CHECK4-LABEL: define {{[^@]+}}@_Z3fooi
5420 // CHECK4-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
5421 // CHECK4-NEXT: entry:
5422 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
5423 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4
5424 // CHECK4-NEXT: [[AA:%.*]] = alloca i16, align 2
5425 // CHECK4-NEXT: [[B:%.*]] = alloca [10 x float], align 4
5426 // CHECK4-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
5427 // CHECK4-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
5428 // CHECK4-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8
5429 // CHECK4-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4
5430 // CHECK4-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 4
5431 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5432 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5433 // CHECK4-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
5434 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
5435 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED3:%.*]] = alloca i32, align 4
5436 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
5437 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
5438 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
5439 // CHECK4-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4
5440 // CHECK4-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
5441 // CHECK4-NEXT: [[AA_CASTED4:%.*]] = alloca i32, align 4
5442 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS6:%.*]] = alloca [1 x i8*], align 4
5443 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS7:%.*]] = alloca [1 x i8*], align 4
5444 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS8:%.*]] = alloca [1 x i8*], align 4
5445 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
5446 // CHECK4-NEXT: [[A_CASTED9:%.*]] = alloca i32, align 4
5447 // CHECK4-NEXT: [[AA_CASTED10:%.*]] = alloca i32, align 4
5448 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS12:%.*]] = alloca [2 x i8*], align 4
5449 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS13:%.*]] = alloca [2 x i8*], align 4
5450 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS14:%.*]] = alloca [2 x i8*], align 4
5451 // CHECK4-NEXT: [[_TMP15:%.*]] = alloca i32, align 4
5452 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
5453 // CHECK4-NEXT: [[A_CASTED19:%.*]] = alloca i32, align 4
5454 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED20:%.*]] = alloca i32, align 4
5455 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [10 x i8*], align 4
5456 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS24:%.*]] = alloca [10 x i8*], align 4
5457 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [10 x i8*], align 4
5458 // CHECK4-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [10 x i64], align 4
5459 // CHECK4-NEXT: [[_TMP26:%.*]] = alloca i32, align 4
5460 // CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
5461 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
5462 // CHECK4-NEXT: store i32 0, i32* [[A]], align 4
5463 // CHECK4-NEXT: store i16 0, i16* [[AA]], align 2
5464 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
5465 // CHECK4-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
5466 // CHECK4-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4
5467 // CHECK4-NEXT: [[VLA:%.*]] = alloca float, i32 [[TMP1]], align 4
5468 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4
5469 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
5470 // CHECK4-NEXT: [[TMP4:%.*]] = mul nuw i32 5, [[TMP3]]
5471 // CHECK4-NEXT: [[VLA1:%.*]] = alloca double, i32 [[TMP4]], align 8
5472 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[__VLA_EXPR1]], align 4
5473 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4
5474 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4
5475 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[A]], align 4
5476 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_2]], align 4
5477 // CHECK4-NEXT: [[TMP7:%.*]] = load i16, i16* [[AA]], align 2
5478 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
5479 // CHECK4-NEXT: store i16 [[TMP7]], i16* [[CONV]], align 2
5480 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[AA_CASTED]], align 4
5481 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5482 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
5483 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
5484 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5485 // CHECK4-NEXT: store i32 [[TMP11]], i32* [[DOTCAPTURE_EXPR__CASTED3]], align 4
5486 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED3]], align 4
5487 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5488 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32*
5489 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[TMP14]], align 4
5490 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5491 // CHECK4-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32*
5492 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[TMP16]], align 4
5493 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
5494 // CHECK4-NEXT: store i8* null, i8** [[TMP17]], align 4
5495 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
5496 // CHECK4-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32*
5497 // CHECK4-NEXT: store i32 [[TMP10]], i32* [[TMP19]], align 4
5498 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
5499 // CHECK4-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
5500 // CHECK4-NEXT: store i32 [[TMP10]], i32* [[TMP21]], align 4
5501 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
5502 // CHECK4-NEXT: store i8* null, i8** [[TMP22]], align 4
5503 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
5504 // CHECK4-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i32*
5505 // CHECK4-NEXT: store i32 [[TMP12]], i32* [[TMP24]], align 4
5506 // CHECK4-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
5507 // CHECK4-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i32*
5508 // CHECK4-NEXT: store i32 [[TMP12]], i32* [[TMP26]], align 4
5509 // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
5510 // CHECK4-NEXT: store i8* null, i8** [[TMP27]], align 4
5511 // CHECK4-NEXT: [[TMP28:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5512 // CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5513 // CHECK4-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 0
5514 // CHECK4-NEXT: [[TMP31:%.*]] = load i16, i16* [[AA]], align 2
5515 // CHECK4-NEXT: store i16 [[TMP31]], i16* [[TMP30]], align 4
5516 // CHECK4-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 1
5517 // CHECK4-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5518 // CHECK4-NEXT: store i32 [[TMP33]], i32* [[TMP32]], align 4
5519 // CHECK4-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 2
5520 // CHECK4-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5521 // CHECK4-NEXT: store i32 [[TMP35]], i32* [[TMP34]], align 4
5522 // CHECK4-NEXT: [[TMP36:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 1, i32 72, i32 12, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1)
5523 // CHECK4-NEXT: [[TMP37:%.*]] = bitcast i8* [[TMP36]] to %struct.kmp_task_t_with_privates*
5524 // CHECK4-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP37]], i32 0, i32 0
5525 // CHECK4-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP38]], i32 0, i32 0
5526 // CHECK4-NEXT: [[TMP40:%.*]] = load i8*, i8** [[TMP39]], align 4
5527 // CHECK4-NEXT: [[TMP41:%.*]] = bitcast %struct.anon* [[AGG_CAPTURED]] to i8*
5528 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP40]], i8* align 4 [[TMP41]], i32 12, i1 false)
5529 // CHECK4-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP37]], i32 0, i32 1
5530 // CHECK4-NEXT: [[TMP43:%.*]] = bitcast i8* [[TMP40]] to %struct.anon*
5531 // CHECK4-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 0
5532 // CHECK4-NEXT: [[TMP45:%.*]] = bitcast [3 x i64]* [[TMP44]] to i8*
5533 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP45]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false)
5534 // CHECK4-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 1
5535 // CHECK4-NEXT: [[TMP47:%.*]] = bitcast [3 x i8*]* [[TMP46]] to i8*
5536 // CHECK4-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP28]] to i8*
5537 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP47]], i8* align 4 [[TMP48]], i32 12, i1 false)
5538 // CHECK4-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 2
5539 // CHECK4-NEXT: [[TMP50:%.*]] = bitcast [3 x i8*]* [[TMP49]] to i8*
5540 // CHECK4-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP29]] to i8*
5541 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP50]], i8* align 4 [[TMP51]], i32 12, i1 false)
5542 // CHECK4-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 3
5543 // CHECK4-NEXT: [[TMP53:%.*]] = load i16, i16* [[AA]], align 2
5544 // CHECK4-NEXT: store i16 [[TMP53]], i16* [[TMP52]], align 4
5545 // CHECK4-NEXT: [[TMP54:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i8* [[TMP36]])
5546 // CHECK4-NEXT: [[TMP55:%.*]] = load i32, i32* [[A]], align 4
5547 // CHECK4-NEXT: store i32 [[TMP55]], i32* [[A_CASTED]], align 4
5548 // CHECK4-NEXT: [[TMP56:%.*]] = load i32, i32* [[A_CASTED]], align 4
5549 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107(i32 [[TMP56]]) #[[ATTR3:[0-9]+]]
5550 // CHECK4-NEXT: [[TMP57:%.*]] = load i16, i16* [[AA]], align 2
5551 // CHECK4-NEXT: [[CONV5:%.*]] = bitcast i32* [[AA_CASTED4]] to i16*
5552 // CHECK4-NEXT: store i16 [[TMP57]], i16* [[CONV5]], align 2
5553 // CHECK4-NEXT: [[TMP58:%.*]] = load i32, i32* [[AA_CASTED4]], align 4
5554 // CHECK4-NEXT: [[TMP59:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS6]], i32 0, i32 0
5555 // CHECK4-NEXT: [[TMP60:%.*]] = bitcast i8** [[TMP59]] to i32*
5556 // CHECK4-NEXT: store i32 [[TMP58]], i32* [[TMP60]], align 4
5557 // CHECK4-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS7]], i32 0, i32 0
5558 // CHECK4-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i32*
5559 // CHECK4-NEXT: store i32 [[TMP58]], i32* [[TMP62]], align 4
5560 // CHECK4-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS8]], i32 0, i32 0
5561 // CHECK4-NEXT: store i8* null, i8** [[TMP63]], align 4
5562 // CHECK4-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS6]], i32 0, i32 0
5563 // CHECK4-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS7]], i32 0, i32 0
5564 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
5565 // CHECK4-NEXT: [[TMP66:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113.region_id, i32 1, i8** [[TMP64]], i8** [[TMP65]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5566 // CHECK4-NEXT: [[TMP67:%.*]] = icmp ne i32 [[TMP66]], 0
5567 // CHECK4-NEXT: br i1 [[TMP67]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5568 // CHECK4: omp_offload.failed:
5569 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113(i32 [[TMP58]]) #[[ATTR3]]
5570 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]]
5571 // CHECK4: omp_offload.cont:
5572 // CHECK4-NEXT: [[TMP68:%.*]] = load i32, i32* [[A]], align 4
5573 // CHECK4-NEXT: store i32 [[TMP68]], i32* [[A_CASTED9]], align 4
5574 // CHECK4-NEXT: [[TMP69:%.*]] = load i32, i32* [[A_CASTED9]], align 4
5575 // CHECK4-NEXT: [[TMP70:%.*]] = load i16, i16* [[AA]], align 2
5576 // CHECK4-NEXT: [[CONV11:%.*]] = bitcast i32* [[AA_CASTED10]] to i16*
5577 // CHECK4-NEXT: store i16 [[TMP70]], i16* [[CONV11]], align 2
5578 // CHECK4-NEXT: [[TMP71:%.*]] = load i32, i32* [[AA_CASTED10]], align 4
5579 // CHECK4-NEXT: [[TMP72:%.*]] = load i32, i32* [[N_ADDR]], align 4
5580 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP72]], 10
5581 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5582 // CHECK4: omp_if.then:
5583 // CHECK4-NEXT: [[TMP73:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0
5584 // CHECK4-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i32*
5585 // CHECK4-NEXT: store i32 [[TMP69]], i32* [[TMP74]], align 4
5586 // CHECK4-NEXT: [[TMP75:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0
5587 // CHECK4-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32*
5588 // CHECK4-NEXT: store i32 [[TMP69]], i32* [[TMP76]], align 4
5589 // CHECK4-NEXT: [[TMP77:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i32 0, i32 0
5590 // CHECK4-NEXT: store i8* null, i8** [[TMP77]], align 4
5591 // CHECK4-NEXT: [[TMP78:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 1
5592 // CHECK4-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32*
5593 // CHECK4-NEXT: store i32 [[TMP71]], i32* [[TMP79]], align 4
5594 // CHECK4-NEXT: [[TMP80:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 1
5595 // CHECK4-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32*
5596 // CHECK4-NEXT: store i32 [[TMP71]], i32* [[TMP81]], align 4
5597 // CHECK4-NEXT: [[TMP82:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i32 0, i32 1
5598 // CHECK4-NEXT: store i8* null, i8** [[TMP82]], align 4
5599 // CHECK4-NEXT: [[TMP83:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0
5600 // CHECK4-NEXT: [[TMP84:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0
5601 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
5602 // CHECK4-NEXT: [[TMP85:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120.region_id, i32 2, i8** [[TMP83]], i8** [[TMP84]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5603 // CHECK4-NEXT: [[TMP86:%.*]] = icmp ne i32 [[TMP85]], 0
5604 // CHECK4-NEXT: br i1 [[TMP86]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
5605 // CHECK4: omp_offload.failed16:
5606 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i32 [[TMP69]], i32 [[TMP71]]) #[[ATTR3]]
5607 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT17]]
5608 // CHECK4: omp_offload.cont17:
5609 // CHECK4-NEXT: br label [[OMP_IF_END:%.*]]
5610 // CHECK4: omp_if.else:
5611 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i32 [[TMP69]], i32 [[TMP71]]) #[[ATTR3]]
5612 // CHECK4-NEXT: br label [[OMP_IF_END]]
5613 // CHECK4: omp_if.end:
5614 // CHECK4-NEXT: [[TMP87:%.*]] = load i32, i32* [[N_ADDR]], align 4
5615 // CHECK4-NEXT: store i32 [[TMP87]], i32* [[DOTCAPTURE_EXPR_18]], align 4
5616 // CHECK4-NEXT: [[TMP88:%.*]] = load i32, i32* [[A]], align 4
5617 // CHECK4-NEXT: store i32 [[TMP88]], i32* [[A_CASTED19]], align 4
5618 // CHECK4-NEXT: [[TMP89:%.*]] = load i32, i32* [[A_CASTED19]], align 4
5619 // CHECK4-NEXT: [[TMP90:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4
5620 // CHECK4-NEXT: store i32 [[TMP90]], i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4
5621 // CHECK4-NEXT: [[TMP91:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4
5622 // CHECK4-NEXT: [[TMP92:%.*]] = load i32, i32* [[N_ADDR]], align 4
5623 // CHECK4-NEXT: [[CMP21:%.*]] = icmp sgt i32 [[TMP92]], 20
5624 // CHECK4-NEXT: br i1 [[CMP21]], label [[OMP_IF_THEN22:%.*]], label [[OMP_IF_ELSE29:%.*]]
5625 // CHECK4: omp_if.then22:
5626 // CHECK4-NEXT: [[TMP93:%.*]] = mul nuw i32 [[TMP1]], 4
5627 // CHECK4-NEXT: [[TMP94:%.*]] = sext i32 [[TMP93]] to i64
5628 // CHECK4-NEXT: [[TMP95:%.*]] = mul nuw i32 5, [[TMP3]]
5629 // CHECK4-NEXT: [[TMP96:%.*]] = mul nuw i32 [[TMP95]], 8
5630 // CHECK4-NEXT: [[TMP97:%.*]] = sext i32 [[TMP96]] to i64
5631 // CHECK4-NEXT: [[TMP98:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
5632 // CHECK4-NEXT: [[TMP99:%.*]] = bitcast i8** [[TMP98]] to i32*
5633 // CHECK4-NEXT: store i32 [[TMP89]], i32* [[TMP99]], align 4
5634 // CHECK4-NEXT: [[TMP100:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
5635 // CHECK4-NEXT: [[TMP101:%.*]] = bitcast i8** [[TMP100]] to i32*
5636 // CHECK4-NEXT: store i32 [[TMP89]], i32* [[TMP101]], align 4
5637 // CHECK4-NEXT: [[TMP102:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
5638 // CHECK4-NEXT: store i64 4, i64* [[TMP102]], align 4
5639 // CHECK4-NEXT: [[TMP103:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 0
5640 // CHECK4-NEXT: store i8* null, i8** [[TMP103]], align 4
5641 // CHECK4-NEXT: [[TMP104:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 1
5642 // CHECK4-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to [10 x float]**
5643 // CHECK4-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP105]], align 4
5644 // CHECK4-NEXT: [[TMP106:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 1
5645 // CHECK4-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to [10 x float]**
5646 // CHECK4-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP107]], align 4
5647 // CHECK4-NEXT: [[TMP108:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
5648 // CHECK4-NEXT: store i64 40, i64* [[TMP108]], align 4
5649 // CHECK4-NEXT: [[TMP109:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 1
5650 // CHECK4-NEXT: store i8* null, i8** [[TMP109]], align 4
5651 // CHECK4-NEXT: [[TMP110:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 2
5652 // CHECK4-NEXT: [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i32*
5653 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP111]], align 4
5654 // CHECK4-NEXT: [[TMP112:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 2
5655 // CHECK4-NEXT: [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i32*
5656 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP113]], align 4
5657 // CHECK4-NEXT: [[TMP114:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
5658 // CHECK4-NEXT: store i64 4, i64* [[TMP114]], align 4
5659 // CHECK4-NEXT: [[TMP115:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 2
5660 // CHECK4-NEXT: store i8* null, i8** [[TMP115]], align 4
5661 // CHECK4-NEXT: [[TMP116:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 3
5662 // CHECK4-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to float**
5663 // CHECK4-NEXT: store float* [[VLA]], float** [[TMP117]], align 4
5664 // CHECK4-NEXT: [[TMP118:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 3
5665 // CHECK4-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to float**
5666 // CHECK4-NEXT: store float* [[VLA]], float** [[TMP119]], align 4
5667 // CHECK4-NEXT: [[TMP120:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
5668 // CHECK4-NEXT: store i64 [[TMP94]], i64* [[TMP120]], align 4
5669 // CHECK4-NEXT: [[TMP121:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 3
5670 // CHECK4-NEXT: store i8* null, i8** [[TMP121]], align 4
5671 // CHECK4-NEXT: [[TMP122:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 4
5672 // CHECK4-NEXT: [[TMP123:%.*]] = bitcast i8** [[TMP122]] to [5 x [10 x double]]**
5673 // CHECK4-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP123]], align 4
5674 // CHECK4-NEXT: [[TMP124:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 4
5675 // CHECK4-NEXT: [[TMP125:%.*]] = bitcast i8** [[TMP124]] to [5 x [10 x double]]**
5676 // CHECK4-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP125]], align 4
5677 // CHECK4-NEXT: [[TMP126:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
5678 // CHECK4-NEXT: store i64 400, i64* [[TMP126]], align 4
5679 // CHECK4-NEXT: [[TMP127:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 4
5680 // CHECK4-NEXT: store i8* null, i8** [[TMP127]], align 4
5681 // CHECK4-NEXT: [[TMP128:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 5
5682 // CHECK4-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to i32*
5683 // CHECK4-NEXT: store i32 5, i32* [[TMP129]], align 4
5684 // CHECK4-NEXT: [[TMP130:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 5
5685 // CHECK4-NEXT: [[TMP131:%.*]] = bitcast i8** [[TMP130]] to i32*
5686 // CHECK4-NEXT: store i32 5, i32* [[TMP131]], align 4
5687 // CHECK4-NEXT: [[TMP132:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 5
5688 // CHECK4-NEXT: store i64 4, i64* [[TMP132]], align 4
5689 // CHECK4-NEXT: [[TMP133:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 5
5690 // CHECK4-NEXT: store i8* null, i8** [[TMP133]], align 4
5691 // CHECK4-NEXT: [[TMP134:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 6
5692 // CHECK4-NEXT: [[TMP135:%.*]] = bitcast i8** [[TMP134]] to i32*
5693 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TMP135]], align 4
5694 // CHECK4-NEXT: [[TMP136:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 6
5695 // CHECK4-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i32*
5696 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TMP137]], align 4
5697 // CHECK4-NEXT: [[TMP138:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 6
5698 // CHECK4-NEXT: store i64 4, i64* [[TMP138]], align 4
5699 // CHECK4-NEXT: [[TMP139:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 6
5700 // CHECK4-NEXT: store i8* null, i8** [[TMP139]], align 4
5701 // CHECK4-NEXT: [[TMP140:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 7
5702 // CHECK4-NEXT: [[TMP141:%.*]] = bitcast i8** [[TMP140]] to double**
5703 // CHECK4-NEXT: store double* [[VLA1]], double** [[TMP141]], align 4
5704 // CHECK4-NEXT: [[TMP142:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 7
5705 // CHECK4-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to double**
5706 // CHECK4-NEXT: store double* [[VLA1]], double** [[TMP143]], align 4
5707 // CHECK4-NEXT: [[TMP144:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7
5708 // CHECK4-NEXT: store i64 [[TMP97]], i64* [[TMP144]], align 4
5709 // CHECK4-NEXT: [[TMP145:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 7
5710 // CHECK4-NEXT: store i8* null, i8** [[TMP145]], align 4
5711 // CHECK4-NEXT: [[TMP146:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 8
5712 // CHECK4-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to %struct.TT**
5713 // CHECK4-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP147]], align 4
5714 // CHECK4-NEXT: [[TMP148:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 8
5715 // CHECK4-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to %struct.TT**
5716 // CHECK4-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP149]], align 4
5717 // CHECK4-NEXT: [[TMP150:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 8
5718 // CHECK4-NEXT: store i64 12, i64* [[TMP150]], align 4
5719 // CHECK4-NEXT: [[TMP151:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 8
5720 // CHECK4-NEXT: store i8* null, i8** [[TMP151]], align 4
5721 // CHECK4-NEXT: [[TMP152:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 9
5722 // CHECK4-NEXT: [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32*
5723 // CHECK4-NEXT: store i32 [[TMP91]], i32* [[TMP153]], align 4
5724 // CHECK4-NEXT: [[TMP154:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 9
5725 // CHECK4-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32*
5726 // CHECK4-NEXT: store i32 [[TMP91]], i32* [[TMP155]], align 4
5727 // CHECK4-NEXT: [[TMP156:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 9
5728 // CHECK4-NEXT: store i64 4, i64* [[TMP156]], align 4
5729 // CHECK4-NEXT: [[TMP157:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 9
5730 // CHECK4-NEXT: store i8* null, i8** [[TMP157]], align 4
5731 // CHECK4-NEXT: [[TMP158:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
5732 // CHECK4-NEXT: [[TMP159:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
5733 // CHECK4-NEXT: [[TMP160:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
5734 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
5735 // CHECK4-NEXT: [[TMP161:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145.region_id, i32 10, i8** [[TMP158]], i8** [[TMP159]], i64* [[TMP160]], i64* getelementptr inbounds ([10 x i64], [10 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5736 // CHECK4-NEXT: [[TMP162:%.*]] = icmp ne i32 [[TMP161]], 0
5737 // CHECK4-NEXT: br i1 [[TMP162]], label [[OMP_OFFLOAD_FAILED27:%.*]], label [[OMP_OFFLOAD_CONT28:%.*]]
5738 // CHECK4: omp_offload.failed27:
5739 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i32 [[TMP89]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]], i32 [[TMP91]]) #[[ATTR3]]
5740 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT28]]
5741 // CHECK4: omp_offload.cont28:
5742 // CHECK4-NEXT: br label [[OMP_IF_END30:%.*]]
5743 // CHECK4: omp_if.else29:
5744 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i32 [[TMP89]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]], i32 [[TMP91]]) #[[ATTR3]]
5745 // CHECK4-NEXT: br label [[OMP_IF_END30]]
5746 // CHECK4: omp_if.end30:
5747 // CHECK4-NEXT: [[TMP163:%.*]] = load i32, i32* [[A]], align 4
5748 // CHECK4-NEXT: [[TMP164:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
5749 // CHECK4-NEXT: call void @llvm.stackrestore(i8* [[TMP164]])
5750 // CHECK4-NEXT: ret i32 [[TMP163]]
5751 //
5752 //
5753 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103
5754 // CHECK4-SAME: (i32 [[AA:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]], i32 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR2:[0-9]+]] {
5755 // CHECK4-NEXT: entry:
5756 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
5757 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
5758 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4
5759 // CHECK4-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
5760 // CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
5761 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
5762 // CHECK4-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5763 // CHECK4-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
5764 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
5765 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5766 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
5767 // CHECK4-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]])
5768 // CHECK4-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4
5769 // CHECK4-NEXT: [[CONV3:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
5770 // CHECK4-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2
5771 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4
5772 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP4]])
5773 // CHECK4-NEXT: ret void
5774 //
5775 //
5776 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
5777 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[AA:%.*]]) #[[ATTR2]] {
5778 // CHECK4-NEXT: entry:
5779 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5780 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5781 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
5782 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5783 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
5784 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5785 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5786 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5787 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5788 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
5789 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5790 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5791 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
5792 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
5793 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5794 // CHECK4-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
5795 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5796 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5797 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5798 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5799 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5800 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5801 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
5802 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5803 // CHECK4: cond.true:
5804 // CHECK4-NEXT: br label [[COND_END:%.*]]
5805 // CHECK4: cond.false:
5806 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5807 // CHECK4-NEXT: br label [[COND_END]]
5808 // CHECK4: cond.end:
5809 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5810 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5811 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5812 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5813 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5814 // CHECK4: omp.inner.for.cond:
5815 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5816 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5817 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5818 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5819 // CHECK4: omp.inner.for.body:
5820 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5821 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
5822 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5823 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
5824 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5825 // CHECK4: omp.body.continue:
5826 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5827 // CHECK4: omp.inner.for.inc:
5828 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5829 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
5830 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
5831 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
5832 // CHECK4: omp.inner.for.end:
5833 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5834 // CHECK4: omp.loop.exit:
5835 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5836 // CHECK4-NEXT: ret void
5837 //
5838 //
5839 // CHECK4-LABEL: define {{[^@]+}}@.omp_task_privates_map.
5840 // CHECK4-SAME: (%struct..kmp_privates.t* noalias [[TMP0:%.*]], i16** noalias [[TMP1:%.*]], [3 x i8*]** noalias [[TMP2:%.*]], [3 x i8*]** noalias [[TMP3:%.*]], [3 x i64]** noalias [[TMP4:%.*]]) #[[ATTR4:[0-9]+]] {
5841 // CHECK4-NEXT: entry:
5842 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 4
5843 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i16**, align 4
5844 // CHECK4-NEXT: [[DOTADDR2:%.*]] = alloca [3 x i8*]**, align 4
5845 // CHECK4-NEXT: [[DOTADDR3:%.*]] = alloca [3 x i8*]**, align 4
5846 // CHECK4-NEXT: [[DOTADDR4:%.*]] = alloca [3 x i64]**, align 4
5847 // CHECK4-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 4
5848 // CHECK4-NEXT: store i16** [[TMP1]], i16*** [[DOTADDR1]], align 4
5849 // CHECK4-NEXT: store [3 x i8*]** [[TMP2]], [3 x i8*]*** [[DOTADDR2]], align 4
5850 // CHECK4-NEXT: store [3 x i8*]** [[TMP3]], [3 x i8*]*** [[DOTADDR3]], align 4
5851 // CHECK4-NEXT: store [3 x i64]** [[TMP4]], [3 x i64]*** [[DOTADDR4]], align 4
5852 // CHECK4-NEXT: [[TMP5:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 4
5853 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 0
5854 // CHECK4-NEXT: [[TMP7:%.*]] = load [3 x i64]**, [3 x i64]*** [[DOTADDR4]], align 4
5855 // CHECK4-NEXT: store [3 x i64]* [[TMP6]], [3 x i64]** [[TMP7]], align 4
5856 // CHECK4-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 1
5857 // CHECK4-NEXT: [[TMP9:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR2]], align 4
5858 // CHECK4-NEXT: store [3 x i8*]* [[TMP8]], [3 x i8*]** [[TMP9]], align 4
5859 // CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 2
5860 // CHECK4-NEXT: [[TMP11:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR3]], align 4
5861 // CHECK4-NEXT: store [3 x i8*]* [[TMP10]], [3 x i8*]** [[TMP11]], align 4
5862 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 3
5863 // CHECK4-NEXT: [[TMP13:%.*]] = load i16**, i16*** [[DOTADDR1]], align 4
5864 // CHECK4-NEXT: store i16* [[TMP12]], i16** [[TMP13]], align 4
5865 // CHECK4-NEXT: ret void
5866 //
5867 //
5868 // CHECK4-LABEL: define {{[^@]+}}@.omp_task_entry.
5869 // CHECK4-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
5870 // CHECK4-NEXT: entry:
5871 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4
5872 // CHECK4-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 4
5873 // CHECK4-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 4
5874 // CHECK4-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 4
5875 // CHECK4-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 4
5876 // CHECK4-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon*, align 4
5877 // CHECK4-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca i16*, align 4
5878 // CHECK4-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca [3 x i8*]*, align 4
5879 // CHECK4-NEXT: [[DOTFIRSTPRIV_PTR_ADDR2_I:%.*]] = alloca [3 x i8*]*, align 4
5880 // CHECK4-NEXT: [[DOTFIRSTPRIV_PTR_ADDR3_I:%.*]] = alloca [3 x i64]*, align 4
5881 // CHECK4-NEXT: [[AA_CASTED_I:%.*]] = alloca i32, align 4
5882 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED_I:%.*]] = alloca i32, align 4
5883 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED4_I:%.*]] = alloca i32, align 4
5884 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4
5885 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 4
5886 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4
5887 // CHECK4-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4
5888 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4
5889 // CHECK4-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4
5890 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0
5891 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2
5892 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0
5893 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
5894 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon*
5895 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 1
5896 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8*
5897 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8*
5898 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]])
5899 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META16:![0-9]+]])
5900 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]])
5901 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]])
5902 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !22
5903 // CHECK4-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 4, !noalias !22
5904 // CHECK4-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 4, !noalias !22
5905 // CHECK4-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 4, !noalias !22
5906 // CHECK4-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 4, !noalias !22
5907 // CHECK4-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 4, !noalias !22
5908 // CHECK4-NEXT: [[TMP12:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 4, !noalias !22
5909 // CHECK4-NEXT: [[TMP13:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 4, !noalias !22
5910 // CHECK4-NEXT: [[TMP14:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 4, !noalias !22
5911 // CHECK4-NEXT: [[TMP15:%.*]] = bitcast void (i8*, ...)* [[TMP13]] to void (i8*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)*
5912 // CHECK4-NEXT: call void [[TMP15]](i8* [[TMP14]], i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]]) #[[ATTR3]]
5913 // CHECK4-NEXT: [[TMP16:%.*]] = load i16*, i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 4, !noalias !22
5914 // CHECK4-NEXT: [[TMP17:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 4, !noalias !22
5915 // CHECK4-NEXT: [[TMP18:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 4, !noalias !22
5916 // CHECK4-NEXT: [[TMP19:%.*]] = load [3 x i64]*, [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 4, !noalias !22
5917 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP17]], i32 0, i32 0
5918 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP18]], i32 0, i32 0
5919 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[TMP19]], i32 0, i32 0
5920 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP12]], i32 0, i32 1
5921 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2
5922 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP23]], align 4
5923 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP24]], align 4
5924 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) #[[ATTR3]]
5925 // CHECK4-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP25]], i32 [[TMP26]], i32 0, i8* null, i32 0, i8* null) #[[ATTR3]]
5926 // CHECK4-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
5927 // CHECK4-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]]
5928 // CHECK4: omp_offload.failed.i:
5929 // CHECK4-NEXT: [[TMP29:%.*]] = load i16, i16* [[TMP16]], align 2
5930 // CHECK4-NEXT: [[CONV_I:%.*]] = bitcast i32* [[AA_CASTED_I]] to i16*
5931 // CHECK4-NEXT: store i16 [[TMP29]], i16* [[CONV_I]], align 2, !noalias !22
5932 // CHECK4-NEXT: [[TMP30:%.*]] = load i32, i32* [[AA_CASTED_I]], align 4, !noalias !22
5933 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP23]], align 4
5934 // CHECK4-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR__CASTED_I]], align 4, !noalias !22
5935 // CHECK4-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED_I]], align 4, !noalias !22
5936 // CHECK4-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP24]], align 4
5937 // CHECK4-NEXT: store i32 [[TMP33]], i32* [[DOTCAPTURE_EXPR__CASTED4_I]], align 4, !noalias !22
5938 // CHECK4-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED4_I]], align 4, !noalias !22
5939 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103(i32 [[TMP30]], i32 [[TMP32]], i32 [[TMP34]]) #[[ATTR3]]
5940 // CHECK4-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]]
5941 // CHECK4: .omp_outlined..1.exit:
5942 // CHECK4-NEXT: ret i32 0
5943 //
5944 //
5945 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107
5946 // CHECK4-SAME: (i32 [[A:%.*]]) #[[ATTR2]] {
5947 // CHECK4-NEXT: entry:
5948 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
5949 // CHECK4-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
5950 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
5951 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
5952 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4
5953 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
5954 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP1]])
5955 // CHECK4-NEXT: ret void
5956 //
5957 //
5958 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2
5959 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]]) #[[ATTR2]] {
5960 // CHECK4-NEXT: entry:
5961 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5962 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5963 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
5964 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5965 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
5966 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5967 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5968 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5969 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5970 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
5971 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5972 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5973 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
5974 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5975 // CHECK4-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
5976 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5977 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5978 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5979 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5980 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5981 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5982 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
5983 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5984 // CHECK4: cond.true:
5985 // CHECK4-NEXT: br label [[COND_END:%.*]]
5986 // CHECK4: cond.false:
5987 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5988 // CHECK4-NEXT: br label [[COND_END]]
5989 // CHECK4: cond.end:
5990 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5991 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5992 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5993 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5994 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5995 // CHECK4: omp.inner.for.cond:
5996 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5997 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5998 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5999 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6000 // CHECK4: omp.inner.for.body:
6001 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6002 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
6003 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6004 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6005 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4
6006 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
6007 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4
6008 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6009 // CHECK4: omp.body.continue:
6010 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6011 // CHECK4: omp.inner.for.inc:
6012 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6013 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
6014 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6015 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
6016 // CHECK4: omp.inner.for.end:
6017 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6018 // CHECK4: omp.loop.exit:
6019 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6020 // CHECK4-NEXT: ret void
6021 //
6022 //
6023 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113
6024 // CHECK4-SAME: (i32 [[AA:%.*]]) #[[ATTR2]] {
6025 // CHECK4-NEXT: entry:
6026 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
6027 // CHECK4-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
6028 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
6029 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
6030 // CHECK4-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
6031 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
6032 // CHECK4-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2
6033 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[AA_CASTED]], align 4
6034 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP1]])
6035 // CHECK4-NEXT: ret void
6036 //
6037 //
6038 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3
6039 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[AA:%.*]]) #[[ATTR2]] {
6040 // CHECK4-NEXT: entry:
6041 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6042 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6043 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
6044 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6045 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
6046 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6047 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6048 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6049 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6050 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
6051 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6052 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6053 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
6054 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
6055 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6056 // CHECK4-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6057 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6058 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6059 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6060 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6061 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6062 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6063 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
6064 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6065 // CHECK4: cond.true:
6066 // CHECK4-NEXT: br label [[COND_END:%.*]]
6067 // CHECK4: cond.false:
6068 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6069 // CHECK4-NEXT: br label [[COND_END]]
6070 // CHECK4: cond.end:
6071 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6072 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6073 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6074 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6075 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6076 // CHECK4: omp.inner.for.cond:
6077 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6078 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6079 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6080 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6081 // CHECK4: omp.inner.for.body:
6082 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6083 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
6084 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6085 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6086 // CHECK4-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 4
6087 // CHECK4-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32
6088 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1
6089 // CHECK4-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16
6090 // CHECK4-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 4
6091 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6092 // CHECK4: omp.body.continue:
6093 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6094 // CHECK4: omp.inner.for.inc:
6095 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6096 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1
6097 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
6098 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
6099 // CHECK4: omp.inner.for.end:
6100 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6101 // CHECK4: omp.loop.exit:
6102 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6103 // CHECK4-NEXT: ret void
6104 //
6105 //
6106 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120
6107 // CHECK4-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR2]] {
6108 // CHECK4-NEXT: entry:
6109 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
6110 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
6111 // CHECK4-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
6112 // CHECK4-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
6113 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
6114 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
6115 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
6116 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
6117 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4
6118 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
6119 // CHECK4-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV]], align 4
6120 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
6121 // CHECK4-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2
6122 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4
6123 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]])
6124 // CHECK4-NEXT: ret void
6125 //
6126 //
6127 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..6
6128 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR2]] {
6129 // CHECK4-NEXT: entry:
6130 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6131 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6132 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
6133 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
6134 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6135 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
6136 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6137 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6138 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6139 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6140 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
6141 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6142 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6143 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
6144 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
6145 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
6146 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6147 // CHECK4-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6148 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6149 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6150 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6151 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6152 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6153 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6154 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
6155 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6156 // CHECK4: cond.true:
6157 // CHECK4-NEXT: br label [[COND_END:%.*]]
6158 // CHECK4: cond.false:
6159 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6160 // CHECK4-NEXT: br label [[COND_END]]
6161 // CHECK4: cond.end:
6162 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6163 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6164 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6165 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6166 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6167 // CHECK4: omp.inner.for.cond:
6168 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6169 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6170 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6171 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6172 // CHECK4: omp.inner.for.body:
6173 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6174 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
6175 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6176 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6177 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4
6178 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
6179 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4
6180 // CHECK4-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV]], align 4
6181 // CHECK4-NEXT: [[CONV3:%.*]] = sext i16 [[TMP9]] to i32
6182 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1
6183 // CHECK4-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16
6184 // CHECK4-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 4
6185 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6186 // CHECK4: omp.body.continue:
6187 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6188 // CHECK4: omp.inner.for.inc:
6189 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6190 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1
6191 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
6192 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
6193 // CHECK4: omp.inner.for.end:
6194 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6195 // CHECK4: omp.loop.exit:
6196 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6197 // CHECK4-NEXT: ret void
6198 //
6199 //
6200 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145
6201 // CHECK4-SAME: (i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
6202 // CHECK4-NEXT: entry:
6203 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
6204 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4
6205 // CHECK4-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
6206 // CHECK4-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4
6207 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4
6208 // CHECK4-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
6209 // CHECK4-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4
6210 // CHECK4-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4
6211 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4
6212 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
6213 // CHECK4-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
6214 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
6215 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
6216 // CHECK4-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4
6217 // CHECK4-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
6218 // CHECK4-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4
6219 // CHECK4-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4
6220 // CHECK4-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
6221 // CHECK4-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4
6222 // CHECK4-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4
6223 // CHECK4-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4
6224 // CHECK4-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
6225 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4
6226 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
6227 // CHECK4-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4
6228 // CHECK4-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4
6229 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
6230 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4
6231 // CHECK4-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4
6232 // CHECK4-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4
6233 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4
6234 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[A_CASTED]], align 4
6235 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_CASTED]], align 4
6236 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
6237 // CHECK4-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
6238 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
6239 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [10 x float]*, i32, float*, [5 x [10 x double]]*, i32, i32, double*, %struct.TT*, i32)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP9]], [10 x float]* [[TMP0]], i32 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i32 [[TMP4]], i32 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i32 [[TMP11]])
6240 // CHECK4-NEXT: ret void
6241 //
6242 //
6243 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..9
6244 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
6245 // CHECK4-NEXT: entry:
6246 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6247 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6248 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
6249 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4
6250 // CHECK4-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
6251 // CHECK4-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4
6252 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4
6253 // CHECK4-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
6254 // CHECK4-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4
6255 // CHECK4-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4
6256 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4
6257 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
6258 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6259 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
6260 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6261 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6262 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6263 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6264 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
6265 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6266 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6267 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
6268 // CHECK4-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4
6269 // CHECK4-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
6270 // CHECK4-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4
6271 // CHECK4-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4
6272 // CHECK4-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
6273 // CHECK4-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4
6274 // CHECK4-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4
6275 // CHECK4-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4
6276 // CHECK4-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
6277 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4
6278 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
6279 // CHECK4-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4
6280 // CHECK4-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4
6281 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
6282 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4
6283 // CHECK4-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4
6284 // CHECK4-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4
6285 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6286 // CHECK4-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6287 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6288 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6289 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
6290 // CHECK4-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6291 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
6292 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]])
6293 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
6294 // CHECK4: omp.dispatch.cond:
6295 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6296 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9
6297 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6298 // CHECK4: cond.true:
6299 // CHECK4-NEXT: br label [[COND_END:%.*]]
6300 // CHECK4: cond.false:
6301 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6302 // CHECK4-NEXT: br label [[COND_END]]
6303 // CHECK4: cond.end:
6304 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
6305 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6306 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6307 // CHECK4-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
6308 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6309 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6310 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
6311 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6312 // CHECK4: omp.dispatch.body:
6313 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6314 // CHECK4: omp.inner.for.cond:
6315 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
6316 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !23
6317 // CHECK4-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
6318 // CHECK4-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6319 // CHECK4: omp.inner.for.body:
6320 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
6321 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
6322 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6323 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !23
6324 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group !23
6325 // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
6326 // CHECK4-NEXT: store i32 [[ADD7]], i32* [[A_ADDR]], align 4, !llvm.access.group !23
6327 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i32 0, i32 2
6328 // CHECK4-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !23
6329 // CHECK4-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double
6330 // CHECK4-NEXT: [[ADD8:%.*]] = fadd double [[CONV]], 1.000000e+00
6331 // CHECK4-NEXT: [[CONV9:%.*]] = fptrunc double [[ADD8]] to float
6332 // CHECK4-NEXT: store float [[CONV9]], float* [[ARRAYIDX]], align 4, !llvm.access.group !23
6333 // CHECK4-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, float* [[TMP2]], i32 3
6334 // CHECK4-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX10]], align 4, !llvm.access.group !23
6335 // CHECK4-NEXT: [[CONV11:%.*]] = fpext float [[TMP21]] to double
6336 // CHECK4-NEXT: [[ADD12:%.*]] = fadd double [[CONV11]], 1.000000e+00
6337 // CHECK4-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float
6338 // CHECK4-NEXT: store float [[CONV13]], float* [[ARRAYIDX10]], align 4, !llvm.access.group !23
6339 // CHECK4-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i32 0, i32 1
6340 // CHECK4-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX14]], i32 0, i32 2
6341 // CHECK4-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX15]], align 8, !llvm.access.group !23
6342 // CHECK4-NEXT: [[ADD16:%.*]] = fadd double [[TMP22]], 1.000000e+00
6343 // CHECK4-NEXT: store double [[ADD16]], double* [[ARRAYIDX15]], align 8, !llvm.access.group !23
6344 // CHECK4-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP5]]
6345 // CHECK4-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP6]], i32 [[TMP23]]
6346 // CHECK4-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX17]], i32 3
6347 // CHECK4-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX18]], align 8, !llvm.access.group !23
6348 // CHECK4-NEXT: [[ADD19:%.*]] = fadd double [[TMP24]], 1.000000e+00
6349 // CHECK4-NEXT: store double [[ADD19]], double* [[ARRAYIDX18]], align 8, !llvm.access.group !23
6350 // CHECK4-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0
6351 // CHECK4-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4, !llvm.access.group !23
6352 // CHECK4-NEXT: [[ADD20:%.*]] = add nsw i64 [[TMP25]], 1
6353 // CHECK4-NEXT: store i64 [[ADD20]], i64* [[X]], align 4, !llvm.access.group !23
6354 // CHECK4-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1
6355 // CHECK4-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4, !llvm.access.group !23
6356 // CHECK4-NEXT: [[CONV21:%.*]] = sext i8 [[TMP26]] to i32
6357 // CHECK4-NEXT: [[ADD22:%.*]] = add nsw i32 [[CONV21]], 1
6358 // CHECK4-NEXT: [[CONV23:%.*]] = trunc i32 [[ADD22]] to i8
6359 // CHECK4-NEXT: store i8 [[CONV23]], i8* [[Y]], align 4, !llvm.access.group !23
6360 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6361 // CHECK4: omp.body.continue:
6362 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6363 // CHECK4: omp.inner.for.inc:
6364 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
6365 // CHECK4-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP27]], 1
6366 // CHECK4-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
6367 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
6368 // CHECK4: omp.inner.for.end:
6369 // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
6370 // CHECK4: omp.dispatch.inc:
6371 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6372 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6373 // CHECK4-NEXT: [[ADD25:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
6374 // CHECK4-NEXT: store i32 [[ADD25]], i32* [[DOTOMP_LB]], align 4
6375 // CHECK4-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6376 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6377 // CHECK4-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
6378 // CHECK4-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_UB]], align 4
6379 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]]
6380 // CHECK4: omp.dispatch.end:
6381 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]])
6382 // CHECK4-NEXT: ret void
6383 //
6384 //
6385 // CHECK4-LABEL: define {{[^@]+}}@_Z3bari
6386 // CHECK4-SAME: (i32 [[N:%.*]]) #[[ATTR0]] {
6387 // CHECK4-NEXT: entry:
6388 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
6389 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4
6390 // CHECK4-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4
6391 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
6392 // CHECK4-NEXT: store i32 0, i32* [[A]], align 4
6393 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
6394 // CHECK4-NEXT: [[CALL:%.*]] = call i32 @_Z3fooi(i32 [[TMP0]])
6395 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
6396 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
6397 // CHECK4-NEXT: store i32 [[ADD]], i32* [[A]], align 4
6398 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
6399 // CHECK4-NEXT: [[CALL1:%.*]] = call i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 4 dereferenceable(8) [[S]], i32 [[TMP2]])
6400 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4
6401 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
6402 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[A]], align 4
6403 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
6404 // CHECK4-NEXT: [[CALL3:%.*]] = call i32 @_ZL7fstatici(i32 [[TMP4]])
6405 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4
6406 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
6407 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[A]], align 4
6408 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
6409 // CHECK4-NEXT: [[CALL5:%.*]] = call i32 @_Z9ftemplateIiET_i(i32 [[TMP6]])
6410 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4
6411 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]]
6412 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[A]], align 4
6413 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4
6414 // CHECK4-NEXT: ret i32 [[TMP8]]
6415 //
6416 //
6417 // CHECK4-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
6418 // CHECK4-SAME: (%struct.S1* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[N:%.*]]) #[[ATTR0]] comdat align 2 {
6419 // CHECK4-NEXT: entry:
6420 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
6421 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
6422 // CHECK4-NEXT: [[B:%.*]] = alloca i32, align 4
6423 // CHECK4-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
6424 // CHECK4-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
6425 // CHECK4-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4
6426 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
6427 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
6428 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
6429 // CHECK4-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4
6430 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
6431 // CHECK4-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
6432 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
6433 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
6434 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
6435 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
6436 // CHECK4-NEXT: store i32 [[ADD]], i32* [[B]], align 4
6437 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
6438 // CHECK4-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
6439 // CHECK4-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4
6440 // CHECK4-NEXT: [[TMP3:%.*]] = mul nuw i32 2, [[TMP1]]
6441 // CHECK4-NEXT: [[VLA:%.*]] = alloca i16, i32 [[TMP3]], align 2
6442 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4
6443 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[B]], align 4
6444 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4
6445 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4
6446 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
6447 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 60
6448 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
6449 // CHECK4: omp_if.then:
6450 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
6451 // CHECK4-NEXT: [[TMP7:%.*]] = mul nuw i32 2, [[TMP1]]
6452 // CHECK4-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP7]], 2
6453 // CHECK4-NEXT: [[TMP9:%.*]] = sext i32 [[TMP8]] to i64
6454 // CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6455 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to %struct.S1**
6456 // CHECK4-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP11]], align 4
6457 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6458 // CHECK4-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to double**
6459 // CHECK4-NEXT: store double* [[A]], double** [[TMP13]], align 4
6460 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
6461 // CHECK4-NEXT: store i64 8, i64* [[TMP14]], align 4
6462 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
6463 // CHECK4-NEXT: store i8* null, i8** [[TMP15]], align 4
6464 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
6465 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
6466 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[TMP17]], align 4
6467 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
6468 // CHECK4-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32*
6469 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[TMP19]], align 4
6470 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
6471 // CHECK4-NEXT: store i64 4, i64* [[TMP20]], align 4
6472 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
6473 // CHECK4-NEXT: store i8* null, i8** [[TMP21]], align 4
6474 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
6475 // CHECK4-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
6476 // CHECK4-NEXT: store i32 2, i32* [[TMP23]], align 4
6477 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
6478 // CHECK4-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32*
6479 // CHECK4-NEXT: store i32 2, i32* [[TMP25]], align 4
6480 // CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
6481 // CHECK4-NEXT: store i64 4, i64* [[TMP26]], align 4
6482 // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
6483 // CHECK4-NEXT: store i8* null, i8** [[TMP27]], align 4
6484 // CHECK4-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
6485 // CHECK4-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32*
6486 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP29]], align 4
6487 // CHECK4-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
6488 // CHECK4-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i32*
6489 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP31]], align 4
6490 // CHECK4-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
6491 // CHECK4-NEXT: store i64 4, i64* [[TMP32]], align 4
6492 // CHECK4-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
6493 // CHECK4-NEXT: store i8* null, i8** [[TMP33]], align 4
6494 // CHECK4-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
6495 // CHECK4-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i16**
6496 // CHECK4-NEXT: store i16* [[VLA]], i16** [[TMP35]], align 4
6497 // CHECK4-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
6498 // CHECK4-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i16**
6499 // CHECK4-NEXT: store i16* [[VLA]], i16** [[TMP37]], align 4
6500 // CHECK4-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
6501 // CHECK4-NEXT: store i64 [[TMP9]], i64* [[TMP38]], align 4
6502 // CHECK4-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
6503 // CHECK4-NEXT: store i8* null, i8** [[TMP39]], align 4
6504 // CHECK4-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6505 // CHECK4-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6506 // CHECK4-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
6507 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
6508 // CHECK4-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218.region_id, i32 5, i8** [[TMP40]], i8** [[TMP41]], i64* [[TMP42]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6509 // CHECK4-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
6510 // CHECK4-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6511 // CHECK4: omp_offload.failed:
6512 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]]
6513 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]]
6514 // CHECK4: omp_offload.cont:
6515 // CHECK4-NEXT: br label [[OMP_IF_END:%.*]]
6516 // CHECK4: omp_if.else:
6517 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]]
6518 // CHECK4-NEXT: br label [[OMP_IF_END]]
6519 // CHECK4: omp_if.end:
6520 // CHECK4-NEXT: [[TMP45:%.*]] = mul nsw i32 1, [[TMP1]]
6521 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i32 [[TMP45]]
6522 // CHECK4-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1
6523 // CHECK4-NEXT: [[TMP46:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2
6524 // CHECK4-NEXT: [[CONV:%.*]] = sext i16 [[TMP46]] to i32
6525 // CHECK4-NEXT: [[TMP47:%.*]] = load i32, i32* [[B]], align 4
6526 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV]], [[TMP47]]
6527 // CHECK4-NEXT: [[TMP48:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
6528 // CHECK4-NEXT: call void @llvm.stackrestore(i8* [[TMP48]])
6529 // CHECK4-NEXT: ret i32 [[ADD3]]
6530 //
6531 //
6532 // CHECK4-LABEL: define {{[^@]+}}@_ZL7fstatici
6533 // CHECK4-SAME: (i32 [[N:%.*]]) #[[ATTR0]] {
6534 // CHECK4-NEXT: entry:
6535 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
6536 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4
6537 // CHECK4-NEXT: [[AA:%.*]] = alloca i16, align 2
6538 // CHECK4-NEXT: [[AAA:%.*]] = alloca i8, align 1
6539 // CHECK4-NEXT: [[B:%.*]] = alloca [10 x i32], align 4
6540 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
6541 // CHECK4-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
6542 // CHECK4-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
6543 // CHECK4-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4
6544 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
6545 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
6546 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
6547 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
6548 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6549 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
6550 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
6551 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
6552 // CHECK4-NEXT: store i32 0, i32* [[A]], align 4
6553 // CHECK4-NEXT: store i16 0, i16* [[AA]], align 2
6554 // CHECK4-NEXT: store i8 0, i8* [[AAA]], align 1
6555 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
6556 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[N_CASTED]], align 4
6557 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_CASTED]], align 4
6558 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4
6559 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[A_CASTED]], align 4
6560 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_CASTED]], align 4
6561 // CHECK4-NEXT: [[TMP4:%.*]] = load i16, i16* [[AA]], align 2
6562 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
6563 // CHECK4-NEXT: store i16 [[TMP4]], i16* [[CONV]], align 2
6564 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[AA_CASTED]], align 4
6565 // CHECK4-NEXT: [[TMP6:%.*]] = load i8, i8* [[AAA]], align 1
6566 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_CASTED]] to i8*
6567 // CHECK4-NEXT: store i8 [[TMP6]], i8* [[CONV1]], align 1
6568 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[AAA_CASTED]], align 4
6569 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[N_ADDR]], align 4
6570 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 50
6571 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
6572 // CHECK4: omp_if.then:
6573 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6574 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
6575 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP10]], align 4
6576 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6577 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
6578 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP12]], align 4
6579 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
6580 // CHECK4-NEXT: store i8* null, i8** [[TMP13]], align 4
6581 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
6582 // CHECK4-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
6583 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TMP15]], align 4
6584 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
6585 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
6586 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TMP17]], align 4
6587 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
6588 // CHECK4-NEXT: store i8* null, i8** [[TMP18]], align 4
6589 // CHECK4-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
6590 // CHECK4-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32*
6591 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[TMP20]], align 4
6592 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
6593 // CHECK4-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i32*
6594 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[TMP22]], align 4
6595 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
6596 // CHECK4-NEXT: store i8* null, i8** [[TMP23]], align 4
6597 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
6598 // CHECK4-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32*
6599 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[TMP25]], align 4
6600 // CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
6601 // CHECK4-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32*
6602 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[TMP27]], align 4
6603 // CHECK4-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
6604 // CHECK4-NEXT: store i8* null, i8** [[TMP28]], align 4
6605 // CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
6606 // CHECK4-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [10 x i32]**
6607 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP30]], align 4
6608 // CHECK4-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
6609 // CHECK4-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to [10 x i32]**
6610 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP32]], align 4
6611 // CHECK4-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
6612 // CHECK4-NEXT: store i8* null, i8** [[TMP33]], align 4
6613 // CHECK4-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6614 // CHECK4-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6615 // CHECK4-NEXT: [[TMP36:%.*]] = load i32, i32* [[A]], align 4
6616 // CHECK4-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4
6617 // CHECK4-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4
6618 // CHECK4-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_2]], align 4
6619 // CHECK4-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
6620 // CHECK4-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6621 // CHECK4-NEXT: [[SUB:%.*]] = sub i32 [[TMP38]], [[TMP39]]
6622 // CHECK4-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1
6623 // CHECK4-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1
6624 // CHECK4-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
6625 // CHECK4-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1
6626 // CHECK4-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
6627 // CHECK4-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
6628 // CHECK4-NEXT: [[ADD6:%.*]] = add i32 [[TMP40]], 1
6629 // CHECK4-NEXT: [[TMP41:%.*]] = zext i32 [[ADD6]] to i64
6630 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP41]])
6631 // CHECK4-NEXT: [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6632 // CHECK4-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
6633 // CHECK4-NEXT: br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6634 // CHECK4: omp_offload.failed:
6635 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], i32 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]]
6636 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]]
6637 // CHECK4: omp_offload.cont:
6638 // CHECK4-NEXT: br label [[OMP_IF_END:%.*]]
6639 // CHECK4: omp_if.else:
6640 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], i32 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]]
6641 // CHECK4-NEXT: br label [[OMP_IF_END]]
6642 // CHECK4: omp_if.end:
6643 // CHECK4-NEXT: [[TMP44:%.*]] = load i32, i32* [[A]], align 4
6644 // CHECK4-NEXT: ret i32 [[TMP44]]
6645 //
6646 //
6647 // CHECK4-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
6648 // CHECK4-SAME: (i32 [[N:%.*]]) #[[ATTR0]] comdat {
6649 // CHECK4-NEXT: entry:
6650 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
6651 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4
6652 // CHECK4-NEXT: [[AA:%.*]] = alloca i16, align 2
6653 // CHECK4-NEXT: [[B:%.*]] = alloca [10 x i32], align 4
6654 // CHECK4-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
6655 // CHECK4-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
6656 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
6657 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
6658 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
6659 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
6660 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
6661 // CHECK4-NEXT: store i32 0, i32* [[A]], align 4
6662 // CHECK4-NEXT: store i16 0, i16* [[AA]], align 2
6663 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4
6664 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4
6665 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
6666 // CHECK4-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2
6667 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
6668 // CHECK4-NEXT: store i16 [[TMP2]], i16* [[CONV]], align 2
6669 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4
6670 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
6671 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40
6672 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
6673 // CHECK4: omp_if.then:
6674 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6675 // CHECK4-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32*
6676 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP6]], align 4
6677 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6678 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
6679 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4
6680 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
6681 // CHECK4-NEXT: store i8* null, i8** [[TMP9]], align 4
6682 // CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
6683 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32*
6684 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TMP11]], align 4
6685 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
6686 // CHECK4-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
6687 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4
6688 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
6689 // CHECK4-NEXT: store i8* null, i8** [[TMP14]], align 4
6690 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
6691 // CHECK4-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]**
6692 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 4
6693 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
6694 // CHECK4-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]**
6695 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 4
6696 // CHECK4-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
6697 // CHECK4-NEXT: store i8* null, i8** [[TMP19]], align 4
6698 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6699 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6700 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
6701 // CHECK4-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.17, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.18, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6702 // CHECK4-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
6703 // CHECK4-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6704 // CHECK4: omp_offload.failed:
6705 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]]
6706 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]]
6707 // CHECK4: omp_offload.cont:
6708 // CHECK4-NEXT: br label [[OMP_IF_END:%.*]]
6709 // CHECK4: omp_if.else:
6710 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]]
6711 // CHECK4-NEXT: br label [[OMP_IF_END]]
6712 // CHECK4: omp_if.end:
6713 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4
6714 // CHECK4-NEXT: ret i32 [[TMP24]]
6715 //
6716 //
6717 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218
6718 // CHECK4-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] {
6719 // CHECK4-NEXT: entry:
6720 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
6721 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
6722 // CHECK4-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
6723 // CHECK4-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
6724 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4
6725 // CHECK4-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4
6726 // CHECK4-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
6727 // CHECK4-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4
6728 // CHECK4-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
6729 // CHECK4-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
6730 // CHECK4-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4
6731 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
6732 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
6733 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
6734 // CHECK4-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4
6735 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[B_ADDR]], align 4
6736 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4
6737 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4
6738 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32, i32, i32, i16*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i32 [[TMP5]], i32 [[TMP1]], i32 [[TMP2]], i16* [[TMP3]])
6739 // CHECK4-NEXT: ret void
6740 //
6741 //
6742 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..11
6743 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] {
6744 // CHECK4-NEXT: entry:
6745 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6746 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6747 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
6748 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
6749 // CHECK4-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
6750 // CHECK4-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
6751 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4
6752 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6753 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
6754 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6755 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6756 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6757 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6758 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
6759 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6760 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6761 // CHECK4-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
6762 // CHECK4-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4
6763 // CHECK4-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
6764 // CHECK4-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
6765 // CHECK4-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4
6766 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
6767 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
6768 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
6769 // CHECK4-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4
6770 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6771 // CHECK4-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6772 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6773 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6774 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6775 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
6776 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6777 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6778 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9
6779 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6780 // CHECK4: cond.true:
6781 // CHECK4-NEXT: br label [[COND_END:%.*]]
6782 // CHECK4: cond.false:
6783 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6784 // CHECK4-NEXT: br label [[COND_END]]
6785 // CHECK4: cond.end:
6786 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
6787 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6788 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6789 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
6790 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6791 // CHECK4: omp.inner.for.cond:
6792 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6793 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6794 // CHECK4-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
6795 // CHECK4-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6796 // CHECK4: omp.inner.for.body:
6797 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6798 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
6799 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6800 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6801 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[B_ADDR]], align 4
6802 // CHECK4-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP12]] to double
6803 // CHECK4-NEXT: [[ADD4:%.*]] = fadd double [[CONV]], 1.500000e+00
6804 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
6805 // CHECK4-NEXT: store double [[ADD4]], double* [[A]], align 4
6806 // CHECK4-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0
6807 // CHECK4-NEXT: [[TMP13:%.*]] = load double, double* [[A5]], align 4
6808 // CHECK4-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00
6809 // CHECK4-NEXT: store double [[INC]], double* [[A5]], align 4
6810 // CHECK4-NEXT: [[CONV6:%.*]] = fptosi double [[INC]] to i16
6811 // CHECK4-NEXT: [[TMP14:%.*]] = mul nsw i32 1, [[TMP2]]
6812 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i32 [[TMP14]]
6813 // CHECK4-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1
6814 // CHECK4-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX7]], align 2
6815 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6816 // CHECK4: omp.body.continue:
6817 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6818 // CHECK4: omp.inner.for.inc:
6819 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6820 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
6821 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
6822 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
6823 // CHECK4: omp.inner.for.end:
6824 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6825 // CHECK4: omp.loop.exit:
6826 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
6827 // CHECK4-NEXT: ret void
6828 //
6829 //
6830 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200
6831 // CHECK4-SAME: (i32 [[N:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
6832 // CHECK4-NEXT: entry:
6833 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
6834 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
6835 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
6836 // CHECK4-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4
6837 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
6838 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
6839 // CHECK4-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
6840 // CHECK4-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
6841 // CHECK4-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4
6842 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
6843 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
6844 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
6845 // CHECK4-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4
6846 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
6847 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
6848 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8*
6849 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
6850 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
6851 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4
6852 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4
6853 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4
6854 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[A_CASTED]], align 4
6855 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4
6856 // CHECK4-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV]], align 4
6857 // CHECK4-NEXT: [[CONV2:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
6858 // CHECK4-NEXT: store i16 [[TMP5]], i16* [[CONV2]], align 2
6859 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[AA_CASTED]], align 4
6860 // CHECK4-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV1]], align 4
6861 // CHECK4-NEXT: [[CONV3:%.*]] = bitcast i32* [[AAA_CASTED]] to i8*
6862 // CHECK4-NEXT: store i8 [[TMP7]], i8* [[CONV3]], align 1
6863 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[AAA_CASTED]], align 4
6864 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP8]], [10 x i32]* [[TMP0]])
6865 // CHECK4-NEXT: ret void
6866 //
6867 //
6868 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..13
6869 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
6870 // CHECK4-NEXT: entry:
6871 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6872 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6873 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
6874 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
6875 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
6876 // CHECK4-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4
6877 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
6878 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6879 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
6880 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6881 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
6882 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
6883 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
6884 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6885 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6886 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6887 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6888 // CHECK4-NEXT: [[I6:%.*]] = alloca i32, align 4
6889 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6890 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6891 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
6892 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
6893 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
6894 // CHECK4-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4
6895 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
6896 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
6897 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8*
6898 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
6899 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
6900 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
6901 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
6902 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
6903 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
6904 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6905 // CHECK4-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]]
6906 // CHECK4-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1
6907 // CHECK4-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1
6908 // CHECK4-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
6909 // CHECK4-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1
6910 // CHECK4-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
6911 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6912 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[I]], align 4
6913 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6914 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
6915 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]]
6916 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
6917 // CHECK4: omp.precond.then:
6918 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6919 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
6920 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
6921 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6922 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6923 // CHECK4-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6924 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
6925 // CHECK4-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6926 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6927 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
6928 // CHECK4-NEXT: [[CMP7:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]]
6929 // CHECK4-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6930 // CHECK4: cond.true:
6931 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
6932 // CHECK4-NEXT: br label [[COND_END:%.*]]
6933 // CHECK4: cond.false:
6934 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6935 // CHECK4-NEXT: br label [[COND_END]]
6936 // CHECK4: cond.end:
6937 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
6938 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6939 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6940 // CHECK4-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
6941 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6942 // CHECK4: omp.inner.for.cond:
6943 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6944 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6945 // CHECK4-NEXT: [[ADD8:%.*]] = add i32 [[TMP17]], 1
6946 // CHECK4-NEXT: [[CMP9:%.*]] = icmp ult i32 [[TMP16]], [[ADD8]]
6947 // CHECK4-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6948 // CHECK4: omp.inner.for.body:
6949 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6950 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6951 // CHECK4-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1
6952 // CHECK4-NEXT: [[ADD10:%.*]] = add i32 [[TMP18]], [[MUL]]
6953 // CHECK4-NEXT: store i32 [[ADD10]], i32* [[I6]], align 4
6954 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[A_ADDR]], align 4
6955 // CHECK4-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1
6956 // CHECK4-NEXT: store i32 [[ADD11]], i32* [[A_ADDR]], align 4
6957 // CHECK4-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV]], align 4
6958 // CHECK4-NEXT: [[CONV12:%.*]] = sext i16 [[TMP21]] to i32
6959 // CHECK4-NEXT: [[ADD13:%.*]] = add nsw i32 [[CONV12]], 1
6960 // CHECK4-NEXT: [[CONV14:%.*]] = trunc i32 [[ADD13]] to i16
6961 // CHECK4-NEXT: store i16 [[CONV14]], i16* [[CONV]], align 4
6962 // CHECK4-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV1]], align 4
6963 // CHECK4-NEXT: [[CONV15:%.*]] = sext i8 [[TMP22]] to i32
6964 // CHECK4-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV15]], 1
6965 // CHECK4-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i8
6966 // CHECK4-NEXT: store i8 [[CONV17]], i8* [[CONV1]], align 4
6967 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2
6968 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
6969 // CHECK4-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], 1
6970 // CHECK4-NEXT: store i32 [[ADD18]], i32* [[ARRAYIDX]], align 4
6971 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6972 // CHECK4: omp.body.continue:
6973 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6974 // CHECK4: omp.inner.for.inc:
6975 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6976 // CHECK4-NEXT: [[ADD19:%.*]] = add i32 [[TMP24]], 1
6977 // CHECK4-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4
6978 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
6979 // CHECK4: omp.inner.for.end:
6980 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6981 // CHECK4: omp.loop.exit:
6982 // CHECK4-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6983 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
6984 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
6985 // CHECK4-NEXT: br label [[OMP_PRECOND_END]]
6986 // CHECK4: omp.precond.end:
6987 // CHECK4-NEXT: ret void
6988 //
6989 //
6990 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183
6991 // CHECK4-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
6992 // CHECK4-NEXT: entry:
6993 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
6994 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
6995 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
6996 // CHECK4-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
6997 // CHECK4-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
6998 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
6999 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
7000 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
7001 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
7002 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
7003 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
7004 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[A_CASTED]], align 4
7005 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4
7006 // CHECK4-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4
7007 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
7008 // CHECK4-NEXT: store i16 [[TMP3]], i16* [[CONV1]], align 2
7009 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4
7010 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..16 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], [10 x i32]* [[TMP0]])
7011 // CHECK4-NEXT: ret void
7012 //
7013 //
7014 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..16
7015 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
7016 // CHECK4-NEXT: entry:
7017 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7018 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7019 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
7020 // CHECK4-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
7021 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
7022 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7023 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
7024 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7025 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7026 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7027 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7028 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
7029 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7030 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7031 // CHECK4-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
7032 // CHECK4-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
7033 // CHECK4-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
7034 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
7035 // CHECK4-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
7036 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7037 // CHECK4-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
7038 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7039 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7040 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7041 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7042 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7043 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7044 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
7045 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7046 // CHECK4: cond.true:
7047 // CHECK4-NEXT: br label [[COND_END:%.*]]
7048 // CHECK4: cond.false:
7049 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7050 // CHECK4-NEXT: br label [[COND_END]]
7051 // CHECK4: cond.end:
7052 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7053 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7054 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7055 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7056 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7057 // CHECK4: omp.inner.for.cond:
7058 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7059 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7060 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7061 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7062 // CHECK4: omp.inner.for.body:
7063 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7064 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
7065 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7066 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
7067 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4
7068 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1
7069 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4
7070 // CHECK4-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV]], align 4
7071 // CHECK4-NEXT: [[CONV3:%.*]] = sext i16 [[TMP10]] to i32
7072 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1
7073 // CHECK4-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16
7074 // CHECK4-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 4
7075 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2
7076 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
7077 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], 1
7078 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4
7079 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7080 // CHECK4: omp.body.continue:
7081 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7082 // CHECK4: omp.inner.for.inc:
7083 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7084 // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1
7085 // CHECK4-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
7086 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
7087 // CHECK4: omp.inner.for.end:
7088 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7089 // CHECK4: omp.loop.exit:
7090 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7091 // CHECK4-NEXT: ret void
7092 //
7093 //
7094 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
7095 // CHECK4-SAME: () #[[ATTR4]] {
7096 // CHECK4-NEXT: entry:
7097 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1)
7098 // CHECK4-NEXT: ret void
7099 //
7100 //
7101 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103
7102 // CHECK9-SAME: (i64 [[AA:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]], i64 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] {
7103 // CHECK9-NEXT: entry:
7104 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
7105 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
7106 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8
7107 // CHECK9-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
7108 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
7109 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
7110 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
7111 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8
7112 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
7113 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
7114 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32*
7115 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV3]], align 8
7116 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV4]], align 8
7117 // CHECK9-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]])
7118 // CHECK9-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 8
7119 // CHECK9-NEXT: [[CONV5:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
7120 // CHECK9-NEXT: store i16 [[TMP3]], i16* [[CONV5]], align 2
7121 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8
7122 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP4]])
7123 // CHECK9-NEXT: ret void
7124 //
7125 //
7126 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
7127 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[AA:%.*]]) #[[ATTR0]] {
7128 // CHECK9-NEXT: entry:
7129 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7130 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7131 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
7132 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7133 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
7134 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7135 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7136 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7137 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7138 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
7139 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7140 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7141 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
7142 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
7143 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7144 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
7145 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7146 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7147 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7148 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7149 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7150 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7151 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
7152 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7153 // CHECK9: cond.true:
7154 // CHECK9-NEXT: br label [[COND_END:%.*]]
7155 // CHECK9: cond.false:
7156 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7157 // CHECK9-NEXT: br label [[COND_END]]
7158 // CHECK9: cond.end:
7159 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7160 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7161 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7162 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7163 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7164 // CHECK9: omp.inner.for.cond:
7165 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7166 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7167 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7168 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7169 // CHECK9: omp.inner.for.body:
7170 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7171 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
7172 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7173 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
7174 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7175 // CHECK9: omp.body.continue:
7176 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7177 // CHECK9: omp.inner.for.inc:
7178 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7179 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
7180 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
7181 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
7182 // CHECK9: omp.inner.for.end:
7183 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7184 // CHECK9: omp.loop.exit:
7185 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7186 // CHECK9-NEXT: ret void
7187 //
7188 //
7189 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113
7190 // CHECK9-SAME: (i64 [[AA:%.*]]) #[[ATTR0]] {
7191 // CHECK9-NEXT: entry:
7192 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
7193 // CHECK9-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
7194 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
7195 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
7196 // CHECK9-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 8
7197 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
7198 // CHECK9-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2
7199 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[AA_CASTED]], align 8
7200 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP1]])
7201 // CHECK9-NEXT: ret void
7202 //
7203 //
7204 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
7205 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[AA:%.*]]) #[[ATTR0]] {
7206 // CHECK9-NEXT: entry:
7207 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7208 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7209 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
7210 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7211 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
7212 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7213 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7214 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7215 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7216 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
7217 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7218 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7219 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
7220 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
7221 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7222 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
7223 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7224 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7225 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7226 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7227 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7228 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7229 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
7230 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7231 // CHECK9: cond.true:
7232 // CHECK9-NEXT: br label [[COND_END:%.*]]
7233 // CHECK9: cond.false:
7234 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7235 // CHECK9-NEXT: br label [[COND_END]]
7236 // CHECK9: cond.end:
7237 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7238 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7239 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7240 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7241 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7242 // CHECK9: omp.inner.for.cond:
7243 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7244 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7245 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7246 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7247 // CHECK9: omp.inner.for.body:
7248 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7249 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
7250 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7251 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
7252 // CHECK9-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 8
7253 // CHECK9-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32
7254 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1
7255 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16
7256 // CHECK9-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 8
7257 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7258 // CHECK9: omp.body.continue:
7259 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7260 // CHECK9: omp.inner.for.inc:
7261 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7262 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1
7263 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
7264 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
7265 // CHECK9: omp.inner.for.end:
7266 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7267 // CHECK9: omp.loop.exit:
7268 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7269 // CHECK9-NEXT: ret void
7270 //
7271 //
7272 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120
7273 // CHECK9-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR0]] {
7274 // CHECK9-NEXT: entry:
7275 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
7276 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
7277 // CHECK9-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
7278 // CHECK9-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
7279 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
7280 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
7281 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
7282 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
7283 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
7284 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
7285 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[CONV2]], align 4
7286 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
7287 // CHECK9-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 8
7288 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
7289 // CHECK9-NEXT: store i16 [[TMP2]], i16* [[CONV3]], align 2
7290 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8
7291 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]])
7292 // CHECK9-NEXT: ret void
7293 //
7294 //
7295 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
7296 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR0]] {
7297 // CHECK9-NEXT: entry:
7298 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7299 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7300 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
7301 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
7302 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7303 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
7304 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7305 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7306 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7307 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7308 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
7309 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7310 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7311 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
7312 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
7313 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
7314 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
7315 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7316 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
7317 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7318 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7319 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7320 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7321 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7322 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7323 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
7324 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7325 // CHECK9: cond.true:
7326 // CHECK9-NEXT: br label [[COND_END:%.*]]
7327 // CHECK9: cond.false:
7328 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7329 // CHECK9-NEXT: br label [[COND_END]]
7330 // CHECK9: cond.end:
7331 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7332 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7333 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7334 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7335 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7336 // CHECK9: omp.inner.for.cond:
7337 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7338 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7339 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7340 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7341 // CHECK9: omp.inner.for.body:
7342 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7343 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
7344 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7345 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
7346 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 8
7347 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1
7348 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 8
7349 // CHECK9-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV1]], align 8
7350 // CHECK9-NEXT: [[CONV4:%.*]] = sext i16 [[TMP9]] to i32
7351 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1
7352 // CHECK9-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
7353 // CHECK9-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 8
7354 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7355 // CHECK9: omp.body.continue:
7356 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7357 // CHECK9: omp.inner.for.inc:
7358 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7359 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP10]], 1
7360 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
7361 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
7362 // CHECK9: omp.inner.for.end:
7363 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7364 // CHECK9: omp.loop.exit:
7365 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7366 // CHECK9-NEXT: ret void
7367 //
7368 //
7369 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145
7370 // CHECK9-SAME: (i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
7371 // CHECK9-NEXT: entry:
7372 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
7373 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8
7374 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
7375 // CHECK9-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8
7376 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8
7377 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
7378 // CHECK9-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8
7379 // CHECK9-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8
7380 // CHECK9-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8
7381 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
7382 // CHECK9-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
7383 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
7384 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
7385 // CHECK9-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8
7386 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
7387 // CHECK9-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8
7388 // CHECK9-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8
7389 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
7390 // CHECK9-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8
7391 // CHECK9-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8
7392 // CHECK9-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8
7393 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
7394 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
7395 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8
7396 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
7397 // CHECK9-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8
7398 // CHECK9-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8
7399 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
7400 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8
7401 // CHECK9-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8
7402 // CHECK9-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8
7403 // CHECK9-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
7404 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 8
7405 // CHECK9-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32*
7406 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[CONV6]], align 4
7407 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[A_CASTED]], align 8
7408 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV5]], align 8
7409 // CHECK9-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
7410 // CHECK9-NEXT: store i32 [[TMP10]], i32* [[CONV7]], align 4
7411 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
7412 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [10 x float]*, i64, float*, [5 x [10 x double]]*, i64, i64, double*, %struct.TT*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], [10 x float]* [[TMP0]], i64 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i64 [[TMP4]], i64 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i64 [[TMP11]])
7413 // CHECK9-NEXT: ret void
7414 //
7415 //
7416 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
7417 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
7418 // CHECK9-NEXT: entry:
7419 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7420 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7421 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
7422 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8
7423 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
7424 // CHECK9-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8
7425 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8
7426 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
7427 // CHECK9-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8
7428 // CHECK9-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8
7429 // CHECK9-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8
7430 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
7431 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7432 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
7433 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7434 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7435 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7436 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7437 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
7438 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7439 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7440 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
7441 // CHECK9-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8
7442 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
7443 // CHECK9-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8
7444 // CHECK9-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8
7445 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
7446 // CHECK9-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8
7447 // CHECK9-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8
7448 // CHECK9-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8
7449 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
7450 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
7451 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8
7452 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
7453 // CHECK9-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8
7454 // CHECK9-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8
7455 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
7456 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8
7457 // CHECK9-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8
7458 // CHECK9-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8
7459 // CHECK9-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
7460 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7461 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
7462 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7463 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7464 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV5]], align 8
7465 // CHECK9-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7466 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
7467 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]])
7468 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
7469 // CHECK9: omp.dispatch.cond:
7470 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7471 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9
7472 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7473 // CHECK9: cond.true:
7474 // CHECK9-NEXT: br label [[COND_END:%.*]]
7475 // CHECK9: cond.false:
7476 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7477 // CHECK9-NEXT: br label [[COND_END]]
7478 // CHECK9: cond.end:
7479 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
7480 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7481 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7482 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
7483 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7484 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7485 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
7486 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7487 // CHECK9: omp.dispatch.body:
7488 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7489 // CHECK9: omp.inner.for.cond:
7490 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7491 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
7492 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
7493 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7494 // CHECK9: omp.inner.for.body:
7495 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7496 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
7497 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7498 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
7499 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !13
7500 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
7501 // CHECK9-NEXT: store i32 [[ADD8]], i32* [[CONV]], align 8, !llvm.access.group !13
7502 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i64 0, i64 2
7503 // CHECK9-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !13
7504 // CHECK9-NEXT: [[CONV9:%.*]] = fpext float [[TMP20]] to double
7505 // CHECK9-NEXT: [[ADD10:%.*]] = fadd double [[CONV9]], 1.000000e+00
7506 // CHECK9-NEXT: [[CONV11:%.*]] = fptrunc double [[ADD10]] to float
7507 // CHECK9-NEXT: store float [[CONV11]], float* [[ARRAYIDX]], align 4, !llvm.access.group !13
7508 // CHECK9-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 3
7509 // CHECK9-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX12]], align 4, !llvm.access.group !13
7510 // CHECK9-NEXT: [[CONV13:%.*]] = fpext float [[TMP21]] to double
7511 // CHECK9-NEXT: [[ADD14:%.*]] = fadd double [[CONV13]], 1.000000e+00
7512 // CHECK9-NEXT: [[CONV15:%.*]] = fptrunc double [[ADD14]] to float
7513 // CHECK9-NEXT: store float [[CONV15]], float* [[ARRAYIDX12]], align 4, !llvm.access.group !13
7514 // CHECK9-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i64 0, i64 1
7515 // CHECK9-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX16]], i64 0, i64 2
7516 // CHECK9-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX17]], align 8, !llvm.access.group !13
7517 // CHECK9-NEXT: [[ADD18:%.*]] = fadd double [[TMP22]], 1.000000e+00
7518 // CHECK9-NEXT: store double [[ADD18]], double* [[ARRAYIDX17]], align 8, !llvm.access.group !13
7519 // CHECK9-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP5]]
7520 // CHECK9-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds double, double* [[TMP6]], i64 [[TMP23]]
7521 // CHECK9-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX19]], i64 3
7522 // CHECK9-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX20]], align 8, !llvm.access.group !13
7523 // CHECK9-NEXT: [[ADD21:%.*]] = fadd double [[TMP24]], 1.000000e+00
7524 // CHECK9-NEXT: store double [[ADD21]], double* [[ARRAYIDX20]], align 8, !llvm.access.group !13
7525 // CHECK9-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0
7526 // CHECK9-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8, !llvm.access.group !13
7527 // CHECK9-NEXT: [[ADD22:%.*]] = add nsw i64 [[TMP25]], 1
7528 // CHECK9-NEXT: store i64 [[ADD22]], i64* [[X]], align 8, !llvm.access.group !13
7529 // CHECK9-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1
7530 // CHECK9-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8, !llvm.access.group !13
7531 // CHECK9-NEXT: [[CONV23:%.*]] = sext i8 [[TMP26]] to i32
7532 // CHECK9-NEXT: [[ADD24:%.*]] = add nsw i32 [[CONV23]], 1
7533 // CHECK9-NEXT: [[CONV25:%.*]] = trunc i32 [[ADD24]] to i8
7534 // CHECK9-NEXT: store i8 [[CONV25]], i8* [[Y]], align 8, !llvm.access.group !13
7535 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7536 // CHECK9: omp.body.continue:
7537 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7538 // CHECK9: omp.inner.for.inc:
7539 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7540 // CHECK9-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP27]], 1
7541 // CHECK9-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7542 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
7543 // CHECK9: omp.inner.for.end:
7544 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
7545 // CHECK9: omp.dispatch.inc:
7546 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7547 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7548 // CHECK9-NEXT: [[ADD27:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
7549 // CHECK9-NEXT: store i32 [[ADD27]], i32* [[DOTOMP_LB]], align 4
7550 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7551 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7552 // CHECK9-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
7553 // CHECK9-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_UB]], align 4
7554 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]]
7555 // CHECK9: omp.dispatch.end:
7556 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]])
7557 // CHECK9-NEXT: ret void
7558 //
7559 //
7560 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200
7561 // CHECK9-SAME: (i64 [[N:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
7562 // CHECK9-NEXT: entry:
7563 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
7564 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
7565 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
7566 // CHECK9-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8
7567 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
7568 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
7569 // CHECK9-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
7570 // CHECK9-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
7571 // CHECK9-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8
7572 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
7573 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
7574 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
7575 // CHECK9-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8
7576 // CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
7577 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
7578 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32*
7579 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
7580 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8*
7581 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
7582 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
7583 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32*
7584 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[CONV4]], align 4
7585 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8
7586 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8
7587 // CHECK9-NEXT: [[CONV5:%.*]] = bitcast i64* [[A_CASTED]] to i32*
7588 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV5]], align 4
7589 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8
7590 // CHECK9-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV2]], align 8
7591 // CHECK9-NEXT: [[CONV6:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
7592 // CHECK9-NEXT: store i16 [[TMP5]], i16* [[CONV6]], align 2
7593 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[AA_CASTED]], align 8
7594 // CHECK9-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV3]], align 8
7595 // CHECK9-NEXT: [[CONV7:%.*]] = bitcast i64* [[AAA_CASTED]] to i8*
7596 // CHECK9-NEXT: store i8 [[TMP7]], i8* [[CONV7]], align 1
7597 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[AAA_CASTED]], align 8
7598 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, [10 x i32]*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]], [10 x i32]* [[TMP0]])
7599 // CHECK9-NEXT: ret void
7600 //
7601 //
7602 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4
7603 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
7604 // CHECK9-NEXT: entry:
7605 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7606 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7607 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
7608 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
7609 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
7610 // CHECK9-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8
7611 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
7612 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7613 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
7614 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7615 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
7616 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4
7617 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
7618 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7619 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7620 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7621 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7622 // CHECK9-NEXT: [[I8:%.*]] = alloca i32, align 4
7623 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7624 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7625 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
7626 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
7627 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
7628 // CHECK9-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8
7629 // CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
7630 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
7631 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32*
7632 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
7633 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8*
7634 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
7635 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 8
7636 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
7637 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
7638 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_4]], align 4
7639 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
7640 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7641 // CHECK9-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]]
7642 // CHECK9-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1
7643 // CHECK9-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1
7644 // CHECK9-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
7645 // CHECK9-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1
7646 // CHECK9-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4
7647 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7648 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[I]], align 4
7649 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7650 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
7651 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]]
7652 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7653 // CHECK9: omp.precond.then:
7654 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7655 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
7656 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
7657 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7658 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7659 // CHECK9-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7660 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
7661 // CHECK9-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7662 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7663 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
7664 // CHECK9-NEXT: [[CMP9:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]]
7665 // CHECK9-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7666 // CHECK9: cond.true:
7667 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
7668 // CHECK9-NEXT: br label [[COND_END:%.*]]
7669 // CHECK9: cond.false:
7670 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7671 // CHECK9-NEXT: br label [[COND_END]]
7672 // CHECK9: cond.end:
7673 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
7674 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7675 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7676 // CHECK9-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
7677 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7678 // CHECK9: omp.inner.for.cond:
7679 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7680 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7681 // CHECK9-NEXT: [[ADD10:%.*]] = add i32 [[TMP17]], 1
7682 // CHECK9-NEXT: [[CMP11:%.*]] = icmp ult i32 [[TMP16]], [[ADD10]]
7683 // CHECK9-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7684 // CHECK9: omp.inner.for.body:
7685 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7686 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7687 // CHECK9-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1
7688 // CHECK9-NEXT: [[ADD12:%.*]] = add i32 [[TMP18]], [[MUL]]
7689 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[I8]], align 4
7690 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 8
7691 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP20]], 1
7692 // CHECK9-NEXT: store i32 [[ADD13]], i32* [[CONV1]], align 8
7693 // CHECK9-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV2]], align 8
7694 // CHECK9-NEXT: [[CONV14:%.*]] = sext i16 [[TMP21]] to i32
7695 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1
7696 // CHECK9-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i16
7697 // CHECK9-NEXT: store i16 [[CONV16]], i16* [[CONV2]], align 8
7698 // CHECK9-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV3]], align 8
7699 // CHECK9-NEXT: [[CONV17:%.*]] = sext i8 [[TMP22]] to i32
7700 // CHECK9-NEXT: [[ADD18:%.*]] = add nsw i32 [[CONV17]], 1
7701 // CHECK9-NEXT: [[CONV19:%.*]] = trunc i32 [[ADD18]] to i8
7702 // CHECK9-NEXT: store i8 [[CONV19]], i8* [[CONV3]], align 8
7703 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2
7704 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
7705 // CHECK9-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP23]], 1
7706 // CHECK9-NEXT: store i32 [[ADD20]], i32* [[ARRAYIDX]], align 4
7707 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7708 // CHECK9: omp.body.continue:
7709 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7710 // CHECK9: omp.inner.for.inc:
7711 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7712 // CHECK9-NEXT: [[ADD21:%.*]] = add i32 [[TMP24]], 1
7713 // CHECK9-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4
7714 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
7715 // CHECK9: omp.inner.for.end:
7716 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7717 // CHECK9: omp.loop.exit:
7718 // CHECK9-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7719 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
7720 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
7721 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
7722 // CHECK9: omp.precond.end:
7723 // CHECK9-NEXT: ret void
7724 //
7725 //
7726 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218
7727 // CHECK9-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] {
7728 // CHECK9-NEXT: entry:
7729 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
7730 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8
7731 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
7732 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
7733 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8
7734 // CHECK9-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8
7735 // CHECK9-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
7736 // CHECK9-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8
7737 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
7738 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
7739 // CHECK9-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8
7740 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
7741 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
7742 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
7743 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
7744 // CHECK9-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8
7745 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
7746 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i32*
7747 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
7748 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[B_CASTED]], align 8
7749 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64, i64, i64, i16*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i64 [[TMP5]], i64 [[TMP1]], i64 [[TMP2]], i16* [[TMP3]])
7750 // CHECK9-NEXT: ret void
7751 //
7752 //
7753 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5
7754 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] {
7755 // CHECK9-NEXT: entry:
7756 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7757 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7758 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
7759 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8
7760 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
7761 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
7762 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8
7763 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7764 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
7765 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7766 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7767 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7768 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7769 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
7770 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7771 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7772 // CHECK9-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
7773 // CHECK9-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8
7774 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
7775 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
7776 // CHECK9-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8
7777 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
7778 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
7779 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
7780 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
7781 // CHECK9-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8
7782 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7783 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
7784 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7785 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7786 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7787 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
7788 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7789 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7790 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9
7791 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7792 // CHECK9: cond.true:
7793 // CHECK9-NEXT: br label [[COND_END:%.*]]
7794 // CHECK9: cond.false:
7795 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7796 // CHECK9-NEXT: br label [[COND_END]]
7797 // CHECK9: cond.end:
7798 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
7799 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7800 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7801 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
7802 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7803 // CHECK9: omp.inner.for.cond:
7804 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7805 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7806 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
7807 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7808 // CHECK9: omp.inner.for.body:
7809 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7810 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
7811 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7812 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
7813 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
7814 // CHECK9-NEXT: [[CONV4:%.*]] = sitofp i32 [[TMP12]] to double
7815 // CHECK9-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.500000e+00
7816 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
7817 // CHECK9-NEXT: store double [[ADD5]], double* [[A]], align 8
7818 // CHECK9-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0
7819 // CHECK9-NEXT: [[TMP13:%.*]] = load double, double* [[A6]], align 8
7820 // CHECK9-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00
7821 // CHECK9-NEXT: store double [[INC]], double* [[A6]], align 8
7822 // CHECK9-NEXT: [[CONV7:%.*]] = fptosi double [[INC]] to i16
7823 // CHECK9-NEXT: [[TMP14:%.*]] = mul nsw i64 1, [[TMP2]]
7824 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i64 [[TMP14]]
7825 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1
7826 // CHECK9-NEXT: store i16 [[CONV7]], i16* [[ARRAYIDX8]], align 2
7827 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7828 // CHECK9: omp.body.continue:
7829 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7830 // CHECK9: omp.inner.for.inc:
7831 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7832 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1
7833 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
7834 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
7835 // CHECK9: omp.inner.for.end:
7836 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7837 // CHECK9: omp.loop.exit:
7838 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
7839 // CHECK9-NEXT: ret void
7840 //
7841 //
7842 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183
7843 // CHECK9-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
7844 // CHECK9-NEXT: entry:
7845 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
7846 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
7847 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
7848 // CHECK9-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
7849 // CHECK9-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
7850 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
7851 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
7852 // CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
7853 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
7854 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
7855 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
7856 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
7857 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
7858 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[CONV2]], align 4
7859 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8
7860 // CHECK9-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 8
7861 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
7862 // CHECK9-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2
7863 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8
7864 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], [10 x i32]* [[TMP0]])
7865 // CHECK9-NEXT: ret void
7866 //
7867 //
7868 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6
7869 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
7870 // CHECK9-NEXT: entry:
7871 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7872 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7873 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
7874 // CHECK9-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
7875 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
7876 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7877 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
7878 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7879 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7880 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7881 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7882 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
7883 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7884 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7885 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
7886 // CHECK9-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
7887 // CHECK9-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
7888 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
7889 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
7890 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
7891 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7892 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
7893 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7894 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7895 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7896 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7897 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7898 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7899 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
7900 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7901 // CHECK9: cond.true:
7902 // CHECK9-NEXT: br label [[COND_END:%.*]]
7903 // CHECK9: cond.false:
7904 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7905 // CHECK9-NEXT: br label [[COND_END]]
7906 // CHECK9: cond.end:
7907 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7908 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7909 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7910 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7911 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7912 // CHECK9: omp.inner.for.cond:
7913 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7914 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7915 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7916 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7917 // CHECK9: omp.inner.for.body:
7918 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7919 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
7920 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7921 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
7922 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8
7923 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
7924 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 8
7925 // CHECK9-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV1]], align 8
7926 // CHECK9-NEXT: [[CONV4:%.*]] = sext i16 [[TMP10]] to i32
7927 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1
7928 // CHECK9-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
7929 // CHECK9-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 8
7930 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2
7931 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
7932 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], 1
7933 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX]], align 4
7934 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7935 // CHECK9: omp.body.continue:
7936 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7937 // CHECK9: omp.inner.for.inc:
7938 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7939 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP12]], 1
7940 // CHECK9-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
7941 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
7942 // CHECK9: omp.inner.for.end:
7943 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7944 // CHECK9: omp.loop.exit:
7945 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7946 // CHECK9-NEXT: ret void
7947 //
7948 //
7949 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103
7950 // CHECK10-SAME: (i64 [[AA:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]], i64 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] {
7951 // CHECK10-NEXT: entry:
7952 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
7953 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
7954 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8
7955 // CHECK10-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
7956 // CHECK10-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
7957 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
7958 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
7959 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8
7960 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
7961 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
7962 // CHECK10-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32*
7963 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV3]], align 8
7964 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV4]], align 8
7965 // CHECK10-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]])
7966 // CHECK10-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 8
7967 // CHECK10-NEXT: [[CONV5:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
7968 // CHECK10-NEXT: store i16 [[TMP3]], i16* [[CONV5]], align 2
7969 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8
7970 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP4]])
7971 // CHECK10-NEXT: ret void
7972 //
7973 //
7974 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
7975 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[AA:%.*]]) #[[ATTR0]] {
7976 // CHECK10-NEXT: entry:
7977 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7978 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7979 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
7980 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7981 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
7982 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7983 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7984 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7985 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7986 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
7987 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7988 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7989 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
7990 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
7991 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7992 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
7993 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7994 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7995 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7996 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7997 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7998 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7999 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
8000 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8001 // CHECK10: cond.true:
8002 // CHECK10-NEXT: br label [[COND_END:%.*]]
8003 // CHECK10: cond.false:
8004 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8005 // CHECK10-NEXT: br label [[COND_END]]
8006 // CHECK10: cond.end:
8007 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8008 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8009 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8010 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8011 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8012 // CHECK10: omp.inner.for.cond:
8013 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8014 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8015 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8016 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8017 // CHECK10: omp.inner.for.body:
8018 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8019 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
8020 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8021 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
8022 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8023 // CHECK10: omp.body.continue:
8024 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8025 // CHECK10: omp.inner.for.inc:
8026 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8027 // CHECK10-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
8028 // CHECK10-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
8029 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
8030 // CHECK10: omp.inner.for.end:
8031 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8032 // CHECK10: omp.loop.exit:
8033 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8034 // CHECK10-NEXT: ret void
8035 //
8036 //
8037 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113
8038 // CHECK10-SAME: (i64 [[AA:%.*]]) #[[ATTR0]] {
8039 // CHECK10-NEXT: entry:
8040 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
8041 // CHECK10-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
8042 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
8043 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
8044 // CHECK10-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 8
8045 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
8046 // CHECK10-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2
8047 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[AA_CASTED]], align 8
8048 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP1]])
8049 // CHECK10-NEXT: ret void
8050 //
8051 //
8052 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
8053 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[AA:%.*]]) #[[ATTR0]] {
8054 // CHECK10-NEXT: entry:
8055 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8056 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8057 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
8058 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8059 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
8060 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8061 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8062 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8063 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8064 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
8065 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8066 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8067 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
8068 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
8069 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8070 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
8071 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8072 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8073 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8074 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8075 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8076 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8077 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
8078 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8079 // CHECK10: cond.true:
8080 // CHECK10-NEXT: br label [[COND_END:%.*]]
8081 // CHECK10: cond.false:
8082 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8083 // CHECK10-NEXT: br label [[COND_END]]
8084 // CHECK10: cond.end:
8085 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8086 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8087 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8088 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8089 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8090 // CHECK10: omp.inner.for.cond:
8091 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8092 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8093 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8094 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8095 // CHECK10: omp.inner.for.body:
8096 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8097 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
8098 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8099 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
8100 // CHECK10-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 8
8101 // CHECK10-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32
8102 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1
8103 // CHECK10-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16
8104 // CHECK10-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 8
8105 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8106 // CHECK10: omp.body.continue:
8107 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8108 // CHECK10: omp.inner.for.inc:
8109 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8110 // CHECK10-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1
8111 // CHECK10-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
8112 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
8113 // CHECK10: omp.inner.for.end:
8114 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8115 // CHECK10: omp.loop.exit:
8116 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8117 // CHECK10-NEXT: ret void
8118 //
8119 //
8120 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120
8121 // CHECK10-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR0]] {
8122 // CHECK10-NEXT: entry:
8123 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
8124 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
8125 // CHECK10-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
8126 // CHECK10-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
8127 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
8128 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
8129 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
8130 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
8131 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
8132 // CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
8133 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[CONV2]], align 4
8134 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
8135 // CHECK10-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 8
8136 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
8137 // CHECK10-NEXT: store i16 [[TMP2]], i16* [[CONV3]], align 2
8138 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8
8139 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]])
8140 // CHECK10-NEXT: ret void
8141 //
8142 //
8143 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2
8144 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR0]] {
8145 // CHECK10-NEXT: entry:
8146 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8147 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8148 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
8149 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
8150 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8151 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
8152 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8153 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8154 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8155 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8156 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
8157 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8158 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8159 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
8160 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
8161 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
8162 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
8163 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8164 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
8165 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8166 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8167 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8168 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8169 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8170 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8171 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
8172 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8173 // CHECK10: cond.true:
8174 // CHECK10-NEXT: br label [[COND_END:%.*]]
8175 // CHECK10: cond.false:
8176 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8177 // CHECK10-NEXT: br label [[COND_END]]
8178 // CHECK10: cond.end:
8179 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8180 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8181 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8182 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8183 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8184 // CHECK10: omp.inner.for.cond:
8185 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8186 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8187 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8188 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8189 // CHECK10: omp.inner.for.body:
8190 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8191 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
8192 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8193 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
8194 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 8
8195 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1
8196 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 8
8197 // CHECK10-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV1]], align 8
8198 // CHECK10-NEXT: [[CONV4:%.*]] = sext i16 [[TMP9]] to i32
8199 // CHECK10-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1
8200 // CHECK10-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
8201 // CHECK10-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 8
8202 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8203 // CHECK10: omp.body.continue:
8204 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8205 // CHECK10: omp.inner.for.inc:
8206 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8207 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP10]], 1
8208 // CHECK10-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
8209 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
8210 // CHECK10: omp.inner.for.end:
8211 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8212 // CHECK10: omp.loop.exit:
8213 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8214 // CHECK10-NEXT: ret void
8215 //
8216 //
8217 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145
8218 // CHECK10-SAME: (i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
8219 // CHECK10-NEXT: entry:
8220 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
8221 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8
8222 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
8223 // CHECK10-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8
8224 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8
8225 // CHECK10-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
8226 // CHECK10-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8
8227 // CHECK10-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8
8228 // CHECK10-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8
8229 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
8230 // CHECK10-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
8231 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
8232 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
8233 // CHECK10-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8
8234 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8235 // CHECK10-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8
8236 // CHECK10-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8
8237 // CHECK10-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
8238 // CHECK10-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8
8239 // CHECK10-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8
8240 // CHECK10-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8
8241 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
8242 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
8243 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8
8244 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8245 // CHECK10-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8
8246 // CHECK10-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8
8247 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
8248 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8
8249 // CHECK10-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8
8250 // CHECK10-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8
8251 // CHECK10-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
8252 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 8
8253 // CHECK10-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32*
8254 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[CONV6]], align 4
8255 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[A_CASTED]], align 8
8256 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV5]], align 8
8257 // CHECK10-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
8258 // CHECK10-NEXT: store i32 [[TMP10]], i32* [[CONV7]], align 4
8259 // CHECK10-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
8260 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [10 x float]*, i64, float*, [5 x [10 x double]]*, i64, i64, double*, %struct.TT*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], [10 x float]* [[TMP0]], i64 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i64 [[TMP4]], i64 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i64 [[TMP11]])
8261 // CHECK10-NEXT: ret void
8262 //
8263 //
8264 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3
8265 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
8266 // CHECK10-NEXT: entry:
8267 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8268 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8269 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
8270 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8
8271 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
8272 // CHECK10-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8
8273 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8
8274 // CHECK10-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
8275 // CHECK10-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8
8276 // CHECK10-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8
8277 // CHECK10-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8
8278 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
8279 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8280 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
8281 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8282 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8283 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8284 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8285 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
8286 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8287 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8288 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
8289 // CHECK10-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8
8290 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8291 // CHECK10-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8
8292 // CHECK10-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8
8293 // CHECK10-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
8294 // CHECK10-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8
8295 // CHECK10-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8
8296 // CHECK10-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8
8297 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
8298 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
8299 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8
8300 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8301 // CHECK10-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8
8302 // CHECK10-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8
8303 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
8304 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8
8305 // CHECK10-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8
8306 // CHECK10-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8
8307 // CHECK10-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
8308 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8309 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
8310 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8311 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8312 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV5]], align 8
8313 // CHECK10-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8314 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
8315 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]])
8316 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
8317 // CHECK10: omp.dispatch.cond:
8318 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8319 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9
8320 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8321 // CHECK10: cond.true:
8322 // CHECK10-NEXT: br label [[COND_END:%.*]]
8323 // CHECK10: cond.false:
8324 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8325 // CHECK10-NEXT: br label [[COND_END]]
8326 // CHECK10: cond.end:
8327 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
8328 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8329 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8330 // CHECK10-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
8331 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8332 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8333 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
8334 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8335 // CHECK10: omp.dispatch.body:
8336 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8337 // CHECK10: omp.inner.for.cond:
8338 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
8339 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
8340 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
8341 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8342 // CHECK10: omp.inner.for.body:
8343 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
8344 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
8345 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8346 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
8347 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !13
8348 // CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
8349 // CHECK10-NEXT: store i32 [[ADD8]], i32* [[CONV]], align 8, !llvm.access.group !13
8350 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i64 0, i64 2
8351 // CHECK10-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !13
8352 // CHECK10-NEXT: [[CONV9:%.*]] = fpext float [[TMP20]] to double
8353 // CHECK10-NEXT: [[ADD10:%.*]] = fadd double [[CONV9]], 1.000000e+00
8354 // CHECK10-NEXT: [[CONV11:%.*]] = fptrunc double [[ADD10]] to float
8355 // CHECK10-NEXT: store float [[CONV11]], float* [[ARRAYIDX]], align 4, !llvm.access.group !13
8356 // CHECK10-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 3
8357 // CHECK10-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX12]], align 4, !llvm.access.group !13
8358 // CHECK10-NEXT: [[CONV13:%.*]] = fpext float [[TMP21]] to double
8359 // CHECK10-NEXT: [[ADD14:%.*]] = fadd double [[CONV13]], 1.000000e+00
8360 // CHECK10-NEXT: [[CONV15:%.*]] = fptrunc double [[ADD14]] to float
8361 // CHECK10-NEXT: store float [[CONV15]], float* [[ARRAYIDX12]], align 4, !llvm.access.group !13
8362 // CHECK10-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i64 0, i64 1
8363 // CHECK10-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX16]], i64 0, i64 2
8364 // CHECK10-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX17]], align 8, !llvm.access.group !13
8365 // CHECK10-NEXT: [[ADD18:%.*]] = fadd double [[TMP22]], 1.000000e+00
8366 // CHECK10-NEXT: store double [[ADD18]], double* [[ARRAYIDX17]], align 8, !llvm.access.group !13
8367 // CHECK10-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP5]]
8368 // CHECK10-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds double, double* [[TMP6]], i64 [[TMP23]]
8369 // CHECK10-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX19]], i64 3
8370 // CHECK10-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX20]], align 8, !llvm.access.group !13
8371 // CHECK10-NEXT: [[ADD21:%.*]] = fadd double [[TMP24]], 1.000000e+00
8372 // CHECK10-NEXT: store double [[ADD21]], double* [[ARRAYIDX20]], align 8, !llvm.access.group !13
8373 // CHECK10-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0
8374 // CHECK10-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8, !llvm.access.group !13
8375 // CHECK10-NEXT: [[ADD22:%.*]] = add nsw i64 [[TMP25]], 1
8376 // CHECK10-NEXT: store i64 [[ADD22]], i64* [[X]], align 8, !llvm.access.group !13
8377 // CHECK10-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1
8378 // CHECK10-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8, !llvm.access.group !13
8379 // CHECK10-NEXT: [[CONV23:%.*]] = sext i8 [[TMP26]] to i32
8380 // CHECK10-NEXT: [[ADD24:%.*]] = add nsw i32 [[CONV23]], 1
8381 // CHECK10-NEXT: [[CONV25:%.*]] = trunc i32 [[ADD24]] to i8
8382 // CHECK10-NEXT: store i8 [[CONV25]], i8* [[Y]], align 8, !llvm.access.group !13
8383 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8384 // CHECK10: omp.body.continue:
8385 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8386 // CHECK10: omp.inner.for.inc:
8387 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
8388 // CHECK10-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP27]], 1
8389 // CHECK10-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
8390 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
8391 // CHECK10: omp.inner.for.end:
8392 // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
8393 // CHECK10: omp.dispatch.inc:
8394 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8395 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8396 // CHECK10-NEXT: [[ADD27:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
8397 // CHECK10-NEXT: store i32 [[ADD27]], i32* [[DOTOMP_LB]], align 4
8398 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8399 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8400 // CHECK10-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
8401 // CHECK10-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_UB]], align 4
8402 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]]
8403 // CHECK10: omp.dispatch.end:
8404 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]])
8405 // CHECK10-NEXT: ret void
8406 //
8407 //
8408 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200
8409 // CHECK10-SAME: (i64 [[N:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
8410 // CHECK10-NEXT: entry:
8411 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
8412 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
8413 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
8414 // CHECK10-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8
8415 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
8416 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
8417 // CHECK10-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
8418 // CHECK10-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
8419 // CHECK10-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8
8420 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
8421 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
8422 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
8423 // CHECK10-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8
8424 // CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
8425 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
8426 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32*
8427 // CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
8428 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8*
8429 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
8430 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
8431 // CHECK10-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32*
8432 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[CONV4]], align 4
8433 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8
8434 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8
8435 // CHECK10-NEXT: [[CONV5:%.*]] = bitcast i64* [[A_CASTED]] to i32*
8436 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV5]], align 4
8437 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8
8438 // CHECK10-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV2]], align 8
8439 // CHECK10-NEXT: [[CONV6:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
8440 // CHECK10-NEXT: store i16 [[TMP5]], i16* [[CONV6]], align 2
8441 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[AA_CASTED]], align 8
8442 // CHECK10-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV3]], align 8
8443 // CHECK10-NEXT: [[CONV7:%.*]] = bitcast i64* [[AAA_CASTED]] to i8*
8444 // CHECK10-NEXT: store i8 [[TMP7]], i8* [[CONV7]], align 1
8445 // CHECK10-NEXT: [[TMP8:%.*]] = load i64, i64* [[AAA_CASTED]], align 8
8446 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, [10 x i32]*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]], [10 x i32]* [[TMP0]])
8447 // CHECK10-NEXT: ret void
8448 //
8449 //
8450 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..4
8451 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
8452 // CHECK10-NEXT: entry:
8453 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8454 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8455 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
8456 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
8457 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
8458 // CHECK10-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8
8459 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
8460 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8461 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
8462 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8463 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
8464 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4
8465 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
8466 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8467 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8468 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8469 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8470 // CHECK10-NEXT: [[I8:%.*]] = alloca i32, align 4
8471 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8472 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8473 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
8474 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
8475 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
8476 // CHECK10-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8
8477 // CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
8478 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
8479 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32*
8480 // CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
8481 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8*
8482 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
8483 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 8
8484 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
8485 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
8486 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_4]], align 4
8487 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
8488 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8489 // CHECK10-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]]
8490 // CHECK10-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1
8491 // CHECK10-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1
8492 // CHECK10-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
8493 // CHECK10-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1
8494 // CHECK10-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4
8495 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8496 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[I]], align 4
8497 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8498 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
8499 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]]
8500 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8501 // CHECK10: omp.precond.then:
8502 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8503 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
8504 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
8505 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8506 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8507 // CHECK10-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8508 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
8509 // CHECK10-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8510 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8511 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
8512 // CHECK10-NEXT: [[CMP9:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]]
8513 // CHECK10-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8514 // CHECK10: cond.true:
8515 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
8516 // CHECK10-NEXT: br label [[COND_END:%.*]]
8517 // CHECK10: cond.false:
8518 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8519 // CHECK10-NEXT: br label [[COND_END]]
8520 // CHECK10: cond.end:
8521 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
8522 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8523 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8524 // CHECK10-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
8525 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8526 // CHECK10: omp.inner.for.cond:
8527 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8528 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8529 // CHECK10-NEXT: [[ADD10:%.*]] = add i32 [[TMP17]], 1
8530 // CHECK10-NEXT: [[CMP11:%.*]] = icmp ult i32 [[TMP16]], [[ADD10]]
8531 // CHECK10-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8532 // CHECK10: omp.inner.for.body:
8533 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8534 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8535 // CHECK10-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1
8536 // CHECK10-NEXT: [[ADD12:%.*]] = add i32 [[TMP18]], [[MUL]]
8537 // CHECK10-NEXT: store i32 [[ADD12]], i32* [[I8]], align 4
8538 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 8
8539 // CHECK10-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP20]], 1
8540 // CHECK10-NEXT: store i32 [[ADD13]], i32* [[CONV1]], align 8
8541 // CHECK10-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV2]], align 8
8542 // CHECK10-NEXT: [[CONV14:%.*]] = sext i16 [[TMP21]] to i32
8543 // CHECK10-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1
8544 // CHECK10-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i16
8545 // CHECK10-NEXT: store i16 [[CONV16]], i16* [[CONV2]], align 8
8546 // CHECK10-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV3]], align 8
8547 // CHECK10-NEXT: [[CONV17:%.*]] = sext i8 [[TMP22]] to i32
8548 // CHECK10-NEXT: [[ADD18:%.*]] = add nsw i32 [[CONV17]], 1
8549 // CHECK10-NEXT: [[CONV19:%.*]] = trunc i32 [[ADD18]] to i8
8550 // CHECK10-NEXT: store i8 [[CONV19]], i8* [[CONV3]], align 8
8551 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2
8552 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
8553 // CHECK10-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP23]], 1
8554 // CHECK10-NEXT: store i32 [[ADD20]], i32* [[ARRAYIDX]], align 4
8555 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8556 // CHECK10: omp.body.continue:
8557 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8558 // CHECK10: omp.inner.for.inc:
8559 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8560 // CHECK10-NEXT: [[ADD21:%.*]] = add i32 [[TMP24]], 1
8561 // CHECK10-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4
8562 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
8563 // CHECK10: omp.inner.for.end:
8564 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8565 // CHECK10: omp.loop.exit:
8566 // CHECK10-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8567 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
8568 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
8569 // CHECK10-NEXT: br label [[OMP_PRECOND_END]]
8570 // CHECK10: omp.precond.end:
8571 // CHECK10-NEXT: ret void
8572 //
8573 //
8574 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218
8575 // CHECK10-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] {
8576 // CHECK10-NEXT: entry:
8577 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
8578 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8
8579 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
8580 // CHECK10-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
8581 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8
8582 // CHECK10-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8
8583 // CHECK10-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
8584 // CHECK10-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8
8585 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8586 // CHECK10-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
8587 // CHECK10-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8
8588 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
8589 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
8590 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8591 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
8592 // CHECK10-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8
8593 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
8594 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i32*
8595 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
8596 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[B_CASTED]], align 8
8597 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64, i64, i64, i16*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i64 [[TMP5]], i64 [[TMP1]], i64 [[TMP2]], i16* [[TMP3]])
8598 // CHECK10-NEXT: ret void
8599 //
8600 //
8601 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..5
8602 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] {
8603 // CHECK10-NEXT: entry:
8604 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8605 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8606 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
8607 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8
8608 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
8609 // CHECK10-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
8610 // CHECK10-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8
8611 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8612 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
8613 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8614 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8615 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8616 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8617 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
8618 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8619 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8620 // CHECK10-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
8621 // CHECK10-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8
8622 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8623 // CHECK10-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
8624 // CHECK10-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8
8625 // CHECK10-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
8626 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
8627 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8628 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
8629 // CHECK10-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8
8630 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8631 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
8632 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8633 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8634 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8635 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
8636 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8637 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8638 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9
8639 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8640 // CHECK10: cond.true:
8641 // CHECK10-NEXT: br label [[COND_END:%.*]]
8642 // CHECK10: cond.false:
8643 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8644 // CHECK10-NEXT: br label [[COND_END]]
8645 // CHECK10: cond.end:
8646 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
8647 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8648 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8649 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
8650 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8651 // CHECK10: omp.inner.for.cond:
8652 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8653 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8654 // CHECK10-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
8655 // CHECK10-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8656 // CHECK10: omp.inner.for.body:
8657 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8658 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
8659 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8660 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
8661 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
8662 // CHECK10-NEXT: [[CONV4:%.*]] = sitofp i32 [[TMP12]] to double
8663 // CHECK10-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.500000e+00
8664 // CHECK10-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
8665 // CHECK10-NEXT: store double [[ADD5]], double* [[A]], align 8
8666 // CHECK10-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0
8667 // CHECK10-NEXT: [[TMP13:%.*]] = load double, double* [[A6]], align 8
8668 // CHECK10-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00
8669 // CHECK10-NEXT: store double [[INC]], double* [[A6]], align 8
8670 // CHECK10-NEXT: [[CONV7:%.*]] = fptosi double [[INC]] to i16
8671 // CHECK10-NEXT: [[TMP14:%.*]] = mul nsw i64 1, [[TMP2]]
8672 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i64 [[TMP14]]
8673 // CHECK10-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1
8674 // CHECK10-NEXT: store i16 [[CONV7]], i16* [[ARRAYIDX8]], align 2
8675 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8676 // CHECK10: omp.body.continue:
8677 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8678 // CHECK10: omp.inner.for.inc:
8679 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8680 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1
8681 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
8682 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
8683 // CHECK10: omp.inner.for.end:
8684 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8685 // CHECK10: omp.loop.exit:
8686 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
8687 // CHECK10-NEXT: ret void
8688 //
8689 //
8690 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183
8691 // CHECK10-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
8692 // CHECK10-NEXT: entry:
8693 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
8694 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
8695 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
8696 // CHECK10-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
8697 // CHECK10-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
8698 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
8699 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
8700 // CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
8701 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
8702 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
8703 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
8704 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
8705 // CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
8706 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[CONV2]], align 4
8707 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8
8708 // CHECK10-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 8
8709 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
8710 // CHECK10-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2
8711 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8
8712 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], [10 x i32]* [[TMP0]])
8713 // CHECK10-NEXT: ret void
8714 //
8715 //
8716 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..6
8717 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
8718 // CHECK10-NEXT: entry:
8719 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8720 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8721 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
8722 // CHECK10-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
8723 // CHECK10-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
8724 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8725 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
8726 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8727 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8728 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8729 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8730 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
8731 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8732 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8733 // CHECK10-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
8734 // CHECK10-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
8735 // CHECK10-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
8736 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
8737 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
8738 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
8739 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8740 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
8741 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8742 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8743 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8744 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
8745 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8746 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8747 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
8748 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8749 // CHECK10: cond.true:
8750 // CHECK10-NEXT: br label [[COND_END:%.*]]
8751 // CHECK10: cond.false:
8752 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8753 // CHECK10-NEXT: br label [[COND_END]]
8754 // CHECK10: cond.end:
8755 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
8756 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8757 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8758 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
8759 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8760 // CHECK10: omp.inner.for.cond:
8761 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8762 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8763 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8764 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8765 // CHECK10: omp.inner.for.body:
8766 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8767 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
8768 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8769 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
8770 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8
8771 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
8772 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 8
8773 // CHECK10-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV1]], align 8
8774 // CHECK10-NEXT: [[CONV4:%.*]] = sext i16 [[TMP10]] to i32
8775 // CHECK10-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1
8776 // CHECK10-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
8777 // CHECK10-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 8
8778 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2
8779 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
8780 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], 1
8781 // CHECK10-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX]], align 4
8782 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8783 // CHECK10: omp.body.continue:
8784 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8785 // CHECK10: omp.inner.for.inc:
8786 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8787 // CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP12]], 1
8788 // CHECK10-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
8789 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
8790 // CHECK10: omp.inner.for.end:
8791 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8792 // CHECK10: omp.loop.exit:
8793 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
8794 // CHECK10-NEXT: ret void
8795 //
8796 //
8797 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103
8798 // CHECK11-SAME: (i32 [[AA:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]], i32 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] {
8799 // CHECK11-NEXT: entry:
8800 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
8801 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
8802 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4
8803 // CHECK11-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
8804 // CHECK11-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
8805 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
8806 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8807 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
8808 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
8809 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8810 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
8811 // CHECK11-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]])
8812 // CHECK11-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4
8813 // CHECK11-NEXT: [[CONV3:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
8814 // CHECK11-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2
8815 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4
8816 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP4]])
8817 // CHECK11-NEXT: ret void
8818 //
8819 //
8820 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
8821 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[AA:%.*]]) #[[ATTR0]] {
8822 // CHECK11-NEXT: entry:
8823 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8824 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8825 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
8826 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8827 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
8828 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8829 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8830 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8831 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8832 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
8833 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8834 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8835 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
8836 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
8837 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8838 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
8839 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8840 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8841 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8842 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8843 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8844 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8845 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
8846 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8847 // CHECK11: cond.true:
8848 // CHECK11-NEXT: br label [[COND_END:%.*]]
8849 // CHECK11: cond.false:
8850 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8851 // CHECK11-NEXT: br label [[COND_END]]
8852 // CHECK11: cond.end:
8853 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8854 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8855 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8856 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8857 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8858 // CHECK11: omp.inner.for.cond:
8859 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8860 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8861 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8862 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8863 // CHECK11: omp.inner.for.body:
8864 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8865 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
8866 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8867 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
8868 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8869 // CHECK11: omp.body.continue:
8870 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8871 // CHECK11: omp.inner.for.inc:
8872 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8873 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
8874 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
8875 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
8876 // CHECK11: omp.inner.for.end:
8877 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8878 // CHECK11: omp.loop.exit:
8879 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8880 // CHECK11-NEXT: ret void
8881 //
8882 //
8883 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113
8884 // CHECK11-SAME: (i32 [[AA:%.*]]) #[[ATTR0]] {
8885 // CHECK11-NEXT: entry:
8886 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
8887 // CHECK11-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
8888 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
8889 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
8890 // CHECK11-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
8891 // CHECK11-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
8892 // CHECK11-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2
8893 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[AA_CASTED]], align 4
8894 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP1]])
8895 // CHECK11-NEXT: ret void
8896 //
8897 //
8898 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
8899 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[AA:%.*]]) #[[ATTR0]] {
8900 // CHECK11-NEXT: entry:
8901 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8902 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8903 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
8904 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8905 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
8906 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8907 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8908 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8909 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8910 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
8911 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8912 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8913 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
8914 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
8915 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8916 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
8917 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8918 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8919 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8920 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8921 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8922 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8923 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
8924 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8925 // CHECK11: cond.true:
8926 // CHECK11-NEXT: br label [[COND_END:%.*]]
8927 // CHECK11: cond.false:
8928 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8929 // CHECK11-NEXT: br label [[COND_END]]
8930 // CHECK11: cond.end:
8931 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8932 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8933 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8934 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8935 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8936 // CHECK11: omp.inner.for.cond:
8937 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8938 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8939 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8940 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8941 // CHECK11: omp.inner.for.body:
8942 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8943 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
8944 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8945 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
8946 // CHECK11-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 4
8947 // CHECK11-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32
8948 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1
8949 // CHECK11-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16
8950 // CHECK11-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 4
8951 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8952 // CHECK11: omp.body.continue:
8953 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8954 // CHECK11: omp.inner.for.inc:
8955 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8956 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1
8957 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
8958 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
8959 // CHECK11: omp.inner.for.end:
8960 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8961 // CHECK11: omp.loop.exit:
8962 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8963 // CHECK11-NEXT: ret void
8964 //
8965 //
8966 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120
8967 // CHECK11-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR0]] {
8968 // CHECK11-NEXT: entry:
8969 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
8970 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
8971 // CHECK11-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
8972 // CHECK11-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
8973 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
8974 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
8975 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
8976 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
8977 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4
8978 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
8979 // CHECK11-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV]], align 4
8980 // CHECK11-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
8981 // CHECK11-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2
8982 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4
8983 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]])
8984 // CHECK11-NEXT: ret void
8985 //
8986 //
8987 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2
8988 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR0]] {
8989 // CHECK11-NEXT: entry:
8990 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8991 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8992 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
8993 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
8994 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8995 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
8996 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8997 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8998 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8999 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9000 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
9001 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9002 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9003 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
9004 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
9005 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
9006 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9007 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9008 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9009 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9010 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9011 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
9012 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9013 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9014 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
9015 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9016 // CHECK11: cond.true:
9017 // CHECK11-NEXT: br label [[COND_END:%.*]]
9018 // CHECK11: cond.false:
9019 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9020 // CHECK11-NEXT: br label [[COND_END]]
9021 // CHECK11: cond.end:
9022 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9023 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9024 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9025 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9026 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9027 // CHECK11: omp.inner.for.cond:
9028 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9029 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9030 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9031 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9032 // CHECK11: omp.inner.for.body:
9033 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9034 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
9035 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9036 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
9037 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4
9038 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
9039 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4
9040 // CHECK11-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV]], align 4
9041 // CHECK11-NEXT: [[CONV3:%.*]] = sext i16 [[TMP9]] to i32
9042 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1
9043 // CHECK11-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16
9044 // CHECK11-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 4
9045 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9046 // CHECK11: omp.body.continue:
9047 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9048 // CHECK11: omp.inner.for.inc:
9049 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9050 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1
9051 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
9052 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
9053 // CHECK11: omp.inner.for.end:
9054 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9055 // CHECK11: omp.loop.exit:
9056 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9057 // CHECK11-NEXT: ret void
9058 //
9059 //
9060 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145
9061 // CHECK11-SAME: (i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
9062 // CHECK11-NEXT: entry:
9063 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
9064 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4
9065 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
9066 // CHECK11-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4
9067 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4
9068 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
9069 // CHECK11-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4
9070 // CHECK11-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4
9071 // CHECK11-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4
9072 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9073 // CHECK11-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
9074 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
9075 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
9076 // CHECK11-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4
9077 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
9078 // CHECK11-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4
9079 // CHECK11-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4
9080 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
9081 // CHECK11-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4
9082 // CHECK11-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4
9083 // CHECK11-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4
9084 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9085 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4
9086 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
9087 // CHECK11-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4
9088 // CHECK11-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4
9089 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
9090 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4
9091 // CHECK11-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4
9092 // CHECK11-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4
9093 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4
9094 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[A_CASTED]], align 4
9095 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_CASTED]], align 4
9096 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9097 // CHECK11-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
9098 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
9099 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [10 x float]*, i32, float*, [5 x [10 x double]]*, i32, i32, double*, %struct.TT*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP9]], [10 x float]* [[TMP0]], i32 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i32 [[TMP4]], i32 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i32 [[TMP11]])
9100 // CHECK11-NEXT: ret void
9101 //
9102 //
9103 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3
9104 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
9105 // CHECK11-NEXT: entry:
9106 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9107 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9108 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
9109 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4
9110 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
9111 // CHECK11-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4
9112 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4
9113 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
9114 // CHECK11-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4
9115 // CHECK11-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4
9116 // CHECK11-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4
9117 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9118 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9119 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
9120 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9121 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9122 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9123 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9124 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
9125 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9126 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9127 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
9128 // CHECK11-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4
9129 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
9130 // CHECK11-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4
9131 // CHECK11-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4
9132 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
9133 // CHECK11-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4
9134 // CHECK11-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4
9135 // CHECK11-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4
9136 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9137 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4
9138 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
9139 // CHECK11-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4
9140 // CHECK11-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4
9141 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
9142 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4
9143 // CHECK11-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4
9144 // CHECK11-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4
9145 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9146 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9147 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9148 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9149 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9150 // CHECK11-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9151 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
9152 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]])
9153 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
9154 // CHECK11: omp.dispatch.cond:
9155 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9156 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9
9157 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9158 // CHECK11: cond.true:
9159 // CHECK11-NEXT: br label [[COND_END:%.*]]
9160 // CHECK11: cond.false:
9161 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9162 // CHECK11-NEXT: br label [[COND_END]]
9163 // CHECK11: cond.end:
9164 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
9165 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9166 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9167 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
9168 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9169 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9170 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
9171 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9172 // CHECK11: omp.dispatch.body:
9173 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9174 // CHECK11: omp.inner.for.cond:
9175 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
9176 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
9177 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
9178 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9179 // CHECK11: omp.inner.for.body:
9180 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
9181 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
9182 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9183 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
9184 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group !14
9185 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
9186 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[A_ADDR]], align 4, !llvm.access.group !14
9187 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i32 0, i32 2
9188 // CHECK11-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !14
9189 // CHECK11-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double
9190 // CHECK11-NEXT: [[ADD8:%.*]] = fadd double [[CONV]], 1.000000e+00
9191 // CHECK11-NEXT: [[CONV9:%.*]] = fptrunc double [[ADD8]] to float
9192 // CHECK11-NEXT: store float [[CONV9]], float* [[ARRAYIDX]], align 4, !llvm.access.group !14
9193 // CHECK11-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, float* [[TMP2]], i32 3
9194 // CHECK11-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX10]], align 4, !llvm.access.group !14
9195 // CHECK11-NEXT: [[CONV11:%.*]] = fpext float [[TMP21]] to double
9196 // CHECK11-NEXT: [[ADD12:%.*]] = fadd double [[CONV11]], 1.000000e+00
9197 // CHECK11-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float
9198 // CHECK11-NEXT: store float [[CONV13]], float* [[ARRAYIDX10]], align 4, !llvm.access.group !14
9199 // CHECK11-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i32 0, i32 1
9200 // CHECK11-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX14]], i32 0, i32 2
9201 // CHECK11-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX15]], align 8, !llvm.access.group !14
9202 // CHECK11-NEXT: [[ADD16:%.*]] = fadd double [[TMP22]], 1.000000e+00
9203 // CHECK11-NEXT: store double [[ADD16]], double* [[ARRAYIDX15]], align 8, !llvm.access.group !14
9204 // CHECK11-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP5]]
9205 // CHECK11-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP6]], i32 [[TMP23]]
9206 // CHECK11-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX17]], i32 3
9207 // CHECK11-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX18]], align 8, !llvm.access.group !14
9208 // CHECK11-NEXT: [[ADD19:%.*]] = fadd double [[TMP24]], 1.000000e+00
9209 // CHECK11-NEXT: store double [[ADD19]], double* [[ARRAYIDX18]], align 8, !llvm.access.group !14
9210 // CHECK11-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0
9211 // CHECK11-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4, !llvm.access.group !14
9212 // CHECK11-NEXT: [[ADD20:%.*]] = add nsw i64 [[TMP25]], 1
9213 // CHECK11-NEXT: store i64 [[ADD20]], i64* [[X]], align 4, !llvm.access.group !14
9214 // CHECK11-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1
9215 // CHECK11-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4, !llvm.access.group !14
9216 // CHECK11-NEXT: [[CONV21:%.*]] = sext i8 [[TMP26]] to i32
9217 // CHECK11-NEXT: [[ADD22:%.*]] = add nsw i32 [[CONV21]], 1
9218 // CHECK11-NEXT: [[CONV23:%.*]] = trunc i32 [[ADD22]] to i8
9219 // CHECK11-NEXT: store i8 [[CONV23]], i8* [[Y]], align 4, !llvm.access.group !14
9220 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9221 // CHECK11: omp.body.continue:
9222 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9223 // CHECK11: omp.inner.for.inc:
9224 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
9225 // CHECK11-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP27]], 1
9226 // CHECK11-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
9227 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
9228 // CHECK11: omp.inner.for.end:
9229 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
9230 // CHECK11: omp.dispatch.inc:
9231 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9232 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9233 // CHECK11-NEXT: [[ADD25:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
9234 // CHECK11-NEXT: store i32 [[ADD25]], i32* [[DOTOMP_LB]], align 4
9235 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9236 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9237 // CHECK11-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
9238 // CHECK11-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_UB]], align 4
9239 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]]
9240 // CHECK11: omp.dispatch.end:
9241 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]])
9242 // CHECK11-NEXT: ret void
9243 //
9244 //
9245 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200
9246 // CHECK11-SAME: (i32 [[N:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
9247 // CHECK11-NEXT: entry:
9248 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
9249 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
9250 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
9251 // CHECK11-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4
9252 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
9253 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
9254 // CHECK11-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
9255 // CHECK11-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
9256 // CHECK11-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4
9257 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
9258 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
9259 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
9260 // CHECK11-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4
9261 // CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
9262 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
9263 // CHECK11-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8*
9264 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
9265 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
9266 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4
9267 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4
9268 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4
9269 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[A_CASTED]], align 4
9270 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4
9271 // CHECK11-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV]], align 4
9272 // CHECK11-NEXT: [[CONV2:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
9273 // CHECK11-NEXT: store i16 [[TMP5]], i16* [[CONV2]], align 2
9274 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[AA_CASTED]], align 4
9275 // CHECK11-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV1]], align 4
9276 // CHECK11-NEXT: [[CONV3:%.*]] = bitcast i32* [[AAA_CASTED]] to i8*
9277 // CHECK11-NEXT: store i8 [[TMP7]], i8* [[CONV3]], align 1
9278 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[AAA_CASTED]], align 4
9279 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, [10 x i32]*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP8]], [10 x i32]* [[TMP0]])
9280 // CHECK11-NEXT: ret void
9281 //
9282 //
9283 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4
9284 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
9285 // CHECK11-NEXT: entry:
9286 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9287 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9288 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
9289 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
9290 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
9291 // CHECK11-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4
9292 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
9293 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9294 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
9295 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9296 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
9297 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
9298 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
9299 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9300 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9301 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9302 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9303 // CHECK11-NEXT: [[I6:%.*]] = alloca i32, align 4
9304 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9305 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9306 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
9307 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
9308 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
9309 // CHECK11-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4
9310 // CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
9311 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
9312 // CHECK11-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8*
9313 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
9314 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
9315 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
9316 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
9317 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
9318 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
9319 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9320 // CHECK11-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]]
9321 // CHECK11-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1
9322 // CHECK11-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1
9323 // CHECK11-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
9324 // CHECK11-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1
9325 // CHECK11-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
9326 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9327 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[I]], align 4
9328 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9329 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
9330 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]]
9331 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
9332 // CHECK11: omp.precond.then:
9333 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9334 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
9335 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
9336 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9337 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9338 // CHECK11-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9339 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
9340 // CHECK11-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9341 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9342 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
9343 // CHECK11-NEXT: [[CMP7:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]]
9344 // CHECK11-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9345 // CHECK11: cond.true:
9346 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
9347 // CHECK11-NEXT: br label [[COND_END:%.*]]
9348 // CHECK11: cond.false:
9349 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9350 // CHECK11-NEXT: br label [[COND_END]]
9351 // CHECK11: cond.end:
9352 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
9353 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9354 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9355 // CHECK11-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
9356 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9357 // CHECK11: omp.inner.for.cond:
9358 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9359 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9360 // CHECK11-NEXT: [[ADD8:%.*]] = add i32 [[TMP17]], 1
9361 // CHECK11-NEXT: [[CMP9:%.*]] = icmp ult i32 [[TMP16]], [[ADD8]]
9362 // CHECK11-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9363 // CHECK11: omp.inner.for.body:
9364 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9365 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9366 // CHECK11-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1
9367 // CHECK11-NEXT: [[ADD10:%.*]] = add i32 [[TMP18]], [[MUL]]
9368 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[I6]], align 4
9369 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[A_ADDR]], align 4
9370 // CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1
9371 // CHECK11-NEXT: store i32 [[ADD11]], i32* [[A_ADDR]], align 4
9372 // CHECK11-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV]], align 4
9373 // CHECK11-NEXT: [[CONV12:%.*]] = sext i16 [[TMP21]] to i32
9374 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 [[CONV12]], 1
9375 // CHECK11-NEXT: [[CONV14:%.*]] = trunc i32 [[ADD13]] to i16
9376 // CHECK11-NEXT: store i16 [[CONV14]], i16* [[CONV]], align 4
9377 // CHECK11-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV1]], align 4
9378 // CHECK11-NEXT: [[CONV15:%.*]] = sext i8 [[TMP22]] to i32
9379 // CHECK11-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV15]], 1
9380 // CHECK11-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i8
9381 // CHECK11-NEXT: store i8 [[CONV17]], i8* [[CONV1]], align 4
9382 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2
9383 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
9384 // CHECK11-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], 1
9385 // CHECK11-NEXT: store i32 [[ADD18]], i32* [[ARRAYIDX]], align 4
9386 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9387 // CHECK11: omp.body.continue:
9388 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9389 // CHECK11: omp.inner.for.inc:
9390 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9391 // CHECK11-NEXT: [[ADD19:%.*]] = add i32 [[TMP24]], 1
9392 // CHECK11-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4
9393 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
9394 // CHECK11: omp.inner.for.end:
9395 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9396 // CHECK11: omp.loop.exit:
9397 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9398 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
9399 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
9400 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
9401 // CHECK11: omp.precond.end:
9402 // CHECK11-NEXT: ret void
9403 //
9404 //
9405 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218
9406 // CHECK11-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] {
9407 // CHECK11-NEXT: entry:
9408 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
9409 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
9410 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
9411 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
9412 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4
9413 // CHECK11-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4
9414 // CHECK11-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
9415 // CHECK11-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4
9416 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
9417 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
9418 // CHECK11-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4
9419 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
9420 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
9421 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
9422 // CHECK11-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4
9423 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[B_ADDR]], align 4
9424 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4
9425 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4
9426 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32, i32, i32, i16*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i32 [[TMP5]], i32 [[TMP1]], i32 [[TMP2]], i16* [[TMP3]])
9427 // CHECK11-NEXT: ret void
9428 //
9429 //
9430 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..5
9431 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] {
9432 // CHECK11-NEXT: entry:
9433 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9434 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9435 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
9436 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
9437 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
9438 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
9439 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4
9440 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9441 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
9442 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9443 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9444 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9445 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9446 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
9447 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9448 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9449 // CHECK11-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
9450 // CHECK11-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4
9451 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
9452 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
9453 // CHECK11-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4
9454 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
9455 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
9456 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
9457 // CHECK11-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4
9458 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9459 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9460 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9461 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9462 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9463 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
9464 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9465 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9466 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9
9467 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9468 // CHECK11: cond.true:
9469 // CHECK11-NEXT: br label [[COND_END:%.*]]
9470 // CHECK11: cond.false:
9471 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9472 // CHECK11-NEXT: br label [[COND_END]]
9473 // CHECK11: cond.end:
9474 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
9475 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9476 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9477 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
9478 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9479 // CHECK11: omp.inner.for.cond:
9480 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9481 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9482 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
9483 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9484 // CHECK11: omp.inner.for.body:
9485 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9486 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
9487 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9488 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
9489 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[B_ADDR]], align 4
9490 // CHECK11-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP12]] to double
9491 // CHECK11-NEXT: [[ADD4:%.*]] = fadd double [[CONV]], 1.500000e+00
9492 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
9493 // CHECK11-NEXT: store double [[ADD4]], double* [[A]], align 4
9494 // CHECK11-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0
9495 // CHECK11-NEXT: [[TMP13:%.*]] = load double, double* [[A5]], align 4
9496 // CHECK11-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00
9497 // CHECK11-NEXT: store double [[INC]], double* [[A5]], align 4
9498 // CHECK11-NEXT: [[CONV6:%.*]] = fptosi double [[INC]] to i16
9499 // CHECK11-NEXT: [[TMP14:%.*]] = mul nsw i32 1, [[TMP2]]
9500 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i32 [[TMP14]]
9501 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1
9502 // CHECK11-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX7]], align 2
9503 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9504 // CHECK11: omp.body.continue:
9505 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9506 // CHECK11: omp.inner.for.inc:
9507 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9508 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
9509 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
9510 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
9511 // CHECK11: omp.inner.for.end:
9512 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9513 // CHECK11: omp.loop.exit:
9514 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
9515 // CHECK11-NEXT: ret void
9516 //
9517 //
9518 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183
9519 // CHECK11-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
9520 // CHECK11-NEXT: entry:
9521 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
9522 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
9523 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
9524 // CHECK11-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
9525 // CHECK11-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
9526 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
9527 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
9528 // CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
9529 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
9530 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
9531 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
9532 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[A_CASTED]], align 4
9533 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4
9534 // CHECK11-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4
9535 // CHECK11-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
9536 // CHECK11-NEXT: store i16 [[TMP3]], i16* [[CONV1]], align 2
9537 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4
9538 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], [10 x i32]* [[TMP0]])
9539 // CHECK11-NEXT: ret void
9540 //
9541 //
9542 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..6
9543 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
9544 // CHECK11-NEXT: entry:
9545 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9546 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9547 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
9548 // CHECK11-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
9549 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
9550 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9551 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
9552 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9553 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9554 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9555 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9556 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
9557 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9558 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9559 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
9560 // CHECK11-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
9561 // CHECK11-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
9562 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
9563 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
9564 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9565 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9566 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9567 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9568 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9569 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9570 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9571 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9572 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9573 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9574 // CHECK11: cond.true:
9575 // CHECK11-NEXT: br label [[COND_END:%.*]]
9576 // CHECK11: cond.false:
9577 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9578 // CHECK11-NEXT: br label [[COND_END]]
9579 // CHECK11: cond.end:
9580 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9581 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9582 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9583 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9584 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9585 // CHECK11: omp.inner.for.cond:
9586 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9587 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9588 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9589 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9590 // CHECK11: omp.inner.for.body:
9591 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9592 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
9593 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9594 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
9595 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4
9596 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1
9597 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4
9598 // CHECK11-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV]], align 4
9599 // CHECK11-NEXT: [[CONV3:%.*]] = sext i16 [[TMP10]] to i32
9600 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1
9601 // CHECK11-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16
9602 // CHECK11-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 4
9603 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2
9604 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
9605 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], 1
9606 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4
9607 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9608 // CHECK11: omp.body.continue:
9609 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9610 // CHECK11: omp.inner.for.inc:
9611 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9612 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1
9613 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
9614 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
9615 // CHECK11: omp.inner.for.end:
9616 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9617 // CHECK11: omp.loop.exit:
9618 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9619 // CHECK11-NEXT: ret void
9620 //
9621 //
9622 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103
9623 // CHECK12-SAME: (i32 [[AA:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]], i32 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] {
9624 // CHECK12-NEXT: entry:
9625 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
9626 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9627 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4
9628 // CHECK12-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
9629 // CHECK12-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
9630 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
9631 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9632 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
9633 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
9634 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9635 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
9636 // CHECK12-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]])
9637 // CHECK12-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4
9638 // CHECK12-NEXT: [[CONV3:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
9639 // CHECK12-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2
9640 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4
9641 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP4]])
9642 // CHECK12-NEXT: ret void
9643 //
9644 //
9645 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined.
9646 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[AA:%.*]]) #[[ATTR0]] {
9647 // CHECK12-NEXT: entry:
9648 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9649 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9650 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
9651 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9652 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
9653 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9654 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9655 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9656 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9657 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
9658 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9659 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9660 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
9661 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
9662 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9663 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9664 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9665 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9666 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9667 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
9668 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9669 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9670 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
9671 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9672 // CHECK12: cond.true:
9673 // CHECK12-NEXT: br label [[COND_END:%.*]]
9674 // CHECK12: cond.false:
9675 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9676 // CHECK12-NEXT: br label [[COND_END]]
9677 // CHECK12: cond.end:
9678 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9679 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9680 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9681 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9682 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9683 // CHECK12: omp.inner.for.cond:
9684 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9685 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9686 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9687 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9688 // CHECK12: omp.inner.for.body:
9689 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9690 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
9691 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9692 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
9693 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9694 // CHECK12: omp.body.continue:
9695 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9696 // CHECK12: omp.inner.for.inc:
9697 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9698 // CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
9699 // CHECK12-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
9700 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
9701 // CHECK12: omp.inner.for.end:
9702 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9703 // CHECK12: omp.loop.exit:
9704 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9705 // CHECK12-NEXT: ret void
9706 //
9707 //
9708 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113
9709 // CHECK12-SAME: (i32 [[AA:%.*]]) #[[ATTR0]] {
9710 // CHECK12-NEXT: entry:
9711 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
9712 // CHECK12-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
9713 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
9714 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
9715 // CHECK12-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
9716 // CHECK12-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
9717 // CHECK12-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2
9718 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[AA_CASTED]], align 4
9719 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP1]])
9720 // CHECK12-NEXT: ret void
9721 //
9722 //
9723 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1
9724 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[AA:%.*]]) #[[ATTR0]] {
9725 // CHECK12-NEXT: entry:
9726 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9727 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9728 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
9729 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9730 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
9731 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9732 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9733 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9734 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9735 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
9736 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9737 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9738 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
9739 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
9740 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9741 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9742 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9743 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9744 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9745 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
9746 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9747 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9748 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
9749 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9750 // CHECK12: cond.true:
9751 // CHECK12-NEXT: br label [[COND_END:%.*]]
9752 // CHECK12: cond.false:
9753 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9754 // CHECK12-NEXT: br label [[COND_END]]
9755 // CHECK12: cond.end:
9756 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9757 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9758 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9759 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9760 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9761 // CHECK12: omp.inner.for.cond:
9762 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9763 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9764 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9765 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9766 // CHECK12: omp.inner.for.body:
9767 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9768 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
9769 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9770 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
9771 // CHECK12-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 4
9772 // CHECK12-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32
9773 // CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1
9774 // CHECK12-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16
9775 // CHECK12-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 4
9776 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9777 // CHECK12: omp.body.continue:
9778 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9779 // CHECK12: omp.inner.for.inc:
9780 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9781 // CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1
9782 // CHECK12-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
9783 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
9784 // CHECK12: omp.inner.for.end:
9785 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9786 // CHECK12: omp.loop.exit:
9787 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9788 // CHECK12-NEXT: ret void
9789 //
9790 //
9791 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120
9792 // CHECK12-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR0]] {
9793 // CHECK12-NEXT: entry:
9794 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
9795 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
9796 // CHECK12-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
9797 // CHECK12-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
9798 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
9799 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
9800 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
9801 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
9802 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4
9803 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
9804 // CHECK12-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV]], align 4
9805 // CHECK12-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
9806 // CHECK12-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2
9807 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4
9808 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]])
9809 // CHECK12-NEXT: ret void
9810 //
9811 //
9812 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2
9813 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR0]] {
9814 // CHECK12-NEXT: entry:
9815 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9816 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9817 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
9818 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
9819 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9820 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
9821 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9822 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9823 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9824 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9825 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
9826 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9827 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9828 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
9829 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
9830 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
9831 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9832 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9833 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9834 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9835 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9836 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
9837 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9838 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9839 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
9840 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9841 // CHECK12: cond.true:
9842 // CHECK12-NEXT: br label [[COND_END:%.*]]
9843 // CHECK12: cond.false:
9844 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9845 // CHECK12-NEXT: br label [[COND_END]]
9846 // CHECK12: cond.end:
9847 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9848 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9849 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9850 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9851 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9852 // CHECK12: omp.inner.for.cond:
9853 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9854 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9855 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9856 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9857 // CHECK12: omp.inner.for.body:
9858 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9859 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
9860 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9861 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
9862 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4
9863 // CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
9864 // CHECK12-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4
9865 // CHECK12-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV]], align 4
9866 // CHECK12-NEXT: [[CONV3:%.*]] = sext i16 [[TMP9]] to i32
9867 // CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1
9868 // CHECK12-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16
9869 // CHECK12-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 4
9870 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9871 // CHECK12: omp.body.continue:
9872 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9873 // CHECK12: omp.inner.for.inc:
9874 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9875 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1
9876 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
9877 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
9878 // CHECK12: omp.inner.for.end:
9879 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9880 // CHECK12: omp.loop.exit:
9881 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9882 // CHECK12-NEXT: ret void
9883 //
9884 //
9885 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145
9886 // CHECK12-SAME: (i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
9887 // CHECK12-NEXT: entry:
9888 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
9889 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4
9890 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
9891 // CHECK12-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4
9892 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4
9893 // CHECK12-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
9894 // CHECK12-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4
9895 // CHECK12-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4
9896 // CHECK12-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4
9897 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9898 // CHECK12-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
9899 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
9900 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
9901 // CHECK12-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4
9902 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
9903 // CHECK12-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4
9904 // CHECK12-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4
9905 // CHECK12-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
9906 // CHECK12-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4
9907 // CHECK12-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4
9908 // CHECK12-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4
9909 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9910 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4
9911 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
9912 // CHECK12-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4
9913 // CHECK12-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4
9914 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
9915 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4
9916 // CHECK12-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4
9917 // CHECK12-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4
9918 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4
9919 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[A_CASTED]], align 4
9920 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_CASTED]], align 4
9921 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9922 // CHECK12-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
9923 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
9924 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [10 x float]*, i32, float*, [5 x [10 x double]]*, i32, i32, double*, %struct.TT*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP9]], [10 x float]* [[TMP0]], i32 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i32 [[TMP4]], i32 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i32 [[TMP11]])
9925 // CHECK12-NEXT: ret void
9926 //
9927 //
9928 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3
9929 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
9930 // CHECK12-NEXT: entry:
9931 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9932 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9933 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
9934 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4
9935 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
9936 // CHECK12-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4
9937 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4
9938 // CHECK12-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
9939 // CHECK12-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4
9940 // CHECK12-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4
9941 // CHECK12-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4
9942 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9943 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9944 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
9945 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9946 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9947 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9948 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9949 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
9950 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9951 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9952 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
9953 // CHECK12-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4
9954 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
9955 // CHECK12-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4
9956 // CHECK12-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4
9957 // CHECK12-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
9958 // CHECK12-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4
9959 // CHECK12-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4
9960 // CHECK12-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4
9961 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9962 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4
9963 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
9964 // CHECK12-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4
9965 // CHECK12-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4
9966 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
9967 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4
9968 // CHECK12-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4
9969 // CHECK12-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4
9970 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9971 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9972 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9973 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9974 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9975 // CHECK12-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9976 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
9977 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]])
9978 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
9979 // CHECK12: omp.dispatch.cond:
9980 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9981 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9
9982 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9983 // CHECK12: cond.true:
9984 // CHECK12-NEXT: br label [[COND_END:%.*]]
9985 // CHECK12: cond.false:
9986 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9987 // CHECK12-NEXT: br label [[COND_END]]
9988 // CHECK12: cond.end:
9989 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
9990 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9991 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9992 // CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
9993 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9994 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9995 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
9996 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9997 // CHECK12: omp.dispatch.body:
9998 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9999 // CHECK12: omp.inner.for.cond:
10000 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
10001 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
10002 // CHECK12-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
10003 // CHECK12-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10004 // CHECK12: omp.inner.for.body:
10005 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
10006 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
10007 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10008 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
10009 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group !14
10010 // CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
10011 // CHECK12-NEXT: store i32 [[ADD7]], i32* [[A_ADDR]], align 4, !llvm.access.group !14
10012 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i32 0, i32 2
10013 // CHECK12-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !14
10014 // CHECK12-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double
10015 // CHECK12-NEXT: [[ADD8:%.*]] = fadd double [[CONV]], 1.000000e+00
10016 // CHECK12-NEXT: [[CONV9:%.*]] = fptrunc double [[ADD8]] to float
10017 // CHECK12-NEXT: store float [[CONV9]], float* [[ARRAYIDX]], align 4, !llvm.access.group !14
10018 // CHECK12-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, float* [[TMP2]], i32 3
10019 // CHECK12-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX10]], align 4, !llvm.access.group !14
10020 // CHECK12-NEXT: [[CONV11:%.*]] = fpext float [[TMP21]] to double
10021 // CHECK12-NEXT: [[ADD12:%.*]] = fadd double [[CONV11]], 1.000000e+00
10022 // CHECK12-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float
10023 // CHECK12-NEXT: store float [[CONV13]], float* [[ARRAYIDX10]], align 4, !llvm.access.group !14
10024 // CHECK12-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i32 0, i32 1
10025 // CHECK12-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX14]], i32 0, i32 2
10026 // CHECK12-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX15]], align 8, !llvm.access.group !14
10027 // CHECK12-NEXT: [[ADD16:%.*]] = fadd double [[TMP22]], 1.000000e+00
10028 // CHECK12-NEXT: store double [[ADD16]], double* [[ARRAYIDX15]], align 8, !llvm.access.group !14
10029 // CHECK12-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP5]]
10030 // CHECK12-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP6]], i32 [[TMP23]]
10031 // CHECK12-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX17]], i32 3
10032 // CHECK12-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX18]], align 8, !llvm.access.group !14
10033 // CHECK12-NEXT: [[ADD19:%.*]] = fadd double [[TMP24]], 1.000000e+00
10034 // CHECK12-NEXT: store double [[ADD19]], double* [[ARRAYIDX18]], align 8, !llvm.access.group !14
10035 // CHECK12-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0
10036 // CHECK12-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4, !llvm.access.group !14
10037 // CHECK12-NEXT: [[ADD20:%.*]] = add nsw i64 [[TMP25]], 1
10038 // CHECK12-NEXT: store i64 [[ADD20]], i64* [[X]], align 4, !llvm.access.group !14
10039 // CHECK12-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1
10040 // CHECK12-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4, !llvm.access.group !14
10041 // CHECK12-NEXT: [[CONV21:%.*]] = sext i8 [[TMP26]] to i32
10042 // CHECK12-NEXT: [[ADD22:%.*]] = add nsw i32 [[CONV21]], 1
10043 // CHECK12-NEXT: [[CONV23:%.*]] = trunc i32 [[ADD22]] to i8
10044 // CHECK12-NEXT: store i8 [[CONV23]], i8* [[Y]], align 4, !llvm.access.group !14
10045 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10046 // CHECK12: omp.body.continue:
10047 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10048 // CHECK12: omp.inner.for.inc:
10049 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
10050 // CHECK12-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP27]], 1
10051 // CHECK12-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
10052 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
10053 // CHECK12: omp.inner.for.end:
10054 // CHECK12-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
10055 // CHECK12: omp.dispatch.inc:
10056 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10057 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10058 // CHECK12-NEXT: [[ADD25:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
10059 // CHECK12-NEXT: store i32 [[ADD25]], i32* [[DOTOMP_LB]], align 4
10060 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10061 // CHECK12-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10062 // CHECK12-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
10063 // CHECK12-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_UB]], align 4
10064 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND]]
10065 // CHECK12: omp.dispatch.end:
10066 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]])
10067 // CHECK12-NEXT: ret void
10068 //
10069 //
10070 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200
10071 // CHECK12-SAME: (i32 [[N:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
10072 // CHECK12-NEXT: entry:
10073 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
10074 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
10075 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
10076 // CHECK12-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4
10077 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
10078 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
10079 // CHECK12-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
10080 // CHECK12-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
10081 // CHECK12-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4
10082 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
10083 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
10084 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
10085 // CHECK12-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4
10086 // CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
10087 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
10088 // CHECK12-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8*
10089 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
10090 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
10091 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4
10092 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4
10093 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4
10094 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[A_CASTED]], align 4
10095 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4
10096 // CHECK12-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV]], align 4
10097 // CHECK12-NEXT: [[CONV2:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
10098 // CHECK12-NEXT: store i16 [[TMP5]], i16* [[CONV2]], align 2
10099 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[AA_CASTED]], align 4
10100 // CHECK12-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV1]], align 4
10101 // CHECK12-NEXT: [[CONV3:%.*]] = bitcast i32* [[AAA_CASTED]] to i8*
10102 // CHECK12-NEXT: store i8 [[TMP7]], i8* [[CONV3]], align 1
10103 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[AAA_CASTED]], align 4
10104 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, [10 x i32]*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP8]], [10 x i32]* [[TMP0]])
10105 // CHECK12-NEXT: ret void
10106 //
10107 //
10108 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..4
10109 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
10110 // CHECK12-NEXT: entry:
10111 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
10112 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
10113 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
10114 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
10115 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
10116 // CHECK12-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4
10117 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
10118 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10119 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
10120 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10121 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10122 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
10123 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
10124 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10125 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10126 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10127 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10128 // CHECK12-NEXT: [[I6:%.*]] = alloca i32, align 4
10129 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
10130 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
10131 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
10132 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
10133 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
10134 // CHECK12-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4
10135 // CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
10136 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
10137 // CHECK12-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8*
10138 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
10139 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
10140 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
10141 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
10142 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
10143 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10144 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10145 // CHECK12-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]]
10146 // CHECK12-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1
10147 // CHECK12-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1
10148 // CHECK12-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
10149 // CHECK12-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1
10150 // CHECK12-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
10151 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10152 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[I]], align 4
10153 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10154 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10155 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]]
10156 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10157 // CHECK12: omp.precond.then:
10158 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10159 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10160 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
10161 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10162 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10163 // CHECK12-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
10164 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
10165 // CHECK12-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10166 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10167 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10168 // CHECK12-NEXT: [[CMP7:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]]
10169 // CHECK12-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10170 // CHECK12: cond.true:
10171 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10172 // CHECK12-NEXT: br label [[COND_END:%.*]]
10173 // CHECK12: cond.false:
10174 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10175 // CHECK12-NEXT: br label [[COND_END]]
10176 // CHECK12: cond.end:
10177 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
10178 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10179 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10180 // CHECK12-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
10181 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10182 // CHECK12: omp.inner.for.cond:
10183 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10184 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10185 // CHECK12-NEXT: [[ADD8:%.*]] = add i32 [[TMP17]], 1
10186 // CHECK12-NEXT: [[CMP9:%.*]] = icmp ult i32 [[TMP16]], [[ADD8]]
10187 // CHECK12-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10188 // CHECK12: omp.inner.for.body:
10189 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10190 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10191 // CHECK12-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1
10192 // CHECK12-NEXT: [[ADD10:%.*]] = add i32 [[TMP18]], [[MUL]]
10193 // CHECK12-NEXT: store i32 [[ADD10]], i32* [[I6]], align 4
10194 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[A_ADDR]], align 4
10195 // CHECK12-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1
10196 // CHECK12-NEXT: store i32 [[ADD11]], i32* [[A_ADDR]], align 4
10197 // CHECK12-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV]], align 4
10198 // CHECK12-NEXT: [[CONV12:%.*]] = sext i16 [[TMP21]] to i32
10199 // CHECK12-NEXT: [[ADD13:%.*]] = add nsw i32 [[CONV12]], 1
10200 // CHECK12-NEXT: [[CONV14:%.*]] = trunc i32 [[ADD13]] to i16
10201 // CHECK12-NEXT: store i16 [[CONV14]], i16* [[CONV]], align 4
10202 // CHECK12-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV1]], align 4
10203 // CHECK12-NEXT: [[CONV15:%.*]] = sext i8 [[TMP22]] to i32
10204 // CHECK12-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV15]], 1
10205 // CHECK12-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i8
10206 // CHECK12-NEXT: store i8 [[CONV17]], i8* [[CONV1]], align 4
10207 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2
10208 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
10209 // CHECK12-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], 1
10210 // CHECK12-NEXT: store i32 [[ADD18]], i32* [[ARRAYIDX]], align 4
10211 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10212 // CHECK12: omp.body.continue:
10213 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10214 // CHECK12: omp.inner.for.inc:
10215 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10216 // CHECK12-NEXT: [[ADD19:%.*]] = add i32 [[TMP24]], 1
10217 // CHECK12-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4
10218 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
10219 // CHECK12: omp.inner.for.end:
10220 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10221 // CHECK12: omp.loop.exit:
10222 // CHECK12-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
10223 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
10224 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
10225 // CHECK12-NEXT: br label [[OMP_PRECOND_END]]
10226 // CHECK12: omp.precond.end:
10227 // CHECK12-NEXT: ret void
10228 //
10229 //
10230 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218
10231 // CHECK12-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] {
10232 // CHECK12-NEXT: entry:
10233 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
10234 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
10235 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
10236 // CHECK12-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
10237 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4
10238 // CHECK12-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4
10239 // CHECK12-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
10240 // CHECK12-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4
10241 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
10242 // CHECK12-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
10243 // CHECK12-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4
10244 // CHECK12-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
10245 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
10246 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
10247 // CHECK12-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4
10248 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[B_ADDR]], align 4
10249 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4
10250 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4
10251 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32, i32, i32, i16*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i32 [[TMP5]], i32 [[TMP1]], i32 [[TMP2]], i16* [[TMP3]])
10252 // CHECK12-NEXT: ret void
10253 //
10254 //
10255 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..5
10256 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] {
10257 // CHECK12-NEXT: entry:
10258 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
10259 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
10260 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
10261 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
10262 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
10263 // CHECK12-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
10264 // CHECK12-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4
10265 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10266 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
10267 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10268 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10269 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10270 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10271 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
10272 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
10273 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
10274 // CHECK12-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
10275 // CHECK12-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4
10276 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
10277 // CHECK12-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
10278 // CHECK12-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4
10279 // CHECK12-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
10280 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
10281 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
10282 // CHECK12-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4
10283 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10284 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
10285 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10286 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10287 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
10288 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
10289 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10290 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10291 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9
10292 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10293 // CHECK12: cond.true:
10294 // CHECK12-NEXT: br label [[COND_END:%.*]]
10295 // CHECK12: cond.false:
10296 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10297 // CHECK12-NEXT: br label [[COND_END]]
10298 // CHECK12: cond.end:
10299 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
10300 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10301 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10302 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
10303 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10304 // CHECK12: omp.inner.for.cond:
10305 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10306 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10307 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
10308 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10309 // CHECK12: omp.inner.for.body:
10310 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10311 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
10312 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10313 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
10314 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[B_ADDR]], align 4
10315 // CHECK12-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP12]] to double
10316 // CHECK12-NEXT: [[ADD4:%.*]] = fadd double [[CONV]], 1.500000e+00
10317 // CHECK12-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
10318 // CHECK12-NEXT: store double [[ADD4]], double* [[A]], align 4
10319 // CHECK12-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0
10320 // CHECK12-NEXT: [[TMP13:%.*]] = load double, double* [[A5]], align 4
10321 // CHECK12-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00
10322 // CHECK12-NEXT: store double [[INC]], double* [[A5]], align 4
10323 // CHECK12-NEXT: [[CONV6:%.*]] = fptosi double [[INC]] to i16
10324 // CHECK12-NEXT: [[TMP14:%.*]] = mul nsw i32 1, [[TMP2]]
10325 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i32 [[TMP14]]
10326 // CHECK12-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1
10327 // CHECK12-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX7]], align 2
10328 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10329 // CHECK12: omp.body.continue:
10330 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10331 // CHECK12: omp.inner.for.inc:
10332 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10333 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
10334 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
10335 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
10336 // CHECK12: omp.inner.for.end:
10337 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10338 // CHECK12: omp.loop.exit:
10339 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
10340 // CHECK12-NEXT: ret void
10341 //
10342 //
10343 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183
10344 // CHECK12-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
10345 // CHECK12-NEXT: entry:
10346 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
10347 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
10348 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
10349 // CHECK12-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
10350 // CHECK12-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
10351 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
10352 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
10353 // CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
10354 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
10355 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
10356 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
10357 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[A_CASTED]], align 4
10358 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4
10359 // CHECK12-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4
10360 // CHECK12-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
10361 // CHECK12-NEXT: store i16 [[TMP3]], i16* [[CONV1]], align 2
10362 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4
10363 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], [10 x i32]* [[TMP0]])
10364 // CHECK12-NEXT: ret void
10365 //
10366 //
10367 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..6
10368 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
10369 // CHECK12-NEXT: entry:
10370 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
10371 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
10372 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
10373 // CHECK12-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
10374 // CHECK12-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
10375 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10376 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
10377 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10378 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10379 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10380 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10381 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
10382 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
10383 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
10384 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
10385 // CHECK12-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
10386 // CHECK12-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
10387 // CHECK12-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
10388 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
10389 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10390 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
10391 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10392 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10393 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
10394 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
10395 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10396 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10397 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
10398 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10399 // CHECK12: cond.true:
10400 // CHECK12-NEXT: br label [[COND_END:%.*]]
10401 // CHECK12: cond.false:
10402 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10403 // CHECK12-NEXT: br label [[COND_END]]
10404 // CHECK12: cond.end:
10405 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
10406 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10407 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10408 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
10409 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10410 // CHECK12: omp.inner.for.cond:
10411 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10412 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10413 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
10414 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10415 // CHECK12: omp.inner.for.body:
10416 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10417 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
10418 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10419 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
10420 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4
10421 // CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1
10422 // CHECK12-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4
10423 // CHECK12-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV]], align 4
10424 // CHECK12-NEXT: [[CONV3:%.*]] = sext i16 [[TMP10]] to i32
10425 // CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1
10426 // CHECK12-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16
10427 // CHECK12-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 4
10428 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2
10429 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
10430 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], 1
10431 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4
10432 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10433 // CHECK12: omp.body.continue:
10434 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10435 // CHECK12: omp.inner.for.inc:
10436 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10437 // CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1
10438 // CHECK12-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
10439 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
10440 // CHECK12: omp.inner.for.end:
10441 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10442 // CHECK12: omp.loop.exit:
10443 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
10444 // CHECK12-NEXT: ret void
10445 //
10446 //
10447 // CHECK17-LABEL: define {{[^@]+}}@_Z3fooi
10448 // CHECK17-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
10449 // CHECK17-NEXT: entry:
10450 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
10451 // CHECK17-NEXT: [[A:%.*]] = alloca i32, align 4
10452 // CHECK17-NEXT: [[AA:%.*]] = alloca i16, align 2
10453 // CHECK17-NEXT: [[B:%.*]] = alloca [10 x float], align 4
10454 // CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
10455 // CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
10456 // CHECK17-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8
10457 // CHECK17-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8
10458 // CHECK17-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 8
10459 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10460 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10461 // CHECK17-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
10462 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10463 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED4:%.*]] = alloca i64, align 8
10464 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
10465 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
10466 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
10467 // CHECK17-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4
10468 // CHECK17-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
10469 // CHECK17-NEXT: [[AA_CASTED7:%.*]] = alloca i64, align 8
10470 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS9:%.*]] = alloca [1 x i8*], align 8
10471 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS10:%.*]] = alloca [1 x i8*], align 8
10472 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS11:%.*]] = alloca [1 x i8*], align 8
10473 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
10474 // CHECK17-NEXT: [[A_CASTED12:%.*]] = alloca i64, align 8
10475 // CHECK17-NEXT: [[AA_CASTED14:%.*]] = alloca i64, align 8
10476 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS16:%.*]] = alloca [2 x i8*], align 8
10477 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS17:%.*]] = alloca [2 x i8*], align 8
10478 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS18:%.*]] = alloca [2 x i8*], align 8
10479 // CHECK17-NEXT: [[_TMP19:%.*]] = alloca i32, align 4
10480 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4
10481 // CHECK17-NEXT: [[A_CASTED23:%.*]] = alloca i64, align 8
10482 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED25:%.*]] = alloca i64, align 8
10483 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS29:%.*]] = alloca [10 x i8*], align 8
10484 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS30:%.*]] = alloca [10 x i8*], align 8
10485 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS31:%.*]] = alloca [10 x i8*], align 8
10486 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [10 x i64], align 8
10487 // CHECK17-NEXT: [[_TMP32:%.*]] = alloca i32, align 4
10488 // CHECK17-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
10489 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
10490 // CHECK17-NEXT: store i32 0, i32* [[A]], align 4
10491 // CHECK17-NEXT: store i16 0, i16* [[AA]], align 2
10492 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
10493 // CHECK17-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
10494 // CHECK17-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave()
10495 // CHECK17-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8
10496 // CHECK17-NEXT: [[VLA:%.*]] = alloca float, i64 [[TMP2]], align 4
10497 // CHECK17-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8
10498 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
10499 // CHECK17-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64
10500 // CHECK17-NEXT: [[TMP6:%.*]] = mul nuw i64 5, [[TMP5]]
10501 // CHECK17-NEXT: [[VLA1:%.*]] = alloca double, i64 [[TMP6]], align 8
10502 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[__VLA_EXPR1]], align 8
10503 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4
10504 // CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_]], align 4
10505 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4
10506 // CHECK17-NEXT: store i32 [[TMP8]], i32* [[DOTCAPTURE_EXPR_2]], align 4
10507 // CHECK17-NEXT: [[TMP9:%.*]] = load i16, i16* [[AA]], align 2
10508 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
10509 // CHECK17-NEXT: store i16 [[TMP9]], i16* [[CONV]], align 2
10510 // CHECK17-NEXT: [[TMP10:%.*]] = load i64, i64* [[AA_CASTED]], align 8
10511 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10512 // CHECK17-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
10513 // CHECK17-NEXT: store i32 [[TMP11]], i32* [[CONV3]], align 4
10514 // CHECK17-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10515 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10516 // CHECK17-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED4]] to i32*
10517 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[CONV5]], align 4
10518 // CHECK17-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED4]], align 8
10519 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
10520 // CHECK17-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64*
10521 // CHECK17-NEXT: store i64 [[TMP10]], i64* [[TMP16]], align 8
10522 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
10523 // CHECK17-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64*
10524 // CHECK17-NEXT: store i64 [[TMP10]], i64* [[TMP18]], align 8
10525 // CHECK17-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
10526 // CHECK17-NEXT: store i8* null, i8** [[TMP19]], align 8
10527 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
10528 // CHECK17-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
10529 // CHECK17-NEXT: store i64 [[TMP12]], i64* [[TMP21]], align 8
10530 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
10531 // CHECK17-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
10532 // CHECK17-NEXT: store i64 [[TMP12]], i64* [[TMP23]], align 8
10533 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
10534 // CHECK17-NEXT: store i8* null, i8** [[TMP24]], align 8
10535 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
10536 // CHECK17-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64*
10537 // CHECK17-NEXT: store i64 [[TMP14]], i64* [[TMP26]], align 8
10538 // CHECK17-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
10539 // CHECK17-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i64*
10540 // CHECK17-NEXT: store i64 [[TMP14]], i64* [[TMP28]], align 8
10541 // CHECK17-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
10542 // CHECK17-NEXT: store i8* null, i8** [[TMP29]], align 8
10543 // CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
10544 // CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
10545 // CHECK17-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 0
10546 // CHECK17-NEXT: [[TMP33:%.*]] = load i16, i16* [[AA]], align 2
10547 // CHECK17-NEXT: store i16 [[TMP33]], i16* [[TMP32]], align 4
10548 // CHECK17-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 1
10549 // CHECK17-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10550 // CHECK17-NEXT: store i32 [[TMP35]], i32* [[TMP34]], align 4
10551 // CHECK17-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 2
10552 // CHECK17-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10553 // CHECK17-NEXT: store i32 [[TMP37]], i32* [[TMP36]], align 4
10554 // CHECK17-NEXT: [[TMP38:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 1, i64 120, i64 12, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1)
10555 // CHECK17-NEXT: [[TMP39:%.*]] = bitcast i8* [[TMP38]] to %struct.kmp_task_t_with_privates*
10556 // CHECK17-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP39]], i32 0, i32 0
10557 // CHECK17-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP40]], i32 0, i32 0
10558 // CHECK17-NEXT: [[TMP42:%.*]] = load i8*, i8** [[TMP41]], align 8
10559 // CHECK17-NEXT: [[TMP43:%.*]] = bitcast %struct.anon* [[AGG_CAPTURED]] to i8*
10560 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP42]], i8* align 4 [[TMP43]], i64 12, i1 false)
10561 // CHECK17-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP39]], i32 0, i32 1
10562 // CHECK17-NEXT: [[TMP45:%.*]] = bitcast i8* [[TMP42]] to %struct.anon*
10563 // CHECK17-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 0
10564 // CHECK17-NEXT: [[TMP47:%.*]] = bitcast [3 x i8*]* [[TMP46]] to i8*
10565 // CHECK17-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP30]] to i8*
10566 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP47]], i8* align 8 [[TMP48]], i64 24, i1 false)
10567 // CHECK17-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 1
10568 // CHECK17-NEXT: [[TMP50:%.*]] = bitcast [3 x i8*]* [[TMP49]] to i8*
10569 // CHECK17-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP31]] to i8*
10570 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP50]], i8* align 8 [[TMP51]], i64 24, i1 false)
10571 // CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 2
10572 // CHECK17-NEXT: [[TMP53:%.*]] = bitcast [3 x i64]* [[TMP52]] to i8*
10573 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP53]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false)
10574 // CHECK17-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 3
10575 // CHECK17-NEXT: [[TMP55:%.*]] = load i16, i16* [[AA]], align 2
10576 // CHECK17-NEXT: store i16 [[TMP55]], i16* [[TMP54]], align 8
10577 // CHECK17-NEXT: [[TMP56:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i8* [[TMP38]])
10578 // CHECK17-NEXT: [[TMP57:%.*]] = load i32, i32* [[A]], align 4
10579 // CHECK17-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32*
10580 // CHECK17-NEXT: store i32 [[TMP57]], i32* [[CONV6]], align 4
10581 // CHECK17-NEXT: [[TMP58:%.*]] = load i64, i64* [[A_CASTED]], align 8
10582 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107(i64 [[TMP58]]) #[[ATTR3:[0-9]+]]
10583 // CHECK17-NEXT: [[TMP59:%.*]] = load i16, i16* [[AA]], align 2
10584 // CHECK17-NEXT: [[CONV8:%.*]] = bitcast i64* [[AA_CASTED7]] to i16*
10585 // CHECK17-NEXT: store i16 [[TMP59]], i16* [[CONV8]], align 2
10586 // CHECK17-NEXT: [[TMP60:%.*]] = load i64, i64* [[AA_CASTED7]], align 8
10587 // CHECK17-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0
10588 // CHECK17-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i64*
10589 // CHECK17-NEXT: store i64 [[TMP60]], i64* [[TMP62]], align 8
10590 // CHECK17-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0
10591 // CHECK17-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to i64*
10592 // CHECK17-NEXT: store i64 [[TMP60]], i64* [[TMP64]], align 8
10593 // CHECK17-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 0
10594 // CHECK17-NEXT: store i8* null, i8** [[TMP65]], align 8
10595 // CHECK17-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0
10596 // CHECK17-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0
10597 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
10598 // CHECK17-NEXT: [[TMP68:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113.region_id, i32 1, i8** [[TMP66]], i8** [[TMP67]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10599 // CHECK17-NEXT: [[TMP69:%.*]] = icmp ne i32 [[TMP68]], 0
10600 // CHECK17-NEXT: br i1 [[TMP69]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
10601 // CHECK17: omp_offload.failed:
10602 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113(i64 [[TMP60]]) #[[ATTR3]]
10603 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]]
10604 // CHECK17: omp_offload.cont:
10605 // CHECK17-NEXT: [[TMP70:%.*]] = load i32, i32* [[A]], align 4
10606 // CHECK17-NEXT: [[CONV13:%.*]] = bitcast i64* [[A_CASTED12]] to i32*
10607 // CHECK17-NEXT: store i32 [[TMP70]], i32* [[CONV13]], align 4
10608 // CHECK17-NEXT: [[TMP71:%.*]] = load i64, i64* [[A_CASTED12]], align 8
10609 // CHECK17-NEXT: [[TMP72:%.*]] = load i16, i16* [[AA]], align 2
10610 // CHECK17-NEXT: [[CONV15:%.*]] = bitcast i64* [[AA_CASTED14]] to i16*
10611 // CHECK17-NEXT: store i16 [[TMP72]], i16* [[CONV15]], align 2
10612 // CHECK17-NEXT: [[TMP73:%.*]] = load i64, i64* [[AA_CASTED14]], align 8
10613 // CHECK17-NEXT: [[TMP74:%.*]] = load i32, i32* [[N_ADDR]], align 4
10614 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP74]], 10
10615 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
10616 // CHECK17: omp_if.then:
10617 // CHECK17-NEXT: [[TMP75:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0
10618 // CHECK17-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64*
10619 // CHECK17-NEXT: store i64 [[TMP71]], i64* [[TMP76]], align 8
10620 // CHECK17-NEXT: [[TMP77:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0
10621 // CHECK17-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64*
10622 // CHECK17-NEXT: store i64 [[TMP71]], i64* [[TMP78]], align 8
10623 // CHECK17-NEXT: [[TMP79:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 0
10624 // CHECK17-NEXT: store i8* null, i8** [[TMP79]], align 8
10625 // CHECK17-NEXT: [[TMP80:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 1
10626 // CHECK17-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64*
10627 // CHECK17-NEXT: store i64 [[TMP73]], i64* [[TMP81]], align 8
10628 // CHECK17-NEXT: [[TMP82:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 1
10629 // CHECK17-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64*
10630 // CHECK17-NEXT: store i64 [[TMP73]], i64* [[TMP83]], align 8
10631 // CHECK17-NEXT: [[TMP84:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 1
10632 // CHECK17-NEXT: store i8* null, i8** [[TMP84]], align 8
10633 // CHECK17-NEXT: [[TMP85:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0
10634 // CHECK17-NEXT: [[TMP86:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0
10635 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
10636 // CHECK17-NEXT: [[TMP87:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120.region_id, i32 2, i8** [[TMP85]], i8** [[TMP86]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10637 // CHECK17-NEXT: [[TMP88:%.*]] = icmp ne i32 [[TMP87]], 0
10638 // CHECK17-NEXT: br i1 [[TMP88]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
10639 // CHECK17: omp_offload.failed20:
10640 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i64 [[TMP71]], i64 [[TMP73]]) #[[ATTR3]]
10641 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT21]]
10642 // CHECK17: omp_offload.cont21:
10643 // CHECK17-NEXT: br label [[OMP_IF_END:%.*]]
10644 // CHECK17: omp_if.else:
10645 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i64 [[TMP71]], i64 [[TMP73]]) #[[ATTR3]]
10646 // CHECK17-NEXT: br label [[OMP_IF_END]]
10647 // CHECK17: omp_if.end:
10648 // CHECK17-NEXT: [[TMP89:%.*]] = load i32, i32* [[N_ADDR]], align 4
10649 // CHECK17-NEXT: store i32 [[TMP89]], i32* [[DOTCAPTURE_EXPR_22]], align 4
10650 // CHECK17-NEXT: [[TMP90:%.*]] = load i32, i32* [[A]], align 4
10651 // CHECK17-NEXT: [[CONV24:%.*]] = bitcast i64* [[A_CASTED23]] to i32*
10652 // CHECK17-NEXT: store i32 [[TMP90]], i32* [[CONV24]], align 4
10653 // CHECK17-NEXT: [[TMP91:%.*]] = load i64, i64* [[A_CASTED23]], align 8
10654 // CHECK17-NEXT: [[TMP92:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_22]], align 4
10655 // CHECK17-NEXT: [[CONV26:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED25]] to i32*
10656 // CHECK17-NEXT: store i32 [[TMP92]], i32* [[CONV26]], align 4
10657 // CHECK17-NEXT: [[TMP93:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED25]], align 8
10658 // CHECK17-NEXT: [[TMP94:%.*]] = load i32, i32* [[N_ADDR]], align 4
10659 // CHECK17-NEXT: [[CMP27:%.*]] = icmp sgt i32 [[TMP94]], 20
10660 // CHECK17-NEXT: br i1 [[CMP27]], label [[OMP_IF_THEN28:%.*]], label [[OMP_IF_ELSE35:%.*]]
10661 // CHECK17: omp_if.then28:
10662 // CHECK17-NEXT: [[TMP95:%.*]] = mul nuw i64 [[TMP2]], 4
10663 // CHECK17-NEXT: [[TMP96:%.*]] = mul nuw i64 5, [[TMP5]]
10664 // CHECK17-NEXT: [[TMP97:%.*]] = mul nuw i64 [[TMP96]], 8
10665 // CHECK17-NEXT: [[TMP98:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0
10666 // CHECK17-NEXT: [[TMP99:%.*]] = bitcast i8** [[TMP98]] to i64*
10667 // CHECK17-NEXT: store i64 [[TMP91]], i64* [[TMP99]], align 8
10668 // CHECK17-NEXT: [[TMP100:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 0
10669 // CHECK17-NEXT: [[TMP101:%.*]] = bitcast i8** [[TMP100]] to i64*
10670 // CHECK17-NEXT: store i64 [[TMP91]], i64* [[TMP101]], align 8
10671 // CHECK17-NEXT: [[TMP102:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
10672 // CHECK17-NEXT: store i64 4, i64* [[TMP102]], align 8
10673 // CHECK17-NEXT: [[TMP103:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 0
10674 // CHECK17-NEXT: store i8* null, i8** [[TMP103]], align 8
10675 // CHECK17-NEXT: [[TMP104:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 1
10676 // CHECK17-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to [10 x float]**
10677 // CHECK17-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP105]], align 8
10678 // CHECK17-NEXT: [[TMP106:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 1
10679 // CHECK17-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to [10 x float]**
10680 // CHECK17-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP107]], align 8
10681 // CHECK17-NEXT: [[TMP108:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
10682 // CHECK17-NEXT: store i64 40, i64* [[TMP108]], align 8
10683 // CHECK17-NEXT: [[TMP109:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 1
10684 // CHECK17-NEXT: store i8* null, i8** [[TMP109]], align 8
10685 // CHECK17-NEXT: [[TMP110:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 2
10686 // CHECK17-NEXT: [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64*
10687 // CHECK17-NEXT: store i64 [[TMP2]], i64* [[TMP111]], align 8
10688 // CHECK17-NEXT: [[TMP112:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 2
10689 // CHECK17-NEXT: [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64*
10690 // CHECK17-NEXT: store i64 [[TMP2]], i64* [[TMP113]], align 8
10691 // CHECK17-NEXT: [[TMP114:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
10692 // CHECK17-NEXT: store i64 8, i64* [[TMP114]], align 8
10693 // CHECK17-NEXT: [[TMP115:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 2
10694 // CHECK17-NEXT: store i8* null, i8** [[TMP115]], align 8
10695 // CHECK17-NEXT: [[TMP116:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 3
10696 // CHECK17-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to float**
10697 // CHECK17-NEXT: store float* [[VLA]], float** [[TMP117]], align 8
10698 // CHECK17-NEXT: [[TMP118:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 3
10699 // CHECK17-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to float**
10700 // CHECK17-NEXT: store float* [[VLA]], float** [[TMP119]], align 8
10701 // CHECK17-NEXT: [[TMP120:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
10702 // CHECK17-NEXT: store i64 [[TMP95]], i64* [[TMP120]], align 8
10703 // CHECK17-NEXT: [[TMP121:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 3
10704 // CHECK17-NEXT: store i8* null, i8** [[TMP121]], align 8
10705 // CHECK17-NEXT: [[TMP122:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 4
10706 // CHECK17-NEXT: [[TMP123:%.*]] = bitcast i8** [[TMP122]] to [5 x [10 x double]]**
10707 // CHECK17-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP123]], align 8
10708 // CHECK17-NEXT: [[TMP124:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 4
10709 // CHECK17-NEXT: [[TMP125:%.*]] = bitcast i8** [[TMP124]] to [5 x [10 x double]]**
10710 // CHECK17-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP125]], align 8
10711 // CHECK17-NEXT: [[TMP126:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
10712 // CHECK17-NEXT: store i64 400, i64* [[TMP126]], align 8
10713 // CHECK17-NEXT: [[TMP127:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 4
10714 // CHECK17-NEXT: store i8* null, i8** [[TMP127]], align 8
10715 // CHECK17-NEXT: [[TMP128:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 5
10716 // CHECK17-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to i64*
10717 // CHECK17-NEXT: store i64 5, i64* [[TMP129]], align 8
10718 // CHECK17-NEXT: [[TMP130:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 5
10719 // CHECK17-NEXT: [[TMP131:%.*]] = bitcast i8** [[TMP130]] to i64*
10720 // CHECK17-NEXT: store i64 5, i64* [[TMP131]], align 8
10721 // CHECK17-NEXT: [[TMP132:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 5
10722 // CHECK17-NEXT: store i64 8, i64* [[TMP132]], align 8
10723 // CHECK17-NEXT: [[TMP133:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 5
10724 // CHECK17-NEXT: store i8* null, i8** [[TMP133]], align 8
10725 // CHECK17-NEXT: [[TMP134:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 6
10726 // CHECK17-NEXT: [[TMP135:%.*]] = bitcast i8** [[TMP134]] to i64*
10727 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP135]], align 8
10728 // CHECK17-NEXT: [[TMP136:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 6
10729 // CHECK17-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64*
10730 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP137]], align 8
10731 // CHECK17-NEXT: [[TMP138:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 6
10732 // CHECK17-NEXT: store i64 8, i64* [[TMP138]], align 8
10733 // CHECK17-NEXT: [[TMP139:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 6
10734 // CHECK17-NEXT: store i8* null, i8** [[TMP139]], align 8
10735 // CHECK17-NEXT: [[TMP140:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 7
10736 // CHECK17-NEXT: [[TMP141:%.*]] = bitcast i8** [[TMP140]] to double**
10737 // CHECK17-NEXT: store double* [[VLA1]], double** [[TMP141]], align 8
10738 // CHECK17-NEXT: [[TMP142:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 7
10739 // CHECK17-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to double**
10740 // CHECK17-NEXT: store double* [[VLA1]], double** [[TMP143]], align 8
10741 // CHECK17-NEXT: [[TMP144:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7
10742 // CHECK17-NEXT: store i64 [[TMP97]], i64* [[TMP144]], align 8
10743 // CHECK17-NEXT: [[TMP145:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 7
10744 // CHECK17-NEXT: store i8* null, i8** [[TMP145]], align 8
10745 // CHECK17-NEXT: [[TMP146:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 8
10746 // CHECK17-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to %struct.TT**
10747 // CHECK17-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP147]], align 8
10748 // CHECK17-NEXT: [[TMP148:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 8
10749 // CHECK17-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to %struct.TT**
10750 // CHECK17-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP149]], align 8
10751 // CHECK17-NEXT: [[TMP150:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 8
10752 // CHECK17-NEXT: store i64 16, i64* [[TMP150]], align 8
10753 // CHECK17-NEXT: [[TMP151:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 8
10754 // CHECK17-NEXT: store i8* null, i8** [[TMP151]], align 8
10755 // CHECK17-NEXT: [[TMP152:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 9
10756 // CHECK17-NEXT: [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i64*
10757 // CHECK17-NEXT: store i64 [[TMP93]], i64* [[TMP153]], align 8
10758 // CHECK17-NEXT: [[TMP154:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 9
10759 // CHECK17-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i64*
10760 // CHECK17-NEXT: store i64 [[TMP93]], i64* [[TMP155]], align 8
10761 // CHECK17-NEXT: [[TMP156:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 9
10762 // CHECK17-NEXT: store i64 4, i64* [[TMP156]], align 8
10763 // CHECK17-NEXT: [[TMP157:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 9
10764 // CHECK17-NEXT: store i8* null, i8** [[TMP157]], align 8
10765 // CHECK17-NEXT: [[TMP158:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0
10766 // CHECK17-NEXT: [[TMP159:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 0
10767 // CHECK17-NEXT: [[TMP160:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
10768 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
10769 // CHECK17-NEXT: [[TMP161:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145.region_id, i32 10, i8** [[TMP158]], i8** [[TMP159]], i64* [[TMP160]], i64* getelementptr inbounds ([10 x i64], [10 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10770 // CHECK17-NEXT: [[TMP162:%.*]] = icmp ne i32 [[TMP161]], 0
10771 // CHECK17-NEXT: br i1 [[TMP162]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]]
10772 // CHECK17: omp_offload.failed33:
10773 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i64 [[TMP91]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]], i64 [[TMP93]]) #[[ATTR3]]
10774 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT34]]
10775 // CHECK17: omp_offload.cont34:
10776 // CHECK17-NEXT: br label [[OMP_IF_END36:%.*]]
10777 // CHECK17: omp_if.else35:
10778 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i64 [[TMP91]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]], i64 [[TMP93]]) #[[ATTR3]]
10779 // CHECK17-NEXT: br label [[OMP_IF_END36]]
10780 // CHECK17: omp_if.end36:
10781 // CHECK17-NEXT: [[TMP163:%.*]] = load i32, i32* [[A]], align 4
10782 // CHECK17-NEXT: [[TMP164:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
10783 // CHECK17-NEXT: call void @llvm.stackrestore(i8* [[TMP164]])
10784 // CHECK17-NEXT: ret i32 [[TMP163]]
10785 //
10786 //
10787 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103
10788 // CHECK17-SAME: (i64 [[AA:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]], i64 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR2:[0-9]+]] {
10789 // CHECK17-NEXT: entry:
10790 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
10791 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10792 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8
10793 // CHECK17-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
10794 // CHECK17-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
10795 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
10796 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10797 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8
10798 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
10799 // CHECK17-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
10800 // CHECK17-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32*
10801 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV3]], align 8
10802 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV4]], align 8
10803 // CHECK17-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]])
10804 // CHECK17-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 8
10805 // CHECK17-NEXT: [[CONV5:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
10806 // CHECK17-NEXT: store i16 [[TMP3]], i16* [[CONV5]], align 2
10807 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8
10808 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP4]])
10809 // CHECK17-NEXT: ret void
10810 //
10811 //
10812 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined.
10813 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[AA:%.*]]) #[[ATTR2]] {
10814 // CHECK17-NEXT: entry:
10815 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10816 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10817 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
10818 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10819 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
10820 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10821 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10822 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10823 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10824 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
10825 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10826 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10827 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
10828 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
10829 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10830 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
10831 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10832 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10833 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10834 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
10835 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10836 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10837 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
10838 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10839 // CHECK17: cond.true:
10840 // CHECK17-NEXT: br label [[COND_END:%.*]]
10841 // CHECK17: cond.false:
10842 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10843 // CHECK17-NEXT: br label [[COND_END]]
10844 // CHECK17: cond.end:
10845 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10846 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10847 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10848 // CHECK17-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
10849 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10850 // CHECK17: omp.inner.for.cond:
10851 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10852 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10853 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
10854 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10855 // CHECK17: omp.inner.for.body:
10856 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10857 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
10858 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10859 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4
10860 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10861 // CHECK17: omp.body.continue:
10862 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10863 // CHECK17: omp.inner.for.inc:
10864 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10865 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
10866 // CHECK17-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
10867 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
10868 // CHECK17: omp.inner.for.end:
10869 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10870 // CHECK17: omp.loop.exit:
10871 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
10872 // CHECK17-NEXT: ret void
10873 //
10874 //
10875 // CHECK17-LABEL: define {{[^@]+}}@.omp_task_privates_map.
10876 // CHECK17-SAME: (%struct..kmp_privates.t* noalias [[TMP0:%.*]], i16** noalias [[TMP1:%.*]], [3 x i8*]** noalias [[TMP2:%.*]], [3 x i8*]** noalias [[TMP3:%.*]], [3 x i64]** noalias [[TMP4:%.*]]) #[[ATTR4:[0-9]+]] {
10877 // CHECK17-NEXT: entry:
10878 // CHECK17-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 8
10879 // CHECK17-NEXT: [[DOTADDR1:%.*]] = alloca i16**, align 8
10880 // CHECK17-NEXT: [[DOTADDR2:%.*]] = alloca [3 x i8*]**, align 8
10881 // CHECK17-NEXT: [[DOTADDR3:%.*]] = alloca [3 x i8*]**, align 8
10882 // CHECK17-NEXT: [[DOTADDR4:%.*]] = alloca [3 x i64]**, align 8
10883 // CHECK17-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 8
10884 // CHECK17-NEXT: store i16** [[TMP1]], i16*** [[DOTADDR1]], align 8
10885 // CHECK17-NEXT: store [3 x i8*]** [[TMP2]], [3 x i8*]*** [[DOTADDR2]], align 8
10886 // CHECK17-NEXT: store [3 x i8*]** [[TMP3]], [3 x i8*]*** [[DOTADDR3]], align 8
10887 // CHECK17-NEXT: store [3 x i64]** [[TMP4]], [3 x i64]*** [[DOTADDR4]], align 8
10888 // CHECK17-NEXT: [[TMP5:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 8
10889 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 0
10890 // CHECK17-NEXT: [[TMP7:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR2]], align 8
10891 // CHECK17-NEXT: store [3 x i8*]* [[TMP6]], [3 x i8*]** [[TMP7]], align 8
10892 // CHECK17-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 1
10893 // CHECK17-NEXT: [[TMP9:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR3]], align 8
10894 // CHECK17-NEXT: store [3 x i8*]* [[TMP8]], [3 x i8*]** [[TMP9]], align 8
10895 // CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 2
10896 // CHECK17-NEXT: [[TMP11:%.*]] = load [3 x i64]**, [3 x i64]*** [[DOTADDR4]], align 8
10897 // CHECK17-NEXT: store [3 x i64]* [[TMP10]], [3 x i64]** [[TMP11]], align 8
10898 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 3
10899 // CHECK17-NEXT: [[TMP13:%.*]] = load i16**, i16*** [[DOTADDR1]], align 8
10900 // CHECK17-NEXT: store i16* [[TMP12]], i16** [[TMP13]], align 8
10901 // CHECK17-NEXT: ret void
10902 //
10903 //
10904 // CHECK17-LABEL: define {{[^@]+}}@.omp_task_entry.
10905 // CHECK17-SAME: (i32 signext [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
10906 // CHECK17-NEXT: entry:
10907 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4
10908 // CHECK17-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8
10909 // CHECK17-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8
10910 // CHECK17-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8
10911 // CHECK17-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8
10912 // CHECK17-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon*, align 8
10913 // CHECK17-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca i16*, align 8
10914 // CHECK17-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca [3 x i8*]*, align 8
10915 // CHECK17-NEXT: [[DOTFIRSTPRIV_PTR_ADDR2_I:%.*]] = alloca [3 x i8*]*, align 8
10916 // CHECK17-NEXT: [[DOTFIRSTPRIV_PTR_ADDR3_I:%.*]] = alloca [3 x i64]*, align 8
10917 // CHECK17-NEXT: [[AA_CASTED_I:%.*]] = alloca i64, align 8
10918 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED_I:%.*]] = alloca i64, align 8
10919 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED5_I:%.*]] = alloca i64, align 8
10920 // CHECK17-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4
10921 // CHECK17-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 8
10922 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4
10923 // CHECK17-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8
10924 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4
10925 // CHECK17-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8
10926 // CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0
10927 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2
10928 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0
10929 // CHECK17-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
10930 // CHECK17-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon*
10931 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 1
10932 // CHECK17-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8*
10933 // CHECK17-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8*
10934 // CHECK17-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
10935 // CHECK17-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
10936 // CHECK17-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]])
10937 // CHECK17-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]])
10938 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !21
10939 // CHECK17-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !21
10940 // CHECK17-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !21
10941 // CHECK17-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !21
10942 // CHECK17-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !21
10943 // CHECK17-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !21
10944 // CHECK17-NEXT: [[TMP12:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !21
10945 // CHECK17-NEXT: [[TMP13:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !21
10946 // CHECK17-NEXT: [[TMP14:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !21
10947 // CHECK17-NEXT: [[TMP15:%.*]] = bitcast void (i8*, ...)* [[TMP13]] to void (i8*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)*
10948 // CHECK17-NEXT: call void [[TMP15]](i8* [[TMP14]], i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]]) #[[ATTR3]]
10949 // CHECK17-NEXT: [[TMP16:%.*]] = load i16*, i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !21
10950 // CHECK17-NEXT: [[TMP17:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias !21
10951 // CHECK17-NEXT: [[TMP18:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 8, !noalias !21
10952 // CHECK17-NEXT: [[TMP19:%.*]] = load [3 x i64]*, [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 8, !noalias !21
10953 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP17]], i64 0, i64 0
10954 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP18]], i64 0, i64 0
10955 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[TMP19]], i64 0, i64 0
10956 // CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP12]], i32 0, i32 1
10957 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2
10958 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP23]], align 4
10959 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP24]], align 4
10960 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) #[[ATTR3]]
10961 // CHECK17-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP25]], i32 [[TMP26]], i32 0, i8* null, i32 0, i8* null) #[[ATTR3]]
10962 // CHECK17-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
10963 // CHECK17-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]]
10964 // CHECK17: omp_offload.failed.i:
10965 // CHECK17-NEXT: [[TMP29:%.*]] = load i16, i16* [[TMP16]], align 2
10966 // CHECK17-NEXT: [[CONV_I:%.*]] = bitcast i64* [[AA_CASTED_I]] to i16*
10967 // CHECK17-NEXT: store i16 [[TMP29]], i16* [[CONV_I]], align 2, !noalias !21
10968 // CHECK17-NEXT: [[TMP30:%.*]] = load i64, i64* [[AA_CASTED_I]], align 8, !noalias !21
10969 // CHECK17-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP23]], align 4
10970 // CHECK17-NEXT: [[CONV4_I:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED_I]] to i32*
10971 // CHECK17-NEXT: store i32 [[TMP31]], i32* [[CONV4_I]], align 4, !noalias !21
10972 // CHECK17-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED_I]], align 8, !noalias !21
10973 // CHECK17-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP24]], align 4
10974 // CHECK17-NEXT: [[CONV6_I:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED5_I]] to i32*
10975 // CHECK17-NEXT: store i32 [[TMP33]], i32* [[CONV6_I]], align 4, !noalias !21
10976 // CHECK17-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED5_I]], align 8, !noalias !21
10977 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103(i64 [[TMP30]], i64 [[TMP32]], i64 [[TMP34]]) #[[ATTR3]]
10978 // CHECK17-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]]
10979 // CHECK17: .omp_outlined..1.exit:
10980 // CHECK17-NEXT: ret i32 0
10981 //
10982 //
10983 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107
10984 // CHECK17-SAME: (i64 [[A:%.*]]) #[[ATTR2]] {
10985 // CHECK17-NEXT: entry:
10986 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
10987 // CHECK17-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
10988 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
10989 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
10990 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
10991 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32*
10992 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[CONV1]], align 4
10993 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
10994 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP1]])
10995 // CHECK17-NEXT: ret void
10996 //
10997 //
10998 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..2
10999 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]]) #[[ATTR2]] {
11000 // CHECK17-NEXT: entry:
11001 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11002 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11003 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
11004 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11005 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11006 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11007 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11008 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11009 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11010 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11011 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11012 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11013 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
11014 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
11015 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11016 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
11017 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11018 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11019 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11020 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
11021 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11022 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11023 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
11024 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11025 // CHECK17: cond.true:
11026 // CHECK17-NEXT: br label [[COND_END:%.*]]
11027 // CHECK17: cond.false:
11028 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11029 // CHECK17-NEXT: br label [[COND_END]]
11030 // CHECK17: cond.end:
11031 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
11032 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11033 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11034 // CHECK17-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
11035 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11036 // CHECK17: omp.inner.for.cond:
11037 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11038 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11039 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
11040 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11041 // CHECK17: omp.inner.for.body:
11042 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11043 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
11044 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11045 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4
11046 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 8
11047 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
11048 // CHECK17-NEXT: store i32 [[ADD2]], i32* [[CONV]], align 8
11049 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11050 // CHECK17: omp.body.continue:
11051 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11052 // CHECK17: omp.inner.for.inc:
11053 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11054 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
11055 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
11056 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
11057 // CHECK17: omp.inner.for.end:
11058 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11059 // CHECK17: omp.loop.exit:
11060 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
11061 // CHECK17-NEXT: ret void
11062 //
11063 //
11064 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113
11065 // CHECK17-SAME: (i64 [[AA:%.*]]) #[[ATTR2]] {
11066 // CHECK17-NEXT: entry:
11067 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
11068 // CHECK17-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
11069 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
11070 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
11071 // CHECK17-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 8
11072 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
11073 // CHECK17-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2
11074 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[AA_CASTED]], align 8
11075 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP1]])
11076 // CHECK17-NEXT: ret void
11077 //
11078 //
11079 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..3
11080 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[AA:%.*]]) #[[ATTR2]] {
11081 // CHECK17-NEXT: entry:
11082 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11083 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11084 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
11085 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11086 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11087 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11088 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11089 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11090 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11091 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11092 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11093 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11094 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
11095 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
11096 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11097 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
11098 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11099 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11100 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11101 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
11102 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11103 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11104 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
11105 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11106 // CHECK17: cond.true:
11107 // CHECK17-NEXT: br label [[COND_END:%.*]]
11108 // CHECK17: cond.false:
11109 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11110 // CHECK17-NEXT: br label [[COND_END]]
11111 // CHECK17: cond.end:
11112 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
11113 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11114 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11115 // CHECK17-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
11116 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11117 // CHECK17: omp.inner.for.cond:
11118 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11119 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11120 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
11121 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11122 // CHECK17: omp.inner.for.body:
11123 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11124 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
11125 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11126 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4
11127 // CHECK17-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 8
11128 // CHECK17-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32
11129 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1
11130 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16
11131 // CHECK17-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 8
11132 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11133 // CHECK17: omp.body.continue:
11134 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11135 // CHECK17: omp.inner.for.inc:
11136 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11137 // CHECK17-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1
11138 // CHECK17-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
11139 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
11140 // CHECK17: omp.inner.for.end:
11141 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11142 // CHECK17: omp.loop.exit:
11143 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
11144 // CHECK17-NEXT: ret void
11145 //
11146 //
11147 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120
11148 // CHECK17-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR2]] {
11149 // CHECK17-NEXT: entry:
11150 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
11151 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
11152 // CHECK17-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
11153 // CHECK17-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
11154 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
11155 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
11156 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
11157 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
11158 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
11159 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
11160 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[CONV2]], align 4
11161 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
11162 // CHECK17-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 8
11163 // CHECK17-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
11164 // CHECK17-NEXT: store i16 [[TMP2]], i16* [[CONV3]], align 2
11165 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8
11166 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]])
11167 // CHECK17-NEXT: ret void
11168 //
11169 //
11170 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..6
11171 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR2]] {
11172 // CHECK17-NEXT: entry:
11173 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11174 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11175 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
11176 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
11177 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11178 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11179 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11180 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11181 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11182 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11183 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11184 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11185 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11186 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
11187 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
11188 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
11189 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
11190 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11191 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
11192 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11193 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11194 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11195 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
11196 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11197 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11198 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
11199 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11200 // CHECK17: cond.true:
11201 // CHECK17-NEXT: br label [[COND_END:%.*]]
11202 // CHECK17: cond.false:
11203 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11204 // CHECK17-NEXT: br label [[COND_END]]
11205 // CHECK17: cond.end:
11206 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
11207 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11208 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11209 // CHECK17-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
11210 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11211 // CHECK17: omp.inner.for.cond:
11212 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11213 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11214 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
11215 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11216 // CHECK17: omp.inner.for.body:
11217 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11218 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
11219 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11220 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4
11221 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 8
11222 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1
11223 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 8
11224 // CHECK17-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV1]], align 8
11225 // CHECK17-NEXT: [[CONV4:%.*]] = sext i16 [[TMP9]] to i32
11226 // CHECK17-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1
11227 // CHECK17-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
11228 // CHECK17-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 8
11229 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11230 // CHECK17: omp.body.continue:
11231 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11232 // CHECK17: omp.inner.for.inc:
11233 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11234 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP10]], 1
11235 // CHECK17-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
11236 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
11237 // CHECK17: omp.inner.for.end:
11238 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11239 // CHECK17: omp.loop.exit:
11240 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
11241 // CHECK17-NEXT: ret void
11242 //
11243 //
11244 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145
11245 // CHECK17-SAME: (i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11246 // CHECK17-NEXT: entry:
11247 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
11248 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8
11249 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
11250 // CHECK17-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8
11251 // CHECK17-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8
11252 // CHECK17-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
11253 // CHECK17-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8
11254 // CHECK17-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8
11255 // CHECK17-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8
11256 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11257 // CHECK17-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
11258 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11259 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
11260 // CHECK17-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8
11261 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11262 // CHECK17-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8
11263 // CHECK17-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8
11264 // CHECK17-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
11265 // CHECK17-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8
11266 // CHECK17-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8
11267 // CHECK17-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8
11268 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11269 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
11270 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8
11271 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11272 // CHECK17-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8
11273 // CHECK17-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8
11274 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
11275 // CHECK17-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8
11276 // CHECK17-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8
11277 // CHECK17-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8
11278 // CHECK17-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11279 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 8
11280 // CHECK17-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32*
11281 // CHECK17-NEXT: store i32 [[TMP8]], i32* [[CONV6]], align 4
11282 // CHECK17-NEXT: [[TMP9:%.*]] = load i64, i64* [[A_CASTED]], align 8
11283 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV5]], align 8
11284 // CHECK17-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11285 // CHECK17-NEXT: store i32 [[TMP10]], i32* [[CONV7]], align 4
11286 // CHECK17-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11287 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [10 x float]*, i64, float*, [5 x [10 x double]]*, i64, i64, double*, %struct.TT*, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], [10 x float]* [[TMP0]], i64 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i64 [[TMP4]], i64 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i64 [[TMP11]])
11288 // CHECK17-NEXT: ret void
11289 //
11290 //
11291 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..9
11292 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11293 // CHECK17-NEXT: entry:
11294 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11295 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11296 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
11297 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8
11298 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
11299 // CHECK17-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8
11300 // CHECK17-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8
11301 // CHECK17-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
11302 // CHECK17-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8
11303 // CHECK17-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8
11304 // CHECK17-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8
11305 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11306 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11307 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11308 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11309 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11310 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11311 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11312 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11313 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11314 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11315 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
11316 // CHECK17-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8
11317 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11318 // CHECK17-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8
11319 // CHECK17-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8
11320 // CHECK17-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
11321 // CHECK17-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8
11322 // CHECK17-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8
11323 // CHECK17-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8
11324 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11325 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
11326 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8
11327 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11328 // CHECK17-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8
11329 // CHECK17-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8
11330 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
11331 // CHECK17-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8
11332 // CHECK17-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8
11333 // CHECK17-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8
11334 // CHECK17-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11335 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11336 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
11337 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11338 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11339 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV5]], align 8
11340 // CHECK17-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11341 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
11342 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]])
11343 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
11344 // CHECK17: omp.dispatch.cond:
11345 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11346 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9
11347 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11348 // CHECK17: cond.true:
11349 // CHECK17-NEXT: br label [[COND_END:%.*]]
11350 // CHECK17: cond.false:
11351 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11352 // CHECK17-NEXT: br label [[COND_END]]
11353 // CHECK17: cond.end:
11354 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
11355 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11356 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11357 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
11358 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11359 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11360 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
11361 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11362 // CHECK17: omp.dispatch.body:
11363 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11364 // CHECK17: omp.inner.for.cond:
11365 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
11366 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
11367 // CHECK17-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
11368 // CHECK17-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11369 // CHECK17: omp.inner.for.body:
11370 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
11371 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
11372 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11373 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
11374 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !22
11375 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
11376 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[CONV]], align 8, !llvm.access.group !22
11377 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i64 0, i64 2
11378 // CHECK17-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !22
11379 // CHECK17-NEXT: [[CONV9:%.*]] = fpext float [[TMP20]] to double
11380 // CHECK17-NEXT: [[ADD10:%.*]] = fadd double [[CONV9]], 1.000000e+00
11381 // CHECK17-NEXT: [[CONV11:%.*]] = fptrunc double [[ADD10]] to float
11382 // CHECK17-NEXT: store float [[CONV11]], float* [[ARRAYIDX]], align 4, !llvm.access.group !22
11383 // CHECK17-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 3
11384 // CHECK17-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX12]], align 4, !llvm.access.group !22
11385 // CHECK17-NEXT: [[CONV13:%.*]] = fpext float [[TMP21]] to double
11386 // CHECK17-NEXT: [[ADD14:%.*]] = fadd double [[CONV13]], 1.000000e+00
11387 // CHECK17-NEXT: [[CONV15:%.*]] = fptrunc double [[ADD14]] to float
11388 // CHECK17-NEXT: store float [[CONV15]], float* [[ARRAYIDX12]], align 4, !llvm.access.group !22
11389 // CHECK17-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i64 0, i64 1
11390 // CHECK17-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX16]], i64 0, i64 2
11391 // CHECK17-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX17]], align 8, !llvm.access.group !22
11392 // CHECK17-NEXT: [[ADD18:%.*]] = fadd double [[TMP22]], 1.000000e+00
11393 // CHECK17-NEXT: store double [[ADD18]], double* [[ARRAYIDX17]], align 8, !llvm.access.group !22
11394 // CHECK17-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP5]]
11395 // CHECK17-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds double, double* [[TMP6]], i64 [[TMP23]]
11396 // CHECK17-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX19]], i64 3
11397 // CHECK17-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX20]], align 8, !llvm.access.group !22
11398 // CHECK17-NEXT: [[ADD21:%.*]] = fadd double [[TMP24]], 1.000000e+00
11399 // CHECK17-NEXT: store double [[ADD21]], double* [[ARRAYIDX20]], align 8, !llvm.access.group !22
11400 // CHECK17-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0
11401 // CHECK17-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8, !llvm.access.group !22
11402 // CHECK17-NEXT: [[ADD22:%.*]] = add nsw i64 [[TMP25]], 1
11403 // CHECK17-NEXT: store i64 [[ADD22]], i64* [[X]], align 8, !llvm.access.group !22
11404 // CHECK17-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1
11405 // CHECK17-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8, !llvm.access.group !22
11406 // CHECK17-NEXT: [[CONV23:%.*]] = sext i8 [[TMP26]] to i32
11407 // CHECK17-NEXT: [[ADD24:%.*]] = add nsw i32 [[CONV23]], 1
11408 // CHECK17-NEXT: [[CONV25:%.*]] = trunc i32 [[ADD24]] to i8
11409 // CHECK17-NEXT: store i8 [[CONV25]], i8* [[Y]], align 8, !llvm.access.group !22
11410 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11411 // CHECK17: omp.body.continue:
11412 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11413 // CHECK17: omp.inner.for.inc:
11414 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
11415 // CHECK17-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP27]], 1
11416 // CHECK17-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
11417 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
11418 // CHECK17: omp.inner.for.end:
11419 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
11420 // CHECK17: omp.dispatch.inc:
11421 // CHECK17-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11422 // CHECK17-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11423 // CHECK17-NEXT: [[ADD27:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
11424 // CHECK17-NEXT: store i32 [[ADD27]], i32* [[DOTOMP_LB]], align 4
11425 // CHECK17-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11426 // CHECK17-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11427 // CHECK17-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
11428 // CHECK17-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_UB]], align 4
11429 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
11430 // CHECK17: omp.dispatch.end:
11431 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]])
11432 // CHECK17-NEXT: ret void
11433 //
11434 //
11435 // CHECK17-LABEL: define {{[^@]+}}@_Z3bari
11436 // CHECK17-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] {
11437 // CHECK17-NEXT: entry:
11438 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
11439 // CHECK17-NEXT: [[A:%.*]] = alloca i32, align 4
11440 // CHECK17-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8
11441 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
11442 // CHECK17-NEXT: store i32 0, i32* [[A]], align 4
11443 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
11444 // CHECK17-NEXT: [[CALL:%.*]] = call signext i32 @_Z3fooi(i32 signext [[TMP0]])
11445 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
11446 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
11447 // CHECK17-NEXT: store i32 [[ADD]], i32* [[A]], align 4
11448 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
11449 // CHECK17-NEXT: [[CALL1:%.*]] = call signext i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 8 dereferenceable(8) [[S]], i32 signext [[TMP2]])
11450 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4
11451 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
11452 // CHECK17-NEXT: store i32 [[ADD2]], i32* [[A]], align 4
11453 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
11454 // CHECK17-NEXT: [[CALL3:%.*]] = call signext i32 @_ZL7fstatici(i32 signext [[TMP4]])
11455 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4
11456 // CHECK17-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
11457 // CHECK17-NEXT: store i32 [[ADD4]], i32* [[A]], align 4
11458 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
11459 // CHECK17-NEXT: [[CALL5:%.*]] = call signext i32 @_Z9ftemplateIiET_i(i32 signext [[TMP6]])
11460 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4
11461 // CHECK17-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]]
11462 // CHECK17-NEXT: store i32 [[ADD6]], i32* [[A]], align 4
11463 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4
11464 // CHECK17-NEXT: ret i32 [[TMP8]]
11465 //
11466 //
11467 // CHECK17-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
11468 // CHECK17-SAME: (%struct.S1* nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 signext [[N:%.*]]) #[[ATTR0]] comdat align 2 {
11469 // CHECK17-NEXT: entry:
11470 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
11471 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
11472 // CHECK17-NEXT: [[B:%.*]] = alloca i32, align 4
11473 // CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
11474 // CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
11475 // CHECK17-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8
11476 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
11477 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
11478 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
11479 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8
11480 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11481 // CHECK17-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
11482 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
11483 // CHECK17-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
11484 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
11485 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
11486 // CHECK17-NEXT: store i32 [[ADD]], i32* [[B]], align 4
11487 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
11488 // CHECK17-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
11489 // CHECK17-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave()
11490 // CHECK17-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8
11491 // CHECK17-NEXT: [[TMP4:%.*]] = mul nuw i64 2, [[TMP2]]
11492 // CHECK17-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP4]], align 2
11493 // CHECK17-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8
11494 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[B]], align 4
11495 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[B_CASTED]] to i32*
11496 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[CONV]], align 4
11497 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8
11498 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[N_ADDR]], align 4
11499 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 60
11500 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
11501 // CHECK17: omp_if.then:
11502 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
11503 // CHECK17-NEXT: [[TMP8:%.*]] = mul nuw i64 2, [[TMP2]]
11504 // CHECK17-NEXT: [[TMP9:%.*]] = mul nuw i64 [[TMP8]], 2
11505 // CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11506 // CHECK17-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to %struct.S1**
11507 // CHECK17-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP11]], align 8
11508 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11509 // CHECK17-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to double**
11510 // CHECK17-NEXT: store double* [[A]], double** [[TMP13]], align 8
11511 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
11512 // CHECK17-NEXT: store i64 8, i64* [[TMP14]], align 8
11513 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
11514 // CHECK17-NEXT: store i8* null, i8** [[TMP15]], align 8
11515 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
11516 // CHECK17-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
11517 // CHECK17-NEXT: store i64 [[TMP6]], i64* [[TMP17]], align 8
11518 // CHECK17-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
11519 // CHECK17-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
11520 // CHECK17-NEXT: store i64 [[TMP6]], i64* [[TMP19]], align 8
11521 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
11522 // CHECK17-NEXT: store i64 4, i64* [[TMP20]], align 8
11523 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
11524 // CHECK17-NEXT: store i8* null, i8** [[TMP21]], align 8
11525 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
11526 // CHECK17-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
11527 // CHECK17-NEXT: store i64 2, i64* [[TMP23]], align 8
11528 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
11529 // CHECK17-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
11530 // CHECK17-NEXT: store i64 2, i64* [[TMP25]], align 8
11531 // CHECK17-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
11532 // CHECK17-NEXT: store i64 8, i64* [[TMP26]], align 8
11533 // CHECK17-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
11534 // CHECK17-NEXT: store i8* null, i8** [[TMP27]], align 8
11535 // CHECK17-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
11536 // CHECK17-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64*
11537 // CHECK17-NEXT: store i64 [[TMP2]], i64* [[TMP29]], align 8
11538 // CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
11539 // CHECK17-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64*
11540 // CHECK17-NEXT: store i64 [[TMP2]], i64* [[TMP31]], align 8
11541 // CHECK17-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
11542 // CHECK17-NEXT: store i64 8, i64* [[TMP32]], align 8
11543 // CHECK17-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
11544 // CHECK17-NEXT: store i8* null, i8** [[TMP33]], align 8
11545 // CHECK17-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
11546 // CHECK17-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i16**
11547 // CHECK17-NEXT: store i16* [[VLA]], i16** [[TMP35]], align 8
11548 // CHECK17-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
11549 // CHECK17-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i16**
11550 // CHECK17-NEXT: store i16* [[VLA]], i16** [[TMP37]], align 8
11551 // CHECK17-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
11552 // CHECK17-NEXT: store i64 [[TMP9]], i64* [[TMP38]], align 8
11553 // CHECK17-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
11554 // CHECK17-NEXT: store i8* null, i8** [[TMP39]], align 8
11555 // CHECK17-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11556 // CHECK17-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11557 // CHECK17-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
11558 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
11559 // CHECK17-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218.region_id, i32 5, i8** [[TMP40]], i8** [[TMP41]], i64* [[TMP42]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11560 // CHECK17-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
11561 // CHECK17-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
11562 // CHECK17: omp_offload.failed:
11563 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]]
11564 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]]
11565 // CHECK17: omp_offload.cont:
11566 // CHECK17-NEXT: br label [[OMP_IF_END:%.*]]
11567 // CHECK17: omp_if.else:
11568 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]]
11569 // CHECK17-NEXT: br label [[OMP_IF_END]]
11570 // CHECK17: omp_if.end:
11571 // CHECK17-NEXT: [[TMP45:%.*]] = mul nsw i64 1, [[TMP2]]
11572 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i64 [[TMP45]]
11573 // CHECK17-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1
11574 // CHECK17-NEXT: [[TMP46:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2
11575 // CHECK17-NEXT: [[CONV3:%.*]] = sext i16 [[TMP46]] to i32
11576 // CHECK17-NEXT: [[TMP47:%.*]] = load i32, i32* [[B]], align 4
11577 // CHECK17-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], [[TMP47]]
11578 // CHECK17-NEXT: [[TMP48:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
11579 // CHECK17-NEXT: call void @llvm.stackrestore(i8* [[TMP48]])
11580 // CHECK17-NEXT: ret i32 [[ADD4]]
11581 //
11582 //
11583 // CHECK17-LABEL: define {{[^@]+}}@_ZL7fstatici
11584 // CHECK17-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] {
11585 // CHECK17-NEXT: entry:
11586 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
11587 // CHECK17-NEXT: [[A:%.*]] = alloca i32, align 4
11588 // CHECK17-NEXT: [[AA:%.*]] = alloca i16, align 2
11589 // CHECK17-NEXT: [[AAA:%.*]] = alloca i8, align 1
11590 // CHECK17-NEXT: [[B:%.*]] = alloca [10 x i32], align 4
11591 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
11592 // CHECK17-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
11593 // CHECK17-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
11594 // CHECK17-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8
11595 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
11596 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
11597 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
11598 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11599 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11600 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
11601 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4
11602 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
11603 // CHECK17-NEXT: store i32 0, i32* [[A]], align 4
11604 // CHECK17-NEXT: store i16 0, i16* [[AA]], align 2
11605 // CHECK17-NEXT: store i8 0, i8* [[AAA]], align 1
11606 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
11607 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
11608 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
11609 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[N_CASTED]], align 8
11610 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4
11611 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32*
11612 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
11613 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[A_CASTED]], align 8
11614 // CHECK17-NEXT: [[TMP4:%.*]] = load i16, i16* [[AA]], align 2
11615 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
11616 // CHECK17-NEXT: store i16 [[TMP4]], i16* [[CONV2]], align 2
11617 // CHECK17-NEXT: [[TMP5:%.*]] = load i64, i64* [[AA_CASTED]], align 8
11618 // CHECK17-NEXT: [[TMP6:%.*]] = load i8, i8* [[AAA]], align 1
11619 // CHECK17-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_CASTED]] to i8*
11620 // CHECK17-NEXT: store i8 [[TMP6]], i8* [[CONV3]], align 1
11621 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[AAA_CASTED]], align 8
11622 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[N_ADDR]], align 4
11623 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 50
11624 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
11625 // CHECK17: omp_if.then:
11626 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11627 // CHECK17-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
11628 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP10]], align 8
11629 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11630 // CHECK17-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
11631 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP12]], align 8
11632 // CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
11633 // CHECK17-NEXT: store i8* null, i8** [[TMP13]], align 8
11634 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
11635 // CHECK17-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
11636 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[TMP15]], align 8
11637 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
11638 // CHECK17-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
11639 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[TMP17]], align 8
11640 // CHECK17-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
11641 // CHECK17-NEXT: store i8* null, i8** [[TMP18]], align 8
11642 // CHECK17-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
11643 // CHECK17-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64*
11644 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP20]], align 8
11645 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
11646 // CHECK17-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i64*
11647 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8
11648 // CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
11649 // CHECK17-NEXT: store i8* null, i8** [[TMP23]], align 8
11650 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
11651 // CHECK17-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
11652 // CHECK17-NEXT: store i64 [[TMP7]], i64* [[TMP25]], align 8
11653 // CHECK17-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
11654 // CHECK17-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
11655 // CHECK17-NEXT: store i64 [[TMP7]], i64* [[TMP27]], align 8
11656 // CHECK17-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
11657 // CHECK17-NEXT: store i8* null, i8** [[TMP28]], align 8
11658 // CHECK17-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
11659 // CHECK17-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [10 x i32]**
11660 // CHECK17-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP30]], align 8
11661 // CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
11662 // CHECK17-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to [10 x i32]**
11663 // CHECK17-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP32]], align 8
11664 // CHECK17-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
11665 // CHECK17-NEXT: store i8* null, i8** [[TMP33]], align 8
11666 // CHECK17-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11667 // CHECK17-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11668 // CHECK17-NEXT: [[TMP36:%.*]] = load i32, i32* [[A]], align 4
11669 // CHECK17-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4
11670 // CHECK17-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4
11671 // CHECK17-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_4]], align 4
11672 // CHECK17-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
11673 // CHECK17-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11674 // CHECK17-NEXT: [[SUB:%.*]] = sub i32 [[TMP38]], [[TMP39]]
11675 // CHECK17-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1
11676 // CHECK17-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1
11677 // CHECK17-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
11678 // CHECK17-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1
11679 // CHECK17-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4
11680 // CHECK17-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
11681 // CHECK17-NEXT: [[ADD8:%.*]] = add i32 [[TMP40]], 1
11682 // CHECK17-NEXT: [[TMP41:%.*]] = zext i32 [[ADD8]] to i64
11683 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP41]])
11684 // CHECK17-NEXT: [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11685 // CHECK17-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
11686 // CHECK17-NEXT: br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
11687 // CHECK17: omp_offload.failed:
11688 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], i64 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]]
11689 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]]
11690 // CHECK17: omp_offload.cont:
11691 // CHECK17-NEXT: br label [[OMP_IF_END:%.*]]
11692 // CHECK17: omp_if.else:
11693 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], i64 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]]
11694 // CHECK17-NEXT: br label [[OMP_IF_END]]
11695 // CHECK17: omp_if.end:
11696 // CHECK17-NEXT: [[TMP44:%.*]] = load i32, i32* [[A]], align 4
11697 // CHECK17-NEXT: ret i32 [[TMP44]]
11698 //
11699 //
11700 // CHECK17-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
11701 // CHECK17-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] comdat {
11702 // CHECK17-NEXT: entry:
11703 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
11704 // CHECK17-NEXT: [[A:%.*]] = alloca i32, align 4
11705 // CHECK17-NEXT: [[AA:%.*]] = alloca i16, align 2
11706 // CHECK17-NEXT: [[B:%.*]] = alloca [10 x i32], align 4
11707 // CHECK17-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
11708 // CHECK17-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
11709 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
11710 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
11711 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
11712 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11713 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
11714 // CHECK17-NEXT: store i32 0, i32* [[A]], align 4
11715 // CHECK17-NEXT: store i16 0, i16* [[AA]], align 2
11716 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4
11717 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32*
11718 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
11719 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
11720 // CHECK17-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2
11721 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
11722 // CHECK17-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2
11723 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8
11724 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
11725 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40
11726 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
11727 // CHECK17: omp_if.then:
11728 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11729 // CHECK17-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
11730 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP6]], align 8
11731 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11732 // CHECK17-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
11733 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8
11734 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
11735 // CHECK17-NEXT: store i8* null, i8** [[TMP9]], align 8
11736 // CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
11737 // CHECK17-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64*
11738 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[TMP11]], align 8
11739 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
11740 // CHECK17-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
11741 // CHECK17-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8
11742 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
11743 // CHECK17-NEXT: store i8* null, i8** [[TMP14]], align 8
11744 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
11745 // CHECK17-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]**
11746 // CHECK17-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 8
11747 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
11748 // CHECK17-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]**
11749 // CHECK17-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 8
11750 // CHECK17-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
11751 // CHECK17-NEXT: store i8* null, i8** [[TMP19]], align 8
11752 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11753 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11754 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
11755 // CHECK17-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.17, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.18, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11756 // CHECK17-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
11757 // CHECK17-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
11758 // CHECK17: omp_offload.failed:
11759 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]]
11760 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]]
11761 // CHECK17: omp_offload.cont:
11762 // CHECK17-NEXT: br label [[OMP_IF_END:%.*]]
11763 // CHECK17: omp_if.else:
11764 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]]
11765 // CHECK17-NEXT: br label [[OMP_IF_END]]
11766 // CHECK17: omp_if.end:
11767 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4
11768 // CHECK17-NEXT: ret i32 [[TMP24]]
11769 //
11770 //
11771 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218
11772 // CHECK17-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] {
11773 // CHECK17-NEXT: entry:
11774 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
11775 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8
11776 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
11777 // CHECK17-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
11778 // CHECK17-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8
11779 // CHECK17-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8
11780 // CHECK17-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
11781 // CHECK17-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8
11782 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11783 // CHECK17-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
11784 // CHECK17-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8
11785 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
11786 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
11787 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11788 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
11789 // CHECK17-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8
11790 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
11791 // CHECK17-NEXT: [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i32*
11792 // CHECK17-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
11793 // CHECK17-NEXT: [[TMP5:%.*]] = load i64, i64* [[B_CASTED]], align 8
11794 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64, i64, i64, i16*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i64 [[TMP5]], i64 [[TMP1]], i64 [[TMP2]], i16* [[TMP3]])
11795 // CHECK17-NEXT: ret void
11796 //
11797 //
11798 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..11
11799 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] {
11800 // CHECK17-NEXT: entry:
11801 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11802 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11803 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
11804 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8
11805 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
11806 // CHECK17-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
11807 // CHECK17-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8
11808 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11809 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11810 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11811 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11812 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11813 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11814 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11815 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11816 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11817 // CHECK17-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
11818 // CHECK17-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8
11819 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11820 // CHECK17-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
11821 // CHECK17-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8
11822 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
11823 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
11824 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11825 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
11826 // CHECK17-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8
11827 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11828 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
11829 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11830 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11831 // CHECK17-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11832 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
11833 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11834 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11835 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9
11836 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11837 // CHECK17: cond.true:
11838 // CHECK17-NEXT: br label [[COND_END:%.*]]
11839 // CHECK17: cond.false:
11840 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11841 // CHECK17-NEXT: br label [[COND_END]]
11842 // CHECK17: cond.end:
11843 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
11844 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11845 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11846 // CHECK17-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
11847 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11848 // CHECK17: omp.inner.for.cond:
11849 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11850 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11851 // CHECK17-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
11852 // CHECK17-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11853 // CHECK17: omp.inner.for.body:
11854 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11855 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
11856 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11857 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4
11858 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
11859 // CHECK17-NEXT: [[CONV4:%.*]] = sitofp i32 [[TMP12]] to double
11860 // CHECK17-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.500000e+00
11861 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
11862 // CHECK17-NEXT: store double [[ADD5]], double* [[A]], align 8
11863 // CHECK17-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0
11864 // CHECK17-NEXT: [[TMP13:%.*]] = load double, double* [[A6]], align 8
11865 // CHECK17-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00
11866 // CHECK17-NEXT: store double [[INC]], double* [[A6]], align 8
11867 // CHECK17-NEXT: [[CONV7:%.*]] = fptosi double [[INC]] to i16
11868 // CHECK17-NEXT: [[TMP14:%.*]] = mul nsw i64 1, [[TMP2]]
11869 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i64 [[TMP14]]
11870 // CHECK17-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1
11871 // CHECK17-NEXT: store i16 [[CONV7]], i16* [[ARRAYIDX8]], align 2
11872 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11873 // CHECK17: omp.body.continue:
11874 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11875 // CHECK17: omp.inner.for.inc:
11876 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11877 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1
11878 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
11879 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
11880 // CHECK17: omp.inner.for.end:
11881 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11882 // CHECK17: omp.loop.exit:
11883 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
11884 // CHECK17-NEXT: ret void
11885 //
11886 //
11887 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200
11888 // CHECK17-SAME: (i64 [[N:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
11889 // CHECK17-NEXT: entry:
11890 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
11891 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
11892 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
11893 // CHECK17-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8
11894 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
11895 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
11896 // CHECK17-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
11897 // CHECK17-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
11898 // CHECK17-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8
11899 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
11900 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
11901 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
11902 // CHECK17-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8
11903 // CHECK17-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
11904 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11905 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32*
11906 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
11907 // CHECK17-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8*
11908 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
11909 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
11910 // CHECK17-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32*
11911 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[CONV4]], align 4
11912 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8
11913 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8
11914 // CHECK17-NEXT: [[CONV5:%.*]] = bitcast i64* [[A_CASTED]] to i32*
11915 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[CONV5]], align 4
11916 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8
11917 // CHECK17-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV2]], align 8
11918 // CHECK17-NEXT: [[CONV6:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
11919 // CHECK17-NEXT: store i16 [[TMP5]], i16* [[CONV6]], align 2
11920 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, i64* [[AA_CASTED]], align 8
11921 // CHECK17-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV3]], align 8
11922 // CHECK17-NEXT: [[CONV7:%.*]] = bitcast i64* [[AAA_CASTED]] to i8*
11923 // CHECK17-NEXT: store i8 [[TMP7]], i8* [[CONV7]], align 1
11924 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[AAA_CASTED]], align 8
11925 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]], [10 x i32]* [[TMP0]])
11926 // CHECK17-NEXT: ret void
11927 //
11928 //
11929 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..13
11930 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
11931 // CHECK17-NEXT: entry:
11932 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11933 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11934 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
11935 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
11936 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
11937 // CHECK17-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8
11938 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
11939 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11940 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11941 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11942 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
11943 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4
11944 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11945 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11946 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11947 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11948 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11949 // CHECK17-NEXT: [[I8:%.*]] = alloca i32, align 4
11950 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11951 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11952 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
11953 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
11954 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
11955 // CHECK17-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8
11956 // CHECK17-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
11957 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11958 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32*
11959 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
11960 // CHECK17-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8*
11961 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
11962 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 8
11963 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
11964 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
11965 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_4]], align 4
11966 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
11967 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11968 // CHECK17-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]]
11969 // CHECK17-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1
11970 // CHECK17-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1
11971 // CHECK17-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
11972 // CHECK17-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1
11973 // CHECK17-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4
11974 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11975 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[I]], align 4
11976 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11977 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
11978 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]]
11979 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11980 // CHECK17: omp.precond.then:
11981 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11982 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
11983 // CHECK17-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
11984 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11985 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11986 // CHECK17-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11987 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
11988 // CHECK17-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11989 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11990 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
11991 // CHECK17-NEXT: [[CMP9:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]]
11992 // CHECK17-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11993 // CHECK17: cond.true:
11994 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
11995 // CHECK17-NEXT: br label [[COND_END:%.*]]
11996 // CHECK17: cond.false:
11997 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11998 // CHECK17-NEXT: br label [[COND_END]]
11999 // CHECK17: cond.end:
12000 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
12001 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12002 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12003 // CHECK17-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
12004 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12005 // CHECK17: omp.inner.for.cond:
12006 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12007 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12008 // CHECK17-NEXT: [[ADD10:%.*]] = add i32 [[TMP17]], 1
12009 // CHECK17-NEXT: [[CMP11:%.*]] = icmp ult i32 [[TMP16]], [[ADD10]]
12010 // CHECK17-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12011 // CHECK17: omp.inner.for.body:
12012 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12013 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12014 // CHECK17-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1
12015 // CHECK17-NEXT: [[ADD12:%.*]] = add i32 [[TMP18]], [[MUL]]
12016 // CHECK17-NEXT: store i32 [[ADD12]], i32* [[I8]], align 4
12017 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 8
12018 // CHECK17-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP20]], 1
12019 // CHECK17-NEXT: store i32 [[ADD13]], i32* [[CONV1]], align 8
12020 // CHECK17-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV2]], align 8
12021 // CHECK17-NEXT: [[CONV14:%.*]] = sext i16 [[TMP21]] to i32
12022 // CHECK17-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1
12023 // CHECK17-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i16
12024 // CHECK17-NEXT: store i16 [[CONV16]], i16* [[CONV2]], align 8
12025 // CHECK17-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV3]], align 8
12026 // CHECK17-NEXT: [[CONV17:%.*]] = sext i8 [[TMP22]] to i32
12027 // CHECK17-NEXT: [[ADD18:%.*]] = add nsw i32 [[CONV17]], 1
12028 // CHECK17-NEXT: [[CONV19:%.*]] = trunc i32 [[ADD18]] to i8
12029 // CHECK17-NEXT: store i8 [[CONV19]], i8* [[CONV3]], align 8
12030 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2
12031 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
12032 // CHECK17-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP23]], 1
12033 // CHECK17-NEXT: store i32 [[ADD20]], i32* [[ARRAYIDX]], align 4
12034 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12035 // CHECK17: omp.body.continue:
12036 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12037 // CHECK17: omp.inner.for.inc:
12038 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12039 // CHECK17-NEXT: [[ADD21:%.*]] = add i32 [[TMP24]], 1
12040 // CHECK17-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4
12041 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
12042 // CHECK17: omp.inner.for.end:
12043 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12044 // CHECK17: omp.loop.exit:
12045 // CHECK17-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12046 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
12047 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
12048 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
12049 // CHECK17: omp.precond.end:
12050 // CHECK17-NEXT: ret void
12051 //
12052 //
12053 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183
12054 // CHECK17-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
12055 // CHECK17-NEXT: entry:
12056 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
12057 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
12058 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
12059 // CHECK17-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
12060 // CHECK17-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
12061 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
12062 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
12063 // CHECK17-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
12064 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
12065 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
12066 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
12067 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
12068 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
12069 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[CONV2]], align 4
12070 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8
12071 // CHECK17-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 8
12072 // CHECK17-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
12073 // CHECK17-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2
12074 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8
12075 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..16 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], [10 x i32]* [[TMP0]])
12076 // CHECK17-NEXT: ret void
12077 //
12078 //
12079 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..16
12080 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
12081 // CHECK17-NEXT: entry:
12082 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12083 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12084 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
12085 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
12086 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
12087 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12088 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
12089 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12090 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12091 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12092 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12093 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
12094 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12095 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12096 // CHECK17-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
12097 // CHECK17-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
12098 // CHECK17-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
12099 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
12100 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
12101 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
12102 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12103 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
12104 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12105 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12106 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12107 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
12108 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12109 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12110 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
12111 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12112 // CHECK17: cond.true:
12113 // CHECK17-NEXT: br label [[COND_END:%.*]]
12114 // CHECK17: cond.false:
12115 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12116 // CHECK17-NEXT: br label [[COND_END]]
12117 // CHECK17: cond.end:
12118 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
12119 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12120 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12121 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
12122 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12123 // CHECK17: omp.inner.for.cond:
12124 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12125 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12126 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
12127 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12128 // CHECK17: omp.inner.for.body:
12129 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12130 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
12131 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12132 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4
12133 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8
12134 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
12135 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 8
12136 // CHECK17-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV1]], align 8
12137 // CHECK17-NEXT: [[CONV4:%.*]] = sext i16 [[TMP10]] to i32
12138 // CHECK17-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1
12139 // CHECK17-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
12140 // CHECK17-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 8
12141 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2
12142 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
12143 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], 1
12144 // CHECK17-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX]], align 4
12145 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12146 // CHECK17: omp.body.continue:
12147 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12148 // CHECK17: omp.inner.for.inc:
12149 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12150 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP12]], 1
12151 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
12152 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
12153 // CHECK17: omp.inner.for.end:
12154 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12155 // CHECK17: omp.loop.exit:
12156 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
12157 // CHECK17-NEXT: ret void
12158 //
12159 //
12160 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
12161 // CHECK17-SAME: () #[[ATTR4]] {
12162 // CHECK17-NEXT: entry:
12163 // CHECK17-NEXT: call void @__tgt_register_requires(i64 1)
12164 // CHECK17-NEXT: ret void
12165 //
12166 //
12167 // CHECK18-LABEL: define {{[^@]+}}@_Z3fooi
12168 // CHECK18-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
12169 // CHECK18-NEXT: entry:
12170 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
12171 // CHECK18-NEXT: [[A:%.*]] = alloca i32, align 4
12172 // CHECK18-NEXT: [[AA:%.*]] = alloca i16, align 2
12173 // CHECK18-NEXT: [[B:%.*]] = alloca [10 x float], align 4
12174 // CHECK18-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
12175 // CHECK18-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
12176 // CHECK18-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8
12177 // CHECK18-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8
12178 // CHECK18-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 8
12179 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12180 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
12181 // CHECK18-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
12182 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
12183 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED4:%.*]] = alloca i64, align 8
12184 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
12185 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
12186 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
12187 // CHECK18-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4
12188 // CHECK18-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
12189 // CHECK18-NEXT: [[AA_CASTED7:%.*]] = alloca i64, align 8
12190 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS9:%.*]] = alloca [1 x i8*], align 8
12191 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS10:%.*]] = alloca [1 x i8*], align 8
12192 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS11:%.*]] = alloca [1 x i8*], align 8
12193 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
12194 // CHECK18-NEXT: [[A_CASTED12:%.*]] = alloca i64, align 8
12195 // CHECK18-NEXT: [[AA_CASTED14:%.*]] = alloca i64, align 8
12196 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS16:%.*]] = alloca [2 x i8*], align 8
12197 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS17:%.*]] = alloca [2 x i8*], align 8
12198 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS18:%.*]] = alloca [2 x i8*], align 8
12199 // CHECK18-NEXT: [[_TMP19:%.*]] = alloca i32, align 4
12200 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4
12201 // CHECK18-NEXT: [[A_CASTED23:%.*]] = alloca i64, align 8
12202 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED25:%.*]] = alloca i64, align 8
12203 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS29:%.*]] = alloca [10 x i8*], align 8
12204 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS30:%.*]] = alloca [10 x i8*], align 8
12205 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS31:%.*]] = alloca [10 x i8*], align 8
12206 // CHECK18-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [10 x i64], align 8
12207 // CHECK18-NEXT: [[_TMP32:%.*]] = alloca i32, align 4
12208 // CHECK18-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
12209 // CHECK18-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
12210 // CHECK18-NEXT: store i32 0, i32* [[A]], align 4
12211 // CHECK18-NEXT: store i16 0, i16* [[AA]], align 2
12212 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
12213 // CHECK18-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
12214 // CHECK18-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave()
12215 // CHECK18-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8
12216 // CHECK18-NEXT: [[VLA:%.*]] = alloca float, i64 [[TMP2]], align 4
12217 // CHECK18-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8
12218 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
12219 // CHECK18-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64
12220 // CHECK18-NEXT: [[TMP6:%.*]] = mul nuw i64 5, [[TMP5]]
12221 // CHECK18-NEXT: [[VLA1:%.*]] = alloca double, i64 [[TMP6]], align 8
12222 // CHECK18-NEXT: store i64 [[TMP5]], i64* [[__VLA_EXPR1]], align 8
12223 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4
12224 // CHECK18-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_]], align 4
12225 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4
12226 // CHECK18-NEXT: store i32 [[TMP8]], i32* [[DOTCAPTURE_EXPR_2]], align 4
12227 // CHECK18-NEXT: [[TMP9:%.*]] = load i16, i16* [[AA]], align 2
12228 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
12229 // CHECK18-NEXT: store i16 [[TMP9]], i16* [[CONV]], align 2
12230 // CHECK18-NEXT: [[TMP10:%.*]] = load i64, i64* [[AA_CASTED]], align 8
12231 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12232 // CHECK18-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
12233 // CHECK18-NEXT: store i32 [[TMP11]], i32* [[CONV3]], align 4
12234 // CHECK18-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
12235 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12236 // CHECK18-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED4]] to i32*
12237 // CHECK18-NEXT: store i32 [[TMP13]], i32* [[CONV5]], align 4
12238 // CHECK18-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED4]], align 8
12239 // CHECK18-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
12240 // CHECK18-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64*
12241 // CHECK18-NEXT: store i64 [[TMP10]], i64* [[TMP16]], align 8
12242 // CHECK18-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
12243 // CHECK18-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64*
12244 // CHECK18-NEXT: store i64 [[TMP10]], i64* [[TMP18]], align 8
12245 // CHECK18-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
12246 // CHECK18-NEXT: store i8* null, i8** [[TMP19]], align 8
12247 // CHECK18-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
12248 // CHECK18-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
12249 // CHECK18-NEXT: store i64 [[TMP12]], i64* [[TMP21]], align 8
12250 // CHECK18-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
12251 // CHECK18-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
12252 // CHECK18-NEXT: store i64 [[TMP12]], i64* [[TMP23]], align 8
12253 // CHECK18-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
12254 // CHECK18-NEXT: store i8* null, i8** [[TMP24]], align 8
12255 // CHECK18-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
12256 // CHECK18-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64*
12257 // CHECK18-NEXT: store i64 [[TMP14]], i64* [[TMP26]], align 8
12258 // CHECK18-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
12259 // CHECK18-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i64*
12260 // CHECK18-NEXT: store i64 [[TMP14]], i64* [[TMP28]], align 8
12261 // CHECK18-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
12262 // CHECK18-NEXT: store i8* null, i8** [[TMP29]], align 8
12263 // CHECK18-NEXT: [[TMP30:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
12264 // CHECK18-NEXT: [[TMP31:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
12265 // CHECK18-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 0
12266 // CHECK18-NEXT: [[TMP33:%.*]] = load i16, i16* [[AA]], align 2
12267 // CHECK18-NEXT: store i16 [[TMP33]], i16* [[TMP32]], align 4
12268 // CHECK18-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 1
12269 // CHECK18-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12270 // CHECK18-NEXT: store i32 [[TMP35]], i32* [[TMP34]], align 4
12271 // CHECK18-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 2
12272 // CHECK18-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12273 // CHECK18-NEXT: store i32 [[TMP37]], i32* [[TMP36]], align 4
12274 // CHECK18-NEXT: [[TMP38:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 1, i64 120, i64 12, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1)
12275 // CHECK18-NEXT: [[TMP39:%.*]] = bitcast i8* [[TMP38]] to %struct.kmp_task_t_with_privates*
12276 // CHECK18-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP39]], i32 0, i32 0
12277 // CHECK18-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP40]], i32 0, i32 0
12278 // CHECK18-NEXT: [[TMP42:%.*]] = load i8*, i8** [[TMP41]], align 8
12279 // CHECK18-NEXT: [[TMP43:%.*]] = bitcast %struct.anon* [[AGG_CAPTURED]] to i8*
12280 // CHECK18-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP42]], i8* align 4 [[TMP43]], i64 12, i1 false)
12281 // CHECK18-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP39]], i32 0, i32 1
12282 // CHECK18-NEXT: [[TMP45:%.*]] = bitcast i8* [[TMP42]] to %struct.anon*
12283 // CHECK18-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 0
12284 // CHECK18-NEXT: [[TMP47:%.*]] = bitcast [3 x i8*]* [[TMP46]] to i8*
12285 // CHECK18-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP30]] to i8*
12286 // CHECK18-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP47]], i8* align 8 [[TMP48]], i64 24, i1 false)
12287 // CHECK18-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 1
12288 // CHECK18-NEXT: [[TMP50:%.*]] = bitcast [3 x i8*]* [[TMP49]] to i8*
12289 // CHECK18-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP31]] to i8*
12290 // CHECK18-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP50]], i8* align 8 [[TMP51]], i64 24, i1 false)
12291 // CHECK18-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 2
12292 // CHECK18-NEXT: [[TMP53:%.*]] = bitcast [3 x i64]* [[TMP52]] to i8*
12293 // CHECK18-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP53]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false)
12294 // CHECK18-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP44]], i32 0, i32 3
12295 // CHECK18-NEXT: [[TMP55:%.*]] = load i16, i16* [[AA]], align 2
12296 // CHECK18-NEXT: store i16 [[TMP55]], i16* [[TMP54]], align 8
12297 // CHECK18-NEXT: [[TMP56:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i8* [[TMP38]])
12298 // CHECK18-NEXT: [[TMP57:%.*]] = load i32, i32* [[A]], align 4
12299 // CHECK18-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32*
12300 // CHECK18-NEXT: store i32 [[TMP57]], i32* [[CONV6]], align 4
12301 // CHECK18-NEXT: [[TMP58:%.*]] = load i64, i64* [[A_CASTED]], align 8
12302 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107(i64 [[TMP58]]) #[[ATTR3:[0-9]+]]
12303 // CHECK18-NEXT: [[TMP59:%.*]] = load i16, i16* [[AA]], align 2
12304 // CHECK18-NEXT: [[CONV8:%.*]] = bitcast i64* [[AA_CASTED7]] to i16*
12305 // CHECK18-NEXT: store i16 [[TMP59]], i16* [[CONV8]], align 2
12306 // CHECK18-NEXT: [[TMP60:%.*]] = load i64, i64* [[AA_CASTED7]], align 8
12307 // CHECK18-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0
12308 // CHECK18-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i64*
12309 // CHECK18-NEXT: store i64 [[TMP60]], i64* [[TMP62]], align 8
12310 // CHECK18-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0
12311 // CHECK18-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to i64*
12312 // CHECK18-NEXT: store i64 [[TMP60]], i64* [[TMP64]], align 8
12313 // CHECK18-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 0
12314 // CHECK18-NEXT: store i8* null, i8** [[TMP65]], align 8
12315 // CHECK18-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0
12316 // CHECK18-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0
12317 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
12318 // CHECK18-NEXT: [[TMP68:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113.region_id, i32 1, i8** [[TMP66]], i8** [[TMP67]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
12319 // CHECK18-NEXT: [[TMP69:%.*]] = icmp ne i32 [[TMP68]], 0
12320 // CHECK18-NEXT: br i1 [[TMP69]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
12321 // CHECK18: omp_offload.failed:
12322 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113(i64 [[TMP60]]) #[[ATTR3]]
12323 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]]
12324 // CHECK18: omp_offload.cont:
12325 // CHECK18-NEXT: [[TMP70:%.*]] = load i32, i32* [[A]], align 4
12326 // CHECK18-NEXT: [[CONV13:%.*]] = bitcast i64* [[A_CASTED12]] to i32*
12327 // CHECK18-NEXT: store i32 [[TMP70]], i32* [[CONV13]], align 4
12328 // CHECK18-NEXT: [[TMP71:%.*]] = load i64, i64* [[A_CASTED12]], align 8
12329 // CHECK18-NEXT: [[TMP72:%.*]] = load i16, i16* [[AA]], align 2
12330 // CHECK18-NEXT: [[CONV15:%.*]] = bitcast i64* [[AA_CASTED14]] to i16*
12331 // CHECK18-NEXT: store i16 [[TMP72]], i16* [[CONV15]], align 2
12332 // CHECK18-NEXT: [[TMP73:%.*]] = load i64, i64* [[AA_CASTED14]], align 8
12333 // CHECK18-NEXT: [[TMP74:%.*]] = load i32, i32* [[N_ADDR]], align 4
12334 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP74]], 10
12335 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
12336 // CHECK18: omp_if.then:
12337 // CHECK18-NEXT: [[TMP75:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0
12338 // CHECK18-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64*
12339 // CHECK18-NEXT: store i64 [[TMP71]], i64* [[TMP76]], align 8
12340 // CHECK18-NEXT: [[TMP77:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0
12341 // CHECK18-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64*
12342 // CHECK18-NEXT: store i64 [[TMP71]], i64* [[TMP78]], align 8
12343 // CHECK18-NEXT: [[TMP79:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 0
12344 // CHECK18-NEXT: store i8* null, i8** [[TMP79]], align 8
12345 // CHECK18-NEXT: [[TMP80:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 1
12346 // CHECK18-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64*
12347 // CHECK18-NEXT: store i64 [[TMP73]], i64* [[TMP81]], align 8
12348 // CHECK18-NEXT: [[TMP82:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 1
12349 // CHECK18-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64*
12350 // CHECK18-NEXT: store i64 [[TMP73]], i64* [[TMP83]], align 8
12351 // CHECK18-NEXT: [[TMP84:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS18]], i64 0, i64 1
12352 // CHECK18-NEXT: store i8* null, i8** [[TMP84]], align 8
12353 // CHECK18-NEXT: [[TMP85:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS16]], i32 0, i32 0
12354 // CHECK18-NEXT: [[TMP86:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS17]], i32 0, i32 0
12355 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
12356 // CHECK18-NEXT: [[TMP87:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120.region_id, i32 2, i8** [[TMP85]], i8** [[TMP86]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
12357 // CHECK18-NEXT: [[TMP88:%.*]] = icmp ne i32 [[TMP87]], 0
12358 // CHECK18-NEXT: br i1 [[TMP88]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
12359 // CHECK18: omp_offload.failed20:
12360 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i64 [[TMP71]], i64 [[TMP73]]) #[[ATTR3]]
12361 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT21]]
12362 // CHECK18: omp_offload.cont21:
12363 // CHECK18-NEXT: br label [[OMP_IF_END:%.*]]
12364 // CHECK18: omp_if.else:
12365 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i64 [[TMP71]], i64 [[TMP73]]) #[[ATTR3]]
12366 // CHECK18-NEXT: br label [[OMP_IF_END]]
12367 // CHECK18: omp_if.end:
12368 // CHECK18-NEXT: [[TMP89:%.*]] = load i32, i32* [[N_ADDR]], align 4
12369 // CHECK18-NEXT: store i32 [[TMP89]], i32* [[DOTCAPTURE_EXPR_22]], align 4
12370 // CHECK18-NEXT: [[TMP90:%.*]] = load i32, i32* [[A]], align 4
12371 // CHECK18-NEXT: [[CONV24:%.*]] = bitcast i64* [[A_CASTED23]] to i32*
12372 // CHECK18-NEXT: store i32 [[TMP90]], i32* [[CONV24]], align 4
12373 // CHECK18-NEXT: [[TMP91:%.*]] = load i64, i64* [[A_CASTED23]], align 8
12374 // CHECK18-NEXT: [[TMP92:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_22]], align 4
12375 // CHECK18-NEXT: [[CONV26:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED25]] to i32*
12376 // CHECK18-NEXT: store i32 [[TMP92]], i32* [[CONV26]], align 4
12377 // CHECK18-NEXT: [[TMP93:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED25]], align 8
12378 // CHECK18-NEXT: [[TMP94:%.*]] = load i32, i32* [[N_ADDR]], align 4
12379 // CHECK18-NEXT: [[CMP27:%.*]] = icmp sgt i32 [[TMP94]], 20
12380 // CHECK18-NEXT: br i1 [[CMP27]], label [[OMP_IF_THEN28:%.*]], label [[OMP_IF_ELSE35:%.*]]
12381 // CHECK18: omp_if.then28:
12382 // CHECK18-NEXT: [[TMP95:%.*]] = mul nuw i64 [[TMP2]], 4
12383 // CHECK18-NEXT: [[TMP96:%.*]] = mul nuw i64 5, [[TMP5]]
12384 // CHECK18-NEXT: [[TMP97:%.*]] = mul nuw i64 [[TMP96]], 8
12385 // CHECK18-NEXT: [[TMP98:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0
12386 // CHECK18-NEXT: [[TMP99:%.*]] = bitcast i8** [[TMP98]] to i64*
12387 // CHECK18-NEXT: store i64 [[TMP91]], i64* [[TMP99]], align 8
12388 // CHECK18-NEXT: [[TMP100:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 0
12389 // CHECK18-NEXT: [[TMP101:%.*]] = bitcast i8** [[TMP100]] to i64*
12390 // CHECK18-NEXT: store i64 [[TMP91]], i64* [[TMP101]], align 8
12391 // CHECK18-NEXT: [[TMP102:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
12392 // CHECK18-NEXT: store i64 4, i64* [[TMP102]], align 8
12393 // CHECK18-NEXT: [[TMP103:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 0
12394 // CHECK18-NEXT: store i8* null, i8** [[TMP103]], align 8
12395 // CHECK18-NEXT: [[TMP104:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 1
12396 // CHECK18-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to [10 x float]**
12397 // CHECK18-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP105]], align 8
12398 // CHECK18-NEXT: [[TMP106:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 1
12399 // CHECK18-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to [10 x float]**
12400 // CHECK18-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP107]], align 8
12401 // CHECK18-NEXT: [[TMP108:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
12402 // CHECK18-NEXT: store i64 40, i64* [[TMP108]], align 8
12403 // CHECK18-NEXT: [[TMP109:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 1
12404 // CHECK18-NEXT: store i8* null, i8** [[TMP109]], align 8
12405 // CHECK18-NEXT: [[TMP110:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 2
12406 // CHECK18-NEXT: [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64*
12407 // CHECK18-NEXT: store i64 [[TMP2]], i64* [[TMP111]], align 8
12408 // CHECK18-NEXT: [[TMP112:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 2
12409 // CHECK18-NEXT: [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64*
12410 // CHECK18-NEXT: store i64 [[TMP2]], i64* [[TMP113]], align 8
12411 // CHECK18-NEXT: [[TMP114:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
12412 // CHECK18-NEXT: store i64 8, i64* [[TMP114]], align 8
12413 // CHECK18-NEXT: [[TMP115:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 2
12414 // CHECK18-NEXT: store i8* null, i8** [[TMP115]], align 8
12415 // CHECK18-NEXT: [[TMP116:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 3
12416 // CHECK18-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to float**
12417 // CHECK18-NEXT: store float* [[VLA]], float** [[TMP117]], align 8
12418 // CHECK18-NEXT: [[TMP118:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 3
12419 // CHECK18-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to float**
12420 // CHECK18-NEXT: store float* [[VLA]], float** [[TMP119]], align 8
12421 // CHECK18-NEXT: [[TMP120:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
12422 // CHECK18-NEXT: store i64 [[TMP95]], i64* [[TMP120]], align 8
12423 // CHECK18-NEXT: [[TMP121:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 3
12424 // CHECK18-NEXT: store i8* null, i8** [[TMP121]], align 8
12425 // CHECK18-NEXT: [[TMP122:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 4
12426 // CHECK18-NEXT: [[TMP123:%.*]] = bitcast i8** [[TMP122]] to [5 x [10 x double]]**
12427 // CHECK18-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP123]], align 8
12428 // CHECK18-NEXT: [[TMP124:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 4
12429 // CHECK18-NEXT: [[TMP125:%.*]] = bitcast i8** [[TMP124]] to [5 x [10 x double]]**
12430 // CHECK18-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP125]], align 8
12431 // CHECK18-NEXT: [[TMP126:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
12432 // CHECK18-NEXT: store i64 400, i64* [[TMP126]], align 8
12433 // CHECK18-NEXT: [[TMP127:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 4
12434 // CHECK18-NEXT: store i8* null, i8** [[TMP127]], align 8
12435 // CHECK18-NEXT: [[TMP128:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 5
12436 // CHECK18-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to i64*
12437 // CHECK18-NEXT: store i64 5, i64* [[TMP129]], align 8
12438 // CHECK18-NEXT: [[TMP130:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 5
12439 // CHECK18-NEXT: [[TMP131:%.*]] = bitcast i8** [[TMP130]] to i64*
12440 // CHECK18-NEXT: store i64 5, i64* [[TMP131]], align 8
12441 // CHECK18-NEXT: [[TMP132:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 5
12442 // CHECK18-NEXT: store i64 8, i64* [[TMP132]], align 8
12443 // CHECK18-NEXT: [[TMP133:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 5
12444 // CHECK18-NEXT: store i8* null, i8** [[TMP133]], align 8
12445 // CHECK18-NEXT: [[TMP134:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 6
12446 // CHECK18-NEXT: [[TMP135:%.*]] = bitcast i8** [[TMP134]] to i64*
12447 // CHECK18-NEXT: store i64 [[TMP5]], i64* [[TMP135]], align 8
12448 // CHECK18-NEXT: [[TMP136:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 6
12449 // CHECK18-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64*
12450 // CHECK18-NEXT: store i64 [[TMP5]], i64* [[TMP137]], align 8
12451 // CHECK18-NEXT: [[TMP138:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 6
12452 // CHECK18-NEXT: store i64 8, i64* [[TMP138]], align 8
12453 // CHECK18-NEXT: [[TMP139:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 6
12454 // CHECK18-NEXT: store i8* null, i8** [[TMP139]], align 8
12455 // CHECK18-NEXT: [[TMP140:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 7
12456 // CHECK18-NEXT: [[TMP141:%.*]] = bitcast i8** [[TMP140]] to double**
12457 // CHECK18-NEXT: store double* [[VLA1]], double** [[TMP141]], align 8
12458 // CHECK18-NEXT: [[TMP142:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 7
12459 // CHECK18-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to double**
12460 // CHECK18-NEXT: store double* [[VLA1]], double** [[TMP143]], align 8
12461 // CHECK18-NEXT: [[TMP144:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7
12462 // CHECK18-NEXT: store i64 [[TMP97]], i64* [[TMP144]], align 8
12463 // CHECK18-NEXT: [[TMP145:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 7
12464 // CHECK18-NEXT: store i8* null, i8** [[TMP145]], align 8
12465 // CHECK18-NEXT: [[TMP146:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 8
12466 // CHECK18-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to %struct.TT**
12467 // CHECK18-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP147]], align 8
12468 // CHECK18-NEXT: [[TMP148:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 8
12469 // CHECK18-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to %struct.TT**
12470 // CHECK18-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP149]], align 8
12471 // CHECK18-NEXT: [[TMP150:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 8
12472 // CHECK18-NEXT: store i64 16, i64* [[TMP150]], align 8
12473 // CHECK18-NEXT: [[TMP151:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 8
12474 // CHECK18-NEXT: store i8* null, i8** [[TMP151]], align 8
12475 // CHECK18-NEXT: [[TMP152:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 9
12476 // CHECK18-NEXT: [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i64*
12477 // CHECK18-NEXT: store i64 [[TMP93]], i64* [[TMP153]], align 8
12478 // CHECK18-NEXT: [[TMP154:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 9
12479 // CHECK18-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i64*
12480 // CHECK18-NEXT: store i64 [[TMP93]], i64* [[TMP155]], align 8
12481 // CHECK18-NEXT: [[TMP156:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 9
12482 // CHECK18-NEXT: store i64 4, i64* [[TMP156]], align 8
12483 // CHECK18-NEXT: [[TMP157:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 9
12484 // CHECK18-NEXT: store i8* null, i8** [[TMP157]], align 8
12485 // CHECK18-NEXT: [[TMP158:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0
12486 // CHECK18-NEXT: [[TMP159:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS30]], i32 0, i32 0
12487 // CHECK18-NEXT: [[TMP160:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
12488 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
12489 // CHECK18-NEXT: [[TMP161:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145.region_id, i32 10, i8** [[TMP158]], i8** [[TMP159]], i64* [[TMP160]], i64* getelementptr inbounds ([10 x i64], [10 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
12490 // CHECK18-NEXT: [[TMP162:%.*]] = icmp ne i32 [[TMP161]], 0
12491 // CHECK18-NEXT: br i1 [[TMP162]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]]
12492 // CHECK18: omp_offload.failed33:
12493 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i64 [[TMP91]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]], i64 [[TMP93]]) #[[ATTR3]]
12494 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT34]]
12495 // CHECK18: omp_offload.cont34:
12496 // CHECK18-NEXT: br label [[OMP_IF_END36:%.*]]
12497 // CHECK18: omp_if.else35:
12498 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i64 [[TMP91]], [10 x float]* [[B]], i64 [[TMP2]], float* [[VLA]], [5 x [10 x double]]* [[C]], i64 5, i64 [[TMP5]], double* [[VLA1]], %struct.TT* [[D]], i64 [[TMP93]]) #[[ATTR3]]
12499 // CHECK18-NEXT: br label [[OMP_IF_END36]]
12500 // CHECK18: omp_if.end36:
12501 // CHECK18-NEXT: [[TMP163:%.*]] = load i32, i32* [[A]], align 4
12502 // CHECK18-NEXT: [[TMP164:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
12503 // CHECK18-NEXT: call void @llvm.stackrestore(i8* [[TMP164]])
12504 // CHECK18-NEXT: ret i32 [[TMP163]]
12505 //
12506 //
12507 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103
12508 // CHECK18-SAME: (i64 [[AA:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]], i64 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR2:[0-9]+]] {
12509 // CHECK18-NEXT: entry:
12510 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
12511 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12512 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8
12513 // CHECK18-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
12514 // CHECK18-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
12515 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
12516 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12517 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8
12518 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
12519 // CHECK18-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
12520 // CHECK18-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32*
12521 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV3]], align 8
12522 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV4]], align 8
12523 // CHECK18-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]])
12524 // CHECK18-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 8
12525 // CHECK18-NEXT: [[CONV5:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
12526 // CHECK18-NEXT: store i16 [[TMP3]], i16* [[CONV5]], align 2
12527 // CHECK18-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8
12528 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP4]])
12529 // CHECK18-NEXT: ret void
12530 //
12531 //
12532 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined.
12533 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[AA:%.*]]) #[[ATTR2]] {
12534 // CHECK18-NEXT: entry:
12535 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12536 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12537 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
12538 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12539 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
12540 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12541 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12542 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12543 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12544 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
12545 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12546 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12547 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
12548 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
12549 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12550 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
12551 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12552 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12553 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12554 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
12555 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12556 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12557 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
12558 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12559 // CHECK18: cond.true:
12560 // CHECK18-NEXT: br label [[COND_END:%.*]]
12561 // CHECK18: cond.false:
12562 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12563 // CHECK18-NEXT: br label [[COND_END]]
12564 // CHECK18: cond.end:
12565 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
12566 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12567 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12568 // CHECK18-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
12569 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12570 // CHECK18: omp.inner.for.cond:
12571 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12572 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12573 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
12574 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12575 // CHECK18: omp.inner.for.body:
12576 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12577 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
12578 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12579 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4
12580 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12581 // CHECK18: omp.body.continue:
12582 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12583 // CHECK18: omp.inner.for.inc:
12584 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12585 // CHECK18-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
12586 // CHECK18-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
12587 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]]
12588 // CHECK18: omp.inner.for.end:
12589 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12590 // CHECK18: omp.loop.exit:
12591 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
12592 // CHECK18-NEXT: ret void
12593 //
12594 //
12595 // CHECK18-LABEL: define {{[^@]+}}@.omp_task_privates_map.
12596 // CHECK18-SAME: (%struct..kmp_privates.t* noalias [[TMP0:%.*]], i16** noalias [[TMP1:%.*]], [3 x i8*]** noalias [[TMP2:%.*]], [3 x i8*]** noalias [[TMP3:%.*]], [3 x i64]** noalias [[TMP4:%.*]]) #[[ATTR4:[0-9]+]] {
12597 // CHECK18-NEXT: entry:
12598 // CHECK18-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 8
12599 // CHECK18-NEXT: [[DOTADDR1:%.*]] = alloca i16**, align 8
12600 // CHECK18-NEXT: [[DOTADDR2:%.*]] = alloca [3 x i8*]**, align 8
12601 // CHECK18-NEXT: [[DOTADDR3:%.*]] = alloca [3 x i8*]**, align 8
12602 // CHECK18-NEXT: [[DOTADDR4:%.*]] = alloca [3 x i64]**, align 8
12603 // CHECK18-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 8
12604 // CHECK18-NEXT: store i16** [[TMP1]], i16*** [[DOTADDR1]], align 8
12605 // CHECK18-NEXT: store [3 x i8*]** [[TMP2]], [3 x i8*]*** [[DOTADDR2]], align 8
12606 // CHECK18-NEXT: store [3 x i8*]** [[TMP3]], [3 x i8*]*** [[DOTADDR3]], align 8
12607 // CHECK18-NEXT: store [3 x i64]** [[TMP4]], [3 x i64]*** [[DOTADDR4]], align 8
12608 // CHECK18-NEXT: [[TMP5:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 8
12609 // CHECK18-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 0
12610 // CHECK18-NEXT: [[TMP7:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR2]], align 8
12611 // CHECK18-NEXT: store [3 x i8*]* [[TMP6]], [3 x i8*]** [[TMP7]], align 8
12612 // CHECK18-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 1
12613 // CHECK18-NEXT: [[TMP9:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR3]], align 8
12614 // CHECK18-NEXT: store [3 x i8*]* [[TMP8]], [3 x i8*]** [[TMP9]], align 8
12615 // CHECK18-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 2
12616 // CHECK18-NEXT: [[TMP11:%.*]] = load [3 x i64]**, [3 x i64]*** [[DOTADDR4]], align 8
12617 // CHECK18-NEXT: store [3 x i64]* [[TMP10]], [3 x i64]** [[TMP11]], align 8
12618 // CHECK18-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 3
12619 // CHECK18-NEXT: [[TMP13:%.*]] = load i16**, i16*** [[DOTADDR1]], align 8
12620 // CHECK18-NEXT: store i16* [[TMP12]], i16** [[TMP13]], align 8
12621 // CHECK18-NEXT: ret void
12622 //
12623 //
12624 // CHECK18-LABEL: define {{[^@]+}}@.omp_task_entry.
12625 // CHECK18-SAME: (i32 signext [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
12626 // CHECK18-NEXT: entry:
12627 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4
12628 // CHECK18-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8
12629 // CHECK18-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8
12630 // CHECK18-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8
12631 // CHECK18-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8
12632 // CHECK18-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon*, align 8
12633 // CHECK18-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca i16*, align 8
12634 // CHECK18-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca [3 x i8*]*, align 8
12635 // CHECK18-NEXT: [[DOTFIRSTPRIV_PTR_ADDR2_I:%.*]] = alloca [3 x i8*]*, align 8
12636 // CHECK18-NEXT: [[DOTFIRSTPRIV_PTR_ADDR3_I:%.*]] = alloca [3 x i64]*, align 8
12637 // CHECK18-NEXT: [[AA_CASTED_I:%.*]] = alloca i64, align 8
12638 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED_I:%.*]] = alloca i64, align 8
12639 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED5_I:%.*]] = alloca i64, align 8
12640 // CHECK18-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4
12641 // CHECK18-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 8
12642 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4
12643 // CHECK18-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8
12644 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4
12645 // CHECK18-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8
12646 // CHECK18-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0
12647 // CHECK18-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2
12648 // CHECK18-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0
12649 // CHECK18-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
12650 // CHECK18-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon*
12651 // CHECK18-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 1
12652 // CHECK18-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8*
12653 // CHECK18-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8*
12654 // CHECK18-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
12655 // CHECK18-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]])
12656 // CHECK18-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]])
12657 // CHECK18-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META19:![0-9]+]])
12658 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !21
12659 // CHECK18-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !21
12660 // CHECK18-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !21
12661 // CHECK18-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !21
12662 // CHECK18-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !21
12663 // CHECK18-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !21
12664 // CHECK18-NEXT: [[TMP12:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !21
12665 // CHECK18-NEXT: [[TMP13:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !21
12666 // CHECK18-NEXT: [[TMP14:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !21
12667 // CHECK18-NEXT: [[TMP15:%.*]] = bitcast void (i8*, ...)* [[TMP13]] to void (i8*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)*
12668 // CHECK18-NEXT: call void [[TMP15]](i8* [[TMP14]], i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]]) #[[ATTR3]]
12669 // CHECK18-NEXT: [[TMP16:%.*]] = load i16*, i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !21
12670 // CHECK18-NEXT: [[TMP17:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias !21
12671 // CHECK18-NEXT: [[TMP18:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 8, !noalias !21
12672 // CHECK18-NEXT: [[TMP19:%.*]] = load [3 x i64]*, [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 8, !noalias !21
12673 // CHECK18-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP17]], i64 0, i64 0
12674 // CHECK18-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP18]], i64 0, i64 0
12675 // CHECK18-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[TMP19]], i64 0, i64 0
12676 // CHECK18-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP12]], i32 0, i32 1
12677 // CHECK18-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2
12678 // CHECK18-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP23]], align 4
12679 // CHECK18-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP24]], align 4
12680 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) #[[ATTR3]]
12681 // CHECK18-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP25]], i32 [[TMP26]], i32 0, i8* null, i32 0, i8* null) #[[ATTR3]]
12682 // CHECK18-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
12683 // CHECK18-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]]
12684 // CHECK18: omp_offload.failed.i:
12685 // CHECK18-NEXT: [[TMP29:%.*]] = load i16, i16* [[TMP16]], align 2
12686 // CHECK18-NEXT: [[CONV_I:%.*]] = bitcast i64* [[AA_CASTED_I]] to i16*
12687 // CHECK18-NEXT: store i16 [[TMP29]], i16* [[CONV_I]], align 2, !noalias !21
12688 // CHECK18-NEXT: [[TMP30:%.*]] = load i64, i64* [[AA_CASTED_I]], align 8, !noalias !21
12689 // CHECK18-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP23]], align 4
12690 // CHECK18-NEXT: [[CONV4_I:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED_I]] to i32*
12691 // CHECK18-NEXT: store i32 [[TMP31]], i32* [[CONV4_I]], align 4, !noalias !21
12692 // CHECK18-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED_I]], align 8, !noalias !21
12693 // CHECK18-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP24]], align 4
12694 // CHECK18-NEXT: [[CONV6_I:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED5_I]] to i32*
12695 // CHECK18-NEXT: store i32 [[TMP33]], i32* [[CONV6_I]], align 4, !noalias !21
12696 // CHECK18-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED5_I]], align 8, !noalias !21
12697 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103(i64 [[TMP30]], i64 [[TMP32]], i64 [[TMP34]]) #[[ATTR3]]
12698 // CHECK18-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]]
12699 // CHECK18: .omp_outlined..1.exit:
12700 // CHECK18-NEXT: ret i32 0
12701 //
12702 //
12703 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107
12704 // CHECK18-SAME: (i64 [[A:%.*]]) #[[ATTR2]] {
12705 // CHECK18-NEXT: entry:
12706 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
12707 // CHECK18-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
12708 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
12709 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
12710 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
12711 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32*
12712 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[CONV1]], align 4
12713 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
12714 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP1]])
12715 // CHECK18-NEXT: ret void
12716 //
12717 //
12718 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..2
12719 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]]) #[[ATTR2]] {
12720 // CHECK18-NEXT: entry:
12721 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12722 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12723 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
12724 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12725 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
12726 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12727 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12728 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12729 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12730 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
12731 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12732 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12733 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
12734 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
12735 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12736 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
12737 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12738 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12739 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12740 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
12741 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12742 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12743 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
12744 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12745 // CHECK18: cond.true:
12746 // CHECK18-NEXT: br label [[COND_END:%.*]]
12747 // CHECK18: cond.false:
12748 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12749 // CHECK18-NEXT: br label [[COND_END]]
12750 // CHECK18: cond.end:
12751 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
12752 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12753 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12754 // CHECK18-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
12755 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12756 // CHECK18: omp.inner.for.cond:
12757 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12758 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12759 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
12760 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12761 // CHECK18: omp.inner.for.body:
12762 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12763 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
12764 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12765 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4
12766 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 8
12767 // CHECK18-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
12768 // CHECK18-NEXT: store i32 [[ADD2]], i32* [[CONV]], align 8
12769 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12770 // CHECK18: omp.body.continue:
12771 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12772 // CHECK18: omp.inner.for.inc:
12773 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12774 // CHECK18-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
12775 // CHECK18-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
12776 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]]
12777 // CHECK18: omp.inner.for.end:
12778 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12779 // CHECK18: omp.loop.exit:
12780 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
12781 // CHECK18-NEXT: ret void
12782 //
12783 //
12784 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113
12785 // CHECK18-SAME: (i64 [[AA:%.*]]) #[[ATTR2]] {
12786 // CHECK18-NEXT: entry:
12787 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
12788 // CHECK18-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
12789 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
12790 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
12791 // CHECK18-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 8
12792 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
12793 // CHECK18-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2
12794 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[AA_CASTED]], align 8
12795 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP1]])
12796 // CHECK18-NEXT: ret void
12797 //
12798 //
12799 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..3
12800 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[AA:%.*]]) #[[ATTR2]] {
12801 // CHECK18-NEXT: entry:
12802 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12803 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12804 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
12805 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12806 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
12807 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12808 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12809 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12810 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12811 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
12812 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12813 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12814 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
12815 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
12816 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12817 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
12818 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12819 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12820 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12821 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
12822 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12823 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12824 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
12825 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12826 // CHECK18: cond.true:
12827 // CHECK18-NEXT: br label [[COND_END:%.*]]
12828 // CHECK18: cond.false:
12829 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12830 // CHECK18-NEXT: br label [[COND_END]]
12831 // CHECK18: cond.end:
12832 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
12833 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12834 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12835 // CHECK18-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
12836 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12837 // CHECK18: omp.inner.for.cond:
12838 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12839 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12840 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
12841 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12842 // CHECK18: omp.inner.for.body:
12843 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12844 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
12845 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12846 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4
12847 // CHECK18-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 8
12848 // CHECK18-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32
12849 // CHECK18-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1
12850 // CHECK18-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16
12851 // CHECK18-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 8
12852 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12853 // CHECK18: omp.body.continue:
12854 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12855 // CHECK18: omp.inner.for.inc:
12856 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12857 // CHECK18-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1
12858 // CHECK18-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
12859 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]]
12860 // CHECK18: omp.inner.for.end:
12861 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12862 // CHECK18: omp.loop.exit:
12863 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
12864 // CHECK18-NEXT: ret void
12865 //
12866 //
12867 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120
12868 // CHECK18-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR2]] {
12869 // CHECK18-NEXT: entry:
12870 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
12871 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
12872 // CHECK18-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
12873 // CHECK18-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
12874 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
12875 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
12876 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
12877 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
12878 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
12879 // CHECK18-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
12880 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[CONV2]], align 4
12881 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
12882 // CHECK18-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 8
12883 // CHECK18-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
12884 // CHECK18-NEXT: store i16 [[TMP2]], i16* [[CONV3]], align 2
12885 // CHECK18-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8
12886 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]])
12887 // CHECK18-NEXT: ret void
12888 //
12889 //
12890 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..6
12891 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR2]] {
12892 // CHECK18-NEXT: entry:
12893 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12894 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12895 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
12896 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
12897 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12898 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
12899 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12900 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12901 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12902 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12903 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
12904 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12905 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12906 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
12907 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
12908 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
12909 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
12910 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12911 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
12912 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12913 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12914 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12915 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
12916 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12917 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12918 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
12919 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12920 // CHECK18: cond.true:
12921 // CHECK18-NEXT: br label [[COND_END:%.*]]
12922 // CHECK18: cond.false:
12923 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12924 // CHECK18-NEXT: br label [[COND_END]]
12925 // CHECK18: cond.end:
12926 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
12927 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12928 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12929 // CHECK18-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
12930 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12931 // CHECK18: omp.inner.for.cond:
12932 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12933 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12934 // CHECK18-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
12935 // CHECK18-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12936 // CHECK18: omp.inner.for.body:
12937 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12938 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
12939 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12940 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4
12941 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 8
12942 // CHECK18-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1
12943 // CHECK18-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 8
12944 // CHECK18-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV1]], align 8
12945 // CHECK18-NEXT: [[CONV4:%.*]] = sext i16 [[TMP9]] to i32
12946 // CHECK18-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1
12947 // CHECK18-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
12948 // CHECK18-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 8
12949 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12950 // CHECK18: omp.body.continue:
12951 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12952 // CHECK18: omp.inner.for.inc:
12953 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12954 // CHECK18-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP10]], 1
12955 // CHECK18-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
12956 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]]
12957 // CHECK18: omp.inner.for.end:
12958 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12959 // CHECK18: omp.loop.exit:
12960 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
12961 // CHECK18-NEXT: ret void
12962 //
12963 //
12964 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145
12965 // CHECK18-SAME: (i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12966 // CHECK18-NEXT: entry:
12967 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
12968 // CHECK18-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8
12969 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
12970 // CHECK18-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8
12971 // CHECK18-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8
12972 // CHECK18-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
12973 // CHECK18-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8
12974 // CHECK18-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8
12975 // CHECK18-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8
12976 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12977 // CHECK18-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
12978 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
12979 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
12980 // CHECK18-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8
12981 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
12982 // CHECK18-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8
12983 // CHECK18-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8
12984 // CHECK18-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
12985 // CHECK18-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8
12986 // CHECK18-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8
12987 // CHECK18-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8
12988 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12989 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
12990 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8
12991 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
12992 // CHECK18-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8
12993 // CHECK18-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8
12994 // CHECK18-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
12995 // CHECK18-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8
12996 // CHECK18-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8
12997 // CHECK18-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8
12998 // CHECK18-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
12999 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 8
13000 // CHECK18-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32*
13001 // CHECK18-NEXT: store i32 [[TMP8]], i32* [[CONV6]], align 4
13002 // CHECK18-NEXT: [[TMP9:%.*]] = load i64, i64* [[A_CASTED]], align 8
13003 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV5]], align 8
13004 // CHECK18-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
13005 // CHECK18-NEXT: store i32 [[TMP10]], i32* [[CONV7]], align 4
13006 // CHECK18-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
13007 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [10 x float]*, i64, float*, [5 x [10 x double]]*, i64, i64, double*, %struct.TT*, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], [10 x float]* [[TMP0]], i64 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i64 [[TMP4]], i64 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i64 [[TMP11]])
13008 // CHECK18-NEXT: ret void
13009 //
13010 //
13011 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..9
13012 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13013 // CHECK18-NEXT: entry:
13014 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13015 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13016 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
13017 // CHECK18-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8
13018 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
13019 // CHECK18-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8
13020 // CHECK18-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8
13021 // CHECK18-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
13022 // CHECK18-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8
13023 // CHECK18-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8
13024 // CHECK18-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8
13025 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
13026 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13027 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
13028 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13029 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13030 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13031 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13032 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
13033 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13034 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13035 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
13036 // CHECK18-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8
13037 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
13038 // CHECK18-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8
13039 // CHECK18-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8
13040 // CHECK18-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
13041 // CHECK18-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8
13042 // CHECK18-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8
13043 // CHECK18-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8
13044 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
13045 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
13046 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8
13047 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
13048 // CHECK18-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8
13049 // CHECK18-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8
13050 // CHECK18-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
13051 // CHECK18-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8
13052 // CHECK18-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8
13053 // CHECK18-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8
13054 // CHECK18-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
13055 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13056 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
13057 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13058 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13059 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV5]], align 8
13060 // CHECK18-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13061 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
13062 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]])
13063 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
13064 // CHECK18: omp.dispatch.cond:
13065 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13066 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9
13067 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13068 // CHECK18: cond.true:
13069 // CHECK18-NEXT: br label [[COND_END:%.*]]
13070 // CHECK18: cond.false:
13071 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13072 // CHECK18-NEXT: br label [[COND_END]]
13073 // CHECK18: cond.end:
13074 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
13075 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13076 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13077 // CHECK18-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
13078 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13079 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13080 // CHECK18-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
13081 // CHECK18-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
13082 // CHECK18: omp.dispatch.body:
13083 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13084 // CHECK18: omp.inner.for.cond:
13085 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
13086 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
13087 // CHECK18-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
13088 // CHECK18-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13089 // CHECK18: omp.inner.for.body:
13090 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
13091 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
13092 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13093 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
13094 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !22
13095 // CHECK18-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
13096 // CHECK18-NEXT: store i32 [[ADD8]], i32* [[CONV]], align 8, !llvm.access.group !22
13097 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i64 0, i64 2
13098 // CHECK18-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !22
13099 // CHECK18-NEXT: [[CONV9:%.*]] = fpext float [[TMP20]] to double
13100 // CHECK18-NEXT: [[ADD10:%.*]] = fadd double [[CONV9]], 1.000000e+00
13101 // CHECK18-NEXT: [[CONV11:%.*]] = fptrunc double [[ADD10]] to float
13102 // CHECK18-NEXT: store float [[CONV11]], float* [[ARRAYIDX]], align 4, !llvm.access.group !22
13103 // CHECK18-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 3
13104 // CHECK18-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX12]], align 4, !llvm.access.group !22
13105 // CHECK18-NEXT: [[CONV13:%.*]] = fpext float [[TMP21]] to double
13106 // CHECK18-NEXT: [[ADD14:%.*]] = fadd double [[CONV13]], 1.000000e+00
13107 // CHECK18-NEXT: [[CONV15:%.*]] = fptrunc double [[ADD14]] to float
13108 // CHECK18-NEXT: store float [[CONV15]], float* [[ARRAYIDX12]], align 4, !llvm.access.group !22
13109 // CHECK18-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i64 0, i64 1
13110 // CHECK18-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX16]], i64 0, i64 2
13111 // CHECK18-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX17]], align 8, !llvm.access.group !22
13112 // CHECK18-NEXT: [[ADD18:%.*]] = fadd double [[TMP22]], 1.000000e+00
13113 // CHECK18-NEXT: store double [[ADD18]], double* [[ARRAYIDX17]], align 8, !llvm.access.group !22
13114 // CHECK18-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP5]]
13115 // CHECK18-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds double, double* [[TMP6]], i64 [[TMP23]]
13116 // CHECK18-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX19]], i64 3
13117 // CHECK18-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX20]], align 8, !llvm.access.group !22
13118 // CHECK18-NEXT: [[ADD21:%.*]] = fadd double [[TMP24]], 1.000000e+00
13119 // CHECK18-NEXT: store double [[ADD21]], double* [[ARRAYIDX20]], align 8, !llvm.access.group !22
13120 // CHECK18-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0
13121 // CHECK18-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8, !llvm.access.group !22
13122 // CHECK18-NEXT: [[ADD22:%.*]] = add nsw i64 [[TMP25]], 1
13123 // CHECK18-NEXT: store i64 [[ADD22]], i64* [[X]], align 8, !llvm.access.group !22
13124 // CHECK18-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1
13125 // CHECK18-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8, !llvm.access.group !22
13126 // CHECK18-NEXT: [[CONV23:%.*]] = sext i8 [[TMP26]] to i32
13127 // CHECK18-NEXT: [[ADD24:%.*]] = add nsw i32 [[CONV23]], 1
13128 // CHECK18-NEXT: [[CONV25:%.*]] = trunc i32 [[ADD24]] to i8
13129 // CHECK18-NEXT: store i8 [[CONV25]], i8* [[Y]], align 8, !llvm.access.group !22
13130 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13131 // CHECK18: omp.body.continue:
13132 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13133 // CHECK18: omp.inner.for.inc:
13134 // CHECK18-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
13135 // CHECK18-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP27]], 1
13136 // CHECK18-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
13137 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
13138 // CHECK18: omp.inner.for.end:
13139 // CHECK18-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
13140 // CHECK18: omp.dispatch.inc:
13141 // CHECK18-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13142 // CHECK18-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13143 // CHECK18-NEXT: [[ADD27:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
13144 // CHECK18-NEXT: store i32 [[ADD27]], i32* [[DOTOMP_LB]], align 4
13145 // CHECK18-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13146 // CHECK18-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13147 // CHECK18-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
13148 // CHECK18-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_UB]], align 4
13149 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND]]
13150 // CHECK18: omp.dispatch.end:
13151 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]])
13152 // CHECK18-NEXT: ret void
13153 //
13154 //
13155 // CHECK18-LABEL: define {{[^@]+}}@_Z3bari
13156 // CHECK18-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] {
13157 // CHECK18-NEXT: entry:
13158 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
13159 // CHECK18-NEXT: [[A:%.*]] = alloca i32, align 4
13160 // CHECK18-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8
13161 // CHECK18-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
13162 // CHECK18-NEXT: store i32 0, i32* [[A]], align 4
13163 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
13164 // CHECK18-NEXT: [[CALL:%.*]] = call signext i32 @_Z3fooi(i32 signext [[TMP0]])
13165 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
13166 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
13167 // CHECK18-NEXT: store i32 [[ADD]], i32* [[A]], align 4
13168 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13169 // CHECK18-NEXT: [[CALL1:%.*]] = call signext i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 8 dereferenceable(8) [[S]], i32 signext [[TMP2]])
13170 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4
13171 // CHECK18-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
13172 // CHECK18-NEXT: store i32 [[ADD2]], i32* [[A]], align 4
13173 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
13174 // CHECK18-NEXT: [[CALL3:%.*]] = call signext i32 @_ZL7fstatici(i32 signext [[TMP4]])
13175 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4
13176 // CHECK18-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
13177 // CHECK18-NEXT: store i32 [[ADD4]], i32* [[A]], align 4
13178 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
13179 // CHECK18-NEXT: [[CALL5:%.*]] = call signext i32 @_Z9ftemplateIiET_i(i32 signext [[TMP6]])
13180 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4
13181 // CHECK18-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]]
13182 // CHECK18-NEXT: store i32 [[ADD6]], i32* [[A]], align 4
13183 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4
13184 // CHECK18-NEXT: ret i32 [[TMP8]]
13185 //
13186 //
13187 // CHECK18-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
13188 // CHECK18-SAME: (%struct.S1* nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 signext [[N:%.*]]) #[[ATTR0]] comdat align 2 {
13189 // CHECK18-NEXT: entry:
13190 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
13191 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
13192 // CHECK18-NEXT: [[B:%.*]] = alloca i32, align 4
13193 // CHECK18-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
13194 // CHECK18-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
13195 // CHECK18-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8
13196 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
13197 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
13198 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
13199 // CHECK18-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8
13200 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
13201 // CHECK18-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
13202 // CHECK18-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
13203 // CHECK18-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
13204 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
13205 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
13206 // CHECK18-NEXT: store i32 [[ADD]], i32* [[B]], align 4
13207 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
13208 // CHECK18-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
13209 // CHECK18-NEXT: [[TMP3:%.*]] = call i8* @llvm.stacksave()
13210 // CHECK18-NEXT: store i8* [[TMP3]], i8** [[SAVED_STACK]], align 8
13211 // CHECK18-NEXT: [[TMP4:%.*]] = mul nuw i64 2, [[TMP2]]
13212 // CHECK18-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP4]], align 2
13213 // CHECK18-NEXT: store i64 [[TMP2]], i64* [[__VLA_EXPR0]], align 8
13214 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[B]], align 4
13215 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[B_CASTED]] to i32*
13216 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[CONV]], align 4
13217 // CHECK18-NEXT: [[TMP6:%.*]] = load i64, i64* [[B_CASTED]], align 8
13218 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[N_ADDR]], align 4
13219 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 60
13220 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
13221 // CHECK18: omp_if.then:
13222 // CHECK18-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
13223 // CHECK18-NEXT: [[TMP8:%.*]] = mul nuw i64 2, [[TMP2]]
13224 // CHECK18-NEXT: [[TMP9:%.*]] = mul nuw i64 [[TMP8]], 2
13225 // CHECK18-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13226 // CHECK18-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to %struct.S1**
13227 // CHECK18-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP11]], align 8
13228 // CHECK18-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13229 // CHECK18-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to double**
13230 // CHECK18-NEXT: store double* [[A]], double** [[TMP13]], align 8
13231 // CHECK18-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
13232 // CHECK18-NEXT: store i64 8, i64* [[TMP14]], align 8
13233 // CHECK18-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
13234 // CHECK18-NEXT: store i8* null, i8** [[TMP15]], align 8
13235 // CHECK18-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
13236 // CHECK18-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
13237 // CHECK18-NEXT: store i64 [[TMP6]], i64* [[TMP17]], align 8
13238 // CHECK18-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
13239 // CHECK18-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
13240 // CHECK18-NEXT: store i64 [[TMP6]], i64* [[TMP19]], align 8
13241 // CHECK18-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
13242 // CHECK18-NEXT: store i64 4, i64* [[TMP20]], align 8
13243 // CHECK18-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
13244 // CHECK18-NEXT: store i8* null, i8** [[TMP21]], align 8
13245 // CHECK18-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
13246 // CHECK18-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
13247 // CHECK18-NEXT: store i64 2, i64* [[TMP23]], align 8
13248 // CHECK18-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
13249 // CHECK18-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
13250 // CHECK18-NEXT: store i64 2, i64* [[TMP25]], align 8
13251 // CHECK18-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
13252 // CHECK18-NEXT: store i64 8, i64* [[TMP26]], align 8
13253 // CHECK18-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
13254 // CHECK18-NEXT: store i8* null, i8** [[TMP27]], align 8
13255 // CHECK18-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
13256 // CHECK18-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64*
13257 // CHECK18-NEXT: store i64 [[TMP2]], i64* [[TMP29]], align 8
13258 // CHECK18-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
13259 // CHECK18-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64*
13260 // CHECK18-NEXT: store i64 [[TMP2]], i64* [[TMP31]], align 8
13261 // CHECK18-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
13262 // CHECK18-NEXT: store i64 8, i64* [[TMP32]], align 8
13263 // CHECK18-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
13264 // CHECK18-NEXT: store i8* null, i8** [[TMP33]], align 8
13265 // CHECK18-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
13266 // CHECK18-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i16**
13267 // CHECK18-NEXT: store i16* [[VLA]], i16** [[TMP35]], align 8
13268 // CHECK18-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
13269 // CHECK18-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i16**
13270 // CHECK18-NEXT: store i16* [[VLA]], i16** [[TMP37]], align 8
13271 // CHECK18-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
13272 // CHECK18-NEXT: store i64 [[TMP9]], i64* [[TMP38]], align 8
13273 // CHECK18-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
13274 // CHECK18-NEXT: store i8* null, i8** [[TMP39]], align 8
13275 // CHECK18-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13276 // CHECK18-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13277 // CHECK18-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
13278 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
13279 // CHECK18-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218.region_id, i32 5, i8** [[TMP40]], i8** [[TMP41]], i64* [[TMP42]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
13280 // CHECK18-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
13281 // CHECK18-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
13282 // CHECK18: omp_offload.failed:
13283 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]]
13284 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]]
13285 // CHECK18: omp_offload.cont:
13286 // CHECK18-NEXT: br label [[OMP_IF_END:%.*]]
13287 // CHECK18: omp_if.else:
13288 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i64 [[TMP6]], i64 2, i64 [[TMP2]], i16* [[VLA]]) #[[ATTR3]]
13289 // CHECK18-NEXT: br label [[OMP_IF_END]]
13290 // CHECK18: omp_if.end:
13291 // CHECK18-NEXT: [[TMP45:%.*]] = mul nsw i64 1, [[TMP2]]
13292 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i64 [[TMP45]]
13293 // CHECK18-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1
13294 // CHECK18-NEXT: [[TMP46:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2
13295 // CHECK18-NEXT: [[CONV3:%.*]] = sext i16 [[TMP46]] to i32
13296 // CHECK18-NEXT: [[TMP47:%.*]] = load i32, i32* [[B]], align 4
13297 // CHECK18-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], [[TMP47]]
13298 // CHECK18-NEXT: [[TMP48:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
13299 // CHECK18-NEXT: call void @llvm.stackrestore(i8* [[TMP48]])
13300 // CHECK18-NEXT: ret i32 [[ADD4]]
13301 //
13302 //
13303 // CHECK18-LABEL: define {{[^@]+}}@_ZL7fstatici
13304 // CHECK18-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] {
13305 // CHECK18-NEXT: entry:
13306 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
13307 // CHECK18-NEXT: [[A:%.*]] = alloca i32, align 4
13308 // CHECK18-NEXT: [[AA:%.*]] = alloca i16, align 2
13309 // CHECK18-NEXT: [[AAA:%.*]] = alloca i8, align 1
13310 // CHECK18-NEXT: [[B:%.*]] = alloca [10 x i32], align 4
13311 // CHECK18-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
13312 // CHECK18-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
13313 // CHECK18-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
13314 // CHECK18-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8
13315 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
13316 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
13317 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
13318 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
13319 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13320 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
13321 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4
13322 // CHECK18-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
13323 // CHECK18-NEXT: store i32 0, i32* [[A]], align 4
13324 // CHECK18-NEXT: store i16 0, i16* [[AA]], align 2
13325 // CHECK18-NEXT: store i8 0, i8* [[AAA]], align 1
13326 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
13327 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
13328 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
13329 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[N_CASTED]], align 8
13330 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4
13331 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32*
13332 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
13333 // CHECK18-NEXT: [[TMP3:%.*]] = load i64, i64* [[A_CASTED]], align 8
13334 // CHECK18-NEXT: [[TMP4:%.*]] = load i16, i16* [[AA]], align 2
13335 // CHECK18-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
13336 // CHECK18-NEXT: store i16 [[TMP4]], i16* [[CONV2]], align 2
13337 // CHECK18-NEXT: [[TMP5:%.*]] = load i64, i64* [[AA_CASTED]], align 8
13338 // CHECK18-NEXT: [[TMP6:%.*]] = load i8, i8* [[AAA]], align 1
13339 // CHECK18-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_CASTED]] to i8*
13340 // CHECK18-NEXT: store i8 [[TMP6]], i8* [[CONV3]], align 1
13341 // CHECK18-NEXT: [[TMP7:%.*]] = load i64, i64* [[AAA_CASTED]], align 8
13342 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[N_ADDR]], align 4
13343 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 50
13344 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
13345 // CHECK18: omp_if.then:
13346 // CHECK18-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13347 // CHECK18-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
13348 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP10]], align 8
13349 // CHECK18-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13350 // CHECK18-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
13351 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP12]], align 8
13352 // CHECK18-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
13353 // CHECK18-NEXT: store i8* null, i8** [[TMP13]], align 8
13354 // CHECK18-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
13355 // CHECK18-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
13356 // CHECK18-NEXT: store i64 [[TMP3]], i64* [[TMP15]], align 8
13357 // CHECK18-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
13358 // CHECK18-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
13359 // CHECK18-NEXT: store i64 [[TMP3]], i64* [[TMP17]], align 8
13360 // CHECK18-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
13361 // CHECK18-NEXT: store i8* null, i8** [[TMP18]], align 8
13362 // CHECK18-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
13363 // CHECK18-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64*
13364 // CHECK18-NEXT: store i64 [[TMP5]], i64* [[TMP20]], align 8
13365 // CHECK18-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
13366 // CHECK18-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i64*
13367 // CHECK18-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8
13368 // CHECK18-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
13369 // CHECK18-NEXT: store i8* null, i8** [[TMP23]], align 8
13370 // CHECK18-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
13371 // CHECK18-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
13372 // CHECK18-NEXT: store i64 [[TMP7]], i64* [[TMP25]], align 8
13373 // CHECK18-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
13374 // CHECK18-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
13375 // CHECK18-NEXT: store i64 [[TMP7]], i64* [[TMP27]], align 8
13376 // CHECK18-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
13377 // CHECK18-NEXT: store i8* null, i8** [[TMP28]], align 8
13378 // CHECK18-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
13379 // CHECK18-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [10 x i32]**
13380 // CHECK18-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP30]], align 8
13381 // CHECK18-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
13382 // CHECK18-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to [10 x i32]**
13383 // CHECK18-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP32]], align 8
13384 // CHECK18-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
13385 // CHECK18-NEXT: store i8* null, i8** [[TMP33]], align 8
13386 // CHECK18-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13387 // CHECK18-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13388 // CHECK18-NEXT: [[TMP36:%.*]] = load i32, i32* [[A]], align 4
13389 // CHECK18-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4
13390 // CHECK18-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4
13391 // CHECK18-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_4]], align 4
13392 // CHECK18-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
13393 // CHECK18-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13394 // CHECK18-NEXT: [[SUB:%.*]] = sub i32 [[TMP38]], [[TMP39]]
13395 // CHECK18-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1
13396 // CHECK18-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1
13397 // CHECK18-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
13398 // CHECK18-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1
13399 // CHECK18-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4
13400 // CHECK18-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
13401 // CHECK18-NEXT: [[ADD8:%.*]] = add i32 [[TMP40]], 1
13402 // CHECK18-NEXT: [[TMP41:%.*]] = zext i32 [[ADD8]] to i64
13403 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP41]])
13404 // CHECK18-NEXT: [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
13405 // CHECK18-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
13406 // CHECK18-NEXT: br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
13407 // CHECK18: omp_offload.failed:
13408 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], i64 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]]
13409 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]]
13410 // CHECK18: omp_offload.cont:
13411 // CHECK18-NEXT: br label [[OMP_IF_END:%.*]]
13412 // CHECK18: omp_if.else:
13413 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i64 [[TMP1]], i64 [[TMP3]], i64 [[TMP5]], i64 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]]
13414 // CHECK18-NEXT: br label [[OMP_IF_END]]
13415 // CHECK18: omp_if.end:
13416 // CHECK18-NEXT: [[TMP44:%.*]] = load i32, i32* [[A]], align 4
13417 // CHECK18-NEXT: ret i32 [[TMP44]]
13418 //
13419 //
13420 // CHECK18-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
13421 // CHECK18-SAME: (i32 signext [[N:%.*]]) #[[ATTR0]] comdat {
13422 // CHECK18-NEXT: entry:
13423 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
13424 // CHECK18-NEXT: [[A:%.*]] = alloca i32, align 4
13425 // CHECK18-NEXT: [[AA:%.*]] = alloca i16, align 2
13426 // CHECK18-NEXT: [[B:%.*]] = alloca [10 x i32], align 4
13427 // CHECK18-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
13428 // CHECK18-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
13429 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
13430 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
13431 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
13432 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
13433 // CHECK18-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
13434 // CHECK18-NEXT: store i32 0, i32* [[A]], align 4
13435 // CHECK18-NEXT: store i16 0, i16* [[AA]], align 2
13436 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4
13437 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i32*
13438 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
13439 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
13440 // CHECK18-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2
13441 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
13442 // CHECK18-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2
13443 // CHECK18-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8
13444 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
13445 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40
13446 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
13447 // CHECK18: omp_if.then:
13448 // CHECK18-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13449 // CHECK18-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
13450 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP6]], align 8
13451 // CHECK18-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13452 // CHECK18-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
13453 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8
13454 // CHECK18-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
13455 // CHECK18-NEXT: store i8* null, i8** [[TMP9]], align 8
13456 // CHECK18-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
13457 // CHECK18-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64*
13458 // CHECK18-NEXT: store i64 [[TMP3]], i64* [[TMP11]], align 8
13459 // CHECK18-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
13460 // CHECK18-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
13461 // CHECK18-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8
13462 // CHECK18-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
13463 // CHECK18-NEXT: store i8* null, i8** [[TMP14]], align 8
13464 // CHECK18-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
13465 // CHECK18-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]**
13466 // CHECK18-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 8
13467 // CHECK18-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
13468 // CHECK18-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]**
13469 // CHECK18-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 8
13470 // CHECK18-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
13471 // CHECK18-NEXT: store i8* null, i8** [[TMP19]], align 8
13472 // CHECK18-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13473 // CHECK18-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13474 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
13475 // CHECK18-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.17, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.18, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
13476 // CHECK18-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
13477 // CHECK18-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
13478 // CHECK18: omp_offload.failed:
13479 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]]
13480 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]]
13481 // CHECK18: omp_offload.cont:
13482 // CHECK18-NEXT: br label [[OMP_IF_END:%.*]]
13483 // CHECK18: omp_if.else:
13484 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]]
13485 // CHECK18-NEXT: br label [[OMP_IF_END]]
13486 // CHECK18: omp_if.end:
13487 // CHECK18-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4
13488 // CHECK18-NEXT: ret i32 [[TMP24]]
13489 //
13490 //
13491 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218
13492 // CHECK18-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] {
13493 // CHECK18-NEXT: entry:
13494 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
13495 // CHECK18-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8
13496 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
13497 // CHECK18-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
13498 // CHECK18-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8
13499 // CHECK18-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8
13500 // CHECK18-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
13501 // CHECK18-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8
13502 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
13503 // CHECK18-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
13504 // CHECK18-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8
13505 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
13506 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
13507 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
13508 // CHECK18-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
13509 // CHECK18-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8
13510 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
13511 // CHECK18-NEXT: [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i32*
13512 // CHECK18-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
13513 // CHECK18-NEXT: [[TMP5:%.*]] = load i64, i64* [[B_CASTED]], align 8
13514 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64, i64, i64, i16*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i64 [[TMP5]], i64 [[TMP1]], i64 [[TMP2]], i16* [[TMP3]])
13515 // CHECK18-NEXT: ret void
13516 //
13517 //
13518 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..11
13519 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] {
13520 // CHECK18-NEXT: entry:
13521 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13522 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13523 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
13524 // CHECK18-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8
13525 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
13526 // CHECK18-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
13527 // CHECK18-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8
13528 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13529 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
13530 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13531 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13532 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13533 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13534 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
13535 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13536 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13537 // CHECK18-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
13538 // CHECK18-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8
13539 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
13540 // CHECK18-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
13541 // CHECK18-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8
13542 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
13543 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
13544 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
13545 // CHECK18-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
13546 // CHECK18-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8
13547 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13548 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
13549 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13550 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13551 // CHECK18-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13552 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
13553 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13554 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13555 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9
13556 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13557 // CHECK18: cond.true:
13558 // CHECK18-NEXT: br label [[COND_END:%.*]]
13559 // CHECK18: cond.false:
13560 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13561 // CHECK18-NEXT: br label [[COND_END]]
13562 // CHECK18: cond.end:
13563 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
13564 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13565 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13566 // CHECK18-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
13567 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13568 // CHECK18: omp.inner.for.cond:
13569 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13570 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13571 // CHECK18-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
13572 // CHECK18-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13573 // CHECK18: omp.inner.for.body:
13574 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13575 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
13576 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13577 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4
13578 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
13579 // CHECK18-NEXT: [[CONV4:%.*]] = sitofp i32 [[TMP12]] to double
13580 // CHECK18-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.500000e+00
13581 // CHECK18-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
13582 // CHECK18-NEXT: store double [[ADD5]], double* [[A]], align 8
13583 // CHECK18-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0
13584 // CHECK18-NEXT: [[TMP13:%.*]] = load double, double* [[A6]], align 8
13585 // CHECK18-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00
13586 // CHECK18-NEXT: store double [[INC]], double* [[A6]], align 8
13587 // CHECK18-NEXT: [[CONV7:%.*]] = fptosi double [[INC]] to i16
13588 // CHECK18-NEXT: [[TMP14:%.*]] = mul nsw i64 1, [[TMP2]]
13589 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i64 [[TMP14]]
13590 // CHECK18-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1
13591 // CHECK18-NEXT: store i16 [[CONV7]], i16* [[ARRAYIDX8]], align 2
13592 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13593 // CHECK18: omp.body.continue:
13594 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13595 // CHECK18: omp.inner.for.inc:
13596 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13597 // CHECK18-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1
13598 // CHECK18-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
13599 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]]
13600 // CHECK18: omp.inner.for.end:
13601 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13602 // CHECK18: omp.loop.exit:
13603 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
13604 // CHECK18-NEXT: ret void
13605 //
13606 //
13607 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200
13608 // CHECK18-SAME: (i64 [[N:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
13609 // CHECK18-NEXT: entry:
13610 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
13611 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
13612 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
13613 // CHECK18-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8
13614 // CHECK18-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
13615 // CHECK18-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
13616 // CHECK18-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
13617 // CHECK18-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
13618 // CHECK18-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8
13619 // CHECK18-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
13620 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
13621 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
13622 // CHECK18-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8
13623 // CHECK18-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
13624 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
13625 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32*
13626 // CHECK18-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
13627 // CHECK18-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8*
13628 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
13629 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
13630 // CHECK18-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32*
13631 // CHECK18-NEXT: store i32 [[TMP1]], i32* [[CONV4]], align 4
13632 // CHECK18-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8
13633 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8
13634 // CHECK18-NEXT: [[CONV5:%.*]] = bitcast i64* [[A_CASTED]] to i32*
13635 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[CONV5]], align 4
13636 // CHECK18-NEXT: [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8
13637 // CHECK18-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV2]], align 8
13638 // CHECK18-NEXT: [[CONV6:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
13639 // CHECK18-NEXT: store i16 [[TMP5]], i16* [[CONV6]], align 2
13640 // CHECK18-NEXT: [[TMP6:%.*]] = load i64, i64* [[AA_CASTED]], align 8
13641 // CHECK18-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV3]], align 8
13642 // CHECK18-NEXT: [[CONV7:%.*]] = bitcast i64* [[AAA_CASTED]] to i8*
13643 // CHECK18-NEXT: store i8 [[TMP7]], i8* [[CONV7]], align 1
13644 // CHECK18-NEXT: [[TMP8:%.*]] = load i64, i64* [[AAA_CASTED]], align 8
13645 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]], [10 x i32]* [[TMP0]])
13646 // CHECK18-NEXT: ret void
13647 //
13648 //
13649 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..13
13650 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
13651 // CHECK18-NEXT: entry:
13652 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13653 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13654 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
13655 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
13656 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
13657 // CHECK18-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8
13658 // CHECK18-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
13659 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13660 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
13661 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13662 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
13663 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4
13664 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
13665 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13666 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13667 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13668 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13669 // CHECK18-NEXT: [[I8:%.*]] = alloca i32, align 4
13670 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13671 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13672 // CHECK18-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
13673 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
13674 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
13675 // CHECK18-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8
13676 // CHECK18-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
13677 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
13678 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32*
13679 // CHECK18-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
13680 // CHECK18-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8*
13681 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
13682 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 8
13683 // CHECK18-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
13684 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
13685 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_4]], align 4
13686 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
13687 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13688 // CHECK18-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]]
13689 // CHECK18-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1
13690 // CHECK18-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1
13691 // CHECK18-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
13692 // CHECK18-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1
13693 // CHECK18-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4
13694 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13695 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[I]], align 4
13696 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13697 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
13698 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]]
13699 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13700 // CHECK18: omp.precond.then:
13701 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13702 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
13703 // CHECK18-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
13704 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13705 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13706 // CHECK18-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13707 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
13708 // CHECK18-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13709 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13710 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
13711 // CHECK18-NEXT: [[CMP9:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]]
13712 // CHECK18-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13713 // CHECK18: cond.true:
13714 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
13715 // CHECK18-NEXT: br label [[COND_END:%.*]]
13716 // CHECK18: cond.false:
13717 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13718 // CHECK18-NEXT: br label [[COND_END]]
13719 // CHECK18: cond.end:
13720 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
13721 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13722 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13723 // CHECK18-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
13724 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13725 // CHECK18: omp.inner.for.cond:
13726 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13727 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13728 // CHECK18-NEXT: [[ADD10:%.*]] = add i32 [[TMP17]], 1
13729 // CHECK18-NEXT: [[CMP11:%.*]] = icmp ult i32 [[TMP16]], [[ADD10]]
13730 // CHECK18-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13731 // CHECK18: omp.inner.for.body:
13732 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13733 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13734 // CHECK18-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1
13735 // CHECK18-NEXT: [[ADD12:%.*]] = add i32 [[TMP18]], [[MUL]]
13736 // CHECK18-NEXT: store i32 [[ADD12]], i32* [[I8]], align 4
13737 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 8
13738 // CHECK18-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP20]], 1
13739 // CHECK18-NEXT: store i32 [[ADD13]], i32* [[CONV1]], align 8
13740 // CHECK18-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV2]], align 8
13741 // CHECK18-NEXT: [[CONV14:%.*]] = sext i16 [[TMP21]] to i32
13742 // CHECK18-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1
13743 // CHECK18-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i16
13744 // CHECK18-NEXT: store i16 [[CONV16]], i16* [[CONV2]], align 8
13745 // CHECK18-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV3]], align 8
13746 // CHECK18-NEXT: [[CONV17:%.*]] = sext i8 [[TMP22]] to i32
13747 // CHECK18-NEXT: [[ADD18:%.*]] = add nsw i32 [[CONV17]], 1
13748 // CHECK18-NEXT: [[CONV19:%.*]] = trunc i32 [[ADD18]] to i8
13749 // CHECK18-NEXT: store i8 [[CONV19]], i8* [[CONV3]], align 8
13750 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2
13751 // CHECK18-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
13752 // CHECK18-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP23]], 1
13753 // CHECK18-NEXT: store i32 [[ADD20]], i32* [[ARRAYIDX]], align 4
13754 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13755 // CHECK18: omp.body.continue:
13756 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13757 // CHECK18: omp.inner.for.inc:
13758 // CHECK18-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13759 // CHECK18-NEXT: [[ADD21:%.*]] = add i32 [[TMP24]], 1
13760 // CHECK18-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4
13761 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]]
13762 // CHECK18: omp.inner.for.end:
13763 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13764 // CHECK18: omp.loop.exit:
13765 // CHECK18-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13766 // CHECK18-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
13767 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
13768 // CHECK18-NEXT: br label [[OMP_PRECOND_END]]
13769 // CHECK18: omp.precond.end:
13770 // CHECK18-NEXT: ret void
13771 //
13772 //
13773 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183
13774 // CHECK18-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
13775 // CHECK18-NEXT: entry:
13776 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
13777 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
13778 // CHECK18-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
13779 // CHECK18-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
13780 // CHECK18-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
13781 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
13782 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
13783 // CHECK18-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
13784 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
13785 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
13786 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
13787 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
13788 // CHECK18-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
13789 // CHECK18-NEXT: store i32 [[TMP1]], i32* [[CONV2]], align 4
13790 // CHECK18-NEXT: [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8
13791 // CHECK18-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 8
13792 // CHECK18-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
13793 // CHECK18-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2
13794 // CHECK18-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8
13795 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..16 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], [10 x i32]* [[TMP0]])
13796 // CHECK18-NEXT: ret void
13797 //
13798 //
13799 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..16
13800 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
13801 // CHECK18-NEXT: entry:
13802 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13803 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13804 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
13805 // CHECK18-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
13806 // CHECK18-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
13807 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13808 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
13809 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13810 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13811 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13812 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13813 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
13814 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13815 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13816 // CHECK18-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
13817 // CHECK18-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
13818 // CHECK18-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
13819 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
13820 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
13821 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
13822 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13823 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
13824 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13825 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13826 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13827 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
13828 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13829 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13830 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
13831 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13832 // CHECK18: cond.true:
13833 // CHECK18-NEXT: br label [[COND_END:%.*]]
13834 // CHECK18: cond.false:
13835 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13836 // CHECK18-NEXT: br label [[COND_END]]
13837 // CHECK18: cond.end:
13838 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
13839 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13840 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13841 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
13842 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13843 // CHECK18: omp.inner.for.cond:
13844 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13845 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13846 // CHECK18-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
13847 // CHECK18-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13848 // CHECK18: omp.inner.for.body:
13849 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13850 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
13851 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13852 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4
13853 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8
13854 // CHECK18-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
13855 // CHECK18-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 8
13856 // CHECK18-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV1]], align 8
13857 // CHECK18-NEXT: [[CONV4:%.*]] = sext i16 [[TMP10]] to i32
13858 // CHECK18-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1
13859 // CHECK18-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
13860 // CHECK18-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 8
13861 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2
13862 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
13863 // CHECK18-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], 1
13864 // CHECK18-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX]], align 4
13865 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13866 // CHECK18: omp.body.continue:
13867 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13868 // CHECK18: omp.inner.for.inc:
13869 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13870 // CHECK18-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP12]], 1
13871 // CHECK18-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
13872 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]]
13873 // CHECK18: omp.inner.for.end:
13874 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13875 // CHECK18: omp.loop.exit:
13876 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
13877 // CHECK18-NEXT: ret void
13878 //
13879 //
13880 // CHECK18-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
13881 // CHECK18-SAME: () #[[ATTR4]] {
13882 // CHECK18-NEXT: entry:
13883 // CHECK18-NEXT: call void @__tgt_register_requires(i64 1)
13884 // CHECK18-NEXT: ret void
13885 //
13886 //
13887 // CHECK19-LABEL: define {{[^@]+}}@_Z3fooi
13888 // CHECK19-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
13889 // CHECK19-NEXT: entry:
13890 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
13891 // CHECK19-NEXT: [[A:%.*]] = alloca i32, align 4
13892 // CHECK19-NEXT: [[AA:%.*]] = alloca i16, align 2
13893 // CHECK19-NEXT: [[B:%.*]] = alloca [10 x float], align 4
13894 // CHECK19-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
13895 // CHECK19-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
13896 // CHECK19-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8
13897 // CHECK19-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4
13898 // CHECK19-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 4
13899 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13900 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13901 // CHECK19-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
13902 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13903 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED3:%.*]] = alloca i32, align 4
13904 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
13905 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
13906 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
13907 // CHECK19-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4
13908 // CHECK19-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
13909 // CHECK19-NEXT: [[AA_CASTED4:%.*]] = alloca i32, align 4
13910 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS6:%.*]] = alloca [1 x i8*], align 4
13911 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS7:%.*]] = alloca [1 x i8*], align 4
13912 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS8:%.*]] = alloca [1 x i8*], align 4
13913 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13914 // CHECK19-NEXT: [[A_CASTED9:%.*]] = alloca i32, align 4
13915 // CHECK19-NEXT: [[AA_CASTED10:%.*]] = alloca i32, align 4
13916 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS12:%.*]] = alloca [2 x i8*], align 4
13917 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS13:%.*]] = alloca [2 x i8*], align 4
13918 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS14:%.*]] = alloca [2 x i8*], align 4
13919 // CHECK19-NEXT: [[_TMP15:%.*]] = alloca i32, align 4
13920 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
13921 // CHECK19-NEXT: [[A_CASTED19:%.*]] = alloca i32, align 4
13922 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED20:%.*]] = alloca i32, align 4
13923 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [10 x i8*], align 4
13924 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS24:%.*]] = alloca [10 x i8*], align 4
13925 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [10 x i8*], align 4
13926 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [10 x i64], align 4
13927 // CHECK19-NEXT: [[_TMP26:%.*]] = alloca i32, align 4
13928 // CHECK19-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
13929 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
13930 // CHECK19-NEXT: store i32 0, i32* [[A]], align 4
13931 // CHECK19-NEXT: store i16 0, i16* [[AA]], align 2
13932 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
13933 // CHECK19-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
13934 // CHECK19-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4
13935 // CHECK19-NEXT: [[VLA:%.*]] = alloca float, i32 [[TMP1]], align 4
13936 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4
13937 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
13938 // CHECK19-NEXT: [[TMP4:%.*]] = mul nuw i32 5, [[TMP3]]
13939 // CHECK19-NEXT: [[VLA1:%.*]] = alloca double, i32 [[TMP4]], align 8
13940 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[__VLA_EXPR1]], align 4
13941 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4
13942 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4
13943 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[A]], align 4
13944 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_2]], align 4
13945 // CHECK19-NEXT: [[TMP7:%.*]] = load i16, i16* [[AA]], align 2
13946 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
13947 // CHECK19-NEXT: store i16 [[TMP7]], i16* [[CONV]], align 2
13948 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[AA_CASTED]], align 4
13949 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13950 // CHECK19-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13951 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13952 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13953 // CHECK19-NEXT: store i32 [[TMP11]], i32* [[DOTCAPTURE_EXPR__CASTED3]], align 4
13954 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED3]], align 4
13955 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13956 // CHECK19-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32*
13957 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[TMP14]], align 4
13958 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13959 // CHECK19-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32*
13960 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[TMP16]], align 4
13961 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
13962 // CHECK19-NEXT: store i8* null, i8** [[TMP17]], align 4
13963 // CHECK19-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
13964 // CHECK19-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32*
13965 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[TMP19]], align 4
13966 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
13967 // CHECK19-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
13968 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[TMP21]], align 4
13969 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
13970 // CHECK19-NEXT: store i8* null, i8** [[TMP22]], align 4
13971 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
13972 // CHECK19-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i32*
13973 // CHECK19-NEXT: store i32 [[TMP12]], i32* [[TMP24]], align 4
13974 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
13975 // CHECK19-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i32*
13976 // CHECK19-NEXT: store i32 [[TMP12]], i32* [[TMP26]], align 4
13977 // CHECK19-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
13978 // CHECK19-NEXT: store i8* null, i8** [[TMP27]], align 4
13979 // CHECK19-NEXT: [[TMP28:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13980 // CHECK19-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13981 // CHECK19-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 0
13982 // CHECK19-NEXT: [[TMP31:%.*]] = load i16, i16* [[AA]], align 2
13983 // CHECK19-NEXT: store i16 [[TMP31]], i16* [[TMP30]], align 4
13984 // CHECK19-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 1
13985 // CHECK19-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13986 // CHECK19-NEXT: store i32 [[TMP33]], i32* [[TMP32]], align 4
13987 // CHECK19-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 2
13988 // CHECK19-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13989 // CHECK19-NEXT: store i32 [[TMP35]], i32* [[TMP34]], align 4
13990 // CHECK19-NEXT: [[TMP36:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 1, i32 72, i32 12, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1)
13991 // CHECK19-NEXT: [[TMP37:%.*]] = bitcast i8* [[TMP36]] to %struct.kmp_task_t_with_privates*
13992 // CHECK19-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP37]], i32 0, i32 0
13993 // CHECK19-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP38]], i32 0, i32 0
13994 // CHECK19-NEXT: [[TMP40:%.*]] = load i8*, i8** [[TMP39]], align 4
13995 // CHECK19-NEXT: [[TMP41:%.*]] = bitcast %struct.anon* [[AGG_CAPTURED]] to i8*
13996 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP40]], i8* align 4 [[TMP41]], i32 12, i1 false)
13997 // CHECK19-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP37]], i32 0, i32 1
13998 // CHECK19-NEXT: [[TMP43:%.*]] = bitcast i8* [[TMP40]] to %struct.anon*
13999 // CHECK19-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 0
14000 // CHECK19-NEXT: [[TMP45:%.*]] = bitcast [3 x i64]* [[TMP44]] to i8*
14001 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP45]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false)
14002 // CHECK19-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 1
14003 // CHECK19-NEXT: [[TMP47:%.*]] = bitcast [3 x i8*]* [[TMP46]] to i8*
14004 // CHECK19-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP28]] to i8*
14005 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP47]], i8* align 4 [[TMP48]], i32 12, i1 false)
14006 // CHECK19-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 2
14007 // CHECK19-NEXT: [[TMP50:%.*]] = bitcast [3 x i8*]* [[TMP49]] to i8*
14008 // CHECK19-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP29]] to i8*
14009 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP50]], i8* align 4 [[TMP51]], i32 12, i1 false)
14010 // CHECK19-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 3
14011 // CHECK19-NEXT: [[TMP53:%.*]] = load i16, i16* [[AA]], align 2
14012 // CHECK19-NEXT: store i16 [[TMP53]], i16* [[TMP52]], align 4
14013 // CHECK19-NEXT: [[TMP54:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i8* [[TMP36]])
14014 // CHECK19-NEXT: [[TMP55:%.*]] = load i32, i32* [[A]], align 4
14015 // CHECK19-NEXT: store i32 [[TMP55]], i32* [[A_CASTED]], align 4
14016 // CHECK19-NEXT: [[TMP56:%.*]] = load i32, i32* [[A_CASTED]], align 4
14017 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107(i32 [[TMP56]]) #[[ATTR3:[0-9]+]]
14018 // CHECK19-NEXT: [[TMP57:%.*]] = load i16, i16* [[AA]], align 2
14019 // CHECK19-NEXT: [[CONV5:%.*]] = bitcast i32* [[AA_CASTED4]] to i16*
14020 // CHECK19-NEXT: store i16 [[TMP57]], i16* [[CONV5]], align 2
14021 // CHECK19-NEXT: [[TMP58:%.*]] = load i32, i32* [[AA_CASTED4]], align 4
14022 // CHECK19-NEXT: [[TMP59:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS6]], i32 0, i32 0
14023 // CHECK19-NEXT: [[TMP60:%.*]] = bitcast i8** [[TMP59]] to i32*
14024 // CHECK19-NEXT: store i32 [[TMP58]], i32* [[TMP60]], align 4
14025 // CHECK19-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS7]], i32 0, i32 0
14026 // CHECK19-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i32*
14027 // CHECK19-NEXT: store i32 [[TMP58]], i32* [[TMP62]], align 4
14028 // CHECK19-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS8]], i32 0, i32 0
14029 // CHECK19-NEXT: store i8* null, i8** [[TMP63]], align 4
14030 // CHECK19-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS6]], i32 0, i32 0
14031 // CHECK19-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS7]], i32 0, i32 0
14032 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
14033 // CHECK19-NEXT: [[TMP66:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113.region_id, i32 1, i8** [[TMP64]], i8** [[TMP65]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
14034 // CHECK19-NEXT: [[TMP67:%.*]] = icmp ne i32 [[TMP66]], 0
14035 // CHECK19-NEXT: br i1 [[TMP67]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
14036 // CHECK19: omp_offload.failed:
14037 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113(i32 [[TMP58]]) #[[ATTR3]]
14038 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]]
14039 // CHECK19: omp_offload.cont:
14040 // CHECK19-NEXT: [[TMP68:%.*]] = load i32, i32* [[A]], align 4
14041 // CHECK19-NEXT: store i32 [[TMP68]], i32* [[A_CASTED9]], align 4
14042 // CHECK19-NEXT: [[TMP69:%.*]] = load i32, i32* [[A_CASTED9]], align 4
14043 // CHECK19-NEXT: [[TMP70:%.*]] = load i16, i16* [[AA]], align 2
14044 // CHECK19-NEXT: [[CONV11:%.*]] = bitcast i32* [[AA_CASTED10]] to i16*
14045 // CHECK19-NEXT: store i16 [[TMP70]], i16* [[CONV11]], align 2
14046 // CHECK19-NEXT: [[TMP71:%.*]] = load i32, i32* [[AA_CASTED10]], align 4
14047 // CHECK19-NEXT: [[TMP72:%.*]] = load i32, i32* [[N_ADDR]], align 4
14048 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP72]], 10
14049 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
14050 // CHECK19: omp_if.then:
14051 // CHECK19-NEXT: [[TMP73:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0
14052 // CHECK19-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i32*
14053 // CHECK19-NEXT: store i32 [[TMP69]], i32* [[TMP74]], align 4
14054 // CHECK19-NEXT: [[TMP75:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0
14055 // CHECK19-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32*
14056 // CHECK19-NEXT: store i32 [[TMP69]], i32* [[TMP76]], align 4
14057 // CHECK19-NEXT: [[TMP77:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i32 0, i32 0
14058 // CHECK19-NEXT: store i8* null, i8** [[TMP77]], align 4
14059 // CHECK19-NEXT: [[TMP78:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 1
14060 // CHECK19-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32*
14061 // CHECK19-NEXT: store i32 [[TMP71]], i32* [[TMP79]], align 4
14062 // CHECK19-NEXT: [[TMP80:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 1
14063 // CHECK19-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32*
14064 // CHECK19-NEXT: store i32 [[TMP71]], i32* [[TMP81]], align 4
14065 // CHECK19-NEXT: [[TMP82:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i32 0, i32 1
14066 // CHECK19-NEXT: store i8* null, i8** [[TMP82]], align 4
14067 // CHECK19-NEXT: [[TMP83:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0
14068 // CHECK19-NEXT: [[TMP84:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0
14069 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
14070 // CHECK19-NEXT: [[TMP85:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120.region_id, i32 2, i8** [[TMP83]], i8** [[TMP84]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
14071 // CHECK19-NEXT: [[TMP86:%.*]] = icmp ne i32 [[TMP85]], 0
14072 // CHECK19-NEXT: br i1 [[TMP86]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
14073 // CHECK19: omp_offload.failed16:
14074 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i32 [[TMP69]], i32 [[TMP71]]) #[[ATTR3]]
14075 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT17]]
14076 // CHECK19: omp_offload.cont17:
14077 // CHECK19-NEXT: br label [[OMP_IF_END:%.*]]
14078 // CHECK19: omp_if.else:
14079 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i32 [[TMP69]], i32 [[TMP71]]) #[[ATTR3]]
14080 // CHECK19-NEXT: br label [[OMP_IF_END]]
14081 // CHECK19: omp_if.end:
14082 // CHECK19-NEXT: [[TMP87:%.*]] = load i32, i32* [[N_ADDR]], align 4
14083 // CHECK19-NEXT: store i32 [[TMP87]], i32* [[DOTCAPTURE_EXPR_18]], align 4
14084 // CHECK19-NEXT: [[TMP88:%.*]] = load i32, i32* [[A]], align 4
14085 // CHECK19-NEXT: store i32 [[TMP88]], i32* [[A_CASTED19]], align 4
14086 // CHECK19-NEXT: [[TMP89:%.*]] = load i32, i32* [[A_CASTED19]], align 4
14087 // CHECK19-NEXT: [[TMP90:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4
14088 // CHECK19-NEXT: store i32 [[TMP90]], i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4
14089 // CHECK19-NEXT: [[TMP91:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4
14090 // CHECK19-NEXT: [[TMP92:%.*]] = load i32, i32* [[N_ADDR]], align 4
14091 // CHECK19-NEXT: [[CMP21:%.*]] = icmp sgt i32 [[TMP92]], 20
14092 // CHECK19-NEXT: br i1 [[CMP21]], label [[OMP_IF_THEN22:%.*]], label [[OMP_IF_ELSE29:%.*]]
14093 // CHECK19: omp_if.then22:
14094 // CHECK19-NEXT: [[TMP93:%.*]] = mul nuw i32 [[TMP1]], 4
14095 // CHECK19-NEXT: [[TMP94:%.*]] = sext i32 [[TMP93]] to i64
14096 // CHECK19-NEXT: [[TMP95:%.*]] = mul nuw i32 5, [[TMP3]]
14097 // CHECK19-NEXT: [[TMP96:%.*]] = mul nuw i32 [[TMP95]], 8
14098 // CHECK19-NEXT: [[TMP97:%.*]] = sext i32 [[TMP96]] to i64
14099 // CHECK19-NEXT: [[TMP98:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
14100 // CHECK19-NEXT: [[TMP99:%.*]] = bitcast i8** [[TMP98]] to i32*
14101 // CHECK19-NEXT: store i32 [[TMP89]], i32* [[TMP99]], align 4
14102 // CHECK19-NEXT: [[TMP100:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
14103 // CHECK19-NEXT: [[TMP101:%.*]] = bitcast i8** [[TMP100]] to i32*
14104 // CHECK19-NEXT: store i32 [[TMP89]], i32* [[TMP101]], align 4
14105 // CHECK19-NEXT: [[TMP102:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
14106 // CHECK19-NEXT: store i64 4, i64* [[TMP102]], align 4
14107 // CHECK19-NEXT: [[TMP103:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 0
14108 // CHECK19-NEXT: store i8* null, i8** [[TMP103]], align 4
14109 // CHECK19-NEXT: [[TMP104:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 1
14110 // CHECK19-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to [10 x float]**
14111 // CHECK19-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP105]], align 4
14112 // CHECK19-NEXT: [[TMP106:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 1
14113 // CHECK19-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to [10 x float]**
14114 // CHECK19-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP107]], align 4
14115 // CHECK19-NEXT: [[TMP108:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
14116 // CHECK19-NEXT: store i64 40, i64* [[TMP108]], align 4
14117 // CHECK19-NEXT: [[TMP109:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 1
14118 // CHECK19-NEXT: store i8* null, i8** [[TMP109]], align 4
14119 // CHECK19-NEXT: [[TMP110:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 2
14120 // CHECK19-NEXT: [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i32*
14121 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP111]], align 4
14122 // CHECK19-NEXT: [[TMP112:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 2
14123 // CHECK19-NEXT: [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i32*
14124 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP113]], align 4
14125 // CHECK19-NEXT: [[TMP114:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
14126 // CHECK19-NEXT: store i64 4, i64* [[TMP114]], align 4
14127 // CHECK19-NEXT: [[TMP115:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 2
14128 // CHECK19-NEXT: store i8* null, i8** [[TMP115]], align 4
14129 // CHECK19-NEXT: [[TMP116:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 3
14130 // CHECK19-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to float**
14131 // CHECK19-NEXT: store float* [[VLA]], float** [[TMP117]], align 4
14132 // CHECK19-NEXT: [[TMP118:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 3
14133 // CHECK19-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to float**
14134 // CHECK19-NEXT: store float* [[VLA]], float** [[TMP119]], align 4
14135 // CHECK19-NEXT: [[TMP120:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
14136 // CHECK19-NEXT: store i64 [[TMP94]], i64* [[TMP120]], align 4
14137 // CHECK19-NEXT: [[TMP121:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 3
14138 // CHECK19-NEXT: store i8* null, i8** [[TMP121]], align 4
14139 // CHECK19-NEXT: [[TMP122:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 4
14140 // CHECK19-NEXT: [[TMP123:%.*]] = bitcast i8** [[TMP122]] to [5 x [10 x double]]**
14141 // CHECK19-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP123]], align 4
14142 // CHECK19-NEXT: [[TMP124:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 4
14143 // CHECK19-NEXT: [[TMP125:%.*]] = bitcast i8** [[TMP124]] to [5 x [10 x double]]**
14144 // CHECK19-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP125]], align 4
14145 // CHECK19-NEXT: [[TMP126:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
14146 // CHECK19-NEXT: store i64 400, i64* [[TMP126]], align 4
14147 // CHECK19-NEXT: [[TMP127:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 4
14148 // CHECK19-NEXT: store i8* null, i8** [[TMP127]], align 4
14149 // CHECK19-NEXT: [[TMP128:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 5
14150 // CHECK19-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to i32*
14151 // CHECK19-NEXT: store i32 5, i32* [[TMP129]], align 4
14152 // CHECK19-NEXT: [[TMP130:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 5
14153 // CHECK19-NEXT: [[TMP131:%.*]] = bitcast i8** [[TMP130]] to i32*
14154 // CHECK19-NEXT: store i32 5, i32* [[TMP131]], align 4
14155 // CHECK19-NEXT: [[TMP132:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 5
14156 // CHECK19-NEXT: store i64 4, i64* [[TMP132]], align 4
14157 // CHECK19-NEXT: [[TMP133:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 5
14158 // CHECK19-NEXT: store i8* null, i8** [[TMP133]], align 4
14159 // CHECK19-NEXT: [[TMP134:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 6
14160 // CHECK19-NEXT: [[TMP135:%.*]] = bitcast i8** [[TMP134]] to i32*
14161 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP135]], align 4
14162 // CHECK19-NEXT: [[TMP136:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 6
14163 // CHECK19-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i32*
14164 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP137]], align 4
14165 // CHECK19-NEXT: [[TMP138:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 6
14166 // CHECK19-NEXT: store i64 4, i64* [[TMP138]], align 4
14167 // CHECK19-NEXT: [[TMP139:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 6
14168 // CHECK19-NEXT: store i8* null, i8** [[TMP139]], align 4
14169 // CHECK19-NEXT: [[TMP140:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 7
14170 // CHECK19-NEXT: [[TMP141:%.*]] = bitcast i8** [[TMP140]] to double**
14171 // CHECK19-NEXT: store double* [[VLA1]], double** [[TMP141]], align 4
14172 // CHECK19-NEXT: [[TMP142:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 7
14173 // CHECK19-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to double**
14174 // CHECK19-NEXT: store double* [[VLA1]], double** [[TMP143]], align 4
14175 // CHECK19-NEXT: [[TMP144:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7
14176 // CHECK19-NEXT: store i64 [[TMP97]], i64* [[TMP144]], align 4
14177 // CHECK19-NEXT: [[TMP145:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 7
14178 // CHECK19-NEXT: store i8* null, i8** [[TMP145]], align 4
14179 // CHECK19-NEXT: [[TMP146:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 8
14180 // CHECK19-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to %struct.TT**
14181 // CHECK19-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP147]], align 4
14182 // CHECK19-NEXT: [[TMP148:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 8
14183 // CHECK19-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to %struct.TT**
14184 // CHECK19-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP149]], align 4
14185 // CHECK19-NEXT: [[TMP150:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 8
14186 // CHECK19-NEXT: store i64 12, i64* [[TMP150]], align 4
14187 // CHECK19-NEXT: [[TMP151:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 8
14188 // CHECK19-NEXT: store i8* null, i8** [[TMP151]], align 4
14189 // CHECK19-NEXT: [[TMP152:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 9
14190 // CHECK19-NEXT: [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32*
14191 // CHECK19-NEXT: store i32 [[TMP91]], i32* [[TMP153]], align 4
14192 // CHECK19-NEXT: [[TMP154:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 9
14193 // CHECK19-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32*
14194 // CHECK19-NEXT: store i32 [[TMP91]], i32* [[TMP155]], align 4
14195 // CHECK19-NEXT: [[TMP156:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 9
14196 // CHECK19-NEXT: store i64 4, i64* [[TMP156]], align 4
14197 // CHECK19-NEXT: [[TMP157:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 9
14198 // CHECK19-NEXT: store i8* null, i8** [[TMP157]], align 4
14199 // CHECK19-NEXT: [[TMP158:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
14200 // CHECK19-NEXT: [[TMP159:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
14201 // CHECK19-NEXT: [[TMP160:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
14202 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
14203 // CHECK19-NEXT: [[TMP161:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145.region_id, i32 10, i8** [[TMP158]], i8** [[TMP159]], i64* [[TMP160]], i64* getelementptr inbounds ([10 x i64], [10 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
14204 // CHECK19-NEXT: [[TMP162:%.*]] = icmp ne i32 [[TMP161]], 0
14205 // CHECK19-NEXT: br i1 [[TMP162]], label [[OMP_OFFLOAD_FAILED27:%.*]], label [[OMP_OFFLOAD_CONT28:%.*]]
14206 // CHECK19: omp_offload.failed27:
14207 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i32 [[TMP89]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]], i32 [[TMP91]]) #[[ATTR3]]
14208 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT28]]
14209 // CHECK19: omp_offload.cont28:
14210 // CHECK19-NEXT: br label [[OMP_IF_END30:%.*]]
14211 // CHECK19: omp_if.else29:
14212 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i32 [[TMP89]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]], i32 [[TMP91]]) #[[ATTR3]]
14213 // CHECK19-NEXT: br label [[OMP_IF_END30]]
14214 // CHECK19: omp_if.end30:
14215 // CHECK19-NEXT: [[TMP163:%.*]] = load i32, i32* [[A]], align 4
14216 // CHECK19-NEXT: [[TMP164:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
14217 // CHECK19-NEXT: call void @llvm.stackrestore(i8* [[TMP164]])
14218 // CHECK19-NEXT: ret i32 [[TMP163]]
14219 //
14220 //
14221 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103
14222 // CHECK19-SAME: (i32 [[AA:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]], i32 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR2:[0-9]+]] {
14223 // CHECK19-NEXT: entry:
14224 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
14225 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14226 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4
14227 // CHECK19-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
14228 // CHECK19-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
14229 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
14230 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14231 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
14232 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
14233 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14234 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
14235 // CHECK19-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]])
14236 // CHECK19-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4
14237 // CHECK19-NEXT: [[CONV3:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
14238 // CHECK19-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2
14239 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4
14240 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP4]])
14241 // CHECK19-NEXT: ret void
14242 //
14243 //
14244 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined.
14245 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[AA:%.*]]) #[[ATTR2]] {
14246 // CHECK19-NEXT: entry:
14247 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14248 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14249 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
14250 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14251 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14252 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14253 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14254 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14255 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14256 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14257 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14258 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14259 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
14260 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
14261 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14262 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
14263 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14264 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14265 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14266 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
14267 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14268 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14269 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
14270 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14271 // CHECK19: cond.true:
14272 // CHECK19-NEXT: br label [[COND_END:%.*]]
14273 // CHECK19: cond.false:
14274 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14275 // CHECK19-NEXT: br label [[COND_END]]
14276 // CHECK19: cond.end:
14277 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
14278 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14279 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14280 // CHECK19-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
14281 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14282 // CHECK19: omp.inner.for.cond:
14283 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14284 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14285 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
14286 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14287 // CHECK19: omp.inner.for.body:
14288 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14289 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
14290 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14291 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4
14292 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14293 // CHECK19: omp.body.continue:
14294 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14295 // CHECK19: omp.inner.for.inc:
14296 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14297 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
14298 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
14299 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
14300 // CHECK19: omp.inner.for.end:
14301 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14302 // CHECK19: omp.loop.exit:
14303 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
14304 // CHECK19-NEXT: ret void
14305 //
14306 //
14307 // CHECK19-LABEL: define {{[^@]+}}@.omp_task_privates_map.
14308 // CHECK19-SAME: (%struct..kmp_privates.t* noalias [[TMP0:%.*]], i16** noalias [[TMP1:%.*]], [3 x i8*]** noalias [[TMP2:%.*]], [3 x i8*]** noalias [[TMP3:%.*]], [3 x i64]** noalias [[TMP4:%.*]]) #[[ATTR4:[0-9]+]] {
14309 // CHECK19-NEXT: entry:
14310 // CHECK19-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 4
14311 // CHECK19-NEXT: [[DOTADDR1:%.*]] = alloca i16**, align 4
14312 // CHECK19-NEXT: [[DOTADDR2:%.*]] = alloca [3 x i8*]**, align 4
14313 // CHECK19-NEXT: [[DOTADDR3:%.*]] = alloca [3 x i8*]**, align 4
14314 // CHECK19-NEXT: [[DOTADDR4:%.*]] = alloca [3 x i64]**, align 4
14315 // CHECK19-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 4
14316 // CHECK19-NEXT: store i16** [[TMP1]], i16*** [[DOTADDR1]], align 4
14317 // CHECK19-NEXT: store [3 x i8*]** [[TMP2]], [3 x i8*]*** [[DOTADDR2]], align 4
14318 // CHECK19-NEXT: store [3 x i8*]** [[TMP3]], [3 x i8*]*** [[DOTADDR3]], align 4
14319 // CHECK19-NEXT: store [3 x i64]** [[TMP4]], [3 x i64]*** [[DOTADDR4]], align 4
14320 // CHECK19-NEXT: [[TMP5:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 4
14321 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 0
14322 // CHECK19-NEXT: [[TMP7:%.*]] = load [3 x i64]**, [3 x i64]*** [[DOTADDR4]], align 4
14323 // CHECK19-NEXT: store [3 x i64]* [[TMP6]], [3 x i64]** [[TMP7]], align 4
14324 // CHECK19-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 1
14325 // CHECK19-NEXT: [[TMP9:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR2]], align 4
14326 // CHECK19-NEXT: store [3 x i8*]* [[TMP8]], [3 x i8*]** [[TMP9]], align 4
14327 // CHECK19-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 2
14328 // CHECK19-NEXT: [[TMP11:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR3]], align 4
14329 // CHECK19-NEXT: store [3 x i8*]* [[TMP10]], [3 x i8*]** [[TMP11]], align 4
14330 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 3
14331 // CHECK19-NEXT: [[TMP13:%.*]] = load i16**, i16*** [[DOTADDR1]], align 4
14332 // CHECK19-NEXT: store i16* [[TMP12]], i16** [[TMP13]], align 4
14333 // CHECK19-NEXT: ret void
14334 //
14335 //
14336 // CHECK19-LABEL: define {{[^@]+}}@.omp_task_entry.
14337 // CHECK19-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
14338 // CHECK19-NEXT: entry:
14339 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4
14340 // CHECK19-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 4
14341 // CHECK19-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 4
14342 // CHECK19-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 4
14343 // CHECK19-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 4
14344 // CHECK19-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon*, align 4
14345 // CHECK19-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca i16*, align 4
14346 // CHECK19-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca [3 x i8*]*, align 4
14347 // CHECK19-NEXT: [[DOTFIRSTPRIV_PTR_ADDR2_I:%.*]] = alloca [3 x i8*]*, align 4
14348 // CHECK19-NEXT: [[DOTFIRSTPRIV_PTR_ADDR3_I:%.*]] = alloca [3 x i64]*, align 4
14349 // CHECK19-NEXT: [[AA_CASTED_I:%.*]] = alloca i32, align 4
14350 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED_I:%.*]] = alloca i32, align 4
14351 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED4_I:%.*]] = alloca i32, align 4
14352 // CHECK19-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4
14353 // CHECK19-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 4
14354 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4
14355 // CHECK19-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4
14356 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4
14357 // CHECK19-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4
14358 // CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0
14359 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2
14360 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0
14361 // CHECK19-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
14362 // CHECK19-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon*
14363 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 1
14364 // CHECK19-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8*
14365 // CHECK19-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8*
14366 // CHECK19-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]])
14367 // CHECK19-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META16:![0-9]+]])
14368 // CHECK19-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]])
14369 // CHECK19-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]])
14370 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !22
14371 // CHECK19-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 4, !noalias !22
14372 // CHECK19-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 4, !noalias !22
14373 // CHECK19-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 4, !noalias !22
14374 // CHECK19-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 4, !noalias !22
14375 // CHECK19-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 4, !noalias !22
14376 // CHECK19-NEXT: [[TMP12:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 4, !noalias !22
14377 // CHECK19-NEXT: [[TMP13:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 4, !noalias !22
14378 // CHECK19-NEXT: [[TMP14:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 4, !noalias !22
14379 // CHECK19-NEXT: [[TMP15:%.*]] = bitcast void (i8*, ...)* [[TMP13]] to void (i8*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)*
14380 // CHECK19-NEXT: call void [[TMP15]](i8* [[TMP14]], i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]]) #[[ATTR3]]
14381 // CHECK19-NEXT: [[TMP16:%.*]] = load i16*, i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 4, !noalias !22
14382 // CHECK19-NEXT: [[TMP17:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 4, !noalias !22
14383 // CHECK19-NEXT: [[TMP18:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 4, !noalias !22
14384 // CHECK19-NEXT: [[TMP19:%.*]] = load [3 x i64]*, [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 4, !noalias !22
14385 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP17]], i32 0, i32 0
14386 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP18]], i32 0, i32 0
14387 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[TMP19]], i32 0, i32 0
14388 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP12]], i32 0, i32 1
14389 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2
14390 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP23]], align 4
14391 // CHECK19-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP24]], align 4
14392 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) #[[ATTR3]]
14393 // CHECK19-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP25]], i32 [[TMP26]], i32 0, i8* null, i32 0, i8* null) #[[ATTR3]]
14394 // CHECK19-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
14395 // CHECK19-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]]
14396 // CHECK19: omp_offload.failed.i:
14397 // CHECK19-NEXT: [[TMP29:%.*]] = load i16, i16* [[TMP16]], align 2
14398 // CHECK19-NEXT: [[CONV_I:%.*]] = bitcast i32* [[AA_CASTED_I]] to i16*
14399 // CHECK19-NEXT: store i16 [[TMP29]], i16* [[CONV_I]], align 2, !noalias !22
14400 // CHECK19-NEXT: [[TMP30:%.*]] = load i32, i32* [[AA_CASTED_I]], align 4, !noalias !22
14401 // CHECK19-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP23]], align 4
14402 // CHECK19-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR__CASTED_I]], align 4, !noalias !22
14403 // CHECK19-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED_I]], align 4, !noalias !22
14404 // CHECK19-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP24]], align 4
14405 // CHECK19-NEXT: store i32 [[TMP33]], i32* [[DOTCAPTURE_EXPR__CASTED4_I]], align 4, !noalias !22
14406 // CHECK19-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED4_I]], align 4, !noalias !22
14407 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103(i32 [[TMP30]], i32 [[TMP32]], i32 [[TMP34]]) #[[ATTR3]]
14408 // CHECK19-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]]
14409 // CHECK19: .omp_outlined..1.exit:
14410 // CHECK19-NEXT: ret i32 0
14411 //
14412 //
14413 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107
14414 // CHECK19-SAME: (i32 [[A:%.*]]) #[[ATTR2]] {
14415 // CHECK19-NEXT: entry:
14416 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
14417 // CHECK19-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
14418 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
14419 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
14420 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4
14421 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
14422 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP1]])
14423 // CHECK19-NEXT: ret void
14424 //
14425 //
14426 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..2
14427 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]]) #[[ATTR2]] {
14428 // CHECK19-NEXT: entry:
14429 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14430 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14431 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
14432 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14433 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14434 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14435 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14436 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14437 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14438 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14439 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14440 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14441 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
14442 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14443 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
14444 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14445 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14446 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14447 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
14448 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14449 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14450 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
14451 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14452 // CHECK19: cond.true:
14453 // CHECK19-NEXT: br label [[COND_END:%.*]]
14454 // CHECK19: cond.false:
14455 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14456 // CHECK19-NEXT: br label [[COND_END]]
14457 // CHECK19: cond.end:
14458 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
14459 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14460 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14461 // CHECK19-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
14462 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14463 // CHECK19: omp.inner.for.cond:
14464 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14465 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14466 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
14467 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14468 // CHECK19: omp.inner.for.body:
14469 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14470 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
14471 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14472 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4
14473 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4
14474 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
14475 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4
14476 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14477 // CHECK19: omp.body.continue:
14478 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14479 // CHECK19: omp.inner.for.inc:
14480 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14481 // CHECK19-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
14482 // CHECK19-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
14483 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
14484 // CHECK19: omp.inner.for.end:
14485 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14486 // CHECK19: omp.loop.exit:
14487 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
14488 // CHECK19-NEXT: ret void
14489 //
14490 //
14491 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113
14492 // CHECK19-SAME: (i32 [[AA:%.*]]) #[[ATTR2]] {
14493 // CHECK19-NEXT: entry:
14494 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
14495 // CHECK19-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
14496 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
14497 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
14498 // CHECK19-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
14499 // CHECK19-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
14500 // CHECK19-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2
14501 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[AA_CASTED]], align 4
14502 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP1]])
14503 // CHECK19-NEXT: ret void
14504 //
14505 //
14506 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..3
14507 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[AA:%.*]]) #[[ATTR2]] {
14508 // CHECK19-NEXT: entry:
14509 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14510 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14511 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
14512 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14513 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14514 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14515 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14516 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14517 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14518 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14519 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14520 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14521 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
14522 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
14523 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14524 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
14525 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14526 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14527 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14528 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
14529 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14530 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14531 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
14532 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14533 // CHECK19: cond.true:
14534 // CHECK19-NEXT: br label [[COND_END:%.*]]
14535 // CHECK19: cond.false:
14536 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14537 // CHECK19-NEXT: br label [[COND_END]]
14538 // CHECK19: cond.end:
14539 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
14540 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14541 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14542 // CHECK19-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
14543 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14544 // CHECK19: omp.inner.for.cond:
14545 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14546 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14547 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
14548 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14549 // CHECK19: omp.inner.for.body:
14550 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14551 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
14552 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14553 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4
14554 // CHECK19-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 4
14555 // CHECK19-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32
14556 // CHECK19-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1
14557 // CHECK19-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16
14558 // CHECK19-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 4
14559 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14560 // CHECK19: omp.body.continue:
14561 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14562 // CHECK19: omp.inner.for.inc:
14563 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14564 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1
14565 // CHECK19-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
14566 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
14567 // CHECK19: omp.inner.for.end:
14568 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14569 // CHECK19: omp.loop.exit:
14570 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
14571 // CHECK19-NEXT: ret void
14572 //
14573 //
14574 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120
14575 // CHECK19-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR2]] {
14576 // CHECK19-NEXT: entry:
14577 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
14578 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
14579 // CHECK19-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
14580 // CHECK19-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
14581 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
14582 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
14583 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
14584 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
14585 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4
14586 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
14587 // CHECK19-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV]], align 4
14588 // CHECK19-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
14589 // CHECK19-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2
14590 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4
14591 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]])
14592 // CHECK19-NEXT: ret void
14593 //
14594 //
14595 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..6
14596 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR2]] {
14597 // CHECK19-NEXT: entry:
14598 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14599 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14600 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
14601 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
14602 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14603 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14604 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14605 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14606 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14607 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14608 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14609 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14610 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14611 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
14612 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
14613 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
14614 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14615 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
14616 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14617 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14618 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14619 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
14620 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14621 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14622 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
14623 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14624 // CHECK19: cond.true:
14625 // CHECK19-NEXT: br label [[COND_END:%.*]]
14626 // CHECK19: cond.false:
14627 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14628 // CHECK19-NEXT: br label [[COND_END]]
14629 // CHECK19: cond.end:
14630 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
14631 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14632 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14633 // CHECK19-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
14634 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14635 // CHECK19: omp.inner.for.cond:
14636 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14637 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14638 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
14639 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14640 // CHECK19: omp.inner.for.body:
14641 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14642 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
14643 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14644 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4
14645 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4
14646 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
14647 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4
14648 // CHECK19-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV]], align 4
14649 // CHECK19-NEXT: [[CONV3:%.*]] = sext i16 [[TMP9]] to i32
14650 // CHECK19-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1
14651 // CHECK19-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16
14652 // CHECK19-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 4
14653 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14654 // CHECK19: omp.body.continue:
14655 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14656 // CHECK19: omp.inner.for.inc:
14657 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14658 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1
14659 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
14660 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
14661 // CHECK19: omp.inner.for.end:
14662 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14663 // CHECK19: omp.loop.exit:
14664 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
14665 // CHECK19-NEXT: ret void
14666 //
14667 //
14668 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145
14669 // CHECK19-SAME: (i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14670 // CHECK19-NEXT: entry:
14671 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
14672 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4
14673 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
14674 // CHECK19-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4
14675 // CHECK19-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4
14676 // CHECK19-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
14677 // CHECK19-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4
14678 // CHECK19-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4
14679 // CHECK19-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4
14680 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14681 // CHECK19-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
14682 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14683 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
14684 // CHECK19-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4
14685 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
14686 // CHECK19-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4
14687 // CHECK19-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4
14688 // CHECK19-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
14689 // CHECK19-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4
14690 // CHECK19-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4
14691 // CHECK19-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4
14692 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14693 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4
14694 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
14695 // CHECK19-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4
14696 // CHECK19-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4
14697 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
14698 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4
14699 // CHECK19-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4
14700 // CHECK19-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4
14701 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4
14702 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[A_CASTED]], align 4
14703 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_CASTED]], align 4
14704 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14705 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14706 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14707 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [10 x float]*, i32, float*, [5 x [10 x double]]*, i32, i32, double*, %struct.TT*, i32)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP9]], [10 x float]* [[TMP0]], i32 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i32 [[TMP4]], i32 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i32 [[TMP11]])
14708 // CHECK19-NEXT: ret void
14709 //
14710 //
14711 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..9
14712 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14713 // CHECK19-NEXT: entry:
14714 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14715 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14716 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
14717 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4
14718 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
14719 // CHECK19-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4
14720 // CHECK19-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4
14721 // CHECK19-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
14722 // CHECK19-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4
14723 // CHECK19-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4
14724 // CHECK19-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4
14725 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14726 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14727 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14728 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14729 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14730 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14731 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14732 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14733 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14734 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14735 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
14736 // CHECK19-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4
14737 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
14738 // CHECK19-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4
14739 // CHECK19-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4
14740 // CHECK19-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
14741 // CHECK19-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4
14742 // CHECK19-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4
14743 // CHECK19-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4
14744 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14745 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4
14746 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
14747 // CHECK19-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4
14748 // CHECK19-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4
14749 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
14750 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4
14751 // CHECK19-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4
14752 // CHECK19-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4
14753 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14754 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
14755 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14756 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14757 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14758 // CHECK19-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14759 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
14760 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]])
14761 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
14762 // CHECK19: omp.dispatch.cond:
14763 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14764 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9
14765 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14766 // CHECK19: cond.true:
14767 // CHECK19-NEXT: br label [[COND_END:%.*]]
14768 // CHECK19: cond.false:
14769 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14770 // CHECK19-NEXT: br label [[COND_END]]
14771 // CHECK19: cond.end:
14772 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
14773 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14774 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14775 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
14776 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14777 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14778 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
14779 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14780 // CHECK19: omp.dispatch.body:
14781 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14782 // CHECK19: omp.inner.for.cond:
14783 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
14784 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !23
14785 // CHECK19-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
14786 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14787 // CHECK19: omp.inner.for.body:
14788 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
14789 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
14790 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14791 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !23
14792 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group !23
14793 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
14794 // CHECK19-NEXT: store i32 [[ADD7]], i32* [[A_ADDR]], align 4, !llvm.access.group !23
14795 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i32 0, i32 2
14796 // CHECK19-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !23
14797 // CHECK19-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double
14798 // CHECK19-NEXT: [[ADD8:%.*]] = fadd double [[CONV]], 1.000000e+00
14799 // CHECK19-NEXT: [[CONV9:%.*]] = fptrunc double [[ADD8]] to float
14800 // CHECK19-NEXT: store float [[CONV9]], float* [[ARRAYIDX]], align 4, !llvm.access.group !23
14801 // CHECK19-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, float* [[TMP2]], i32 3
14802 // CHECK19-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX10]], align 4, !llvm.access.group !23
14803 // CHECK19-NEXT: [[CONV11:%.*]] = fpext float [[TMP21]] to double
14804 // CHECK19-NEXT: [[ADD12:%.*]] = fadd double [[CONV11]], 1.000000e+00
14805 // CHECK19-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float
14806 // CHECK19-NEXT: store float [[CONV13]], float* [[ARRAYIDX10]], align 4, !llvm.access.group !23
14807 // CHECK19-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i32 0, i32 1
14808 // CHECK19-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX14]], i32 0, i32 2
14809 // CHECK19-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX15]], align 8, !llvm.access.group !23
14810 // CHECK19-NEXT: [[ADD16:%.*]] = fadd double [[TMP22]], 1.000000e+00
14811 // CHECK19-NEXT: store double [[ADD16]], double* [[ARRAYIDX15]], align 8, !llvm.access.group !23
14812 // CHECK19-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP5]]
14813 // CHECK19-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP6]], i32 [[TMP23]]
14814 // CHECK19-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX17]], i32 3
14815 // CHECK19-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX18]], align 8, !llvm.access.group !23
14816 // CHECK19-NEXT: [[ADD19:%.*]] = fadd double [[TMP24]], 1.000000e+00
14817 // CHECK19-NEXT: store double [[ADD19]], double* [[ARRAYIDX18]], align 8, !llvm.access.group !23
14818 // CHECK19-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0
14819 // CHECK19-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4, !llvm.access.group !23
14820 // CHECK19-NEXT: [[ADD20:%.*]] = add nsw i64 [[TMP25]], 1
14821 // CHECK19-NEXT: store i64 [[ADD20]], i64* [[X]], align 4, !llvm.access.group !23
14822 // CHECK19-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1
14823 // CHECK19-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4, !llvm.access.group !23
14824 // CHECK19-NEXT: [[CONV21:%.*]] = sext i8 [[TMP26]] to i32
14825 // CHECK19-NEXT: [[ADD22:%.*]] = add nsw i32 [[CONV21]], 1
14826 // CHECK19-NEXT: [[CONV23:%.*]] = trunc i32 [[ADD22]] to i8
14827 // CHECK19-NEXT: store i8 [[CONV23]], i8* [[Y]], align 4, !llvm.access.group !23
14828 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14829 // CHECK19: omp.body.continue:
14830 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14831 // CHECK19: omp.inner.for.inc:
14832 // CHECK19-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
14833 // CHECK19-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP27]], 1
14834 // CHECK19-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
14835 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
14836 // CHECK19: omp.inner.for.end:
14837 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
14838 // CHECK19: omp.dispatch.inc:
14839 // CHECK19-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14840 // CHECK19-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14841 // CHECK19-NEXT: [[ADD25:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
14842 // CHECK19-NEXT: store i32 [[ADD25]], i32* [[DOTOMP_LB]], align 4
14843 // CHECK19-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14844 // CHECK19-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14845 // CHECK19-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
14846 // CHECK19-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_UB]], align 4
14847 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
14848 // CHECK19: omp.dispatch.end:
14849 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]])
14850 // CHECK19-NEXT: ret void
14851 //
14852 //
14853 // CHECK19-LABEL: define {{[^@]+}}@_Z3bari
14854 // CHECK19-SAME: (i32 [[N:%.*]]) #[[ATTR0]] {
14855 // CHECK19-NEXT: entry:
14856 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
14857 // CHECK19-NEXT: [[A:%.*]] = alloca i32, align 4
14858 // CHECK19-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4
14859 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
14860 // CHECK19-NEXT: store i32 0, i32* [[A]], align 4
14861 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
14862 // CHECK19-NEXT: [[CALL:%.*]] = call i32 @_Z3fooi(i32 [[TMP0]])
14863 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
14864 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
14865 // CHECK19-NEXT: store i32 [[ADD]], i32* [[A]], align 4
14866 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
14867 // CHECK19-NEXT: [[CALL1:%.*]] = call i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 4 dereferenceable(8) [[S]], i32 [[TMP2]])
14868 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4
14869 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
14870 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[A]], align 4
14871 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
14872 // CHECK19-NEXT: [[CALL3:%.*]] = call i32 @_ZL7fstatici(i32 [[TMP4]])
14873 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4
14874 // CHECK19-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
14875 // CHECK19-NEXT: store i32 [[ADD4]], i32* [[A]], align 4
14876 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
14877 // CHECK19-NEXT: [[CALL5:%.*]] = call i32 @_Z9ftemplateIiET_i(i32 [[TMP6]])
14878 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4
14879 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]]
14880 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[A]], align 4
14881 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4
14882 // CHECK19-NEXT: ret i32 [[TMP8]]
14883 //
14884 //
14885 // CHECK19-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
14886 // CHECK19-SAME: (%struct.S1* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[N:%.*]]) #[[ATTR0]] comdat align 2 {
14887 // CHECK19-NEXT: entry:
14888 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
14889 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
14890 // CHECK19-NEXT: [[B:%.*]] = alloca i32, align 4
14891 // CHECK19-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
14892 // CHECK19-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
14893 // CHECK19-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4
14894 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
14895 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
14896 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
14897 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4
14898 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14899 // CHECK19-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
14900 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
14901 // CHECK19-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
14902 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
14903 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
14904 // CHECK19-NEXT: store i32 [[ADD]], i32* [[B]], align 4
14905 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
14906 // CHECK19-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
14907 // CHECK19-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4
14908 // CHECK19-NEXT: [[TMP3:%.*]] = mul nuw i32 2, [[TMP1]]
14909 // CHECK19-NEXT: [[VLA:%.*]] = alloca i16, i32 [[TMP3]], align 2
14910 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4
14911 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[B]], align 4
14912 // CHECK19-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4
14913 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4
14914 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
14915 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 60
14916 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
14917 // CHECK19: omp_if.then:
14918 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
14919 // CHECK19-NEXT: [[TMP7:%.*]] = mul nuw i32 2, [[TMP1]]
14920 // CHECK19-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP7]], 2
14921 // CHECK19-NEXT: [[TMP9:%.*]] = sext i32 [[TMP8]] to i64
14922 // CHECK19-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
14923 // CHECK19-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to %struct.S1**
14924 // CHECK19-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP11]], align 4
14925 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
14926 // CHECK19-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to double**
14927 // CHECK19-NEXT: store double* [[A]], double** [[TMP13]], align 4
14928 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
14929 // CHECK19-NEXT: store i64 8, i64* [[TMP14]], align 4
14930 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
14931 // CHECK19-NEXT: store i8* null, i8** [[TMP15]], align 4
14932 // CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
14933 // CHECK19-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
14934 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[TMP17]], align 4
14935 // CHECK19-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
14936 // CHECK19-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32*
14937 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[TMP19]], align 4
14938 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
14939 // CHECK19-NEXT: store i64 4, i64* [[TMP20]], align 4
14940 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
14941 // CHECK19-NEXT: store i8* null, i8** [[TMP21]], align 4
14942 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
14943 // CHECK19-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
14944 // CHECK19-NEXT: store i32 2, i32* [[TMP23]], align 4
14945 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
14946 // CHECK19-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32*
14947 // CHECK19-NEXT: store i32 2, i32* [[TMP25]], align 4
14948 // CHECK19-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
14949 // CHECK19-NEXT: store i64 4, i64* [[TMP26]], align 4
14950 // CHECK19-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
14951 // CHECK19-NEXT: store i8* null, i8** [[TMP27]], align 4
14952 // CHECK19-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
14953 // CHECK19-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32*
14954 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP29]], align 4
14955 // CHECK19-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
14956 // CHECK19-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i32*
14957 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP31]], align 4
14958 // CHECK19-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
14959 // CHECK19-NEXT: store i64 4, i64* [[TMP32]], align 4
14960 // CHECK19-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
14961 // CHECK19-NEXT: store i8* null, i8** [[TMP33]], align 4
14962 // CHECK19-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
14963 // CHECK19-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i16**
14964 // CHECK19-NEXT: store i16* [[VLA]], i16** [[TMP35]], align 4
14965 // CHECK19-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
14966 // CHECK19-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i16**
14967 // CHECK19-NEXT: store i16* [[VLA]], i16** [[TMP37]], align 4
14968 // CHECK19-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
14969 // CHECK19-NEXT: store i64 [[TMP9]], i64* [[TMP38]], align 4
14970 // CHECK19-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
14971 // CHECK19-NEXT: store i8* null, i8** [[TMP39]], align 4
14972 // CHECK19-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
14973 // CHECK19-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
14974 // CHECK19-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
14975 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
14976 // CHECK19-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218.region_id, i32 5, i8** [[TMP40]], i8** [[TMP41]], i64* [[TMP42]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
14977 // CHECK19-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
14978 // CHECK19-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
14979 // CHECK19: omp_offload.failed:
14980 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]]
14981 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]]
14982 // CHECK19: omp_offload.cont:
14983 // CHECK19-NEXT: br label [[OMP_IF_END:%.*]]
14984 // CHECK19: omp_if.else:
14985 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]]
14986 // CHECK19-NEXT: br label [[OMP_IF_END]]
14987 // CHECK19: omp_if.end:
14988 // CHECK19-NEXT: [[TMP45:%.*]] = mul nsw i32 1, [[TMP1]]
14989 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i32 [[TMP45]]
14990 // CHECK19-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1
14991 // CHECK19-NEXT: [[TMP46:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2
14992 // CHECK19-NEXT: [[CONV:%.*]] = sext i16 [[TMP46]] to i32
14993 // CHECK19-NEXT: [[TMP47:%.*]] = load i32, i32* [[B]], align 4
14994 // CHECK19-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV]], [[TMP47]]
14995 // CHECK19-NEXT: [[TMP48:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
14996 // CHECK19-NEXT: call void @llvm.stackrestore(i8* [[TMP48]])
14997 // CHECK19-NEXT: ret i32 [[ADD3]]
14998 //
14999 //
15000 // CHECK19-LABEL: define {{[^@]+}}@_ZL7fstatici
15001 // CHECK19-SAME: (i32 [[N:%.*]]) #[[ATTR0]] {
15002 // CHECK19-NEXT: entry:
15003 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
15004 // CHECK19-NEXT: [[A:%.*]] = alloca i32, align 4
15005 // CHECK19-NEXT: [[AA:%.*]] = alloca i16, align 2
15006 // CHECK19-NEXT: [[AAA:%.*]] = alloca i8, align 1
15007 // CHECK19-NEXT: [[B:%.*]] = alloca [10 x i32], align 4
15008 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
15009 // CHECK19-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
15010 // CHECK19-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
15011 // CHECK19-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4
15012 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
15013 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
15014 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
15015 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
15016 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15017 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
15018 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
15019 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
15020 // CHECK19-NEXT: store i32 0, i32* [[A]], align 4
15021 // CHECK19-NEXT: store i16 0, i16* [[AA]], align 2
15022 // CHECK19-NEXT: store i8 0, i8* [[AAA]], align 1
15023 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
15024 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[N_CASTED]], align 4
15025 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_CASTED]], align 4
15026 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4
15027 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[A_CASTED]], align 4
15028 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_CASTED]], align 4
15029 // CHECK19-NEXT: [[TMP4:%.*]] = load i16, i16* [[AA]], align 2
15030 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
15031 // CHECK19-NEXT: store i16 [[TMP4]], i16* [[CONV]], align 2
15032 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[AA_CASTED]], align 4
15033 // CHECK19-NEXT: [[TMP6:%.*]] = load i8, i8* [[AAA]], align 1
15034 // CHECK19-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_CASTED]] to i8*
15035 // CHECK19-NEXT: store i8 [[TMP6]], i8* [[CONV1]], align 1
15036 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[AAA_CASTED]], align 4
15037 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[N_ADDR]], align 4
15038 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 50
15039 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
15040 // CHECK19: omp_if.then:
15041 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
15042 // CHECK19-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
15043 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP10]], align 4
15044 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
15045 // CHECK19-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
15046 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP12]], align 4
15047 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
15048 // CHECK19-NEXT: store i8* null, i8** [[TMP13]], align 4
15049 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
15050 // CHECK19-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
15051 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP15]], align 4
15052 // CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
15053 // CHECK19-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
15054 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP17]], align 4
15055 // CHECK19-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
15056 // CHECK19-NEXT: store i8* null, i8** [[TMP18]], align 4
15057 // CHECK19-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
15058 // CHECK19-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32*
15059 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[TMP20]], align 4
15060 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
15061 // CHECK19-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i32*
15062 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[TMP22]], align 4
15063 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
15064 // CHECK19-NEXT: store i8* null, i8** [[TMP23]], align 4
15065 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
15066 // CHECK19-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32*
15067 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[TMP25]], align 4
15068 // CHECK19-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
15069 // CHECK19-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32*
15070 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[TMP27]], align 4
15071 // CHECK19-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
15072 // CHECK19-NEXT: store i8* null, i8** [[TMP28]], align 4
15073 // CHECK19-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
15074 // CHECK19-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [10 x i32]**
15075 // CHECK19-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP30]], align 4
15076 // CHECK19-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
15077 // CHECK19-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to [10 x i32]**
15078 // CHECK19-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP32]], align 4
15079 // CHECK19-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
15080 // CHECK19-NEXT: store i8* null, i8** [[TMP33]], align 4
15081 // CHECK19-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
15082 // CHECK19-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
15083 // CHECK19-NEXT: [[TMP36:%.*]] = load i32, i32* [[A]], align 4
15084 // CHECK19-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4
15085 // CHECK19-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4
15086 // CHECK19-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_2]], align 4
15087 // CHECK19-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15088 // CHECK19-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15089 // CHECK19-NEXT: [[SUB:%.*]] = sub i32 [[TMP38]], [[TMP39]]
15090 // CHECK19-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1
15091 // CHECK19-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1
15092 // CHECK19-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
15093 // CHECK19-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1
15094 // CHECK19-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
15095 // CHECK19-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
15096 // CHECK19-NEXT: [[ADD6:%.*]] = add i32 [[TMP40]], 1
15097 // CHECK19-NEXT: [[TMP41:%.*]] = zext i32 [[ADD6]] to i64
15098 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP41]])
15099 // CHECK19-NEXT: [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
15100 // CHECK19-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
15101 // CHECK19-NEXT: br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
15102 // CHECK19: omp_offload.failed:
15103 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], i32 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]]
15104 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]]
15105 // CHECK19: omp_offload.cont:
15106 // CHECK19-NEXT: br label [[OMP_IF_END:%.*]]
15107 // CHECK19: omp_if.else:
15108 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], i32 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]]
15109 // CHECK19-NEXT: br label [[OMP_IF_END]]
15110 // CHECK19: omp_if.end:
15111 // CHECK19-NEXT: [[TMP44:%.*]] = load i32, i32* [[A]], align 4
15112 // CHECK19-NEXT: ret i32 [[TMP44]]
15113 //
15114 //
15115 // CHECK19-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
15116 // CHECK19-SAME: (i32 [[N:%.*]]) #[[ATTR0]] comdat {
15117 // CHECK19-NEXT: entry:
15118 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
15119 // CHECK19-NEXT: [[A:%.*]] = alloca i32, align 4
15120 // CHECK19-NEXT: [[AA:%.*]] = alloca i16, align 2
15121 // CHECK19-NEXT: [[B:%.*]] = alloca [10 x i32], align 4
15122 // CHECK19-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
15123 // CHECK19-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
15124 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
15125 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
15126 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
15127 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
15128 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
15129 // CHECK19-NEXT: store i32 0, i32* [[A]], align 4
15130 // CHECK19-NEXT: store i16 0, i16* [[AA]], align 2
15131 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4
15132 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4
15133 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
15134 // CHECK19-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2
15135 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
15136 // CHECK19-NEXT: store i16 [[TMP2]], i16* [[CONV]], align 2
15137 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4
15138 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
15139 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40
15140 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
15141 // CHECK19: omp_if.then:
15142 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
15143 // CHECK19-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32*
15144 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP6]], align 4
15145 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
15146 // CHECK19-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
15147 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4
15148 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
15149 // CHECK19-NEXT: store i8* null, i8** [[TMP9]], align 4
15150 // CHECK19-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
15151 // CHECK19-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32*
15152 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP11]], align 4
15153 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
15154 // CHECK19-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
15155 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4
15156 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
15157 // CHECK19-NEXT: store i8* null, i8** [[TMP14]], align 4
15158 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
15159 // CHECK19-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]**
15160 // CHECK19-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 4
15161 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
15162 // CHECK19-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]**
15163 // CHECK19-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 4
15164 // CHECK19-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
15165 // CHECK19-NEXT: store i8* null, i8** [[TMP19]], align 4
15166 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
15167 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
15168 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
15169 // CHECK19-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.17, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.18, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
15170 // CHECK19-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
15171 // CHECK19-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
15172 // CHECK19: omp_offload.failed:
15173 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]]
15174 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]]
15175 // CHECK19: omp_offload.cont:
15176 // CHECK19-NEXT: br label [[OMP_IF_END:%.*]]
15177 // CHECK19: omp_if.else:
15178 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]]
15179 // CHECK19-NEXT: br label [[OMP_IF_END]]
15180 // CHECK19: omp_if.end:
15181 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4
15182 // CHECK19-NEXT: ret i32 [[TMP24]]
15183 //
15184 //
15185 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218
15186 // CHECK19-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] {
15187 // CHECK19-NEXT: entry:
15188 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
15189 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
15190 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
15191 // CHECK19-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
15192 // CHECK19-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4
15193 // CHECK19-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4
15194 // CHECK19-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
15195 // CHECK19-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4
15196 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15197 // CHECK19-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
15198 // CHECK19-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4
15199 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
15200 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15201 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
15202 // CHECK19-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4
15203 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[B_ADDR]], align 4
15204 // CHECK19-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4
15205 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4
15206 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32, i32, i32, i16*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i32 [[TMP5]], i32 [[TMP1]], i32 [[TMP2]], i16* [[TMP3]])
15207 // CHECK19-NEXT: ret void
15208 //
15209 //
15210 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..11
15211 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] {
15212 // CHECK19-NEXT: entry:
15213 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15214 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15215 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
15216 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
15217 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
15218 // CHECK19-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
15219 // CHECK19-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4
15220 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15221 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
15222 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
15223 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
15224 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15225 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15226 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
15227 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15228 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15229 // CHECK19-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
15230 // CHECK19-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4
15231 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15232 // CHECK19-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
15233 // CHECK19-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4
15234 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
15235 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15236 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
15237 // CHECK19-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4
15238 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
15239 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
15240 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15241 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15242 // CHECK19-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15243 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
15244 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15245 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15246 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9
15247 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15248 // CHECK19: cond.true:
15249 // CHECK19-NEXT: br label [[COND_END:%.*]]
15250 // CHECK19: cond.false:
15251 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15252 // CHECK19-NEXT: br label [[COND_END]]
15253 // CHECK19: cond.end:
15254 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
15255 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
15256 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15257 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
15258 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15259 // CHECK19: omp.inner.for.cond:
15260 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15261 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15262 // CHECK19-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
15263 // CHECK19-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15264 // CHECK19: omp.inner.for.body:
15265 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15266 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
15267 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15268 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4
15269 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[B_ADDR]], align 4
15270 // CHECK19-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP12]] to double
15271 // CHECK19-NEXT: [[ADD4:%.*]] = fadd double [[CONV]], 1.500000e+00
15272 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
15273 // CHECK19-NEXT: store double [[ADD4]], double* [[A]], align 4
15274 // CHECK19-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0
15275 // CHECK19-NEXT: [[TMP13:%.*]] = load double, double* [[A5]], align 4
15276 // CHECK19-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00
15277 // CHECK19-NEXT: store double [[INC]], double* [[A5]], align 4
15278 // CHECK19-NEXT: [[CONV6:%.*]] = fptosi double [[INC]] to i16
15279 // CHECK19-NEXT: [[TMP14:%.*]] = mul nsw i32 1, [[TMP2]]
15280 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i32 [[TMP14]]
15281 // CHECK19-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1
15282 // CHECK19-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX7]], align 2
15283 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
15284 // CHECK19: omp.body.continue:
15285 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15286 // CHECK19: omp.inner.for.inc:
15287 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15288 // CHECK19-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
15289 // CHECK19-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
15290 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
15291 // CHECK19: omp.inner.for.end:
15292 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
15293 // CHECK19: omp.loop.exit:
15294 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
15295 // CHECK19-NEXT: ret void
15296 //
15297 //
15298 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200
15299 // CHECK19-SAME: (i32 [[N:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
15300 // CHECK19-NEXT: entry:
15301 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
15302 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
15303 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
15304 // CHECK19-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4
15305 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
15306 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
15307 // CHECK19-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
15308 // CHECK19-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
15309 // CHECK19-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4
15310 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
15311 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
15312 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
15313 // CHECK19-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4
15314 // CHECK19-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
15315 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
15316 // CHECK19-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8*
15317 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
15318 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
15319 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4
15320 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4
15321 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4
15322 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[A_CASTED]], align 4
15323 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4
15324 // CHECK19-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV]], align 4
15325 // CHECK19-NEXT: [[CONV2:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
15326 // CHECK19-NEXT: store i16 [[TMP5]], i16* [[CONV2]], align 2
15327 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[AA_CASTED]], align 4
15328 // CHECK19-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV1]], align 4
15329 // CHECK19-NEXT: [[CONV3:%.*]] = bitcast i32* [[AAA_CASTED]] to i8*
15330 // CHECK19-NEXT: store i8 [[TMP7]], i8* [[CONV3]], align 1
15331 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[AAA_CASTED]], align 4
15332 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP8]], [10 x i32]* [[TMP0]])
15333 // CHECK19-NEXT: ret void
15334 //
15335 //
15336 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..13
15337 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
15338 // CHECK19-NEXT: entry:
15339 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15340 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15341 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
15342 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
15343 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
15344 // CHECK19-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4
15345 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
15346 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15347 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
15348 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15349 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
15350 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
15351 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
15352 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
15353 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
15354 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15355 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15356 // CHECK19-NEXT: [[I6:%.*]] = alloca i32, align 4
15357 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15358 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15359 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
15360 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
15361 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
15362 // CHECK19-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4
15363 // CHECK19-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
15364 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
15365 // CHECK19-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8*
15366 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
15367 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
15368 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
15369 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
15370 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
15371 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15372 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15373 // CHECK19-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]]
15374 // CHECK19-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1
15375 // CHECK19-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1
15376 // CHECK19-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
15377 // CHECK19-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1
15378 // CHECK19-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
15379 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15380 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[I]], align 4
15381 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15382 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15383 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]]
15384 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15385 // CHECK19: omp.precond.then:
15386 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
15387 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
15388 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
15389 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15390 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15391 // CHECK19-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15392 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
15393 // CHECK19-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15394 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15395 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
15396 // CHECK19-NEXT: [[CMP7:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]]
15397 // CHECK19-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15398 // CHECK19: cond.true:
15399 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
15400 // CHECK19-NEXT: br label [[COND_END:%.*]]
15401 // CHECK19: cond.false:
15402 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15403 // CHECK19-NEXT: br label [[COND_END]]
15404 // CHECK19: cond.end:
15405 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
15406 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
15407 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15408 // CHECK19-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
15409 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15410 // CHECK19: omp.inner.for.cond:
15411 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15412 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15413 // CHECK19-NEXT: [[ADD8:%.*]] = add i32 [[TMP17]], 1
15414 // CHECK19-NEXT: [[CMP9:%.*]] = icmp ult i32 [[TMP16]], [[ADD8]]
15415 // CHECK19-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15416 // CHECK19: omp.inner.for.body:
15417 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15418 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15419 // CHECK19-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1
15420 // CHECK19-NEXT: [[ADD10:%.*]] = add i32 [[TMP18]], [[MUL]]
15421 // CHECK19-NEXT: store i32 [[ADD10]], i32* [[I6]], align 4
15422 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[A_ADDR]], align 4
15423 // CHECK19-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1
15424 // CHECK19-NEXT: store i32 [[ADD11]], i32* [[A_ADDR]], align 4
15425 // CHECK19-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV]], align 4
15426 // CHECK19-NEXT: [[CONV12:%.*]] = sext i16 [[TMP21]] to i32
15427 // CHECK19-NEXT: [[ADD13:%.*]] = add nsw i32 [[CONV12]], 1
15428 // CHECK19-NEXT: [[CONV14:%.*]] = trunc i32 [[ADD13]] to i16
15429 // CHECK19-NEXT: store i16 [[CONV14]], i16* [[CONV]], align 4
15430 // CHECK19-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV1]], align 4
15431 // CHECK19-NEXT: [[CONV15:%.*]] = sext i8 [[TMP22]] to i32
15432 // CHECK19-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV15]], 1
15433 // CHECK19-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i8
15434 // CHECK19-NEXT: store i8 [[CONV17]], i8* [[CONV1]], align 4
15435 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2
15436 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
15437 // CHECK19-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], 1
15438 // CHECK19-NEXT: store i32 [[ADD18]], i32* [[ARRAYIDX]], align 4
15439 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
15440 // CHECK19: omp.body.continue:
15441 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15442 // CHECK19: omp.inner.for.inc:
15443 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15444 // CHECK19-NEXT: [[ADD19:%.*]] = add i32 [[TMP24]], 1
15445 // CHECK19-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4
15446 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
15447 // CHECK19: omp.inner.for.end:
15448 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
15449 // CHECK19: omp.loop.exit:
15450 // CHECK19-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15451 // CHECK19-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
15452 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
15453 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
15454 // CHECK19: omp.precond.end:
15455 // CHECK19-NEXT: ret void
15456 //
15457 //
15458 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183
15459 // CHECK19-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
15460 // CHECK19-NEXT: entry:
15461 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
15462 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
15463 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
15464 // CHECK19-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
15465 // CHECK19-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
15466 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
15467 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
15468 // CHECK19-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
15469 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
15470 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
15471 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
15472 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[A_CASTED]], align 4
15473 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4
15474 // CHECK19-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4
15475 // CHECK19-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
15476 // CHECK19-NEXT: store i16 [[TMP3]], i16* [[CONV1]], align 2
15477 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4
15478 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..16 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], [10 x i32]* [[TMP0]])
15479 // CHECK19-NEXT: ret void
15480 //
15481 //
15482 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..16
15483 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
15484 // CHECK19-NEXT: entry:
15485 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15486 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15487 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
15488 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
15489 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
15490 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15491 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
15492 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
15493 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
15494 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15495 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15496 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
15497 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15498 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15499 // CHECK19-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
15500 // CHECK19-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
15501 // CHECK19-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
15502 // CHECK19-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
15503 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
15504 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
15505 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
15506 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15507 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15508 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15509 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
15510 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15511 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15512 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
15513 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15514 // CHECK19: cond.true:
15515 // CHECK19-NEXT: br label [[COND_END:%.*]]
15516 // CHECK19: cond.false:
15517 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15518 // CHECK19-NEXT: br label [[COND_END]]
15519 // CHECK19: cond.end:
15520 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
15521 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
15522 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15523 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
15524 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15525 // CHECK19: omp.inner.for.cond:
15526 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15527 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15528 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
15529 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15530 // CHECK19: omp.inner.for.body:
15531 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15532 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
15533 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15534 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4
15535 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4
15536 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1
15537 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4
15538 // CHECK19-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV]], align 4
15539 // CHECK19-NEXT: [[CONV3:%.*]] = sext i16 [[TMP10]] to i32
15540 // CHECK19-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1
15541 // CHECK19-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16
15542 // CHECK19-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 4
15543 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2
15544 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
15545 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], 1
15546 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4
15547 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
15548 // CHECK19: omp.body.continue:
15549 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15550 // CHECK19: omp.inner.for.inc:
15551 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15552 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1
15553 // CHECK19-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
15554 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
15555 // CHECK19: omp.inner.for.end:
15556 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
15557 // CHECK19: omp.loop.exit:
15558 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
15559 // CHECK19-NEXT: ret void
15560 //
15561 //
15562 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
15563 // CHECK19-SAME: () #[[ATTR4]] {
15564 // CHECK19-NEXT: entry:
15565 // CHECK19-NEXT: call void @__tgt_register_requires(i64 1)
15566 // CHECK19-NEXT: ret void
15567 //
15568 //
15569 // CHECK20-LABEL: define {{[^@]+}}@_Z3fooi
15570 // CHECK20-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
15571 // CHECK20-NEXT: entry:
15572 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
15573 // CHECK20-NEXT: [[A:%.*]] = alloca i32, align 4
15574 // CHECK20-NEXT: [[AA:%.*]] = alloca i16, align 2
15575 // CHECK20-NEXT: [[B:%.*]] = alloca [10 x float], align 4
15576 // CHECK20-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
15577 // CHECK20-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
15578 // CHECK20-NEXT: [[C:%.*]] = alloca [5 x [10 x double]], align 8
15579 // CHECK20-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4
15580 // CHECK20-NEXT: [[D:%.*]] = alloca [[STRUCT_TT:%.*]], align 4
15581 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15582 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
15583 // CHECK20-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
15584 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
15585 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED3:%.*]] = alloca i32, align 4
15586 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
15587 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
15588 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
15589 // CHECK20-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4
15590 // CHECK20-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
15591 // CHECK20-NEXT: [[AA_CASTED4:%.*]] = alloca i32, align 4
15592 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS6:%.*]] = alloca [1 x i8*], align 4
15593 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS7:%.*]] = alloca [1 x i8*], align 4
15594 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS8:%.*]] = alloca [1 x i8*], align 4
15595 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
15596 // CHECK20-NEXT: [[A_CASTED9:%.*]] = alloca i32, align 4
15597 // CHECK20-NEXT: [[AA_CASTED10:%.*]] = alloca i32, align 4
15598 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS12:%.*]] = alloca [2 x i8*], align 4
15599 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS13:%.*]] = alloca [2 x i8*], align 4
15600 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS14:%.*]] = alloca [2 x i8*], align 4
15601 // CHECK20-NEXT: [[_TMP15:%.*]] = alloca i32, align 4
15602 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
15603 // CHECK20-NEXT: [[A_CASTED19:%.*]] = alloca i32, align 4
15604 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED20:%.*]] = alloca i32, align 4
15605 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [10 x i8*], align 4
15606 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS24:%.*]] = alloca [10 x i8*], align 4
15607 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [10 x i8*], align 4
15608 // CHECK20-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [10 x i64], align 4
15609 // CHECK20-NEXT: [[_TMP26:%.*]] = alloca i32, align 4
15610 // CHECK20-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
15611 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
15612 // CHECK20-NEXT: store i32 0, i32* [[A]], align 4
15613 // CHECK20-NEXT: store i16 0, i16* [[AA]], align 2
15614 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
15615 // CHECK20-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
15616 // CHECK20-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4
15617 // CHECK20-NEXT: [[VLA:%.*]] = alloca float, i32 [[TMP1]], align 4
15618 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4
15619 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
15620 // CHECK20-NEXT: [[TMP4:%.*]] = mul nuw i32 5, [[TMP3]]
15621 // CHECK20-NEXT: [[VLA1:%.*]] = alloca double, i32 [[TMP4]], align 8
15622 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[__VLA_EXPR1]], align 4
15623 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4
15624 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4
15625 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[A]], align 4
15626 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_2]], align 4
15627 // CHECK20-NEXT: [[TMP7:%.*]] = load i16, i16* [[AA]], align 2
15628 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
15629 // CHECK20-NEXT: store i16 [[TMP7]], i16* [[CONV]], align 2
15630 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[AA_CASTED]], align 4
15631 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15632 // CHECK20-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15633 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15634 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15635 // CHECK20-NEXT: store i32 [[TMP11]], i32* [[DOTCAPTURE_EXPR__CASTED3]], align 4
15636 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED3]], align 4
15637 // CHECK20-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
15638 // CHECK20-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32*
15639 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[TMP14]], align 4
15640 // CHECK20-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
15641 // CHECK20-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i32*
15642 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[TMP16]], align 4
15643 // CHECK20-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
15644 // CHECK20-NEXT: store i8* null, i8** [[TMP17]], align 4
15645 // CHECK20-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
15646 // CHECK20-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32*
15647 // CHECK20-NEXT: store i32 [[TMP10]], i32* [[TMP19]], align 4
15648 // CHECK20-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
15649 // CHECK20-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
15650 // CHECK20-NEXT: store i32 [[TMP10]], i32* [[TMP21]], align 4
15651 // CHECK20-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
15652 // CHECK20-NEXT: store i8* null, i8** [[TMP22]], align 4
15653 // CHECK20-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
15654 // CHECK20-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i32*
15655 // CHECK20-NEXT: store i32 [[TMP12]], i32* [[TMP24]], align 4
15656 // CHECK20-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
15657 // CHECK20-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i32*
15658 // CHECK20-NEXT: store i32 [[TMP12]], i32* [[TMP26]], align 4
15659 // CHECK20-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
15660 // CHECK20-NEXT: store i8* null, i8** [[TMP27]], align 4
15661 // CHECK20-NEXT: [[TMP28:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
15662 // CHECK20-NEXT: [[TMP29:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
15663 // CHECK20-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 0
15664 // CHECK20-NEXT: [[TMP31:%.*]] = load i16, i16* [[AA]], align 2
15665 // CHECK20-NEXT: store i16 [[TMP31]], i16* [[TMP30]], align 4
15666 // CHECK20-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 1
15667 // CHECK20-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15668 // CHECK20-NEXT: store i32 [[TMP33]], i32* [[TMP32]], align 4
15669 // CHECK20-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 2
15670 // CHECK20-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15671 // CHECK20-NEXT: store i32 [[TMP35]], i32* [[TMP34]], align 4
15672 // CHECK20-NEXT: [[TMP36:%.*]] = call i8* @__kmpc_omp_target_task_alloc(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 1, i32 72, i32 12, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*), i64 -1)
15673 // CHECK20-NEXT: [[TMP37:%.*]] = bitcast i8* [[TMP36]] to %struct.kmp_task_t_with_privates*
15674 // CHECK20-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP37]], i32 0, i32 0
15675 // CHECK20-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP38]], i32 0, i32 0
15676 // CHECK20-NEXT: [[TMP40:%.*]] = load i8*, i8** [[TMP39]], align 4
15677 // CHECK20-NEXT: [[TMP41:%.*]] = bitcast %struct.anon* [[AGG_CAPTURED]] to i8*
15678 // CHECK20-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP40]], i8* align 4 [[TMP41]], i32 12, i1 false)
15679 // CHECK20-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP37]], i32 0, i32 1
15680 // CHECK20-NEXT: [[TMP43:%.*]] = bitcast i8* [[TMP40]] to %struct.anon*
15681 // CHECK20-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 0
15682 // CHECK20-NEXT: [[TMP45:%.*]] = bitcast [3 x i64]* [[TMP44]] to i8*
15683 // CHECK20-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP45]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false)
15684 // CHECK20-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 1
15685 // CHECK20-NEXT: [[TMP47:%.*]] = bitcast [3 x i8*]* [[TMP46]] to i8*
15686 // CHECK20-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP28]] to i8*
15687 // CHECK20-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP47]], i8* align 4 [[TMP48]], i32 12, i1 false)
15688 // CHECK20-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 2
15689 // CHECK20-NEXT: [[TMP50:%.*]] = bitcast [3 x i8*]* [[TMP49]] to i8*
15690 // CHECK20-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP29]] to i8*
15691 // CHECK20-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP50]], i8* align 4 [[TMP51]], i32 12, i1 false)
15692 // CHECK20-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP42]], i32 0, i32 3
15693 // CHECK20-NEXT: [[TMP53:%.*]] = load i16, i16* [[AA]], align 2
15694 // CHECK20-NEXT: store i16 [[TMP53]], i16* [[TMP52]], align 4
15695 // CHECK20-NEXT: [[TMP54:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i8* [[TMP36]])
15696 // CHECK20-NEXT: [[TMP55:%.*]] = load i32, i32* [[A]], align 4
15697 // CHECK20-NEXT: store i32 [[TMP55]], i32* [[A_CASTED]], align 4
15698 // CHECK20-NEXT: [[TMP56:%.*]] = load i32, i32* [[A_CASTED]], align 4
15699 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107(i32 [[TMP56]]) #[[ATTR3:[0-9]+]]
15700 // CHECK20-NEXT: [[TMP57:%.*]] = load i16, i16* [[AA]], align 2
15701 // CHECK20-NEXT: [[CONV5:%.*]] = bitcast i32* [[AA_CASTED4]] to i16*
15702 // CHECK20-NEXT: store i16 [[TMP57]], i16* [[CONV5]], align 2
15703 // CHECK20-NEXT: [[TMP58:%.*]] = load i32, i32* [[AA_CASTED4]], align 4
15704 // CHECK20-NEXT: [[TMP59:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS6]], i32 0, i32 0
15705 // CHECK20-NEXT: [[TMP60:%.*]] = bitcast i8** [[TMP59]] to i32*
15706 // CHECK20-NEXT: store i32 [[TMP58]], i32* [[TMP60]], align 4
15707 // CHECK20-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS7]], i32 0, i32 0
15708 // CHECK20-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i32*
15709 // CHECK20-NEXT: store i32 [[TMP58]], i32* [[TMP62]], align 4
15710 // CHECK20-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS8]], i32 0, i32 0
15711 // CHECK20-NEXT: store i8* null, i8** [[TMP63]], align 4
15712 // CHECK20-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS6]], i32 0, i32 0
15713 // CHECK20-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS7]], i32 0, i32 0
15714 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
15715 // CHECK20-NEXT: [[TMP66:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113.region_id, i32 1, i8** [[TMP64]], i8** [[TMP65]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
15716 // CHECK20-NEXT: [[TMP67:%.*]] = icmp ne i32 [[TMP66]], 0
15717 // CHECK20-NEXT: br i1 [[TMP67]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
15718 // CHECK20: omp_offload.failed:
15719 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113(i32 [[TMP58]]) #[[ATTR3]]
15720 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]]
15721 // CHECK20: omp_offload.cont:
15722 // CHECK20-NEXT: [[TMP68:%.*]] = load i32, i32* [[A]], align 4
15723 // CHECK20-NEXT: store i32 [[TMP68]], i32* [[A_CASTED9]], align 4
15724 // CHECK20-NEXT: [[TMP69:%.*]] = load i32, i32* [[A_CASTED9]], align 4
15725 // CHECK20-NEXT: [[TMP70:%.*]] = load i16, i16* [[AA]], align 2
15726 // CHECK20-NEXT: [[CONV11:%.*]] = bitcast i32* [[AA_CASTED10]] to i16*
15727 // CHECK20-NEXT: store i16 [[TMP70]], i16* [[CONV11]], align 2
15728 // CHECK20-NEXT: [[TMP71:%.*]] = load i32, i32* [[AA_CASTED10]], align 4
15729 // CHECK20-NEXT: [[TMP72:%.*]] = load i32, i32* [[N_ADDR]], align 4
15730 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP72]], 10
15731 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
15732 // CHECK20: omp_if.then:
15733 // CHECK20-NEXT: [[TMP73:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0
15734 // CHECK20-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i32*
15735 // CHECK20-NEXT: store i32 [[TMP69]], i32* [[TMP74]], align 4
15736 // CHECK20-NEXT: [[TMP75:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0
15737 // CHECK20-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32*
15738 // CHECK20-NEXT: store i32 [[TMP69]], i32* [[TMP76]], align 4
15739 // CHECK20-NEXT: [[TMP77:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i32 0, i32 0
15740 // CHECK20-NEXT: store i8* null, i8** [[TMP77]], align 4
15741 // CHECK20-NEXT: [[TMP78:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 1
15742 // CHECK20-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32*
15743 // CHECK20-NEXT: store i32 [[TMP71]], i32* [[TMP79]], align 4
15744 // CHECK20-NEXT: [[TMP80:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 1
15745 // CHECK20-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32*
15746 // CHECK20-NEXT: store i32 [[TMP71]], i32* [[TMP81]], align 4
15747 // CHECK20-NEXT: [[TMP82:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i32 0, i32 1
15748 // CHECK20-NEXT: store i8* null, i8** [[TMP82]], align 4
15749 // CHECK20-NEXT: [[TMP83:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0
15750 // CHECK20-NEXT: [[TMP84:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0
15751 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
15752 // CHECK20-NEXT: [[TMP85:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120.region_id, i32 2, i8** [[TMP83]], i8** [[TMP84]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
15753 // CHECK20-NEXT: [[TMP86:%.*]] = icmp ne i32 [[TMP85]], 0
15754 // CHECK20-NEXT: br i1 [[TMP86]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
15755 // CHECK20: omp_offload.failed16:
15756 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i32 [[TMP69]], i32 [[TMP71]]) #[[ATTR3]]
15757 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT17]]
15758 // CHECK20: omp_offload.cont17:
15759 // CHECK20-NEXT: br label [[OMP_IF_END:%.*]]
15760 // CHECK20: omp_if.else:
15761 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120(i32 [[TMP69]], i32 [[TMP71]]) #[[ATTR3]]
15762 // CHECK20-NEXT: br label [[OMP_IF_END]]
15763 // CHECK20: omp_if.end:
15764 // CHECK20-NEXT: [[TMP87:%.*]] = load i32, i32* [[N_ADDR]], align 4
15765 // CHECK20-NEXT: store i32 [[TMP87]], i32* [[DOTCAPTURE_EXPR_18]], align 4
15766 // CHECK20-NEXT: [[TMP88:%.*]] = load i32, i32* [[A]], align 4
15767 // CHECK20-NEXT: store i32 [[TMP88]], i32* [[A_CASTED19]], align 4
15768 // CHECK20-NEXT: [[TMP89:%.*]] = load i32, i32* [[A_CASTED19]], align 4
15769 // CHECK20-NEXT: [[TMP90:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4
15770 // CHECK20-NEXT: store i32 [[TMP90]], i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4
15771 // CHECK20-NEXT: [[TMP91:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED20]], align 4
15772 // CHECK20-NEXT: [[TMP92:%.*]] = load i32, i32* [[N_ADDR]], align 4
15773 // CHECK20-NEXT: [[CMP21:%.*]] = icmp sgt i32 [[TMP92]], 20
15774 // CHECK20-NEXT: br i1 [[CMP21]], label [[OMP_IF_THEN22:%.*]], label [[OMP_IF_ELSE29:%.*]]
15775 // CHECK20: omp_if.then22:
15776 // CHECK20-NEXT: [[TMP93:%.*]] = mul nuw i32 [[TMP1]], 4
15777 // CHECK20-NEXT: [[TMP94:%.*]] = sext i32 [[TMP93]] to i64
15778 // CHECK20-NEXT: [[TMP95:%.*]] = mul nuw i32 5, [[TMP3]]
15779 // CHECK20-NEXT: [[TMP96:%.*]] = mul nuw i32 [[TMP95]], 8
15780 // CHECK20-NEXT: [[TMP97:%.*]] = sext i32 [[TMP96]] to i64
15781 // CHECK20-NEXT: [[TMP98:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
15782 // CHECK20-NEXT: [[TMP99:%.*]] = bitcast i8** [[TMP98]] to i32*
15783 // CHECK20-NEXT: store i32 [[TMP89]], i32* [[TMP99]], align 4
15784 // CHECK20-NEXT: [[TMP100:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
15785 // CHECK20-NEXT: [[TMP101:%.*]] = bitcast i8** [[TMP100]] to i32*
15786 // CHECK20-NEXT: store i32 [[TMP89]], i32* [[TMP101]], align 4
15787 // CHECK20-NEXT: [[TMP102:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
15788 // CHECK20-NEXT: store i64 4, i64* [[TMP102]], align 4
15789 // CHECK20-NEXT: [[TMP103:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 0
15790 // CHECK20-NEXT: store i8* null, i8** [[TMP103]], align 4
15791 // CHECK20-NEXT: [[TMP104:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 1
15792 // CHECK20-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to [10 x float]**
15793 // CHECK20-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP105]], align 4
15794 // CHECK20-NEXT: [[TMP106:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 1
15795 // CHECK20-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to [10 x float]**
15796 // CHECK20-NEXT: store [10 x float]* [[B]], [10 x float]** [[TMP107]], align 4
15797 // CHECK20-NEXT: [[TMP108:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
15798 // CHECK20-NEXT: store i64 40, i64* [[TMP108]], align 4
15799 // CHECK20-NEXT: [[TMP109:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 1
15800 // CHECK20-NEXT: store i8* null, i8** [[TMP109]], align 4
15801 // CHECK20-NEXT: [[TMP110:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 2
15802 // CHECK20-NEXT: [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i32*
15803 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP111]], align 4
15804 // CHECK20-NEXT: [[TMP112:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 2
15805 // CHECK20-NEXT: [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i32*
15806 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP113]], align 4
15807 // CHECK20-NEXT: [[TMP114:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
15808 // CHECK20-NEXT: store i64 4, i64* [[TMP114]], align 4
15809 // CHECK20-NEXT: [[TMP115:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 2
15810 // CHECK20-NEXT: store i8* null, i8** [[TMP115]], align 4
15811 // CHECK20-NEXT: [[TMP116:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 3
15812 // CHECK20-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to float**
15813 // CHECK20-NEXT: store float* [[VLA]], float** [[TMP117]], align 4
15814 // CHECK20-NEXT: [[TMP118:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 3
15815 // CHECK20-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to float**
15816 // CHECK20-NEXT: store float* [[VLA]], float** [[TMP119]], align 4
15817 // CHECK20-NEXT: [[TMP120:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
15818 // CHECK20-NEXT: store i64 [[TMP94]], i64* [[TMP120]], align 4
15819 // CHECK20-NEXT: [[TMP121:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 3
15820 // CHECK20-NEXT: store i8* null, i8** [[TMP121]], align 4
15821 // CHECK20-NEXT: [[TMP122:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 4
15822 // CHECK20-NEXT: [[TMP123:%.*]] = bitcast i8** [[TMP122]] to [5 x [10 x double]]**
15823 // CHECK20-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP123]], align 4
15824 // CHECK20-NEXT: [[TMP124:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 4
15825 // CHECK20-NEXT: [[TMP125:%.*]] = bitcast i8** [[TMP124]] to [5 x [10 x double]]**
15826 // CHECK20-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[TMP125]], align 4
15827 // CHECK20-NEXT: [[TMP126:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
15828 // CHECK20-NEXT: store i64 400, i64* [[TMP126]], align 4
15829 // CHECK20-NEXT: [[TMP127:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 4
15830 // CHECK20-NEXT: store i8* null, i8** [[TMP127]], align 4
15831 // CHECK20-NEXT: [[TMP128:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 5
15832 // CHECK20-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to i32*
15833 // CHECK20-NEXT: store i32 5, i32* [[TMP129]], align 4
15834 // CHECK20-NEXT: [[TMP130:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 5
15835 // CHECK20-NEXT: [[TMP131:%.*]] = bitcast i8** [[TMP130]] to i32*
15836 // CHECK20-NEXT: store i32 5, i32* [[TMP131]], align 4
15837 // CHECK20-NEXT: [[TMP132:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 5
15838 // CHECK20-NEXT: store i64 4, i64* [[TMP132]], align 4
15839 // CHECK20-NEXT: [[TMP133:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 5
15840 // CHECK20-NEXT: store i8* null, i8** [[TMP133]], align 4
15841 // CHECK20-NEXT: [[TMP134:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 6
15842 // CHECK20-NEXT: [[TMP135:%.*]] = bitcast i8** [[TMP134]] to i32*
15843 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP135]], align 4
15844 // CHECK20-NEXT: [[TMP136:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 6
15845 // CHECK20-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i32*
15846 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP137]], align 4
15847 // CHECK20-NEXT: [[TMP138:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 6
15848 // CHECK20-NEXT: store i64 4, i64* [[TMP138]], align 4
15849 // CHECK20-NEXT: [[TMP139:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 6
15850 // CHECK20-NEXT: store i8* null, i8** [[TMP139]], align 4
15851 // CHECK20-NEXT: [[TMP140:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 7
15852 // CHECK20-NEXT: [[TMP141:%.*]] = bitcast i8** [[TMP140]] to double**
15853 // CHECK20-NEXT: store double* [[VLA1]], double** [[TMP141]], align 4
15854 // CHECK20-NEXT: [[TMP142:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 7
15855 // CHECK20-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to double**
15856 // CHECK20-NEXT: store double* [[VLA1]], double** [[TMP143]], align 4
15857 // CHECK20-NEXT: [[TMP144:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 7
15858 // CHECK20-NEXT: store i64 [[TMP97]], i64* [[TMP144]], align 4
15859 // CHECK20-NEXT: [[TMP145:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 7
15860 // CHECK20-NEXT: store i8* null, i8** [[TMP145]], align 4
15861 // CHECK20-NEXT: [[TMP146:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 8
15862 // CHECK20-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to %struct.TT**
15863 // CHECK20-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP147]], align 4
15864 // CHECK20-NEXT: [[TMP148:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 8
15865 // CHECK20-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to %struct.TT**
15866 // CHECK20-NEXT: store %struct.TT* [[D]], %struct.TT** [[TMP149]], align 4
15867 // CHECK20-NEXT: [[TMP150:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 8
15868 // CHECK20-NEXT: store i64 12, i64* [[TMP150]], align 4
15869 // CHECK20-NEXT: [[TMP151:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 8
15870 // CHECK20-NEXT: store i8* null, i8** [[TMP151]], align 4
15871 // CHECK20-NEXT: [[TMP152:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 9
15872 // CHECK20-NEXT: [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32*
15873 // CHECK20-NEXT: store i32 [[TMP91]], i32* [[TMP153]], align 4
15874 // CHECK20-NEXT: [[TMP154:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 9
15875 // CHECK20-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32*
15876 // CHECK20-NEXT: store i32 [[TMP91]], i32* [[TMP155]], align 4
15877 // CHECK20-NEXT: [[TMP156:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 9
15878 // CHECK20-NEXT: store i64 4, i64* [[TMP156]], align 4
15879 // CHECK20-NEXT: [[TMP157:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 9
15880 // CHECK20-NEXT: store i8* null, i8** [[TMP157]], align 4
15881 // CHECK20-NEXT: [[TMP158:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
15882 // CHECK20-NEXT: [[TMP159:%.*]] = getelementptr inbounds [10 x i8*], [10 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
15883 // CHECK20-NEXT: [[TMP160:%.*]] = getelementptr inbounds [10 x i64], [10 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
15884 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
15885 // CHECK20-NEXT: [[TMP161:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145.region_id, i32 10, i8** [[TMP158]], i8** [[TMP159]], i64* [[TMP160]], i64* getelementptr inbounds ([10 x i64], [10 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
15886 // CHECK20-NEXT: [[TMP162:%.*]] = icmp ne i32 [[TMP161]], 0
15887 // CHECK20-NEXT: br i1 [[TMP162]], label [[OMP_OFFLOAD_FAILED27:%.*]], label [[OMP_OFFLOAD_CONT28:%.*]]
15888 // CHECK20: omp_offload.failed27:
15889 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i32 [[TMP89]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]], i32 [[TMP91]]) #[[ATTR3]]
15890 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT28]]
15891 // CHECK20: omp_offload.cont28:
15892 // CHECK20-NEXT: br label [[OMP_IF_END30:%.*]]
15893 // CHECK20: omp_if.else29:
15894 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145(i32 [[TMP89]], [10 x float]* [[B]], i32 [[TMP1]], float* [[VLA]], [5 x [10 x double]]* [[C]], i32 5, i32 [[TMP3]], double* [[VLA1]], %struct.TT* [[D]], i32 [[TMP91]]) #[[ATTR3]]
15895 // CHECK20-NEXT: br label [[OMP_IF_END30]]
15896 // CHECK20: omp_if.end30:
15897 // CHECK20-NEXT: [[TMP163:%.*]] = load i32, i32* [[A]], align 4
15898 // CHECK20-NEXT: [[TMP164:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
15899 // CHECK20-NEXT: call void @llvm.stackrestore(i8* [[TMP164]])
15900 // CHECK20-NEXT: ret i32 [[TMP163]]
15901 //
15902 //
15903 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103
15904 // CHECK20-SAME: (i32 [[AA:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]], i32 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR2:[0-9]+]] {
15905 // CHECK20-NEXT: entry:
15906 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
15907 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
15908 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4
15909 // CHECK20-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
15910 // CHECK20-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
15911 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
15912 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15913 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
15914 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
15915 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15916 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
15917 // CHECK20-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]])
15918 // CHECK20-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4
15919 // CHECK20-NEXT: [[CONV3:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
15920 // CHECK20-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2
15921 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4
15922 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP4]])
15923 // CHECK20-NEXT: ret void
15924 //
15925 //
15926 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined.
15927 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[AA:%.*]]) #[[ATTR2]] {
15928 // CHECK20-NEXT: entry:
15929 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15930 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15931 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
15932 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15933 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
15934 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
15935 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
15936 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15937 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15938 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
15939 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15940 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15941 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
15942 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
15943 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
15944 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
15945 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15946 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15947 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15948 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
15949 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15950 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15951 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
15952 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15953 // CHECK20: cond.true:
15954 // CHECK20-NEXT: br label [[COND_END:%.*]]
15955 // CHECK20: cond.false:
15956 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15957 // CHECK20-NEXT: br label [[COND_END]]
15958 // CHECK20: cond.end:
15959 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
15960 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
15961 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15962 // CHECK20-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
15963 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15964 // CHECK20: omp.inner.for.cond:
15965 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15966 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15967 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
15968 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15969 // CHECK20: omp.inner.for.body:
15970 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15971 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
15972 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15973 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4
15974 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
15975 // CHECK20: omp.body.continue:
15976 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15977 // CHECK20: omp.inner.for.inc:
15978 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15979 // CHECK20-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
15980 // CHECK20-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
15981 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]]
15982 // CHECK20: omp.inner.for.end:
15983 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
15984 // CHECK20: omp.loop.exit:
15985 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
15986 // CHECK20-NEXT: ret void
15987 //
15988 //
15989 // CHECK20-LABEL: define {{[^@]+}}@.omp_task_privates_map.
15990 // CHECK20-SAME: (%struct..kmp_privates.t* noalias [[TMP0:%.*]], i16** noalias [[TMP1:%.*]], [3 x i8*]** noalias [[TMP2:%.*]], [3 x i8*]** noalias [[TMP3:%.*]], [3 x i64]** noalias [[TMP4:%.*]]) #[[ATTR4:[0-9]+]] {
15991 // CHECK20-NEXT: entry:
15992 // CHECK20-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 4
15993 // CHECK20-NEXT: [[DOTADDR1:%.*]] = alloca i16**, align 4
15994 // CHECK20-NEXT: [[DOTADDR2:%.*]] = alloca [3 x i8*]**, align 4
15995 // CHECK20-NEXT: [[DOTADDR3:%.*]] = alloca [3 x i8*]**, align 4
15996 // CHECK20-NEXT: [[DOTADDR4:%.*]] = alloca [3 x i64]**, align 4
15997 // CHECK20-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 4
15998 // CHECK20-NEXT: store i16** [[TMP1]], i16*** [[DOTADDR1]], align 4
15999 // CHECK20-NEXT: store [3 x i8*]** [[TMP2]], [3 x i8*]*** [[DOTADDR2]], align 4
16000 // CHECK20-NEXT: store [3 x i8*]** [[TMP3]], [3 x i8*]*** [[DOTADDR3]], align 4
16001 // CHECK20-NEXT: store [3 x i64]** [[TMP4]], [3 x i64]*** [[DOTADDR4]], align 4
16002 // CHECK20-NEXT: [[TMP5:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 4
16003 // CHECK20-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 0
16004 // CHECK20-NEXT: [[TMP7:%.*]] = load [3 x i64]**, [3 x i64]*** [[DOTADDR4]], align 4
16005 // CHECK20-NEXT: store [3 x i64]* [[TMP6]], [3 x i64]** [[TMP7]], align 4
16006 // CHECK20-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 1
16007 // CHECK20-NEXT: [[TMP9:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR2]], align 4
16008 // CHECK20-NEXT: store [3 x i8*]* [[TMP8]], [3 x i8*]** [[TMP9]], align 4
16009 // CHECK20-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 2
16010 // CHECK20-NEXT: [[TMP11:%.*]] = load [3 x i8*]**, [3 x i8*]*** [[DOTADDR3]], align 4
16011 // CHECK20-NEXT: store [3 x i8*]* [[TMP10]], [3 x i8*]** [[TMP11]], align 4
16012 // CHECK20-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], %struct..kmp_privates.t* [[TMP5]], i32 0, i32 3
16013 // CHECK20-NEXT: [[TMP13:%.*]] = load i16**, i16*** [[DOTADDR1]], align 4
16014 // CHECK20-NEXT: store i16* [[TMP12]], i16** [[TMP13]], align 4
16015 // CHECK20-NEXT: ret void
16016 //
16017 //
16018 // CHECK20-LABEL: define {{[^@]+}}@.omp_task_entry.
16019 // CHECK20-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
16020 // CHECK20-NEXT: entry:
16021 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4
16022 // CHECK20-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 4
16023 // CHECK20-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 4
16024 // CHECK20-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 4
16025 // CHECK20-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 4
16026 // CHECK20-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon*, align 4
16027 // CHECK20-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca i16*, align 4
16028 // CHECK20-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca [3 x i8*]*, align 4
16029 // CHECK20-NEXT: [[DOTFIRSTPRIV_PTR_ADDR2_I:%.*]] = alloca [3 x i8*]*, align 4
16030 // CHECK20-NEXT: [[DOTFIRSTPRIV_PTR_ADDR3_I:%.*]] = alloca [3 x i64]*, align 4
16031 // CHECK20-NEXT: [[AA_CASTED_I:%.*]] = alloca i32, align 4
16032 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED_I:%.*]] = alloca i32, align 4
16033 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED4_I:%.*]] = alloca i32, align 4
16034 // CHECK20-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4
16035 // CHECK20-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 4
16036 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4
16037 // CHECK20-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4
16038 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4
16039 // CHECK20-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 4
16040 // CHECK20-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0
16041 // CHECK20-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2
16042 // CHECK20-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0
16043 // CHECK20-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
16044 // CHECK20-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon*
16045 // CHECK20-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 1
16046 // CHECK20-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8*
16047 // CHECK20-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8*
16048 // CHECK20-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META13:![0-9]+]])
16049 // CHECK20-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META16:![0-9]+]])
16050 // CHECK20-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]])
16051 // CHECK20-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]])
16052 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !22
16053 // CHECK20-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 4, !noalias !22
16054 // CHECK20-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 4, !noalias !22
16055 // CHECK20-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 4, !noalias !22
16056 // CHECK20-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 4, !noalias !22
16057 // CHECK20-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 4, !noalias !22
16058 // CHECK20-NEXT: [[TMP12:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 4, !noalias !22
16059 // CHECK20-NEXT: [[TMP13:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 4, !noalias !22
16060 // CHECK20-NEXT: [[TMP14:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 4, !noalias !22
16061 // CHECK20-NEXT: [[TMP15:%.*]] = bitcast void (i8*, ...)* [[TMP13]] to void (i8*, i16**, [3 x i8*]**, [3 x i8*]**, [3 x i64]**)*
16062 // CHECK20-NEXT: call void [[TMP15]](i8* [[TMP14]], i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]]) #[[ATTR3]]
16063 // CHECK20-NEXT: [[TMP16:%.*]] = load i16*, i16** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 4, !noalias !22
16064 // CHECK20-NEXT: [[TMP17:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 4, !noalias !22
16065 // CHECK20-NEXT: [[TMP18:%.*]] = load [3 x i8*]*, [3 x i8*]** [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 4, !noalias !22
16066 // CHECK20-NEXT: [[TMP19:%.*]] = load [3 x i64]*, [3 x i64]** [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 4, !noalias !22
16067 // CHECK20-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP17]], i32 0, i32 0
16068 // CHECK20-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP18]], i32 0, i32 0
16069 // CHECK20-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[TMP19]], i32 0, i32 0
16070 // CHECK20-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP12]], i32 0, i32 1
16071 // CHECK20-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2
16072 // CHECK20-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP23]], align 4
16073 // CHECK20-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP24]], align 4
16074 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) #[[ATTR3]]
16075 // CHECK20-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_teams_nowait_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* [[TMP22]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP25]], i32 [[TMP26]], i32 0, i8* null, i32 0, i8* null) #[[ATTR3]]
16076 // CHECK20-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
16077 // CHECK20-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]]
16078 // CHECK20: omp_offload.failed.i:
16079 // CHECK20-NEXT: [[TMP29:%.*]] = load i16, i16* [[TMP16]], align 2
16080 // CHECK20-NEXT: [[CONV_I:%.*]] = bitcast i32* [[AA_CASTED_I]] to i16*
16081 // CHECK20-NEXT: store i16 [[TMP29]], i16* [[CONV_I]], align 2, !noalias !22
16082 // CHECK20-NEXT: [[TMP30:%.*]] = load i32, i32* [[AA_CASTED_I]], align 4, !noalias !22
16083 // CHECK20-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP23]], align 4
16084 // CHECK20-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR__CASTED_I]], align 4, !noalias !22
16085 // CHECK20-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED_I]], align 4, !noalias !22
16086 // CHECK20-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP24]], align 4
16087 // CHECK20-NEXT: store i32 [[TMP33]], i32* [[DOTCAPTURE_EXPR__CASTED4_I]], align 4, !noalias !22
16088 // CHECK20-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED4_I]], align 4, !noalias !22
16089 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103(i32 [[TMP30]], i32 [[TMP32]], i32 [[TMP34]]) #[[ATTR3]]
16090 // CHECK20-NEXT: br label [[DOTOMP_OUTLINED__1_EXIT]]
16091 // CHECK20: .omp_outlined..1.exit:
16092 // CHECK20-NEXT: ret i32 0
16093 //
16094 //
16095 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l107
16096 // CHECK20-SAME: (i32 [[A:%.*]]) #[[ATTR2]] {
16097 // CHECK20-NEXT: entry:
16098 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
16099 // CHECK20-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
16100 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
16101 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
16102 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4
16103 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
16104 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP1]])
16105 // CHECK20-NEXT: ret void
16106 //
16107 //
16108 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..2
16109 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]]) #[[ATTR2]] {
16110 // CHECK20-NEXT: entry:
16111 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16112 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16113 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
16114 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16115 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
16116 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16117 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16118 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16119 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16120 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
16121 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16122 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16123 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
16124 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
16125 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
16126 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16127 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16128 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16129 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
16130 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16131 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16132 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
16133 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16134 // CHECK20: cond.true:
16135 // CHECK20-NEXT: br label [[COND_END:%.*]]
16136 // CHECK20: cond.false:
16137 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16138 // CHECK20-NEXT: br label [[COND_END]]
16139 // CHECK20: cond.end:
16140 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
16141 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
16142 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16143 // CHECK20-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
16144 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16145 // CHECK20: omp.inner.for.cond:
16146 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16147 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16148 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
16149 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16150 // CHECK20: omp.inner.for.body:
16151 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16152 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
16153 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16154 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4
16155 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4
16156 // CHECK20-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
16157 // CHECK20-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4
16158 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16159 // CHECK20: omp.body.continue:
16160 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16161 // CHECK20: omp.inner.for.inc:
16162 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16163 // CHECK20-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
16164 // CHECK20-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
16165 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]]
16166 // CHECK20: omp.inner.for.end:
16167 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
16168 // CHECK20: omp.loop.exit:
16169 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
16170 // CHECK20-NEXT: ret void
16171 //
16172 //
16173 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113
16174 // CHECK20-SAME: (i32 [[AA:%.*]]) #[[ATTR2]] {
16175 // CHECK20-NEXT: entry:
16176 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
16177 // CHECK20-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
16178 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
16179 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
16180 // CHECK20-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
16181 // CHECK20-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
16182 // CHECK20-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2
16183 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[AA_CASTED]], align 4
16184 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP1]])
16185 // CHECK20-NEXT: ret void
16186 //
16187 //
16188 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..3
16189 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[AA:%.*]]) #[[ATTR2]] {
16190 // CHECK20-NEXT: entry:
16191 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16192 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16193 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
16194 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16195 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
16196 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16197 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16198 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16199 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16200 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
16201 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16202 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16203 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
16204 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
16205 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
16206 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
16207 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16208 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16209 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16210 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
16211 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16212 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16213 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
16214 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16215 // CHECK20: cond.true:
16216 // CHECK20-NEXT: br label [[COND_END:%.*]]
16217 // CHECK20: cond.false:
16218 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16219 // CHECK20-NEXT: br label [[COND_END]]
16220 // CHECK20: cond.end:
16221 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
16222 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
16223 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16224 // CHECK20-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
16225 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16226 // CHECK20: omp.inner.for.cond:
16227 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16228 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16229 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
16230 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16231 // CHECK20: omp.inner.for.body:
16232 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16233 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
16234 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16235 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4
16236 // CHECK20-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 4
16237 // CHECK20-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32
16238 // CHECK20-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1
16239 // CHECK20-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16
16240 // CHECK20-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 4
16241 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16242 // CHECK20: omp.body.continue:
16243 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16244 // CHECK20: omp.inner.for.inc:
16245 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16246 // CHECK20-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1
16247 // CHECK20-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
16248 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]]
16249 // CHECK20: omp.inner.for.end:
16250 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
16251 // CHECK20: omp.loop.exit:
16252 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
16253 // CHECK20-NEXT: ret void
16254 //
16255 //
16256 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120
16257 // CHECK20-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR2]] {
16258 // CHECK20-NEXT: entry:
16259 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
16260 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
16261 // CHECK20-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
16262 // CHECK20-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
16263 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
16264 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
16265 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
16266 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
16267 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4
16268 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
16269 // CHECK20-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV]], align 4
16270 // CHECK20-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
16271 // CHECK20-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2
16272 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4
16273 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]])
16274 // CHECK20-NEXT: ret void
16275 //
16276 //
16277 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..6
16278 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR2]] {
16279 // CHECK20-NEXT: entry:
16280 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16281 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16282 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
16283 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
16284 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16285 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
16286 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16287 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16288 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16289 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16290 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
16291 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16292 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16293 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
16294 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
16295 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
16296 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
16297 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
16298 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16299 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16300 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16301 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
16302 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16303 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16304 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
16305 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16306 // CHECK20: cond.true:
16307 // CHECK20-NEXT: br label [[COND_END:%.*]]
16308 // CHECK20: cond.false:
16309 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16310 // CHECK20-NEXT: br label [[COND_END]]
16311 // CHECK20: cond.end:
16312 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
16313 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
16314 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16315 // CHECK20-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
16316 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16317 // CHECK20: omp.inner.for.cond:
16318 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16319 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16320 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
16321 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16322 // CHECK20: omp.inner.for.body:
16323 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16324 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
16325 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16326 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4
16327 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4
16328 // CHECK20-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
16329 // CHECK20-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4
16330 // CHECK20-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV]], align 4
16331 // CHECK20-NEXT: [[CONV3:%.*]] = sext i16 [[TMP9]] to i32
16332 // CHECK20-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1
16333 // CHECK20-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16
16334 // CHECK20-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 4
16335 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16336 // CHECK20: omp.body.continue:
16337 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16338 // CHECK20: omp.inner.for.inc:
16339 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16340 // CHECK20-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1
16341 // CHECK20-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
16342 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]]
16343 // CHECK20: omp.inner.for.end:
16344 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
16345 // CHECK20: omp.loop.exit:
16346 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
16347 // CHECK20-NEXT: ret void
16348 //
16349 //
16350 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145
16351 // CHECK20-SAME: (i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
16352 // CHECK20-NEXT: entry:
16353 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
16354 // CHECK20-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4
16355 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
16356 // CHECK20-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4
16357 // CHECK20-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4
16358 // CHECK20-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
16359 // CHECK20-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4
16360 // CHECK20-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4
16361 // CHECK20-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4
16362 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
16363 // CHECK20-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
16364 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
16365 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
16366 // CHECK20-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4
16367 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
16368 // CHECK20-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4
16369 // CHECK20-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4
16370 // CHECK20-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
16371 // CHECK20-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4
16372 // CHECK20-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4
16373 // CHECK20-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4
16374 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16375 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4
16376 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
16377 // CHECK20-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4
16378 // CHECK20-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4
16379 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
16380 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4
16381 // CHECK20-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4
16382 // CHECK20-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4
16383 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4
16384 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[A_CASTED]], align 4
16385 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_CASTED]], align 4
16386 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16387 // CHECK20-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16388 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16389 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [10 x float]*, i32, float*, [5 x [10 x double]]*, i32, i32, double*, %struct.TT*, i32)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP9]], [10 x float]* [[TMP0]], i32 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i32 [[TMP4]], i32 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i32 [[TMP11]])
16390 // CHECK20-NEXT: ret void
16391 //
16392 //
16393 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..9
16394 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
16395 // CHECK20-NEXT: entry:
16396 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16397 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16398 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
16399 // CHECK20-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4
16400 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
16401 // CHECK20-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4
16402 // CHECK20-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4
16403 // CHECK20-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
16404 // CHECK20-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4
16405 // CHECK20-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4
16406 // CHECK20-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4
16407 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
16408 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16409 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
16410 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16411 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16412 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16413 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16414 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
16415 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16416 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16417 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
16418 // CHECK20-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4
16419 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
16420 // CHECK20-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4
16421 // CHECK20-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4
16422 // CHECK20-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
16423 // CHECK20-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4
16424 // CHECK20-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4
16425 // CHECK20-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4
16426 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16427 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4
16428 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
16429 // CHECK20-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4
16430 // CHECK20-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4
16431 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
16432 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4
16433 // CHECK20-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4
16434 // CHECK20-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4
16435 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
16436 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
16437 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16438 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16439 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16440 // CHECK20-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16441 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
16442 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]])
16443 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
16444 // CHECK20: omp.dispatch.cond:
16445 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16446 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9
16447 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16448 // CHECK20: cond.true:
16449 // CHECK20-NEXT: br label [[COND_END:%.*]]
16450 // CHECK20: cond.false:
16451 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16452 // CHECK20-NEXT: br label [[COND_END]]
16453 // CHECK20: cond.end:
16454 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
16455 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
16456 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16457 // CHECK20-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
16458 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16459 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16460 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
16461 // CHECK20-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16462 // CHECK20: omp.dispatch.body:
16463 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16464 // CHECK20: omp.inner.for.cond:
16465 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
16466 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !23
16467 // CHECK20-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
16468 // CHECK20-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16469 // CHECK20: omp.inner.for.body:
16470 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
16471 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
16472 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16473 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !23
16474 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group !23
16475 // CHECK20-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
16476 // CHECK20-NEXT: store i32 [[ADD7]], i32* [[A_ADDR]], align 4, !llvm.access.group !23
16477 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i32 0, i32 2
16478 // CHECK20-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !23
16479 // CHECK20-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double
16480 // CHECK20-NEXT: [[ADD8:%.*]] = fadd double [[CONV]], 1.000000e+00
16481 // CHECK20-NEXT: [[CONV9:%.*]] = fptrunc double [[ADD8]] to float
16482 // CHECK20-NEXT: store float [[CONV9]], float* [[ARRAYIDX]], align 4, !llvm.access.group !23
16483 // CHECK20-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, float* [[TMP2]], i32 3
16484 // CHECK20-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX10]], align 4, !llvm.access.group !23
16485 // CHECK20-NEXT: [[CONV11:%.*]] = fpext float [[TMP21]] to double
16486 // CHECK20-NEXT: [[ADD12:%.*]] = fadd double [[CONV11]], 1.000000e+00
16487 // CHECK20-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float
16488 // CHECK20-NEXT: store float [[CONV13]], float* [[ARRAYIDX10]], align 4, !llvm.access.group !23
16489 // CHECK20-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i32 0, i32 1
16490 // CHECK20-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX14]], i32 0, i32 2
16491 // CHECK20-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX15]], align 8, !llvm.access.group !23
16492 // CHECK20-NEXT: [[ADD16:%.*]] = fadd double [[TMP22]], 1.000000e+00
16493 // CHECK20-NEXT: store double [[ADD16]], double* [[ARRAYIDX15]], align 8, !llvm.access.group !23
16494 // CHECK20-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP5]]
16495 // CHECK20-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP6]], i32 [[TMP23]]
16496 // CHECK20-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX17]], i32 3
16497 // CHECK20-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX18]], align 8, !llvm.access.group !23
16498 // CHECK20-NEXT: [[ADD19:%.*]] = fadd double [[TMP24]], 1.000000e+00
16499 // CHECK20-NEXT: store double [[ADD19]], double* [[ARRAYIDX18]], align 8, !llvm.access.group !23
16500 // CHECK20-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0
16501 // CHECK20-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4, !llvm.access.group !23
16502 // CHECK20-NEXT: [[ADD20:%.*]] = add nsw i64 [[TMP25]], 1
16503 // CHECK20-NEXT: store i64 [[ADD20]], i64* [[X]], align 4, !llvm.access.group !23
16504 // CHECK20-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1
16505 // CHECK20-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4, !llvm.access.group !23
16506 // CHECK20-NEXT: [[CONV21:%.*]] = sext i8 [[TMP26]] to i32
16507 // CHECK20-NEXT: [[ADD22:%.*]] = add nsw i32 [[CONV21]], 1
16508 // CHECK20-NEXT: [[CONV23:%.*]] = trunc i32 [[ADD22]] to i8
16509 // CHECK20-NEXT: store i8 [[CONV23]], i8* [[Y]], align 4, !llvm.access.group !23
16510 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16511 // CHECK20: omp.body.continue:
16512 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16513 // CHECK20: omp.inner.for.inc:
16514 // CHECK20-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
16515 // CHECK20-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP27]], 1
16516 // CHECK20-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
16517 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
16518 // CHECK20: omp.inner.for.end:
16519 // CHECK20-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
16520 // CHECK20: omp.dispatch.inc:
16521 // CHECK20-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16522 // CHECK20-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16523 // CHECK20-NEXT: [[ADD25:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
16524 // CHECK20-NEXT: store i32 [[ADD25]], i32* [[DOTOMP_LB]], align 4
16525 // CHECK20-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16526 // CHECK20-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16527 // CHECK20-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
16528 // CHECK20-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_UB]], align 4
16529 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND]]
16530 // CHECK20: omp.dispatch.end:
16531 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]])
16532 // CHECK20-NEXT: ret void
16533 //
16534 //
16535 // CHECK20-LABEL: define {{[^@]+}}@_Z3bari
16536 // CHECK20-SAME: (i32 [[N:%.*]]) #[[ATTR0]] {
16537 // CHECK20-NEXT: entry:
16538 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
16539 // CHECK20-NEXT: [[A:%.*]] = alloca i32, align 4
16540 // CHECK20-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4
16541 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
16542 // CHECK20-NEXT: store i32 0, i32* [[A]], align 4
16543 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
16544 // CHECK20-NEXT: [[CALL:%.*]] = call i32 @_Z3fooi(i32 [[TMP0]])
16545 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
16546 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
16547 // CHECK20-NEXT: store i32 [[ADD]], i32* [[A]], align 4
16548 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
16549 // CHECK20-NEXT: [[CALL1:%.*]] = call i32 @_ZN2S12r1Ei(%struct.S1* nonnull align 4 dereferenceable(8) [[S]], i32 [[TMP2]])
16550 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4
16551 // CHECK20-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]]
16552 // CHECK20-NEXT: store i32 [[ADD2]], i32* [[A]], align 4
16553 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
16554 // CHECK20-NEXT: [[CALL3:%.*]] = call i32 @_ZL7fstatici(i32 [[TMP4]])
16555 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[A]], align 4
16556 // CHECK20-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]]
16557 // CHECK20-NEXT: store i32 [[ADD4]], i32* [[A]], align 4
16558 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
16559 // CHECK20-NEXT: [[CALL5:%.*]] = call i32 @_Z9ftemplateIiET_i(i32 [[TMP6]])
16560 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[A]], align 4
16561 // CHECK20-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP7]], [[CALL5]]
16562 // CHECK20-NEXT: store i32 [[ADD6]], i32* [[A]], align 4
16563 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[A]], align 4
16564 // CHECK20-NEXT: ret i32 [[TMP8]]
16565 //
16566 //
16567 // CHECK20-LABEL: define {{[^@]+}}@_ZN2S12r1Ei
16568 // CHECK20-SAME: (%struct.S1* nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 [[N:%.*]]) #[[ATTR0]] comdat align 2 {
16569 // CHECK20-NEXT: entry:
16570 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
16571 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
16572 // CHECK20-NEXT: [[B:%.*]] = alloca i32, align 4
16573 // CHECK20-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
16574 // CHECK20-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
16575 // CHECK20-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4
16576 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
16577 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
16578 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
16579 // CHECK20-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4
16580 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
16581 // CHECK20-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
16582 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
16583 // CHECK20-NEXT: [[THIS1:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
16584 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
16585 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
16586 // CHECK20-NEXT: store i32 [[ADD]], i32* [[B]], align 4
16587 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
16588 // CHECK20-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
16589 // CHECK20-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4
16590 // CHECK20-NEXT: [[TMP3:%.*]] = mul nuw i32 2, [[TMP1]]
16591 // CHECK20-NEXT: [[VLA:%.*]] = alloca i16, i32 [[TMP3]], align 2
16592 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR0]], align 4
16593 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[B]], align 4
16594 // CHECK20-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4
16595 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4
16596 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
16597 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 60
16598 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
16599 // CHECK20: omp_if.then:
16600 // CHECK20-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[THIS1]], i32 0, i32 0
16601 // CHECK20-NEXT: [[TMP7:%.*]] = mul nuw i32 2, [[TMP1]]
16602 // CHECK20-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP7]], 2
16603 // CHECK20-NEXT: [[TMP9:%.*]] = sext i32 [[TMP8]] to i64
16604 // CHECK20-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
16605 // CHECK20-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to %struct.S1**
16606 // CHECK20-NEXT: store %struct.S1* [[THIS1]], %struct.S1** [[TMP11]], align 4
16607 // CHECK20-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
16608 // CHECK20-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to double**
16609 // CHECK20-NEXT: store double* [[A]], double** [[TMP13]], align 4
16610 // CHECK20-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
16611 // CHECK20-NEXT: store i64 8, i64* [[TMP14]], align 4
16612 // CHECK20-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
16613 // CHECK20-NEXT: store i8* null, i8** [[TMP15]], align 4
16614 // CHECK20-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
16615 // CHECK20-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
16616 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[TMP17]], align 4
16617 // CHECK20-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
16618 // CHECK20-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32*
16619 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[TMP19]], align 4
16620 // CHECK20-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
16621 // CHECK20-NEXT: store i64 4, i64* [[TMP20]], align 4
16622 // CHECK20-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
16623 // CHECK20-NEXT: store i8* null, i8** [[TMP21]], align 4
16624 // CHECK20-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
16625 // CHECK20-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
16626 // CHECK20-NEXT: store i32 2, i32* [[TMP23]], align 4
16627 // CHECK20-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
16628 // CHECK20-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32*
16629 // CHECK20-NEXT: store i32 2, i32* [[TMP25]], align 4
16630 // CHECK20-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
16631 // CHECK20-NEXT: store i64 4, i64* [[TMP26]], align 4
16632 // CHECK20-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
16633 // CHECK20-NEXT: store i8* null, i8** [[TMP27]], align 4
16634 // CHECK20-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
16635 // CHECK20-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32*
16636 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP29]], align 4
16637 // CHECK20-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
16638 // CHECK20-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i32*
16639 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP31]], align 4
16640 // CHECK20-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
16641 // CHECK20-NEXT: store i64 4, i64* [[TMP32]], align 4
16642 // CHECK20-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
16643 // CHECK20-NEXT: store i8* null, i8** [[TMP33]], align 4
16644 // CHECK20-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
16645 // CHECK20-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i16**
16646 // CHECK20-NEXT: store i16* [[VLA]], i16** [[TMP35]], align 4
16647 // CHECK20-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
16648 // CHECK20-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i16**
16649 // CHECK20-NEXT: store i16* [[VLA]], i16** [[TMP37]], align 4
16650 // CHECK20-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
16651 // CHECK20-NEXT: store i64 [[TMP9]], i64* [[TMP38]], align 4
16652 // CHECK20-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
16653 // CHECK20-NEXT: store i8* null, i8** [[TMP39]], align 4
16654 // CHECK20-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
16655 // CHECK20-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
16656 // CHECK20-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
16657 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
16658 // CHECK20-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218.region_id, i32 5, i8** [[TMP40]], i8** [[TMP41]], i64* [[TMP42]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
16659 // CHECK20-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
16660 // CHECK20-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
16661 // CHECK20: omp_offload.failed:
16662 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]]
16663 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]]
16664 // CHECK20: omp_offload.cont:
16665 // CHECK20-NEXT: br label [[OMP_IF_END:%.*]]
16666 // CHECK20: omp_if.else:
16667 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218(%struct.S1* [[THIS1]], i32 [[TMP5]], i32 2, i32 [[TMP1]], i16* [[VLA]]) #[[ATTR3]]
16668 // CHECK20-NEXT: br label [[OMP_IF_END]]
16669 // CHECK20: omp_if.end:
16670 // CHECK20-NEXT: [[TMP45:%.*]] = mul nsw i32 1, [[TMP1]]
16671 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[VLA]], i32 [[TMP45]]
16672 // CHECK20-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1
16673 // CHECK20-NEXT: [[TMP46:%.*]] = load i16, i16* [[ARRAYIDX2]], align 2
16674 // CHECK20-NEXT: [[CONV:%.*]] = sext i16 [[TMP46]] to i32
16675 // CHECK20-NEXT: [[TMP47:%.*]] = load i32, i32* [[B]], align 4
16676 // CHECK20-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV]], [[TMP47]]
16677 // CHECK20-NEXT: [[TMP48:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
16678 // CHECK20-NEXT: call void @llvm.stackrestore(i8* [[TMP48]])
16679 // CHECK20-NEXT: ret i32 [[ADD3]]
16680 //
16681 //
16682 // CHECK20-LABEL: define {{[^@]+}}@_ZL7fstatici
16683 // CHECK20-SAME: (i32 [[N:%.*]]) #[[ATTR0]] {
16684 // CHECK20-NEXT: entry:
16685 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
16686 // CHECK20-NEXT: [[A:%.*]] = alloca i32, align 4
16687 // CHECK20-NEXT: [[AA:%.*]] = alloca i16, align 2
16688 // CHECK20-NEXT: [[AAA:%.*]] = alloca i8, align 1
16689 // CHECK20-NEXT: [[B:%.*]] = alloca [10 x i32], align 4
16690 // CHECK20-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
16691 // CHECK20-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
16692 // CHECK20-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
16693 // CHECK20-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4
16694 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
16695 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
16696 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
16697 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
16698 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
16699 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
16700 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
16701 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
16702 // CHECK20-NEXT: store i32 0, i32* [[A]], align 4
16703 // CHECK20-NEXT: store i16 0, i16* [[AA]], align 2
16704 // CHECK20-NEXT: store i8 0, i8* [[AAA]], align 1
16705 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
16706 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[N_CASTED]], align 4
16707 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_CASTED]], align 4
16708 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4
16709 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[A_CASTED]], align 4
16710 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_CASTED]], align 4
16711 // CHECK20-NEXT: [[TMP4:%.*]] = load i16, i16* [[AA]], align 2
16712 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
16713 // CHECK20-NEXT: store i16 [[TMP4]], i16* [[CONV]], align 2
16714 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[AA_CASTED]], align 4
16715 // CHECK20-NEXT: [[TMP6:%.*]] = load i8, i8* [[AAA]], align 1
16716 // CHECK20-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_CASTED]] to i8*
16717 // CHECK20-NEXT: store i8 [[TMP6]], i8* [[CONV1]], align 1
16718 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[AAA_CASTED]], align 4
16719 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[N_ADDR]], align 4
16720 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 50
16721 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
16722 // CHECK20: omp_if.then:
16723 // CHECK20-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
16724 // CHECK20-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
16725 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP10]], align 4
16726 // CHECK20-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
16727 // CHECK20-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
16728 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP12]], align 4
16729 // CHECK20-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
16730 // CHECK20-NEXT: store i8* null, i8** [[TMP13]], align 4
16731 // CHECK20-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
16732 // CHECK20-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
16733 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP15]], align 4
16734 // CHECK20-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
16735 // CHECK20-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
16736 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP17]], align 4
16737 // CHECK20-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
16738 // CHECK20-NEXT: store i8* null, i8** [[TMP18]], align 4
16739 // CHECK20-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
16740 // CHECK20-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32*
16741 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[TMP20]], align 4
16742 // CHECK20-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
16743 // CHECK20-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to i32*
16744 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[TMP22]], align 4
16745 // CHECK20-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
16746 // CHECK20-NEXT: store i8* null, i8** [[TMP23]], align 4
16747 // CHECK20-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
16748 // CHECK20-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32*
16749 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[TMP25]], align 4
16750 // CHECK20-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
16751 // CHECK20-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32*
16752 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[TMP27]], align 4
16753 // CHECK20-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
16754 // CHECK20-NEXT: store i8* null, i8** [[TMP28]], align 4
16755 // CHECK20-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
16756 // CHECK20-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [10 x i32]**
16757 // CHECK20-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP30]], align 4
16758 // CHECK20-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
16759 // CHECK20-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to [10 x i32]**
16760 // CHECK20-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP32]], align 4
16761 // CHECK20-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
16762 // CHECK20-NEXT: store i8* null, i8** [[TMP33]], align 4
16763 // CHECK20-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
16764 // CHECK20-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
16765 // CHECK20-NEXT: [[TMP36:%.*]] = load i32, i32* [[A]], align 4
16766 // CHECK20-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4
16767 // CHECK20-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4
16768 // CHECK20-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_2]], align 4
16769 // CHECK20-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
16770 // CHECK20-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
16771 // CHECK20-NEXT: [[SUB:%.*]] = sub i32 [[TMP38]], [[TMP39]]
16772 // CHECK20-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1
16773 // CHECK20-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1
16774 // CHECK20-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
16775 // CHECK20-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1
16776 // CHECK20-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
16777 // CHECK20-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
16778 // CHECK20-NEXT: [[ADD6:%.*]] = add i32 [[TMP40]], 1
16779 // CHECK20-NEXT: [[TMP41:%.*]] = zext i32 [[ADD6]] to i64
16780 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP41]])
16781 // CHECK20-NEXT: [[TMP42:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
16782 // CHECK20-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
16783 // CHECK20-NEXT: br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
16784 // CHECK20: omp_offload.failed:
16785 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], i32 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]]
16786 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]]
16787 // CHECK20: omp_offload.cont:
16788 // CHECK20-NEXT: br label [[OMP_IF_END:%.*]]
16789 // CHECK20: omp_if.else:
16790 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200(i32 [[TMP1]], i32 [[TMP3]], i32 [[TMP5]], i32 [[TMP7]], [10 x i32]* [[B]]) #[[ATTR3]]
16791 // CHECK20-NEXT: br label [[OMP_IF_END]]
16792 // CHECK20: omp_if.end:
16793 // CHECK20-NEXT: [[TMP44:%.*]] = load i32, i32* [[A]], align 4
16794 // CHECK20-NEXT: ret i32 [[TMP44]]
16795 //
16796 //
16797 // CHECK20-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i
16798 // CHECK20-SAME: (i32 [[N:%.*]]) #[[ATTR0]] comdat {
16799 // CHECK20-NEXT: entry:
16800 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
16801 // CHECK20-NEXT: [[A:%.*]] = alloca i32, align 4
16802 // CHECK20-NEXT: [[AA:%.*]] = alloca i16, align 2
16803 // CHECK20-NEXT: [[B:%.*]] = alloca [10 x i32], align 4
16804 // CHECK20-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
16805 // CHECK20-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
16806 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
16807 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
16808 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
16809 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
16810 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
16811 // CHECK20-NEXT: store i32 0, i32* [[A]], align 4
16812 // CHECK20-NEXT: store i16 0, i16* [[AA]], align 2
16813 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4
16814 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4
16815 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
16816 // CHECK20-NEXT: [[TMP2:%.*]] = load i16, i16* [[AA]], align 2
16817 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
16818 // CHECK20-NEXT: store i16 [[TMP2]], i16* [[CONV]], align 2
16819 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4
16820 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_ADDR]], align 4
16821 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 40
16822 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
16823 // CHECK20: omp_if.then:
16824 // CHECK20-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
16825 // CHECK20-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32*
16826 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP6]], align 4
16827 // CHECK20-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
16828 // CHECK20-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
16829 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4
16830 // CHECK20-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
16831 // CHECK20-NEXT: store i8* null, i8** [[TMP9]], align 4
16832 // CHECK20-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
16833 // CHECK20-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32*
16834 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP11]], align 4
16835 // CHECK20-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
16836 // CHECK20-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
16837 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4
16838 // CHECK20-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
16839 // CHECK20-NEXT: store i8* null, i8** [[TMP14]], align 4
16840 // CHECK20-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
16841 // CHECK20-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [10 x i32]**
16842 // CHECK20-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP16]], align 4
16843 // CHECK20-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
16844 // CHECK20-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [10 x i32]**
16845 // CHECK20-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[TMP18]], align 4
16846 // CHECK20-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
16847 // CHECK20-NEXT: store i8* null, i8** [[TMP19]], align 4
16848 // CHECK20-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
16849 // CHECK20-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
16850 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
16851 // CHECK20-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183.region_id, i32 3, i8** [[TMP20]], i8** [[TMP21]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.17, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.18, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
16852 // CHECK20-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
16853 // CHECK20-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
16854 // CHECK20: omp_offload.failed:
16855 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]]
16856 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]]
16857 // CHECK20: omp_offload.cont:
16858 // CHECK20-NEXT: br label [[OMP_IF_END:%.*]]
16859 // CHECK20: omp_if.else:
16860 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[B]]) #[[ATTR3]]
16861 // CHECK20-NEXT: br label [[OMP_IF_END]]
16862 // CHECK20: omp_if.end:
16863 // CHECK20-NEXT: [[TMP24:%.*]] = load i32, i32* [[A]], align 4
16864 // CHECK20-NEXT: ret i32 [[TMP24]]
16865 //
16866 //
16867 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218
16868 // CHECK20-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] {
16869 // CHECK20-NEXT: entry:
16870 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
16871 // CHECK20-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
16872 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
16873 // CHECK20-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
16874 // CHECK20-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4
16875 // CHECK20-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4
16876 // CHECK20-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
16877 // CHECK20-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4
16878 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
16879 // CHECK20-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
16880 // CHECK20-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4
16881 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
16882 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
16883 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
16884 // CHECK20-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4
16885 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[B_ADDR]], align 4
16886 // CHECK20-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4
16887 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4
16888 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32, i32, i32, i16*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i32 [[TMP5]], i32 [[TMP1]], i32 [[TMP2]], i16* [[TMP3]])
16889 // CHECK20-NEXT: ret void
16890 //
16891 //
16892 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..11
16893 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR2]] {
16894 // CHECK20-NEXT: entry:
16895 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16896 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16897 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
16898 // CHECK20-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
16899 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
16900 // CHECK20-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
16901 // CHECK20-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4
16902 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16903 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
16904 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16905 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16906 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16907 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16908 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
16909 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16910 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16911 // CHECK20-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
16912 // CHECK20-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4
16913 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
16914 // CHECK20-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
16915 // CHECK20-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4
16916 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
16917 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
16918 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
16919 // CHECK20-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4
16920 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
16921 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
16922 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16923 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16924 // CHECK20-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16925 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
16926 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16927 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16928 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9
16929 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16930 // CHECK20: cond.true:
16931 // CHECK20-NEXT: br label [[COND_END:%.*]]
16932 // CHECK20: cond.false:
16933 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16934 // CHECK20-NEXT: br label [[COND_END]]
16935 // CHECK20: cond.end:
16936 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
16937 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
16938 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16939 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
16940 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16941 // CHECK20: omp.inner.for.cond:
16942 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16943 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16944 // CHECK20-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
16945 // CHECK20-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16946 // CHECK20: omp.inner.for.body:
16947 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16948 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
16949 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16950 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4
16951 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[B_ADDR]], align 4
16952 // CHECK20-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP12]] to double
16953 // CHECK20-NEXT: [[ADD4:%.*]] = fadd double [[CONV]], 1.500000e+00
16954 // CHECK20-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
16955 // CHECK20-NEXT: store double [[ADD4]], double* [[A]], align 4
16956 // CHECK20-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0
16957 // CHECK20-NEXT: [[TMP13:%.*]] = load double, double* [[A5]], align 4
16958 // CHECK20-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00
16959 // CHECK20-NEXT: store double [[INC]], double* [[A5]], align 4
16960 // CHECK20-NEXT: [[CONV6:%.*]] = fptosi double [[INC]] to i16
16961 // CHECK20-NEXT: [[TMP14:%.*]] = mul nsw i32 1, [[TMP2]]
16962 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i32 [[TMP14]]
16963 // CHECK20-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1
16964 // CHECK20-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX7]], align 2
16965 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16966 // CHECK20: omp.body.continue:
16967 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16968 // CHECK20: omp.inner.for.inc:
16969 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16970 // CHECK20-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
16971 // CHECK20-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
16972 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]]
16973 // CHECK20: omp.inner.for.end:
16974 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
16975 // CHECK20: omp.loop.exit:
16976 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
16977 // CHECK20-NEXT: ret void
16978 //
16979 //
16980 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200
16981 // CHECK20-SAME: (i32 [[N:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
16982 // CHECK20-NEXT: entry:
16983 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
16984 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
16985 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
16986 // CHECK20-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4
16987 // CHECK20-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
16988 // CHECK20-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
16989 // CHECK20-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
16990 // CHECK20-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
16991 // CHECK20-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4
16992 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
16993 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
16994 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
16995 // CHECK20-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4
16996 // CHECK20-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
16997 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
16998 // CHECK20-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8*
16999 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
17000 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
17001 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4
17002 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4
17003 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4
17004 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[A_CASTED]], align 4
17005 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4
17006 // CHECK20-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV]], align 4
17007 // CHECK20-NEXT: [[CONV2:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
17008 // CHECK20-NEXT: store i16 [[TMP5]], i16* [[CONV2]], align 2
17009 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[AA_CASTED]], align 4
17010 // CHECK20-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV1]], align 4
17011 // CHECK20-NEXT: [[CONV3:%.*]] = bitcast i32* [[AAA_CASTED]] to i8*
17012 // CHECK20-NEXT: store i8 [[TMP7]], i8* [[CONV3]], align 1
17013 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[AAA_CASTED]], align 4
17014 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP8]], [10 x i32]* [[TMP0]])
17015 // CHECK20-NEXT: ret void
17016 //
17017 //
17018 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..13
17019 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
17020 // CHECK20-NEXT: entry:
17021 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
17022 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
17023 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
17024 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
17025 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
17026 // CHECK20-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4
17027 // CHECK20-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
17028 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17029 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
17030 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
17031 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
17032 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
17033 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
17034 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
17035 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
17036 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17037 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17038 // CHECK20-NEXT: [[I6:%.*]] = alloca i32, align 4
17039 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
17040 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
17041 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
17042 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
17043 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
17044 // CHECK20-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4
17045 // CHECK20-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
17046 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
17047 // CHECK20-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8*
17048 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
17049 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
17050 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
17051 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
17052 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
17053 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
17054 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17055 // CHECK20-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]]
17056 // CHECK20-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1
17057 // CHECK20-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1
17058 // CHECK20-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
17059 // CHECK20-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1
17060 // CHECK20-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
17061 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17062 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[I]], align 4
17063 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17064 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
17065 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]]
17066 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
17067 // CHECK20: omp.precond.then:
17068 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
17069 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
17070 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
17071 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17072 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17073 // CHECK20-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
17074 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
17075 // CHECK20-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17076 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17077 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
17078 // CHECK20-NEXT: [[CMP7:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]]
17079 // CHECK20-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17080 // CHECK20: cond.true:
17081 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
17082 // CHECK20-NEXT: br label [[COND_END:%.*]]
17083 // CHECK20: cond.false:
17084 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17085 // CHECK20-NEXT: br label [[COND_END]]
17086 // CHECK20: cond.end:
17087 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
17088 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
17089 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17090 // CHECK20-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
17091 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17092 // CHECK20: omp.inner.for.cond:
17093 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17094 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17095 // CHECK20-NEXT: [[ADD8:%.*]] = add i32 [[TMP17]], 1
17096 // CHECK20-NEXT: [[CMP9:%.*]] = icmp ult i32 [[TMP16]], [[ADD8]]
17097 // CHECK20-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17098 // CHECK20: omp.inner.for.body:
17099 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17100 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17101 // CHECK20-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1
17102 // CHECK20-NEXT: [[ADD10:%.*]] = add i32 [[TMP18]], [[MUL]]
17103 // CHECK20-NEXT: store i32 [[ADD10]], i32* [[I6]], align 4
17104 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[A_ADDR]], align 4
17105 // CHECK20-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1
17106 // CHECK20-NEXT: store i32 [[ADD11]], i32* [[A_ADDR]], align 4
17107 // CHECK20-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV]], align 4
17108 // CHECK20-NEXT: [[CONV12:%.*]] = sext i16 [[TMP21]] to i32
17109 // CHECK20-NEXT: [[ADD13:%.*]] = add nsw i32 [[CONV12]], 1
17110 // CHECK20-NEXT: [[CONV14:%.*]] = trunc i32 [[ADD13]] to i16
17111 // CHECK20-NEXT: store i16 [[CONV14]], i16* [[CONV]], align 4
17112 // CHECK20-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV1]], align 4
17113 // CHECK20-NEXT: [[CONV15:%.*]] = sext i8 [[TMP22]] to i32
17114 // CHECK20-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV15]], 1
17115 // CHECK20-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i8
17116 // CHECK20-NEXT: store i8 [[CONV17]], i8* [[CONV1]], align 4
17117 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2
17118 // CHECK20-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
17119 // CHECK20-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], 1
17120 // CHECK20-NEXT: store i32 [[ADD18]], i32* [[ARRAYIDX]], align 4
17121 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17122 // CHECK20: omp.body.continue:
17123 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17124 // CHECK20: omp.inner.for.inc:
17125 // CHECK20-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17126 // CHECK20-NEXT: [[ADD19:%.*]] = add i32 [[TMP24]], 1
17127 // CHECK20-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4
17128 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]]
17129 // CHECK20: omp.inner.for.end:
17130 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
17131 // CHECK20: omp.loop.exit:
17132 // CHECK20-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
17133 // CHECK20-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
17134 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
17135 // CHECK20-NEXT: br label [[OMP_PRECOND_END]]
17136 // CHECK20: omp.precond.end:
17137 // CHECK20-NEXT: ret void
17138 //
17139 //
17140 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183
17141 // CHECK20-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
17142 // CHECK20-NEXT: entry:
17143 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
17144 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
17145 // CHECK20-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
17146 // CHECK20-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
17147 // CHECK20-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
17148 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
17149 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
17150 // CHECK20-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
17151 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
17152 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
17153 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
17154 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[A_CASTED]], align 4
17155 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4
17156 // CHECK20-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4
17157 // CHECK20-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
17158 // CHECK20-NEXT: store i16 [[TMP3]], i16* [[CONV1]], align 2
17159 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4
17160 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..16 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], [10 x i32]* [[TMP0]])
17161 // CHECK20-NEXT: ret void
17162 //
17163 //
17164 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..16
17165 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR2]] {
17166 // CHECK20-NEXT: entry:
17167 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
17168 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
17169 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
17170 // CHECK20-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
17171 // CHECK20-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
17172 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17173 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
17174 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
17175 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
17176 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17177 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17178 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
17179 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
17180 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
17181 // CHECK20-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
17182 // CHECK20-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
17183 // CHECK20-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
17184 // CHECK20-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
17185 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
17186 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
17187 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
17188 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17189 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17190 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
17191 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
17192 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17193 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17194 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
17195 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17196 // CHECK20: cond.true:
17197 // CHECK20-NEXT: br label [[COND_END:%.*]]
17198 // CHECK20: cond.false:
17199 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17200 // CHECK20-NEXT: br label [[COND_END]]
17201 // CHECK20: cond.end:
17202 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
17203 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
17204 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17205 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
17206 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17207 // CHECK20: omp.inner.for.cond:
17208 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17209 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17210 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
17211 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17212 // CHECK20: omp.inner.for.body:
17213 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17214 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
17215 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17216 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4
17217 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4
17218 // CHECK20-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1
17219 // CHECK20-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4
17220 // CHECK20-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV]], align 4
17221 // CHECK20-NEXT: [[CONV3:%.*]] = sext i16 [[TMP10]] to i32
17222 // CHECK20-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1
17223 // CHECK20-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16
17224 // CHECK20-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 4
17225 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2
17226 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
17227 // CHECK20-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], 1
17228 // CHECK20-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4
17229 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17230 // CHECK20: omp.body.continue:
17231 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17232 // CHECK20: omp.inner.for.inc:
17233 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17234 // CHECK20-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1
17235 // CHECK20-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
17236 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]]
17237 // CHECK20: omp.inner.for.end:
17238 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
17239 // CHECK20: omp.loop.exit:
17240 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
17241 // CHECK20-NEXT: ret void
17242 //
17243 //
17244 // CHECK20-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
17245 // CHECK20-SAME: () #[[ATTR4]] {
17246 // CHECK20-NEXT: entry:
17247 // CHECK20-NEXT: call void @__tgt_register_requires(i64 1)
17248 // CHECK20-NEXT: ret void
17249 //
17250 //
17251 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103
17252 // CHECK25-SAME: (i64 [[AA:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]], i64 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] {
17253 // CHECK25-NEXT: entry:
17254 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
17255 // CHECK25-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
17256 // CHECK25-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8
17257 // CHECK25-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
17258 // CHECK25-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
17259 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
17260 // CHECK25-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
17261 // CHECK25-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8
17262 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
17263 // CHECK25-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
17264 // CHECK25-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32*
17265 // CHECK25-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV3]], align 8
17266 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV4]], align 8
17267 // CHECK25-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]])
17268 // CHECK25-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 8
17269 // CHECK25-NEXT: [[CONV5:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
17270 // CHECK25-NEXT: store i16 [[TMP3]], i16* [[CONV5]], align 2
17271 // CHECK25-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8
17272 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP4]])
17273 // CHECK25-NEXT: ret void
17274 //
17275 //
17276 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined.
17277 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[AA:%.*]]) #[[ATTR0]] {
17278 // CHECK25-NEXT: entry:
17279 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
17280 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
17281 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
17282 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17283 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4
17284 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
17285 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
17286 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17287 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17288 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4
17289 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
17290 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
17291 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
17292 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
17293 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
17294 // CHECK25-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
17295 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17296 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17297 // CHECK25-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17298 // CHECK25-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
17299 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17300 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17301 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
17302 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17303 // CHECK25: cond.true:
17304 // CHECK25-NEXT: br label [[COND_END:%.*]]
17305 // CHECK25: cond.false:
17306 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17307 // CHECK25-NEXT: br label [[COND_END]]
17308 // CHECK25: cond.end:
17309 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
17310 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
17311 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17312 // CHECK25-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
17313 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17314 // CHECK25: omp.inner.for.cond:
17315 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17316 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17317 // CHECK25-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
17318 // CHECK25-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17319 // CHECK25: omp.inner.for.body:
17320 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17321 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
17322 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17323 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I]], align 4
17324 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17325 // CHECK25: omp.body.continue:
17326 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17327 // CHECK25: omp.inner.for.inc:
17328 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17329 // CHECK25-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
17330 // CHECK25-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
17331 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]]
17332 // CHECK25: omp.inner.for.end:
17333 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
17334 // CHECK25: omp.loop.exit:
17335 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
17336 // CHECK25-NEXT: ret void
17337 //
17338 //
17339 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113
17340 // CHECK25-SAME: (i64 [[AA:%.*]]) #[[ATTR0]] {
17341 // CHECK25-NEXT: entry:
17342 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
17343 // CHECK25-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
17344 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
17345 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
17346 // CHECK25-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 8
17347 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
17348 // CHECK25-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2
17349 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[AA_CASTED]], align 8
17350 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP1]])
17351 // CHECK25-NEXT: ret void
17352 //
17353 //
17354 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..1
17355 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[AA:%.*]]) #[[ATTR0]] {
17356 // CHECK25-NEXT: entry:
17357 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
17358 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
17359 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
17360 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17361 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4
17362 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
17363 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
17364 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17365 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17366 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4
17367 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
17368 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
17369 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
17370 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
17371 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
17372 // CHECK25-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
17373 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17374 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17375 // CHECK25-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17376 // CHECK25-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
17377 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17378 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17379 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
17380 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17381 // CHECK25: cond.true:
17382 // CHECK25-NEXT: br label [[COND_END:%.*]]
17383 // CHECK25: cond.false:
17384 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17385 // CHECK25-NEXT: br label [[COND_END]]
17386 // CHECK25: cond.end:
17387 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
17388 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
17389 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17390 // CHECK25-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
17391 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17392 // CHECK25: omp.inner.for.cond:
17393 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17394 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17395 // CHECK25-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
17396 // CHECK25-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17397 // CHECK25: omp.inner.for.body:
17398 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17399 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
17400 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17401 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I]], align 4
17402 // CHECK25-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 8
17403 // CHECK25-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32
17404 // CHECK25-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1
17405 // CHECK25-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16
17406 // CHECK25-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 8
17407 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17408 // CHECK25: omp.body.continue:
17409 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17410 // CHECK25: omp.inner.for.inc:
17411 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17412 // CHECK25-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1
17413 // CHECK25-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
17414 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]]
17415 // CHECK25: omp.inner.for.end:
17416 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
17417 // CHECK25: omp.loop.exit:
17418 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
17419 // CHECK25-NEXT: ret void
17420 //
17421 //
17422 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120
17423 // CHECK25-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR0]] {
17424 // CHECK25-NEXT: entry:
17425 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
17426 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
17427 // CHECK25-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
17428 // CHECK25-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
17429 // CHECK25-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
17430 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
17431 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
17432 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
17433 // CHECK25-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
17434 // CHECK25-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
17435 // CHECK25-NEXT: store i32 [[TMP0]], i32* [[CONV2]], align 4
17436 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
17437 // CHECK25-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 8
17438 // CHECK25-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
17439 // CHECK25-NEXT: store i16 [[TMP2]], i16* [[CONV3]], align 2
17440 // CHECK25-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8
17441 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]])
17442 // CHECK25-NEXT: ret void
17443 //
17444 //
17445 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..2
17446 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR0]] {
17447 // CHECK25-NEXT: entry:
17448 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
17449 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
17450 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
17451 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
17452 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17453 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4
17454 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
17455 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
17456 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17457 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17458 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4
17459 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
17460 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
17461 // CHECK25-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
17462 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
17463 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
17464 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
17465 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
17466 // CHECK25-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
17467 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17468 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17469 // CHECK25-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17470 // CHECK25-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
17471 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17472 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17473 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
17474 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17475 // CHECK25: cond.true:
17476 // CHECK25-NEXT: br label [[COND_END:%.*]]
17477 // CHECK25: cond.false:
17478 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17479 // CHECK25-NEXT: br label [[COND_END]]
17480 // CHECK25: cond.end:
17481 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
17482 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
17483 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17484 // CHECK25-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
17485 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17486 // CHECK25: omp.inner.for.cond:
17487 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17488 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17489 // CHECK25-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
17490 // CHECK25-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17491 // CHECK25: omp.inner.for.body:
17492 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17493 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
17494 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17495 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I]], align 4
17496 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 8
17497 // CHECK25-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1
17498 // CHECK25-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 8
17499 // CHECK25-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV1]], align 8
17500 // CHECK25-NEXT: [[CONV4:%.*]] = sext i16 [[TMP9]] to i32
17501 // CHECK25-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1
17502 // CHECK25-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
17503 // CHECK25-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 8
17504 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17505 // CHECK25: omp.body.continue:
17506 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17507 // CHECK25: omp.inner.for.inc:
17508 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17509 // CHECK25-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP10]], 1
17510 // CHECK25-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
17511 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]]
17512 // CHECK25: omp.inner.for.end:
17513 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
17514 // CHECK25: omp.loop.exit:
17515 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
17516 // CHECK25-NEXT: ret void
17517 //
17518 //
17519 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145
17520 // CHECK25-SAME: (i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
17521 // CHECK25-NEXT: entry:
17522 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
17523 // CHECK25-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8
17524 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
17525 // CHECK25-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8
17526 // CHECK25-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8
17527 // CHECK25-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
17528 // CHECK25-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8
17529 // CHECK25-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8
17530 // CHECK25-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8
17531 // CHECK25-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
17532 // CHECK25-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
17533 // CHECK25-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
17534 // CHECK25-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
17535 // CHECK25-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8
17536 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17537 // CHECK25-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8
17538 // CHECK25-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8
17539 // CHECK25-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
17540 // CHECK25-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8
17541 // CHECK25-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8
17542 // CHECK25-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8
17543 // CHECK25-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
17544 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
17545 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8
17546 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17547 // CHECK25-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8
17548 // CHECK25-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8
17549 // CHECK25-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
17550 // CHECK25-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8
17551 // CHECK25-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8
17552 // CHECK25-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8
17553 // CHECK25-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
17554 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 8
17555 // CHECK25-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32*
17556 // CHECK25-NEXT: store i32 [[TMP8]], i32* [[CONV6]], align 4
17557 // CHECK25-NEXT: [[TMP9:%.*]] = load i64, i64* [[A_CASTED]], align 8
17558 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV5]], align 8
17559 // CHECK25-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
17560 // CHECK25-NEXT: store i32 [[TMP10]], i32* [[CONV7]], align 4
17561 // CHECK25-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
17562 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [10 x float]*, i64, float*, [5 x [10 x double]]*, i64, i64, double*, %struct.TT*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], [10 x float]* [[TMP0]], i64 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i64 [[TMP4]], i64 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i64 [[TMP11]])
17563 // CHECK25-NEXT: ret void
17564 //
17565 //
17566 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..3
17567 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
17568 // CHECK25-NEXT: entry:
17569 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
17570 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
17571 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
17572 // CHECK25-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8
17573 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
17574 // CHECK25-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8
17575 // CHECK25-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8
17576 // CHECK25-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
17577 // CHECK25-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8
17578 // CHECK25-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8
17579 // CHECK25-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8
17580 // CHECK25-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
17581 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17582 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4
17583 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
17584 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
17585 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17586 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17587 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4
17588 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
17589 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
17590 // CHECK25-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
17591 // CHECK25-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8
17592 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17593 // CHECK25-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8
17594 // CHECK25-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8
17595 // CHECK25-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
17596 // CHECK25-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8
17597 // CHECK25-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8
17598 // CHECK25-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8
17599 // CHECK25-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
17600 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
17601 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8
17602 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17603 // CHECK25-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8
17604 // CHECK25-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8
17605 // CHECK25-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
17606 // CHECK25-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8
17607 // CHECK25-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8
17608 // CHECK25-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8
17609 // CHECK25-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
17610 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
17611 // CHECK25-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
17612 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17613 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17614 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV5]], align 8
17615 // CHECK25-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17616 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
17617 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]])
17618 // CHECK25-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
17619 // CHECK25: omp.dispatch.cond:
17620 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17621 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9
17622 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17623 // CHECK25: cond.true:
17624 // CHECK25-NEXT: br label [[COND_END:%.*]]
17625 // CHECK25: cond.false:
17626 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17627 // CHECK25-NEXT: br label [[COND_END]]
17628 // CHECK25: cond.end:
17629 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
17630 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
17631 // CHECK25-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17632 // CHECK25-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
17633 // CHECK25-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17634 // CHECK25-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17635 // CHECK25-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
17636 // CHECK25-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
17637 // CHECK25: omp.dispatch.body:
17638 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17639 // CHECK25: omp.inner.for.cond:
17640 // CHECK25-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
17641 // CHECK25-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
17642 // CHECK25-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
17643 // CHECK25-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17644 // CHECK25: omp.inner.for.body:
17645 // CHECK25-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
17646 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
17647 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17648 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
17649 // CHECK25-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !13
17650 // CHECK25-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
17651 // CHECK25-NEXT: store i32 [[ADD8]], i32* [[CONV]], align 8, !llvm.access.group !13
17652 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i64 0, i64 2
17653 // CHECK25-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !13
17654 // CHECK25-NEXT: [[CONV9:%.*]] = fpext float [[TMP20]] to double
17655 // CHECK25-NEXT: [[ADD10:%.*]] = fadd double [[CONV9]], 1.000000e+00
17656 // CHECK25-NEXT: [[CONV11:%.*]] = fptrunc double [[ADD10]] to float
17657 // CHECK25-NEXT: store float [[CONV11]], float* [[ARRAYIDX]], align 4, !llvm.access.group !13
17658 // CHECK25-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 3
17659 // CHECK25-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX12]], align 4, !llvm.access.group !13
17660 // CHECK25-NEXT: [[CONV13:%.*]] = fpext float [[TMP21]] to double
17661 // CHECK25-NEXT: [[ADD14:%.*]] = fadd double [[CONV13]], 1.000000e+00
17662 // CHECK25-NEXT: [[CONV15:%.*]] = fptrunc double [[ADD14]] to float
17663 // CHECK25-NEXT: store float [[CONV15]], float* [[ARRAYIDX12]], align 4, !llvm.access.group !13
17664 // CHECK25-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i64 0, i64 1
17665 // CHECK25-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX16]], i64 0, i64 2
17666 // CHECK25-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX17]], align 8, !llvm.access.group !13
17667 // CHECK25-NEXT: [[ADD18:%.*]] = fadd double [[TMP22]], 1.000000e+00
17668 // CHECK25-NEXT: store double [[ADD18]], double* [[ARRAYIDX17]], align 8, !llvm.access.group !13
17669 // CHECK25-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP5]]
17670 // CHECK25-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds double, double* [[TMP6]], i64 [[TMP23]]
17671 // CHECK25-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX19]], i64 3
17672 // CHECK25-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX20]], align 8, !llvm.access.group !13
17673 // CHECK25-NEXT: [[ADD21:%.*]] = fadd double [[TMP24]], 1.000000e+00
17674 // CHECK25-NEXT: store double [[ADD21]], double* [[ARRAYIDX20]], align 8, !llvm.access.group !13
17675 // CHECK25-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0
17676 // CHECK25-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8, !llvm.access.group !13
17677 // CHECK25-NEXT: [[ADD22:%.*]] = add nsw i64 [[TMP25]], 1
17678 // CHECK25-NEXT: store i64 [[ADD22]], i64* [[X]], align 8, !llvm.access.group !13
17679 // CHECK25-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1
17680 // CHECK25-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8, !llvm.access.group !13
17681 // CHECK25-NEXT: [[CONV23:%.*]] = sext i8 [[TMP26]] to i32
17682 // CHECK25-NEXT: [[ADD24:%.*]] = add nsw i32 [[CONV23]], 1
17683 // CHECK25-NEXT: [[CONV25:%.*]] = trunc i32 [[ADD24]] to i8
17684 // CHECK25-NEXT: store i8 [[CONV25]], i8* [[Y]], align 8, !llvm.access.group !13
17685 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17686 // CHECK25: omp.body.continue:
17687 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17688 // CHECK25: omp.inner.for.inc:
17689 // CHECK25-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
17690 // CHECK25-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP27]], 1
17691 // CHECK25-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
17692 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
17693 // CHECK25: omp.inner.for.end:
17694 // CHECK25-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
17695 // CHECK25: omp.dispatch.inc:
17696 // CHECK25-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17697 // CHECK25-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
17698 // CHECK25-NEXT: [[ADD27:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
17699 // CHECK25-NEXT: store i32 [[ADD27]], i32* [[DOTOMP_LB]], align 4
17700 // CHECK25-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17701 // CHECK25-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
17702 // CHECK25-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
17703 // CHECK25-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_UB]], align 4
17704 // CHECK25-NEXT: br label [[OMP_DISPATCH_COND]]
17705 // CHECK25: omp.dispatch.end:
17706 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]])
17707 // CHECK25-NEXT: ret void
17708 //
17709 //
17710 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200
17711 // CHECK25-SAME: (i64 [[N:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
17712 // CHECK25-NEXT: entry:
17713 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
17714 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
17715 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
17716 // CHECK25-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8
17717 // CHECK25-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
17718 // CHECK25-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
17719 // CHECK25-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
17720 // CHECK25-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
17721 // CHECK25-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8
17722 // CHECK25-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
17723 // CHECK25-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
17724 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
17725 // CHECK25-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8
17726 // CHECK25-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
17727 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
17728 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32*
17729 // CHECK25-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
17730 // CHECK25-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8*
17731 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
17732 // CHECK25-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
17733 // CHECK25-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32*
17734 // CHECK25-NEXT: store i32 [[TMP1]], i32* [[CONV4]], align 4
17735 // CHECK25-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8
17736 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8
17737 // CHECK25-NEXT: [[CONV5:%.*]] = bitcast i64* [[A_CASTED]] to i32*
17738 // CHECK25-NEXT: store i32 [[TMP3]], i32* [[CONV5]], align 4
17739 // CHECK25-NEXT: [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8
17740 // CHECK25-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV2]], align 8
17741 // CHECK25-NEXT: [[CONV6:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
17742 // CHECK25-NEXT: store i16 [[TMP5]], i16* [[CONV6]], align 2
17743 // CHECK25-NEXT: [[TMP6:%.*]] = load i64, i64* [[AA_CASTED]], align 8
17744 // CHECK25-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV3]], align 8
17745 // CHECK25-NEXT: [[CONV7:%.*]] = bitcast i64* [[AAA_CASTED]] to i8*
17746 // CHECK25-NEXT: store i8 [[TMP7]], i8* [[CONV7]], align 1
17747 // CHECK25-NEXT: [[TMP8:%.*]] = load i64, i64* [[AAA_CASTED]], align 8
17748 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, [10 x i32]*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]], [10 x i32]* [[TMP0]])
17749 // CHECK25-NEXT: ret void
17750 //
17751 //
17752 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..4
17753 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
17754 // CHECK25-NEXT: entry:
17755 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
17756 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
17757 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
17758 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
17759 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
17760 // CHECK25-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8
17761 // CHECK25-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
17762 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17763 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4
17764 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
17765 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
17766 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4
17767 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4
17768 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
17769 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
17770 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17771 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17772 // CHECK25-NEXT: [[I8:%.*]] = alloca i32, align 4
17773 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
17774 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
17775 // CHECK25-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
17776 // CHECK25-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
17777 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
17778 // CHECK25-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8
17779 // CHECK25-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
17780 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
17781 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32*
17782 // CHECK25-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
17783 // CHECK25-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8*
17784 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
17785 // CHECK25-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 8
17786 // CHECK25-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
17787 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
17788 // CHECK25-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_4]], align 4
17789 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
17790 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17791 // CHECK25-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]]
17792 // CHECK25-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1
17793 // CHECK25-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1
17794 // CHECK25-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
17795 // CHECK25-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1
17796 // CHECK25-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4
17797 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17798 // CHECK25-NEXT: store i32 [[TMP5]], i32* [[I]], align 4
17799 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17800 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
17801 // CHECK25-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]]
17802 // CHECK25-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
17803 // CHECK25: omp.precond.then:
17804 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
17805 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
17806 // CHECK25-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
17807 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17808 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17809 // CHECK25-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17810 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
17811 // CHECK25-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17812 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17813 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
17814 // CHECK25-NEXT: [[CMP9:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]]
17815 // CHECK25-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17816 // CHECK25: cond.true:
17817 // CHECK25-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
17818 // CHECK25-NEXT: br label [[COND_END:%.*]]
17819 // CHECK25: cond.false:
17820 // CHECK25-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17821 // CHECK25-NEXT: br label [[COND_END]]
17822 // CHECK25: cond.end:
17823 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
17824 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
17825 // CHECK25-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17826 // CHECK25-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
17827 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17828 // CHECK25: omp.inner.for.cond:
17829 // CHECK25-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17830 // CHECK25-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17831 // CHECK25-NEXT: [[ADD10:%.*]] = add i32 [[TMP17]], 1
17832 // CHECK25-NEXT: [[CMP11:%.*]] = icmp ult i32 [[TMP16]], [[ADD10]]
17833 // CHECK25-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17834 // CHECK25: omp.inner.for.body:
17835 // CHECK25-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17836 // CHECK25-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17837 // CHECK25-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1
17838 // CHECK25-NEXT: [[ADD12:%.*]] = add i32 [[TMP18]], [[MUL]]
17839 // CHECK25-NEXT: store i32 [[ADD12]], i32* [[I8]], align 4
17840 // CHECK25-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 8
17841 // CHECK25-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP20]], 1
17842 // CHECK25-NEXT: store i32 [[ADD13]], i32* [[CONV1]], align 8
17843 // CHECK25-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV2]], align 8
17844 // CHECK25-NEXT: [[CONV14:%.*]] = sext i16 [[TMP21]] to i32
17845 // CHECK25-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1
17846 // CHECK25-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i16
17847 // CHECK25-NEXT: store i16 [[CONV16]], i16* [[CONV2]], align 8
17848 // CHECK25-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV3]], align 8
17849 // CHECK25-NEXT: [[CONV17:%.*]] = sext i8 [[TMP22]] to i32
17850 // CHECK25-NEXT: [[ADD18:%.*]] = add nsw i32 [[CONV17]], 1
17851 // CHECK25-NEXT: [[CONV19:%.*]] = trunc i32 [[ADD18]] to i8
17852 // CHECK25-NEXT: store i8 [[CONV19]], i8* [[CONV3]], align 8
17853 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2
17854 // CHECK25-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
17855 // CHECK25-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP23]], 1
17856 // CHECK25-NEXT: store i32 [[ADD20]], i32* [[ARRAYIDX]], align 4
17857 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17858 // CHECK25: omp.body.continue:
17859 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17860 // CHECK25: omp.inner.for.inc:
17861 // CHECK25-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17862 // CHECK25-NEXT: [[ADD21:%.*]] = add i32 [[TMP24]], 1
17863 // CHECK25-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4
17864 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]]
17865 // CHECK25: omp.inner.for.end:
17866 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
17867 // CHECK25: omp.loop.exit:
17868 // CHECK25-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17869 // CHECK25-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
17870 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
17871 // CHECK25-NEXT: br label [[OMP_PRECOND_END]]
17872 // CHECK25: omp.precond.end:
17873 // CHECK25-NEXT: ret void
17874 //
17875 //
17876 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218
17877 // CHECK25-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] {
17878 // CHECK25-NEXT: entry:
17879 // CHECK25-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
17880 // CHECK25-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8
17881 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
17882 // CHECK25-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
17883 // CHECK25-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8
17884 // CHECK25-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8
17885 // CHECK25-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
17886 // CHECK25-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8
17887 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17888 // CHECK25-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
17889 // CHECK25-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8
17890 // CHECK25-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
17891 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
17892 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17893 // CHECK25-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
17894 // CHECK25-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8
17895 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
17896 // CHECK25-NEXT: [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i32*
17897 // CHECK25-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
17898 // CHECK25-NEXT: [[TMP5:%.*]] = load i64, i64* [[B_CASTED]], align 8
17899 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64, i64, i64, i16*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i64 [[TMP5]], i64 [[TMP1]], i64 [[TMP2]], i16* [[TMP3]])
17900 // CHECK25-NEXT: ret void
17901 //
17902 //
17903 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..5
17904 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] {
17905 // CHECK25-NEXT: entry:
17906 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
17907 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
17908 // CHECK25-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
17909 // CHECK25-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8
17910 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
17911 // CHECK25-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
17912 // CHECK25-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8
17913 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17914 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4
17915 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
17916 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
17917 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17918 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17919 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4
17920 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
17921 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
17922 // CHECK25-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
17923 // CHECK25-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8
17924 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17925 // CHECK25-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
17926 // CHECK25-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8
17927 // CHECK25-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
17928 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
17929 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17930 // CHECK25-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
17931 // CHECK25-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8
17932 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
17933 // CHECK25-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
17934 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17935 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17936 // CHECK25-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17937 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
17938 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17939 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17940 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9
17941 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17942 // CHECK25: cond.true:
17943 // CHECK25-NEXT: br label [[COND_END:%.*]]
17944 // CHECK25: cond.false:
17945 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17946 // CHECK25-NEXT: br label [[COND_END]]
17947 // CHECK25: cond.end:
17948 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
17949 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
17950 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17951 // CHECK25-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
17952 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17953 // CHECK25: omp.inner.for.cond:
17954 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17955 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17956 // CHECK25-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
17957 // CHECK25-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17958 // CHECK25: omp.inner.for.body:
17959 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17960 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
17961 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17962 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I]], align 4
17963 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
17964 // CHECK25-NEXT: [[CONV4:%.*]] = sitofp i32 [[TMP12]] to double
17965 // CHECK25-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.500000e+00
17966 // CHECK25-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
17967 // CHECK25-NEXT: store double [[ADD5]], double* [[A]], align 8
17968 // CHECK25-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0
17969 // CHECK25-NEXT: [[TMP13:%.*]] = load double, double* [[A6]], align 8
17970 // CHECK25-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00
17971 // CHECK25-NEXT: store double [[INC]], double* [[A6]], align 8
17972 // CHECK25-NEXT: [[CONV7:%.*]] = fptosi double [[INC]] to i16
17973 // CHECK25-NEXT: [[TMP14:%.*]] = mul nsw i64 1, [[TMP2]]
17974 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i64 [[TMP14]]
17975 // CHECK25-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1
17976 // CHECK25-NEXT: store i16 [[CONV7]], i16* [[ARRAYIDX8]], align 2
17977 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17978 // CHECK25: omp.body.continue:
17979 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17980 // CHECK25: omp.inner.for.inc:
17981 // CHECK25-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17982 // CHECK25-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1
17983 // CHECK25-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
17984 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]]
17985 // CHECK25: omp.inner.for.end:
17986 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
17987 // CHECK25: omp.loop.exit:
17988 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
17989 // CHECK25-NEXT: ret void
17990 //
17991 //
17992 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183
17993 // CHECK25-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
17994 // CHECK25-NEXT: entry:
17995 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
17996 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
17997 // CHECK25-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
17998 // CHECK25-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
17999 // CHECK25-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
18000 // CHECK25-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
18001 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
18002 // CHECK25-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
18003 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
18004 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
18005 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
18006 // CHECK25-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
18007 // CHECK25-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
18008 // CHECK25-NEXT: store i32 [[TMP1]], i32* [[CONV2]], align 4
18009 // CHECK25-NEXT: [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8
18010 // CHECK25-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 8
18011 // CHECK25-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
18012 // CHECK25-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2
18013 // CHECK25-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8
18014 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], [10 x i32]* [[TMP0]])
18015 // CHECK25-NEXT: ret void
18016 //
18017 //
18018 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..6
18019 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
18020 // CHECK25-NEXT: entry:
18021 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18022 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18023 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
18024 // CHECK25-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
18025 // CHECK25-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
18026 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18027 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4
18028 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
18029 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
18030 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18031 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18032 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4
18033 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18034 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18035 // CHECK25-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
18036 // CHECK25-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
18037 // CHECK25-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
18038 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
18039 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
18040 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
18041 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
18042 // CHECK25-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
18043 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18044 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18045 // CHECK25-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18046 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
18047 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18048 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18049 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
18050 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18051 // CHECK25: cond.true:
18052 // CHECK25-NEXT: br label [[COND_END:%.*]]
18053 // CHECK25: cond.false:
18054 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18055 // CHECK25-NEXT: br label [[COND_END]]
18056 // CHECK25: cond.end:
18057 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
18058 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
18059 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18060 // CHECK25-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
18061 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18062 // CHECK25: omp.inner.for.cond:
18063 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18064 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18065 // CHECK25-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
18066 // CHECK25-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18067 // CHECK25: omp.inner.for.body:
18068 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18069 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
18070 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18071 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I]], align 4
18072 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8
18073 // CHECK25-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
18074 // CHECK25-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 8
18075 // CHECK25-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV1]], align 8
18076 // CHECK25-NEXT: [[CONV4:%.*]] = sext i16 [[TMP10]] to i32
18077 // CHECK25-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1
18078 // CHECK25-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
18079 // CHECK25-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 8
18080 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2
18081 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
18082 // CHECK25-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], 1
18083 // CHECK25-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX]], align 4
18084 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
18085 // CHECK25: omp.body.continue:
18086 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18087 // CHECK25: omp.inner.for.inc:
18088 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18089 // CHECK25-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP12]], 1
18090 // CHECK25-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
18091 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]]
18092 // CHECK25: omp.inner.for.end:
18093 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
18094 // CHECK25: omp.loop.exit:
18095 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
18096 // CHECK25-NEXT: ret void
18097 //
18098 //
18099 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103
18100 // CHECK26-SAME: (i64 [[AA:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]], i64 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] {
18101 // CHECK26-NEXT: entry:
18102 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
18103 // CHECK26-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
18104 // CHECK26-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8
18105 // CHECK26-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
18106 // CHECK26-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
18107 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
18108 // CHECK26-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
18109 // CHECK26-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8
18110 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
18111 // CHECK26-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
18112 // CHECK26-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32*
18113 // CHECK26-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV3]], align 8
18114 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV4]], align 8
18115 // CHECK26-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]])
18116 // CHECK26-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 8
18117 // CHECK26-NEXT: [[CONV5:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
18118 // CHECK26-NEXT: store i16 [[TMP3]], i16* [[CONV5]], align 2
18119 // CHECK26-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8
18120 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP4]])
18121 // CHECK26-NEXT: ret void
18122 //
18123 //
18124 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined.
18125 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[AA:%.*]]) #[[ATTR0]] {
18126 // CHECK26-NEXT: entry:
18127 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18128 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18129 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
18130 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18131 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4
18132 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
18133 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
18134 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18135 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18136 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4
18137 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18138 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18139 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
18140 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
18141 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
18142 // CHECK26-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
18143 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18144 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18145 // CHECK26-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18146 // CHECK26-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
18147 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18148 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18149 // CHECK26-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
18150 // CHECK26-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18151 // CHECK26: cond.true:
18152 // CHECK26-NEXT: br label [[COND_END:%.*]]
18153 // CHECK26: cond.false:
18154 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18155 // CHECK26-NEXT: br label [[COND_END]]
18156 // CHECK26: cond.end:
18157 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
18158 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
18159 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18160 // CHECK26-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
18161 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18162 // CHECK26: omp.inner.for.cond:
18163 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18164 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18165 // CHECK26-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
18166 // CHECK26-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18167 // CHECK26: omp.inner.for.body:
18168 // CHECK26-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18169 // CHECK26-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
18170 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18171 // CHECK26-NEXT: store i32 [[ADD]], i32* [[I]], align 4
18172 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
18173 // CHECK26: omp.body.continue:
18174 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18175 // CHECK26: omp.inner.for.inc:
18176 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18177 // CHECK26-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
18178 // CHECK26-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
18179 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]]
18180 // CHECK26: omp.inner.for.end:
18181 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
18182 // CHECK26: omp.loop.exit:
18183 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
18184 // CHECK26-NEXT: ret void
18185 //
18186 //
18187 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113
18188 // CHECK26-SAME: (i64 [[AA:%.*]]) #[[ATTR0]] {
18189 // CHECK26-NEXT: entry:
18190 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
18191 // CHECK26-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
18192 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
18193 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
18194 // CHECK26-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 8
18195 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
18196 // CHECK26-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2
18197 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[AA_CASTED]], align 8
18198 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP1]])
18199 // CHECK26-NEXT: ret void
18200 //
18201 //
18202 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..1
18203 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[AA:%.*]]) #[[ATTR0]] {
18204 // CHECK26-NEXT: entry:
18205 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18206 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18207 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
18208 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18209 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4
18210 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
18211 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
18212 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18213 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18214 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4
18215 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18216 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18217 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
18218 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
18219 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
18220 // CHECK26-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
18221 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18222 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18223 // CHECK26-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18224 // CHECK26-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
18225 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18226 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18227 // CHECK26-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
18228 // CHECK26-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18229 // CHECK26: cond.true:
18230 // CHECK26-NEXT: br label [[COND_END:%.*]]
18231 // CHECK26: cond.false:
18232 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18233 // CHECK26-NEXT: br label [[COND_END]]
18234 // CHECK26: cond.end:
18235 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
18236 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
18237 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18238 // CHECK26-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
18239 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18240 // CHECK26: omp.inner.for.cond:
18241 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18242 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18243 // CHECK26-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
18244 // CHECK26-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18245 // CHECK26: omp.inner.for.body:
18246 // CHECK26-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18247 // CHECK26-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
18248 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18249 // CHECK26-NEXT: store i32 [[ADD]], i32* [[I]], align 4
18250 // CHECK26-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 8
18251 // CHECK26-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32
18252 // CHECK26-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1
18253 // CHECK26-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16
18254 // CHECK26-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 8
18255 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
18256 // CHECK26: omp.body.continue:
18257 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18258 // CHECK26: omp.inner.for.inc:
18259 // CHECK26-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18260 // CHECK26-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1
18261 // CHECK26-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
18262 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]]
18263 // CHECK26: omp.inner.for.end:
18264 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
18265 // CHECK26: omp.loop.exit:
18266 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
18267 // CHECK26-NEXT: ret void
18268 //
18269 //
18270 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120
18271 // CHECK26-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR0]] {
18272 // CHECK26-NEXT: entry:
18273 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
18274 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
18275 // CHECK26-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
18276 // CHECK26-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
18277 // CHECK26-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
18278 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
18279 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
18280 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
18281 // CHECK26-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
18282 // CHECK26-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
18283 // CHECK26-NEXT: store i32 [[TMP0]], i32* [[CONV2]], align 4
18284 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[A_CASTED]], align 8
18285 // CHECK26-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV1]], align 8
18286 // CHECK26-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
18287 // CHECK26-NEXT: store i16 [[TMP2]], i16* [[CONV3]], align 2
18288 // CHECK26-NEXT: [[TMP3:%.*]] = load i64, i64* [[AA_CASTED]], align 8
18289 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP1]], i64 [[TMP3]])
18290 // CHECK26-NEXT: ret void
18291 //
18292 //
18293 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..2
18294 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]]) #[[ATTR0]] {
18295 // CHECK26-NEXT: entry:
18296 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18297 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18298 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
18299 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
18300 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18301 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4
18302 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
18303 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
18304 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18305 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18306 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4
18307 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18308 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18309 // CHECK26-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
18310 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
18311 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
18312 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
18313 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
18314 // CHECK26-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
18315 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18316 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18317 // CHECK26-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18318 // CHECK26-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
18319 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18320 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18321 // CHECK26-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
18322 // CHECK26-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18323 // CHECK26: cond.true:
18324 // CHECK26-NEXT: br label [[COND_END:%.*]]
18325 // CHECK26: cond.false:
18326 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18327 // CHECK26-NEXT: br label [[COND_END]]
18328 // CHECK26: cond.end:
18329 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
18330 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
18331 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18332 // CHECK26-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
18333 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18334 // CHECK26: omp.inner.for.cond:
18335 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18336 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18337 // CHECK26-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
18338 // CHECK26-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18339 // CHECK26: omp.inner.for.body:
18340 // CHECK26-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18341 // CHECK26-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
18342 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18343 // CHECK26-NEXT: store i32 [[ADD]], i32* [[I]], align 4
18344 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 8
18345 // CHECK26-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1
18346 // CHECK26-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 8
18347 // CHECK26-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV1]], align 8
18348 // CHECK26-NEXT: [[CONV4:%.*]] = sext i16 [[TMP9]] to i32
18349 // CHECK26-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1
18350 // CHECK26-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
18351 // CHECK26-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 8
18352 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
18353 // CHECK26: omp.body.continue:
18354 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18355 // CHECK26: omp.inner.for.inc:
18356 // CHECK26-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18357 // CHECK26-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP10]], 1
18358 // CHECK26-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
18359 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]]
18360 // CHECK26: omp.inner.for.end:
18361 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
18362 // CHECK26: omp.loop.exit:
18363 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
18364 // CHECK26-NEXT: ret void
18365 //
18366 //
18367 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145
18368 // CHECK26-SAME: (i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
18369 // CHECK26-NEXT: entry:
18370 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
18371 // CHECK26-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8
18372 // CHECK26-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
18373 // CHECK26-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8
18374 // CHECK26-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8
18375 // CHECK26-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
18376 // CHECK26-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8
18377 // CHECK26-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8
18378 // CHECK26-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8
18379 // CHECK26-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
18380 // CHECK26-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
18381 // CHECK26-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
18382 // CHECK26-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
18383 // CHECK26-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8
18384 // CHECK26-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18385 // CHECK26-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8
18386 // CHECK26-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8
18387 // CHECK26-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
18388 // CHECK26-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8
18389 // CHECK26-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8
18390 // CHECK26-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8
18391 // CHECK26-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
18392 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
18393 // CHECK26-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8
18394 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18395 // CHECK26-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8
18396 // CHECK26-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8
18397 // CHECK26-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
18398 // CHECK26-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8
18399 // CHECK26-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8
18400 // CHECK26-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8
18401 // CHECK26-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
18402 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV]], align 8
18403 // CHECK26-NEXT: [[CONV6:%.*]] = bitcast i64* [[A_CASTED]] to i32*
18404 // CHECK26-NEXT: store i32 [[TMP8]], i32* [[CONV6]], align 4
18405 // CHECK26-NEXT: [[TMP9:%.*]] = load i64, i64* [[A_CASTED]], align 8
18406 // CHECK26-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV5]], align 8
18407 // CHECK26-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
18408 // CHECK26-NEXT: store i32 [[TMP10]], i32* [[CONV7]], align 4
18409 // CHECK26-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
18410 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [10 x float]*, i64, float*, [5 x [10 x double]]*, i64, i64, double*, %struct.TT*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], [10 x float]* [[TMP0]], i64 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i64 [[TMP4]], i64 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i64 [[TMP11]])
18411 // CHECK26-NEXT: ret void
18412 //
18413 //
18414 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..3
18415 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i64 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 8 dereferenceable(400) [[C:%.*]], i64 [[VLA1:%.*]], i64 [[VLA3:%.*]], double* nonnull align 8 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 8 dereferenceable(16) [[D:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
18416 // CHECK26-NEXT: entry:
18417 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18418 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18419 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
18420 // CHECK26-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 8
18421 // CHECK26-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
18422 // CHECK26-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 8
18423 // CHECK26-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 8
18424 // CHECK26-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
18425 // CHECK26-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8
18426 // CHECK26-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 8
18427 // CHECK26-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 8
18428 // CHECK26-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
18429 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18430 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4
18431 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
18432 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
18433 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18434 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18435 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4
18436 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18437 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18438 // CHECK26-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
18439 // CHECK26-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 8
18440 // CHECK26-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18441 // CHECK26-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 8
18442 // CHECK26-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 8
18443 // CHECK26-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
18444 // CHECK26-NEXT: store i64 [[VLA3]], i64* [[VLA_ADDR4]], align 8
18445 // CHECK26-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 8
18446 // CHECK26-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 8
18447 // CHECK26-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
18448 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
18449 // CHECK26-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 8
18450 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18451 // CHECK26-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 8
18452 // CHECK26-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 8
18453 // CHECK26-NEXT: [[TMP4:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
18454 // CHECK26-NEXT: [[TMP5:%.*]] = load i64, i64* [[VLA_ADDR4]], align 8
18455 // CHECK26-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 8
18456 // CHECK26-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 8
18457 // CHECK26-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
18458 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
18459 // CHECK26-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
18460 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18461 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18462 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV5]], align 8
18463 // CHECK26-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18464 // CHECK26-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
18465 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]])
18466 // CHECK26-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
18467 // CHECK26: omp.dispatch.cond:
18468 // CHECK26-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18469 // CHECK26-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9
18470 // CHECK26-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18471 // CHECK26: cond.true:
18472 // CHECK26-NEXT: br label [[COND_END:%.*]]
18473 // CHECK26: cond.false:
18474 // CHECK26-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18475 // CHECK26-NEXT: br label [[COND_END]]
18476 // CHECK26: cond.end:
18477 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
18478 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
18479 // CHECK26-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18480 // CHECK26-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
18481 // CHECK26-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18482 // CHECK26-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18483 // CHECK26-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
18484 // CHECK26-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
18485 // CHECK26: omp.dispatch.body:
18486 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18487 // CHECK26: omp.inner.for.cond:
18488 // CHECK26-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
18489 // CHECK26-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
18490 // CHECK26-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
18491 // CHECK26-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18492 // CHECK26: omp.inner.for.body:
18493 // CHECK26-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
18494 // CHECK26-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
18495 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18496 // CHECK26-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
18497 // CHECK26-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !13
18498 // CHECK26-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
18499 // CHECK26-NEXT: store i32 [[ADD8]], i32* [[CONV]], align 8, !llvm.access.group !13
18500 // CHECK26-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i64 0, i64 2
18501 // CHECK26-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !13
18502 // CHECK26-NEXT: [[CONV9:%.*]] = fpext float [[TMP20]] to double
18503 // CHECK26-NEXT: [[ADD10:%.*]] = fadd double [[CONV9]], 1.000000e+00
18504 // CHECK26-NEXT: [[CONV11:%.*]] = fptrunc double [[ADD10]] to float
18505 // CHECK26-NEXT: store float [[CONV11]], float* [[ARRAYIDX]], align 4, !llvm.access.group !13
18506 // CHECK26-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 3
18507 // CHECK26-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX12]], align 4, !llvm.access.group !13
18508 // CHECK26-NEXT: [[CONV13:%.*]] = fpext float [[TMP21]] to double
18509 // CHECK26-NEXT: [[ADD14:%.*]] = fadd double [[CONV13]], 1.000000e+00
18510 // CHECK26-NEXT: [[CONV15:%.*]] = fptrunc double [[ADD14]] to float
18511 // CHECK26-NEXT: store float [[CONV15]], float* [[ARRAYIDX12]], align 4, !llvm.access.group !13
18512 // CHECK26-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i64 0, i64 1
18513 // CHECK26-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX16]], i64 0, i64 2
18514 // CHECK26-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX17]], align 8, !llvm.access.group !13
18515 // CHECK26-NEXT: [[ADD18:%.*]] = fadd double [[TMP22]], 1.000000e+00
18516 // CHECK26-NEXT: store double [[ADD18]], double* [[ARRAYIDX17]], align 8, !llvm.access.group !13
18517 // CHECK26-NEXT: [[TMP23:%.*]] = mul nsw i64 1, [[TMP5]]
18518 // CHECK26-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds double, double* [[TMP6]], i64 [[TMP23]]
18519 // CHECK26-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX19]], i64 3
18520 // CHECK26-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX20]], align 8, !llvm.access.group !13
18521 // CHECK26-NEXT: [[ADD21:%.*]] = fadd double [[TMP24]], 1.000000e+00
18522 // CHECK26-NEXT: store double [[ADD21]], double* [[ARRAYIDX20]], align 8, !llvm.access.group !13
18523 // CHECK26-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0
18524 // CHECK26-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 8, !llvm.access.group !13
18525 // CHECK26-NEXT: [[ADD22:%.*]] = add nsw i64 [[TMP25]], 1
18526 // CHECK26-NEXT: store i64 [[ADD22]], i64* [[X]], align 8, !llvm.access.group !13
18527 // CHECK26-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1
18528 // CHECK26-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 8, !llvm.access.group !13
18529 // CHECK26-NEXT: [[CONV23:%.*]] = sext i8 [[TMP26]] to i32
18530 // CHECK26-NEXT: [[ADD24:%.*]] = add nsw i32 [[CONV23]], 1
18531 // CHECK26-NEXT: [[CONV25:%.*]] = trunc i32 [[ADD24]] to i8
18532 // CHECK26-NEXT: store i8 [[CONV25]], i8* [[Y]], align 8, !llvm.access.group !13
18533 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
18534 // CHECK26: omp.body.continue:
18535 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18536 // CHECK26: omp.inner.for.inc:
18537 // CHECK26-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
18538 // CHECK26-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP27]], 1
18539 // CHECK26-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
18540 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
18541 // CHECK26: omp.inner.for.end:
18542 // CHECK26-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
18543 // CHECK26: omp.dispatch.inc:
18544 // CHECK26-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18545 // CHECK26-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
18546 // CHECK26-NEXT: [[ADD27:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
18547 // CHECK26-NEXT: store i32 [[ADD27]], i32* [[DOTOMP_LB]], align 4
18548 // CHECK26-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18549 // CHECK26-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
18550 // CHECK26-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
18551 // CHECK26-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_UB]], align 4
18552 // CHECK26-NEXT: br label [[OMP_DISPATCH_COND]]
18553 // CHECK26: omp.dispatch.end:
18554 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]])
18555 // CHECK26-NEXT: ret void
18556 //
18557 //
18558 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200
18559 // CHECK26-SAME: (i64 [[N:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
18560 // CHECK26-NEXT: entry:
18561 // CHECK26-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
18562 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
18563 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
18564 // CHECK26-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8
18565 // CHECK26-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
18566 // CHECK26-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
18567 // CHECK26-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
18568 // CHECK26-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
18569 // CHECK26-NEXT: [[AAA_CASTED:%.*]] = alloca i64, align 8
18570 // CHECK26-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
18571 // CHECK26-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
18572 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
18573 // CHECK26-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8
18574 // CHECK26-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
18575 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
18576 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32*
18577 // CHECK26-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
18578 // CHECK26-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8*
18579 // CHECK26-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
18580 // CHECK26-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
18581 // CHECK26-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32*
18582 // CHECK26-NEXT: store i32 [[TMP1]], i32* [[CONV4]], align 4
18583 // CHECK26-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8
18584 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8
18585 // CHECK26-NEXT: [[CONV5:%.*]] = bitcast i64* [[A_CASTED]] to i32*
18586 // CHECK26-NEXT: store i32 [[TMP3]], i32* [[CONV5]], align 4
18587 // CHECK26-NEXT: [[TMP4:%.*]] = load i64, i64* [[A_CASTED]], align 8
18588 // CHECK26-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV2]], align 8
18589 // CHECK26-NEXT: [[CONV6:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
18590 // CHECK26-NEXT: store i16 [[TMP5]], i16* [[CONV6]], align 2
18591 // CHECK26-NEXT: [[TMP6:%.*]] = load i64, i64* [[AA_CASTED]], align 8
18592 // CHECK26-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV3]], align 8
18593 // CHECK26-NEXT: [[CONV7:%.*]] = bitcast i64* [[AAA_CASTED]] to i8*
18594 // CHECK26-NEXT: store i8 [[TMP7]], i8* [[CONV7]], align 1
18595 // CHECK26-NEXT: [[TMP8:%.*]] = load i64, i64* [[AAA_CASTED]], align 8
18596 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, [10 x i32]*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]], [10 x i32]* [[TMP0]])
18597 // CHECK26-NEXT: ret void
18598 //
18599 //
18600 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..4
18601 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], i64 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
18602 // CHECK26-NEXT: entry:
18603 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18604 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18605 // CHECK26-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
18606 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
18607 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
18608 // CHECK26-NEXT: [[AAA_ADDR:%.*]] = alloca i64, align 8
18609 // CHECK26-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
18610 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18611 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4
18612 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
18613 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
18614 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4
18615 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4
18616 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
18617 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
18618 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18619 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18620 // CHECK26-NEXT: [[I8:%.*]] = alloca i32, align 4
18621 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18622 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18623 // CHECK26-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
18624 // CHECK26-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
18625 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
18626 // CHECK26-NEXT: store i64 [[AAA]], i64* [[AAA_ADDR]], align 8
18627 // CHECK26-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
18628 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
18629 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32*
18630 // CHECK26-NEXT: [[CONV2:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
18631 // CHECK26-NEXT: [[CONV3:%.*]] = bitcast i64* [[AAA_ADDR]] to i8*
18632 // CHECK26-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
18633 // CHECK26-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 8
18634 // CHECK26-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
18635 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
18636 // CHECK26-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_4]], align 4
18637 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
18638 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18639 // CHECK26-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]]
18640 // CHECK26-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1
18641 // CHECK26-NEXT: [[ADD:%.*]] = add i32 [[SUB6]], 1
18642 // CHECK26-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
18643 // CHECK26-NEXT: [[SUB7:%.*]] = sub i32 [[DIV]], 1
18644 // CHECK26-NEXT: store i32 [[SUB7]], i32* [[DOTCAPTURE_EXPR_5]], align 4
18645 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18646 // CHECK26-NEXT: store i32 [[TMP5]], i32* [[I]], align 4
18647 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18648 // CHECK26-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
18649 // CHECK26-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]]
18650 // CHECK26-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18651 // CHECK26: omp.precond.then:
18652 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
18653 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
18654 // CHECK26-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
18655 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18656 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18657 // CHECK26-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18658 // CHECK26-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
18659 // CHECK26-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18660 // CHECK26-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18661 // CHECK26-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
18662 // CHECK26-NEXT: [[CMP9:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]]
18663 // CHECK26-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18664 // CHECK26: cond.true:
18665 // CHECK26-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
18666 // CHECK26-NEXT: br label [[COND_END:%.*]]
18667 // CHECK26: cond.false:
18668 // CHECK26-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18669 // CHECK26-NEXT: br label [[COND_END]]
18670 // CHECK26: cond.end:
18671 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
18672 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
18673 // CHECK26-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18674 // CHECK26-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
18675 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18676 // CHECK26: omp.inner.for.cond:
18677 // CHECK26-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18678 // CHECK26-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18679 // CHECK26-NEXT: [[ADD10:%.*]] = add i32 [[TMP17]], 1
18680 // CHECK26-NEXT: [[CMP11:%.*]] = icmp ult i32 [[TMP16]], [[ADD10]]
18681 // CHECK26-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18682 // CHECK26: omp.inner.for.body:
18683 // CHECK26-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18684 // CHECK26-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18685 // CHECK26-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1
18686 // CHECK26-NEXT: [[ADD12:%.*]] = add i32 [[TMP18]], [[MUL]]
18687 // CHECK26-NEXT: store i32 [[ADD12]], i32* [[I8]], align 4
18688 // CHECK26-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 8
18689 // CHECK26-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP20]], 1
18690 // CHECK26-NEXT: store i32 [[ADD13]], i32* [[CONV1]], align 8
18691 // CHECK26-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV2]], align 8
18692 // CHECK26-NEXT: [[CONV14:%.*]] = sext i16 [[TMP21]] to i32
18693 // CHECK26-NEXT: [[ADD15:%.*]] = add nsw i32 [[CONV14]], 1
18694 // CHECK26-NEXT: [[CONV16:%.*]] = trunc i32 [[ADD15]] to i16
18695 // CHECK26-NEXT: store i16 [[CONV16]], i16* [[CONV2]], align 8
18696 // CHECK26-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV3]], align 8
18697 // CHECK26-NEXT: [[CONV17:%.*]] = sext i8 [[TMP22]] to i32
18698 // CHECK26-NEXT: [[ADD18:%.*]] = add nsw i32 [[CONV17]], 1
18699 // CHECK26-NEXT: [[CONV19:%.*]] = trunc i32 [[ADD18]] to i8
18700 // CHECK26-NEXT: store i8 [[CONV19]], i8* [[CONV3]], align 8
18701 // CHECK26-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2
18702 // CHECK26-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
18703 // CHECK26-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP23]], 1
18704 // CHECK26-NEXT: store i32 [[ADD20]], i32* [[ARRAYIDX]], align 4
18705 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
18706 // CHECK26: omp.body.continue:
18707 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18708 // CHECK26: omp.inner.for.inc:
18709 // CHECK26-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18710 // CHECK26-NEXT: [[ADD21:%.*]] = add i32 [[TMP24]], 1
18711 // CHECK26-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4
18712 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]]
18713 // CHECK26: omp.inner.for.end:
18714 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
18715 // CHECK26: omp.loop.exit:
18716 // CHECK26-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18717 // CHECK26-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
18718 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
18719 // CHECK26-NEXT: br label [[OMP_PRECOND_END]]
18720 // CHECK26: omp.precond.end:
18721 // CHECK26-NEXT: ret void
18722 //
18723 //
18724 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218
18725 // CHECK26-SAME: (%struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] {
18726 // CHECK26-NEXT: entry:
18727 // CHECK26-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
18728 // CHECK26-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8
18729 // CHECK26-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
18730 // CHECK26-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
18731 // CHECK26-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8
18732 // CHECK26-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8
18733 // CHECK26-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
18734 // CHECK26-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8
18735 // CHECK26-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18736 // CHECK26-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
18737 // CHECK26-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8
18738 // CHECK26-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
18739 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
18740 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18741 // CHECK26-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
18742 // CHECK26-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8
18743 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
18744 // CHECK26-NEXT: [[CONV3:%.*]] = bitcast i64* [[B_CASTED]] to i32*
18745 // CHECK26-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
18746 // CHECK26-NEXT: [[TMP5:%.*]] = load i64, i64* [[B_CASTED]], align 8
18747 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i64, i64, i64, i16*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i64 [[TMP5]], i64 [[TMP1]], i64 [[TMP2]], i16* [[TMP3]])
18748 // CHECK26-NEXT: ret void
18749 //
18750 //
18751 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..5
18752 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i64 [[B:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] {
18753 // CHECK26-NEXT: entry:
18754 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18755 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18756 // CHECK26-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 8
18757 // CHECK26-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8
18758 // CHECK26-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
18759 // CHECK26-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
18760 // CHECK26-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 8
18761 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18762 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4
18763 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
18764 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
18765 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18766 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18767 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4
18768 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18769 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18770 // CHECK26-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 8
18771 // CHECK26-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8
18772 // CHECK26-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18773 // CHECK26-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
18774 // CHECK26-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 8
18775 // CHECK26-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 8
18776 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[B_ADDR]] to i32*
18777 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18778 // CHECK26-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
18779 // CHECK26-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 8
18780 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
18781 // CHECK26-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
18782 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18783 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18784 // CHECK26-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18785 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
18786 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18787 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18788 // CHECK26-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9
18789 // CHECK26-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18790 // CHECK26: cond.true:
18791 // CHECK26-NEXT: br label [[COND_END:%.*]]
18792 // CHECK26: cond.false:
18793 // CHECK26-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18794 // CHECK26-NEXT: br label [[COND_END]]
18795 // CHECK26: cond.end:
18796 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
18797 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
18798 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18799 // CHECK26-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
18800 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18801 // CHECK26: omp.inner.for.cond:
18802 // CHECK26-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18803 // CHECK26-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18804 // CHECK26-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
18805 // CHECK26-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18806 // CHECK26: omp.inner.for.body:
18807 // CHECK26-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18808 // CHECK26-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
18809 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18810 // CHECK26-NEXT: store i32 [[ADD]], i32* [[I]], align 4
18811 // CHECK26-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
18812 // CHECK26-NEXT: [[CONV4:%.*]] = sitofp i32 [[TMP12]] to double
18813 // CHECK26-NEXT: [[ADD5:%.*]] = fadd double [[CONV4]], 1.500000e+00
18814 // CHECK26-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
18815 // CHECK26-NEXT: store double [[ADD5]], double* [[A]], align 8
18816 // CHECK26-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0
18817 // CHECK26-NEXT: [[TMP13:%.*]] = load double, double* [[A6]], align 8
18818 // CHECK26-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00
18819 // CHECK26-NEXT: store double [[INC]], double* [[A6]], align 8
18820 // CHECK26-NEXT: [[CONV7:%.*]] = fptosi double [[INC]] to i16
18821 // CHECK26-NEXT: [[TMP14:%.*]] = mul nsw i64 1, [[TMP2]]
18822 // CHECK26-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i64 [[TMP14]]
18823 // CHECK26-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i64 1
18824 // CHECK26-NEXT: store i16 [[CONV7]], i16* [[ARRAYIDX8]], align 2
18825 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
18826 // CHECK26: omp.body.continue:
18827 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18828 // CHECK26: omp.inner.for.inc:
18829 // CHECK26-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18830 // CHECK26-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1
18831 // CHECK26-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
18832 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]]
18833 // CHECK26: omp.inner.for.end:
18834 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
18835 // CHECK26: omp.loop.exit:
18836 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
18837 // CHECK26-NEXT: ret void
18838 //
18839 //
18840 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183
18841 // CHECK26-SAME: (i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
18842 // CHECK26-NEXT: entry:
18843 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
18844 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
18845 // CHECK26-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
18846 // CHECK26-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
18847 // CHECK26-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
18848 // CHECK26-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
18849 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
18850 // CHECK26-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
18851 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
18852 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
18853 // CHECK26-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
18854 // CHECK26-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
18855 // CHECK26-NEXT: [[CONV2:%.*]] = bitcast i64* [[A_CASTED]] to i32*
18856 // CHECK26-NEXT: store i32 [[TMP1]], i32* [[CONV2]], align 4
18857 // CHECK26-NEXT: [[TMP2:%.*]] = load i64, i64* [[A_CASTED]], align 8
18858 // CHECK26-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV1]], align 8
18859 // CHECK26-NEXT: [[CONV3:%.*]] = bitcast i64* [[AA_CASTED]] to i16*
18860 // CHECK26-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2
18861 // CHECK26-NEXT: [[TMP4:%.*]] = load i64, i64* [[AA_CASTED]], align 8
18862 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], [10 x i32]* [[TMP0]])
18863 // CHECK26-NEXT: ret void
18864 //
18865 //
18866 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..6
18867 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[A:%.*]], i64 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
18868 // CHECK26-NEXT: entry:
18869 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18870 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18871 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
18872 // CHECK26-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
18873 // CHECK26-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
18874 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18875 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4
18876 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
18877 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
18878 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18879 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18880 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4
18881 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18882 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18883 // CHECK26-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
18884 // CHECK26-NEXT: store i64 [[AA]], i64* [[AA_ADDR]], align 8
18885 // CHECK26-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
18886 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
18887 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[AA_ADDR]] to i16*
18888 // CHECK26-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
18889 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
18890 // CHECK26-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
18891 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18892 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18893 // CHECK26-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18894 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
18895 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18896 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18897 // CHECK26-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
18898 // CHECK26-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18899 // CHECK26: cond.true:
18900 // CHECK26-NEXT: br label [[COND_END:%.*]]
18901 // CHECK26: cond.false:
18902 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18903 // CHECK26-NEXT: br label [[COND_END]]
18904 // CHECK26: cond.end:
18905 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
18906 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
18907 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18908 // CHECK26-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
18909 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18910 // CHECK26: omp.inner.for.cond:
18911 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18912 // CHECK26-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18913 // CHECK26-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
18914 // CHECK26-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18915 // CHECK26: omp.inner.for.body:
18916 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18917 // CHECK26-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
18918 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18919 // CHECK26-NEXT: store i32 [[ADD]], i32* [[I]], align 4
18920 // CHECK26-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8
18921 // CHECK26-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
18922 // CHECK26-NEXT: store i32 [[ADD3]], i32* [[CONV]], align 8
18923 // CHECK26-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV1]], align 8
18924 // CHECK26-NEXT: [[CONV4:%.*]] = sext i16 [[TMP10]] to i32
18925 // CHECK26-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV4]], 1
18926 // CHECK26-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
18927 // CHECK26-NEXT: store i16 [[CONV6]], i16* [[CONV1]], align 8
18928 // CHECK26-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 2
18929 // CHECK26-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
18930 // CHECK26-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], 1
18931 // CHECK26-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX]], align 4
18932 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
18933 // CHECK26: omp.body.continue:
18934 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18935 // CHECK26: omp.inner.for.inc:
18936 // CHECK26-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18937 // CHECK26-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP12]], 1
18938 // CHECK26-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
18939 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]]
18940 // CHECK26: omp.inner.for.end:
18941 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
18942 // CHECK26: omp.loop.exit:
18943 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
18944 // CHECK26-NEXT: ret void
18945 //
18946 //
18947 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103
18948 // CHECK27-SAME: (i32 [[AA:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]], i32 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] {
18949 // CHECK27-NEXT: entry:
18950 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
18951 // CHECK27-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
18952 // CHECK27-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4
18953 // CHECK27-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
18954 // CHECK27-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
18955 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
18956 // CHECK27-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
18957 // CHECK27-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
18958 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
18959 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
18960 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
18961 // CHECK27-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]])
18962 // CHECK27-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4
18963 // CHECK27-NEXT: [[CONV3:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
18964 // CHECK27-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2
18965 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4
18966 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP4]])
18967 // CHECK27-NEXT: ret void
18968 //
18969 //
18970 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined.
18971 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[AA:%.*]]) #[[ATTR0]] {
18972 // CHECK27-NEXT: entry:
18973 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
18974 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
18975 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
18976 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18977 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4
18978 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
18979 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
18980 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18981 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18982 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4
18983 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
18984 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
18985 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
18986 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
18987 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
18988 // CHECK27-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
18989 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18990 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18991 // CHECK27-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
18992 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
18993 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18994 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18995 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
18996 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18997 // CHECK27: cond.true:
18998 // CHECK27-NEXT: br label [[COND_END:%.*]]
18999 // CHECK27: cond.false:
19000 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19001 // CHECK27-NEXT: br label [[COND_END]]
19002 // CHECK27: cond.end:
19003 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
19004 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
19005 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19006 // CHECK27-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
19007 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19008 // CHECK27: omp.inner.for.cond:
19009 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19010 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19011 // CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
19012 // CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19013 // CHECK27: omp.inner.for.body:
19014 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19015 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
19016 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19017 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I]], align 4
19018 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
19019 // CHECK27: omp.body.continue:
19020 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19021 // CHECK27: omp.inner.for.inc:
19022 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19023 // CHECK27-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
19024 // CHECK27-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
19025 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]]
19026 // CHECK27: omp.inner.for.end:
19027 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
19028 // CHECK27: omp.loop.exit:
19029 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
19030 // CHECK27-NEXT: ret void
19031 //
19032 //
19033 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113
19034 // CHECK27-SAME: (i32 [[AA:%.*]]) #[[ATTR0]] {
19035 // CHECK27-NEXT: entry:
19036 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
19037 // CHECK27-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
19038 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
19039 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
19040 // CHECK27-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
19041 // CHECK27-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
19042 // CHECK27-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2
19043 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[AA_CASTED]], align 4
19044 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP1]])
19045 // CHECK27-NEXT: ret void
19046 //
19047 //
19048 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..1
19049 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[AA:%.*]]) #[[ATTR0]] {
19050 // CHECK27-NEXT: entry:
19051 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
19052 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
19053 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
19054 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19055 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4
19056 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
19057 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
19058 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19059 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19060 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4
19061 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
19062 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
19063 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
19064 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
19065 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
19066 // CHECK27-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
19067 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19068 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19069 // CHECK27-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
19070 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
19071 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19072 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19073 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
19074 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19075 // CHECK27: cond.true:
19076 // CHECK27-NEXT: br label [[COND_END:%.*]]
19077 // CHECK27: cond.false:
19078 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19079 // CHECK27-NEXT: br label [[COND_END]]
19080 // CHECK27: cond.end:
19081 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
19082 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
19083 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19084 // CHECK27-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
19085 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19086 // CHECK27: omp.inner.for.cond:
19087 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19088 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19089 // CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
19090 // CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19091 // CHECK27: omp.inner.for.body:
19092 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19093 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
19094 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19095 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I]], align 4
19096 // CHECK27-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 4
19097 // CHECK27-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32
19098 // CHECK27-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1
19099 // CHECK27-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16
19100 // CHECK27-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 4
19101 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
19102 // CHECK27: omp.body.continue:
19103 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19104 // CHECK27: omp.inner.for.inc:
19105 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19106 // CHECK27-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1
19107 // CHECK27-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
19108 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]]
19109 // CHECK27: omp.inner.for.end:
19110 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
19111 // CHECK27: omp.loop.exit:
19112 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
19113 // CHECK27-NEXT: ret void
19114 //
19115 //
19116 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120
19117 // CHECK27-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR0]] {
19118 // CHECK27-NEXT: entry:
19119 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
19120 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
19121 // CHECK27-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
19122 // CHECK27-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
19123 // CHECK27-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
19124 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
19125 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
19126 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
19127 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4
19128 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
19129 // CHECK27-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV]], align 4
19130 // CHECK27-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
19131 // CHECK27-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2
19132 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4
19133 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]])
19134 // CHECK27-NEXT: ret void
19135 //
19136 //
19137 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..2
19138 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR0]] {
19139 // CHECK27-NEXT: entry:
19140 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
19141 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
19142 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
19143 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
19144 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19145 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4
19146 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
19147 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
19148 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19149 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19150 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4
19151 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
19152 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
19153 // CHECK27-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
19154 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
19155 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
19156 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
19157 // CHECK27-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
19158 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19159 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19160 // CHECK27-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
19161 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
19162 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19163 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19164 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
19165 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19166 // CHECK27: cond.true:
19167 // CHECK27-NEXT: br label [[COND_END:%.*]]
19168 // CHECK27: cond.false:
19169 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19170 // CHECK27-NEXT: br label [[COND_END]]
19171 // CHECK27: cond.end:
19172 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
19173 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
19174 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19175 // CHECK27-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
19176 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19177 // CHECK27: omp.inner.for.cond:
19178 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19179 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19180 // CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
19181 // CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19182 // CHECK27: omp.inner.for.body:
19183 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19184 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
19185 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19186 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I]], align 4
19187 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4
19188 // CHECK27-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
19189 // CHECK27-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4
19190 // CHECK27-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV]], align 4
19191 // CHECK27-NEXT: [[CONV3:%.*]] = sext i16 [[TMP9]] to i32
19192 // CHECK27-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1
19193 // CHECK27-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16
19194 // CHECK27-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 4
19195 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
19196 // CHECK27: omp.body.continue:
19197 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19198 // CHECK27: omp.inner.for.inc:
19199 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19200 // CHECK27-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1
19201 // CHECK27-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
19202 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]]
19203 // CHECK27: omp.inner.for.end:
19204 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
19205 // CHECK27: omp.loop.exit:
19206 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
19207 // CHECK27-NEXT: ret void
19208 //
19209 //
19210 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145
19211 // CHECK27-SAME: (i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
19212 // CHECK27-NEXT: entry:
19213 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
19214 // CHECK27-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4
19215 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
19216 // CHECK27-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4
19217 // CHECK27-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4
19218 // CHECK27-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
19219 // CHECK27-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4
19220 // CHECK27-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4
19221 // CHECK27-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4
19222 // CHECK27-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
19223 // CHECK27-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
19224 // CHECK27-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
19225 // CHECK27-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
19226 // CHECK27-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4
19227 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
19228 // CHECK27-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4
19229 // CHECK27-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4
19230 // CHECK27-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
19231 // CHECK27-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4
19232 // CHECK27-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4
19233 // CHECK27-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4
19234 // CHECK27-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
19235 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4
19236 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
19237 // CHECK27-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4
19238 // CHECK27-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4
19239 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
19240 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4
19241 // CHECK27-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4
19242 // CHECK27-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4
19243 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4
19244 // CHECK27-NEXT: store i32 [[TMP8]], i32* [[A_CASTED]], align 4
19245 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_CASTED]], align 4
19246 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
19247 // CHECK27-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
19248 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
19249 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [10 x float]*, i32, float*, [5 x [10 x double]]*, i32, i32, double*, %struct.TT*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP9]], [10 x float]* [[TMP0]], i32 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i32 [[TMP4]], i32 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i32 [[TMP11]])
19250 // CHECK27-NEXT: ret void
19251 //
19252 //
19253 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..3
19254 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
19255 // CHECK27-NEXT: entry:
19256 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
19257 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
19258 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
19259 // CHECK27-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4
19260 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
19261 // CHECK27-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4
19262 // CHECK27-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4
19263 // CHECK27-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
19264 // CHECK27-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4
19265 // CHECK27-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4
19266 // CHECK27-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4
19267 // CHECK27-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
19268 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19269 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4
19270 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
19271 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
19272 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19273 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19274 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4
19275 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
19276 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
19277 // CHECK27-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
19278 // CHECK27-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4
19279 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
19280 // CHECK27-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4
19281 // CHECK27-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4
19282 // CHECK27-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
19283 // CHECK27-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4
19284 // CHECK27-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4
19285 // CHECK27-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4
19286 // CHECK27-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
19287 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4
19288 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
19289 // CHECK27-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4
19290 // CHECK27-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4
19291 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
19292 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4
19293 // CHECK27-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4
19294 // CHECK27-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4
19295 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
19296 // CHECK27-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
19297 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19298 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19299 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
19300 // CHECK27-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
19301 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
19302 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]])
19303 // CHECK27-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
19304 // CHECK27: omp.dispatch.cond:
19305 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19306 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9
19307 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19308 // CHECK27: cond.true:
19309 // CHECK27-NEXT: br label [[COND_END:%.*]]
19310 // CHECK27: cond.false:
19311 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19312 // CHECK27-NEXT: br label [[COND_END]]
19313 // CHECK27: cond.end:
19314 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
19315 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
19316 // CHECK27-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19317 // CHECK27-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
19318 // CHECK27-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19319 // CHECK27-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19320 // CHECK27-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
19321 // CHECK27-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
19322 // CHECK27: omp.dispatch.body:
19323 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19324 // CHECK27: omp.inner.for.cond:
19325 // CHECK27-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
19326 // CHECK27-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
19327 // CHECK27-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
19328 // CHECK27-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19329 // CHECK27: omp.inner.for.body:
19330 // CHECK27-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
19331 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
19332 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19333 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
19334 // CHECK27-NEXT: [[TMP19:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group !14
19335 // CHECK27-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
19336 // CHECK27-NEXT: store i32 [[ADD7]], i32* [[A_ADDR]], align 4, !llvm.access.group !14
19337 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i32 0, i32 2
19338 // CHECK27-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !14
19339 // CHECK27-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double
19340 // CHECK27-NEXT: [[ADD8:%.*]] = fadd double [[CONV]], 1.000000e+00
19341 // CHECK27-NEXT: [[CONV9:%.*]] = fptrunc double [[ADD8]] to float
19342 // CHECK27-NEXT: store float [[CONV9]], float* [[ARRAYIDX]], align 4, !llvm.access.group !14
19343 // CHECK27-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, float* [[TMP2]], i32 3
19344 // CHECK27-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX10]], align 4, !llvm.access.group !14
19345 // CHECK27-NEXT: [[CONV11:%.*]] = fpext float [[TMP21]] to double
19346 // CHECK27-NEXT: [[ADD12:%.*]] = fadd double [[CONV11]], 1.000000e+00
19347 // CHECK27-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float
19348 // CHECK27-NEXT: store float [[CONV13]], float* [[ARRAYIDX10]], align 4, !llvm.access.group !14
19349 // CHECK27-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i32 0, i32 1
19350 // CHECK27-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX14]], i32 0, i32 2
19351 // CHECK27-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX15]], align 8, !llvm.access.group !14
19352 // CHECK27-NEXT: [[ADD16:%.*]] = fadd double [[TMP22]], 1.000000e+00
19353 // CHECK27-NEXT: store double [[ADD16]], double* [[ARRAYIDX15]], align 8, !llvm.access.group !14
19354 // CHECK27-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP5]]
19355 // CHECK27-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP6]], i32 [[TMP23]]
19356 // CHECK27-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX17]], i32 3
19357 // CHECK27-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX18]], align 8, !llvm.access.group !14
19358 // CHECK27-NEXT: [[ADD19:%.*]] = fadd double [[TMP24]], 1.000000e+00
19359 // CHECK27-NEXT: store double [[ADD19]], double* [[ARRAYIDX18]], align 8, !llvm.access.group !14
19360 // CHECK27-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0
19361 // CHECK27-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4, !llvm.access.group !14
19362 // CHECK27-NEXT: [[ADD20:%.*]] = add nsw i64 [[TMP25]], 1
19363 // CHECK27-NEXT: store i64 [[ADD20]], i64* [[X]], align 4, !llvm.access.group !14
19364 // CHECK27-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1
19365 // CHECK27-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4, !llvm.access.group !14
19366 // CHECK27-NEXT: [[CONV21:%.*]] = sext i8 [[TMP26]] to i32
19367 // CHECK27-NEXT: [[ADD22:%.*]] = add nsw i32 [[CONV21]], 1
19368 // CHECK27-NEXT: [[CONV23:%.*]] = trunc i32 [[ADD22]] to i8
19369 // CHECK27-NEXT: store i8 [[CONV23]], i8* [[Y]], align 4, !llvm.access.group !14
19370 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
19371 // CHECK27: omp.body.continue:
19372 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19373 // CHECK27: omp.inner.for.inc:
19374 // CHECK27-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
19375 // CHECK27-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP27]], 1
19376 // CHECK27-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
19377 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
19378 // CHECK27: omp.inner.for.end:
19379 // CHECK27-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
19380 // CHECK27: omp.dispatch.inc:
19381 // CHECK27-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19382 // CHECK27-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19383 // CHECK27-NEXT: [[ADD25:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
19384 // CHECK27-NEXT: store i32 [[ADD25]], i32* [[DOTOMP_LB]], align 4
19385 // CHECK27-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19386 // CHECK27-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19387 // CHECK27-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
19388 // CHECK27-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_UB]], align 4
19389 // CHECK27-NEXT: br label [[OMP_DISPATCH_COND]]
19390 // CHECK27: omp.dispatch.end:
19391 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]])
19392 // CHECK27-NEXT: ret void
19393 //
19394 //
19395 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200
19396 // CHECK27-SAME: (i32 [[N:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
19397 // CHECK27-NEXT: entry:
19398 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
19399 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
19400 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
19401 // CHECK27-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4
19402 // CHECK27-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
19403 // CHECK27-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
19404 // CHECK27-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
19405 // CHECK27-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
19406 // CHECK27-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4
19407 // CHECK27-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
19408 // CHECK27-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
19409 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
19410 // CHECK27-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4
19411 // CHECK27-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
19412 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
19413 // CHECK27-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8*
19414 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
19415 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
19416 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4
19417 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4
19418 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4
19419 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[A_CASTED]], align 4
19420 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4
19421 // CHECK27-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV]], align 4
19422 // CHECK27-NEXT: [[CONV2:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
19423 // CHECK27-NEXT: store i16 [[TMP5]], i16* [[CONV2]], align 2
19424 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[AA_CASTED]], align 4
19425 // CHECK27-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV1]], align 4
19426 // CHECK27-NEXT: [[CONV3:%.*]] = bitcast i32* [[AAA_CASTED]] to i8*
19427 // CHECK27-NEXT: store i8 [[TMP7]], i8* [[CONV3]], align 1
19428 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[AAA_CASTED]], align 4
19429 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, [10 x i32]*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP8]], [10 x i32]* [[TMP0]])
19430 // CHECK27-NEXT: ret void
19431 //
19432 //
19433 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..4
19434 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
19435 // CHECK27-NEXT: entry:
19436 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
19437 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
19438 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
19439 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
19440 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
19441 // CHECK27-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4
19442 // CHECK27-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
19443 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19444 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4
19445 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
19446 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
19447 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
19448 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4
19449 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
19450 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
19451 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19452 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19453 // CHECK27-NEXT: [[I6:%.*]] = alloca i32, align 4
19454 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
19455 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
19456 // CHECK27-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
19457 // CHECK27-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
19458 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
19459 // CHECK27-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4
19460 // CHECK27-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
19461 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
19462 // CHECK27-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8*
19463 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
19464 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
19465 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
19466 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
19467 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
19468 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
19469 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
19470 // CHECK27-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]]
19471 // CHECK27-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1
19472 // CHECK27-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1
19473 // CHECK27-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
19474 // CHECK27-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1
19475 // CHECK27-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
19476 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
19477 // CHECK27-NEXT: store i32 [[TMP5]], i32* [[I]], align 4
19478 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
19479 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
19480 // CHECK27-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]]
19481 // CHECK27-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
19482 // CHECK27: omp.precond.then:
19483 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
19484 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
19485 // CHECK27-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
19486 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19487 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19488 // CHECK27-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
19489 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
19490 // CHECK27-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19491 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19492 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
19493 // CHECK27-NEXT: [[CMP7:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]]
19494 // CHECK27-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19495 // CHECK27: cond.true:
19496 // CHECK27-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
19497 // CHECK27-NEXT: br label [[COND_END:%.*]]
19498 // CHECK27: cond.false:
19499 // CHECK27-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19500 // CHECK27-NEXT: br label [[COND_END]]
19501 // CHECK27: cond.end:
19502 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
19503 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
19504 // CHECK27-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19505 // CHECK27-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
19506 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19507 // CHECK27: omp.inner.for.cond:
19508 // CHECK27-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19509 // CHECK27-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19510 // CHECK27-NEXT: [[ADD8:%.*]] = add i32 [[TMP17]], 1
19511 // CHECK27-NEXT: [[CMP9:%.*]] = icmp ult i32 [[TMP16]], [[ADD8]]
19512 // CHECK27-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19513 // CHECK27: omp.inner.for.body:
19514 // CHECK27-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
19515 // CHECK27-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19516 // CHECK27-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1
19517 // CHECK27-NEXT: [[ADD10:%.*]] = add i32 [[TMP18]], [[MUL]]
19518 // CHECK27-NEXT: store i32 [[ADD10]], i32* [[I6]], align 4
19519 // CHECK27-NEXT: [[TMP20:%.*]] = load i32, i32* [[A_ADDR]], align 4
19520 // CHECK27-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1
19521 // CHECK27-NEXT: store i32 [[ADD11]], i32* [[A_ADDR]], align 4
19522 // CHECK27-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV]], align 4
19523 // CHECK27-NEXT: [[CONV12:%.*]] = sext i16 [[TMP21]] to i32
19524 // CHECK27-NEXT: [[ADD13:%.*]] = add nsw i32 [[CONV12]], 1
19525 // CHECK27-NEXT: [[CONV14:%.*]] = trunc i32 [[ADD13]] to i16
19526 // CHECK27-NEXT: store i16 [[CONV14]], i16* [[CONV]], align 4
19527 // CHECK27-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV1]], align 4
19528 // CHECK27-NEXT: [[CONV15:%.*]] = sext i8 [[TMP22]] to i32
19529 // CHECK27-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV15]], 1
19530 // CHECK27-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i8
19531 // CHECK27-NEXT: store i8 [[CONV17]], i8* [[CONV1]], align 4
19532 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2
19533 // CHECK27-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
19534 // CHECK27-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], 1
19535 // CHECK27-NEXT: store i32 [[ADD18]], i32* [[ARRAYIDX]], align 4
19536 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
19537 // CHECK27: omp.body.continue:
19538 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19539 // CHECK27: omp.inner.for.inc:
19540 // CHECK27-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19541 // CHECK27-NEXT: [[ADD19:%.*]] = add i32 [[TMP24]], 1
19542 // CHECK27-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4
19543 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]]
19544 // CHECK27: omp.inner.for.end:
19545 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
19546 // CHECK27: omp.loop.exit:
19547 // CHECK27-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
19548 // CHECK27-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
19549 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
19550 // CHECK27-NEXT: br label [[OMP_PRECOND_END]]
19551 // CHECK27: omp.precond.end:
19552 // CHECK27-NEXT: ret void
19553 //
19554 //
19555 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218
19556 // CHECK27-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] {
19557 // CHECK27-NEXT: entry:
19558 // CHECK27-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
19559 // CHECK27-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
19560 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
19561 // CHECK27-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
19562 // CHECK27-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4
19563 // CHECK27-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4
19564 // CHECK27-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
19565 // CHECK27-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4
19566 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
19567 // CHECK27-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
19568 // CHECK27-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4
19569 // CHECK27-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
19570 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
19571 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
19572 // CHECK27-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4
19573 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[B_ADDR]], align 4
19574 // CHECK27-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4
19575 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4
19576 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32, i32, i32, i16*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i32 [[TMP5]], i32 [[TMP1]], i32 [[TMP2]], i16* [[TMP3]])
19577 // CHECK27-NEXT: ret void
19578 //
19579 //
19580 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..5
19581 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] {
19582 // CHECK27-NEXT: entry:
19583 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
19584 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
19585 // CHECK27-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
19586 // CHECK27-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
19587 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
19588 // CHECK27-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
19589 // CHECK27-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4
19590 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19591 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4
19592 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
19593 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
19594 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19595 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19596 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4
19597 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
19598 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
19599 // CHECK27-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
19600 // CHECK27-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4
19601 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
19602 // CHECK27-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
19603 // CHECK27-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4
19604 // CHECK27-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
19605 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
19606 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
19607 // CHECK27-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4
19608 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
19609 // CHECK27-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
19610 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19611 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19612 // CHECK27-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
19613 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
19614 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19615 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19616 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9
19617 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19618 // CHECK27: cond.true:
19619 // CHECK27-NEXT: br label [[COND_END:%.*]]
19620 // CHECK27: cond.false:
19621 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19622 // CHECK27-NEXT: br label [[COND_END]]
19623 // CHECK27: cond.end:
19624 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
19625 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
19626 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19627 // CHECK27-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
19628 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19629 // CHECK27: omp.inner.for.cond:
19630 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19631 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19632 // CHECK27-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
19633 // CHECK27-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19634 // CHECK27: omp.inner.for.body:
19635 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19636 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
19637 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19638 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I]], align 4
19639 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[B_ADDR]], align 4
19640 // CHECK27-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP12]] to double
19641 // CHECK27-NEXT: [[ADD4:%.*]] = fadd double [[CONV]], 1.500000e+00
19642 // CHECK27-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
19643 // CHECK27-NEXT: store double [[ADD4]], double* [[A]], align 4
19644 // CHECK27-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0
19645 // CHECK27-NEXT: [[TMP13:%.*]] = load double, double* [[A5]], align 4
19646 // CHECK27-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00
19647 // CHECK27-NEXT: store double [[INC]], double* [[A5]], align 4
19648 // CHECK27-NEXT: [[CONV6:%.*]] = fptosi double [[INC]] to i16
19649 // CHECK27-NEXT: [[TMP14:%.*]] = mul nsw i32 1, [[TMP2]]
19650 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i32 [[TMP14]]
19651 // CHECK27-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1
19652 // CHECK27-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX7]], align 2
19653 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
19654 // CHECK27: omp.body.continue:
19655 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19656 // CHECK27: omp.inner.for.inc:
19657 // CHECK27-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19658 // CHECK27-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
19659 // CHECK27-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
19660 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]]
19661 // CHECK27: omp.inner.for.end:
19662 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
19663 // CHECK27: omp.loop.exit:
19664 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
19665 // CHECK27-NEXT: ret void
19666 //
19667 //
19668 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183
19669 // CHECK27-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
19670 // CHECK27-NEXT: entry:
19671 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
19672 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
19673 // CHECK27-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
19674 // CHECK27-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
19675 // CHECK27-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
19676 // CHECK27-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
19677 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
19678 // CHECK27-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
19679 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
19680 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
19681 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
19682 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[A_CASTED]], align 4
19683 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4
19684 // CHECK27-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4
19685 // CHECK27-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
19686 // CHECK27-NEXT: store i16 [[TMP3]], i16* [[CONV1]], align 2
19687 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4
19688 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], [10 x i32]* [[TMP0]])
19689 // CHECK27-NEXT: ret void
19690 //
19691 //
19692 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..6
19693 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
19694 // CHECK27-NEXT: entry:
19695 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
19696 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
19697 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
19698 // CHECK27-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
19699 // CHECK27-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
19700 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19701 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4
19702 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
19703 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
19704 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19705 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19706 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4
19707 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
19708 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
19709 // CHECK27-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
19710 // CHECK27-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
19711 // CHECK27-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
19712 // CHECK27-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
19713 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
19714 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
19715 // CHECK27-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
19716 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19717 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19718 // CHECK27-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
19719 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
19720 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19721 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19722 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
19723 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19724 // CHECK27: cond.true:
19725 // CHECK27-NEXT: br label [[COND_END:%.*]]
19726 // CHECK27: cond.false:
19727 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19728 // CHECK27-NEXT: br label [[COND_END]]
19729 // CHECK27: cond.end:
19730 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
19731 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
19732 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19733 // CHECK27-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
19734 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19735 // CHECK27: omp.inner.for.cond:
19736 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19737 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19738 // CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
19739 // CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19740 // CHECK27: omp.inner.for.body:
19741 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19742 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
19743 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19744 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I]], align 4
19745 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4
19746 // CHECK27-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1
19747 // CHECK27-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4
19748 // CHECK27-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV]], align 4
19749 // CHECK27-NEXT: [[CONV3:%.*]] = sext i16 [[TMP10]] to i32
19750 // CHECK27-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1
19751 // CHECK27-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16
19752 // CHECK27-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 4
19753 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2
19754 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
19755 // CHECK27-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], 1
19756 // CHECK27-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4
19757 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
19758 // CHECK27: omp.body.continue:
19759 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19760 // CHECK27: omp.inner.for.inc:
19761 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19762 // CHECK27-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1
19763 // CHECK27-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
19764 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]]
19765 // CHECK27: omp.inner.for.end:
19766 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
19767 // CHECK27: omp.loop.exit:
19768 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
19769 // CHECK27-NEXT: ret void
19770 //
19771 //
19772 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l103
19773 // CHECK28-SAME: (i32 [[AA:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]], i32 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] {
19774 // CHECK28-NEXT: entry:
19775 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
19776 // CHECK28-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
19777 // CHECK28-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4
19778 // CHECK28-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
19779 // CHECK28-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2:[0-9]+]])
19780 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
19781 // CHECK28-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
19782 // CHECK28-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
19783 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
19784 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
19785 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
19786 // CHECK28-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]])
19787 // CHECK28-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4
19788 // CHECK28-NEXT: [[CONV3:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
19789 // CHECK28-NEXT: store i16 [[TMP3]], i16* [[CONV3]], align 2
19790 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4
19791 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP4]])
19792 // CHECK28-NEXT: ret void
19793 //
19794 //
19795 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined.
19796 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[AA:%.*]]) #[[ATTR0]] {
19797 // CHECK28-NEXT: entry:
19798 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
19799 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
19800 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
19801 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19802 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4
19803 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
19804 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
19805 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19806 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19807 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4
19808 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
19809 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
19810 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
19811 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
19812 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
19813 // CHECK28-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
19814 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19815 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19816 // CHECK28-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
19817 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
19818 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19819 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19820 // CHECK28-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
19821 // CHECK28-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19822 // CHECK28: cond.true:
19823 // CHECK28-NEXT: br label [[COND_END:%.*]]
19824 // CHECK28: cond.false:
19825 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19826 // CHECK28-NEXT: br label [[COND_END]]
19827 // CHECK28: cond.end:
19828 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
19829 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
19830 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19831 // CHECK28-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
19832 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19833 // CHECK28: omp.inner.for.cond:
19834 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19835 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19836 // CHECK28-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
19837 // CHECK28-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19838 // CHECK28: omp.inner.for.body:
19839 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19840 // CHECK28-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
19841 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19842 // CHECK28-NEXT: store i32 [[ADD]], i32* [[I]], align 4
19843 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
19844 // CHECK28: omp.body.continue:
19845 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19846 // CHECK28: omp.inner.for.inc:
19847 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19848 // CHECK28-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
19849 // CHECK28-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
19850 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]]
19851 // CHECK28: omp.inner.for.end:
19852 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
19853 // CHECK28: omp.loop.exit:
19854 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
19855 // CHECK28-NEXT: ret void
19856 //
19857 //
19858 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l113
19859 // CHECK28-SAME: (i32 [[AA:%.*]]) #[[ATTR0]] {
19860 // CHECK28-NEXT: entry:
19861 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
19862 // CHECK28-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
19863 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
19864 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
19865 // CHECK28-NEXT: [[TMP0:%.*]] = load i16, i16* [[CONV]], align 4
19866 // CHECK28-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
19867 // CHECK28-NEXT: store i16 [[TMP0]], i16* [[CONV1]], align 2
19868 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[AA_CASTED]], align 4
19869 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP1]])
19870 // CHECK28-NEXT: ret void
19871 //
19872 //
19873 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..1
19874 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[AA:%.*]]) #[[ATTR0]] {
19875 // CHECK28-NEXT: entry:
19876 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
19877 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
19878 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
19879 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19880 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4
19881 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
19882 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
19883 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19884 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19885 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4
19886 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
19887 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
19888 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
19889 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
19890 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
19891 // CHECK28-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
19892 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19893 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19894 // CHECK28-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
19895 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
19896 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19897 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19898 // CHECK28-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
19899 // CHECK28-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19900 // CHECK28: cond.true:
19901 // CHECK28-NEXT: br label [[COND_END:%.*]]
19902 // CHECK28: cond.false:
19903 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19904 // CHECK28-NEXT: br label [[COND_END]]
19905 // CHECK28: cond.end:
19906 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
19907 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
19908 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19909 // CHECK28-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
19910 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19911 // CHECK28: omp.inner.for.cond:
19912 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19913 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19914 // CHECK28-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
19915 // CHECK28-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19916 // CHECK28: omp.inner.for.body:
19917 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19918 // CHECK28-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
19919 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19920 // CHECK28-NEXT: store i32 [[ADD]], i32* [[I]], align 4
19921 // CHECK28-NEXT: [[TMP8:%.*]] = load i16, i16* [[CONV]], align 4
19922 // CHECK28-NEXT: [[CONV2:%.*]] = sext i16 [[TMP8]] to i32
19923 // CHECK28-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV2]], 1
19924 // CHECK28-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i16
19925 // CHECK28-NEXT: store i16 [[CONV4]], i16* [[CONV]], align 4
19926 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
19927 // CHECK28: omp.body.continue:
19928 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19929 // CHECK28: omp.inner.for.inc:
19930 // CHECK28-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19931 // CHECK28-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], 1
19932 // CHECK28-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
19933 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]]
19934 // CHECK28: omp.inner.for.end:
19935 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
19936 // CHECK28: omp.loop.exit:
19937 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
19938 // CHECK28-NEXT: ret void
19939 //
19940 //
19941 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l120
19942 // CHECK28-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR0]] {
19943 // CHECK28-NEXT: entry:
19944 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
19945 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
19946 // CHECK28-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
19947 // CHECK28-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
19948 // CHECK28-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
19949 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
19950 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
19951 // CHECK28-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
19952 // CHECK28-NEXT: store i32 [[TMP0]], i32* [[A_CASTED]], align 4
19953 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_CASTED]], align 4
19954 // CHECK28-NEXT: [[TMP2:%.*]] = load i16, i16* [[CONV]], align 4
19955 // CHECK28-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
19956 // CHECK28-NEXT: store i16 [[TMP2]], i16* [[CONV1]], align 2
19957 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[AA_CASTED]], align 4
19958 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP1]], i32 [[TMP3]])
19959 // CHECK28-NEXT: ret void
19960 //
19961 //
19962 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..2
19963 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]]) #[[ATTR0]] {
19964 // CHECK28-NEXT: entry:
19965 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
19966 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
19967 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
19968 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
19969 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19970 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4
19971 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
19972 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
19973 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19974 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19975 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4
19976 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
19977 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
19978 // CHECK28-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
19979 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
19980 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
19981 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
19982 // CHECK28-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
19983 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19984 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19985 // CHECK28-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
19986 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
19987 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19988 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19989 // CHECK28-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
19990 // CHECK28-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19991 // CHECK28: cond.true:
19992 // CHECK28-NEXT: br label [[COND_END:%.*]]
19993 // CHECK28: cond.false:
19994 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19995 // CHECK28-NEXT: br label [[COND_END]]
19996 // CHECK28: cond.end:
19997 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
19998 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
19999 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20000 // CHECK28-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
20001 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20002 // CHECK28: omp.inner.for.cond:
20003 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20004 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20005 // CHECK28-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
20006 // CHECK28-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20007 // CHECK28: omp.inner.for.body:
20008 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20009 // CHECK28-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
20010 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20011 // CHECK28-NEXT: store i32 [[ADD]], i32* [[I]], align 4
20012 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4
20013 // CHECK28-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1
20014 // CHECK28-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4
20015 // CHECK28-NEXT: [[TMP9:%.*]] = load i16, i16* [[CONV]], align 4
20016 // CHECK28-NEXT: [[CONV3:%.*]] = sext i16 [[TMP9]] to i32
20017 // CHECK28-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1
20018 // CHECK28-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16
20019 // CHECK28-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 4
20020 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
20021 // CHECK28: omp.body.continue:
20022 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20023 // CHECK28: omp.inner.for.inc:
20024 // CHECK28-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20025 // CHECK28-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1
20026 // CHECK28-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
20027 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]]
20028 // CHECK28: omp.inner.for.end:
20029 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
20030 // CHECK28: omp.loop.exit:
20031 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
20032 // CHECK28-NEXT: ret void
20033 //
20034 //
20035 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3fooi_l145
20036 // CHECK28-SAME: (i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
20037 // CHECK28-NEXT: entry:
20038 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
20039 // CHECK28-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4
20040 // CHECK28-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
20041 // CHECK28-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4
20042 // CHECK28-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4
20043 // CHECK28-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
20044 // CHECK28-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4
20045 // CHECK28-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4
20046 // CHECK28-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4
20047 // CHECK28-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
20048 // CHECK28-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
20049 // CHECK28-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
20050 // CHECK28-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
20051 // CHECK28-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4
20052 // CHECK28-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
20053 // CHECK28-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4
20054 // CHECK28-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4
20055 // CHECK28-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
20056 // CHECK28-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4
20057 // CHECK28-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4
20058 // CHECK28-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4
20059 // CHECK28-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
20060 // CHECK28-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4
20061 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
20062 // CHECK28-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4
20063 // CHECK28-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4
20064 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
20065 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4
20066 // CHECK28-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4
20067 // CHECK28-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4
20068 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ADDR]], align 4
20069 // CHECK28-NEXT: store i32 [[TMP8]], i32* [[A_CASTED]], align 4
20070 // CHECK28-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_CASTED]], align 4
20071 // CHECK28-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
20072 // CHECK28-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
20073 // CHECK28-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
20074 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 10, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [10 x float]*, i32, float*, [5 x [10 x double]]*, i32, i32, double*, %struct.TT*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP9]], [10 x float]* [[TMP0]], i32 [[TMP1]], float* [[TMP2]], [5 x [10 x double]]* [[TMP3]], i32 [[TMP4]], i32 [[TMP5]], double* [[TMP6]], %struct.TT* [[TMP7]], i32 [[TMP11]])
20075 // CHECK28-NEXT: ret void
20076 //
20077 //
20078 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..3
20079 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], [10 x float]* nonnull align 4 dereferenceable(40) [[B:%.*]], i32 [[VLA:%.*]], float* nonnull align 4 dereferenceable(4) [[BN:%.*]], [5 x [10 x double]]* nonnull align 4 dereferenceable(400) [[C:%.*]], i32 [[VLA1:%.*]], i32 [[VLA3:%.*]], double* nonnull align 4 dereferenceable(8) [[CN:%.*]], %struct.TT* nonnull align 4 dereferenceable(12) [[D:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] {
20080 // CHECK28-NEXT: entry:
20081 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
20082 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
20083 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
20084 // CHECK28-NEXT: [[B_ADDR:%.*]] = alloca [10 x float]*, align 4
20085 // CHECK28-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
20086 // CHECK28-NEXT: [[BN_ADDR:%.*]] = alloca float*, align 4
20087 // CHECK28-NEXT: [[C_ADDR:%.*]] = alloca [5 x [10 x double]]*, align 4
20088 // CHECK28-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
20089 // CHECK28-NEXT: [[VLA_ADDR4:%.*]] = alloca i32, align 4
20090 // CHECK28-NEXT: [[CN_ADDR:%.*]] = alloca double*, align 4
20091 // CHECK28-NEXT: [[D_ADDR:%.*]] = alloca %struct.TT*, align 4
20092 // CHECK28-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
20093 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20094 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4
20095 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
20096 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
20097 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20098 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20099 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4
20100 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
20101 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
20102 // CHECK28-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
20103 // CHECK28-NEXT: store [10 x float]* [[B]], [10 x float]** [[B_ADDR]], align 4
20104 // CHECK28-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
20105 // CHECK28-NEXT: store float* [[BN]], float** [[BN_ADDR]], align 4
20106 // CHECK28-NEXT: store [5 x [10 x double]]* [[C]], [5 x [10 x double]]** [[C_ADDR]], align 4
20107 // CHECK28-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
20108 // CHECK28-NEXT: store i32 [[VLA3]], i32* [[VLA_ADDR4]], align 4
20109 // CHECK28-NEXT: store double* [[CN]], double** [[CN_ADDR]], align 4
20110 // CHECK28-NEXT: store %struct.TT* [[D]], %struct.TT** [[D_ADDR]], align 4
20111 // CHECK28-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
20112 // CHECK28-NEXT: [[TMP0:%.*]] = load [10 x float]*, [10 x float]** [[B_ADDR]], align 4
20113 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
20114 // CHECK28-NEXT: [[TMP2:%.*]] = load float*, float** [[BN_ADDR]], align 4
20115 // CHECK28-NEXT: [[TMP3:%.*]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[C_ADDR]], align 4
20116 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
20117 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[VLA_ADDR4]], align 4
20118 // CHECK28-NEXT: [[TMP6:%.*]] = load double*, double** [[CN_ADDR]], align 4
20119 // CHECK28-NEXT: [[TMP7:%.*]] = load %struct.TT*, %struct.TT** [[D_ADDR]], align 4
20120 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
20121 // CHECK28-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
20122 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20123 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20124 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
20125 // CHECK28-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
20126 // CHECK28-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
20127 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP8]])
20128 // CHECK28-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
20129 // CHECK28: omp.dispatch.cond:
20130 // CHECK28-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20131 // CHECK28-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 9
20132 // CHECK28-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20133 // CHECK28: cond.true:
20134 // CHECK28-NEXT: br label [[COND_END:%.*]]
20135 // CHECK28: cond.false:
20136 // CHECK28-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20137 // CHECK28-NEXT: br label [[COND_END]]
20138 // CHECK28: cond.end:
20139 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
20140 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
20141 // CHECK28-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20142 // CHECK28-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
20143 // CHECK28-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20144 // CHECK28-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20145 // CHECK28-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
20146 // CHECK28-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
20147 // CHECK28: omp.dispatch.body:
20148 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20149 // CHECK28: omp.inner.for.cond:
20150 // CHECK28-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
20151 // CHECK28-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
20152 // CHECK28-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
20153 // CHECK28-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20154 // CHECK28: omp.inner.for.body:
20155 // CHECK28-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
20156 // CHECK28-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
20157 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20158 // CHECK28-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
20159 // CHECK28-NEXT: [[TMP19:%.*]] = load i32, i32* [[A_ADDR]], align 4, !llvm.access.group !14
20160 // CHECK28-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
20161 // CHECK28-NEXT: store i32 [[ADD7]], i32* [[A_ADDR]], align 4, !llvm.access.group !14
20162 // CHECK28-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x float], [10 x float]* [[TMP0]], i32 0, i32 2
20163 // CHECK28-NEXT: [[TMP20:%.*]] = load float, float* [[ARRAYIDX]], align 4, !llvm.access.group !14
20164 // CHECK28-NEXT: [[CONV:%.*]] = fpext float [[TMP20]] to double
20165 // CHECK28-NEXT: [[ADD8:%.*]] = fadd double [[CONV]], 1.000000e+00
20166 // CHECK28-NEXT: [[CONV9:%.*]] = fptrunc double [[ADD8]] to float
20167 // CHECK28-NEXT: store float [[CONV9]], float* [[ARRAYIDX]], align 4, !llvm.access.group !14
20168 // CHECK28-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, float* [[TMP2]], i32 3
20169 // CHECK28-NEXT: [[TMP21:%.*]] = load float, float* [[ARRAYIDX10]], align 4, !llvm.access.group !14
20170 // CHECK28-NEXT: [[CONV11:%.*]] = fpext float [[TMP21]] to double
20171 // CHECK28-NEXT: [[ADD12:%.*]] = fadd double [[CONV11]], 1.000000e+00
20172 // CHECK28-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float
20173 // CHECK28-NEXT: store float [[CONV13]], float* [[ARRAYIDX10]], align 4, !llvm.access.group !14
20174 // CHECK28-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[TMP3]], i32 0, i32 1
20175 // CHECK28-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [10 x double], [10 x double]* [[ARRAYIDX14]], i32 0, i32 2
20176 // CHECK28-NEXT: [[TMP22:%.*]] = load double, double* [[ARRAYIDX15]], align 8, !llvm.access.group !14
20177 // CHECK28-NEXT: [[ADD16:%.*]] = fadd double [[TMP22]], 1.000000e+00
20178 // CHECK28-NEXT: store double [[ADD16]], double* [[ARRAYIDX15]], align 8, !llvm.access.group !14
20179 // CHECK28-NEXT: [[TMP23:%.*]] = mul nsw i32 1, [[TMP5]]
20180 // CHECK28-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP6]], i32 [[TMP23]]
20181 // CHECK28-NEXT: [[ARRAYIDX18:%.*]] = getelementptr inbounds double, double* [[ARRAYIDX17]], i32 3
20182 // CHECK28-NEXT: [[TMP24:%.*]] = load double, double* [[ARRAYIDX18]], align 8, !llvm.access.group !14
20183 // CHECK28-NEXT: [[ADD19:%.*]] = fadd double [[TMP24]], 1.000000e+00
20184 // CHECK28-NEXT: store double [[ADD19]], double* [[ARRAYIDX18]], align 8, !llvm.access.group !14
20185 // CHECK28-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_TT:%.*]], %struct.TT* [[TMP7]], i32 0, i32 0
20186 // CHECK28-NEXT: [[TMP25:%.*]] = load i64, i64* [[X]], align 4, !llvm.access.group !14
20187 // CHECK28-NEXT: [[ADD20:%.*]] = add nsw i64 [[TMP25]], 1
20188 // CHECK28-NEXT: store i64 [[ADD20]], i64* [[X]], align 4, !llvm.access.group !14
20189 // CHECK28-NEXT: [[Y:%.*]] = getelementptr inbounds [[STRUCT_TT]], %struct.TT* [[TMP7]], i32 0, i32 1
20190 // CHECK28-NEXT: [[TMP26:%.*]] = load i8, i8* [[Y]], align 4, !llvm.access.group !14
20191 // CHECK28-NEXT: [[CONV21:%.*]] = sext i8 [[TMP26]] to i32
20192 // CHECK28-NEXT: [[ADD22:%.*]] = add nsw i32 [[CONV21]], 1
20193 // CHECK28-NEXT: [[CONV23:%.*]] = trunc i32 [[ADD22]] to i8
20194 // CHECK28-NEXT: store i8 [[CONV23]], i8* [[Y]], align 4, !llvm.access.group !14
20195 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
20196 // CHECK28: omp.body.continue:
20197 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20198 // CHECK28: omp.inner.for.inc:
20199 // CHECK28-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
20200 // CHECK28-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP27]], 1
20201 // CHECK28-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
20202 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
20203 // CHECK28: omp.inner.for.end:
20204 // CHECK28-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
20205 // CHECK28: omp.dispatch.inc:
20206 // CHECK28-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20207 // CHECK28-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
20208 // CHECK28-NEXT: [[ADD25:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
20209 // CHECK28-NEXT: store i32 [[ADD25]], i32* [[DOTOMP_LB]], align 4
20210 // CHECK28-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20211 // CHECK28-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
20212 // CHECK28-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
20213 // CHECK28-NEXT: store i32 [[ADD26]], i32* [[DOTOMP_UB]], align 4
20214 // CHECK28-NEXT: br label [[OMP_DISPATCH_COND]]
20215 // CHECK28: omp.dispatch.end:
20216 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]])
20217 // CHECK28-NEXT: ret void
20218 //
20219 //
20220 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l200
20221 // CHECK28-SAME: (i32 [[N:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
20222 // CHECK28-NEXT: entry:
20223 // CHECK28-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
20224 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
20225 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
20226 // CHECK28-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4
20227 // CHECK28-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
20228 // CHECK28-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
20229 // CHECK28-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
20230 // CHECK28-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
20231 // CHECK28-NEXT: [[AAA_CASTED:%.*]] = alloca i32, align 4
20232 // CHECK28-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
20233 // CHECK28-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
20234 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
20235 // CHECK28-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4
20236 // CHECK28-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
20237 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
20238 // CHECK28-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8*
20239 // CHECK28-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
20240 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
20241 // CHECK28-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4
20242 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4
20243 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_ADDR]], align 4
20244 // CHECK28-NEXT: store i32 [[TMP3]], i32* [[A_CASTED]], align 4
20245 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[A_CASTED]], align 4
20246 // CHECK28-NEXT: [[TMP5:%.*]] = load i16, i16* [[CONV]], align 4
20247 // CHECK28-NEXT: [[CONV2:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
20248 // CHECK28-NEXT: store i16 [[TMP5]], i16* [[CONV2]], align 2
20249 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[AA_CASTED]], align 4
20250 // CHECK28-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV1]], align 4
20251 // CHECK28-NEXT: [[CONV3:%.*]] = bitcast i32* [[AAA_CASTED]] to i8*
20252 // CHECK28-NEXT: store i8 [[TMP7]], i8* [[CONV3]], align 1
20253 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[AAA_CASTED]], align 4
20254 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, [10 x i32]*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP8]], [10 x i32]* [[TMP0]])
20255 // CHECK28-NEXT: ret void
20256 //
20257 //
20258 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..4
20259 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], i32 [[AAA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
20260 // CHECK28-NEXT: entry:
20261 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
20262 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
20263 // CHECK28-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
20264 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
20265 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
20266 // CHECK28-NEXT: [[AAA_ADDR:%.*]] = alloca i32, align 4
20267 // CHECK28-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
20268 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20269 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4
20270 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20271 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
20272 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
20273 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4
20274 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
20275 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
20276 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20277 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20278 // CHECK28-NEXT: [[I6:%.*]] = alloca i32, align 4
20279 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
20280 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
20281 // CHECK28-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
20282 // CHECK28-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
20283 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
20284 // CHECK28-NEXT: store i32 [[AAA]], i32* [[AAA_ADDR]], align 4
20285 // CHECK28-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
20286 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
20287 // CHECK28-NEXT: [[CONV1:%.*]] = bitcast i32* [[AAA_ADDR]] to i8*
20288 // CHECK28-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
20289 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
20290 // CHECK28-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
20291 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
20292 // CHECK28-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
20293 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20294 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20295 // CHECK28-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]]
20296 // CHECK28-NEXT: [[SUB4:%.*]] = sub i32 [[SUB]], 1
20297 // CHECK28-NEXT: [[ADD:%.*]] = add i32 [[SUB4]], 1
20298 // CHECK28-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
20299 // CHECK28-NEXT: [[SUB5:%.*]] = sub i32 [[DIV]], 1
20300 // CHECK28-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
20301 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20302 // CHECK28-NEXT: store i32 [[TMP5]], i32* [[I]], align 4
20303 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20304 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20305 // CHECK28-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]]
20306 // CHECK28-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20307 // CHECK28: omp.precond.then:
20308 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
20309 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
20310 // CHECK28-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
20311 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20312 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20313 // CHECK28-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
20314 // CHECK28-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
20315 // CHECK28-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20316 // CHECK28-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20317 // CHECK28-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
20318 // CHECK28-NEXT: [[CMP7:%.*]] = icmp ugt i32 [[TMP11]], [[TMP12]]
20319 // CHECK28-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20320 // CHECK28: cond.true:
20321 // CHECK28-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
20322 // CHECK28-NEXT: br label [[COND_END:%.*]]
20323 // CHECK28: cond.false:
20324 // CHECK28-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20325 // CHECK28-NEXT: br label [[COND_END]]
20326 // CHECK28: cond.end:
20327 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
20328 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
20329 // CHECK28-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20330 // CHECK28-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
20331 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20332 // CHECK28: omp.inner.for.cond:
20333 // CHECK28-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20334 // CHECK28-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20335 // CHECK28-NEXT: [[ADD8:%.*]] = add i32 [[TMP17]], 1
20336 // CHECK28-NEXT: [[CMP9:%.*]] = icmp ult i32 [[TMP16]], [[ADD8]]
20337 // CHECK28-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20338 // CHECK28: omp.inner.for.body:
20339 // CHECK28-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20340 // CHECK28-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20341 // CHECK28-NEXT: [[MUL:%.*]] = mul i32 [[TMP19]], 1
20342 // CHECK28-NEXT: [[ADD10:%.*]] = add i32 [[TMP18]], [[MUL]]
20343 // CHECK28-NEXT: store i32 [[ADD10]], i32* [[I6]], align 4
20344 // CHECK28-NEXT: [[TMP20:%.*]] = load i32, i32* [[A_ADDR]], align 4
20345 // CHECK28-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1
20346 // CHECK28-NEXT: store i32 [[ADD11]], i32* [[A_ADDR]], align 4
20347 // CHECK28-NEXT: [[TMP21:%.*]] = load i16, i16* [[CONV]], align 4
20348 // CHECK28-NEXT: [[CONV12:%.*]] = sext i16 [[TMP21]] to i32
20349 // CHECK28-NEXT: [[ADD13:%.*]] = add nsw i32 [[CONV12]], 1
20350 // CHECK28-NEXT: [[CONV14:%.*]] = trunc i32 [[ADD13]] to i16
20351 // CHECK28-NEXT: store i16 [[CONV14]], i16* [[CONV]], align 4
20352 // CHECK28-NEXT: [[TMP22:%.*]] = load i8, i8* [[CONV1]], align 4
20353 // CHECK28-NEXT: [[CONV15:%.*]] = sext i8 [[TMP22]] to i32
20354 // CHECK28-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV15]], 1
20355 // CHECK28-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i8
20356 // CHECK28-NEXT: store i8 [[CONV17]], i8* [[CONV1]], align 4
20357 // CHECK28-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2
20358 // CHECK28-NEXT: [[TMP23:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
20359 // CHECK28-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], 1
20360 // CHECK28-NEXT: store i32 [[ADD18]], i32* [[ARRAYIDX]], align 4
20361 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
20362 // CHECK28: omp.body.continue:
20363 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20364 // CHECK28: omp.inner.for.inc:
20365 // CHECK28-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20366 // CHECK28-NEXT: [[ADD19:%.*]] = add i32 [[TMP24]], 1
20367 // CHECK28-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_IV]], align 4
20368 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]]
20369 // CHECK28: omp.inner.for.end:
20370 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
20371 // CHECK28: omp.loop.exit:
20372 // CHECK28-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
20373 // CHECK28-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
20374 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
20375 // CHECK28-NEXT: br label [[OMP_PRECOND_END]]
20376 // CHECK28: omp.precond.end:
20377 // CHECK28-NEXT: ret void
20378 //
20379 //
20380 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l218
20381 // CHECK28-SAME: (%struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] {
20382 // CHECK28-NEXT: entry:
20383 // CHECK28-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
20384 // CHECK28-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
20385 // CHECK28-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
20386 // CHECK28-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
20387 // CHECK28-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4
20388 // CHECK28-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4
20389 // CHECK28-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
20390 // CHECK28-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4
20391 // CHECK28-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
20392 // CHECK28-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
20393 // CHECK28-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4
20394 // CHECK28-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
20395 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
20396 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
20397 // CHECK28-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4
20398 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[B_ADDR]], align 4
20399 // CHECK28-NEXT: store i32 [[TMP4]], i32* [[B_CASTED]], align 4
20400 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[B_CASTED]], align 4
20401 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S1*, i32, i32, i32, i16*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.S1* [[TMP0]], i32 [[TMP5]], i32 [[TMP1]], i32 [[TMP2]], i16* [[TMP3]])
20402 // CHECK28-NEXT: ret void
20403 //
20404 //
20405 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..5
20406 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S1* [[THIS:%.*]], i32 [[B:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i16* nonnull align 2 dereferenceable(2) [[C:%.*]]) #[[ATTR0]] {
20407 // CHECK28-NEXT: entry:
20408 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
20409 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
20410 // CHECK28-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S1*, align 4
20411 // CHECK28-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
20412 // CHECK28-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
20413 // CHECK28-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
20414 // CHECK28-NEXT: [[C_ADDR:%.*]] = alloca i16*, align 4
20415 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20416 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4
20417 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
20418 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
20419 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20420 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20421 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4
20422 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
20423 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
20424 // CHECK28-NEXT: store %struct.S1* [[THIS]], %struct.S1** [[THIS_ADDR]], align 4
20425 // CHECK28-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4
20426 // CHECK28-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
20427 // CHECK28-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
20428 // CHECK28-NEXT: store i16* [[C]], i16** [[C_ADDR]], align 4
20429 // CHECK28-NEXT: [[TMP0:%.*]] = load %struct.S1*, %struct.S1** [[THIS_ADDR]], align 4
20430 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
20431 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
20432 // CHECK28-NEXT: [[TMP3:%.*]] = load i16*, i16** [[C_ADDR]], align 4
20433 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
20434 // CHECK28-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
20435 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20436 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20437 // CHECK28-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
20438 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
20439 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20440 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20441 // CHECK28-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 9
20442 // CHECK28-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20443 // CHECK28: cond.true:
20444 // CHECK28-NEXT: br label [[COND_END:%.*]]
20445 // CHECK28: cond.false:
20446 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20447 // CHECK28-NEXT: br label [[COND_END]]
20448 // CHECK28: cond.end:
20449 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
20450 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
20451 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20452 // CHECK28-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
20453 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20454 // CHECK28: omp.inner.for.cond:
20455 // CHECK28-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20456 // CHECK28-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20457 // CHECK28-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
20458 // CHECK28-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20459 // CHECK28: omp.inner.for.body:
20460 // CHECK28-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20461 // CHECK28-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
20462 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20463 // CHECK28-NEXT: store i32 [[ADD]], i32* [[I]], align 4
20464 // CHECK28-NEXT: [[TMP12:%.*]] = load i32, i32* [[B_ADDR]], align 4
20465 // CHECK28-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP12]] to double
20466 // CHECK28-NEXT: [[ADD4:%.*]] = fadd double [[CONV]], 1.500000e+00
20467 // CHECK28-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], %struct.S1* [[TMP0]], i32 0, i32 0
20468 // CHECK28-NEXT: store double [[ADD4]], double* [[A]], align 4
20469 // CHECK28-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_S1]], %struct.S1* [[TMP0]], i32 0, i32 0
20470 // CHECK28-NEXT: [[TMP13:%.*]] = load double, double* [[A5]], align 4
20471 // CHECK28-NEXT: [[INC:%.*]] = fadd double [[TMP13]], 1.000000e+00
20472 // CHECK28-NEXT: store double [[INC]], double* [[A5]], align 4
20473 // CHECK28-NEXT: [[CONV6:%.*]] = fptosi double [[INC]] to i16
20474 // CHECK28-NEXT: [[TMP14:%.*]] = mul nsw i32 1, [[TMP2]]
20475 // CHECK28-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i32 [[TMP14]]
20476 // CHECK28-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i16, i16* [[ARRAYIDX]], i32 1
20477 // CHECK28-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX7]], align 2
20478 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
20479 // CHECK28: omp.body.continue:
20480 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20481 // CHECK28: omp.inner.for.inc:
20482 // CHECK28-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20483 // CHECK28-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
20484 // CHECK28-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
20485 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]]
20486 // CHECK28: omp.inner.for.end:
20487 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
20488 // CHECK28: omp.loop.exit:
20489 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
20490 // CHECK28-NEXT: ret void
20491 //
20492 //
20493 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l183
20494 // CHECK28-SAME: (i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
20495 // CHECK28-NEXT: entry:
20496 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
20497 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
20498 // CHECK28-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
20499 // CHECK28-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
20500 // CHECK28-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
20501 // CHECK28-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
20502 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
20503 // CHECK28-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
20504 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
20505 // CHECK28-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
20506 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
20507 // CHECK28-NEXT: store i32 [[TMP1]], i32* [[A_CASTED]], align 4
20508 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_CASTED]], align 4
20509 // CHECK28-NEXT: [[TMP3:%.*]] = load i16, i16* [[CONV]], align 4
20510 // CHECK28-NEXT: [[CONV1:%.*]] = bitcast i32* [[AA_CASTED]] to i16*
20511 // CHECK28-NEXT: store i16 [[TMP3]], i16* [[CONV1]], align 2
20512 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[AA_CASTED]], align 4
20513 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP2]], i32 [[TMP4]], [10 x i32]* [[TMP0]])
20514 // CHECK28-NEXT: ret void
20515 //
20516 //
20517 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..6
20518 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[A:%.*]], i32 [[AA:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
20519 // CHECK28-NEXT: entry:
20520 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
20521 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
20522 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
20523 // CHECK28-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
20524 // CHECK28-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
20525 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20526 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4
20527 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
20528 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
20529 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20530 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20531 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4
20532 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
20533 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
20534 // CHECK28-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
20535 // CHECK28-NEXT: store i32 [[AA]], i32* [[AA_ADDR]], align 4
20536 // CHECK28-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
20537 // CHECK28-NEXT: [[CONV:%.*]] = bitcast i32* [[AA_ADDR]] to i16*
20538 // CHECK28-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
20539 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
20540 // CHECK28-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
20541 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20542 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20543 // CHECK28-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
20544 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
20545 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20546 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20547 // CHECK28-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
20548 // CHECK28-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20549 // CHECK28: cond.true:
20550 // CHECK28-NEXT: br label [[COND_END:%.*]]
20551 // CHECK28: cond.false:
20552 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20553 // CHECK28-NEXT: br label [[COND_END]]
20554 // CHECK28: cond.end:
20555 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
20556 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
20557 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20558 // CHECK28-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
20559 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20560 // CHECK28: omp.inner.for.cond:
20561 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20562 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20563 // CHECK28-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
20564 // CHECK28-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20565 // CHECK28: omp.inner.for.body:
20566 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20567 // CHECK28-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
20568 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20569 // CHECK28-NEXT: store i32 [[ADD]], i32* [[I]], align 4
20570 // CHECK28-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_ADDR]], align 4
20571 // CHECK28-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1
20572 // CHECK28-NEXT: store i32 [[ADD2]], i32* [[A_ADDR]], align 4
20573 // CHECK28-NEXT: [[TMP10:%.*]] = load i16, i16* [[CONV]], align 4
20574 // CHECK28-NEXT: [[CONV3:%.*]] = sext i16 [[TMP10]] to i32
20575 // CHECK28-NEXT: [[ADD4:%.*]] = add nsw i32 [[CONV3]], 1
20576 // CHECK28-NEXT: [[CONV5:%.*]] = trunc i32 [[ADD4]] to i16
20577 // CHECK28-NEXT: store i16 [[CONV5]], i16* [[CONV]], align 4
20578 // CHECK28-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 2
20579 // CHECK28-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
20580 // CHECK28-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], 1
20581 // CHECK28-NEXT: store i32 [[ADD6]], i32* [[ARRAYIDX]], align 4
20582 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
20583 // CHECK28: omp.body.continue:
20584 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20585 // CHECK28: omp.inner.for.inc:
20586 // CHECK28-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20587 // CHECK28-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1
20588 // CHECK28-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
20589 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]]
20590 // CHECK28: omp.inner.for.end:
20591 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
20592 // CHECK28: omp.loop.exit:
20593 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
20594 // CHECK28-NEXT: ret void
20595 //
20596