1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
5 // Test host codegen.
6 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
7 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
9 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
10 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
12
13 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
14 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6
16 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
17 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8
19
20 // Test target codegen - host bc file has to be created first. (no significant differences with host version of target region)
21 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
22 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK9
23 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
24 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10
25 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
26 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK11
27 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
28 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12
29
30 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
31 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK13
32 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
33 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14
34 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
35 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK15
36 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
37 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16
38
39 #ifdef CK1
40
target_teams_fun(int * g)41 int target_teams_fun(int *g){
42 int n = 1000;
43 int a[1000];
44 int te = n / 128;
45 int th = 128;
46 // discard n_addr
47 // discard capture expressions for te and th
48
49 int i;
50 #pragma omp target teams distribute parallel for simd num_teams(te), thread_limit(th) aligned(a : 8) safelen(16) simdlen(4) linear(i : n)
51 for(i = 0; i < n; i++) {
52 a[i] = 0;
53 }
54
55 {{{
56 #pragma omp target teams distribute parallel for simd is_device_ptr(g) simdlen(8)
57 for(int i = 0; i < n; i++) {
58 a[i] = g[0];
59 }
60 }}}
61
62 // outlined target regions
63
64
65
66
67 return a[0];
68 }
69
70
71 #endif // CK1
72 #endif // HEADER
73 // CHECK1-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
74 // CHECK1-SAME: (i32* [[G:%.*]]) #[[ATTR0:[0-9]+]] {
75 // CHECK1-NEXT: entry:
76 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
77 // CHECK1-NEXT: [[N:%.*]] = alloca i32, align 4
78 // CHECK1-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4
79 // CHECK1-NEXT: [[TE:%.*]] = alloca i32, align 4
80 // CHECK1-NEXT: [[TH:%.*]] = alloca i32, align 4
81 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
82 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
83 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
84 // CHECK1-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
85 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
86 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
87 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED4:%.*]] = alloca i64, align 8
88 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
89 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
90 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
91 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
92 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i32, align 4
93 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_7:%.*]] = alloca i32, align 4
94 // CHECK1-NEXT: [[N_CASTED10:%.*]] = alloca i64, align 8
95 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS12:%.*]] = alloca [3 x i8*], align 8
96 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS13:%.*]] = alloca [3 x i8*], align 8
97 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS14:%.*]] = alloca [3 x i8*], align 8
98 // CHECK1-NEXT: [[_TMP15:%.*]] = alloca i32, align 4
99 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_16:%.*]] = alloca i32, align 4
100 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
101 // CHECK1-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
102 // CHECK1-NEXT: store i32 1000, i32* [[N]], align 4
103 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
104 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
105 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
106 // CHECK1-NEXT: store i32 128, i32* [[TH]], align 4
107 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
108 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
109 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
110 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
111 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4
112 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[I_CASTED]] to i32*
113 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
114 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[I_CASTED]], align 8
115 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[N]], align 4
116 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
117 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV2]], align 4
118 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8
119 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
120 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
121 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[CONV3]], align 4
122 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
123 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
124 // CHECK1-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED4]] to i32*
125 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[CONV5]], align 4
126 // CHECK1-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED4]], align 8
127 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
128 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
129 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP12]], align 8
130 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
131 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i64*
132 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP14]], align 8
133 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
134 // CHECK1-NEXT: store i8* null, i8** [[TMP15]], align 8
135 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
136 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
137 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP17]], align 8
138 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
139 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
140 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP19]], align 8
141 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
142 // CHECK1-NEXT: store i8* null, i8** [[TMP20]], align 8
143 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
144 // CHECK1-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [1000 x i32]**
145 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP22]], align 8
146 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
147 // CHECK1-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to [1000 x i32]**
148 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP24]], align 8
149 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
150 // CHECK1-NEXT: store i8* null, i8** [[TMP25]], align 8
151 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
152 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
153 // CHECK1-NEXT: store i64 [[TMP8]], i64* [[TMP27]], align 8
154 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
155 // CHECK1-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64*
156 // CHECK1-NEXT: store i64 [[TMP8]], i64* [[TMP29]], align 8
157 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
158 // CHECK1-NEXT: store i8* null, i8** [[TMP30]], align 8
159 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
160 // CHECK1-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64*
161 // CHECK1-NEXT: store i64 [[TMP10]], i64* [[TMP32]], align 8
162 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
163 // CHECK1-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i64*
164 // CHECK1-NEXT: store i64 [[TMP10]], i64* [[TMP34]], align 8
165 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
166 // CHECK1-NEXT: store i8* null, i8** [[TMP35]], align 8
167 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
168 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
169 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
170 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
171 // CHECK1-NEXT: [[TMP40:%.*]] = load i32, i32* [[N]], align 4
172 // CHECK1-NEXT: store i32 [[TMP40]], i32* [[DOTCAPTURE_EXPR_6]], align 4
173 // CHECK1-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_6]], align 4
174 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP41]], 0
175 // CHECK1-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB]], 1
176 // CHECK1-NEXT: [[SUB9:%.*]] = sub nsw i32 [[DIV8]], 1
177 // CHECK1-NEXT: store i32 [[SUB9]], i32* [[DOTCAPTURE_EXPR_7]], align 4
178 // CHECK1-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_7]], align 4
179 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP42]], 1
180 // CHECK1-NEXT: [[TMP43:%.*]] = zext i32 [[ADD]] to i64
181 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 [[TMP43]])
182 // CHECK1-NEXT: [[TMP44:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.region_id, i32 5, i8** [[TMP36]], i8** [[TMP37]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP38]], i32 [[TMP39]])
183 // CHECK1-NEXT: [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0
184 // CHECK1-NEXT: br i1 [[TMP45]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
185 // CHECK1: omp_offload.failed:
186 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50(i64 [[TMP4]], i64 [[TMP6]], [1000 x i32]* [[A]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR4:[0-9]+]]
187 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
188 // CHECK1: omp_offload.cont:
189 // CHECK1-NEXT: [[TMP46:%.*]] = load i32, i32* [[N]], align 4
190 // CHECK1-NEXT: [[CONV11:%.*]] = bitcast i64* [[N_CASTED10]] to i32*
191 // CHECK1-NEXT: store i32 [[TMP46]], i32* [[CONV11]], align 4
192 // CHECK1-NEXT: [[TMP47:%.*]] = load i64, i64* [[N_CASTED10]], align 8
193 // CHECK1-NEXT: [[TMP48:%.*]] = load i32*, i32** [[G_ADDR]], align 8
194 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0
195 // CHECK1-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i64*
196 // CHECK1-NEXT: store i64 [[TMP47]], i64* [[TMP50]], align 8
197 // CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0
198 // CHECK1-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i64*
199 // CHECK1-NEXT: store i64 [[TMP47]], i64* [[TMP52]], align 8
200 // CHECK1-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i64 0, i64 0
201 // CHECK1-NEXT: store i8* null, i8** [[TMP53]], align 8
202 // CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 1
203 // CHECK1-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to [1000 x i32]**
204 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP55]], align 8
205 // CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 1
206 // CHECK1-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to [1000 x i32]**
207 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP57]], align 8
208 // CHECK1-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i64 0, i64 1
209 // CHECK1-NEXT: store i8* null, i8** [[TMP58]], align 8
210 // CHECK1-NEXT: [[TMP59:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 2
211 // CHECK1-NEXT: [[TMP60:%.*]] = bitcast i8** [[TMP59]] to i32**
212 // CHECK1-NEXT: store i32* [[TMP48]], i32** [[TMP60]], align 8
213 // CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 2
214 // CHECK1-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i32**
215 // CHECK1-NEXT: store i32* [[TMP48]], i32** [[TMP62]], align 8
216 // CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i64 0, i64 2
217 // CHECK1-NEXT: store i8* null, i8** [[TMP63]], align 8
218 // CHECK1-NEXT: [[TMP64:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0
219 // CHECK1-NEXT: [[TMP65:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0
220 // CHECK1-NEXT: [[TMP66:%.*]] = load i32, i32* [[N]], align 4
221 // CHECK1-NEXT: store i32 [[TMP66]], i32* [[DOTCAPTURE_EXPR_16]], align 4
222 // CHECK1-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
223 // CHECK1-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP67]], 0
224 // CHECK1-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
225 // CHECK1-NEXT: [[SUB20:%.*]] = sub nsw i32 [[DIV19]], 1
226 // CHECK1-NEXT: store i32 [[SUB20]], i32* [[DOTCAPTURE_EXPR_17]], align 4
227 // CHECK1-NEXT: [[TMP68:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4
228 // CHECK1-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP68]], 1
229 // CHECK1-NEXT: [[TMP69:%.*]] = zext i32 [[ADD21]] to i64
230 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i64 [[TMP69]])
231 // CHECK1-NEXT: [[TMP70:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.region_id, i32 3, i8** [[TMP64]], i8** [[TMP65]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
232 // CHECK1-NEXT: [[TMP71:%.*]] = icmp ne i32 [[TMP70]], 0
233 // CHECK1-NEXT: br i1 [[TMP71]], label [[OMP_OFFLOAD_FAILED22:%.*]], label [[OMP_OFFLOAD_CONT23:%.*]]
234 // CHECK1: omp_offload.failed22:
235 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56(i64 [[TMP47]], [1000 x i32]* [[A]], i32* [[TMP48]]) #[[ATTR4]]
236 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT23]]
237 // CHECK1: omp_offload.cont23:
238 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 0
239 // CHECK1-NEXT: [[TMP72:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
240 // CHECK1-NEXT: ret i32 [[TMP72]]
241 //
242 //
243 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50
244 // CHECK1-SAME: (i64 [[I:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]], i64 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1:[0-9]+]] {
245 // CHECK1-NEXT: entry:
246 // CHECK1-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
247 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
248 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
249 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
250 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8
251 // CHECK1-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
252 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
253 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
254 // CHECK1-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
255 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
256 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
257 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
258 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8
259 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
260 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[N_ADDR]] to i32*
261 // CHECK1-NEXT: [[TMP1:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
262 // CHECK1-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
263 // CHECK1-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32*
264 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV4]], align 8
265 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV5]], align 8
266 // CHECK1-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
267 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
268 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[I_CASTED]] to i32*
269 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[CONV6]], align 4
270 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[I_CASTED]], align 8
271 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV3]], align 8
272 // CHECK1-NEXT: [[CONV7:%.*]] = bitcast i64* [[N_CASTED]] to i32*
273 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[CONV7]], align 4
274 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[N_CASTED]], align 8
275 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [1000 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP5]], i64 [[TMP7]], [1000 x i32]* [[TMP1]])
276 // CHECK1-NEXT: ret void
277 //
278 //
279 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
280 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[I:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] {
281 // CHECK1-NEXT: entry:
282 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
283 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
284 // CHECK1-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
285 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
286 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
287 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
288 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
289 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
290 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
291 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4
292 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
293 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
294 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
295 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
296 // CHECK1-NEXT: [[I5:%.*]] = alloca i32, align 4
297 // CHECK1-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
298 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
299 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
300 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
301 // CHECK1-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
302 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
303 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
304 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
305 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
306 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
307 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 8
308 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
309 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
310 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
311 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
312 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
313 // CHECK1-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
314 // CHECK1-NEXT: store i32 0, i32* [[I4]], align 4
315 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
316 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
317 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
318 // CHECK1: omp.precond.then:
319 // CHECK1-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 0
320 // CHECK1-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 8) ]
321 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
322 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
323 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
324 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
325 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
326 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
327 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
328 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
329 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
330 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
331 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
332 // CHECK1-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
333 // CHECK1: cond.true:
334 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
335 // CHECK1-NEXT: br label [[COND_END:%.*]]
336 // CHECK1: cond.false:
337 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
338 // CHECK1-NEXT: br label [[COND_END]]
339 // CHECK1: cond.end:
340 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
341 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
342 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
343 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
344 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
345 // CHECK1: omp.inner.for.cond:
346 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
347 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
348 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
349 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
350 // CHECK1: omp.inner.for.body:
351 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
352 // CHECK1-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
353 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
354 // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
355 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[I5]], align 4
356 // CHECK1-NEXT: [[CONV8:%.*]] = bitcast i64* [[I_CASTED]] to i32*
357 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[CONV8]], align 4
358 // CHECK1-NEXT: [[TMP19:%.*]] = load i64, i64* [[I_CASTED]], align 8
359 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 8
360 // CHECK1-NEXT: [[CONV9:%.*]] = bitcast i64* [[N_CASTED]] to i32*
361 // CHECK1-NEXT: store i32 [[TMP20]], i32* [[CONV9]], align 4
362 // CHECK1-NEXT: [[TMP21:%.*]] = load i64, i64* [[N_CASTED]], align 8
363 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, [1000 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], i64 [[TMP21]], [1000 x i32]* [[TMP0]])
364 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
365 // CHECK1: omp.inner.for.inc:
366 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
367 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
368 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
369 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
370 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
371 // CHECK1: omp.inner.for.end:
372 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
373 // CHECK1: omp.loop.exit:
374 // CHECK1-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
375 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
376 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
377 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
378 // CHECK1-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
379 // CHECK1-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
380 // CHECK1: .omp.final.then:
381 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
382 // CHECK1-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP28]], 0
383 // CHECK1-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
384 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV11]], 1
385 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL]]
386 // CHECK1-NEXT: store i32 [[ADD12]], i32* [[CONV]], align 8
387 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
388 // CHECK1: .omp.final.done:
389 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
390 // CHECK1: omp.precond.end:
391 // CHECK1-NEXT: ret void
392 //
393 //
394 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
395 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[I:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] {
396 // CHECK1-NEXT: entry:
397 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
398 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
399 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
400 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
401 // CHECK1-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
402 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
403 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
404 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
405 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
406 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
407 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
408 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4
409 // CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
410 // CHECK1-NEXT: [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
411 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
412 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
413 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
414 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
415 // CHECK1-NEXT: [[I7:%.*]] = alloca i32, align 4
416 // CHECK1-NEXT: [[I8:%.*]] = alloca i32, align 4
417 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
418 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
419 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
420 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
421 // CHECK1-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
422 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
423 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
424 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
425 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
426 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
427 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 8
428 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
429 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
430 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
431 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
432 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
433 // CHECK1-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
434 // CHECK1-NEXT: store i32 0, i32* [[I4]], align 4
435 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
436 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
437 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
438 // CHECK1: omp.precond.then:
439 // CHECK1-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 0
440 // CHECK1-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 8) ]
441 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
442 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTLINEAR_START]], align 4
443 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV1]], align 8
444 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTLINEAR_STEP]], align 4
445 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
446 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
447 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
448 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
449 // CHECK1-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP7]] to i32
450 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
451 // CHECK1-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP8]] to i32
452 // CHECK1-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
453 // CHECK1-NEXT: store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
454 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
455 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
456 // CHECK1-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
457 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
458 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]])
459 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
460 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
461 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP12]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
462 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
463 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
464 // CHECK1-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]]
465 // CHECK1-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
466 // CHECK1: cond.true:
467 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
468 // CHECK1-NEXT: br label [[COND_END:%.*]]
469 // CHECK1: cond.false:
470 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
471 // CHECK1-NEXT: br label [[COND_END]]
472 // CHECK1: cond.end:
473 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ]
474 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
475 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
476 // CHECK1-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
477 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
478 // CHECK1: omp.inner.for.cond:
479 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
480 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
481 // CHECK1-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
482 // CHECK1-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
483 // CHECK1: omp.inner.for.body:
484 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
485 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
486 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
487 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I7]], align 4
488 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[I7]], align 4
489 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
490 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
491 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
492 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
493 // CHECK1: omp.body.continue:
494 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
495 // CHECK1: omp.inner.for.inc:
496 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
497 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP22]], 1
498 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
499 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
500 // CHECK1: omp.inner.for.end:
501 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
502 // CHECK1: omp.loop.exit:
503 // CHECK1-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
504 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
505 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
506 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
507 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
508 // CHECK1-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
509 // CHECK1: .omp.final.then:
510 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
511 // CHECK1-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP27]], 0
512 // CHECK1-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
513 // CHECK1-NEXT: [[MUL14:%.*]] = mul nsw i32 [[DIV13]], 1
514 // CHECK1-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]]
515 // CHECK1-NEXT: store i32 [[ADD15]], i32* [[CONV]], align 8
516 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
517 // CHECK1: .omp.final.done:
518 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
519 // CHECK1-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
520 // CHECK1-NEXT: br i1 [[TMP29]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
521 // CHECK1: .omp.linear.pu:
522 // CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
523 // CHECK1: .omp.linear.pu.done:
524 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
525 // CHECK1: omp.precond.end:
526 // CHECK1-NEXT: ret void
527 //
528 //
529 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56
530 // CHECK1-SAME: (i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR1]] {
531 // CHECK1-NEXT: entry:
532 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
533 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
534 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
535 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
536 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
537 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
538 // CHECK1-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
539 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
540 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
541 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
542 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
543 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV1]], align 4
544 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8
545 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[G_ADDR]], align 8
546 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [1000 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP2]], [1000 x i32]* [[TMP0]], i32* [[TMP3]])
547 // CHECK1-NEXT: ret void
548 //
549 //
550 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
551 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR1]] {
552 // CHECK1-NEXT: entry:
553 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
554 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
555 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
556 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
557 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
558 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
559 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
560 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
561 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
562 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
563 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
564 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
565 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
566 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
567 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4
568 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
569 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
570 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
571 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
572 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
573 // CHECK1-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
574 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
575 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
576 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
577 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
578 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
579 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
580 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
581 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
582 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
583 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4
584 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
585 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
586 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
587 // CHECK1: omp.precond.then:
588 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
589 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
590 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
591 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
592 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
593 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
594 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
595 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
596 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
597 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
598 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
599 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
600 // CHECK1: cond.true:
601 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
602 // CHECK1-NEXT: br label [[COND_END:%.*]]
603 // CHECK1: cond.false:
604 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
605 // CHECK1-NEXT: br label [[COND_END]]
606 // CHECK1: cond.end:
607 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
608 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
609 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
610 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
611 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
612 // CHECK1: omp.inner.for.cond:
613 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
614 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
615 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
616 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
617 // CHECK1: omp.inner.for.body:
618 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
619 // CHECK1-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
620 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
621 // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
622 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 8
623 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
624 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4
625 // CHECK1-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8
626 // CHECK1-NEXT: [[TMP20:%.*]] = load i32*, i32** [[G_ADDR]], align 8
627 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], [1000 x i32]* [[TMP0]], i32* [[TMP20]])
628 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
629 // CHECK1: omp.inner.for.inc:
630 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
631 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
632 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
633 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
634 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
635 // CHECK1: omp.inner.for.end:
636 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
637 // CHECK1: omp.loop.exit:
638 // CHECK1-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
639 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
640 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
641 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
642 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
643 // CHECK1-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
644 // CHECK1: .omp.final.then:
645 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
646 // CHECK1-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0
647 // CHECK1-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
648 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
649 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
650 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
651 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
652 // CHECK1: .omp.final.done:
653 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
654 // CHECK1: omp.precond.end:
655 // CHECK1-NEXT: ret void
656 //
657 //
658 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
659 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR1]] {
660 // CHECK1-NEXT: entry:
661 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
662 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
663 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
664 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
665 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
666 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
667 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
668 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
669 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
670 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
671 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
672 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
673 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
674 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
675 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
676 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
677 // CHECK1-NEXT: [[I5:%.*]] = alloca i32, align 4
678 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
679 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
680 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
681 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
682 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
683 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
684 // CHECK1-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
685 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
686 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
687 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
688 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
689 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
690 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
691 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
692 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
693 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
694 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4
695 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
696 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
697 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
698 // CHECK1: omp.precond.then:
699 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
700 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
701 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
702 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
703 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
704 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
705 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
706 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
707 // CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
708 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
709 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
710 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
711 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
712 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
713 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
714 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
715 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
716 // CHECK1-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
717 // CHECK1: cond.true:
718 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
719 // CHECK1-NEXT: br label [[COND_END:%.*]]
720 // CHECK1: cond.false:
721 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
722 // CHECK1-NEXT: br label [[COND_END]]
723 // CHECK1: cond.end:
724 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
725 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
726 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
727 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
728 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
729 // CHECK1: omp.inner.for.cond:
730 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
731 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
732 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
733 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
734 // CHECK1: omp.inner.for.body:
735 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
736 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
737 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
738 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
739 // CHECK1-NEXT: [[TMP17:%.*]] = load i32*, i32** [[G_ADDR]], align 8
740 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i64 0
741 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
742 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4
743 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
744 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
745 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX8]], align 4
746 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
747 // CHECK1: omp.body.continue:
748 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
749 // CHECK1: omp.inner.for.inc:
750 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
751 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
752 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
753 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
754 // CHECK1: omp.inner.for.end:
755 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
756 // CHECK1: omp.loop.exit:
757 // CHECK1-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
758 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
759 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
760 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
761 // CHECK1-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
762 // CHECK1-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
763 // CHECK1: .omp.final.then:
764 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
765 // CHECK1-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP25]], 0
766 // CHECK1-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
767 // CHECK1-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
768 // CHECK1-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
769 // CHECK1-NEXT: store i32 [[ADD13]], i32* [[I5]], align 4
770 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
771 // CHECK1: .omp.final.done:
772 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
773 // CHECK1: omp.precond.end:
774 // CHECK1-NEXT: ret void
775 //
776 //
777 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
778 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] {
779 // CHECK1-NEXT: entry:
780 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
781 // CHECK1-NEXT: ret void
782 //
783 //
784 // CHECK2-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
785 // CHECK2-SAME: (i32* [[G:%.*]]) #[[ATTR0:[0-9]+]] {
786 // CHECK2-NEXT: entry:
787 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
788 // CHECK2-NEXT: [[N:%.*]] = alloca i32, align 4
789 // CHECK2-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4
790 // CHECK2-NEXT: [[TE:%.*]] = alloca i32, align 4
791 // CHECK2-NEXT: [[TH:%.*]] = alloca i32, align 4
792 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
793 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
794 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
795 // CHECK2-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
796 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
797 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
798 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED4:%.*]] = alloca i64, align 8
799 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
800 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
801 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
802 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
803 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i32, align 4
804 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_7:%.*]] = alloca i32, align 4
805 // CHECK2-NEXT: [[N_CASTED10:%.*]] = alloca i64, align 8
806 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS12:%.*]] = alloca [3 x i8*], align 8
807 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS13:%.*]] = alloca [3 x i8*], align 8
808 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS14:%.*]] = alloca [3 x i8*], align 8
809 // CHECK2-NEXT: [[_TMP15:%.*]] = alloca i32, align 4
810 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_16:%.*]] = alloca i32, align 4
811 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
812 // CHECK2-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
813 // CHECK2-NEXT: store i32 1000, i32* [[N]], align 4
814 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
815 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
816 // CHECK2-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
817 // CHECK2-NEXT: store i32 128, i32* [[TH]], align 4
818 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
819 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
820 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
821 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
822 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4
823 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[I_CASTED]] to i32*
824 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
825 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[I_CASTED]], align 8
826 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[N]], align 4
827 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
828 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[CONV2]], align 4
829 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8
830 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
831 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
832 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[CONV3]], align 4
833 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
834 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
835 // CHECK2-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED4]] to i32*
836 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[CONV5]], align 4
837 // CHECK2-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED4]], align 8
838 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
839 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
840 // CHECK2-NEXT: store i64 [[TMP4]], i64* [[TMP12]], align 8
841 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
842 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i64*
843 // CHECK2-NEXT: store i64 [[TMP4]], i64* [[TMP14]], align 8
844 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
845 // CHECK2-NEXT: store i8* null, i8** [[TMP15]], align 8
846 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
847 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
848 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP17]], align 8
849 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
850 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
851 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP19]], align 8
852 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
853 // CHECK2-NEXT: store i8* null, i8** [[TMP20]], align 8
854 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
855 // CHECK2-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [1000 x i32]**
856 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP22]], align 8
857 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
858 // CHECK2-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to [1000 x i32]**
859 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP24]], align 8
860 // CHECK2-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
861 // CHECK2-NEXT: store i8* null, i8** [[TMP25]], align 8
862 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
863 // CHECK2-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
864 // CHECK2-NEXT: store i64 [[TMP8]], i64* [[TMP27]], align 8
865 // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
866 // CHECK2-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64*
867 // CHECK2-NEXT: store i64 [[TMP8]], i64* [[TMP29]], align 8
868 // CHECK2-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
869 // CHECK2-NEXT: store i8* null, i8** [[TMP30]], align 8
870 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
871 // CHECK2-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64*
872 // CHECK2-NEXT: store i64 [[TMP10]], i64* [[TMP32]], align 8
873 // CHECK2-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
874 // CHECK2-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i64*
875 // CHECK2-NEXT: store i64 [[TMP10]], i64* [[TMP34]], align 8
876 // CHECK2-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
877 // CHECK2-NEXT: store i8* null, i8** [[TMP35]], align 8
878 // CHECK2-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
879 // CHECK2-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
880 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
881 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
882 // CHECK2-NEXT: [[TMP40:%.*]] = load i32, i32* [[N]], align 4
883 // CHECK2-NEXT: store i32 [[TMP40]], i32* [[DOTCAPTURE_EXPR_6]], align 4
884 // CHECK2-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_6]], align 4
885 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP41]], 0
886 // CHECK2-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB]], 1
887 // CHECK2-NEXT: [[SUB9:%.*]] = sub nsw i32 [[DIV8]], 1
888 // CHECK2-NEXT: store i32 [[SUB9]], i32* [[DOTCAPTURE_EXPR_7]], align 4
889 // CHECK2-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_7]], align 4
890 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP42]], 1
891 // CHECK2-NEXT: [[TMP43:%.*]] = zext i32 [[ADD]] to i64
892 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 [[TMP43]])
893 // CHECK2-NEXT: [[TMP44:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.region_id, i32 5, i8** [[TMP36]], i8** [[TMP37]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP38]], i32 [[TMP39]])
894 // CHECK2-NEXT: [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0
895 // CHECK2-NEXT: br i1 [[TMP45]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
896 // CHECK2: omp_offload.failed:
897 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50(i64 [[TMP4]], i64 [[TMP6]], [1000 x i32]* [[A]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR4:[0-9]+]]
898 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]]
899 // CHECK2: omp_offload.cont:
900 // CHECK2-NEXT: [[TMP46:%.*]] = load i32, i32* [[N]], align 4
901 // CHECK2-NEXT: [[CONV11:%.*]] = bitcast i64* [[N_CASTED10]] to i32*
902 // CHECK2-NEXT: store i32 [[TMP46]], i32* [[CONV11]], align 4
903 // CHECK2-NEXT: [[TMP47:%.*]] = load i64, i64* [[N_CASTED10]], align 8
904 // CHECK2-NEXT: [[TMP48:%.*]] = load i32*, i32** [[G_ADDR]], align 8
905 // CHECK2-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0
906 // CHECK2-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i64*
907 // CHECK2-NEXT: store i64 [[TMP47]], i64* [[TMP50]], align 8
908 // CHECK2-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0
909 // CHECK2-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i64*
910 // CHECK2-NEXT: store i64 [[TMP47]], i64* [[TMP52]], align 8
911 // CHECK2-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i64 0, i64 0
912 // CHECK2-NEXT: store i8* null, i8** [[TMP53]], align 8
913 // CHECK2-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 1
914 // CHECK2-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to [1000 x i32]**
915 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP55]], align 8
916 // CHECK2-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 1
917 // CHECK2-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to [1000 x i32]**
918 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP57]], align 8
919 // CHECK2-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i64 0, i64 1
920 // CHECK2-NEXT: store i8* null, i8** [[TMP58]], align 8
921 // CHECK2-NEXT: [[TMP59:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 2
922 // CHECK2-NEXT: [[TMP60:%.*]] = bitcast i8** [[TMP59]] to i32**
923 // CHECK2-NEXT: store i32* [[TMP48]], i32** [[TMP60]], align 8
924 // CHECK2-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 2
925 // CHECK2-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i32**
926 // CHECK2-NEXT: store i32* [[TMP48]], i32** [[TMP62]], align 8
927 // CHECK2-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i64 0, i64 2
928 // CHECK2-NEXT: store i8* null, i8** [[TMP63]], align 8
929 // CHECK2-NEXT: [[TMP64:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0
930 // CHECK2-NEXT: [[TMP65:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0
931 // CHECK2-NEXT: [[TMP66:%.*]] = load i32, i32* [[N]], align 4
932 // CHECK2-NEXT: store i32 [[TMP66]], i32* [[DOTCAPTURE_EXPR_16]], align 4
933 // CHECK2-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
934 // CHECK2-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP67]], 0
935 // CHECK2-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
936 // CHECK2-NEXT: [[SUB20:%.*]] = sub nsw i32 [[DIV19]], 1
937 // CHECK2-NEXT: store i32 [[SUB20]], i32* [[DOTCAPTURE_EXPR_17]], align 4
938 // CHECK2-NEXT: [[TMP68:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4
939 // CHECK2-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP68]], 1
940 // CHECK2-NEXT: [[TMP69:%.*]] = zext i32 [[ADD21]] to i64
941 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i64 [[TMP69]])
942 // CHECK2-NEXT: [[TMP70:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.region_id, i32 3, i8** [[TMP64]], i8** [[TMP65]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
943 // CHECK2-NEXT: [[TMP71:%.*]] = icmp ne i32 [[TMP70]], 0
944 // CHECK2-NEXT: br i1 [[TMP71]], label [[OMP_OFFLOAD_FAILED22:%.*]], label [[OMP_OFFLOAD_CONT23:%.*]]
945 // CHECK2: omp_offload.failed22:
946 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56(i64 [[TMP47]], [1000 x i32]* [[A]], i32* [[TMP48]]) #[[ATTR4]]
947 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT23]]
948 // CHECK2: omp_offload.cont23:
949 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 0
950 // CHECK2-NEXT: [[TMP72:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
951 // CHECK2-NEXT: ret i32 [[TMP72]]
952 //
953 //
954 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50
955 // CHECK2-SAME: (i64 [[I:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]], i64 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1:[0-9]+]] {
956 // CHECK2-NEXT: entry:
957 // CHECK2-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
958 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
959 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
960 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
961 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8
962 // CHECK2-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
963 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
964 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
965 // CHECK2-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
966 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
967 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
968 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
969 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8
970 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
971 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[N_ADDR]] to i32*
972 // CHECK2-NEXT: [[TMP1:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
973 // CHECK2-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
974 // CHECK2-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32*
975 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV4]], align 8
976 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV5]], align 8
977 // CHECK2-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
978 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
979 // CHECK2-NEXT: [[CONV6:%.*]] = bitcast i64* [[I_CASTED]] to i32*
980 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[CONV6]], align 4
981 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[I_CASTED]], align 8
982 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV3]], align 8
983 // CHECK2-NEXT: [[CONV7:%.*]] = bitcast i64* [[N_CASTED]] to i32*
984 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[CONV7]], align 4
985 // CHECK2-NEXT: [[TMP7:%.*]] = load i64, i64* [[N_CASTED]], align 8
986 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [1000 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP5]], i64 [[TMP7]], [1000 x i32]* [[TMP1]])
987 // CHECK2-NEXT: ret void
988 //
989 //
990 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
991 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[I:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] {
992 // CHECK2-NEXT: entry:
993 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
994 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
995 // CHECK2-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
996 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
997 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
998 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
999 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1000 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1001 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
1002 // CHECK2-NEXT: [[I4:%.*]] = alloca i32, align 4
1003 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1004 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1005 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1006 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1007 // CHECK2-NEXT: [[I5:%.*]] = alloca i32, align 4
1008 // CHECK2-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
1009 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1010 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1011 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1012 // CHECK2-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
1013 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1014 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
1015 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
1016 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1017 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
1018 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 8
1019 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1020 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1021 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1022 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1023 // CHECK2-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
1024 // CHECK2-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
1025 // CHECK2-NEXT: store i32 0, i32* [[I4]], align 4
1026 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1027 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1028 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1029 // CHECK2: omp.precond.then:
1030 // CHECK2-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 0
1031 // CHECK2-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 8) ]
1032 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1033 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1034 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
1035 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1036 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1037 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1038 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1039 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1040 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1041 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1042 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
1043 // CHECK2-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1044 // CHECK2: cond.true:
1045 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1046 // CHECK2-NEXT: br label [[COND_END:%.*]]
1047 // CHECK2: cond.false:
1048 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1049 // CHECK2-NEXT: br label [[COND_END]]
1050 // CHECK2: cond.end:
1051 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1052 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1053 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1054 // CHECK2-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
1055 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1056 // CHECK2: omp.inner.for.cond:
1057 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1058 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1059 // CHECK2-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1060 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1061 // CHECK2: omp.inner.for.body:
1062 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1063 // CHECK2-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
1064 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1065 // CHECK2-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
1066 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[I5]], align 4
1067 // CHECK2-NEXT: [[CONV8:%.*]] = bitcast i64* [[I_CASTED]] to i32*
1068 // CHECK2-NEXT: store i32 [[TMP18]], i32* [[CONV8]], align 4
1069 // CHECK2-NEXT: [[TMP19:%.*]] = load i64, i64* [[I_CASTED]], align 8
1070 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 8
1071 // CHECK2-NEXT: [[CONV9:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1072 // CHECK2-NEXT: store i32 [[TMP20]], i32* [[CONV9]], align 4
1073 // CHECK2-NEXT: [[TMP21:%.*]] = load i64, i64* [[N_CASTED]], align 8
1074 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, [1000 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], i64 [[TMP21]], [1000 x i32]* [[TMP0]])
1075 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1076 // CHECK2: omp.inner.for.inc:
1077 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1078 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1079 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
1080 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1081 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
1082 // CHECK2: omp.inner.for.end:
1083 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1084 // CHECK2: omp.loop.exit:
1085 // CHECK2-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1086 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
1087 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
1088 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1089 // CHECK2-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
1090 // CHECK2-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1091 // CHECK2: .omp.final.then:
1092 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1093 // CHECK2-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP28]], 0
1094 // CHECK2-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
1095 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV11]], 1
1096 // CHECK2-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL]]
1097 // CHECK2-NEXT: store i32 [[ADD12]], i32* [[CONV]], align 8
1098 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
1099 // CHECK2: .omp.final.done:
1100 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
1101 // CHECK2: omp.precond.end:
1102 // CHECK2-NEXT: ret void
1103 //
1104 //
1105 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
1106 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[I:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] {
1107 // CHECK2-NEXT: entry:
1108 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1109 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1110 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1111 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1112 // CHECK2-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
1113 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1114 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
1115 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1116 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1117 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1118 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
1119 // CHECK2-NEXT: [[I4:%.*]] = alloca i32, align 4
1120 // CHECK2-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
1121 // CHECK2-NEXT: [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
1122 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1123 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1124 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1125 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1126 // CHECK2-NEXT: [[I7:%.*]] = alloca i32, align 4
1127 // CHECK2-NEXT: [[I8:%.*]] = alloca i32, align 4
1128 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1129 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1130 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1131 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1132 // CHECK2-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
1133 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1134 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
1135 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
1136 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1137 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
1138 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 8
1139 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1140 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1141 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1142 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1143 // CHECK2-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
1144 // CHECK2-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
1145 // CHECK2-NEXT: store i32 0, i32* [[I4]], align 4
1146 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1147 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1148 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1149 // CHECK2: omp.precond.then:
1150 // CHECK2-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 0
1151 // CHECK2-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 8) ]
1152 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
1153 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTLINEAR_START]], align 4
1154 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV1]], align 8
1155 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTLINEAR_STEP]], align 4
1156 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1157 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1158 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
1159 // CHECK2-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1160 // CHECK2-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP7]] to i32
1161 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1162 // CHECK2-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP8]] to i32
1163 // CHECK2-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
1164 // CHECK2-NEXT: store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
1165 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1166 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1167 // CHECK2-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1168 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
1169 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]])
1170 // CHECK2-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1171 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1172 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP12]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1173 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1174 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1175 // CHECK2-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]]
1176 // CHECK2-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1177 // CHECK2: cond.true:
1178 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1179 // CHECK2-NEXT: br label [[COND_END:%.*]]
1180 // CHECK2: cond.false:
1181 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1182 // CHECK2-NEXT: br label [[COND_END]]
1183 // CHECK2: cond.end:
1184 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ]
1185 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1186 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1187 // CHECK2-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
1188 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1189 // CHECK2: omp.inner.for.cond:
1190 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1191 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1192 // CHECK2-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
1193 // CHECK2-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1194 // CHECK2: omp.inner.for.body:
1195 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1196 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
1197 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1198 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I7]], align 4
1199 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[I7]], align 4
1200 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
1201 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
1202 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1203 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1204 // CHECK2: omp.body.continue:
1205 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1206 // CHECK2: omp.inner.for.inc:
1207 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1208 // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP22]], 1
1209 // CHECK2-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
1210 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
1211 // CHECK2: omp.inner.for.end:
1212 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1213 // CHECK2: omp.loop.exit:
1214 // CHECK2-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1215 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
1216 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
1217 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1218 // CHECK2-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1219 // CHECK2-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1220 // CHECK2: .omp.final.then:
1221 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1222 // CHECK2-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP27]], 0
1223 // CHECK2-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
1224 // CHECK2-NEXT: [[MUL14:%.*]] = mul nsw i32 [[DIV13]], 1
1225 // CHECK2-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]]
1226 // CHECK2-NEXT: store i32 [[ADD15]], i32* [[CONV]], align 8
1227 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
1228 // CHECK2: .omp.final.done:
1229 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1230 // CHECK2-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
1231 // CHECK2-NEXT: br i1 [[TMP29]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
1232 // CHECK2: .omp.linear.pu:
1233 // CHECK2-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
1234 // CHECK2: .omp.linear.pu.done:
1235 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
1236 // CHECK2: omp.precond.end:
1237 // CHECK2-NEXT: ret void
1238 //
1239 //
1240 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56
1241 // CHECK2-SAME: (i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR1]] {
1242 // CHECK2-NEXT: entry:
1243 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1244 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
1245 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
1246 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1247 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1248 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
1249 // CHECK2-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
1250 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1251 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
1252 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
1253 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1254 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[CONV1]], align 4
1255 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8
1256 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[G_ADDR]], align 8
1257 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [1000 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP2]], [1000 x i32]* [[TMP0]], i32* [[TMP3]])
1258 // CHECK2-NEXT: ret void
1259 //
1260 //
1261 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2
1262 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR1]] {
1263 // CHECK2-NEXT: entry:
1264 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1265 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1266 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1267 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
1268 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
1269 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1270 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1271 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1272 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1273 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1274 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1275 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1276 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1277 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1278 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4
1279 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1280 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1281 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1282 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1283 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
1284 // CHECK2-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
1285 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1286 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
1287 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
1288 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1289 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1290 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1291 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1292 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1293 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1294 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4
1295 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1296 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1297 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1298 // CHECK2: omp.precond.then:
1299 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1300 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1301 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
1302 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1303 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1304 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1305 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1306 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1307 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1308 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1309 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
1310 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1311 // CHECK2: cond.true:
1312 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1313 // CHECK2-NEXT: br label [[COND_END:%.*]]
1314 // CHECK2: cond.false:
1315 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1316 // CHECK2-NEXT: br label [[COND_END]]
1317 // CHECK2: cond.end:
1318 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1319 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1320 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1321 // CHECK2-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
1322 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1323 // CHECK2: omp.inner.for.cond:
1324 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1325 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1326 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1327 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1328 // CHECK2: omp.inner.for.body:
1329 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1330 // CHECK2-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
1331 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1332 // CHECK2-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
1333 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 8
1334 // CHECK2-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1335 // CHECK2-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4
1336 // CHECK2-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8
1337 // CHECK2-NEXT: [[TMP20:%.*]] = load i32*, i32** [[G_ADDR]], align 8
1338 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], [1000 x i32]* [[TMP0]], i32* [[TMP20]])
1339 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1340 // CHECK2: omp.inner.for.inc:
1341 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1342 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1343 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
1344 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1345 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1346 // CHECK2: omp.inner.for.end:
1347 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1348 // CHECK2: omp.loop.exit:
1349 // CHECK2-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1350 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
1351 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
1352 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1353 // CHECK2-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1354 // CHECK2-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1355 // CHECK2: .omp.final.then:
1356 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1357 // CHECK2-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0
1358 // CHECK2-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
1359 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
1360 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
1361 // CHECK2-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
1362 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
1363 // CHECK2: .omp.final.done:
1364 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
1365 // CHECK2: omp.precond.end:
1366 // CHECK2-NEXT: ret void
1367 //
1368 //
1369 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3
1370 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR1]] {
1371 // CHECK2-NEXT: entry:
1372 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1373 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1374 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1375 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1376 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1377 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
1378 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
1379 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1380 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1381 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1382 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1383 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1384 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1385 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1386 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1387 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1388 // CHECK2-NEXT: [[I5:%.*]] = alloca i32, align 4
1389 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1390 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1391 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1392 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1393 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1394 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
1395 // CHECK2-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
1396 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1397 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
1398 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
1399 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1400 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1401 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1402 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1403 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1404 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1405 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4
1406 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1407 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1408 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1409 // CHECK2: omp.precond.then:
1410 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1411 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1412 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
1413 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1414 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
1415 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1416 // CHECK2-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
1417 // CHECK2-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
1418 // CHECK2-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
1419 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1420 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1421 // CHECK2-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1422 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
1423 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1424 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1425 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1426 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
1427 // CHECK2-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1428 // CHECK2: cond.true:
1429 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1430 // CHECK2-NEXT: br label [[COND_END:%.*]]
1431 // CHECK2: cond.false:
1432 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1433 // CHECK2-NEXT: br label [[COND_END]]
1434 // CHECK2: cond.end:
1435 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1436 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1437 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1438 // CHECK2-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
1439 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1440 // CHECK2: omp.inner.for.cond:
1441 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1442 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1443 // CHECK2-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
1444 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1445 // CHECK2: omp.inner.for.body:
1446 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1447 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
1448 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1449 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
1450 // CHECK2-NEXT: [[TMP17:%.*]] = load i32*, i32** [[G_ADDR]], align 8
1451 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i64 0
1452 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
1453 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4
1454 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
1455 // CHECK2-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
1456 // CHECK2-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX8]], align 4
1457 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1458 // CHECK2: omp.body.continue:
1459 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1460 // CHECK2: omp.inner.for.inc:
1461 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1462 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
1463 // CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
1464 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
1465 // CHECK2: omp.inner.for.end:
1466 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1467 // CHECK2: omp.loop.exit:
1468 // CHECK2-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1469 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
1470 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
1471 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1472 // CHECK2-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1473 // CHECK2-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1474 // CHECK2: .omp.final.then:
1475 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1476 // CHECK2-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP25]], 0
1477 // CHECK2-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
1478 // CHECK2-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
1479 // CHECK2-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
1480 // CHECK2-NEXT: store i32 [[ADD13]], i32* [[I5]], align 4
1481 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
1482 // CHECK2: .omp.final.done:
1483 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
1484 // CHECK2: omp.precond.end:
1485 // CHECK2-NEXT: ret void
1486 //
1487 //
1488 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1489 // CHECK2-SAME: () #[[ATTR5:[0-9]+]] {
1490 // CHECK2-NEXT: entry:
1491 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1)
1492 // CHECK2-NEXT: ret void
1493 //
1494 //
1495 // CHECK3-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
1496 // CHECK3-SAME: (i32* [[G:%.*]]) #[[ATTR0:[0-9]+]] {
1497 // CHECK3-NEXT: entry:
1498 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
1499 // CHECK3-NEXT: [[N:%.*]] = alloca i32, align 4
1500 // CHECK3-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4
1501 // CHECK3-NEXT: [[TE:%.*]] = alloca i32, align 4
1502 // CHECK3-NEXT: [[TH:%.*]] = alloca i32, align 4
1503 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1504 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1505 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1506 // CHECK3-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
1507 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1508 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
1509 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i32, align 4
1510 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
1511 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
1512 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
1513 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1514 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
1515 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
1516 // CHECK3-NEXT: [[N_CASTED7:%.*]] = alloca i32, align 4
1517 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [3 x i8*], align 4
1518 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [3 x i8*], align 4
1519 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [3 x i8*], align 4
1520 // CHECK3-NEXT: [[_TMP11:%.*]] = alloca i32, align 4
1521 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4
1522 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4
1523 // CHECK3-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
1524 // CHECK3-NEXT: store i32 1000, i32* [[N]], align 4
1525 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
1526 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
1527 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
1528 // CHECK3-NEXT: store i32 128, i32* [[TH]], align 4
1529 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
1530 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1531 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
1532 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1533 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4
1534 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[I_CASTED]], align 4
1535 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[I_CASTED]], align 4
1536 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[N]], align 4
1537 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[N_CASTED]], align 4
1538 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_CASTED]], align 4
1539 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1540 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
1541 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
1542 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1543 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR__CASTED2]], align 4
1544 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED2]], align 4
1545 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1546 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
1547 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[TMP12]], align 4
1548 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1549 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32*
1550 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[TMP14]], align 4
1551 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1552 // CHECK3-NEXT: store i8* null, i8** [[TMP15]], align 4
1553 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1554 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
1555 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP17]], align 4
1556 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1557 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32*
1558 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP19]], align 4
1559 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1560 // CHECK3-NEXT: store i8* null, i8** [[TMP20]], align 4
1561 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1562 // CHECK3-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [1000 x i32]**
1563 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP22]], align 4
1564 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1565 // CHECK3-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to [1000 x i32]**
1566 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP24]], align 4
1567 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1568 // CHECK3-NEXT: store i8* null, i8** [[TMP25]], align 4
1569 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1570 // CHECK3-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32*
1571 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[TMP27]], align 4
1572 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1573 // CHECK3-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32*
1574 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[TMP29]], align 4
1575 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1576 // CHECK3-NEXT: store i8* null, i8** [[TMP30]], align 4
1577 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1578 // CHECK3-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
1579 // CHECK3-NEXT: store i32 [[TMP10]], i32* [[TMP32]], align 4
1580 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1581 // CHECK3-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i32*
1582 // CHECK3-NEXT: store i32 [[TMP10]], i32* [[TMP34]], align 4
1583 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
1584 // CHECK3-NEXT: store i8* null, i8** [[TMP35]], align 4
1585 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1586 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1587 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1588 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1589 // CHECK3-NEXT: [[TMP40:%.*]] = load i32, i32* [[N]], align 4
1590 // CHECK3-NEXT: store i32 [[TMP40]], i32* [[DOTCAPTURE_EXPR_3]], align 4
1591 // CHECK3-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
1592 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP41]], 0
1593 // CHECK3-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB]], 1
1594 // CHECK3-NEXT: [[SUB6:%.*]] = sub nsw i32 [[DIV5]], 1
1595 // CHECK3-NEXT: store i32 [[SUB6]], i32* [[DOTCAPTURE_EXPR_4]], align 4
1596 // CHECK3-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1597 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP42]], 1
1598 // CHECK3-NEXT: [[TMP43:%.*]] = zext i32 [[ADD]] to i64
1599 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 [[TMP43]])
1600 // CHECK3-NEXT: [[TMP44:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.region_id, i32 5, i8** [[TMP36]], i8** [[TMP37]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP38]], i32 [[TMP39]])
1601 // CHECK3-NEXT: [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0
1602 // CHECK3-NEXT: br i1 [[TMP45]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1603 // CHECK3: omp_offload.failed:
1604 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50(i32 [[TMP4]], i32 [[TMP6]], [1000 x i32]* [[A]], i32 [[TMP8]], i32 [[TMP10]]) #[[ATTR4:[0-9]+]]
1605 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
1606 // CHECK3: omp_offload.cont:
1607 // CHECK3-NEXT: [[TMP46:%.*]] = load i32, i32* [[N]], align 4
1608 // CHECK3-NEXT: store i32 [[TMP46]], i32* [[N_CASTED7]], align 4
1609 // CHECK3-NEXT: [[TMP47:%.*]] = load i32, i32* [[N_CASTED7]], align 4
1610 // CHECK3-NEXT: [[TMP48:%.*]] = load i32*, i32** [[G_ADDR]], align 4
1611 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
1612 // CHECK3-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32*
1613 // CHECK3-NEXT: store i32 [[TMP47]], i32* [[TMP50]], align 4
1614 // CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
1615 // CHECK3-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32*
1616 // CHECK3-NEXT: store i32 [[TMP47]], i32* [[TMP52]], align 4
1617 // CHECK3-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0
1618 // CHECK3-NEXT: store i8* null, i8** [[TMP53]], align 4
1619 // CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
1620 // CHECK3-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to [1000 x i32]**
1621 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP55]], align 4
1622 // CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
1623 // CHECK3-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to [1000 x i32]**
1624 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP57]], align 4
1625 // CHECK3-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1
1626 // CHECK3-NEXT: store i8* null, i8** [[TMP58]], align 4
1627 // CHECK3-NEXT: [[TMP59:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 2
1628 // CHECK3-NEXT: [[TMP60:%.*]] = bitcast i8** [[TMP59]] to i32**
1629 // CHECK3-NEXT: store i32* [[TMP48]], i32** [[TMP60]], align 4
1630 // CHECK3-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 2
1631 // CHECK3-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i32**
1632 // CHECK3-NEXT: store i32* [[TMP48]], i32** [[TMP62]], align 4
1633 // CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 2
1634 // CHECK3-NEXT: store i8* null, i8** [[TMP63]], align 4
1635 // CHECK3-NEXT: [[TMP64:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
1636 // CHECK3-NEXT: [[TMP65:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
1637 // CHECK3-NEXT: [[TMP66:%.*]] = load i32, i32* [[N]], align 4
1638 // CHECK3-NEXT: store i32 [[TMP66]], i32* [[DOTCAPTURE_EXPR_12]], align 4
1639 // CHECK3-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4
1640 // CHECK3-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP67]], 0
1641 // CHECK3-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
1642 // CHECK3-NEXT: [[SUB16:%.*]] = sub nsw i32 [[DIV15]], 1
1643 // CHECK3-NEXT: store i32 [[SUB16]], i32* [[DOTCAPTURE_EXPR_13]], align 4
1644 // CHECK3-NEXT: [[TMP68:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4
1645 // CHECK3-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP68]], 1
1646 // CHECK3-NEXT: [[TMP69:%.*]] = zext i32 [[ADD17]] to i64
1647 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i64 [[TMP69]])
1648 // CHECK3-NEXT: [[TMP70:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.region_id, i32 3, i8** [[TMP64]], i8** [[TMP65]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1649 // CHECK3-NEXT: [[TMP71:%.*]] = icmp ne i32 [[TMP70]], 0
1650 // CHECK3-NEXT: br i1 [[TMP71]], label [[OMP_OFFLOAD_FAILED18:%.*]], label [[OMP_OFFLOAD_CONT19:%.*]]
1651 // CHECK3: omp_offload.failed18:
1652 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56(i32 [[TMP47]], [1000 x i32]* [[A]], i32* [[TMP48]]) #[[ATTR4]]
1653 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT19]]
1654 // CHECK3: omp_offload.cont19:
1655 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 0
1656 // CHECK3-NEXT: [[TMP72:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
1657 // CHECK3-NEXT: ret i32 [[TMP72]]
1658 //
1659 //
1660 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50
1661 // CHECK3-SAME: (i32 [[I:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]], i32 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1:[0-9]+]] {
1662 // CHECK3-NEXT: entry:
1663 // CHECK3-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
1664 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1665 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
1666 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
1667 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4
1668 // CHECK3-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
1669 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1670 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
1671 // CHECK3-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
1672 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1673 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
1674 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
1675 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
1676 // CHECK3-NEXT: [[TMP1:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
1677 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
1678 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
1679 // CHECK3-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
1680 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[I_ADDR]], align 4
1681 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[I_CASTED]], align 4
1682 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[I_CASTED]], align 4
1683 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
1684 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[N_CASTED]], align 4
1685 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[N_CASTED]], align 4
1686 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [1000 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP5]], i32 [[TMP7]], [1000 x i32]* [[TMP1]])
1687 // CHECK3-NEXT: ret void
1688 //
1689 //
1690 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
1691 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[I:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] {
1692 // CHECK3-NEXT: entry:
1693 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1694 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1695 // CHECK3-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
1696 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1697 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
1698 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1699 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1700 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1701 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1702 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
1703 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1704 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1705 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1706 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1707 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4
1708 // CHECK3-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
1709 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1710 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1711 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1712 // CHECK3-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
1713 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1714 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
1715 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
1716 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
1717 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1718 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1719 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1720 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1721 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1722 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1723 // CHECK3-NEXT: store i32 0, i32* [[I3]], align 4
1724 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1725 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1726 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1727 // CHECK3: omp.precond.then:
1728 // CHECK3-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 0
1729 // CHECK3-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 8) ]
1730 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1731 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1732 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
1733 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1734 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1735 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1736 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1737 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1738 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1739 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1740 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
1741 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1742 // CHECK3: cond.true:
1743 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1744 // CHECK3-NEXT: br label [[COND_END:%.*]]
1745 // CHECK3: cond.false:
1746 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1747 // CHECK3-NEXT: br label [[COND_END]]
1748 // CHECK3: cond.end:
1749 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1750 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1751 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1752 // CHECK3-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
1753 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1754 // CHECK3: omp.inner.for.cond:
1755 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1756 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1757 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1758 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1759 // CHECK3: omp.inner.for.body:
1760 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1761 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1762 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[I4]], align 4
1763 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[I_CASTED]], align 4
1764 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[I_CASTED]], align 4
1765 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
1766 // CHECK3-NEXT: store i32 [[TMP18]], i32* [[N_CASTED]], align 4
1767 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
1768 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, [1000 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], i32 [[TMP19]], [1000 x i32]* [[TMP0]])
1769 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1770 // CHECK3: omp.inner.for.inc:
1771 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1772 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1773 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
1774 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1775 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
1776 // CHECK3: omp.inner.for.end:
1777 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1778 // CHECK3: omp.loop.exit:
1779 // CHECK3-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1780 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
1781 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
1782 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1783 // CHECK3-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1784 // CHECK3-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1785 // CHECK3: .omp.final.then:
1786 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1787 // CHECK3-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP26]], 0
1788 // CHECK3-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
1789 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
1790 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
1791 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[I_ADDR]], align 4
1792 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1793 // CHECK3: .omp.final.done:
1794 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
1795 // CHECK3: omp.precond.end:
1796 // CHECK3-NEXT: ret void
1797 //
1798 //
1799 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
1800 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[I:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] {
1801 // CHECK3-NEXT: entry:
1802 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1803 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1804 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1805 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1806 // CHECK3-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
1807 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1808 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
1809 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1810 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1811 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1812 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1813 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
1814 // CHECK3-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
1815 // CHECK3-NEXT: [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
1816 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1817 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1818 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1819 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1820 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4
1821 // CHECK3-NEXT: [[I5:%.*]] = alloca i32, align 4
1822 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1823 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1824 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1825 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1826 // CHECK3-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
1827 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1828 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
1829 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
1830 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
1831 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1832 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1833 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1834 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1835 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1836 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1837 // CHECK3-NEXT: store i32 0, i32* [[I3]], align 4
1838 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1839 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1840 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1841 // CHECK3: omp.precond.then:
1842 // CHECK3-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 0
1843 // CHECK3-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 8) ]
1844 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[I_ADDR]], align 4
1845 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTLINEAR_START]], align 4
1846 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4
1847 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTLINEAR_STEP]], align 4
1848 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1849 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1850 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
1851 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1852 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1853 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
1854 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
1855 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1856 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1857 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1858 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
1859 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]])
1860 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1861 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1862 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP12]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1863 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1864 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1865 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]]
1866 // CHECK3-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1867 // CHECK3: cond.true:
1868 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1869 // CHECK3-NEXT: br label [[COND_END:%.*]]
1870 // CHECK3: cond.false:
1871 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1872 // CHECK3-NEXT: br label [[COND_END]]
1873 // CHECK3: cond.end:
1874 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ]
1875 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1876 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1877 // CHECK3-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
1878 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1879 // CHECK3: omp.inner.for.cond:
1880 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1881 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1882 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
1883 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1884 // CHECK3: omp.inner.for.body:
1885 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1886 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
1887 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1888 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
1889 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4
1890 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP21]]
1891 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1892 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1893 // CHECK3: omp.body.continue:
1894 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1895 // CHECK3: omp.inner.for.inc:
1896 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1897 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1
1898 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
1899 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
1900 // CHECK3: omp.inner.for.end:
1901 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1902 // CHECK3: omp.loop.exit:
1903 // CHECK3-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1904 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
1905 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
1906 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1907 // CHECK3-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1908 // CHECK3-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1909 // CHECK3: .omp.final.then:
1910 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1911 // CHECK3-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP27]], 0
1912 // CHECK3-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
1913 // CHECK3-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
1914 // CHECK3-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
1915 // CHECK3-NEXT: store i32 [[ADD12]], i32* [[I_ADDR]], align 4
1916 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1917 // CHECK3: .omp.final.done:
1918 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1919 // CHECK3-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
1920 // CHECK3-NEXT: br i1 [[TMP29]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
1921 // CHECK3: .omp.linear.pu:
1922 // CHECK3-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
1923 // CHECK3: .omp.linear.pu.done:
1924 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
1925 // CHECK3: omp.precond.end:
1926 // CHECK3-NEXT: ret void
1927 //
1928 //
1929 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56
1930 // CHECK3-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR1]] {
1931 // CHECK3-NEXT: entry:
1932 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1933 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
1934 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
1935 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1936 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1937 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
1938 // CHECK3-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
1939 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
1940 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
1941 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4
1942 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4
1943 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[G_ADDR]], align 4
1944 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [1000 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP2]], [1000 x i32]* [[TMP0]], i32* [[TMP3]])
1945 // CHECK3-NEXT: ret void
1946 //
1947 //
1948 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2
1949 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR1]] {
1950 // CHECK3-NEXT: entry:
1951 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1952 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1953 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1954 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
1955 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
1956 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1957 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1958 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1959 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1960 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1961 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1962 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1963 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1964 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1965 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
1966 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1967 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1968 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1969 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1970 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
1971 // CHECK3-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
1972 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
1973 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
1974 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1975 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1976 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1977 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1978 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1979 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1980 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4
1981 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1982 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1983 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1984 // CHECK3: omp.precond.then:
1985 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1986 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1987 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
1988 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1989 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1990 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1991 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1992 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1993 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1994 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1995 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
1996 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1997 // CHECK3: cond.true:
1998 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1999 // CHECK3-NEXT: br label [[COND_END:%.*]]
2000 // CHECK3: cond.false:
2001 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2002 // CHECK3-NEXT: br label [[COND_END]]
2003 // CHECK3: cond.end:
2004 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2005 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2006 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2007 // CHECK3-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
2008 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2009 // CHECK3: omp.inner.for.cond:
2010 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2011 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2012 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2013 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2014 // CHECK3: omp.inner.for.body:
2015 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2016 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2017 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
2018 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
2019 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
2020 // CHECK3-NEXT: [[TMP18:%.*]] = load i32*, i32** [[G_ADDR]], align 4
2021 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], [1000 x i32]* [[TMP0]], i32* [[TMP18]])
2022 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2023 // CHECK3: omp.inner.for.inc:
2024 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2025 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2026 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
2027 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2028 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
2029 // CHECK3: omp.inner.for.end:
2030 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2031 // CHECK3: omp.loop.exit:
2032 // CHECK3-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2033 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
2034 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
2035 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2036 // CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2037 // CHECK3-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2038 // CHECK3: .omp.final.then:
2039 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2040 // CHECK3-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0
2041 // CHECK3-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
2042 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
2043 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
2044 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
2045 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2046 // CHECK3: .omp.final.done:
2047 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
2048 // CHECK3: omp.precond.end:
2049 // CHECK3-NEXT: ret void
2050 //
2051 //
2052 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3
2053 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR1]] {
2054 // CHECK3-NEXT: entry:
2055 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2056 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2057 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2058 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2059 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2060 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
2061 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
2062 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2063 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2064 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2065 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2066 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2067 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2068 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2069 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2070 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2071 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
2072 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2073 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2074 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2075 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2076 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2077 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
2078 // CHECK3-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
2079 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
2080 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
2081 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2082 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2083 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2084 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2085 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2086 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2087 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4
2088 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2089 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2090 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2091 // CHECK3: omp.precond.then:
2092 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2093 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2094 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
2095 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2096 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2097 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
2098 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
2099 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2100 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2101 // CHECK3-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2102 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
2103 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2104 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2105 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2106 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
2107 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2108 // CHECK3: cond.true:
2109 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2110 // CHECK3-NEXT: br label [[COND_END:%.*]]
2111 // CHECK3: cond.false:
2112 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2113 // CHECK3-NEXT: br label [[COND_END]]
2114 // CHECK3: cond.end:
2115 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2116 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2117 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2118 // CHECK3-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
2119 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2120 // CHECK3: omp.inner.for.cond:
2121 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2122 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2123 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2124 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2125 // CHECK3: omp.inner.for.body:
2126 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2127 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
2128 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2129 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
2130 // CHECK3-NEXT: [[TMP17:%.*]] = load i32*, i32** [[G_ADDR]], align 4
2131 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i32 0
2132 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
2133 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
2134 // CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
2135 // CHECK3-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX6]], align 4
2136 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2137 // CHECK3: omp.body.continue:
2138 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2139 // CHECK3: omp.inner.for.inc:
2140 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2141 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
2142 // CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
2143 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
2144 // CHECK3: omp.inner.for.end:
2145 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2146 // CHECK3: omp.loop.exit:
2147 // CHECK3-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2148 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
2149 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
2150 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2151 // CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2152 // CHECK3-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2153 // CHECK3: .omp.final.then:
2154 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2155 // CHECK3-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0
2156 // CHECK3-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
2157 // CHECK3-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
2158 // CHECK3-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
2159 // CHECK3-NEXT: store i32 [[ADD11]], i32* [[I3]], align 4
2160 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2161 // CHECK3: .omp.final.done:
2162 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
2163 // CHECK3: omp.precond.end:
2164 // CHECK3-NEXT: ret void
2165 //
2166 //
2167 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2168 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] {
2169 // CHECK3-NEXT: entry:
2170 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
2171 // CHECK3-NEXT: ret void
2172 //
2173 //
2174 // CHECK4-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
2175 // CHECK4-SAME: (i32* [[G:%.*]]) #[[ATTR0:[0-9]+]] {
2176 // CHECK4-NEXT: entry:
2177 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
2178 // CHECK4-NEXT: [[N:%.*]] = alloca i32, align 4
2179 // CHECK4-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4
2180 // CHECK4-NEXT: [[TE:%.*]] = alloca i32, align 4
2181 // CHECK4-NEXT: [[TH:%.*]] = alloca i32, align 4
2182 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
2183 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2184 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2185 // CHECK4-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
2186 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2187 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
2188 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i32, align 4
2189 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
2190 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
2191 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
2192 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
2193 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
2194 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
2195 // CHECK4-NEXT: [[N_CASTED7:%.*]] = alloca i32, align 4
2196 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [3 x i8*], align 4
2197 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [3 x i8*], align 4
2198 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [3 x i8*], align 4
2199 // CHECK4-NEXT: [[_TMP11:%.*]] = alloca i32, align 4
2200 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4
2201 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4
2202 // CHECK4-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
2203 // CHECK4-NEXT: store i32 1000, i32* [[N]], align 4
2204 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
2205 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
2206 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
2207 // CHECK4-NEXT: store i32 128, i32* [[TH]], align 4
2208 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
2209 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2210 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
2211 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2212 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4
2213 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[I_CASTED]], align 4
2214 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[I_CASTED]], align 4
2215 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[N]], align 4
2216 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[N_CASTED]], align 4
2217 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_CASTED]], align 4
2218 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2219 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
2220 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
2221 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2222 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR__CASTED2]], align 4
2223 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED2]], align 4
2224 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2225 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
2226 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[TMP12]], align 4
2227 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2228 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32*
2229 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[TMP14]], align 4
2230 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2231 // CHECK4-NEXT: store i8* null, i8** [[TMP15]], align 4
2232 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2233 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
2234 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[TMP17]], align 4
2235 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2236 // CHECK4-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32*
2237 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[TMP19]], align 4
2238 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2239 // CHECK4-NEXT: store i8* null, i8** [[TMP20]], align 4
2240 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2241 // CHECK4-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [1000 x i32]**
2242 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP22]], align 4
2243 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2244 // CHECK4-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to [1000 x i32]**
2245 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP24]], align 4
2246 // CHECK4-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2247 // CHECK4-NEXT: store i8* null, i8** [[TMP25]], align 4
2248 // CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2249 // CHECK4-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32*
2250 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[TMP27]], align 4
2251 // CHECK4-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2252 // CHECK4-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32*
2253 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[TMP29]], align 4
2254 // CHECK4-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
2255 // CHECK4-NEXT: store i8* null, i8** [[TMP30]], align 4
2256 // CHECK4-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
2257 // CHECK4-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
2258 // CHECK4-NEXT: store i32 [[TMP10]], i32* [[TMP32]], align 4
2259 // CHECK4-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
2260 // CHECK4-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i32*
2261 // CHECK4-NEXT: store i32 [[TMP10]], i32* [[TMP34]], align 4
2262 // CHECK4-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
2263 // CHECK4-NEXT: store i8* null, i8** [[TMP35]], align 4
2264 // CHECK4-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2265 // CHECK4-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2266 // CHECK4-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2267 // CHECK4-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2268 // CHECK4-NEXT: [[TMP40:%.*]] = load i32, i32* [[N]], align 4
2269 // CHECK4-NEXT: store i32 [[TMP40]], i32* [[DOTCAPTURE_EXPR_3]], align 4
2270 // CHECK4-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
2271 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP41]], 0
2272 // CHECK4-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB]], 1
2273 // CHECK4-NEXT: [[SUB6:%.*]] = sub nsw i32 [[DIV5]], 1
2274 // CHECK4-NEXT: store i32 [[SUB6]], i32* [[DOTCAPTURE_EXPR_4]], align 4
2275 // CHECK4-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
2276 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP42]], 1
2277 // CHECK4-NEXT: [[TMP43:%.*]] = zext i32 [[ADD]] to i64
2278 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 [[TMP43]])
2279 // CHECK4-NEXT: [[TMP44:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.region_id, i32 5, i8** [[TMP36]], i8** [[TMP37]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP38]], i32 [[TMP39]])
2280 // CHECK4-NEXT: [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0
2281 // CHECK4-NEXT: br i1 [[TMP45]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2282 // CHECK4: omp_offload.failed:
2283 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50(i32 [[TMP4]], i32 [[TMP6]], [1000 x i32]* [[A]], i32 [[TMP8]], i32 [[TMP10]]) #[[ATTR4:[0-9]+]]
2284 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]]
2285 // CHECK4: omp_offload.cont:
2286 // CHECK4-NEXT: [[TMP46:%.*]] = load i32, i32* [[N]], align 4
2287 // CHECK4-NEXT: store i32 [[TMP46]], i32* [[N_CASTED7]], align 4
2288 // CHECK4-NEXT: [[TMP47:%.*]] = load i32, i32* [[N_CASTED7]], align 4
2289 // CHECK4-NEXT: [[TMP48:%.*]] = load i32*, i32** [[G_ADDR]], align 4
2290 // CHECK4-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
2291 // CHECK4-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32*
2292 // CHECK4-NEXT: store i32 [[TMP47]], i32* [[TMP50]], align 4
2293 // CHECK4-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
2294 // CHECK4-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32*
2295 // CHECK4-NEXT: store i32 [[TMP47]], i32* [[TMP52]], align 4
2296 // CHECK4-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0
2297 // CHECK4-NEXT: store i8* null, i8** [[TMP53]], align 4
2298 // CHECK4-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
2299 // CHECK4-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to [1000 x i32]**
2300 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP55]], align 4
2301 // CHECK4-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
2302 // CHECK4-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to [1000 x i32]**
2303 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP57]], align 4
2304 // CHECK4-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1
2305 // CHECK4-NEXT: store i8* null, i8** [[TMP58]], align 4
2306 // CHECK4-NEXT: [[TMP59:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 2
2307 // CHECK4-NEXT: [[TMP60:%.*]] = bitcast i8** [[TMP59]] to i32**
2308 // CHECK4-NEXT: store i32* [[TMP48]], i32** [[TMP60]], align 4
2309 // CHECK4-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 2
2310 // CHECK4-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to i32**
2311 // CHECK4-NEXT: store i32* [[TMP48]], i32** [[TMP62]], align 4
2312 // CHECK4-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 2
2313 // CHECK4-NEXT: store i8* null, i8** [[TMP63]], align 4
2314 // CHECK4-NEXT: [[TMP64:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
2315 // CHECK4-NEXT: [[TMP65:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
2316 // CHECK4-NEXT: [[TMP66:%.*]] = load i32, i32* [[N]], align 4
2317 // CHECK4-NEXT: store i32 [[TMP66]], i32* [[DOTCAPTURE_EXPR_12]], align 4
2318 // CHECK4-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4
2319 // CHECK4-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP67]], 0
2320 // CHECK4-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
2321 // CHECK4-NEXT: [[SUB16:%.*]] = sub nsw i32 [[DIV15]], 1
2322 // CHECK4-NEXT: store i32 [[SUB16]], i32* [[DOTCAPTURE_EXPR_13]], align 4
2323 // CHECK4-NEXT: [[TMP68:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4
2324 // CHECK4-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP68]], 1
2325 // CHECK4-NEXT: [[TMP69:%.*]] = zext i32 [[ADD17]] to i64
2326 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i64 [[TMP69]])
2327 // CHECK4-NEXT: [[TMP70:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.region_id, i32 3, i8** [[TMP64]], i8** [[TMP65]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2328 // CHECK4-NEXT: [[TMP71:%.*]] = icmp ne i32 [[TMP70]], 0
2329 // CHECK4-NEXT: br i1 [[TMP71]], label [[OMP_OFFLOAD_FAILED18:%.*]], label [[OMP_OFFLOAD_CONT19:%.*]]
2330 // CHECK4: omp_offload.failed18:
2331 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56(i32 [[TMP47]], [1000 x i32]* [[A]], i32* [[TMP48]]) #[[ATTR4]]
2332 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT19]]
2333 // CHECK4: omp_offload.cont19:
2334 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 0
2335 // CHECK4-NEXT: [[TMP72:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
2336 // CHECK4-NEXT: ret i32 [[TMP72]]
2337 //
2338 //
2339 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50
2340 // CHECK4-SAME: (i32 [[I:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]], i32 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1:[0-9]+]] {
2341 // CHECK4-NEXT: entry:
2342 // CHECK4-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
2343 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2344 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
2345 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2346 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4
2347 // CHECK4-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
2348 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2349 // CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
2350 // CHECK4-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
2351 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2352 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
2353 // CHECK4-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2354 // CHECK4-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
2355 // CHECK4-NEXT: [[TMP1:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
2356 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2357 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
2358 // CHECK4-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
2359 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[I_ADDR]], align 4
2360 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[I_CASTED]], align 4
2361 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[I_CASTED]], align 4
2362 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
2363 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[N_CASTED]], align 4
2364 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[N_CASTED]], align 4
2365 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [1000 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP5]], i32 [[TMP7]], [1000 x i32]* [[TMP1]])
2366 // CHECK4-NEXT: ret void
2367 //
2368 //
2369 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
2370 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[I:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] {
2371 // CHECK4-NEXT: entry:
2372 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2373 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2374 // CHECK4-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
2375 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2376 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
2377 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2378 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
2379 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2380 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2381 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4
2382 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2383 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2384 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2385 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2386 // CHECK4-NEXT: [[I4:%.*]] = alloca i32, align 4
2387 // CHECK4-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
2388 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2389 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2390 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2391 // CHECK4-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
2392 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2393 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
2394 // CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
2395 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
2396 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2397 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2398 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2399 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2400 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2401 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2402 // CHECK4-NEXT: store i32 0, i32* [[I3]], align 4
2403 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2404 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2405 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2406 // CHECK4: omp.precond.then:
2407 // CHECK4-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 0
2408 // CHECK4-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 8) ]
2409 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2410 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2411 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
2412 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2413 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2414 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2415 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2416 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2417 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2418 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2419 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
2420 // CHECK4-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2421 // CHECK4: cond.true:
2422 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2423 // CHECK4-NEXT: br label [[COND_END:%.*]]
2424 // CHECK4: cond.false:
2425 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2426 // CHECK4-NEXT: br label [[COND_END]]
2427 // CHECK4: cond.end:
2428 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2429 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2430 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2431 // CHECK4-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
2432 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2433 // CHECK4: omp.inner.for.cond:
2434 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2435 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2436 // CHECK4-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2437 // CHECK4-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2438 // CHECK4: omp.inner.for.body:
2439 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2440 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2441 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[I4]], align 4
2442 // CHECK4-NEXT: store i32 [[TMP16]], i32* [[I_CASTED]], align 4
2443 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[I_CASTED]], align 4
2444 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
2445 // CHECK4-NEXT: store i32 [[TMP18]], i32* [[N_CASTED]], align 4
2446 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
2447 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, [1000 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], i32 [[TMP19]], [1000 x i32]* [[TMP0]])
2448 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2449 // CHECK4: omp.inner.for.inc:
2450 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2451 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2452 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
2453 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2454 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
2455 // CHECK4: omp.inner.for.end:
2456 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2457 // CHECK4: omp.loop.exit:
2458 // CHECK4-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2459 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
2460 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
2461 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2462 // CHECK4-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
2463 // CHECK4-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2464 // CHECK4: .omp.final.then:
2465 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2466 // CHECK4-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP26]], 0
2467 // CHECK4-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
2468 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
2469 // CHECK4-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
2470 // CHECK4-NEXT: store i32 [[ADD9]], i32* [[I_ADDR]], align 4
2471 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
2472 // CHECK4: .omp.final.done:
2473 // CHECK4-NEXT: br label [[OMP_PRECOND_END]]
2474 // CHECK4: omp.precond.end:
2475 // CHECK4-NEXT: ret void
2476 //
2477 //
2478 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1
2479 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[I:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] {
2480 // CHECK4-NEXT: entry:
2481 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2482 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2483 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2484 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2485 // CHECK4-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
2486 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2487 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
2488 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2489 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
2490 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2491 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2492 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4
2493 // CHECK4-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
2494 // CHECK4-NEXT: [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
2495 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2496 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2497 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2498 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2499 // CHECK4-NEXT: [[I4:%.*]] = alloca i32, align 4
2500 // CHECK4-NEXT: [[I5:%.*]] = alloca i32, align 4
2501 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2502 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2503 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2504 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2505 // CHECK4-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
2506 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2507 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
2508 // CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
2509 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
2510 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2511 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2512 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2513 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2514 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2515 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2516 // CHECK4-NEXT: store i32 0, i32* [[I3]], align 4
2517 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2518 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2519 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2520 // CHECK4: omp.precond.then:
2521 // CHECK4-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 0
2522 // CHECK4-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 8) ]
2523 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[I_ADDR]], align 4
2524 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTLINEAR_START]], align 4
2525 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4
2526 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTLINEAR_STEP]], align 4
2527 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2528 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2529 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
2530 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2531 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2532 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
2533 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
2534 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2535 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2536 // CHECK4-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2537 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
2538 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]])
2539 // CHECK4-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2540 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
2541 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP12]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2542 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2543 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2544 // CHECK4-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]]
2545 // CHECK4-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2546 // CHECK4: cond.true:
2547 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2548 // CHECK4-NEXT: br label [[COND_END:%.*]]
2549 // CHECK4: cond.false:
2550 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2551 // CHECK4-NEXT: br label [[COND_END]]
2552 // CHECK4: cond.end:
2553 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ]
2554 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2555 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2556 // CHECK4-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
2557 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2558 // CHECK4: omp.inner.for.cond:
2559 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2560 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2561 // CHECK4-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
2562 // CHECK4-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2563 // CHECK4: omp.inner.for.body:
2564 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2565 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
2566 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2567 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
2568 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4
2569 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP21]]
2570 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
2571 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2572 // CHECK4: omp.body.continue:
2573 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2574 // CHECK4: omp.inner.for.inc:
2575 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2576 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1
2577 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
2578 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
2579 // CHECK4: omp.inner.for.end:
2580 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2581 // CHECK4: omp.loop.exit:
2582 // CHECK4-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2583 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
2584 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
2585 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2586 // CHECK4-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2587 // CHECK4-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2588 // CHECK4: .omp.final.then:
2589 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2590 // CHECK4-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP27]], 0
2591 // CHECK4-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
2592 // CHECK4-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
2593 // CHECK4-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
2594 // CHECK4-NEXT: store i32 [[ADD12]], i32* [[I_ADDR]], align 4
2595 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
2596 // CHECK4: .omp.final.done:
2597 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2598 // CHECK4-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
2599 // CHECK4-NEXT: br i1 [[TMP29]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
2600 // CHECK4: .omp.linear.pu:
2601 // CHECK4-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
2602 // CHECK4: .omp.linear.pu.done:
2603 // CHECK4-NEXT: br label [[OMP_PRECOND_END]]
2604 // CHECK4: omp.precond.end:
2605 // CHECK4-NEXT: ret void
2606 //
2607 //
2608 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56
2609 // CHECK4-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR1]] {
2610 // CHECK4-NEXT: entry:
2611 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2612 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
2613 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
2614 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2615 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2616 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
2617 // CHECK4-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
2618 // CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
2619 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
2620 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4
2621 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4
2622 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[G_ADDR]], align 4
2623 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [1000 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP2]], [1000 x i32]* [[TMP0]], i32* [[TMP3]])
2624 // CHECK4-NEXT: ret void
2625 //
2626 //
2627 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2
2628 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR1]] {
2629 // CHECK4-NEXT: entry:
2630 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2631 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2632 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2633 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
2634 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
2635 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2636 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
2637 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2638 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2639 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
2640 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2641 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2642 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2643 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2644 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4
2645 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2646 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2647 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2648 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2649 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
2650 // CHECK4-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
2651 // CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
2652 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
2653 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2654 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2655 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2656 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2657 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2658 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2659 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4
2660 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2661 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2662 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2663 // CHECK4: omp.precond.then:
2664 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2665 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2666 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
2667 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2668 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2669 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2670 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2671 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2672 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2673 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2674 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
2675 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2676 // CHECK4: cond.true:
2677 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2678 // CHECK4-NEXT: br label [[COND_END:%.*]]
2679 // CHECK4: cond.false:
2680 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2681 // CHECK4-NEXT: br label [[COND_END]]
2682 // CHECK4: cond.end:
2683 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2684 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2685 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2686 // CHECK4-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
2687 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2688 // CHECK4: omp.inner.for.cond:
2689 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2690 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2691 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2692 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2693 // CHECK4: omp.inner.for.body:
2694 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2695 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2696 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
2697 // CHECK4-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
2698 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
2699 // CHECK4-NEXT: [[TMP18:%.*]] = load i32*, i32** [[G_ADDR]], align 4
2700 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], [1000 x i32]* [[TMP0]], i32* [[TMP18]])
2701 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2702 // CHECK4: omp.inner.for.inc:
2703 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2704 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2705 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
2706 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2707 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
2708 // CHECK4: omp.inner.for.end:
2709 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2710 // CHECK4: omp.loop.exit:
2711 // CHECK4-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2712 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
2713 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
2714 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2715 // CHECK4-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2716 // CHECK4-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2717 // CHECK4: .omp.final.then:
2718 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2719 // CHECK4-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0
2720 // CHECK4-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
2721 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
2722 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
2723 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
2724 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
2725 // CHECK4: .omp.final.done:
2726 // CHECK4-NEXT: br label [[OMP_PRECOND_END]]
2727 // CHECK4: omp.precond.end:
2728 // CHECK4-NEXT: ret void
2729 //
2730 //
2731 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3
2732 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR1]] {
2733 // CHECK4-NEXT: entry:
2734 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2735 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2736 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2737 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2738 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2739 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
2740 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
2741 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2742 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
2743 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2744 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2745 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
2746 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2747 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2748 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2749 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2750 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4
2751 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2752 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2753 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2754 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2755 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2756 // CHECK4-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
2757 // CHECK4-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
2758 // CHECK4-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
2759 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
2760 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2761 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2762 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2763 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2764 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2765 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2766 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4
2767 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2768 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2769 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2770 // CHECK4: omp.precond.then:
2771 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2772 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2773 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
2774 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2775 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2776 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
2777 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
2778 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2779 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2780 // CHECK4-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2781 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
2782 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2783 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2784 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2785 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
2786 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2787 // CHECK4: cond.true:
2788 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2789 // CHECK4-NEXT: br label [[COND_END:%.*]]
2790 // CHECK4: cond.false:
2791 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2792 // CHECK4-NEXT: br label [[COND_END]]
2793 // CHECK4: cond.end:
2794 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2795 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2796 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2797 // CHECK4-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
2798 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2799 // CHECK4: omp.inner.for.cond:
2800 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2801 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2802 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2803 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2804 // CHECK4: omp.inner.for.body:
2805 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2806 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
2807 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2808 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
2809 // CHECK4-NEXT: [[TMP17:%.*]] = load i32*, i32** [[G_ADDR]], align 4
2810 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i32 0
2811 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
2812 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
2813 // CHECK4-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
2814 // CHECK4-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX6]], align 4
2815 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2816 // CHECK4: omp.body.continue:
2817 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2818 // CHECK4: omp.inner.for.inc:
2819 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2820 // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
2821 // CHECK4-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
2822 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
2823 // CHECK4: omp.inner.for.end:
2824 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2825 // CHECK4: omp.loop.exit:
2826 // CHECK4-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2827 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
2828 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
2829 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2830 // CHECK4-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2831 // CHECK4-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2832 // CHECK4: .omp.final.then:
2833 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2834 // CHECK4-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0
2835 // CHECK4-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
2836 // CHECK4-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
2837 // CHECK4-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
2838 // CHECK4-NEXT: store i32 [[ADD11]], i32* [[I3]], align 4
2839 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
2840 // CHECK4: .omp.final.done:
2841 // CHECK4-NEXT: br label [[OMP_PRECOND_END]]
2842 // CHECK4: omp.precond.end:
2843 // CHECK4-NEXT: ret void
2844 //
2845 //
2846 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2847 // CHECK4-SAME: () #[[ATTR5:[0-9]+]] {
2848 // CHECK4-NEXT: entry:
2849 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1)
2850 // CHECK4-NEXT: ret void
2851 //
2852 //
2853 // CHECK5-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
2854 // CHECK5-SAME: (i32* [[G:%.*]]) #[[ATTR0:[0-9]+]] {
2855 // CHECK5-NEXT: entry:
2856 // CHECK5-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
2857 // CHECK5-NEXT: [[N:%.*]] = alloca i32, align 4
2858 // CHECK5-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4
2859 // CHECK5-NEXT: [[TE:%.*]] = alloca i32, align 4
2860 // CHECK5-NEXT: [[TH:%.*]] = alloca i32, align 4
2861 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2862 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2863 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2864 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2865 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2866 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
2867 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2868 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2869 // CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 4
2870 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2871 // CHECK5-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
2872 // CHECK5-NEXT: [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
2873 // CHECK5-NEXT: [[I7:%.*]] = alloca i32, align 4
2874 // CHECK5-NEXT: [[I8:%.*]] = alloca i32, align 4
2875 // CHECK5-NEXT: [[_TMP15:%.*]] = alloca i32, align 4
2876 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_16:%.*]] = alloca i32, align 4
2877 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
2878 // CHECK5-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4
2879 // CHECK5-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4
2880 // CHECK5-NEXT: [[I23:%.*]] = alloca i32, align 4
2881 // CHECK5-NEXT: [[DOTOMP_IV26:%.*]] = alloca i32, align 4
2882 // CHECK5-NEXT: [[I27:%.*]] = alloca i32, align 4
2883 // CHECK5-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
2884 // CHECK5-NEXT: store i32 1000, i32* [[N]], align 4
2885 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
2886 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
2887 // CHECK5-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
2888 // CHECK5-NEXT: store i32 128, i32* [[TH]], align 4
2889 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
2890 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2891 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
2892 // CHECK5-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2893 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
2894 // CHECK5-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
2895 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2896 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
2897 // CHECK5-NEXT: [[DIV4:%.*]] = sdiv i32 [[SUB]], 1
2898 // CHECK5-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1
2899 // CHECK5-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
2900 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2901 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
2902 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
2903 // CHECK5-NEXT: store i32 0, i32* [[I6]], align 4
2904 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2905 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
2906 // CHECK5-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
2907 // CHECK5: simd.if.then:
2908 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2909 // CHECK5-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2910 // CHECK5-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 0
2911 // CHECK5-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 8) ]
2912 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4
2913 // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START]], align 4
2914 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[N]], align 4
2915 // CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTLINEAR_STEP]], align 4
2916 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2917 // CHECK5: omp.inner.for.cond:
2918 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2919 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2920 // CHECK5-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
2921 // CHECK5-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2922 // CHECK5: omp.inner.for.body:
2923 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2924 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
2925 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2926 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I7]], align 4
2927 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[I7]], align 4
2928 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
2929 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
2930 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
2931 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2932 // CHECK5: omp.body.continue:
2933 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2934 // CHECK5: omp.inner.for.inc:
2935 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2936 // CHECK5-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP14]], 1
2937 // CHECK5-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
2938 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
2939 // CHECK5: omp.inner.for.end:
2940 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2941 // CHECK5-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP15]], 0
2942 // CHECK5-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
2943 // CHECK5-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1
2944 // CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
2945 // CHECK5-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
2946 // CHECK5-NEXT: br label [[SIMD_IF_END]]
2947 // CHECK5: simd.if.end:
2948 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[N]], align 4
2949 // CHECK5-NEXT: store i32 [[TMP16]], i32* [[DOTCAPTURE_EXPR_16]], align 4
2950 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
2951 // CHECK5-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP17]], 0
2952 // CHECK5-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
2953 // CHECK5-NEXT: [[SUB20:%.*]] = sub nsw i32 [[DIV19]], 1
2954 // CHECK5-NEXT: store i32 [[SUB20]], i32* [[DOTCAPTURE_EXPR_17]], align 4
2955 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4
2956 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4
2957 // CHECK5-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_UB22]], align 4
2958 // CHECK5-NEXT: store i32 0, i32* [[I23]], align 4
2959 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
2960 // CHECK5-NEXT: [[CMP24:%.*]] = icmp slt i32 0, [[TMP19]]
2961 // CHECK5-NEXT: br i1 [[CMP24]], label [[SIMD_IF_THEN25:%.*]], label [[SIMD_IF_END44:%.*]]
2962 // CHECK5: simd.if.then25:
2963 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4
2964 // CHECK5-NEXT: store i32 [[TMP20]], i32* [[DOTOMP_IV26]], align 4
2965 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND28:%.*]]
2966 // CHECK5: omp.inner.for.cond28:
2967 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !5
2968 // CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !5
2969 // CHECK5-NEXT: [[CMP29:%.*]] = icmp sle i32 [[TMP21]], [[TMP22]]
2970 // CHECK5-NEXT: br i1 [[CMP29]], label [[OMP_INNER_FOR_BODY30:%.*]], label [[OMP_INNER_FOR_END39:%.*]]
2971 // CHECK5: omp.inner.for.body30:
2972 // CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !5
2973 // CHECK5-NEXT: [[MUL31:%.*]] = mul nsw i32 [[TMP23]], 1
2974 // CHECK5-NEXT: [[ADD32:%.*]] = add nsw i32 0, [[MUL31]]
2975 // CHECK5-NEXT: store i32 [[ADD32]], i32* [[I27]], align 4, !llvm.access.group !5
2976 // CHECK5-NEXT: [[TMP24:%.*]] = load i32*, i32** [[G_ADDR]], align 8, !llvm.access.group !5
2977 // CHECK5-NEXT: [[ARRAYIDX33:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i64 0
2978 // CHECK5-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX33]], align 4, !llvm.access.group !5
2979 // CHECK5-NEXT: [[TMP26:%.*]] = load i32, i32* [[I27]], align 4, !llvm.access.group !5
2980 // CHECK5-NEXT: [[IDXPROM34:%.*]] = sext i32 [[TMP26]] to i64
2981 // CHECK5-NEXT: [[ARRAYIDX35:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 [[IDXPROM34]]
2982 // CHECK5-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX35]], align 4, !llvm.access.group !5
2983 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE36:%.*]]
2984 // CHECK5: omp.body.continue36:
2985 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC37:%.*]]
2986 // CHECK5: omp.inner.for.inc37:
2987 // CHECK5-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !5
2988 // CHECK5-NEXT: [[ADD38:%.*]] = add nsw i32 [[TMP27]], 1
2989 // CHECK5-NEXT: store i32 [[ADD38]], i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !5
2990 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND28]], !llvm.loop [[LOOP6:![0-9]+]]
2991 // CHECK5: omp.inner.for.end39:
2992 // CHECK5-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
2993 // CHECK5-NEXT: [[SUB40:%.*]] = sub nsw i32 [[TMP28]], 0
2994 // CHECK5-NEXT: [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1
2995 // CHECK5-NEXT: [[MUL42:%.*]] = mul nsw i32 [[DIV41]], 1
2996 // CHECK5-NEXT: [[ADD43:%.*]] = add nsw i32 0, [[MUL42]]
2997 // CHECK5-NEXT: store i32 [[ADD43]], i32* [[I27]], align 4
2998 // CHECK5-NEXT: br label [[SIMD_IF_END44]]
2999 // CHECK5: simd.if.end44:
3000 // CHECK5-NEXT: [[ARRAYIDX45:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 0
3001 // CHECK5-NEXT: [[TMP29:%.*]] = load i32, i32* [[ARRAYIDX45]], align 4
3002 // CHECK5-NEXT: ret i32 [[TMP29]]
3003 //
3004 //
3005 // CHECK6-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
3006 // CHECK6-SAME: (i32* [[G:%.*]]) #[[ATTR0:[0-9]+]] {
3007 // CHECK6-NEXT: entry:
3008 // CHECK6-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
3009 // CHECK6-NEXT: [[N:%.*]] = alloca i32, align 4
3010 // CHECK6-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4
3011 // CHECK6-NEXT: [[TE:%.*]] = alloca i32, align 4
3012 // CHECK6-NEXT: [[TH:%.*]] = alloca i32, align 4
3013 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
3014 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3015 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3016 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
3017 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
3018 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
3019 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3020 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3021 // CHECK6-NEXT: [[I6:%.*]] = alloca i32, align 4
3022 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3023 // CHECK6-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
3024 // CHECK6-NEXT: [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
3025 // CHECK6-NEXT: [[I7:%.*]] = alloca i32, align 4
3026 // CHECK6-NEXT: [[I8:%.*]] = alloca i32, align 4
3027 // CHECK6-NEXT: [[_TMP15:%.*]] = alloca i32, align 4
3028 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_16:%.*]] = alloca i32, align 4
3029 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
3030 // CHECK6-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4
3031 // CHECK6-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4
3032 // CHECK6-NEXT: [[I23:%.*]] = alloca i32, align 4
3033 // CHECK6-NEXT: [[DOTOMP_IV26:%.*]] = alloca i32, align 4
3034 // CHECK6-NEXT: [[I27:%.*]] = alloca i32, align 4
3035 // CHECK6-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
3036 // CHECK6-NEXT: store i32 1000, i32* [[N]], align 4
3037 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
3038 // CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
3039 // CHECK6-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
3040 // CHECK6-NEXT: store i32 128, i32* [[TH]], align 4
3041 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
3042 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
3043 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
3044 // CHECK6-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3045 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
3046 // CHECK6-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
3047 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3048 // CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
3049 // CHECK6-NEXT: [[DIV4:%.*]] = sdiv i32 [[SUB]], 1
3050 // CHECK6-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1
3051 // CHECK6-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
3052 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3053 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
3054 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
3055 // CHECK6-NEXT: store i32 0, i32* [[I6]], align 4
3056 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3057 // CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
3058 // CHECK6-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
3059 // CHECK6: simd.if.then:
3060 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3061 // CHECK6-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3062 // CHECK6-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 0
3063 // CHECK6-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 8) ]
3064 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4
3065 // CHECK6-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START]], align 4
3066 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[N]], align 4
3067 // CHECK6-NEXT: store i32 [[TMP9]], i32* [[DOTLINEAR_STEP]], align 4
3068 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3069 // CHECK6: omp.inner.for.cond:
3070 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3071 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3072 // CHECK6-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
3073 // CHECK6-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3074 // CHECK6: omp.inner.for.body:
3075 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3076 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
3077 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3078 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I7]], align 4
3079 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[I7]], align 4
3080 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
3081 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
3082 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
3083 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3084 // CHECK6: omp.body.continue:
3085 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3086 // CHECK6: omp.inner.for.inc:
3087 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3088 // CHECK6-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP14]], 1
3089 // CHECK6-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
3090 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
3091 // CHECK6: omp.inner.for.end:
3092 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3093 // CHECK6-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP15]], 0
3094 // CHECK6-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
3095 // CHECK6-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1
3096 // CHECK6-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
3097 // CHECK6-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
3098 // CHECK6-NEXT: br label [[SIMD_IF_END]]
3099 // CHECK6: simd.if.end:
3100 // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[N]], align 4
3101 // CHECK6-NEXT: store i32 [[TMP16]], i32* [[DOTCAPTURE_EXPR_16]], align 4
3102 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
3103 // CHECK6-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP17]], 0
3104 // CHECK6-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
3105 // CHECK6-NEXT: [[SUB20:%.*]] = sub nsw i32 [[DIV19]], 1
3106 // CHECK6-NEXT: store i32 [[SUB20]], i32* [[DOTCAPTURE_EXPR_17]], align 4
3107 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4
3108 // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4
3109 // CHECK6-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_UB22]], align 4
3110 // CHECK6-NEXT: store i32 0, i32* [[I23]], align 4
3111 // CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
3112 // CHECK6-NEXT: [[CMP24:%.*]] = icmp slt i32 0, [[TMP19]]
3113 // CHECK6-NEXT: br i1 [[CMP24]], label [[SIMD_IF_THEN25:%.*]], label [[SIMD_IF_END44:%.*]]
3114 // CHECK6: simd.if.then25:
3115 // CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4
3116 // CHECK6-NEXT: store i32 [[TMP20]], i32* [[DOTOMP_IV26]], align 4
3117 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND28:%.*]]
3118 // CHECK6: omp.inner.for.cond28:
3119 // CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !5
3120 // CHECK6-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !5
3121 // CHECK6-NEXT: [[CMP29:%.*]] = icmp sle i32 [[TMP21]], [[TMP22]]
3122 // CHECK6-NEXT: br i1 [[CMP29]], label [[OMP_INNER_FOR_BODY30:%.*]], label [[OMP_INNER_FOR_END39:%.*]]
3123 // CHECK6: omp.inner.for.body30:
3124 // CHECK6-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !5
3125 // CHECK6-NEXT: [[MUL31:%.*]] = mul nsw i32 [[TMP23]], 1
3126 // CHECK6-NEXT: [[ADD32:%.*]] = add nsw i32 0, [[MUL31]]
3127 // CHECK6-NEXT: store i32 [[ADD32]], i32* [[I27]], align 4, !llvm.access.group !5
3128 // CHECK6-NEXT: [[TMP24:%.*]] = load i32*, i32** [[G_ADDR]], align 8, !llvm.access.group !5
3129 // CHECK6-NEXT: [[ARRAYIDX33:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i64 0
3130 // CHECK6-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX33]], align 4, !llvm.access.group !5
3131 // CHECK6-NEXT: [[TMP26:%.*]] = load i32, i32* [[I27]], align 4, !llvm.access.group !5
3132 // CHECK6-NEXT: [[IDXPROM34:%.*]] = sext i32 [[TMP26]] to i64
3133 // CHECK6-NEXT: [[ARRAYIDX35:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 [[IDXPROM34]]
3134 // CHECK6-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX35]], align 4, !llvm.access.group !5
3135 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE36:%.*]]
3136 // CHECK6: omp.body.continue36:
3137 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC37:%.*]]
3138 // CHECK6: omp.inner.for.inc37:
3139 // CHECK6-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !5
3140 // CHECK6-NEXT: [[ADD38:%.*]] = add nsw i32 [[TMP27]], 1
3141 // CHECK6-NEXT: store i32 [[ADD38]], i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !5
3142 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND28]], !llvm.loop [[LOOP6:![0-9]+]]
3143 // CHECK6: omp.inner.for.end39:
3144 // CHECK6-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
3145 // CHECK6-NEXT: [[SUB40:%.*]] = sub nsw i32 [[TMP28]], 0
3146 // CHECK6-NEXT: [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1
3147 // CHECK6-NEXT: [[MUL42:%.*]] = mul nsw i32 [[DIV41]], 1
3148 // CHECK6-NEXT: [[ADD43:%.*]] = add nsw i32 0, [[MUL42]]
3149 // CHECK6-NEXT: store i32 [[ADD43]], i32* [[I27]], align 4
3150 // CHECK6-NEXT: br label [[SIMD_IF_END44]]
3151 // CHECK6: simd.if.end44:
3152 // CHECK6-NEXT: [[ARRAYIDX45:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 0
3153 // CHECK6-NEXT: [[TMP29:%.*]] = load i32, i32* [[ARRAYIDX45]], align 4
3154 // CHECK6-NEXT: ret i32 [[TMP29]]
3155 //
3156 //
3157 // CHECK7-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
3158 // CHECK7-SAME: (i32* [[G:%.*]]) #[[ATTR0:[0-9]+]] {
3159 // CHECK7-NEXT: entry:
3160 // CHECK7-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
3161 // CHECK7-NEXT: [[N:%.*]] = alloca i32, align 4
3162 // CHECK7-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4
3163 // CHECK7-NEXT: [[TE:%.*]] = alloca i32, align 4
3164 // CHECK7-NEXT: [[TH:%.*]] = alloca i32, align 4
3165 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3166 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3167 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3168 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3169 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
3170 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
3171 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3172 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3173 // CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4
3174 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3175 // CHECK7-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
3176 // CHECK7-NEXT: [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
3177 // CHECK7-NEXT: [[I7:%.*]] = alloca i32, align 4
3178 // CHECK7-NEXT: [[I8:%.*]] = alloca i32, align 4
3179 // CHECK7-NEXT: [[_TMP15:%.*]] = alloca i32, align 4
3180 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_16:%.*]] = alloca i32, align 4
3181 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
3182 // CHECK7-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4
3183 // CHECK7-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4
3184 // CHECK7-NEXT: [[I23:%.*]] = alloca i32, align 4
3185 // CHECK7-NEXT: [[DOTOMP_IV26:%.*]] = alloca i32, align 4
3186 // CHECK7-NEXT: [[I27:%.*]] = alloca i32, align 4
3187 // CHECK7-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
3188 // CHECK7-NEXT: store i32 1000, i32* [[N]], align 4
3189 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
3190 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
3191 // CHECK7-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
3192 // CHECK7-NEXT: store i32 128, i32* [[TH]], align 4
3193 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
3194 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
3195 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
3196 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3197 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
3198 // CHECK7-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
3199 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3200 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
3201 // CHECK7-NEXT: [[DIV4:%.*]] = sdiv i32 [[SUB]], 1
3202 // CHECK7-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1
3203 // CHECK7-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
3204 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3205 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
3206 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
3207 // CHECK7-NEXT: store i32 0, i32* [[I6]], align 4
3208 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3209 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
3210 // CHECK7-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
3211 // CHECK7: simd.if.then:
3212 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3213 // CHECK7-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3214 // CHECK7-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 0
3215 // CHECK7-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 8) ]
3216 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4
3217 // CHECK7-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START]], align 4
3218 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[N]], align 4
3219 // CHECK7-NEXT: store i32 [[TMP9]], i32* [[DOTLINEAR_STEP]], align 4
3220 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3221 // CHECK7: omp.inner.for.cond:
3222 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3223 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3224 // CHECK7-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
3225 // CHECK7-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3226 // CHECK7: omp.inner.for.body:
3227 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3228 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
3229 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3230 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I7]], align 4
3231 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[I7]], align 4
3232 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 [[TMP13]]
3233 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
3234 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3235 // CHECK7: omp.body.continue:
3236 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3237 // CHECK7: omp.inner.for.inc:
3238 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3239 // CHECK7-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP14]], 1
3240 // CHECK7-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
3241 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3242 // CHECK7: omp.inner.for.end:
3243 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3244 // CHECK7-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP15]], 0
3245 // CHECK7-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
3246 // CHECK7-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1
3247 // CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
3248 // CHECK7-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
3249 // CHECK7-NEXT: br label [[SIMD_IF_END]]
3250 // CHECK7: simd.if.end:
3251 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[N]], align 4
3252 // CHECK7-NEXT: store i32 [[TMP16]], i32* [[DOTCAPTURE_EXPR_16]], align 4
3253 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
3254 // CHECK7-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP17]], 0
3255 // CHECK7-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
3256 // CHECK7-NEXT: [[SUB20:%.*]] = sub nsw i32 [[DIV19]], 1
3257 // CHECK7-NEXT: store i32 [[SUB20]], i32* [[DOTCAPTURE_EXPR_17]], align 4
3258 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4
3259 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4
3260 // CHECK7-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_UB22]], align 4
3261 // CHECK7-NEXT: store i32 0, i32* [[I23]], align 4
3262 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
3263 // CHECK7-NEXT: [[CMP24:%.*]] = icmp slt i32 0, [[TMP19]]
3264 // CHECK7-NEXT: br i1 [[CMP24]], label [[SIMD_IF_THEN25:%.*]], label [[SIMD_IF_END43:%.*]]
3265 // CHECK7: simd.if.then25:
3266 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4
3267 // CHECK7-NEXT: store i32 [[TMP20]], i32* [[DOTOMP_IV26]], align 4
3268 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND28:%.*]]
3269 // CHECK7: omp.inner.for.cond28:
3270 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !6
3271 // CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !6
3272 // CHECK7-NEXT: [[CMP29:%.*]] = icmp sle i32 [[TMP21]], [[TMP22]]
3273 // CHECK7-NEXT: br i1 [[CMP29]], label [[OMP_INNER_FOR_BODY30:%.*]], label [[OMP_INNER_FOR_END38:%.*]]
3274 // CHECK7: omp.inner.for.body30:
3275 // CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !6
3276 // CHECK7-NEXT: [[MUL31:%.*]] = mul nsw i32 [[TMP23]], 1
3277 // CHECK7-NEXT: [[ADD32:%.*]] = add nsw i32 0, [[MUL31]]
3278 // CHECK7-NEXT: store i32 [[ADD32]], i32* [[I27]], align 4, !llvm.access.group !6
3279 // CHECK7-NEXT: [[TMP24:%.*]] = load i32*, i32** [[G_ADDR]], align 4, !llvm.access.group !6
3280 // CHECK7-NEXT: [[ARRAYIDX33:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i32 0
3281 // CHECK7-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX33]], align 4, !llvm.access.group !6
3282 // CHECK7-NEXT: [[TMP26:%.*]] = load i32, i32* [[I27]], align 4, !llvm.access.group !6
3283 // CHECK7-NEXT: [[ARRAYIDX34:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 [[TMP26]]
3284 // CHECK7-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX34]], align 4, !llvm.access.group !6
3285 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE35:%.*]]
3286 // CHECK7: omp.body.continue35:
3287 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC36:%.*]]
3288 // CHECK7: omp.inner.for.inc36:
3289 // CHECK7-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !6
3290 // CHECK7-NEXT: [[ADD37:%.*]] = add nsw i32 [[TMP27]], 1
3291 // CHECK7-NEXT: store i32 [[ADD37]], i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !6
3292 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND28]], !llvm.loop [[LOOP7:![0-9]+]]
3293 // CHECK7: omp.inner.for.end38:
3294 // CHECK7-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
3295 // CHECK7-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP28]], 0
3296 // CHECK7-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
3297 // CHECK7-NEXT: [[MUL41:%.*]] = mul nsw i32 [[DIV40]], 1
3298 // CHECK7-NEXT: [[ADD42:%.*]] = add nsw i32 0, [[MUL41]]
3299 // CHECK7-NEXT: store i32 [[ADD42]], i32* [[I27]], align 4
3300 // CHECK7-NEXT: br label [[SIMD_IF_END43]]
3301 // CHECK7: simd.if.end43:
3302 // CHECK7-NEXT: [[ARRAYIDX44:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 0
3303 // CHECK7-NEXT: [[TMP29:%.*]] = load i32, i32* [[ARRAYIDX44]], align 4
3304 // CHECK7-NEXT: ret i32 [[TMP29]]
3305 //
3306 //
3307 // CHECK8-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
3308 // CHECK8-SAME: (i32* [[G:%.*]]) #[[ATTR0:[0-9]+]] {
3309 // CHECK8-NEXT: entry:
3310 // CHECK8-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
3311 // CHECK8-NEXT: [[N:%.*]] = alloca i32, align 4
3312 // CHECK8-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4
3313 // CHECK8-NEXT: [[TE:%.*]] = alloca i32, align 4
3314 // CHECK8-NEXT: [[TH:%.*]] = alloca i32, align 4
3315 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
3316 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3317 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3318 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
3319 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
3320 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
3321 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3322 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3323 // CHECK8-NEXT: [[I6:%.*]] = alloca i32, align 4
3324 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3325 // CHECK8-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
3326 // CHECK8-NEXT: [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
3327 // CHECK8-NEXT: [[I7:%.*]] = alloca i32, align 4
3328 // CHECK8-NEXT: [[I8:%.*]] = alloca i32, align 4
3329 // CHECK8-NEXT: [[_TMP15:%.*]] = alloca i32, align 4
3330 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_16:%.*]] = alloca i32, align 4
3331 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
3332 // CHECK8-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4
3333 // CHECK8-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4
3334 // CHECK8-NEXT: [[I23:%.*]] = alloca i32, align 4
3335 // CHECK8-NEXT: [[DOTOMP_IV26:%.*]] = alloca i32, align 4
3336 // CHECK8-NEXT: [[I27:%.*]] = alloca i32, align 4
3337 // CHECK8-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
3338 // CHECK8-NEXT: store i32 1000, i32* [[N]], align 4
3339 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
3340 // CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
3341 // CHECK8-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
3342 // CHECK8-NEXT: store i32 128, i32* [[TH]], align 4
3343 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
3344 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
3345 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
3346 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3347 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
3348 // CHECK8-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
3349 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3350 // CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
3351 // CHECK8-NEXT: [[DIV4:%.*]] = sdiv i32 [[SUB]], 1
3352 // CHECK8-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1
3353 // CHECK8-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
3354 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3355 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
3356 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
3357 // CHECK8-NEXT: store i32 0, i32* [[I6]], align 4
3358 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3359 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
3360 // CHECK8-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
3361 // CHECK8: simd.if.then:
3362 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3363 // CHECK8-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3364 // CHECK8-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 0
3365 // CHECK8-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 8) ]
3366 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4
3367 // CHECK8-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START]], align 4
3368 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[N]], align 4
3369 // CHECK8-NEXT: store i32 [[TMP9]], i32* [[DOTLINEAR_STEP]], align 4
3370 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3371 // CHECK8: omp.inner.for.cond:
3372 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3373 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3374 // CHECK8-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
3375 // CHECK8-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3376 // CHECK8: omp.inner.for.body:
3377 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3378 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
3379 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3380 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I7]], align 4
3381 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[I7]], align 4
3382 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 [[TMP13]]
3383 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
3384 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3385 // CHECK8: omp.body.continue:
3386 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3387 // CHECK8: omp.inner.for.inc:
3388 // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3389 // CHECK8-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP14]], 1
3390 // CHECK8-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
3391 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3392 // CHECK8: omp.inner.for.end:
3393 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3394 // CHECK8-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP15]], 0
3395 // CHECK8-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
3396 // CHECK8-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1
3397 // CHECK8-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
3398 // CHECK8-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
3399 // CHECK8-NEXT: br label [[SIMD_IF_END]]
3400 // CHECK8: simd.if.end:
3401 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[N]], align 4
3402 // CHECK8-NEXT: store i32 [[TMP16]], i32* [[DOTCAPTURE_EXPR_16]], align 4
3403 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
3404 // CHECK8-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP17]], 0
3405 // CHECK8-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
3406 // CHECK8-NEXT: [[SUB20:%.*]] = sub nsw i32 [[DIV19]], 1
3407 // CHECK8-NEXT: store i32 [[SUB20]], i32* [[DOTCAPTURE_EXPR_17]], align 4
3408 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4
3409 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4
3410 // CHECK8-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_UB22]], align 4
3411 // CHECK8-NEXT: store i32 0, i32* [[I23]], align 4
3412 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
3413 // CHECK8-NEXT: [[CMP24:%.*]] = icmp slt i32 0, [[TMP19]]
3414 // CHECK8-NEXT: br i1 [[CMP24]], label [[SIMD_IF_THEN25:%.*]], label [[SIMD_IF_END43:%.*]]
3415 // CHECK8: simd.if.then25:
3416 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4
3417 // CHECK8-NEXT: store i32 [[TMP20]], i32* [[DOTOMP_IV26]], align 4
3418 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND28:%.*]]
3419 // CHECK8: omp.inner.for.cond28:
3420 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !6
3421 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !6
3422 // CHECK8-NEXT: [[CMP29:%.*]] = icmp sle i32 [[TMP21]], [[TMP22]]
3423 // CHECK8-NEXT: br i1 [[CMP29]], label [[OMP_INNER_FOR_BODY30:%.*]], label [[OMP_INNER_FOR_END38:%.*]]
3424 // CHECK8: omp.inner.for.body30:
3425 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !6
3426 // CHECK8-NEXT: [[MUL31:%.*]] = mul nsw i32 [[TMP23]], 1
3427 // CHECK8-NEXT: [[ADD32:%.*]] = add nsw i32 0, [[MUL31]]
3428 // CHECK8-NEXT: store i32 [[ADD32]], i32* [[I27]], align 4, !llvm.access.group !6
3429 // CHECK8-NEXT: [[TMP24:%.*]] = load i32*, i32** [[G_ADDR]], align 4, !llvm.access.group !6
3430 // CHECK8-NEXT: [[ARRAYIDX33:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i32 0
3431 // CHECK8-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX33]], align 4, !llvm.access.group !6
3432 // CHECK8-NEXT: [[TMP26:%.*]] = load i32, i32* [[I27]], align 4, !llvm.access.group !6
3433 // CHECK8-NEXT: [[ARRAYIDX34:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 [[TMP26]]
3434 // CHECK8-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX34]], align 4, !llvm.access.group !6
3435 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE35:%.*]]
3436 // CHECK8: omp.body.continue35:
3437 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC36:%.*]]
3438 // CHECK8: omp.inner.for.inc36:
3439 // CHECK8-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !6
3440 // CHECK8-NEXT: [[ADD37:%.*]] = add nsw i32 [[TMP27]], 1
3441 // CHECK8-NEXT: store i32 [[ADD37]], i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !6
3442 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND28]], !llvm.loop [[LOOP7:![0-9]+]]
3443 // CHECK8: omp.inner.for.end38:
3444 // CHECK8-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
3445 // CHECK8-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP28]], 0
3446 // CHECK8-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
3447 // CHECK8-NEXT: [[MUL41:%.*]] = mul nsw i32 [[DIV40]], 1
3448 // CHECK8-NEXT: [[ADD42:%.*]] = add nsw i32 0, [[MUL41]]
3449 // CHECK8-NEXT: store i32 [[ADD42]], i32* [[I27]], align 4
3450 // CHECK8-NEXT: br label [[SIMD_IF_END43]]
3451 // CHECK8: simd.if.end43:
3452 // CHECK8-NEXT: [[ARRAYIDX44:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 0
3453 // CHECK8-NEXT: [[TMP29:%.*]] = load i32, i32* [[ARRAYIDX44]], align 4
3454 // CHECK8-NEXT: ret i32 [[TMP29]]
3455 //
3456 //
3457 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50
3458 // CHECK9-SAME: (i64 [[I:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]], i64 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] {
3459 // CHECK9-NEXT: entry:
3460 // CHECK9-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
3461 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3462 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
3463 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3464 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8
3465 // CHECK9-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
3466 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
3467 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4:[0-9]+]])
3468 // CHECK9-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
3469 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3470 // CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
3471 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3472 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8
3473 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
3474 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3475 // CHECK9-NEXT: [[TMP1:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
3476 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
3477 // CHECK9-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32*
3478 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV4]], align 8
3479 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV5]], align 8
3480 // CHECK9-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
3481 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
3482 // CHECK9-NEXT: [[CONV6:%.*]] = bitcast i64* [[I_CASTED]] to i32*
3483 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[CONV6]], align 4
3484 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[I_CASTED]], align 8
3485 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV3]], align 8
3486 // CHECK9-NEXT: [[CONV7:%.*]] = bitcast i64* [[N_CASTED]] to i32*
3487 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[CONV7]], align 4
3488 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[N_CASTED]], align 8
3489 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [1000 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP5]], i64 [[TMP7]], [1000 x i32]* [[TMP1]])
3490 // CHECK9-NEXT: ret void
3491 //
3492 //
3493 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
3494 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[I:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] {
3495 // CHECK9-NEXT: entry:
3496 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3497 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3498 // CHECK9-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
3499 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3500 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
3501 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3502 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3503 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3504 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
3505 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4
3506 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3507 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3508 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3509 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3510 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4
3511 // CHECK9-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
3512 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
3513 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3514 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3515 // CHECK9-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
3516 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3517 // CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
3518 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
3519 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3520 // CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
3521 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 8
3522 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
3523 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3524 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
3525 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3526 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
3527 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
3528 // CHECK9-NEXT: store i32 0, i32* [[I4]], align 4
3529 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3530 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
3531 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3532 // CHECK9: omp.precond.then:
3533 // CHECK9-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 0
3534 // CHECK9-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 8) ]
3535 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3536 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3537 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
3538 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3539 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3540 // CHECK9-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3541 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
3542 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3543 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3544 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3545 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
3546 // CHECK9-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3547 // CHECK9: cond.true:
3548 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3549 // CHECK9-NEXT: br label [[COND_END:%.*]]
3550 // CHECK9: cond.false:
3551 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3552 // CHECK9-NEXT: br label [[COND_END]]
3553 // CHECK9: cond.end:
3554 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
3555 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3556 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3557 // CHECK9-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
3558 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3559 // CHECK9: omp.inner.for.cond:
3560 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3561 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3562 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3563 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3564 // CHECK9: omp.inner.for.body:
3565 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3566 // CHECK9-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
3567 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3568 // CHECK9-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
3569 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[I5]], align 4
3570 // CHECK9-NEXT: [[CONV8:%.*]] = bitcast i64* [[I_CASTED]] to i32*
3571 // CHECK9-NEXT: store i32 [[TMP18]], i32* [[CONV8]], align 4
3572 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[I_CASTED]], align 8
3573 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 8
3574 // CHECK9-NEXT: [[CONV9:%.*]] = bitcast i64* [[N_CASTED]] to i32*
3575 // CHECK9-NEXT: store i32 [[TMP20]], i32* [[CONV9]], align 4
3576 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, i64* [[N_CASTED]], align 8
3577 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, [1000 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], i64 [[TMP21]], [1000 x i32]* [[TMP0]])
3578 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3579 // CHECK9: omp.inner.for.inc:
3580 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3581 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3582 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
3583 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3584 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
3585 // CHECK9: omp.inner.for.end:
3586 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3587 // CHECK9: omp.loop.exit:
3588 // CHECK9-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3589 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
3590 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
3591 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3592 // CHECK9-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
3593 // CHECK9-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3594 // CHECK9: .omp.final.then:
3595 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3596 // CHECK9-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP28]], 0
3597 // CHECK9-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
3598 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV11]], 1
3599 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL]]
3600 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[CONV]], align 8
3601 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
3602 // CHECK9: .omp.final.done:
3603 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
3604 // CHECK9: omp.precond.end:
3605 // CHECK9-NEXT: ret void
3606 //
3607 //
3608 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
3609 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[I:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] {
3610 // CHECK9-NEXT: entry:
3611 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3612 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3613 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3614 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3615 // CHECK9-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
3616 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3617 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
3618 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3619 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3620 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3621 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
3622 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4
3623 // CHECK9-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
3624 // CHECK9-NEXT: [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
3625 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3626 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3627 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3628 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3629 // CHECK9-NEXT: [[I7:%.*]] = alloca i32, align 4
3630 // CHECK9-NEXT: [[I8:%.*]] = alloca i32, align 4
3631 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3632 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3633 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3634 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3635 // CHECK9-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
3636 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3637 // CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
3638 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
3639 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3640 // CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
3641 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 8
3642 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
3643 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3644 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
3645 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3646 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
3647 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
3648 // CHECK9-NEXT: store i32 0, i32* [[I4]], align 4
3649 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3650 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
3651 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3652 // CHECK9: omp.precond.then:
3653 // CHECK9-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 0
3654 // CHECK9-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 8) ]
3655 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
3656 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTLINEAR_START]], align 4
3657 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV1]], align 8
3658 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTLINEAR_STEP]], align 4
3659 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3660 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3661 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
3662 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3663 // CHECK9-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP7]] to i32
3664 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3665 // CHECK9-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP8]] to i32
3666 // CHECK9-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
3667 // CHECK9-NEXT: store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
3668 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3669 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3670 // CHECK9-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3671 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
3672 // CHECK9-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]])
3673 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3674 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
3675 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP12]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3676 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3677 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3678 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]]
3679 // CHECK9-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3680 // CHECK9: cond.true:
3681 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3682 // CHECK9-NEXT: br label [[COND_END:%.*]]
3683 // CHECK9: cond.false:
3684 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3685 // CHECK9-NEXT: br label [[COND_END]]
3686 // CHECK9: cond.end:
3687 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ]
3688 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3689 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3690 // CHECK9-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
3691 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3692 // CHECK9: omp.inner.for.cond:
3693 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3694 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3695 // CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
3696 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3697 // CHECK9: omp.inner.for.body:
3698 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3699 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
3700 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3701 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I7]], align 4
3702 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[I7]], align 4
3703 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
3704 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
3705 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
3706 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3707 // CHECK9: omp.body.continue:
3708 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3709 // CHECK9: omp.inner.for.inc:
3710 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3711 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP22]], 1
3712 // CHECK9-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
3713 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
3714 // CHECK9: omp.inner.for.end:
3715 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3716 // CHECK9: omp.loop.exit:
3717 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3718 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
3719 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
3720 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3721 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
3722 // CHECK9-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3723 // CHECK9: .omp.final.then:
3724 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3725 // CHECK9-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP27]], 0
3726 // CHECK9-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
3727 // CHECK9-NEXT: [[MUL14:%.*]] = mul nsw i32 [[DIV13]], 1
3728 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]]
3729 // CHECK9-NEXT: store i32 [[ADD15]], i32* [[CONV]], align 8
3730 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
3731 // CHECK9: .omp.final.done:
3732 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3733 // CHECK9-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
3734 // CHECK9-NEXT: br i1 [[TMP29]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
3735 // CHECK9: .omp.linear.pu:
3736 // CHECK9-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
3737 // CHECK9: .omp.linear.pu.done:
3738 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
3739 // CHECK9: omp.precond.end:
3740 // CHECK9-NEXT: ret void
3741 //
3742 //
3743 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56
3744 // CHECK9-SAME: (i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR0]] {
3745 // CHECK9-NEXT: entry:
3746 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3747 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
3748 // CHECK9-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
3749 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
3750 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3751 // CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
3752 // CHECK9-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
3753 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3754 // CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
3755 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
3756 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
3757 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[CONV1]], align 4
3758 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8
3759 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[G_ADDR]], align 8
3760 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [1000 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP2]], [1000 x i32]* [[TMP0]], i32* [[TMP3]])
3761 // CHECK9-NEXT: ret void
3762 //
3763 //
3764 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
3765 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR0]] {
3766 // CHECK9-NEXT: entry:
3767 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3768 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3769 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3770 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
3771 // CHECK9-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
3772 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3773 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3774 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3775 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3776 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
3777 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3778 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3779 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3780 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3781 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
3782 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
3783 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3784 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3785 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3786 // CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
3787 // CHECK9-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
3788 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3789 // CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
3790 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
3791 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
3792 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3793 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
3794 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3795 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3796 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3797 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
3798 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3799 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
3800 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3801 // CHECK9: omp.precond.then:
3802 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3803 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3804 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
3805 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3806 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3807 // CHECK9-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3808 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
3809 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3810 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3811 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3812 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
3813 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3814 // CHECK9: cond.true:
3815 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3816 // CHECK9-NEXT: br label [[COND_END:%.*]]
3817 // CHECK9: cond.false:
3818 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3819 // CHECK9-NEXT: br label [[COND_END]]
3820 // CHECK9: cond.end:
3821 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
3822 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3823 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3824 // CHECK9-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
3825 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3826 // CHECK9: omp.inner.for.cond:
3827 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3828 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3829 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3830 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3831 // CHECK9: omp.inner.for.body:
3832 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3833 // CHECK9-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
3834 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3835 // CHECK9-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
3836 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 8
3837 // CHECK9-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
3838 // CHECK9-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4
3839 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8
3840 // CHECK9-NEXT: [[TMP20:%.*]] = load i32*, i32** [[G_ADDR]], align 8
3841 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], [1000 x i32]* [[TMP0]], i32* [[TMP20]])
3842 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3843 // CHECK9: omp.inner.for.inc:
3844 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3845 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3846 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
3847 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3848 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
3849 // CHECK9: omp.inner.for.end:
3850 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3851 // CHECK9: omp.loop.exit:
3852 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3853 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
3854 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
3855 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3856 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
3857 // CHECK9-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3858 // CHECK9: .omp.final.then:
3859 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3860 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0
3861 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
3862 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
3863 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
3864 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
3865 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
3866 // CHECK9: .omp.final.done:
3867 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
3868 // CHECK9: omp.precond.end:
3869 // CHECK9-NEXT: ret void
3870 //
3871 //
3872 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
3873 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR0]] {
3874 // CHECK9-NEXT: entry:
3875 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3876 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3877 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3878 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3879 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3880 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
3881 // CHECK9-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
3882 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3883 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3884 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3885 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3886 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
3887 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3888 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3889 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3890 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3891 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4
3892 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3893 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3894 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3895 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3896 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3897 // CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
3898 // CHECK9-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
3899 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3900 // CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
3901 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
3902 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
3903 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3904 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
3905 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3906 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3907 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3908 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
3909 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3910 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
3911 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3912 // CHECK9: omp.precond.then:
3913 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3914 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3915 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
3916 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3917 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
3918 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3919 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
3920 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
3921 // CHECK9-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
3922 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3923 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3924 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3925 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
3926 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3927 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3928 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3929 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
3930 // CHECK9-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3931 // CHECK9: cond.true:
3932 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3933 // CHECK9-NEXT: br label [[COND_END:%.*]]
3934 // CHECK9: cond.false:
3935 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3936 // CHECK9-NEXT: br label [[COND_END]]
3937 // CHECK9: cond.end:
3938 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
3939 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3940 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3941 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
3942 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3943 // CHECK9: omp.inner.for.cond:
3944 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3945 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3946 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
3947 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3948 // CHECK9: omp.inner.for.body:
3949 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3950 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
3951 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3952 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
3953 // CHECK9-NEXT: [[TMP17:%.*]] = load i32*, i32** [[G_ADDR]], align 8
3954 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i64 0
3955 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
3956 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4
3957 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
3958 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
3959 // CHECK9-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX8]], align 4
3960 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3961 // CHECK9: omp.body.continue:
3962 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3963 // CHECK9: omp.inner.for.inc:
3964 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3965 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
3966 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
3967 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
3968 // CHECK9: omp.inner.for.end:
3969 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3970 // CHECK9: omp.loop.exit:
3971 // CHECK9-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3972 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
3973 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
3974 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3975 // CHECK9-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
3976 // CHECK9-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3977 // CHECK9: .omp.final.then:
3978 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3979 // CHECK9-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP25]], 0
3980 // CHECK9-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
3981 // CHECK9-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
3982 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
3983 // CHECK9-NEXT: store i32 [[ADD13]], i32* [[I5]], align 4
3984 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
3985 // CHECK9: .omp.final.done:
3986 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
3987 // CHECK9: omp.precond.end:
3988 // CHECK9-NEXT: ret void
3989 //
3990 //
3991 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50
3992 // CHECK10-SAME: (i64 [[I:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]], i64 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] {
3993 // CHECK10-NEXT: entry:
3994 // CHECK10-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
3995 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3996 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
3997 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3998 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8
3999 // CHECK10-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
4000 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
4001 // CHECK10-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4:[0-9]+]])
4002 // CHECK10-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
4003 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
4004 // CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
4005 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4006 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8
4007 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
4008 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[N_ADDR]] to i32*
4009 // CHECK10-NEXT: [[TMP1:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
4010 // CHECK10-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
4011 // CHECK10-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32*
4012 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV4]], align 8
4013 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV5]], align 8
4014 // CHECK10-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
4015 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
4016 // CHECK10-NEXT: [[CONV6:%.*]] = bitcast i64* [[I_CASTED]] to i32*
4017 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[CONV6]], align 4
4018 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[I_CASTED]], align 8
4019 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV3]], align 8
4020 // CHECK10-NEXT: [[CONV7:%.*]] = bitcast i64* [[N_CASTED]] to i32*
4021 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[CONV7]], align 4
4022 // CHECK10-NEXT: [[TMP7:%.*]] = load i64, i64* [[N_CASTED]], align 8
4023 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [1000 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP5]], i64 [[TMP7]], [1000 x i32]* [[TMP1]])
4024 // CHECK10-NEXT: ret void
4025 //
4026 //
4027 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
4028 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[I:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] {
4029 // CHECK10-NEXT: entry:
4030 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4031 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4032 // CHECK10-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
4033 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
4034 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
4035 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4036 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
4037 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4038 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
4039 // CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4
4040 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4041 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4042 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4043 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4044 // CHECK10-NEXT: [[I5:%.*]] = alloca i32, align 4
4045 // CHECK10-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
4046 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
4047 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4048 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4049 // CHECK10-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
4050 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
4051 // CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
4052 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
4053 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
4054 // CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
4055 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 8
4056 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
4057 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4058 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
4059 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4060 // CHECK10-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
4061 // CHECK10-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
4062 // CHECK10-NEXT: store i32 0, i32* [[I4]], align 4
4063 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4064 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
4065 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4066 // CHECK10: omp.precond.then:
4067 // CHECK10-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 0
4068 // CHECK10-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 8) ]
4069 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4070 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4071 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
4072 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4073 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4074 // CHECK10-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4075 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
4076 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4077 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4078 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4079 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
4080 // CHECK10-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4081 // CHECK10: cond.true:
4082 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4083 // CHECK10-NEXT: br label [[COND_END:%.*]]
4084 // CHECK10: cond.false:
4085 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4086 // CHECK10-NEXT: br label [[COND_END]]
4087 // CHECK10: cond.end:
4088 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
4089 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4090 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4091 // CHECK10-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
4092 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4093 // CHECK10: omp.inner.for.cond:
4094 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4095 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4096 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
4097 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4098 // CHECK10: omp.inner.for.body:
4099 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4100 // CHECK10-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
4101 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4102 // CHECK10-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
4103 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[I5]], align 4
4104 // CHECK10-NEXT: [[CONV8:%.*]] = bitcast i64* [[I_CASTED]] to i32*
4105 // CHECK10-NEXT: store i32 [[TMP18]], i32* [[CONV8]], align 4
4106 // CHECK10-NEXT: [[TMP19:%.*]] = load i64, i64* [[I_CASTED]], align 8
4107 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 8
4108 // CHECK10-NEXT: [[CONV9:%.*]] = bitcast i64* [[N_CASTED]] to i32*
4109 // CHECK10-NEXT: store i32 [[TMP20]], i32* [[CONV9]], align 4
4110 // CHECK10-NEXT: [[TMP21:%.*]] = load i64, i64* [[N_CASTED]], align 8
4111 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, [1000 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], i64 [[TMP21]], [1000 x i32]* [[TMP0]])
4112 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4113 // CHECK10: omp.inner.for.inc:
4114 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4115 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4116 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
4117 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4118 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
4119 // CHECK10: omp.inner.for.end:
4120 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4121 // CHECK10: omp.loop.exit:
4122 // CHECK10-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4123 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
4124 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
4125 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4126 // CHECK10-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
4127 // CHECK10-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4128 // CHECK10: .omp.final.then:
4129 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4130 // CHECK10-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP28]], 0
4131 // CHECK10-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
4132 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV11]], 1
4133 // CHECK10-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL]]
4134 // CHECK10-NEXT: store i32 [[ADD12]], i32* [[CONV]], align 8
4135 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
4136 // CHECK10: .omp.final.done:
4137 // CHECK10-NEXT: br label [[OMP_PRECOND_END]]
4138 // CHECK10: omp.precond.end:
4139 // CHECK10-NEXT: ret void
4140 //
4141 //
4142 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
4143 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[I:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] {
4144 // CHECK10-NEXT: entry:
4145 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4146 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4147 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4148 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4149 // CHECK10-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
4150 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
4151 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
4152 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4153 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
4154 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4155 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
4156 // CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4
4157 // CHECK10-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
4158 // CHECK10-NEXT: [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
4159 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4160 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4161 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4162 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4163 // CHECK10-NEXT: [[I7:%.*]] = alloca i32, align 4
4164 // CHECK10-NEXT: [[I8:%.*]] = alloca i32, align 4
4165 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4166 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4167 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4168 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4169 // CHECK10-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
4170 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
4171 // CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
4172 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
4173 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
4174 // CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
4175 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 8
4176 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
4177 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4178 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
4179 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4180 // CHECK10-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
4181 // CHECK10-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
4182 // CHECK10-NEXT: store i32 0, i32* [[I4]], align 4
4183 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4184 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
4185 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4186 // CHECK10: omp.precond.then:
4187 // CHECK10-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 0
4188 // CHECK10-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 8) ]
4189 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
4190 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTLINEAR_START]], align 4
4191 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV1]], align 8
4192 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTLINEAR_STEP]], align 4
4193 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4194 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4195 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
4196 // CHECK10-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4197 // CHECK10-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP7]] to i32
4198 // CHECK10-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4199 // CHECK10-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP8]] to i32
4200 // CHECK10-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
4201 // CHECK10-NEXT: store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
4202 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4203 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4204 // CHECK10-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4205 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
4206 // CHECK10-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]])
4207 // CHECK10-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4208 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
4209 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP12]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4210 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4211 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4212 // CHECK10-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]]
4213 // CHECK10-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4214 // CHECK10: cond.true:
4215 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4216 // CHECK10-NEXT: br label [[COND_END:%.*]]
4217 // CHECK10: cond.false:
4218 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4219 // CHECK10-NEXT: br label [[COND_END]]
4220 // CHECK10: cond.end:
4221 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ]
4222 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4223 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4224 // CHECK10-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
4225 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4226 // CHECK10: omp.inner.for.cond:
4227 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4228 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4229 // CHECK10-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
4230 // CHECK10-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4231 // CHECK10: omp.inner.for.body:
4232 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4233 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
4234 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4235 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I7]], align 4
4236 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[I7]], align 4
4237 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
4238 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
4239 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
4240 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4241 // CHECK10: omp.body.continue:
4242 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4243 // CHECK10: omp.inner.for.inc:
4244 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4245 // CHECK10-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP22]], 1
4246 // CHECK10-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
4247 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
4248 // CHECK10: omp.inner.for.end:
4249 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4250 // CHECK10: omp.loop.exit:
4251 // CHECK10-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4252 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
4253 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
4254 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4255 // CHECK10-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
4256 // CHECK10-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4257 // CHECK10: .omp.final.then:
4258 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4259 // CHECK10-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP27]], 0
4260 // CHECK10-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
4261 // CHECK10-NEXT: [[MUL14:%.*]] = mul nsw i32 [[DIV13]], 1
4262 // CHECK10-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]]
4263 // CHECK10-NEXT: store i32 [[ADD15]], i32* [[CONV]], align 8
4264 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
4265 // CHECK10: .omp.final.done:
4266 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4267 // CHECK10-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
4268 // CHECK10-NEXT: br i1 [[TMP29]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
4269 // CHECK10: .omp.linear.pu:
4270 // CHECK10-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
4271 // CHECK10: .omp.linear.pu.done:
4272 // CHECK10-NEXT: br label [[OMP_PRECOND_END]]
4273 // CHECK10: omp.precond.end:
4274 // CHECK10-NEXT: ret void
4275 //
4276 //
4277 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56
4278 // CHECK10-SAME: (i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR0]] {
4279 // CHECK10-NEXT: entry:
4280 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
4281 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
4282 // CHECK10-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
4283 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
4284 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
4285 // CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
4286 // CHECK10-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
4287 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
4288 // CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
4289 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
4290 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
4291 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[CONV1]], align 4
4292 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8
4293 // CHECK10-NEXT: [[TMP3:%.*]] = load i32*, i32** [[G_ADDR]], align 8
4294 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [1000 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP2]], [1000 x i32]* [[TMP0]], i32* [[TMP3]])
4295 // CHECK10-NEXT: ret void
4296 //
4297 //
4298 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2
4299 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR0]] {
4300 // CHECK10-NEXT: entry:
4301 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4302 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4303 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
4304 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
4305 // CHECK10-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
4306 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4307 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
4308 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4309 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4310 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
4311 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4312 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4313 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4314 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4315 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4
4316 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
4317 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4318 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4319 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
4320 // CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
4321 // CHECK10-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
4322 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
4323 // CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
4324 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
4325 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
4326 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4327 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
4328 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4329 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4330 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4331 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4
4332 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4333 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
4334 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4335 // CHECK10: omp.precond.then:
4336 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4337 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4338 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
4339 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4340 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4341 // CHECK10-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4342 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
4343 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4344 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4345 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4346 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
4347 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4348 // CHECK10: cond.true:
4349 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4350 // CHECK10-NEXT: br label [[COND_END:%.*]]
4351 // CHECK10: cond.false:
4352 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4353 // CHECK10-NEXT: br label [[COND_END]]
4354 // CHECK10: cond.end:
4355 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
4356 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4357 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4358 // CHECK10-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
4359 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4360 // CHECK10: omp.inner.for.cond:
4361 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4362 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4363 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
4364 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4365 // CHECK10: omp.inner.for.body:
4366 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4367 // CHECK10-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
4368 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4369 // CHECK10-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
4370 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 8
4371 // CHECK10-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
4372 // CHECK10-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4
4373 // CHECK10-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8
4374 // CHECK10-NEXT: [[TMP20:%.*]] = load i32*, i32** [[G_ADDR]], align 8
4375 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], [1000 x i32]* [[TMP0]], i32* [[TMP20]])
4376 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4377 // CHECK10: omp.inner.for.inc:
4378 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4379 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4380 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
4381 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4382 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
4383 // CHECK10: omp.inner.for.end:
4384 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4385 // CHECK10: omp.loop.exit:
4386 // CHECK10-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4387 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
4388 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
4389 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4390 // CHECK10-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
4391 // CHECK10-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4392 // CHECK10: .omp.final.then:
4393 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4394 // CHECK10-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0
4395 // CHECK10-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
4396 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
4397 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
4398 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
4399 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
4400 // CHECK10: .omp.final.done:
4401 // CHECK10-NEXT: br label [[OMP_PRECOND_END]]
4402 // CHECK10: omp.precond.end:
4403 // CHECK10-NEXT: ret void
4404 //
4405 //
4406 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3
4407 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR0]] {
4408 // CHECK10-NEXT: entry:
4409 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4410 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4411 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4412 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4413 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
4414 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
4415 // CHECK10-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
4416 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4417 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
4418 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4419 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4420 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
4421 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4422 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4423 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4424 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4425 // CHECK10-NEXT: [[I5:%.*]] = alloca i32, align 4
4426 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4427 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4428 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4429 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4430 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
4431 // CHECK10-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
4432 // CHECK10-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
4433 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
4434 // CHECK10-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
4435 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
4436 // CHECK10-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
4437 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4438 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
4439 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4440 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4441 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4442 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4
4443 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4444 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
4445 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4446 // CHECK10: omp.precond.then:
4447 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4448 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4449 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
4450 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4451 // CHECK10-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
4452 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4453 // CHECK10-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
4454 // CHECK10-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
4455 // CHECK10-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
4456 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4457 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4458 // CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4459 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
4460 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4461 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4462 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4463 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
4464 // CHECK10-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4465 // CHECK10: cond.true:
4466 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4467 // CHECK10-NEXT: br label [[COND_END:%.*]]
4468 // CHECK10: cond.false:
4469 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4470 // CHECK10-NEXT: br label [[COND_END]]
4471 // CHECK10: cond.end:
4472 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
4473 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4474 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4475 // CHECK10-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
4476 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4477 // CHECK10: omp.inner.for.cond:
4478 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4479 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4480 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
4481 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4482 // CHECK10: omp.inner.for.body:
4483 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4484 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
4485 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4486 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
4487 // CHECK10-NEXT: [[TMP17:%.*]] = load i32*, i32** [[G_ADDR]], align 8
4488 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i64 0
4489 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
4490 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4
4491 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
4492 // CHECK10-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
4493 // CHECK10-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX8]], align 4
4494 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4495 // CHECK10: omp.body.continue:
4496 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4497 // CHECK10: omp.inner.for.inc:
4498 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4499 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
4500 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
4501 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
4502 // CHECK10: omp.inner.for.end:
4503 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4504 // CHECK10: omp.loop.exit:
4505 // CHECK10-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4506 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
4507 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
4508 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4509 // CHECK10-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
4510 // CHECK10-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4511 // CHECK10: .omp.final.then:
4512 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4513 // CHECK10-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP25]], 0
4514 // CHECK10-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
4515 // CHECK10-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
4516 // CHECK10-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
4517 // CHECK10-NEXT: store i32 [[ADD13]], i32* [[I5]], align 4
4518 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
4519 // CHECK10: .omp.final.done:
4520 // CHECK10-NEXT: br label [[OMP_PRECOND_END]]
4521 // CHECK10: omp.precond.end:
4522 // CHECK10-NEXT: ret void
4523 //
4524 //
4525 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50
4526 // CHECK11-SAME: (i32 [[I:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]], i32 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] {
4527 // CHECK11-NEXT: entry:
4528 // CHECK11-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
4529 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4530 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
4531 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
4532 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4
4533 // CHECK11-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
4534 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
4535 // CHECK11-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4:[0-9]+]])
4536 // CHECK11-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
4537 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4538 // CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
4539 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4540 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
4541 // CHECK11-NEXT: [[TMP1:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
4542 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4543 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
4544 // CHECK11-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
4545 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[I_ADDR]], align 4
4546 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[I_CASTED]], align 4
4547 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[I_CASTED]], align 4
4548 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
4549 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[N_CASTED]], align 4
4550 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[N_CASTED]], align 4
4551 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [1000 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP5]], i32 [[TMP7]], [1000 x i32]* [[TMP1]])
4552 // CHECK11-NEXT: ret void
4553 //
4554 //
4555 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
4556 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[I:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] {
4557 // CHECK11-NEXT: entry:
4558 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4559 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4560 // CHECK11-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
4561 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4562 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
4563 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4564 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4565 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4566 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4567 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
4568 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4569 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4570 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4571 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4572 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4
4573 // CHECK11-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
4574 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
4575 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4576 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4577 // CHECK11-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
4578 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4579 // CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
4580 // CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
4581 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
4582 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
4583 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4584 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
4585 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4586 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4587 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4588 // CHECK11-NEXT: store i32 0, i32* [[I3]], align 4
4589 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4590 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
4591 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4592 // CHECK11: omp.precond.then:
4593 // CHECK11-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 0
4594 // CHECK11-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 8) ]
4595 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4596 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4597 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
4598 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4599 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4600 // CHECK11-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4601 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
4602 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4603 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4604 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4605 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
4606 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4607 // CHECK11: cond.true:
4608 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4609 // CHECK11-NEXT: br label [[COND_END:%.*]]
4610 // CHECK11: cond.false:
4611 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4612 // CHECK11-NEXT: br label [[COND_END]]
4613 // CHECK11: cond.end:
4614 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
4615 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4616 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4617 // CHECK11-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
4618 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4619 // CHECK11: omp.inner.for.cond:
4620 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4621 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4622 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
4623 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4624 // CHECK11: omp.inner.for.body:
4625 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4626 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4627 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I4]], align 4
4628 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[I_CASTED]], align 4
4629 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[I_CASTED]], align 4
4630 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
4631 // CHECK11-NEXT: store i32 [[TMP18]], i32* [[N_CASTED]], align 4
4632 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
4633 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, [1000 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], i32 [[TMP19]], [1000 x i32]* [[TMP0]])
4634 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4635 // CHECK11: omp.inner.for.inc:
4636 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4637 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4638 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
4639 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4640 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
4641 // CHECK11: omp.inner.for.end:
4642 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4643 // CHECK11: omp.loop.exit:
4644 // CHECK11-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4645 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
4646 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
4647 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4648 // CHECK11-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
4649 // CHECK11-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4650 // CHECK11: .omp.final.then:
4651 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4652 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP26]], 0
4653 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
4654 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
4655 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
4656 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[I_ADDR]], align 4
4657 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
4658 // CHECK11: .omp.final.done:
4659 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
4660 // CHECK11: omp.precond.end:
4661 // CHECK11-NEXT: ret void
4662 //
4663 //
4664 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
4665 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[I:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] {
4666 // CHECK11-NEXT: entry:
4667 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4668 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4669 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4670 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4671 // CHECK11-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
4672 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4673 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
4674 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4675 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4676 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4677 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4678 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
4679 // CHECK11-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
4680 // CHECK11-NEXT: [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
4681 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4682 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4683 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4684 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4685 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4
4686 // CHECK11-NEXT: [[I5:%.*]] = alloca i32, align 4
4687 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4688 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4689 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4690 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4691 // CHECK11-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
4692 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4693 // CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
4694 // CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
4695 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
4696 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
4697 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4698 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
4699 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4700 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4701 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4702 // CHECK11-NEXT: store i32 0, i32* [[I3]], align 4
4703 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4704 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
4705 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4706 // CHECK11: omp.precond.then:
4707 // CHECK11-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 0
4708 // CHECK11-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 8) ]
4709 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[I_ADDR]], align 4
4710 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTLINEAR_START]], align 4
4711 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4
4712 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTLINEAR_STEP]], align 4
4713 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4714 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4715 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
4716 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4717 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4718 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
4719 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
4720 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4721 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4722 // CHECK11-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4723 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
4724 // CHECK11-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]])
4725 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4726 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
4727 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP12]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4728 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4729 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4730 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]]
4731 // CHECK11-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4732 // CHECK11: cond.true:
4733 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4734 // CHECK11-NEXT: br label [[COND_END:%.*]]
4735 // CHECK11: cond.false:
4736 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4737 // CHECK11-NEXT: br label [[COND_END]]
4738 // CHECK11: cond.end:
4739 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ]
4740 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4741 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4742 // CHECK11-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
4743 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4744 // CHECK11: omp.inner.for.cond:
4745 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4746 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4747 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
4748 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4749 // CHECK11: omp.inner.for.body:
4750 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4751 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
4752 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4753 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
4754 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4
4755 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP21]]
4756 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
4757 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4758 // CHECK11: omp.body.continue:
4759 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4760 // CHECK11: omp.inner.for.inc:
4761 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4762 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1
4763 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
4764 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
4765 // CHECK11: omp.inner.for.end:
4766 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4767 // CHECK11: omp.loop.exit:
4768 // CHECK11-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4769 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
4770 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
4771 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4772 // CHECK11-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
4773 // CHECK11-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4774 // CHECK11: .omp.final.then:
4775 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4776 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP27]], 0
4777 // CHECK11-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
4778 // CHECK11-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
4779 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
4780 // CHECK11-NEXT: store i32 [[ADD12]], i32* [[I_ADDR]], align 4
4781 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
4782 // CHECK11: .omp.final.done:
4783 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4784 // CHECK11-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
4785 // CHECK11-NEXT: br i1 [[TMP29]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
4786 // CHECK11: .omp.linear.pu:
4787 // CHECK11-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
4788 // CHECK11: .omp.linear.pu.done:
4789 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
4790 // CHECK11: omp.precond.end:
4791 // CHECK11-NEXT: ret void
4792 //
4793 //
4794 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56
4795 // CHECK11-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR0]] {
4796 // CHECK11-NEXT: entry:
4797 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4798 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
4799 // CHECK11-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
4800 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
4801 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4802 // CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
4803 // CHECK11-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
4804 // CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
4805 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
4806 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4
4807 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4
4808 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[G_ADDR]], align 4
4809 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [1000 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP2]], [1000 x i32]* [[TMP0]], i32* [[TMP3]])
4810 // CHECK11-NEXT: ret void
4811 //
4812 //
4813 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2
4814 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR0]] {
4815 // CHECK11-NEXT: entry:
4816 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4817 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4818 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4819 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
4820 // CHECK11-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
4821 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4822 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4823 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4824 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4825 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
4826 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4827 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4828 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4829 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4830 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
4831 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
4832 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4833 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4834 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4835 // CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
4836 // CHECK11-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
4837 // CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
4838 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
4839 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
4840 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4841 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
4842 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4843 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4844 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4845 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
4846 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4847 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
4848 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4849 // CHECK11: omp.precond.then:
4850 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4851 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4852 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
4853 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4854 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4855 // CHECK11-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4856 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
4857 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4858 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4859 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4860 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
4861 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4862 // CHECK11: cond.true:
4863 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4864 // CHECK11-NEXT: br label [[COND_END:%.*]]
4865 // CHECK11: cond.false:
4866 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4867 // CHECK11-NEXT: br label [[COND_END]]
4868 // CHECK11: cond.end:
4869 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
4870 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4871 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4872 // CHECK11-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
4873 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4874 // CHECK11: omp.inner.for.cond:
4875 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4876 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4877 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
4878 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4879 // CHECK11: omp.inner.for.body:
4880 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4881 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4882 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
4883 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
4884 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
4885 // CHECK11-NEXT: [[TMP18:%.*]] = load i32*, i32** [[G_ADDR]], align 4
4886 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], [1000 x i32]* [[TMP0]], i32* [[TMP18]])
4887 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4888 // CHECK11: omp.inner.for.inc:
4889 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4890 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4891 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
4892 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4893 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
4894 // CHECK11: omp.inner.for.end:
4895 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4896 // CHECK11: omp.loop.exit:
4897 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4898 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
4899 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
4900 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4901 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
4902 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4903 // CHECK11: .omp.final.then:
4904 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4905 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0
4906 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
4907 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
4908 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
4909 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
4910 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
4911 // CHECK11: .omp.final.done:
4912 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
4913 // CHECK11: omp.precond.end:
4914 // CHECK11-NEXT: ret void
4915 //
4916 //
4917 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3
4918 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR0]] {
4919 // CHECK11-NEXT: entry:
4920 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4921 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4922 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4923 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4924 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4925 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
4926 // CHECK11-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
4927 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4928 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4929 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4930 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4931 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
4932 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4933 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4934 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4935 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4936 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
4937 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4938 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4939 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4940 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4941 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4942 // CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
4943 // CHECK11-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
4944 // CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
4945 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
4946 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
4947 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4948 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
4949 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4950 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4951 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4952 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
4953 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4954 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
4955 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4956 // CHECK11: omp.precond.then:
4957 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4958 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4959 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
4960 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4961 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4962 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
4963 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
4964 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4965 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4966 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4967 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
4968 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4969 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4970 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4971 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
4972 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4973 // CHECK11: cond.true:
4974 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4975 // CHECK11-NEXT: br label [[COND_END:%.*]]
4976 // CHECK11: cond.false:
4977 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4978 // CHECK11-NEXT: br label [[COND_END]]
4979 // CHECK11: cond.end:
4980 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
4981 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4982 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4983 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
4984 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4985 // CHECK11: omp.inner.for.cond:
4986 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4987 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4988 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
4989 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4990 // CHECK11: omp.inner.for.body:
4991 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4992 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
4993 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4994 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
4995 // CHECK11-NEXT: [[TMP17:%.*]] = load i32*, i32** [[G_ADDR]], align 4
4996 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i32 0
4997 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
4998 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
4999 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
5000 // CHECK11-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX6]], align 4
5001 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5002 // CHECK11: omp.body.continue:
5003 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5004 // CHECK11: omp.inner.for.inc:
5005 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5006 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
5007 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
5008 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
5009 // CHECK11: omp.inner.for.end:
5010 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5011 // CHECK11: omp.loop.exit:
5012 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5013 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
5014 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
5015 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5016 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
5017 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5018 // CHECK11: .omp.final.then:
5019 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5020 // CHECK11-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0
5021 // CHECK11-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
5022 // CHECK11-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
5023 // CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
5024 // CHECK11-NEXT: store i32 [[ADD11]], i32* [[I3]], align 4
5025 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
5026 // CHECK11: .omp.final.done:
5027 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
5028 // CHECK11: omp.precond.end:
5029 // CHECK11-NEXT: ret void
5030 //
5031 //
5032 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50
5033 // CHECK12-SAME: (i32 [[I:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]], i32 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] {
5034 // CHECK12-NEXT: entry:
5035 // CHECK12-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
5036 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
5037 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
5038 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
5039 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4
5040 // CHECK12-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
5041 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
5042 // CHECK12-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4:[0-9]+]])
5043 // CHECK12-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
5044 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
5045 // CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
5046 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5047 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
5048 // CHECK12-NEXT: [[TMP1:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
5049 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
5050 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
5051 // CHECK12-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
5052 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[I_ADDR]], align 4
5053 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[I_CASTED]], align 4
5054 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[I_CASTED]], align 4
5055 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
5056 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[N_CASTED]], align 4
5057 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[N_CASTED]], align 4
5058 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [1000 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP5]], i32 [[TMP7]], [1000 x i32]* [[TMP1]])
5059 // CHECK12-NEXT: ret void
5060 //
5061 //
5062 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined.
5063 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[I:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] {
5064 // CHECK12-NEXT: entry:
5065 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5066 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5067 // CHECK12-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
5068 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
5069 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
5070 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5071 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
5072 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5073 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5074 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4
5075 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5076 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5077 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5078 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5079 // CHECK12-NEXT: [[I4:%.*]] = alloca i32, align 4
5080 // CHECK12-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
5081 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
5082 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5083 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5084 // CHECK12-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
5085 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
5086 // CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
5087 // CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
5088 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
5089 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
5090 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5091 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
5092 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5093 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5094 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5095 // CHECK12-NEXT: store i32 0, i32* [[I3]], align 4
5096 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5097 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
5098 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5099 // CHECK12: omp.precond.then:
5100 // CHECK12-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 0
5101 // CHECK12-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 8) ]
5102 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5103 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5104 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
5105 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5106 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5107 // CHECK12-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5108 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
5109 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5110 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5111 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5112 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
5113 // CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5114 // CHECK12: cond.true:
5115 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5116 // CHECK12-NEXT: br label [[COND_END:%.*]]
5117 // CHECK12: cond.false:
5118 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5119 // CHECK12-NEXT: br label [[COND_END]]
5120 // CHECK12: cond.end:
5121 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
5122 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5123 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5124 // CHECK12-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
5125 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5126 // CHECK12: omp.inner.for.cond:
5127 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5128 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5129 // CHECK12-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
5130 // CHECK12-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5131 // CHECK12: omp.inner.for.body:
5132 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5133 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5134 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[I4]], align 4
5135 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[I_CASTED]], align 4
5136 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[I_CASTED]], align 4
5137 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
5138 // CHECK12-NEXT: store i32 [[TMP18]], i32* [[N_CASTED]], align 4
5139 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
5140 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, [1000 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], i32 [[TMP19]], [1000 x i32]* [[TMP0]])
5141 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5142 // CHECK12: omp.inner.for.inc:
5143 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5144 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5145 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
5146 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5147 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
5148 // CHECK12: omp.inner.for.end:
5149 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5150 // CHECK12: omp.loop.exit:
5151 // CHECK12-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5152 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
5153 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
5154 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5155 // CHECK12-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
5156 // CHECK12-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5157 // CHECK12: .omp.final.then:
5158 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5159 // CHECK12-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP26]], 0
5160 // CHECK12-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
5161 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
5162 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
5163 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[I_ADDR]], align 4
5164 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
5165 // CHECK12: .omp.final.done:
5166 // CHECK12-NEXT: br label [[OMP_PRECOND_END]]
5167 // CHECK12: omp.precond.end:
5168 // CHECK12-NEXT: ret void
5169 //
5170 //
5171 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1
5172 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[I:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] {
5173 // CHECK12-NEXT: entry:
5174 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5175 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5176 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
5177 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
5178 // CHECK12-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
5179 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
5180 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
5181 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5182 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
5183 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5184 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5185 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4
5186 // CHECK12-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
5187 // CHECK12-NEXT: [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
5188 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5189 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5190 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5191 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5192 // CHECK12-NEXT: [[I4:%.*]] = alloca i32, align 4
5193 // CHECK12-NEXT: [[I5:%.*]] = alloca i32, align 4
5194 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5195 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5196 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5197 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5198 // CHECK12-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
5199 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
5200 // CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
5201 // CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
5202 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
5203 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
5204 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5205 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
5206 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5207 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5208 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5209 // CHECK12-NEXT: store i32 0, i32* [[I3]], align 4
5210 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5211 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
5212 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5213 // CHECK12: omp.precond.then:
5214 // CHECK12-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 0
5215 // CHECK12-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 8) ]
5216 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[I_ADDR]], align 4
5217 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTLINEAR_START]], align 4
5218 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4
5219 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTLINEAR_STEP]], align 4
5220 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5221 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5222 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
5223 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5224 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5225 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
5226 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
5227 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5228 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5229 // CHECK12-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5230 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
5231 // CHECK12-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]])
5232 // CHECK12-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5233 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
5234 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP12]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5235 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5236 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5237 // CHECK12-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]]
5238 // CHECK12-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5239 // CHECK12: cond.true:
5240 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5241 // CHECK12-NEXT: br label [[COND_END:%.*]]
5242 // CHECK12: cond.false:
5243 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5244 // CHECK12-NEXT: br label [[COND_END]]
5245 // CHECK12: cond.end:
5246 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ]
5247 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5248 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5249 // CHECK12-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
5250 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5251 // CHECK12: omp.inner.for.cond:
5252 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5253 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5254 // CHECK12-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
5255 // CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5256 // CHECK12: omp.inner.for.body:
5257 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5258 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
5259 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5260 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
5261 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4
5262 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP21]]
5263 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
5264 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5265 // CHECK12: omp.body.continue:
5266 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5267 // CHECK12: omp.inner.for.inc:
5268 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5269 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1
5270 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
5271 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
5272 // CHECK12: omp.inner.for.end:
5273 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5274 // CHECK12: omp.loop.exit:
5275 // CHECK12-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5276 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
5277 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
5278 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5279 // CHECK12-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
5280 // CHECK12-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5281 // CHECK12: .omp.final.then:
5282 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5283 // CHECK12-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP27]], 0
5284 // CHECK12-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
5285 // CHECK12-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
5286 // CHECK12-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
5287 // CHECK12-NEXT: store i32 [[ADD12]], i32* [[I_ADDR]], align 4
5288 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
5289 // CHECK12: .omp.final.done:
5290 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5291 // CHECK12-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
5292 // CHECK12-NEXT: br i1 [[TMP29]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
5293 // CHECK12: .omp.linear.pu:
5294 // CHECK12-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
5295 // CHECK12: .omp.linear.pu.done:
5296 // CHECK12-NEXT: br label [[OMP_PRECOND_END]]
5297 // CHECK12: omp.precond.end:
5298 // CHECK12-NEXT: ret void
5299 //
5300 //
5301 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56
5302 // CHECK12-SAME: (i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR0]] {
5303 // CHECK12-NEXT: entry:
5304 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
5305 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
5306 // CHECK12-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
5307 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
5308 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
5309 // CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
5310 // CHECK12-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
5311 // CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
5312 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
5313 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4
5314 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4
5315 // CHECK12-NEXT: [[TMP3:%.*]] = load i32*, i32** [[G_ADDR]], align 4
5316 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [1000 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP2]], [1000 x i32]* [[TMP0]], i32* [[TMP3]])
5317 // CHECK12-NEXT: ret void
5318 //
5319 //
5320 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2
5321 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR0]] {
5322 // CHECK12-NEXT: entry:
5323 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5324 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5325 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
5326 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
5327 // CHECK12-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
5328 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5329 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
5330 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5331 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5332 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
5333 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5334 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5335 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5336 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5337 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4
5338 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
5339 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5340 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5341 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
5342 // CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
5343 // CHECK12-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
5344 // CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
5345 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
5346 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
5347 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5348 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
5349 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5350 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5351 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5352 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4
5353 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5354 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
5355 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5356 // CHECK12: omp.precond.then:
5357 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5358 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5359 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
5360 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5361 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5362 // CHECK12-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5363 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
5364 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5365 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5366 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5367 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
5368 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5369 // CHECK12: cond.true:
5370 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5371 // CHECK12-NEXT: br label [[COND_END:%.*]]
5372 // CHECK12: cond.false:
5373 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5374 // CHECK12-NEXT: br label [[COND_END]]
5375 // CHECK12: cond.end:
5376 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
5377 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5378 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5379 // CHECK12-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
5380 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5381 // CHECK12: omp.inner.for.cond:
5382 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5383 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5384 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
5385 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5386 // CHECK12: omp.inner.for.body:
5387 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5388 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5389 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
5390 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
5391 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
5392 // CHECK12-NEXT: [[TMP18:%.*]] = load i32*, i32** [[G_ADDR]], align 4
5393 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], [1000 x i32]* [[TMP0]], i32* [[TMP18]])
5394 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5395 // CHECK12: omp.inner.for.inc:
5396 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5397 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5398 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
5399 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5400 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
5401 // CHECK12: omp.inner.for.end:
5402 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5403 // CHECK12: omp.loop.exit:
5404 // CHECK12-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5405 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
5406 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
5407 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5408 // CHECK12-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
5409 // CHECK12-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5410 // CHECK12: .omp.final.then:
5411 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5412 // CHECK12-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0
5413 // CHECK12-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
5414 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
5415 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
5416 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
5417 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
5418 // CHECK12: .omp.final.done:
5419 // CHECK12-NEXT: br label [[OMP_PRECOND_END]]
5420 // CHECK12: omp.precond.end:
5421 // CHECK12-NEXT: ret void
5422 //
5423 //
5424 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3
5425 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], [1000 x i32]* nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* [[G:%.*]]) #[[ATTR0]] {
5426 // CHECK12-NEXT: entry:
5427 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5428 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5429 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
5430 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
5431 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
5432 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
5433 // CHECK12-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
5434 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5435 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
5436 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5437 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5438 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
5439 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5440 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5441 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5442 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5443 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4
5444 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5445 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5446 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5447 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5448 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
5449 // CHECK12-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
5450 // CHECK12-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
5451 // CHECK12-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
5452 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
5453 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
5454 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5455 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
5456 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5457 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5458 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5459 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4
5460 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5461 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
5462 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5463 // CHECK12: omp.precond.then:
5464 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5465 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5466 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
5467 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5468 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5469 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
5470 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
5471 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5472 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5473 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5474 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
5475 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5476 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5477 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5478 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
5479 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5480 // CHECK12: cond.true:
5481 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5482 // CHECK12-NEXT: br label [[COND_END:%.*]]
5483 // CHECK12: cond.false:
5484 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5485 // CHECK12-NEXT: br label [[COND_END]]
5486 // CHECK12: cond.end:
5487 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
5488 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5489 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5490 // CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
5491 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5492 // CHECK12: omp.inner.for.cond:
5493 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5494 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5495 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
5496 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5497 // CHECK12: omp.inner.for.body:
5498 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5499 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
5500 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5501 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
5502 // CHECK12-NEXT: [[TMP17:%.*]] = load i32*, i32** [[G_ADDR]], align 4
5503 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i32 0
5504 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
5505 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
5506 // CHECK12-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
5507 // CHECK12-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX6]], align 4
5508 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5509 // CHECK12: omp.body.continue:
5510 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5511 // CHECK12: omp.inner.for.inc:
5512 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5513 // CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
5514 // CHECK12-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
5515 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
5516 // CHECK12: omp.inner.for.end:
5517 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5518 // CHECK12: omp.loop.exit:
5519 // CHECK12-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5520 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
5521 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
5522 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5523 // CHECK12-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
5524 // CHECK12-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5525 // CHECK12: .omp.final.then:
5526 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5527 // CHECK12-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0
5528 // CHECK12-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
5529 // CHECK12-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
5530 // CHECK12-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
5531 // CHECK12-NEXT: store i32 [[ADD11]], i32* [[I3]], align 4
5532 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
5533 // CHECK12: .omp.final.done:
5534 // CHECK12-NEXT: br label [[OMP_PRECOND_END]]
5535 // CHECK12: omp.precond.end:
5536 // CHECK12-NEXT: ret void
5537 //
5538 //
5539 // CHECK13-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
5540 // CHECK13-SAME: (i32* [[G:%.*]]) #[[ATTR0:[0-9]+]] {
5541 // CHECK13-NEXT: entry:
5542 // CHECK13-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
5543 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4
5544 // CHECK13-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4
5545 // CHECK13-NEXT: [[TE:%.*]] = alloca i32, align 4
5546 // CHECK13-NEXT: [[TH:%.*]] = alloca i32, align 4
5547 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5548 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5549 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5550 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5551 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5552 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
5553 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5554 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5555 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4
5556 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5557 // CHECK13-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
5558 // CHECK13-NEXT: [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
5559 // CHECK13-NEXT: [[I7:%.*]] = alloca i32, align 4
5560 // CHECK13-NEXT: [[I8:%.*]] = alloca i32, align 4
5561 // CHECK13-NEXT: [[_TMP15:%.*]] = alloca i32, align 4
5562 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_16:%.*]] = alloca i32, align 4
5563 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
5564 // CHECK13-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4
5565 // CHECK13-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4
5566 // CHECK13-NEXT: [[I23:%.*]] = alloca i32, align 4
5567 // CHECK13-NEXT: [[DOTOMP_IV26:%.*]] = alloca i32, align 4
5568 // CHECK13-NEXT: [[I27:%.*]] = alloca i32, align 4
5569 // CHECK13-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
5570 // CHECK13-NEXT: store i32 1000, i32* [[N]], align 4
5571 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
5572 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
5573 // CHECK13-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
5574 // CHECK13-NEXT: store i32 128, i32* [[TH]], align 4
5575 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
5576 // CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
5577 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
5578 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5579 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
5580 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
5581 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5582 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
5583 // CHECK13-NEXT: [[DIV4:%.*]] = sdiv i32 [[SUB]], 1
5584 // CHECK13-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1
5585 // CHECK13-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
5586 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5587 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5588 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
5589 // CHECK13-NEXT: store i32 0, i32* [[I6]], align 4
5590 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5591 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
5592 // CHECK13-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
5593 // CHECK13: simd.if.then:
5594 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5595 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
5596 // CHECK13-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 0
5597 // CHECK13-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 8) ]
5598 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4
5599 // CHECK13-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START]], align 4
5600 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[N]], align 4
5601 // CHECK13-NEXT: store i32 [[TMP9]], i32* [[DOTLINEAR_STEP]], align 4
5602 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5603 // CHECK13: omp.inner.for.cond:
5604 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5605 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5606 // CHECK13-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
5607 // CHECK13-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5608 // CHECK13: omp.inner.for.body:
5609 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5610 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
5611 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5612 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I7]], align 4
5613 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[I7]], align 4
5614 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
5615 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
5616 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
5617 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5618 // CHECK13: omp.body.continue:
5619 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5620 // CHECK13: omp.inner.for.inc:
5621 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5622 // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP14]], 1
5623 // CHECK13-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
5624 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
5625 // CHECK13: omp.inner.for.end:
5626 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5627 // CHECK13-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP15]], 0
5628 // CHECK13-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
5629 // CHECK13-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1
5630 // CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
5631 // CHECK13-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
5632 // CHECK13-NEXT: br label [[SIMD_IF_END]]
5633 // CHECK13: simd.if.end:
5634 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[N]], align 4
5635 // CHECK13-NEXT: store i32 [[TMP16]], i32* [[DOTCAPTURE_EXPR_16]], align 4
5636 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
5637 // CHECK13-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP17]], 0
5638 // CHECK13-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
5639 // CHECK13-NEXT: [[SUB20:%.*]] = sub nsw i32 [[DIV19]], 1
5640 // CHECK13-NEXT: store i32 [[SUB20]], i32* [[DOTCAPTURE_EXPR_17]], align 4
5641 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4
5642 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4
5643 // CHECK13-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_UB22]], align 4
5644 // CHECK13-NEXT: store i32 0, i32* [[I23]], align 4
5645 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
5646 // CHECK13-NEXT: [[CMP24:%.*]] = icmp slt i32 0, [[TMP19]]
5647 // CHECK13-NEXT: br i1 [[CMP24]], label [[SIMD_IF_THEN25:%.*]], label [[SIMD_IF_END44:%.*]]
5648 // CHECK13: simd.if.then25:
5649 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4
5650 // CHECK13-NEXT: store i32 [[TMP20]], i32* [[DOTOMP_IV26]], align 4
5651 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND28:%.*]]
5652 // CHECK13: omp.inner.for.cond28:
5653 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !5
5654 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !5
5655 // CHECK13-NEXT: [[CMP29:%.*]] = icmp sle i32 [[TMP21]], [[TMP22]]
5656 // CHECK13-NEXT: br i1 [[CMP29]], label [[OMP_INNER_FOR_BODY30:%.*]], label [[OMP_INNER_FOR_END39:%.*]]
5657 // CHECK13: omp.inner.for.body30:
5658 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !5
5659 // CHECK13-NEXT: [[MUL31:%.*]] = mul nsw i32 [[TMP23]], 1
5660 // CHECK13-NEXT: [[ADD32:%.*]] = add nsw i32 0, [[MUL31]]
5661 // CHECK13-NEXT: store i32 [[ADD32]], i32* [[I27]], align 4, !llvm.access.group !5
5662 // CHECK13-NEXT: [[TMP24:%.*]] = load i32*, i32** [[G_ADDR]], align 8, !llvm.access.group !5
5663 // CHECK13-NEXT: [[ARRAYIDX33:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i64 0
5664 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX33]], align 4, !llvm.access.group !5
5665 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[I27]], align 4, !llvm.access.group !5
5666 // CHECK13-NEXT: [[IDXPROM34:%.*]] = sext i32 [[TMP26]] to i64
5667 // CHECK13-NEXT: [[ARRAYIDX35:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 [[IDXPROM34]]
5668 // CHECK13-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX35]], align 4, !llvm.access.group !5
5669 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE36:%.*]]
5670 // CHECK13: omp.body.continue36:
5671 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC37:%.*]]
5672 // CHECK13: omp.inner.for.inc37:
5673 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !5
5674 // CHECK13-NEXT: [[ADD38:%.*]] = add nsw i32 [[TMP27]], 1
5675 // CHECK13-NEXT: store i32 [[ADD38]], i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !5
5676 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND28]], !llvm.loop [[LOOP6:![0-9]+]]
5677 // CHECK13: omp.inner.for.end39:
5678 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
5679 // CHECK13-NEXT: [[SUB40:%.*]] = sub nsw i32 [[TMP28]], 0
5680 // CHECK13-NEXT: [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1
5681 // CHECK13-NEXT: [[MUL42:%.*]] = mul nsw i32 [[DIV41]], 1
5682 // CHECK13-NEXT: [[ADD43:%.*]] = add nsw i32 0, [[MUL42]]
5683 // CHECK13-NEXT: store i32 [[ADD43]], i32* [[I27]], align 4
5684 // CHECK13-NEXT: br label [[SIMD_IF_END44]]
5685 // CHECK13: simd.if.end44:
5686 // CHECK13-NEXT: [[ARRAYIDX45:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 0
5687 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, i32* [[ARRAYIDX45]], align 4
5688 // CHECK13-NEXT: ret i32 [[TMP29]]
5689 //
5690 //
5691 // CHECK14-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
5692 // CHECK14-SAME: (i32* [[G:%.*]]) #[[ATTR0:[0-9]+]] {
5693 // CHECK14-NEXT: entry:
5694 // CHECK14-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
5695 // CHECK14-NEXT: [[N:%.*]] = alloca i32, align 4
5696 // CHECK14-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4
5697 // CHECK14-NEXT: [[TE:%.*]] = alloca i32, align 4
5698 // CHECK14-NEXT: [[TH:%.*]] = alloca i32, align 4
5699 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
5700 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5701 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5702 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
5703 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5704 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
5705 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5706 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5707 // CHECK14-NEXT: [[I6:%.*]] = alloca i32, align 4
5708 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5709 // CHECK14-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
5710 // CHECK14-NEXT: [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
5711 // CHECK14-NEXT: [[I7:%.*]] = alloca i32, align 4
5712 // CHECK14-NEXT: [[I8:%.*]] = alloca i32, align 4
5713 // CHECK14-NEXT: [[_TMP15:%.*]] = alloca i32, align 4
5714 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_16:%.*]] = alloca i32, align 4
5715 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
5716 // CHECK14-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4
5717 // CHECK14-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4
5718 // CHECK14-NEXT: [[I23:%.*]] = alloca i32, align 4
5719 // CHECK14-NEXT: [[DOTOMP_IV26:%.*]] = alloca i32, align 4
5720 // CHECK14-NEXT: [[I27:%.*]] = alloca i32, align 4
5721 // CHECK14-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
5722 // CHECK14-NEXT: store i32 1000, i32* [[N]], align 4
5723 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
5724 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
5725 // CHECK14-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
5726 // CHECK14-NEXT: store i32 128, i32* [[TH]], align 4
5727 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
5728 // CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
5729 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
5730 // CHECK14-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5731 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
5732 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
5733 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5734 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
5735 // CHECK14-NEXT: [[DIV4:%.*]] = sdiv i32 [[SUB]], 1
5736 // CHECK14-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1
5737 // CHECK14-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
5738 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5739 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5740 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
5741 // CHECK14-NEXT: store i32 0, i32* [[I6]], align 4
5742 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5743 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
5744 // CHECK14-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
5745 // CHECK14: simd.if.then:
5746 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5747 // CHECK14-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
5748 // CHECK14-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 0
5749 // CHECK14-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 8) ]
5750 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4
5751 // CHECK14-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START]], align 4
5752 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[N]], align 4
5753 // CHECK14-NEXT: store i32 [[TMP9]], i32* [[DOTLINEAR_STEP]], align 4
5754 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5755 // CHECK14: omp.inner.for.cond:
5756 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5757 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5758 // CHECK14-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
5759 // CHECK14-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5760 // CHECK14: omp.inner.for.body:
5761 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5762 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
5763 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5764 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I7]], align 4
5765 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[I7]], align 4
5766 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
5767 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
5768 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
5769 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5770 // CHECK14: omp.body.continue:
5771 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5772 // CHECK14: omp.inner.for.inc:
5773 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5774 // CHECK14-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP14]], 1
5775 // CHECK14-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
5776 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
5777 // CHECK14: omp.inner.for.end:
5778 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5779 // CHECK14-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP15]], 0
5780 // CHECK14-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
5781 // CHECK14-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1
5782 // CHECK14-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
5783 // CHECK14-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
5784 // CHECK14-NEXT: br label [[SIMD_IF_END]]
5785 // CHECK14: simd.if.end:
5786 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[N]], align 4
5787 // CHECK14-NEXT: store i32 [[TMP16]], i32* [[DOTCAPTURE_EXPR_16]], align 4
5788 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
5789 // CHECK14-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP17]], 0
5790 // CHECK14-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
5791 // CHECK14-NEXT: [[SUB20:%.*]] = sub nsw i32 [[DIV19]], 1
5792 // CHECK14-NEXT: store i32 [[SUB20]], i32* [[DOTCAPTURE_EXPR_17]], align 4
5793 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4
5794 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4
5795 // CHECK14-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_UB22]], align 4
5796 // CHECK14-NEXT: store i32 0, i32* [[I23]], align 4
5797 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
5798 // CHECK14-NEXT: [[CMP24:%.*]] = icmp slt i32 0, [[TMP19]]
5799 // CHECK14-NEXT: br i1 [[CMP24]], label [[SIMD_IF_THEN25:%.*]], label [[SIMD_IF_END44:%.*]]
5800 // CHECK14: simd.if.then25:
5801 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4
5802 // CHECK14-NEXT: store i32 [[TMP20]], i32* [[DOTOMP_IV26]], align 4
5803 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND28:%.*]]
5804 // CHECK14: omp.inner.for.cond28:
5805 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !5
5806 // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !5
5807 // CHECK14-NEXT: [[CMP29:%.*]] = icmp sle i32 [[TMP21]], [[TMP22]]
5808 // CHECK14-NEXT: br i1 [[CMP29]], label [[OMP_INNER_FOR_BODY30:%.*]], label [[OMP_INNER_FOR_END39:%.*]]
5809 // CHECK14: omp.inner.for.body30:
5810 // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !5
5811 // CHECK14-NEXT: [[MUL31:%.*]] = mul nsw i32 [[TMP23]], 1
5812 // CHECK14-NEXT: [[ADD32:%.*]] = add nsw i32 0, [[MUL31]]
5813 // CHECK14-NEXT: store i32 [[ADD32]], i32* [[I27]], align 4, !llvm.access.group !5
5814 // CHECK14-NEXT: [[TMP24:%.*]] = load i32*, i32** [[G_ADDR]], align 8, !llvm.access.group !5
5815 // CHECK14-NEXT: [[ARRAYIDX33:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i64 0
5816 // CHECK14-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX33]], align 4, !llvm.access.group !5
5817 // CHECK14-NEXT: [[TMP26:%.*]] = load i32, i32* [[I27]], align 4, !llvm.access.group !5
5818 // CHECK14-NEXT: [[IDXPROM34:%.*]] = sext i32 [[TMP26]] to i64
5819 // CHECK14-NEXT: [[ARRAYIDX35:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 [[IDXPROM34]]
5820 // CHECK14-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX35]], align 4, !llvm.access.group !5
5821 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE36:%.*]]
5822 // CHECK14: omp.body.continue36:
5823 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC37:%.*]]
5824 // CHECK14: omp.inner.for.inc37:
5825 // CHECK14-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !5
5826 // CHECK14-NEXT: [[ADD38:%.*]] = add nsw i32 [[TMP27]], 1
5827 // CHECK14-NEXT: store i32 [[ADD38]], i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !5
5828 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND28]], !llvm.loop [[LOOP6:![0-9]+]]
5829 // CHECK14: omp.inner.for.end39:
5830 // CHECK14-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
5831 // CHECK14-NEXT: [[SUB40:%.*]] = sub nsw i32 [[TMP28]], 0
5832 // CHECK14-NEXT: [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1
5833 // CHECK14-NEXT: [[MUL42:%.*]] = mul nsw i32 [[DIV41]], 1
5834 // CHECK14-NEXT: [[ADD43:%.*]] = add nsw i32 0, [[MUL42]]
5835 // CHECK14-NEXT: store i32 [[ADD43]], i32* [[I27]], align 4
5836 // CHECK14-NEXT: br label [[SIMD_IF_END44]]
5837 // CHECK14: simd.if.end44:
5838 // CHECK14-NEXT: [[ARRAYIDX45:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 0
5839 // CHECK14-NEXT: [[TMP29:%.*]] = load i32, i32* [[ARRAYIDX45]], align 4
5840 // CHECK14-NEXT: ret i32 [[TMP29]]
5841 //
5842 //
5843 // CHECK15-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
5844 // CHECK15-SAME: (i32* [[G:%.*]]) #[[ATTR0:[0-9]+]] {
5845 // CHECK15-NEXT: entry:
5846 // CHECK15-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
5847 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4
5848 // CHECK15-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4
5849 // CHECK15-NEXT: [[TE:%.*]] = alloca i32, align 4
5850 // CHECK15-NEXT: [[TH:%.*]] = alloca i32, align 4
5851 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
5852 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5853 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5854 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
5855 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5856 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
5857 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5858 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5859 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4
5860 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5861 // CHECK15-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
5862 // CHECK15-NEXT: [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
5863 // CHECK15-NEXT: [[I7:%.*]] = alloca i32, align 4
5864 // CHECK15-NEXT: [[I8:%.*]] = alloca i32, align 4
5865 // CHECK15-NEXT: [[_TMP15:%.*]] = alloca i32, align 4
5866 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_16:%.*]] = alloca i32, align 4
5867 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
5868 // CHECK15-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4
5869 // CHECK15-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4
5870 // CHECK15-NEXT: [[I23:%.*]] = alloca i32, align 4
5871 // CHECK15-NEXT: [[DOTOMP_IV26:%.*]] = alloca i32, align 4
5872 // CHECK15-NEXT: [[I27:%.*]] = alloca i32, align 4
5873 // CHECK15-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
5874 // CHECK15-NEXT: store i32 1000, i32* [[N]], align 4
5875 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
5876 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
5877 // CHECK15-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
5878 // CHECK15-NEXT: store i32 128, i32* [[TH]], align 4
5879 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
5880 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
5881 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
5882 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5883 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
5884 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
5885 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5886 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
5887 // CHECK15-NEXT: [[DIV4:%.*]] = sdiv i32 [[SUB]], 1
5888 // CHECK15-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1
5889 // CHECK15-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
5890 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5891 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5892 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
5893 // CHECK15-NEXT: store i32 0, i32* [[I6]], align 4
5894 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5895 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
5896 // CHECK15-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
5897 // CHECK15: simd.if.then:
5898 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5899 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
5900 // CHECK15-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 0
5901 // CHECK15-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 8) ]
5902 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4
5903 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START]], align 4
5904 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[N]], align 4
5905 // CHECK15-NEXT: store i32 [[TMP9]], i32* [[DOTLINEAR_STEP]], align 4
5906 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5907 // CHECK15: omp.inner.for.cond:
5908 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5909 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5910 // CHECK15-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
5911 // CHECK15-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5912 // CHECK15: omp.inner.for.body:
5913 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5914 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
5915 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5916 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I7]], align 4
5917 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[I7]], align 4
5918 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 [[TMP13]]
5919 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
5920 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5921 // CHECK15: omp.body.continue:
5922 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5923 // CHECK15: omp.inner.for.inc:
5924 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5925 // CHECK15-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP14]], 1
5926 // CHECK15-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
5927 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
5928 // CHECK15: omp.inner.for.end:
5929 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5930 // CHECK15-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP15]], 0
5931 // CHECK15-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
5932 // CHECK15-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1
5933 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
5934 // CHECK15-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
5935 // CHECK15-NEXT: br label [[SIMD_IF_END]]
5936 // CHECK15: simd.if.end:
5937 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[N]], align 4
5938 // CHECK15-NEXT: store i32 [[TMP16]], i32* [[DOTCAPTURE_EXPR_16]], align 4
5939 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
5940 // CHECK15-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP17]], 0
5941 // CHECK15-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
5942 // CHECK15-NEXT: [[SUB20:%.*]] = sub nsw i32 [[DIV19]], 1
5943 // CHECK15-NEXT: store i32 [[SUB20]], i32* [[DOTCAPTURE_EXPR_17]], align 4
5944 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4
5945 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4
5946 // CHECK15-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_UB22]], align 4
5947 // CHECK15-NEXT: store i32 0, i32* [[I23]], align 4
5948 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
5949 // CHECK15-NEXT: [[CMP24:%.*]] = icmp slt i32 0, [[TMP19]]
5950 // CHECK15-NEXT: br i1 [[CMP24]], label [[SIMD_IF_THEN25:%.*]], label [[SIMD_IF_END43:%.*]]
5951 // CHECK15: simd.if.then25:
5952 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4
5953 // CHECK15-NEXT: store i32 [[TMP20]], i32* [[DOTOMP_IV26]], align 4
5954 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND28:%.*]]
5955 // CHECK15: omp.inner.for.cond28:
5956 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !6
5957 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !6
5958 // CHECK15-NEXT: [[CMP29:%.*]] = icmp sle i32 [[TMP21]], [[TMP22]]
5959 // CHECK15-NEXT: br i1 [[CMP29]], label [[OMP_INNER_FOR_BODY30:%.*]], label [[OMP_INNER_FOR_END38:%.*]]
5960 // CHECK15: omp.inner.for.body30:
5961 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !6
5962 // CHECK15-NEXT: [[MUL31:%.*]] = mul nsw i32 [[TMP23]], 1
5963 // CHECK15-NEXT: [[ADD32:%.*]] = add nsw i32 0, [[MUL31]]
5964 // CHECK15-NEXT: store i32 [[ADD32]], i32* [[I27]], align 4, !llvm.access.group !6
5965 // CHECK15-NEXT: [[TMP24:%.*]] = load i32*, i32** [[G_ADDR]], align 4, !llvm.access.group !6
5966 // CHECK15-NEXT: [[ARRAYIDX33:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i32 0
5967 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX33]], align 4, !llvm.access.group !6
5968 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[I27]], align 4, !llvm.access.group !6
5969 // CHECK15-NEXT: [[ARRAYIDX34:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 [[TMP26]]
5970 // CHECK15-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX34]], align 4, !llvm.access.group !6
5971 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE35:%.*]]
5972 // CHECK15: omp.body.continue35:
5973 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC36:%.*]]
5974 // CHECK15: omp.inner.for.inc36:
5975 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !6
5976 // CHECK15-NEXT: [[ADD37:%.*]] = add nsw i32 [[TMP27]], 1
5977 // CHECK15-NEXT: store i32 [[ADD37]], i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !6
5978 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND28]], !llvm.loop [[LOOP7:![0-9]+]]
5979 // CHECK15: omp.inner.for.end38:
5980 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
5981 // CHECK15-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP28]], 0
5982 // CHECK15-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
5983 // CHECK15-NEXT: [[MUL41:%.*]] = mul nsw i32 [[DIV40]], 1
5984 // CHECK15-NEXT: [[ADD42:%.*]] = add nsw i32 0, [[MUL41]]
5985 // CHECK15-NEXT: store i32 [[ADD42]], i32* [[I27]], align 4
5986 // CHECK15-NEXT: br label [[SIMD_IF_END43]]
5987 // CHECK15: simd.if.end43:
5988 // CHECK15-NEXT: [[ARRAYIDX44:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 0
5989 // CHECK15-NEXT: [[TMP29:%.*]] = load i32, i32* [[ARRAYIDX44]], align 4
5990 // CHECK15-NEXT: ret i32 [[TMP29]]
5991 //
5992 //
5993 // CHECK16-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
5994 // CHECK16-SAME: (i32* [[G:%.*]]) #[[ATTR0:[0-9]+]] {
5995 // CHECK16-NEXT: entry:
5996 // CHECK16-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
5997 // CHECK16-NEXT: [[N:%.*]] = alloca i32, align 4
5998 // CHECK16-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4
5999 // CHECK16-NEXT: [[TE:%.*]] = alloca i32, align 4
6000 // CHECK16-NEXT: [[TH:%.*]] = alloca i32, align 4
6001 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
6002 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6003 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
6004 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
6005 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
6006 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
6007 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6008 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6009 // CHECK16-NEXT: [[I6:%.*]] = alloca i32, align 4
6010 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6011 // CHECK16-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
6012 // CHECK16-NEXT: [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
6013 // CHECK16-NEXT: [[I7:%.*]] = alloca i32, align 4
6014 // CHECK16-NEXT: [[I8:%.*]] = alloca i32, align 4
6015 // CHECK16-NEXT: [[_TMP15:%.*]] = alloca i32, align 4
6016 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_16:%.*]] = alloca i32, align 4
6017 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
6018 // CHECK16-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4
6019 // CHECK16-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4
6020 // CHECK16-NEXT: [[I23:%.*]] = alloca i32, align 4
6021 // CHECK16-NEXT: [[DOTOMP_IV26:%.*]] = alloca i32, align 4
6022 // CHECK16-NEXT: [[I27:%.*]] = alloca i32, align 4
6023 // CHECK16-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
6024 // CHECK16-NEXT: store i32 1000, i32* [[N]], align 4
6025 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
6026 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
6027 // CHECK16-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
6028 // CHECK16-NEXT: store i32 128, i32* [[TH]], align 4
6029 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
6030 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
6031 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
6032 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
6033 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
6034 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
6035 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
6036 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
6037 // CHECK16-NEXT: [[DIV4:%.*]] = sdiv i32 [[SUB]], 1
6038 // CHECK16-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1
6039 // CHECK16-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
6040 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6041 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
6042 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
6043 // CHECK16-NEXT: store i32 0, i32* [[I6]], align 4
6044 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
6045 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
6046 // CHECK16-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
6047 // CHECK16: simd.if.then:
6048 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6049 // CHECK16-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6050 // CHECK16-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 0
6051 // CHECK16-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 8) ]
6052 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4
6053 // CHECK16-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START]], align 4
6054 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[N]], align 4
6055 // CHECK16-NEXT: store i32 [[TMP9]], i32* [[DOTLINEAR_STEP]], align 4
6056 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6057 // CHECK16: omp.inner.for.cond:
6058 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6059 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6060 // CHECK16-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
6061 // CHECK16-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6062 // CHECK16: omp.inner.for.body:
6063 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6064 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
6065 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6066 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I7]], align 4
6067 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[I7]], align 4
6068 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 [[TMP13]]
6069 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
6070 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6071 // CHECK16: omp.body.continue:
6072 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6073 // CHECK16: omp.inner.for.inc:
6074 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6075 // CHECK16-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP14]], 1
6076 // CHECK16-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
6077 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
6078 // CHECK16: omp.inner.for.end:
6079 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
6080 // CHECK16-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP15]], 0
6081 // CHECK16-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
6082 // CHECK16-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1
6083 // CHECK16-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
6084 // CHECK16-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
6085 // CHECK16-NEXT: br label [[SIMD_IF_END]]
6086 // CHECK16: simd.if.end:
6087 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[N]], align 4
6088 // CHECK16-NEXT: store i32 [[TMP16]], i32* [[DOTCAPTURE_EXPR_16]], align 4
6089 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
6090 // CHECK16-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP17]], 0
6091 // CHECK16-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
6092 // CHECK16-NEXT: [[SUB20:%.*]] = sub nsw i32 [[DIV19]], 1
6093 // CHECK16-NEXT: store i32 [[SUB20]], i32* [[DOTCAPTURE_EXPR_17]], align 4
6094 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4
6095 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4
6096 // CHECK16-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_UB22]], align 4
6097 // CHECK16-NEXT: store i32 0, i32* [[I23]], align 4
6098 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
6099 // CHECK16-NEXT: [[CMP24:%.*]] = icmp slt i32 0, [[TMP19]]
6100 // CHECK16-NEXT: br i1 [[CMP24]], label [[SIMD_IF_THEN25:%.*]], label [[SIMD_IF_END43:%.*]]
6101 // CHECK16: simd.if.then25:
6102 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4
6103 // CHECK16-NEXT: store i32 [[TMP20]], i32* [[DOTOMP_IV26]], align 4
6104 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND28:%.*]]
6105 // CHECK16: omp.inner.for.cond28:
6106 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !6
6107 // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !6
6108 // CHECK16-NEXT: [[CMP29:%.*]] = icmp sle i32 [[TMP21]], [[TMP22]]
6109 // CHECK16-NEXT: br i1 [[CMP29]], label [[OMP_INNER_FOR_BODY30:%.*]], label [[OMP_INNER_FOR_END38:%.*]]
6110 // CHECK16: omp.inner.for.body30:
6111 // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !6
6112 // CHECK16-NEXT: [[MUL31:%.*]] = mul nsw i32 [[TMP23]], 1
6113 // CHECK16-NEXT: [[ADD32:%.*]] = add nsw i32 0, [[MUL31]]
6114 // CHECK16-NEXT: store i32 [[ADD32]], i32* [[I27]], align 4, !llvm.access.group !6
6115 // CHECK16-NEXT: [[TMP24:%.*]] = load i32*, i32** [[G_ADDR]], align 4, !llvm.access.group !6
6116 // CHECK16-NEXT: [[ARRAYIDX33:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i32 0
6117 // CHECK16-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX33]], align 4, !llvm.access.group !6
6118 // CHECK16-NEXT: [[TMP26:%.*]] = load i32, i32* [[I27]], align 4, !llvm.access.group !6
6119 // CHECK16-NEXT: [[ARRAYIDX34:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 [[TMP26]]
6120 // CHECK16-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX34]], align 4, !llvm.access.group !6
6121 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE35:%.*]]
6122 // CHECK16: omp.body.continue35:
6123 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC36:%.*]]
6124 // CHECK16: omp.inner.for.inc36:
6125 // CHECK16-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !6
6126 // CHECK16-NEXT: [[ADD37:%.*]] = add nsw i32 [[TMP27]], 1
6127 // CHECK16-NEXT: store i32 [[ADD37]], i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !6
6128 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND28]], !llvm.loop [[LOOP7:![0-9]+]]
6129 // CHECK16: omp.inner.for.end38:
6130 // CHECK16-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
6131 // CHECK16-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP28]], 0
6132 // CHECK16-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
6133 // CHECK16-NEXT: [[MUL41:%.*]] = mul nsw i32 [[DIV40]], 1
6134 // CHECK16-NEXT: [[ADD42:%.*]] = add nsw i32 0, [[MUL41]]
6135 // CHECK16-NEXT: store i32 [[ADD42]], i32* [[I27]], align 4
6136 // CHECK16-NEXT: br label [[SIMD_IF_END43]]
6137 // CHECK16: simd.if.end43:
6138 // CHECK16-NEXT: [[ARRAYIDX44:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 0
6139 // CHECK16-NEXT: [[TMP29:%.*]] = load i32, i32* [[ARRAYIDX44]], align 4
6140 // CHECK16-NEXT: ret i32 [[TMP29]]
6141 //
6142