1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
5 // Test host codegen.
6 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
7 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
9 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
10 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
12
13 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
14 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6
16 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
17 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8
19 #ifdef CK1
20
21 int a[100];
22
teams_argument_global(int n)23 int teams_argument_global(int n) {
24 int i;
25 int te = n / 128;
26 int th = 128;
27 // discard n_addr and i
28
29
30 #pragma omp target
31 #pragma omp teams distribute simd num_teams(te), thread_limit(th) aligned(a) simdlen(16) linear(i)
32 for(i = 0; i < n; i++) {
33 a[i] = 0;
34 }
35
36 #pragma omp target
37 {{{
38 #pragma omp teams distribute simd safelen(32)
39 for(int i = 0; i < n; i++) {
40 a[i] = 0;
41 }
42 }}}
43
44 // outlined target regions
45
46
47
48
49 return a[0];
50 }
51
52
53 #endif // CK1
54
55 // Test host codegen.
56 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
57 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
58 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10
59 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
60 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
61 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12
62
63 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
64 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
65 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14
66 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
67 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
68 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16
69 #ifdef CK2
70
teams_local_arg(void)71 int teams_local_arg(void) {
72 int n = 100;
73 int a[n];
74
75 #pragma omp target
76 #pragma omp teams distribute simd
77 for(int i = 0; i < n; i++) {
78 a[i] = 0;
79 }
80
81 // outlined target region
82
83
84 return a[0];
85 }
86 #endif // CK2
87
88 // Test host codegen.
89 // RUN: %clang_cc1 -DCK3 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17
90 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
91 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK18
92 // RUN: %clang_cc1 -DCK3 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19
93 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
94 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK20
95 // RUN: %clang_cc1 -DCK3 -verify -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -triple powerpc64le-unknown-unknown -fopenmp -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK21
96 // RUN: %clang_cc1 -DCK3 -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
97 // RUN: %clang_cc1 -DCK3 -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -triple powerpc64le-unknown-unknown -fopenmp -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK22
98 // RUN: %clang_cc1 -DCK3 -verify -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -triple i386-unknown-unknown -fopenmp -fopenmp-version=50 -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK23
99 // RUN: %clang_cc1 -DCK3 -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp -fopenmp-version=50 -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
100 // RUN: %clang_cc1 -DCK3 -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -triple i386-unknown-unknown -fopenmp -fopenmp-version=50 -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK24
101
102 // RUN: %clang_cc1 -DCK3 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK25
103 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
104 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK26
105 // RUN: %clang_cc1 -DCK3 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK27
106 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
107 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK28
108 // RUN: %clang_cc1 -DCK3 -verify -fopenmp-simd -fopenmp-version=50 -DOMP5 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK29
109 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -fopenmp-version=50 -DOMP5 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
110 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -fopenmp-version=50 -DOMP5 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK30
111 // RUN: %clang_cc1 -DCK3 -verify -fopenmp-simd -fopenmp-version=50 -DOMP5 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK31
112 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -fopenmp-version=50 -DOMP5 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
113 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -fopenmp-version=50 -DOMP5 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK32
114 #ifdef CK3
115
116
117 template <typename T, int X, long long Y>
118 struct SS{
119 T a[X];
120 float b;
fooSS121 int foo(void) {
122
123 #pragma omp target
124 #ifdef OMP5
125 #pragma omp teams distribute simd if(b) nontemporal(a, b)
126 #else
127 #pragma omp teams distribute simd
128 #endif // OMP5
129 for(int i = 0; i < X; i++) {
130 a[i] = (T)b;
131 }
132
133 // outlined target region
134
135
136 return a[0];
137 }
138 };
139
teams_template_struct(void)140 int teams_template_struct(void) {
141 SS<int, 123, 456> V;
142 return V.foo();
143
144 }
145 #endif // CK3
146
147 // Test host codegen.
148 // RUN: %clang_cc1 -DCK4 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK33
149 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
150 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK34
151 // RUN: %clang_cc1 -DCK4 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK35
152 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
153 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK36
154 // RUN: %clang_cc1 -DCK4 -verify -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -triple powerpc64le-unknown-unknown -fopenmp -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK37
155 // RUN: %clang_cc1 -DCK4 -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
156 // RUN: %clang_cc1 -DCK4 -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -triple powerpc64le-unknown-unknown -fopenmp -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK38
157 // RUN: %clang_cc1 -DCK4 -verify -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -triple i386-unknown-unknown -fopenmp -fopenmp-version=50 -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK39
158 // RUN: %clang_cc1 -DCK4 -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp -fopenmp-version=50 -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
159 // RUN: %clang_cc1 -DCK4 -fopenmp -fopenmp-version=50 -DOMP5 -x c++ -triple i386-unknown-unknown -fopenmp -fopenmp-version=50 -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK40
160
161 // RUN: %clang_cc1 -DCK4 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK41
162 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
163 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK42
164 // RUN: %clang_cc1 -DCK4 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK43
165 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
166 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK44
167 // RUN: %clang_cc1 -DCK4 -verify -fopenmp-simd -fopenmp-version=50 -DOMP5 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK45
168 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -fopenmp-version=50 -DOMP5 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
169 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -fopenmp-version=50 -DOMP5 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK46
170 // RUN: %clang_cc1 -DCK4 -verify -fopenmp-simd -fopenmp-version=50 -DOMP5 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK47
171 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -fopenmp-version=50 -DOMP5 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
172 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -fopenmp-version=50 -DOMP5 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK48
173
174 #ifdef CK4
175
176 template <typename T, int n>
tmain(T argc)177 int tmain(T argc) {
178 T a[n];
179 int te = n/128;
180 int th = 128;
181 #pragma omp target
182 #pragma omp teams distribute simd num_teams(te) thread_limit(th)
183 for(int i = 0; i < n; i++) {
184 a[i] = (T)0;
185 }
186 return 0;
187 }
188
main(int argc,char ** argv)189 int main (int argc, char **argv) {
190 int n = 100;
191 int a[n];
192 #pragma omp target
193 #ifdef OMP5
194 #pragma omp teams distribute simd if(simd:argc)
195 #else
196 #pragma omp teams distribute simd
197 #endif // OMP5
198 for(int i = 0; i < n; i++) {
199 a[i] = 0;
200 }
201 return tmain<int, 10>(argc);
202 }
203
204
205
206
207
208
209
210 // OMP5_50-DAG: !{!"llvm.loop.vectorize.enable", i1 false}
211 #endif // CK4
212 #endif
213
214 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_argument_globali
215 // CHECK1-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
216 // CHECK1-NEXT: entry:
217 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
218 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
219 // CHECK1-NEXT: [[TE:%.*]] = alloca i32, align 4
220 // CHECK1-NEXT: [[TH:%.*]] = alloca i32, align 4
221 // CHECK1-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8
222 // CHECK1-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8
223 // CHECK1-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
224 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
225 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
226 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
227 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
228 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
229 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
230 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
231 // CHECK1-NEXT: [[N_CASTED7:%.*]] = alloca i64, align 8
232 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS9:%.*]] = alloca [2 x i8*], align 8
233 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS10:%.*]] = alloca [2 x i8*], align 8
234 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS11:%.*]] = alloca [2 x i8*], align 8
235 // CHECK1-NEXT: [[_TMP12:%.*]] = alloca i32, align 4
236 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4
237 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 4
238 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
239 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
240 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
241 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
242 // CHECK1-NEXT: store i32 128, i32* [[TH]], align 4
243 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
244 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32*
245 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4
246 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[TE_CASTED]], align 8
247 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4
248 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32*
249 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4
250 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[TH_CASTED]], align 8
251 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4
252 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[I_CASTED]] to i32*
253 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV2]], align 4
254 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[I_CASTED]], align 8
255 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[N_ADDR]], align 4
256 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[N_CASTED]] to i32*
257 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[CONV3]], align 4
258 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[N_CASTED]], align 8
259 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
260 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
261 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP10]], align 8
262 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
263 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
264 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP12]], align 8
265 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
266 // CHECK1-NEXT: store i8* null, i8** [[TMP13]], align 8
267 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
268 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
269 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP15]], align 8
270 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
271 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
272 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP17]], align 8
273 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
274 // CHECK1-NEXT: store i8* null, i8** [[TMP18]], align 8
275 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
276 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [100 x i32]**
277 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP20]], align 8
278 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
279 // CHECK1-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [100 x i32]**
280 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP22]], align 8
281 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
282 // CHECK1-NEXT: store i8* null, i8** [[TMP23]], align 8
283 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
284 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
285 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP25]], align 8
286 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
287 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
288 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP27]], align 8
289 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
290 // CHECK1-NEXT: store i8* null, i8** [[TMP28]], align 8
291 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
292 // CHECK1-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64*
293 // CHECK1-NEXT: store i64 [[TMP8]], i64* [[TMP30]], align 8
294 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
295 // CHECK1-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64*
296 // CHECK1-NEXT: store i64 [[TMP8]], i64* [[TMP32]], align 8
297 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
298 // CHECK1-NEXT: store i8* null, i8** [[TMP33]], align 8
299 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
300 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
301 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[TE]], align 4
302 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4
303 // CHECK1-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_]], align 4
304 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
305 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP38]], 0
306 // CHECK1-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB]], 1
307 // CHECK1-NEXT: [[SUB6:%.*]] = sub nsw i32 [[DIV5]], 1
308 // CHECK1-NEXT: store i32 [[SUB6]], i32* [[DOTCAPTURE_EXPR_4]], align 4
309 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
310 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP39]], 1
311 // CHECK1-NEXT: [[TMP40:%.*]] = zext i32 [[ADD]] to i64
312 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP40]])
313 // CHECK1-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l30.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP36]], i32 1)
314 // CHECK1-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
315 // CHECK1-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
316 // CHECK1: omp_offload.failed:
317 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l30(i64 [[TMP2]], i64 [[TMP4]], [100 x i32]* @a, i64 [[TMP6]], i64 [[TMP8]]) #[[ATTR3:[0-9]+]]
318 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
319 // CHECK1: omp_offload.cont:
320 // CHECK1-NEXT: [[TMP43:%.*]] = load i32, i32* [[N_ADDR]], align 4
321 // CHECK1-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED7]] to i32*
322 // CHECK1-NEXT: store i32 [[TMP43]], i32* [[CONV8]], align 4
323 // CHECK1-NEXT: [[TMP44:%.*]] = load i64, i64* [[N_CASTED7]], align 8
324 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0
325 // CHECK1-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
326 // CHECK1-NEXT: store i64 [[TMP44]], i64* [[TMP46]], align 8
327 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0
328 // CHECK1-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
329 // CHECK1-NEXT: store i64 [[TMP44]], i64* [[TMP48]], align 8
330 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 0
331 // CHECK1-NEXT: store i8* null, i8** [[TMP49]], align 8
332 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 1
333 // CHECK1-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [100 x i32]**
334 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP51]], align 8
335 // CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 1
336 // CHECK1-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [100 x i32]**
337 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP53]], align 8
338 // CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 1
339 // CHECK1-NEXT: store i8* null, i8** [[TMP54]], align 8
340 // CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0
341 // CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0
342 // CHECK1-NEXT: [[TMP57:%.*]] = load i32, i32* [[N_ADDR]], align 4
343 // CHECK1-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_13]], align 4
344 // CHECK1-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4
345 // CHECK1-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP58]], 0
346 // CHECK1-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
347 // CHECK1-NEXT: [[SUB17:%.*]] = sub nsw i32 [[DIV16]], 1
348 // CHECK1-NEXT: store i32 [[SUB17]], i32* [[DOTCAPTURE_EXPR_14]], align 4
349 // CHECK1-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4
350 // CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP59]], 1
351 // CHECK1-NEXT: [[TMP60:%.*]] = zext i32 [[ADD18]] to i64
352 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP60]])
353 // CHECK1-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
354 // CHECK1-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
355 // CHECK1-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED19:%.*]], label [[OMP_OFFLOAD_CONT20:%.*]]
356 // CHECK1: omp_offload.failed19:
357 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36(i64 [[TMP44]], [100 x i32]* @a) #[[ATTR3]]
358 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT20]]
359 // CHECK1: omp_offload.cont20:
360 // CHECK1-NEXT: [[TMP63:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4
361 // CHECK1-NEXT: ret i32 [[TMP63]]
362 //
363 //
364 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l30
365 // CHECK1-SAME: (i64 [[TE:%.*]], i64 [[TH:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]], i64 [[I:%.*]], i64 [[N:%.*]]) #[[ATTR1:[0-9]+]] {
366 // CHECK1-NEXT: entry:
367 // CHECK1-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8
368 // CHECK1-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8
369 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8
370 // CHECK1-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
371 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
372 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
373 // CHECK1-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8
374 // CHECK1-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8
375 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8
376 // CHECK1-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
377 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
378 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32*
379 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32*
380 // CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8
381 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[I_ADDR]] to i32*
382 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[N_ADDR]] to i32*
383 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
384 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8
385 // CHECK1-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
386 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV2]], i32* [[CONV3]], [100 x i32]* [[TMP1]])
387 // CHECK1-NEXT: ret void
388 //
389 //
390 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
391 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
392 // CHECK1-NEXT: entry:
393 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
394 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
395 // CHECK1-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8
396 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
397 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8
398 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
399 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
400 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
401 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
402 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4
403 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
404 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
405 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
406 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
407 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4
408 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
409 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
410 // CHECK1-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8
411 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
412 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8
413 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8
414 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8
415 // CHECK1-NEXT: [[TMP2:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8
416 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4
417 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
418 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
419 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
420 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
421 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
422 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
423 // CHECK1-NEXT: store i32 0, i32* [[I3]], align 4
424 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
425 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
426 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
427 // CHECK1: omp.precond.then:
428 // CHECK1-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i64 0, i64 0
429 // CHECK1-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ]
430 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
431 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
432 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
433 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
434 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
435 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
436 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
437 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
438 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
439 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
440 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
441 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
442 // CHECK1: cond.true:
443 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
444 // CHECK1-NEXT: br label [[COND_END:%.*]]
445 // CHECK1: cond.false:
446 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
447 // CHECK1-NEXT: br label [[COND_END]]
448 // CHECK1: cond.end:
449 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
450 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
451 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
452 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
453 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
454 // CHECK1: omp.inner.for.cond:
455 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
456 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5
457 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
458 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
459 // CHECK1: omp.inner.for.body:
460 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
461 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
462 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
463 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !5
464 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !5
465 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
466 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i64 0, i64 [[IDXPROM]]
467 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !5
468 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
469 // CHECK1: omp.body.continue:
470 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
471 // CHECK1: omp.inner.for.inc:
472 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
473 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP18]], 1
474 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
475 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
476 // CHECK1: omp.inner.for.end:
477 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
478 // CHECK1: omp.loop.exit:
479 // CHECK1-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
480 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
481 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
482 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
483 // CHECK1-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
484 // CHECK1-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
485 // CHECK1: .omp.final.then:
486 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
487 // CHECK1-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP23]], 0
488 // CHECK1-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
489 // CHECK1-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
490 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
491 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[TMP0]], align 4
492 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
493 // CHECK1: .omp.final.done:
494 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
495 // CHECK1: omp.precond.end:
496 // CHECK1-NEXT: ret void
497 //
498 //
499 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36
500 // CHECK1-SAME: (i64 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
501 // CHECK1-NEXT: entry:
502 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
503 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8
504 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
505 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8
506 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
507 // CHECK1-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8
508 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], [100 x i32]* [[TMP0]])
509 // CHECK1-NEXT: ret void
510 //
511 //
512 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
513 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
514 // CHECK1-NEXT: entry:
515 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
516 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
517 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
518 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8
519 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
520 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
521 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
522 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
523 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
524 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
525 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
526 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
527 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
528 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4
529 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
530 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
531 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
532 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8
533 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
534 // CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8
535 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4
536 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
537 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
538 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
539 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
540 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
541 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
542 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4
543 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
544 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
545 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
546 // CHECK1: omp.precond.then:
547 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
548 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
549 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
550 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
551 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
552 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
553 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
554 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
555 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
556 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
557 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
558 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
559 // CHECK1: cond.true:
560 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
561 // CHECK1-NEXT: br label [[COND_END:%.*]]
562 // CHECK1: cond.false:
563 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
564 // CHECK1-NEXT: br label [[COND_END]]
565 // CHECK1: cond.end:
566 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
567 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
568 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
569 // CHECK1-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
570 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
571 // CHECK1: omp.inner.for.cond:
572 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
573 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
574 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
575 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
576 // CHECK1: omp.inner.for.body:
577 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
578 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
579 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
580 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
581 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
582 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
583 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]]
584 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
585 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
586 // CHECK1: omp.body.continue:
587 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
588 // CHECK1: omp.inner.for.inc:
589 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
590 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
591 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
592 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
593 // CHECK1: omp.inner.for.end:
594 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
595 // CHECK1: omp.loop.exit:
596 // CHECK1-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
597 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
598 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
599 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
600 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
601 // CHECK1-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
602 // CHECK1: .omp.final.then:
603 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
604 // CHECK1-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0
605 // CHECK1-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
606 // CHECK1-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
607 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
608 // CHECK1-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
609 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
610 // CHECK1: .omp.final.done:
611 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
612 // CHECK1: omp.precond.end:
613 // CHECK1-NEXT: ret void
614 //
615 //
616 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
617 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
618 // CHECK1-NEXT: entry:
619 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
620 // CHECK1-NEXT: ret void
621 //
622 //
623 // CHECK2-LABEL: define {{[^@]+}}@_Z21teams_argument_globali
624 // CHECK2-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
625 // CHECK2-NEXT: entry:
626 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
627 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
628 // CHECK2-NEXT: [[TE:%.*]] = alloca i32, align 4
629 // CHECK2-NEXT: [[TH:%.*]] = alloca i32, align 4
630 // CHECK2-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8
631 // CHECK2-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8
632 // CHECK2-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
633 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
634 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
635 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
636 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
637 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
638 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
639 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
640 // CHECK2-NEXT: [[N_CASTED7:%.*]] = alloca i64, align 8
641 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS9:%.*]] = alloca [2 x i8*], align 8
642 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS10:%.*]] = alloca [2 x i8*], align 8
643 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS11:%.*]] = alloca [2 x i8*], align 8
644 // CHECK2-NEXT: [[_TMP12:%.*]] = alloca i32, align 4
645 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4
646 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 4
647 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
648 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
649 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
650 // CHECK2-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
651 // CHECK2-NEXT: store i32 128, i32* [[TH]], align 4
652 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
653 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32*
654 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4
655 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[TE_CASTED]], align 8
656 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4
657 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32*
658 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4
659 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[TH_CASTED]], align 8
660 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4
661 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[I_CASTED]] to i32*
662 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[CONV2]], align 4
663 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[I_CASTED]], align 8
664 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[N_ADDR]], align 4
665 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[N_CASTED]] to i32*
666 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[CONV3]], align 4
667 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, i64* [[N_CASTED]], align 8
668 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
669 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
670 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP10]], align 8
671 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
672 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
673 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP12]], align 8
674 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
675 // CHECK2-NEXT: store i8* null, i8** [[TMP13]], align 8
676 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
677 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
678 // CHECK2-NEXT: store i64 [[TMP4]], i64* [[TMP15]], align 8
679 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
680 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
681 // CHECK2-NEXT: store i64 [[TMP4]], i64* [[TMP17]], align 8
682 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
683 // CHECK2-NEXT: store i8* null, i8** [[TMP18]], align 8
684 // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
685 // CHECK2-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [100 x i32]**
686 // CHECK2-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP20]], align 8
687 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
688 // CHECK2-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [100 x i32]**
689 // CHECK2-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP22]], align 8
690 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
691 // CHECK2-NEXT: store i8* null, i8** [[TMP23]], align 8
692 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
693 // CHECK2-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
694 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP25]], align 8
695 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
696 // CHECK2-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
697 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP27]], align 8
698 // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
699 // CHECK2-NEXT: store i8* null, i8** [[TMP28]], align 8
700 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
701 // CHECK2-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64*
702 // CHECK2-NEXT: store i64 [[TMP8]], i64* [[TMP30]], align 8
703 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
704 // CHECK2-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64*
705 // CHECK2-NEXT: store i64 [[TMP8]], i64* [[TMP32]], align 8
706 // CHECK2-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
707 // CHECK2-NEXT: store i8* null, i8** [[TMP33]], align 8
708 // CHECK2-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
709 // CHECK2-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
710 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[TE]], align 4
711 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4
712 // CHECK2-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_]], align 4
713 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
714 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP38]], 0
715 // CHECK2-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB]], 1
716 // CHECK2-NEXT: [[SUB6:%.*]] = sub nsw i32 [[DIV5]], 1
717 // CHECK2-NEXT: store i32 [[SUB6]], i32* [[DOTCAPTURE_EXPR_4]], align 4
718 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
719 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP39]], 1
720 // CHECK2-NEXT: [[TMP40:%.*]] = zext i32 [[ADD]] to i64
721 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP40]])
722 // CHECK2-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l30.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP36]], i32 1)
723 // CHECK2-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
724 // CHECK2-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
725 // CHECK2: omp_offload.failed:
726 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l30(i64 [[TMP2]], i64 [[TMP4]], [100 x i32]* @a, i64 [[TMP6]], i64 [[TMP8]]) #[[ATTR3:[0-9]+]]
727 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]]
728 // CHECK2: omp_offload.cont:
729 // CHECK2-NEXT: [[TMP43:%.*]] = load i32, i32* [[N_ADDR]], align 4
730 // CHECK2-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED7]] to i32*
731 // CHECK2-NEXT: store i32 [[TMP43]], i32* [[CONV8]], align 4
732 // CHECK2-NEXT: [[TMP44:%.*]] = load i64, i64* [[N_CASTED7]], align 8
733 // CHECK2-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0
734 // CHECK2-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
735 // CHECK2-NEXT: store i64 [[TMP44]], i64* [[TMP46]], align 8
736 // CHECK2-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0
737 // CHECK2-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
738 // CHECK2-NEXT: store i64 [[TMP44]], i64* [[TMP48]], align 8
739 // CHECK2-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 0
740 // CHECK2-NEXT: store i8* null, i8** [[TMP49]], align 8
741 // CHECK2-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 1
742 // CHECK2-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [100 x i32]**
743 // CHECK2-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP51]], align 8
744 // CHECK2-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 1
745 // CHECK2-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [100 x i32]**
746 // CHECK2-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP53]], align 8
747 // CHECK2-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 1
748 // CHECK2-NEXT: store i8* null, i8** [[TMP54]], align 8
749 // CHECK2-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0
750 // CHECK2-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0
751 // CHECK2-NEXT: [[TMP57:%.*]] = load i32, i32* [[N_ADDR]], align 4
752 // CHECK2-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_13]], align 4
753 // CHECK2-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4
754 // CHECK2-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP58]], 0
755 // CHECK2-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
756 // CHECK2-NEXT: [[SUB17:%.*]] = sub nsw i32 [[DIV16]], 1
757 // CHECK2-NEXT: store i32 [[SUB17]], i32* [[DOTCAPTURE_EXPR_14]], align 4
758 // CHECK2-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4
759 // CHECK2-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP59]], 1
760 // CHECK2-NEXT: [[TMP60:%.*]] = zext i32 [[ADD18]] to i64
761 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP60]])
762 // CHECK2-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
763 // CHECK2-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
764 // CHECK2-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED19:%.*]], label [[OMP_OFFLOAD_CONT20:%.*]]
765 // CHECK2: omp_offload.failed19:
766 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36(i64 [[TMP44]], [100 x i32]* @a) #[[ATTR3]]
767 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT20]]
768 // CHECK2: omp_offload.cont20:
769 // CHECK2-NEXT: [[TMP63:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4
770 // CHECK2-NEXT: ret i32 [[TMP63]]
771 //
772 //
773 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l30
774 // CHECK2-SAME: (i64 [[TE:%.*]], i64 [[TH:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]], i64 [[I:%.*]], i64 [[N:%.*]]) #[[ATTR1:[0-9]+]] {
775 // CHECK2-NEXT: entry:
776 // CHECK2-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8
777 // CHECK2-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8
778 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8
779 // CHECK2-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
780 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
781 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
782 // CHECK2-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8
783 // CHECK2-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8
784 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8
785 // CHECK2-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
786 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
787 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32*
788 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32*
789 // CHECK2-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8
790 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[I_ADDR]] to i32*
791 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[N_ADDR]] to i32*
792 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
793 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8
794 // CHECK2-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
795 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV2]], i32* [[CONV3]], [100 x i32]* [[TMP1]])
796 // CHECK2-NEXT: ret void
797 //
798 //
799 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
800 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
801 // CHECK2-NEXT: entry:
802 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
803 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
804 // CHECK2-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8
805 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
806 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8
807 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
808 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
809 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
810 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
811 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4
812 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
813 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
814 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
815 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
816 // CHECK2-NEXT: [[I4:%.*]] = alloca i32, align 4
817 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
818 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
819 // CHECK2-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8
820 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
821 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8
822 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8
823 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8
824 // CHECK2-NEXT: [[TMP2:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8
825 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4
826 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
827 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
828 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
829 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
830 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
831 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
832 // CHECK2-NEXT: store i32 0, i32* [[I3]], align 4
833 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
834 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
835 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
836 // CHECK2: omp.precond.then:
837 // CHECK2-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i64 0, i64 0
838 // CHECK2-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ]
839 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
840 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
841 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
842 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
843 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
844 // CHECK2-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
845 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
846 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
847 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
848 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
849 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
850 // CHECK2-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
851 // CHECK2: cond.true:
852 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
853 // CHECK2-NEXT: br label [[COND_END:%.*]]
854 // CHECK2: cond.false:
855 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
856 // CHECK2-NEXT: br label [[COND_END]]
857 // CHECK2: cond.end:
858 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
859 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
860 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
861 // CHECK2-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
862 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
863 // CHECK2: omp.inner.for.cond:
864 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
865 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5
866 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
867 // CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
868 // CHECK2: omp.inner.for.body:
869 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
870 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
871 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
872 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !5
873 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !5
874 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
875 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i64 0, i64 [[IDXPROM]]
876 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !5
877 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
878 // CHECK2: omp.body.continue:
879 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
880 // CHECK2: omp.inner.for.inc:
881 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
882 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP18]], 1
883 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
884 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
885 // CHECK2: omp.inner.for.end:
886 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
887 // CHECK2: omp.loop.exit:
888 // CHECK2-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
889 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
890 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
891 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
892 // CHECK2-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
893 // CHECK2-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
894 // CHECK2: .omp.final.then:
895 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
896 // CHECK2-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP23]], 0
897 // CHECK2-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
898 // CHECK2-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
899 // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
900 // CHECK2-NEXT: store i32 [[ADD11]], i32* [[TMP0]], align 4
901 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
902 // CHECK2: .omp.final.done:
903 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
904 // CHECK2: omp.precond.end:
905 // CHECK2-NEXT: ret void
906 //
907 //
908 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36
909 // CHECK2-SAME: (i64 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
910 // CHECK2-NEXT: entry:
911 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
912 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8
913 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
914 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8
915 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
916 // CHECK2-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8
917 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], [100 x i32]* [[TMP0]])
918 // CHECK2-NEXT: ret void
919 //
920 //
921 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
922 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
923 // CHECK2-NEXT: entry:
924 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
925 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
926 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
927 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8
928 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
929 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
930 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
931 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
932 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
933 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
934 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
935 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
936 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
937 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4
938 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
939 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
940 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
941 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8
942 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
943 // CHECK2-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8
944 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4
945 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
946 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
947 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
948 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
949 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
950 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
951 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4
952 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
953 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
954 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
955 // CHECK2: omp.precond.then:
956 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
957 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
958 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
959 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
960 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
961 // CHECK2-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
962 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
963 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
964 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
965 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
966 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
967 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
968 // CHECK2: cond.true:
969 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
970 // CHECK2-NEXT: br label [[COND_END:%.*]]
971 // CHECK2: cond.false:
972 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
973 // CHECK2-NEXT: br label [[COND_END]]
974 // CHECK2: cond.end:
975 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
976 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
977 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
978 // CHECK2-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
979 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
980 // CHECK2: omp.inner.for.cond:
981 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
982 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
983 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
984 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
985 // CHECK2: omp.inner.for.body:
986 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
987 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
988 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
989 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
990 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
991 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
992 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]]
993 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
994 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
995 // CHECK2: omp.body.continue:
996 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
997 // CHECK2: omp.inner.for.inc:
998 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
999 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
1000 // CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
1001 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
1002 // CHECK2: omp.inner.for.end:
1003 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1004 // CHECK2: omp.loop.exit:
1005 // CHECK2-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1006 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
1007 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
1008 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1009 // CHECK2-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
1010 // CHECK2-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1011 // CHECK2: .omp.final.then:
1012 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1013 // CHECK2-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0
1014 // CHECK2-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
1015 // CHECK2-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
1016 // CHECK2-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
1017 // CHECK2-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
1018 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
1019 // CHECK2: .omp.final.done:
1020 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
1021 // CHECK2: omp.precond.end:
1022 // CHECK2-NEXT: ret void
1023 //
1024 //
1025 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1026 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] {
1027 // CHECK2-NEXT: entry:
1028 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1)
1029 // CHECK2-NEXT: ret void
1030 //
1031 //
1032 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_argument_globali
1033 // CHECK3-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
1034 // CHECK3-NEXT: entry:
1035 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1036 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1037 // CHECK3-NEXT: [[TE:%.*]] = alloca i32, align 4
1038 // CHECK3-NEXT: [[TH:%.*]] = alloca i32, align 4
1039 // CHECK3-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4
1040 // CHECK3-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4
1041 // CHECK3-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
1042 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1043 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
1044 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
1045 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
1046 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1047 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1048 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1049 // CHECK3-NEXT: [[N_CASTED4:%.*]] = alloca i32, align 4
1050 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [2 x i8*], align 4
1051 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [2 x i8*], align 4
1052 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [2 x i8*], align 4
1053 // CHECK3-NEXT: [[_TMP8:%.*]] = alloca i32, align 4
1054 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
1055 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
1056 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1057 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
1058 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
1059 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
1060 // CHECK3-NEXT: store i32 128, i32* [[TH]], align 4
1061 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
1062 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TE_CASTED]], align 4
1063 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_CASTED]], align 4
1064 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4
1065 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TH_CASTED]], align 4
1066 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TH_CASTED]], align 4
1067 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4
1068 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[I_CASTED]], align 4
1069 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[I_CASTED]], align 4
1070 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[N_ADDR]], align 4
1071 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[N_CASTED]], align 4
1072 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[N_CASTED]], align 4
1073 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1074 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
1075 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP10]], align 4
1076 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1077 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
1078 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP12]], align 4
1079 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1080 // CHECK3-NEXT: store i8* null, i8** [[TMP13]], align 4
1081 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1082 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
1083 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[TMP15]], align 4
1084 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1085 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
1086 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[TMP17]], align 4
1087 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1088 // CHECK3-NEXT: store i8* null, i8** [[TMP18]], align 4
1089 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1090 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [100 x i32]**
1091 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP20]], align 4
1092 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1093 // CHECK3-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [100 x i32]**
1094 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP22]], align 4
1095 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1096 // CHECK3-NEXT: store i8* null, i8** [[TMP23]], align 4
1097 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1098 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32*
1099 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP25]], align 4
1100 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1101 // CHECK3-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32*
1102 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP27]], align 4
1103 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1104 // CHECK3-NEXT: store i8* null, i8** [[TMP28]], align 4
1105 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1106 // CHECK3-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
1107 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[TMP30]], align 4
1108 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1109 // CHECK3-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
1110 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[TMP32]], align 4
1111 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
1112 // CHECK3-NEXT: store i8* null, i8** [[TMP33]], align 4
1113 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1114 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1115 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[TE]], align 4
1116 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4
1117 // CHECK3-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_]], align 4
1118 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1119 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP38]], 0
1120 // CHECK3-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1
1121 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1
1122 // CHECK3-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1123 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1124 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP39]], 1
1125 // CHECK3-NEXT: [[TMP40:%.*]] = zext i32 [[ADD]] to i64
1126 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP40]])
1127 // CHECK3-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l30.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP36]], i32 1)
1128 // CHECK3-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
1129 // CHECK3-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1130 // CHECK3: omp_offload.failed:
1131 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l30(i32 [[TMP2]], i32 [[TMP4]], [100 x i32]* @a, i32 [[TMP6]], i32 [[TMP8]]) #[[ATTR3:[0-9]+]]
1132 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
1133 // CHECK3: omp_offload.cont:
1134 // CHECK3-NEXT: [[TMP43:%.*]] = load i32, i32* [[N_ADDR]], align 4
1135 // CHECK3-NEXT: store i32 [[TMP43]], i32* [[N_CASTED4]], align 4
1136 // CHECK3-NEXT: [[TMP44:%.*]] = load i32, i32* [[N_CASTED4]], align 4
1137 // CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
1138 // CHECK3-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
1139 // CHECK3-NEXT: store i32 [[TMP44]], i32* [[TMP46]], align 4
1140 // CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
1141 // CHECK3-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32*
1142 // CHECK3-NEXT: store i32 [[TMP44]], i32* [[TMP48]], align 4
1143 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 0
1144 // CHECK3-NEXT: store i8* null, i8** [[TMP49]], align 4
1145 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
1146 // CHECK3-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [100 x i32]**
1147 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP51]], align 4
1148 // CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
1149 // CHECK3-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [100 x i32]**
1150 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP53]], align 4
1151 // CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 1
1152 // CHECK3-NEXT: store i8* null, i8** [[TMP54]], align 4
1153 // CHECK3-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
1154 // CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
1155 // CHECK3-NEXT: [[TMP57:%.*]] = load i32, i32* [[N_ADDR]], align 4
1156 // CHECK3-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_9]], align 4
1157 // CHECK3-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
1158 // CHECK3-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP58]], 0
1159 // CHECK3-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
1160 // CHECK3-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
1161 // CHECK3-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
1162 // CHECK3-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
1163 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP59]], 1
1164 // CHECK3-NEXT: [[TMP60:%.*]] = zext i32 [[ADD14]] to i64
1165 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP60]])
1166 // CHECK3-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
1167 // CHECK3-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
1168 // CHECK3-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
1169 // CHECK3: omp_offload.failed15:
1170 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36(i32 [[TMP44]], [100 x i32]* @a) #[[ATTR3]]
1171 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT16]]
1172 // CHECK3: omp_offload.cont16:
1173 // CHECK3-NEXT: [[TMP63:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4
1174 // CHECK3-NEXT: ret i32 [[TMP63]]
1175 //
1176 //
1177 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l30
1178 // CHECK3-SAME: (i32 [[TE:%.*]], i32 [[TH:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]], i32 [[I:%.*]], i32 [[N:%.*]]) #[[ATTR1:[0-9]+]] {
1179 // CHECK3-NEXT: entry:
1180 // CHECK3-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4
1181 // CHECK3-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4
1182 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4
1183 // CHECK3-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
1184 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1185 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
1186 // CHECK3-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4
1187 // CHECK3-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4
1188 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4
1189 // CHECK3-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
1190 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1191 // CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4
1192 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4
1193 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4
1194 // CHECK3-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
1195 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[I_ADDR]], i32* [[N_ADDR]], [100 x i32]* [[TMP1]])
1196 // CHECK3-NEXT: ret void
1197 //
1198 //
1199 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
1200 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
1201 // CHECK3-NEXT: entry:
1202 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1203 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1204 // CHECK3-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4
1205 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
1206 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4
1207 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1208 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1209 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1210 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1211 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
1212 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1213 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1214 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1215 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1216 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4
1217 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1218 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1219 // CHECK3-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4
1220 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
1221 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4
1222 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4
1223 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4
1224 // CHECK3-NEXT: [[TMP2:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4
1225 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4
1226 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
1227 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1228 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
1229 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1230 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1231 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1232 // CHECK3-NEXT: store i32 0, i32* [[I3]], align 4
1233 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1234 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
1235 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1236 // CHECK3: omp.precond.then:
1237 // CHECK3-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i32 0, i32 0
1238 // CHECK3-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 16) ]
1239 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1240 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1241 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
1242 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1243 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1244 // CHECK3-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1245 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
1246 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1247 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1248 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1249 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
1250 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1251 // CHECK3: cond.true:
1252 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1253 // CHECK3-NEXT: br label [[COND_END:%.*]]
1254 // CHECK3: cond.false:
1255 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1256 // CHECK3-NEXT: br label [[COND_END]]
1257 // CHECK3: cond.end:
1258 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1259 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1260 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1261 // CHECK3-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
1262 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1263 // CHECK3: omp.inner.for.cond:
1264 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
1265 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
1266 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
1267 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1268 // CHECK3: omp.inner.for.body:
1269 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
1270 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
1271 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1272 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !6
1273 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !6
1274 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i32 0, i32 [[TMP17]]
1275 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
1276 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1277 // CHECK3: omp.body.continue:
1278 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1279 // CHECK3: omp.inner.for.inc:
1280 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
1281 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP18]], 1
1282 // CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
1283 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
1284 // CHECK3: omp.inner.for.end:
1285 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1286 // CHECK3: omp.loop.exit:
1287 // CHECK3-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1288 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
1289 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
1290 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1291 // CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
1292 // CHECK3-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1293 // CHECK3: .omp.final.then:
1294 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1295 // CHECK3-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP23]], 0
1296 // CHECK3-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
1297 // CHECK3-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
1298 // CHECK3-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
1299 // CHECK3-NEXT: store i32 [[ADD11]], i32* [[TMP0]], align 4
1300 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1301 // CHECK3: .omp.final.done:
1302 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
1303 // CHECK3: omp.precond.end:
1304 // CHECK3-NEXT: ret void
1305 //
1306 //
1307 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36
1308 // CHECK3-SAME: (i32 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
1309 // CHECK3-NEXT: entry:
1310 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1311 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4
1312 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1313 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4
1314 // CHECK3-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4
1315 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], [100 x i32]* [[TMP0]])
1316 // CHECK3-NEXT: ret void
1317 //
1318 //
1319 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
1320 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
1321 // CHECK3-NEXT: entry:
1322 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1323 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1324 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
1325 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4
1326 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1327 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1328 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1329 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1330 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1331 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1332 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1333 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1334 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1335 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
1336 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1337 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1338 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
1339 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4
1340 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
1341 // CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4
1342 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4
1343 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
1344 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1345 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
1346 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1347 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1348 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1349 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4
1350 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1351 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
1352 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1353 // CHECK3: omp.precond.then:
1354 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1355 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1356 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
1357 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1358 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1359 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1360 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
1361 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1362 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1363 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1364 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
1365 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1366 // CHECK3: cond.true:
1367 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1368 // CHECK3-NEXT: br label [[COND_END:%.*]]
1369 // CHECK3: cond.false:
1370 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1371 // CHECK3-NEXT: br label [[COND_END]]
1372 // CHECK3: cond.end:
1373 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
1374 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1375 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1376 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
1377 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1378 // CHECK3: omp.inner.for.cond:
1379 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1380 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1381 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1382 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1383 // CHECK3: omp.inner.for.body:
1384 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1385 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
1386 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1387 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
1388 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
1389 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i32 0, i32 [[TMP16]]
1390 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1391 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1392 // CHECK3: omp.body.continue:
1393 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1394 // CHECK3: omp.inner.for.inc:
1395 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1396 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
1397 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
1398 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
1399 // CHECK3: omp.inner.for.end:
1400 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1401 // CHECK3: omp.loop.exit:
1402 // CHECK3-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1403 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
1404 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
1405 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1406 // CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
1407 // CHECK3-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1408 // CHECK3: .omp.final.then:
1409 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1410 // CHECK3-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0
1411 // CHECK3-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
1412 // CHECK3-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
1413 // CHECK3-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
1414 // CHECK3-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
1415 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1416 // CHECK3: .omp.final.done:
1417 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
1418 // CHECK3: omp.precond.end:
1419 // CHECK3-NEXT: ret void
1420 //
1421 //
1422 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1423 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
1424 // CHECK3-NEXT: entry:
1425 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
1426 // CHECK3-NEXT: ret void
1427 //
1428 //
1429 // CHECK4-LABEL: define {{[^@]+}}@_Z21teams_argument_globali
1430 // CHECK4-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
1431 // CHECK4-NEXT: entry:
1432 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1433 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
1434 // CHECK4-NEXT: [[TE:%.*]] = alloca i32, align 4
1435 // CHECK4-NEXT: [[TH:%.*]] = alloca i32, align 4
1436 // CHECK4-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4
1437 // CHECK4-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4
1438 // CHECK4-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
1439 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1440 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
1441 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
1442 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
1443 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
1444 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1445 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1446 // CHECK4-NEXT: [[N_CASTED4:%.*]] = alloca i32, align 4
1447 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [2 x i8*], align 4
1448 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [2 x i8*], align 4
1449 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [2 x i8*], align 4
1450 // CHECK4-NEXT: [[_TMP8:%.*]] = alloca i32, align 4
1451 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
1452 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
1453 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1454 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
1455 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
1456 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
1457 // CHECK4-NEXT: store i32 128, i32* [[TH]], align 4
1458 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
1459 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TE_CASTED]], align 4
1460 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_CASTED]], align 4
1461 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4
1462 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TH_CASTED]], align 4
1463 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TH_CASTED]], align 4
1464 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4
1465 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[I_CASTED]], align 4
1466 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[I_CASTED]], align 4
1467 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[N_ADDR]], align 4
1468 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[N_CASTED]], align 4
1469 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[N_CASTED]], align 4
1470 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1471 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
1472 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[TMP10]], align 4
1473 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1474 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
1475 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[TMP12]], align 4
1476 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1477 // CHECK4-NEXT: store i8* null, i8** [[TMP13]], align 4
1478 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1479 // CHECK4-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
1480 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[TMP15]], align 4
1481 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1482 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
1483 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[TMP17]], align 4
1484 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1485 // CHECK4-NEXT: store i8* null, i8** [[TMP18]], align 4
1486 // CHECK4-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1487 // CHECK4-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [100 x i32]**
1488 // CHECK4-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP20]], align 4
1489 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1490 // CHECK4-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [100 x i32]**
1491 // CHECK4-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP22]], align 4
1492 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1493 // CHECK4-NEXT: store i8* null, i8** [[TMP23]], align 4
1494 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1495 // CHECK4-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32*
1496 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[TMP25]], align 4
1497 // CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1498 // CHECK4-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32*
1499 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[TMP27]], align 4
1500 // CHECK4-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1501 // CHECK4-NEXT: store i8* null, i8** [[TMP28]], align 4
1502 // CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1503 // CHECK4-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
1504 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[TMP30]], align 4
1505 // CHECK4-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1506 // CHECK4-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
1507 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[TMP32]], align 4
1508 // CHECK4-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
1509 // CHECK4-NEXT: store i8* null, i8** [[TMP33]], align 4
1510 // CHECK4-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1511 // CHECK4-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1512 // CHECK4-NEXT: [[TMP36:%.*]] = load i32, i32* [[TE]], align 4
1513 // CHECK4-NEXT: [[TMP37:%.*]] = load i32, i32* [[N_ADDR]], align 4
1514 // CHECK4-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_]], align 4
1515 // CHECK4-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1516 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP38]], 0
1517 // CHECK4-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1
1518 // CHECK4-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1
1519 // CHECK4-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1520 // CHECK4-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1521 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP39]], 1
1522 // CHECK4-NEXT: [[TMP40:%.*]] = zext i32 [[ADD]] to i64
1523 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP40]])
1524 // CHECK4-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l30.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP36]], i32 1)
1525 // CHECK4-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
1526 // CHECK4-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1527 // CHECK4: omp_offload.failed:
1528 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l30(i32 [[TMP2]], i32 [[TMP4]], [100 x i32]* @a, i32 [[TMP6]], i32 [[TMP8]]) #[[ATTR3:[0-9]+]]
1529 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]]
1530 // CHECK4: omp_offload.cont:
1531 // CHECK4-NEXT: [[TMP43:%.*]] = load i32, i32* [[N_ADDR]], align 4
1532 // CHECK4-NEXT: store i32 [[TMP43]], i32* [[N_CASTED4]], align 4
1533 // CHECK4-NEXT: [[TMP44:%.*]] = load i32, i32* [[N_CASTED4]], align 4
1534 // CHECK4-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
1535 // CHECK4-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
1536 // CHECK4-NEXT: store i32 [[TMP44]], i32* [[TMP46]], align 4
1537 // CHECK4-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
1538 // CHECK4-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32*
1539 // CHECK4-NEXT: store i32 [[TMP44]], i32* [[TMP48]], align 4
1540 // CHECK4-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 0
1541 // CHECK4-NEXT: store i8* null, i8** [[TMP49]], align 4
1542 // CHECK4-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
1543 // CHECK4-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [100 x i32]**
1544 // CHECK4-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP51]], align 4
1545 // CHECK4-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
1546 // CHECK4-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [100 x i32]**
1547 // CHECK4-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP53]], align 4
1548 // CHECK4-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 1
1549 // CHECK4-NEXT: store i8* null, i8** [[TMP54]], align 4
1550 // CHECK4-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
1551 // CHECK4-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
1552 // CHECK4-NEXT: [[TMP57:%.*]] = load i32, i32* [[N_ADDR]], align 4
1553 // CHECK4-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_9]], align 4
1554 // CHECK4-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
1555 // CHECK4-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP58]], 0
1556 // CHECK4-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
1557 // CHECK4-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
1558 // CHECK4-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
1559 // CHECK4-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
1560 // CHECK4-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP59]], 1
1561 // CHECK4-NEXT: [[TMP60:%.*]] = zext i32 [[ADD14]] to i64
1562 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP60]])
1563 // CHECK4-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
1564 // CHECK4-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
1565 // CHECK4-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
1566 // CHECK4: omp_offload.failed15:
1567 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36(i32 [[TMP44]], [100 x i32]* @a) #[[ATTR3]]
1568 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT16]]
1569 // CHECK4: omp_offload.cont16:
1570 // CHECK4-NEXT: [[TMP63:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4
1571 // CHECK4-NEXT: ret i32 [[TMP63]]
1572 //
1573 //
1574 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l30
1575 // CHECK4-SAME: (i32 [[TE:%.*]], i32 [[TH:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]], i32 [[I:%.*]], i32 [[N:%.*]]) #[[ATTR1:[0-9]+]] {
1576 // CHECK4-NEXT: entry:
1577 // CHECK4-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4
1578 // CHECK4-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4
1579 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4
1580 // CHECK4-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
1581 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1582 // CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
1583 // CHECK4-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4
1584 // CHECK4-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4
1585 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4
1586 // CHECK4-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
1587 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1588 // CHECK4-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4
1589 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4
1590 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4
1591 // CHECK4-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
1592 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[I_ADDR]], i32* [[N_ADDR]], [100 x i32]* [[TMP1]])
1593 // CHECK4-NEXT: ret void
1594 //
1595 //
1596 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
1597 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
1598 // CHECK4-NEXT: entry:
1599 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1600 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1601 // CHECK4-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4
1602 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
1603 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4
1604 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1605 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
1606 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1607 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1608 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4
1609 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1610 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1611 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1612 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1613 // CHECK4-NEXT: [[I4:%.*]] = alloca i32, align 4
1614 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1615 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1616 // CHECK4-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4
1617 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
1618 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4
1619 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4
1620 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4
1621 // CHECK4-NEXT: [[TMP2:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4
1622 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4
1623 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
1624 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1625 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
1626 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1627 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1628 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1629 // CHECK4-NEXT: store i32 0, i32* [[I3]], align 4
1630 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1631 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
1632 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1633 // CHECK4: omp.precond.then:
1634 // CHECK4-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i32 0, i32 0
1635 // CHECK4-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 16) ]
1636 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1637 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1638 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
1639 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1640 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1641 // CHECK4-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1642 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
1643 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1644 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1645 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1646 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
1647 // CHECK4-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1648 // CHECK4: cond.true:
1649 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1650 // CHECK4-NEXT: br label [[COND_END:%.*]]
1651 // CHECK4: cond.false:
1652 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1653 // CHECK4-NEXT: br label [[COND_END]]
1654 // CHECK4: cond.end:
1655 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1656 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1657 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1658 // CHECK4-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
1659 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1660 // CHECK4: omp.inner.for.cond:
1661 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
1662 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
1663 // CHECK4-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
1664 // CHECK4-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1665 // CHECK4: omp.inner.for.body:
1666 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
1667 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
1668 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1669 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !6
1670 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !6
1671 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i32 0, i32 [[TMP17]]
1672 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
1673 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1674 // CHECK4: omp.body.continue:
1675 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1676 // CHECK4: omp.inner.for.inc:
1677 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
1678 // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP18]], 1
1679 // CHECK4-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
1680 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
1681 // CHECK4: omp.inner.for.end:
1682 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1683 // CHECK4: omp.loop.exit:
1684 // CHECK4-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1685 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
1686 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
1687 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1688 // CHECK4-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
1689 // CHECK4-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1690 // CHECK4: .omp.final.then:
1691 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1692 // CHECK4-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP23]], 0
1693 // CHECK4-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
1694 // CHECK4-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
1695 // CHECK4-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
1696 // CHECK4-NEXT: store i32 [[ADD11]], i32* [[TMP0]], align 4
1697 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
1698 // CHECK4: .omp.final.done:
1699 // CHECK4-NEXT: br label [[OMP_PRECOND_END]]
1700 // CHECK4: omp.precond.end:
1701 // CHECK4-NEXT: ret void
1702 //
1703 //
1704 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36
1705 // CHECK4-SAME: (i32 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
1706 // CHECK4-NEXT: entry:
1707 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1708 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4
1709 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1710 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4
1711 // CHECK4-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4
1712 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], [100 x i32]* [[TMP0]])
1713 // CHECK4-NEXT: ret void
1714 //
1715 //
1716 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1
1717 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
1718 // CHECK4-NEXT: entry:
1719 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1720 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1721 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
1722 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4
1723 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1724 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
1725 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1726 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1727 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
1728 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1729 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1730 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1731 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1732 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4
1733 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1734 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1735 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
1736 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4
1737 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
1738 // CHECK4-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4
1739 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4
1740 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
1741 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1742 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
1743 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1744 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1745 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1746 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4
1747 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1748 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
1749 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1750 // CHECK4: omp.precond.then:
1751 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1752 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1753 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
1754 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1755 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1756 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1757 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
1758 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1759 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1760 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1761 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
1762 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1763 // CHECK4: cond.true:
1764 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1765 // CHECK4-NEXT: br label [[COND_END:%.*]]
1766 // CHECK4: cond.false:
1767 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1768 // CHECK4-NEXT: br label [[COND_END]]
1769 // CHECK4: cond.end:
1770 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
1771 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1772 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1773 // CHECK4-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
1774 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1775 // CHECK4: omp.inner.for.cond:
1776 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1777 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1778 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1779 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1780 // CHECK4: omp.inner.for.body:
1781 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1782 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
1783 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1784 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
1785 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
1786 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i32 0, i32 [[TMP16]]
1787 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1788 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1789 // CHECK4: omp.body.continue:
1790 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1791 // CHECK4: omp.inner.for.inc:
1792 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1793 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
1794 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
1795 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
1796 // CHECK4: omp.inner.for.end:
1797 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1798 // CHECK4: omp.loop.exit:
1799 // CHECK4-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1800 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
1801 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
1802 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1803 // CHECK4-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
1804 // CHECK4-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1805 // CHECK4: .omp.final.then:
1806 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1807 // CHECK4-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0
1808 // CHECK4-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
1809 // CHECK4-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
1810 // CHECK4-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
1811 // CHECK4-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
1812 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
1813 // CHECK4: .omp.final.done:
1814 // CHECK4-NEXT: br label [[OMP_PRECOND_END]]
1815 // CHECK4: omp.precond.end:
1816 // CHECK4-NEXT: ret void
1817 //
1818 //
1819 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1820 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] {
1821 // CHECK4-NEXT: entry:
1822 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1)
1823 // CHECK4-NEXT: ret void
1824 //
1825 //
1826 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_argument_globali
1827 // CHECK5-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
1828 // CHECK5-NEXT: entry:
1829 // CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1830 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1831 // CHECK5-NEXT: [[TE:%.*]] = alloca i32, align 4
1832 // CHECK5-NEXT: [[TH:%.*]] = alloca i32, align 4
1833 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1834 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1835 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1836 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1837 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1838 // CHECK5-NEXT: [[I4:%.*]] = alloca i32, align 4
1839 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1840 // CHECK5-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
1841 // CHECK5-NEXT: [[I5:%.*]] = alloca i32, align 4
1842 // CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 4
1843 // CHECK5-NEXT: [[_TMP13:%.*]] = alloca i32, align 4
1844 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 4
1845 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_15:%.*]] = alloca i32, align 4
1846 // CHECK5-NEXT: [[DOTOMP_LB19:%.*]] = alloca i32, align 4
1847 // CHECK5-NEXT: [[DOTOMP_UB20:%.*]] = alloca i32, align 4
1848 // CHECK5-NEXT: [[I21:%.*]] = alloca i32, align 4
1849 // CHECK5-NEXT: [[DOTOMP_IV24:%.*]] = alloca i32, align 4
1850 // CHECK5-NEXT: [[I25:%.*]] = alloca i32, align 4
1851 // CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1852 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
1853 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
1854 // CHECK5-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
1855 // CHECK5-NEXT: store i32 128, i32* [[TH]], align 4
1856 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
1857 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1858 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1859 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1860 // CHECK5-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1
1861 // CHECK5-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1
1862 // CHECK5-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1863 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1864 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1865 // CHECK5-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_UB]], align 4
1866 // CHECK5-NEXT: store i32 0, i32* [[I4]], align 4
1867 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1868 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
1869 // CHECK5-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
1870 // CHECK5: simd.if.then:
1871 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1872 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1873 // CHECK5-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), i64 16) ]
1874 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4
1875 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTLINEAR_START]], align 4
1876 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1877 // CHECK5: omp.inner.for.cond:
1878 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1879 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
1880 // CHECK5-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1881 // CHECK5-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1882 // CHECK5: omp.inner.for.body:
1883 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1884 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1885 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1886 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !2
1887 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !2
1888 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64
1889 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM]]
1890 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
1891 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1892 // CHECK5: omp.body.continue:
1893 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1894 // CHECK5: omp.inner.for.inc:
1895 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1896 // CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP11]], 1
1897 // CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1898 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
1899 // CHECK5: omp.inner.for.end:
1900 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1901 // CHECK5-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP12]], 0
1902 // CHECK5-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
1903 // CHECK5-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
1904 // CHECK5-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
1905 // CHECK5-NEXT: store i32 [[ADD12]], i32* [[I]], align 4
1906 // CHECK5-NEXT: br label [[SIMD_IF_END]]
1907 // CHECK5: simd.if.end:
1908 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[N_ADDR]], align 4
1909 // CHECK5-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_14]], align 4
1910 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4
1911 // CHECK5-NEXT: [[SUB16:%.*]] = sub nsw i32 [[TMP14]], 0
1912 // CHECK5-NEXT: [[DIV17:%.*]] = sdiv i32 [[SUB16]], 1
1913 // CHECK5-NEXT: [[SUB18:%.*]] = sub nsw i32 [[DIV17]], 1
1914 // CHECK5-NEXT: store i32 [[SUB18]], i32* [[DOTCAPTURE_EXPR_15]], align 4
1915 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB19]], align 4
1916 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_15]], align 4
1917 // CHECK5-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_UB20]], align 4
1918 // CHECK5-NEXT: store i32 0, i32* [[I21]], align 4
1919 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4
1920 // CHECK5-NEXT: [[CMP22:%.*]] = icmp slt i32 0, [[TMP16]]
1921 // CHECK5-NEXT: br i1 [[CMP22]], label [[SIMD_IF_THEN23:%.*]], label [[SIMD_IF_END41:%.*]]
1922 // CHECK5: simd.if.then23:
1923 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB19]], align 4
1924 // CHECK5-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV24]], align 4
1925 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND26:%.*]]
1926 // CHECK5: omp.inner.for.cond26:
1927 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV24]], align 4
1928 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB20]], align 4
1929 // CHECK5-NEXT: [[CMP27:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
1930 // CHECK5-NEXT: br i1 [[CMP27]], label [[OMP_INNER_FOR_BODY28:%.*]], label [[OMP_INNER_FOR_END36:%.*]]
1931 // CHECK5: omp.inner.for.body28:
1932 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV24]], align 4
1933 // CHECK5-NEXT: [[MUL29:%.*]] = mul nsw i32 [[TMP20]], 1
1934 // CHECK5-NEXT: [[ADD30:%.*]] = add nsw i32 0, [[MUL29]]
1935 // CHECK5-NEXT: store i32 [[ADD30]], i32* [[I25]], align 4
1936 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[I25]], align 4
1937 // CHECK5-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP21]] to i64
1938 // CHECK5-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM31]]
1939 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX32]], align 4
1940 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]]
1941 // CHECK5: omp.body.continue33:
1942 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]]
1943 // CHECK5: omp.inner.for.inc34:
1944 // CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV24]], align 4
1945 // CHECK5-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP22]], 1
1946 // CHECK5-NEXT: store i32 [[ADD35]], i32* [[DOTOMP_IV24]], align 4
1947 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND26]], !llvm.loop [[LOOP7:![0-9]+]]
1948 // CHECK5: omp.inner.for.end36:
1949 // CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4
1950 // CHECK5-NEXT: [[SUB37:%.*]] = sub nsw i32 [[TMP23]], 0
1951 // CHECK5-NEXT: [[DIV38:%.*]] = sdiv i32 [[SUB37]], 1
1952 // CHECK5-NEXT: [[MUL39:%.*]] = mul nsw i32 [[DIV38]], 1
1953 // CHECK5-NEXT: [[ADD40:%.*]] = add nsw i32 0, [[MUL39]]
1954 // CHECK5-NEXT: store i32 [[ADD40]], i32* [[I25]], align 4
1955 // CHECK5-NEXT: br label [[SIMD_IF_END41]]
1956 // CHECK5: simd.if.end41:
1957 // CHECK5-NEXT: [[TMP24:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4
1958 // CHECK5-NEXT: ret i32 [[TMP24]]
1959 //
1960 //
1961 // CHECK6-LABEL: define {{[^@]+}}@_Z21teams_argument_globali
1962 // CHECK6-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
1963 // CHECK6-NEXT: entry:
1964 // CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1965 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
1966 // CHECK6-NEXT: [[TE:%.*]] = alloca i32, align 4
1967 // CHECK6-NEXT: [[TH:%.*]] = alloca i32, align 4
1968 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
1969 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1970 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1971 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1972 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1973 // CHECK6-NEXT: [[I4:%.*]] = alloca i32, align 4
1974 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1975 // CHECK6-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
1976 // CHECK6-NEXT: [[I5:%.*]] = alloca i32, align 4
1977 // CHECK6-NEXT: [[I6:%.*]] = alloca i32, align 4
1978 // CHECK6-NEXT: [[_TMP13:%.*]] = alloca i32, align 4
1979 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 4
1980 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_15:%.*]] = alloca i32, align 4
1981 // CHECK6-NEXT: [[DOTOMP_LB19:%.*]] = alloca i32, align 4
1982 // CHECK6-NEXT: [[DOTOMP_UB20:%.*]] = alloca i32, align 4
1983 // CHECK6-NEXT: [[I21:%.*]] = alloca i32, align 4
1984 // CHECK6-NEXT: [[DOTOMP_IV24:%.*]] = alloca i32, align 4
1985 // CHECK6-NEXT: [[I25:%.*]] = alloca i32, align 4
1986 // CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1987 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
1988 // CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
1989 // CHECK6-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
1990 // CHECK6-NEXT: store i32 128, i32* [[TH]], align 4
1991 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
1992 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1993 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1994 // CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1995 // CHECK6-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1
1996 // CHECK6-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1
1997 // CHECK6-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1998 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1999 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2000 // CHECK6-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_UB]], align 4
2001 // CHECK6-NEXT: store i32 0, i32* [[I4]], align 4
2002 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2003 // CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2004 // CHECK6-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
2005 // CHECK6: simd.if.then:
2006 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2007 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2008 // CHECK6-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), i64 16) ]
2009 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4
2010 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTLINEAR_START]], align 4
2011 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2012 // CHECK6: omp.inner.for.cond:
2013 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2014 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
2015 // CHECK6-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2016 // CHECK6-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2017 // CHECK6: omp.inner.for.body:
2018 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2019 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2020 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2021 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !2
2022 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !2
2023 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64
2024 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM]]
2025 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
2026 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2027 // CHECK6: omp.body.continue:
2028 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2029 // CHECK6: omp.inner.for.inc:
2030 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2031 // CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP11]], 1
2032 // CHECK6-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2033 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
2034 // CHECK6: omp.inner.for.end:
2035 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2036 // CHECK6-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP12]], 0
2037 // CHECK6-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
2038 // CHECK6-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
2039 // CHECK6-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
2040 // CHECK6-NEXT: store i32 [[ADD12]], i32* [[I]], align 4
2041 // CHECK6-NEXT: br label [[SIMD_IF_END]]
2042 // CHECK6: simd.if.end:
2043 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[N_ADDR]], align 4
2044 // CHECK6-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_14]], align 4
2045 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4
2046 // CHECK6-NEXT: [[SUB16:%.*]] = sub nsw i32 [[TMP14]], 0
2047 // CHECK6-NEXT: [[DIV17:%.*]] = sdiv i32 [[SUB16]], 1
2048 // CHECK6-NEXT: [[SUB18:%.*]] = sub nsw i32 [[DIV17]], 1
2049 // CHECK6-NEXT: store i32 [[SUB18]], i32* [[DOTCAPTURE_EXPR_15]], align 4
2050 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB19]], align 4
2051 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_15]], align 4
2052 // CHECK6-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_UB20]], align 4
2053 // CHECK6-NEXT: store i32 0, i32* [[I21]], align 4
2054 // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4
2055 // CHECK6-NEXT: [[CMP22:%.*]] = icmp slt i32 0, [[TMP16]]
2056 // CHECK6-NEXT: br i1 [[CMP22]], label [[SIMD_IF_THEN23:%.*]], label [[SIMD_IF_END41:%.*]]
2057 // CHECK6: simd.if.then23:
2058 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB19]], align 4
2059 // CHECK6-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV24]], align 4
2060 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND26:%.*]]
2061 // CHECK6: omp.inner.for.cond26:
2062 // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV24]], align 4
2063 // CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB20]], align 4
2064 // CHECK6-NEXT: [[CMP27:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
2065 // CHECK6-NEXT: br i1 [[CMP27]], label [[OMP_INNER_FOR_BODY28:%.*]], label [[OMP_INNER_FOR_END36:%.*]]
2066 // CHECK6: omp.inner.for.body28:
2067 // CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV24]], align 4
2068 // CHECK6-NEXT: [[MUL29:%.*]] = mul nsw i32 [[TMP20]], 1
2069 // CHECK6-NEXT: [[ADD30:%.*]] = add nsw i32 0, [[MUL29]]
2070 // CHECK6-NEXT: store i32 [[ADD30]], i32* [[I25]], align 4
2071 // CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[I25]], align 4
2072 // CHECK6-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP21]] to i64
2073 // CHECK6-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM31]]
2074 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX32]], align 4
2075 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]]
2076 // CHECK6: omp.body.continue33:
2077 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]]
2078 // CHECK6: omp.inner.for.inc34:
2079 // CHECK6-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV24]], align 4
2080 // CHECK6-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP22]], 1
2081 // CHECK6-NEXT: store i32 [[ADD35]], i32* [[DOTOMP_IV24]], align 4
2082 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND26]], !llvm.loop [[LOOP7:![0-9]+]]
2083 // CHECK6: omp.inner.for.end36:
2084 // CHECK6-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4
2085 // CHECK6-NEXT: [[SUB37:%.*]] = sub nsw i32 [[TMP23]], 0
2086 // CHECK6-NEXT: [[DIV38:%.*]] = sdiv i32 [[SUB37]], 1
2087 // CHECK6-NEXT: [[MUL39:%.*]] = mul nsw i32 [[DIV38]], 1
2088 // CHECK6-NEXT: [[ADD40:%.*]] = add nsw i32 0, [[MUL39]]
2089 // CHECK6-NEXT: store i32 [[ADD40]], i32* [[I25]], align 4
2090 // CHECK6-NEXT: br label [[SIMD_IF_END41]]
2091 // CHECK6: simd.if.end41:
2092 // CHECK6-NEXT: [[TMP24:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4
2093 // CHECK6-NEXT: ret i32 [[TMP24]]
2094 //
2095 //
2096 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_argument_globali
2097 // CHECK7-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
2098 // CHECK7-NEXT: entry:
2099 // CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2100 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
2101 // CHECK7-NEXT: [[TE:%.*]] = alloca i32, align 4
2102 // CHECK7-NEXT: [[TH:%.*]] = alloca i32, align 4
2103 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
2104 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2105 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2106 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2107 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2108 // CHECK7-NEXT: [[I4:%.*]] = alloca i32, align 4
2109 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2110 // CHECK7-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
2111 // CHECK7-NEXT: [[I5:%.*]] = alloca i32, align 4
2112 // CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4
2113 // CHECK7-NEXT: [[_TMP13:%.*]] = alloca i32, align 4
2114 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 4
2115 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_15:%.*]] = alloca i32, align 4
2116 // CHECK7-NEXT: [[DOTOMP_LB19:%.*]] = alloca i32, align 4
2117 // CHECK7-NEXT: [[DOTOMP_UB20:%.*]] = alloca i32, align 4
2118 // CHECK7-NEXT: [[I21:%.*]] = alloca i32, align 4
2119 // CHECK7-NEXT: [[DOTOMP_IV24:%.*]] = alloca i32, align 4
2120 // CHECK7-NEXT: [[I25:%.*]] = alloca i32, align 4
2121 // CHECK7-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2122 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
2123 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
2124 // CHECK7-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
2125 // CHECK7-NEXT: store i32 128, i32* [[TH]], align 4
2126 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
2127 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2128 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2129 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2130 // CHECK7-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1
2131 // CHECK7-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1
2132 // CHECK7-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2133 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2134 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2135 // CHECK7-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_UB]], align 4
2136 // CHECK7-NEXT: store i32 0, i32* [[I4]], align 4
2137 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2138 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2139 // CHECK7-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
2140 // CHECK7: simd.if.then:
2141 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2142 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2143 // CHECK7-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), i32 16) ]
2144 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4
2145 // CHECK7-NEXT: store i32 [[TMP6]], i32* [[DOTLINEAR_START]], align 4
2146 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2147 // CHECK7: omp.inner.for.cond:
2148 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
2149 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
2150 // CHECK7-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2151 // CHECK7-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2152 // CHECK7: omp.inner.for.body:
2153 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
2154 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2155 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2156 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !3
2157 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !3
2158 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i32 0, i32 [[TMP10]]
2159 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
2160 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2161 // CHECK7: omp.body.continue:
2162 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2163 // CHECK7: omp.inner.for.inc:
2164 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
2165 // CHECK7-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP11]], 1
2166 // CHECK7-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
2167 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
2168 // CHECK7: omp.inner.for.end:
2169 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2170 // CHECK7-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP12]], 0
2171 // CHECK7-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
2172 // CHECK7-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
2173 // CHECK7-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
2174 // CHECK7-NEXT: store i32 [[ADD12]], i32* [[I]], align 4
2175 // CHECK7-NEXT: br label [[SIMD_IF_END]]
2176 // CHECK7: simd.if.end:
2177 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[N_ADDR]], align 4
2178 // CHECK7-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_14]], align 4
2179 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4
2180 // CHECK7-NEXT: [[SUB16:%.*]] = sub nsw i32 [[TMP14]], 0
2181 // CHECK7-NEXT: [[DIV17:%.*]] = sdiv i32 [[SUB16]], 1
2182 // CHECK7-NEXT: [[SUB18:%.*]] = sub nsw i32 [[DIV17]], 1
2183 // CHECK7-NEXT: store i32 [[SUB18]], i32* [[DOTCAPTURE_EXPR_15]], align 4
2184 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB19]], align 4
2185 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_15]], align 4
2186 // CHECK7-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_UB20]], align 4
2187 // CHECK7-NEXT: store i32 0, i32* [[I21]], align 4
2188 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4
2189 // CHECK7-NEXT: [[CMP22:%.*]] = icmp slt i32 0, [[TMP16]]
2190 // CHECK7-NEXT: br i1 [[CMP22]], label [[SIMD_IF_THEN23:%.*]], label [[SIMD_IF_END40:%.*]]
2191 // CHECK7: simd.if.then23:
2192 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB19]], align 4
2193 // CHECK7-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV24]], align 4
2194 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND26:%.*]]
2195 // CHECK7: omp.inner.for.cond26:
2196 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV24]], align 4
2197 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB20]], align 4
2198 // CHECK7-NEXT: [[CMP27:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
2199 // CHECK7-NEXT: br i1 [[CMP27]], label [[OMP_INNER_FOR_BODY28:%.*]], label [[OMP_INNER_FOR_END35:%.*]]
2200 // CHECK7: omp.inner.for.body28:
2201 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV24]], align 4
2202 // CHECK7-NEXT: [[MUL29:%.*]] = mul nsw i32 [[TMP20]], 1
2203 // CHECK7-NEXT: [[ADD30:%.*]] = add nsw i32 0, [[MUL29]]
2204 // CHECK7-NEXT: store i32 [[ADD30]], i32* [[I25]], align 4
2205 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[I25]], align 4
2206 // CHECK7-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i32 0, i32 [[TMP21]]
2207 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX31]], align 4
2208 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE32:%.*]]
2209 // CHECK7: omp.body.continue32:
2210 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC33:%.*]]
2211 // CHECK7: omp.inner.for.inc33:
2212 // CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV24]], align 4
2213 // CHECK7-NEXT: [[ADD34:%.*]] = add nsw i32 [[TMP22]], 1
2214 // CHECK7-NEXT: store i32 [[ADD34]], i32* [[DOTOMP_IV24]], align 4
2215 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND26]], !llvm.loop [[LOOP8:![0-9]+]]
2216 // CHECK7: omp.inner.for.end35:
2217 // CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4
2218 // CHECK7-NEXT: [[SUB36:%.*]] = sub nsw i32 [[TMP23]], 0
2219 // CHECK7-NEXT: [[DIV37:%.*]] = sdiv i32 [[SUB36]], 1
2220 // CHECK7-NEXT: [[MUL38:%.*]] = mul nsw i32 [[DIV37]], 1
2221 // CHECK7-NEXT: [[ADD39:%.*]] = add nsw i32 0, [[MUL38]]
2222 // CHECK7-NEXT: store i32 [[ADD39]], i32* [[I25]], align 4
2223 // CHECK7-NEXT: br label [[SIMD_IF_END40]]
2224 // CHECK7: simd.if.end40:
2225 // CHECK7-NEXT: [[TMP24:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4
2226 // CHECK7-NEXT: ret i32 [[TMP24]]
2227 //
2228 //
2229 // CHECK8-LABEL: define {{[^@]+}}@_Z21teams_argument_globali
2230 // CHECK8-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
2231 // CHECK8-NEXT: entry:
2232 // CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2233 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
2234 // CHECK8-NEXT: [[TE:%.*]] = alloca i32, align 4
2235 // CHECK8-NEXT: [[TH:%.*]] = alloca i32, align 4
2236 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
2237 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2238 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2239 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2240 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2241 // CHECK8-NEXT: [[I4:%.*]] = alloca i32, align 4
2242 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2243 // CHECK8-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
2244 // CHECK8-NEXT: [[I5:%.*]] = alloca i32, align 4
2245 // CHECK8-NEXT: [[I6:%.*]] = alloca i32, align 4
2246 // CHECK8-NEXT: [[_TMP13:%.*]] = alloca i32, align 4
2247 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 4
2248 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_15:%.*]] = alloca i32, align 4
2249 // CHECK8-NEXT: [[DOTOMP_LB19:%.*]] = alloca i32, align 4
2250 // CHECK8-NEXT: [[DOTOMP_UB20:%.*]] = alloca i32, align 4
2251 // CHECK8-NEXT: [[I21:%.*]] = alloca i32, align 4
2252 // CHECK8-NEXT: [[DOTOMP_IV24:%.*]] = alloca i32, align 4
2253 // CHECK8-NEXT: [[I25:%.*]] = alloca i32, align 4
2254 // CHECK8-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2255 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
2256 // CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
2257 // CHECK8-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
2258 // CHECK8-NEXT: store i32 128, i32* [[TH]], align 4
2259 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
2260 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2261 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2262 // CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2263 // CHECK8-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1
2264 // CHECK8-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1
2265 // CHECK8-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2266 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2267 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2268 // CHECK8-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_UB]], align 4
2269 // CHECK8-NEXT: store i32 0, i32* [[I4]], align 4
2270 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2271 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2272 // CHECK8-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
2273 // CHECK8: simd.if.then:
2274 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2275 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2276 // CHECK8-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), i32 16) ]
2277 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4
2278 // CHECK8-NEXT: store i32 [[TMP6]], i32* [[DOTLINEAR_START]], align 4
2279 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2280 // CHECK8: omp.inner.for.cond:
2281 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
2282 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
2283 // CHECK8-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2284 // CHECK8-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2285 // CHECK8: omp.inner.for.body:
2286 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
2287 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2288 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2289 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !3
2290 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !3
2291 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i32 0, i32 [[TMP10]]
2292 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
2293 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2294 // CHECK8: omp.body.continue:
2295 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2296 // CHECK8: omp.inner.for.inc:
2297 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
2298 // CHECK8-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP11]], 1
2299 // CHECK8-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
2300 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
2301 // CHECK8: omp.inner.for.end:
2302 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2303 // CHECK8-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP12]], 0
2304 // CHECK8-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
2305 // CHECK8-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
2306 // CHECK8-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
2307 // CHECK8-NEXT: store i32 [[ADD12]], i32* [[I]], align 4
2308 // CHECK8-NEXT: br label [[SIMD_IF_END]]
2309 // CHECK8: simd.if.end:
2310 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[N_ADDR]], align 4
2311 // CHECK8-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_14]], align 4
2312 // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4
2313 // CHECK8-NEXT: [[SUB16:%.*]] = sub nsw i32 [[TMP14]], 0
2314 // CHECK8-NEXT: [[DIV17:%.*]] = sdiv i32 [[SUB16]], 1
2315 // CHECK8-NEXT: [[SUB18:%.*]] = sub nsw i32 [[DIV17]], 1
2316 // CHECK8-NEXT: store i32 [[SUB18]], i32* [[DOTCAPTURE_EXPR_15]], align 4
2317 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB19]], align 4
2318 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_15]], align 4
2319 // CHECK8-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_UB20]], align 4
2320 // CHECK8-NEXT: store i32 0, i32* [[I21]], align 4
2321 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4
2322 // CHECK8-NEXT: [[CMP22:%.*]] = icmp slt i32 0, [[TMP16]]
2323 // CHECK8-NEXT: br i1 [[CMP22]], label [[SIMD_IF_THEN23:%.*]], label [[SIMD_IF_END40:%.*]]
2324 // CHECK8: simd.if.then23:
2325 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB19]], align 4
2326 // CHECK8-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV24]], align 4
2327 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND26:%.*]]
2328 // CHECK8: omp.inner.for.cond26:
2329 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV24]], align 4
2330 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB20]], align 4
2331 // CHECK8-NEXT: [[CMP27:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
2332 // CHECK8-NEXT: br i1 [[CMP27]], label [[OMP_INNER_FOR_BODY28:%.*]], label [[OMP_INNER_FOR_END35:%.*]]
2333 // CHECK8: omp.inner.for.body28:
2334 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV24]], align 4
2335 // CHECK8-NEXT: [[MUL29:%.*]] = mul nsw i32 [[TMP20]], 1
2336 // CHECK8-NEXT: [[ADD30:%.*]] = add nsw i32 0, [[MUL29]]
2337 // CHECK8-NEXT: store i32 [[ADD30]], i32* [[I25]], align 4
2338 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[I25]], align 4
2339 // CHECK8-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i32 0, i32 [[TMP21]]
2340 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX31]], align 4
2341 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE32:%.*]]
2342 // CHECK8: omp.body.continue32:
2343 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC33:%.*]]
2344 // CHECK8: omp.inner.for.inc33:
2345 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV24]], align 4
2346 // CHECK8-NEXT: [[ADD34:%.*]] = add nsw i32 [[TMP22]], 1
2347 // CHECK8-NEXT: store i32 [[ADD34]], i32* [[DOTOMP_IV24]], align 4
2348 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND26]], !llvm.loop [[LOOP8:![0-9]+]]
2349 // CHECK8: omp.inner.for.end35:
2350 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4
2351 // CHECK8-NEXT: [[SUB36:%.*]] = sub nsw i32 [[TMP23]], 0
2352 // CHECK8-NEXT: [[DIV37:%.*]] = sdiv i32 [[SUB36]], 1
2353 // CHECK8-NEXT: [[MUL38:%.*]] = mul nsw i32 [[DIV37]], 1
2354 // CHECK8-NEXT: [[ADD39:%.*]] = add nsw i32 0, [[MUL38]]
2355 // CHECK8-NEXT: store i32 [[ADD39]], i32* [[I25]], align 4
2356 // CHECK8-NEXT: br label [[SIMD_IF_END40]]
2357 // CHECK8: simd.if.end40:
2358 // CHECK8-NEXT: [[TMP24:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4
2359 // CHECK8-NEXT: ret i32 [[TMP24]]
2360 //
2361 //
2362 // CHECK9-LABEL: define {{[^@]+}}@_Z15teams_local_argv
2363 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
2364 // CHECK9-NEXT: entry:
2365 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4
2366 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
2367 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
2368 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
2369 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
2370 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
2371 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
2372 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
2373 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2374 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2375 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2376 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4
2377 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
2378 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
2379 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
2380 // CHECK9-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
2381 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
2382 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
2383 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
2384 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
2385 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
2386 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
2387 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
2388 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2389 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
2390 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8
2391 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2392 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
2393 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8
2394 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2395 // CHECK9-NEXT: store i64 4, i64* [[TMP10]], align 8
2396 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2397 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8
2398 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2399 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
2400 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8
2401 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2402 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
2403 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8
2404 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
2405 // CHECK9-NEXT: store i64 8, i64* [[TMP16]], align 8
2406 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
2407 // CHECK9-NEXT: store i8* null, i8** [[TMP17]], align 8
2408 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2409 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
2410 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8
2411 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2412 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
2413 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8
2414 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
2415 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8
2416 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
2417 // CHECK9-NEXT: store i8* null, i8** [[TMP23]], align 8
2418 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2419 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2420 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2421 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
2422 // CHECK9-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
2423 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2424 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
2425 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2426 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2427 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2428 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2429 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
2430 // CHECK9-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
2431 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]])
2432 // CHECK9-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l75.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
2433 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
2434 // CHECK9-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2435 // CHECK9: omp_offload.failed:
2436 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l75(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
2437 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
2438 // CHECK9: omp_offload.cont:
2439 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0
2440 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
2441 // CHECK9-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
2442 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP34]])
2443 // CHECK9-NEXT: ret i32 [[TMP33]]
2444 //
2445 //
2446 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l75
2447 // CHECK9-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
2448 // CHECK9-NEXT: entry:
2449 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2450 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
2451 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2452 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2453 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2454 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2455 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2456 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2457 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2458 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
2459 // CHECK9-NEXT: ret void
2460 //
2461 //
2462 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
2463 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2464 // CHECK9-NEXT: entry:
2465 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2466 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2467 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
2468 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
2469 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2470 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2471 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2472 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2473 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2474 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2475 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2476 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2477 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2478 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2479 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
2480 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2481 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2482 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
2483 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2484 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2485 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
2486 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2487 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2488 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
2489 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
2490 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2491 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
2492 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2493 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2494 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2495 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
2496 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2497 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
2498 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2499 // CHECK9: omp.precond.then:
2500 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2501 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2502 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
2503 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2504 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2505 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2506 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
2507 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2508 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2509 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2510 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
2511 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2512 // CHECK9: cond.true:
2513 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2514 // CHECK9-NEXT: br label [[COND_END:%.*]]
2515 // CHECK9: cond.false:
2516 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2517 // CHECK9-NEXT: br label [[COND_END]]
2518 // CHECK9: cond.end:
2519 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2520 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2521 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2522 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
2523 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2524 // CHECK9: omp.inner.for.cond:
2525 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
2526 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !4
2527 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2528 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2529 // CHECK9: omp.inner.for.body:
2530 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
2531 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
2532 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2533 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !4
2534 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !4
2535 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
2536 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
2537 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !4
2538 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2539 // CHECK9: omp.body.continue:
2540 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2541 // CHECK9: omp.inner.for.inc:
2542 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
2543 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1
2544 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
2545 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
2546 // CHECK9: omp.inner.for.end:
2547 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2548 // CHECK9: omp.loop.exit:
2549 // CHECK9-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2550 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
2551 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
2552 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2553 // CHECK9-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
2554 // CHECK9-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2555 // CHECK9: .omp.final.then:
2556 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2557 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 0
2558 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
2559 // CHECK9-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
2560 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
2561 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
2562 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
2563 // CHECK9: .omp.final.done:
2564 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
2565 // CHECK9: omp.precond.end:
2566 // CHECK9-NEXT: ret void
2567 //
2568 //
2569 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2570 // CHECK9-SAME: () #[[ATTR4:[0-9]+]] {
2571 // CHECK9-NEXT: entry:
2572 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
2573 // CHECK9-NEXT: ret void
2574 //
2575 //
2576 // CHECK10-LABEL: define {{[^@]+}}@_Z15teams_local_argv
2577 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] {
2578 // CHECK10-NEXT: entry:
2579 // CHECK10-NEXT: [[N:%.*]] = alloca i32, align 4
2580 // CHECK10-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
2581 // CHECK10-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
2582 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
2583 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
2584 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
2585 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
2586 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
2587 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
2588 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2589 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2590 // CHECK10-NEXT: store i32 100, i32* [[N]], align 4
2591 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
2592 // CHECK10-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
2593 // CHECK10-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
2594 // CHECK10-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
2595 // CHECK10-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
2596 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
2597 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
2598 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
2599 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
2600 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
2601 // CHECK10-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
2602 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2603 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
2604 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8
2605 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2606 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
2607 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8
2608 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2609 // CHECK10-NEXT: store i64 4, i64* [[TMP10]], align 8
2610 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2611 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 8
2612 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2613 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
2614 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8
2615 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2616 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
2617 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8
2618 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
2619 // CHECK10-NEXT: store i64 8, i64* [[TMP16]], align 8
2620 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
2621 // CHECK10-NEXT: store i8* null, i8** [[TMP17]], align 8
2622 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2623 // CHECK10-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
2624 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8
2625 // CHECK10-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2626 // CHECK10-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
2627 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8
2628 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
2629 // CHECK10-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8
2630 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
2631 // CHECK10-NEXT: store i8* null, i8** [[TMP23]], align 8
2632 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2633 // CHECK10-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2634 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2635 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
2636 // CHECK10-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
2637 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2638 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
2639 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2640 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2641 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2642 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2643 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
2644 // CHECK10-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
2645 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]])
2646 // CHECK10-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l75.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
2647 // CHECK10-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
2648 // CHECK10-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2649 // CHECK10: omp_offload.failed:
2650 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l75(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
2651 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
2652 // CHECK10: omp_offload.cont:
2653 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0
2654 // CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
2655 // CHECK10-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
2656 // CHECK10-NEXT: call void @llvm.stackrestore(i8* [[TMP34]])
2657 // CHECK10-NEXT: ret i32 [[TMP33]]
2658 //
2659 //
2660 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l75
2661 // CHECK10-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
2662 // CHECK10-NEXT: entry:
2663 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2664 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
2665 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2666 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2667 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2668 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2669 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2670 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2671 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2672 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
2673 // CHECK10-NEXT: ret void
2674 //
2675 //
2676 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
2677 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2678 // CHECK10-NEXT: entry:
2679 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2680 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2681 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
2682 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
2683 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2684 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2685 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
2686 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2687 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2688 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
2689 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2690 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2691 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2692 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2693 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4
2694 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2695 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2696 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
2697 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2698 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2699 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
2700 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2701 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2702 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
2703 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
2704 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2705 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
2706 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2707 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2708 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2709 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4
2710 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2711 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
2712 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2713 // CHECK10: omp.precond.then:
2714 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2715 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2716 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
2717 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2718 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2719 // CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2720 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
2721 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2722 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2723 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2724 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
2725 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2726 // CHECK10: cond.true:
2727 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2728 // CHECK10-NEXT: br label [[COND_END:%.*]]
2729 // CHECK10: cond.false:
2730 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2731 // CHECK10-NEXT: br label [[COND_END]]
2732 // CHECK10: cond.end:
2733 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2734 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2735 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2736 // CHECK10-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
2737 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2738 // CHECK10: omp.inner.for.cond:
2739 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
2740 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !4
2741 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2742 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2743 // CHECK10: omp.inner.for.body:
2744 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
2745 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
2746 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2747 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !4
2748 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !4
2749 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
2750 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
2751 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !4
2752 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2753 // CHECK10: omp.body.continue:
2754 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2755 // CHECK10: omp.inner.for.inc:
2756 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
2757 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1
2758 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
2759 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
2760 // CHECK10: omp.inner.for.end:
2761 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2762 // CHECK10: omp.loop.exit:
2763 // CHECK10-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2764 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
2765 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
2766 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2767 // CHECK10-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
2768 // CHECK10-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2769 // CHECK10: .omp.final.then:
2770 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2771 // CHECK10-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 0
2772 // CHECK10-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
2773 // CHECK10-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
2774 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
2775 // CHECK10-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
2776 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
2777 // CHECK10: .omp.final.done:
2778 // CHECK10-NEXT: br label [[OMP_PRECOND_END]]
2779 // CHECK10: omp.precond.end:
2780 // CHECK10-NEXT: ret void
2781 //
2782 //
2783 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2784 // CHECK10-SAME: () #[[ATTR4:[0-9]+]] {
2785 // CHECK10-NEXT: entry:
2786 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1)
2787 // CHECK10-NEXT: ret void
2788 //
2789 //
2790 // CHECK11-LABEL: define {{[^@]+}}@_Z15teams_local_argv
2791 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
2792 // CHECK11-NEXT: entry:
2793 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4
2794 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
2795 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
2796 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2797 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
2798 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
2799 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
2800 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
2801 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2802 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2803 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2804 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4
2805 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
2806 // CHECK11-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
2807 // CHECK11-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
2808 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
2809 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
2810 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
2811 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
2812 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
2813 // CHECK11-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
2814 // CHECK11-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
2815 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2816 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
2817 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4
2818 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2819 // CHECK11-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
2820 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4
2821 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2822 // CHECK11-NEXT: store i64 4, i64* [[TMP10]], align 4
2823 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2824 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4
2825 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2826 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
2827 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4
2828 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2829 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
2830 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4
2831 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
2832 // CHECK11-NEXT: store i64 4, i64* [[TMP16]], align 4
2833 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2834 // CHECK11-NEXT: store i8* null, i8** [[TMP17]], align 4
2835 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2836 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
2837 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4
2838 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2839 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
2840 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4
2841 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
2842 // CHECK11-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4
2843 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2844 // CHECK11-NEXT: store i8* null, i8** [[TMP23]], align 4
2845 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2846 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2847 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2848 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
2849 // CHECK11-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
2850 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2851 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
2852 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2853 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2854 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2855 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2856 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
2857 // CHECK11-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
2858 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]])
2859 // CHECK11-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l75.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
2860 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
2861 // CHECK11-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2862 // CHECK11: omp_offload.failed:
2863 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l75(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
2864 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
2865 // CHECK11: omp_offload.cont:
2866 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0
2867 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
2868 // CHECK11-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
2869 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP34]])
2870 // CHECK11-NEXT: ret i32 [[TMP33]]
2871 //
2872 //
2873 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l75
2874 // CHECK11-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
2875 // CHECK11-NEXT: entry:
2876 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2877 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2878 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
2879 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2880 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
2881 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
2882 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
2883 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
2884 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
2885 // CHECK11-NEXT: ret void
2886 //
2887 //
2888 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
2889 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2890 // CHECK11-NEXT: entry:
2891 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2892 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2893 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
2894 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2895 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
2896 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2897 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2898 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2899 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2900 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2901 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2902 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2903 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2904 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2905 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
2906 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2907 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2908 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
2909 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
2910 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
2911 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
2912 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
2913 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
2914 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
2915 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
2916 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2917 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
2918 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2919 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2920 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2921 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
2922 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2923 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
2924 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2925 // CHECK11: omp.precond.then:
2926 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2927 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2928 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
2929 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2930 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2931 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2932 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
2933 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2934 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2935 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2936 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
2937 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2938 // CHECK11: cond.true:
2939 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2940 // CHECK11-NEXT: br label [[COND_END:%.*]]
2941 // CHECK11: cond.false:
2942 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2943 // CHECK11-NEXT: br label [[COND_END]]
2944 // CHECK11: cond.end:
2945 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2946 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2947 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2948 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
2949 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2950 // CHECK11: omp.inner.for.cond:
2951 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
2952 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5
2953 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2954 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2955 // CHECK11: omp.inner.for.body:
2956 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
2957 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
2958 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2959 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !5
2960 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !5
2961 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]]
2962 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !5
2963 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2964 // CHECK11: omp.body.continue:
2965 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2966 // CHECK11: omp.inner.for.inc:
2967 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
2968 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1
2969 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
2970 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
2971 // CHECK11: omp.inner.for.end:
2972 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2973 // CHECK11: omp.loop.exit:
2974 // CHECK11-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2975 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
2976 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
2977 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2978 // CHECK11-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
2979 // CHECK11-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2980 // CHECK11: .omp.final.then:
2981 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2982 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 0
2983 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
2984 // CHECK11-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
2985 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
2986 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
2987 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
2988 // CHECK11: .omp.final.done:
2989 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
2990 // CHECK11: omp.precond.end:
2991 // CHECK11-NEXT: ret void
2992 //
2993 //
2994 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2995 // CHECK11-SAME: () #[[ATTR4:[0-9]+]] {
2996 // CHECK11-NEXT: entry:
2997 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
2998 // CHECK11-NEXT: ret void
2999 //
3000 //
3001 // CHECK12-LABEL: define {{[^@]+}}@_Z15teams_local_argv
3002 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] {
3003 // CHECK12-NEXT: entry:
3004 // CHECK12-NEXT: [[N:%.*]] = alloca i32, align 4
3005 // CHECK12-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
3006 // CHECK12-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
3007 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
3008 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
3009 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
3010 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
3011 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
3012 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
3013 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3014 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3015 // CHECK12-NEXT: store i32 100, i32* [[N]], align 4
3016 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
3017 // CHECK12-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
3018 // CHECK12-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
3019 // CHECK12-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
3020 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
3021 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
3022 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
3023 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
3024 // CHECK12-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
3025 // CHECK12-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
3026 // CHECK12-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3027 // CHECK12-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
3028 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4
3029 // CHECK12-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3030 // CHECK12-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
3031 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4
3032 // CHECK12-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3033 // CHECK12-NEXT: store i64 4, i64* [[TMP10]], align 4
3034 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3035 // CHECK12-NEXT: store i8* null, i8** [[TMP11]], align 4
3036 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3037 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
3038 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4
3039 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3040 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
3041 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4
3042 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
3043 // CHECK12-NEXT: store i64 4, i64* [[TMP16]], align 4
3044 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
3045 // CHECK12-NEXT: store i8* null, i8** [[TMP17]], align 4
3046 // CHECK12-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3047 // CHECK12-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
3048 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4
3049 // CHECK12-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3050 // CHECK12-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
3051 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4
3052 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
3053 // CHECK12-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4
3054 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
3055 // CHECK12-NEXT: store i8* null, i8** [[TMP23]], align 4
3056 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3057 // CHECK12-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3058 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3059 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
3060 // CHECK12-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
3061 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3062 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
3063 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3064 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3065 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3066 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3067 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
3068 // CHECK12-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
3069 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]])
3070 // CHECK12-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l75.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
3071 // CHECK12-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
3072 // CHECK12-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3073 // CHECK12: omp_offload.failed:
3074 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l75(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
3075 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]]
3076 // CHECK12: omp_offload.cont:
3077 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0
3078 // CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
3079 // CHECK12-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
3080 // CHECK12-NEXT: call void @llvm.stackrestore(i8* [[TMP34]])
3081 // CHECK12-NEXT: ret i32 [[TMP33]]
3082 //
3083 //
3084 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l75
3085 // CHECK12-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
3086 // CHECK12-NEXT: entry:
3087 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3088 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
3089 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
3090 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3091 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
3092 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
3093 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
3094 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
3095 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
3096 // CHECK12-NEXT: ret void
3097 //
3098 //
3099 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined.
3100 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
3101 // CHECK12-NEXT: entry:
3102 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3103 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3104 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
3105 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
3106 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
3107 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3108 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
3109 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3110 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3111 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
3112 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3113 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3114 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3115 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3116 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4
3117 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3118 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3119 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
3120 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
3121 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
3122 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
3123 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
3124 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
3125 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
3126 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
3127 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3128 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
3129 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3130 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3131 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3132 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4
3133 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3134 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
3135 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3136 // CHECK12: omp.precond.then:
3137 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3138 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3139 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
3140 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3141 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3142 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3143 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
3144 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3145 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3146 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3147 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
3148 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3149 // CHECK12: cond.true:
3150 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3151 // CHECK12-NEXT: br label [[COND_END:%.*]]
3152 // CHECK12: cond.false:
3153 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3154 // CHECK12-NEXT: br label [[COND_END]]
3155 // CHECK12: cond.end:
3156 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
3157 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3158 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3159 // CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
3160 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3161 // CHECK12: omp.inner.for.cond:
3162 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
3163 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5
3164 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
3165 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3166 // CHECK12: omp.inner.for.body:
3167 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
3168 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
3169 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3170 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !5
3171 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !5
3172 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]]
3173 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !5
3174 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3175 // CHECK12: omp.body.continue:
3176 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3177 // CHECK12: omp.inner.for.inc:
3178 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
3179 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1
3180 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
3181 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
3182 // CHECK12: omp.inner.for.end:
3183 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3184 // CHECK12: omp.loop.exit:
3185 // CHECK12-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3186 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
3187 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
3188 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3189 // CHECK12-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
3190 // CHECK12-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3191 // CHECK12: .omp.final.then:
3192 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3193 // CHECK12-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 0
3194 // CHECK12-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
3195 // CHECK12-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
3196 // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
3197 // CHECK12-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
3198 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
3199 // CHECK12: .omp.final.done:
3200 // CHECK12-NEXT: br label [[OMP_PRECOND_END]]
3201 // CHECK12: omp.precond.end:
3202 // CHECK12-NEXT: ret void
3203 //
3204 //
3205 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3206 // CHECK12-SAME: () #[[ATTR4:[0-9]+]] {
3207 // CHECK12-NEXT: entry:
3208 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1)
3209 // CHECK12-NEXT: ret void
3210 //
3211 //
3212 // CHECK13-LABEL: define {{[^@]+}}@_Z15teams_local_argv
3213 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] {
3214 // CHECK13-NEXT: entry:
3215 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4
3216 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
3217 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
3218 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
3219 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3220 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3221 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3222 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3223 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
3224 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3225 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4
3226 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4
3227 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
3228 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
3229 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
3230 // CHECK13-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
3231 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
3232 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
3233 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
3234 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
3235 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3236 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
3237 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3238 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3239 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3240 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3241 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3242 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
3243 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
3244 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3245 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
3246 // CHECK13-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
3247 // CHECK13: simd.if.then:
3248 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3249 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3250 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3251 // CHECK13: omp.inner.for.cond:
3252 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3253 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
3254 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3255 // CHECK13-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3256 // CHECK13: omp.inner.for.body:
3257 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3258 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3259 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3260 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !2
3261 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !2
3262 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
3263 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]]
3264 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
3265 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3266 // CHECK13: omp.body.continue:
3267 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3268 // CHECK13: omp.inner.for.inc:
3269 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3270 // CHECK13-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], 1
3271 // CHECK13-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3272 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3273 // CHECK13: omp.inner.for.end:
3274 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3275 // CHECK13-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP13]], 0
3276 // CHECK13-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
3277 // CHECK13-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
3278 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
3279 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
3280 // CHECK13-NEXT: br label [[SIMD_IF_END]]
3281 // CHECK13: simd.if.end:
3282 // CHECK13-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0
3283 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARRAYIDX10]], align 4
3284 // CHECK13-NEXT: [[TMP15:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
3285 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP15]])
3286 // CHECK13-NEXT: ret i32 [[TMP14]]
3287 //
3288 //
3289 // CHECK14-LABEL: define {{[^@]+}}@_Z15teams_local_argv
3290 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] {
3291 // CHECK14-NEXT: entry:
3292 // CHECK14-NEXT: [[N:%.*]] = alloca i32, align 4
3293 // CHECK14-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
3294 // CHECK14-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
3295 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
3296 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3297 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3298 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3299 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3300 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
3301 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3302 // CHECK14-NEXT: [[I3:%.*]] = alloca i32, align 4
3303 // CHECK14-NEXT: store i32 100, i32* [[N]], align 4
3304 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
3305 // CHECK14-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
3306 // CHECK14-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
3307 // CHECK14-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
3308 // CHECK14-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
3309 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
3310 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
3311 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
3312 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3313 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
3314 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3315 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3316 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3317 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3318 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3319 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
3320 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4
3321 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3322 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
3323 // CHECK14-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
3324 // CHECK14: simd.if.then:
3325 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3326 // CHECK14-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3327 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3328 // CHECK14: omp.inner.for.cond:
3329 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3330 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
3331 // CHECK14-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3332 // CHECK14-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3333 // CHECK14: omp.inner.for.body:
3334 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3335 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3336 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3337 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !2
3338 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !2
3339 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
3340 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]]
3341 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
3342 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3343 // CHECK14: omp.body.continue:
3344 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3345 // CHECK14: omp.inner.for.inc:
3346 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3347 // CHECK14-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], 1
3348 // CHECK14-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3349 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3350 // CHECK14: omp.inner.for.end:
3351 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3352 // CHECK14-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP13]], 0
3353 // CHECK14-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
3354 // CHECK14-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
3355 // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
3356 // CHECK14-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
3357 // CHECK14-NEXT: br label [[SIMD_IF_END]]
3358 // CHECK14: simd.if.end:
3359 // CHECK14-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0
3360 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARRAYIDX10]], align 4
3361 // CHECK14-NEXT: [[TMP15:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
3362 // CHECK14-NEXT: call void @llvm.stackrestore(i8* [[TMP15]])
3363 // CHECK14-NEXT: ret i32 [[TMP14]]
3364 //
3365 //
3366 // CHECK15-LABEL: define {{[^@]+}}@_Z15teams_local_argv
3367 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] {
3368 // CHECK15-NEXT: entry:
3369 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4
3370 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
3371 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
3372 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
3373 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3374 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3375 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3376 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3377 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
3378 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3379 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
3380 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4
3381 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
3382 // CHECK15-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
3383 // CHECK15-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
3384 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
3385 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
3386 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
3387 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
3388 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3389 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
3390 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3391 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3392 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3393 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3394 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3395 // CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
3396 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
3397 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3398 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
3399 // CHECK15-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
3400 // CHECK15: simd.if.then:
3401 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3402 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3403 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3404 // CHECK15: omp.inner.for.cond:
3405 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3406 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
3407 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3408 // CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3409 // CHECK15: omp.inner.for.body:
3410 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3411 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3412 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3413 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !3
3414 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !3
3415 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP10]]
3416 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
3417 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3418 // CHECK15: omp.body.continue:
3419 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3420 // CHECK15: omp.inner.for.inc:
3421 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3422 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP11]], 1
3423 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3424 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
3425 // CHECK15: omp.inner.for.end:
3426 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3427 // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP12]], 0
3428 // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
3429 // CHECK15-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
3430 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
3431 // CHECK15-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
3432 // CHECK15-NEXT: br label [[SIMD_IF_END]]
3433 // CHECK15: simd.if.end:
3434 // CHECK15-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0
3435 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARRAYIDX10]], align 4
3436 // CHECK15-NEXT: [[TMP14:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
3437 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP14]])
3438 // CHECK15-NEXT: ret i32 [[TMP13]]
3439 //
3440 //
3441 // CHECK16-LABEL: define {{[^@]+}}@_Z15teams_local_argv
3442 // CHECK16-SAME: () #[[ATTR0:[0-9]+]] {
3443 // CHECK16-NEXT: entry:
3444 // CHECK16-NEXT: [[N:%.*]] = alloca i32, align 4
3445 // CHECK16-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
3446 // CHECK16-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
3447 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
3448 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3449 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3450 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3451 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3452 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
3453 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3454 // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4
3455 // CHECK16-NEXT: store i32 100, i32* [[N]], align 4
3456 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
3457 // CHECK16-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
3458 // CHECK16-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
3459 // CHECK16-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
3460 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
3461 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
3462 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
3463 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3464 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
3465 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3466 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3467 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3468 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3469 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3470 // CHECK16-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
3471 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4
3472 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3473 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
3474 // CHECK16-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
3475 // CHECK16: simd.if.then:
3476 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3477 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3478 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3479 // CHECK16: omp.inner.for.cond:
3480 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3481 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
3482 // CHECK16-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3483 // CHECK16-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3484 // CHECK16: omp.inner.for.body:
3485 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3486 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3487 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3488 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !3
3489 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !3
3490 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP10]]
3491 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
3492 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3493 // CHECK16: omp.body.continue:
3494 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3495 // CHECK16: omp.inner.for.inc:
3496 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3497 // CHECK16-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP11]], 1
3498 // CHECK16-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3499 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
3500 // CHECK16: omp.inner.for.end:
3501 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3502 // CHECK16-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP12]], 0
3503 // CHECK16-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
3504 // CHECK16-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
3505 // CHECK16-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
3506 // CHECK16-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
3507 // CHECK16-NEXT: br label [[SIMD_IF_END]]
3508 // CHECK16: simd.if.end:
3509 // CHECK16-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0
3510 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARRAYIDX10]], align 4
3511 // CHECK16-NEXT: [[TMP14:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
3512 // CHECK16-NEXT: call void @llvm.stackrestore(i8* [[TMP14]])
3513 // CHECK16-NEXT: ret i32 [[TMP13]]
3514 //
3515 //
3516 // CHECK17-LABEL: define {{[^@]+}}@_Z21teams_template_structv
3517 // CHECK17-SAME: () #[[ATTR0:[0-9]+]] {
3518 // CHECK17-NEXT: entry:
3519 // CHECK17-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
3520 // CHECK17-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
3521 // CHECK17-NEXT: ret i32 [[CALL]]
3522 //
3523 //
3524 // CHECK17-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
3525 // CHECK17-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
3526 // CHECK17-NEXT: entry:
3527 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3528 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
3529 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
3530 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
3531 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
3532 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
3533 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3534 // CHECK17-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3535 // CHECK17-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 1
3536 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3537 // CHECK17-NEXT: [[TMP0:%.*]] = getelementptr float, float* [[B]], i32 1
3538 // CHECK17-NEXT: [[TMP1:%.*]] = bitcast [123 x i32]* [[A]] to i8*
3539 // CHECK17-NEXT: [[TMP2:%.*]] = bitcast float* [[TMP0]] to i8*
3540 // CHECK17-NEXT: [[TMP3:%.*]] = ptrtoint i8* [[TMP2]] to i64
3541 // CHECK17-NEXT: [[TMP4:%.*]] = ptrtoint i8* [[TMP1]] to i64
3542 // CHECK17-NEXT: [[TMP5:%.*]] = sub i64 [[TMP3]], [[TMP4]]
3543 // CHECK17-NEXT: [[TMP6:%.*]] = sdiv exact i64 [[TMP5]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
3544 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3545 // CHECK17-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to %struct.SS**
3546 // CHECK17-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP8]], align 8
3547 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3548 // CHECK17-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [123 x i32]**
3549 // CHECK17-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP10]], align 8
3550 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3551 // CHECK17-NEXT: store i64 [[TMP6]], i64* [[TMP11]], align 8
3552 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3553 // CHECK17-NEXT: store i8* null, i8** [[TMP12]], align 8
3554 // CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3555 // CHECK17-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to %struct.SS**
3556 // CHECK17-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP14]], align 8
3557 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3558 // CHECK17-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to float**
3559 // CHECK17-NEXT: store float* [[B]], float** [[TMP16]], align 8
3560 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
3561 // CHECK17-NEXT: store i64 4, i64* [[TMP17]], align 8
3562 // CHECK17-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
3563 // CHECK17-NEXT: store i8* null, i8** [[TMP18]], align 8
3564 // CHECK17-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3565 // CHECK17-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to %struct.SS**
3566 // CHECK17-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP20]], align 8
3567 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3568 // CHECK17-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [123 x i32]**
3569 // CHECK17-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP22]], align 8
3570 // CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
3571 // CHECK17-NEXT: store i64 492, i64* [[TMP23]], align 8
3572 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
3573 // CHECK17-NEXT: store i8* null, i8** [[TMP24]], align 8
3574 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3575 // CHECK17-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3576 // CHECK17-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3577 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123)
3578 // CHECK17-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123.region_id, i32 3, i8** [[TMP25]], i8** [[TMP26]], i64* [[TMP27]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
3579 // CHECK17-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
3580 // CHECK17-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3581 // CHECK17: omp_offload.failed:
3582 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
3583 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]]
3584 // CHECK17: omp_offload.cont:
3585 // CHECK17-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3586 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i64 0, i64 0
3587 // CHECK17-NEXT: [[TMP30:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
3588 // CHECK17-NEXT: ret i32 [[TMP30]]
3589 //
3590 //
3591 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123
3592 // CHECK17-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
3593 // CHECK17-NEXT: entry:
3594 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3595 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3596 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3597 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3598 // CHECK17-NEXT: ret void
3599 //
3600 //
3601 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined.
3602 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3603 // CHECK17-NEXT: entry:
3604 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3605 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3606 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3607 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3608 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
3609 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3610 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3611 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3612 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3613 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
3614 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3615 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3616 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3617 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3618 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3619 // CHECK17-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
3620 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3621 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3622 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3623 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3624 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3625 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3626 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3627 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3628 // CHECK17: cond.true:
3629 // CHECK17-NEXT: br label [[COND_END:%.*]]
3630 // CHECK17: cond.false:
3631 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3632 // CHECK17-NEXT: br label [[COND_END]]
3633 // CHECK17: cond.end:
3634 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3635 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3636 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3637 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3638 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3639 // CHECK17: omp.inner.for.cond:
3640 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
3641 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !4
3642 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3643 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3644 // CHECK17: omp.inner.for.body:
3645 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
3646 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3647 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3648 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !4
3649 // CHECK17-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1
3650 // CHECK17-NEXT: [[TMP9:%.*]] = load float, float* [[B]], align 4, !llvm.access.group !4
3651 // CHECK17-NEXT: [[CONV:%.*]] = fptosi float [[TMP9]] to i32
3652 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0
3653 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !4
3654 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64
3655 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
3656 // CHECK17-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !4
3657 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3658 // CHECK17: omp.body.continue:
3659 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3660 // CHECK17: omp.inner.for.inc:
3661 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
3662 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
3663 // CHECK17-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
3664 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
3665 // CHECK17: omp.inner.for.end:
3666 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3667 // CHECK17: omp.loop.exit:
3668 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3669 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3670 // CHECK17-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
3671 // CHECK17-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3672 // CHECK17: .omp.final.then:
3673 // CHECK17-NEXT: store i32 123, i32* [[I]], align 4
3674 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
3675 // CHECK17: .omp.final.done:
3676 // CHECK17-NEXT: ret void
3677 //
3678 //
3679 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3680 // CHECK17-SAME: () #[[ATTR3:[0-9]+]] {
3681 // CHECK17-NEXT: entry:
3682 // CHECK17-NEXT: call void @__tgt_register_requires(i64 1)
3683 // CHECK17-NEXT: ret void
3684 //
3685 //
3686 // CHECK18-LABEL: define {{[^@]+}}@_Z21teams_template_structv
3687 // CHECK18-SAME: () #[[ATTR0:[0-9]+]] {
3688 // CHECK18-NEXT: entry:
3689 // CHECK18-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
3690 // CHECK18-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
3691 // CHECK18-NEXT: ret i32 [[CALL]]
3692 //
3693 //
3694 // CHECK18-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
3695 // CHECK18-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
3696 // CHECK18-NEXT: entry:
3697 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3698 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
3699 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
3700 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
3701 // CHECK18-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
3702 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
3703 // CHECK18-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3704 // CHECK18-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3705 // CHECK18-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 1
3706 // CHECK18-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3707 // CHECK18-NEXT: [[TMP0:%.*]] = getelementptr float, float* [[B]], i32 1
3708 // CHECK18-NEXT: [[TMP1:%.*]] = bitcast [123 x i32]* [[A]] to i8*
3709 // CHECK18-NEXT: [[TMP2:%.*]] = bitcast float* [[TMP0]] to i8*
3710 // CHECK18-NEXT: [[TMP3:%.*]] = ptrtoint i8* [[TMP2]] to i64
3711 // CHECK18-NEXT: [[TMP4:%.*]] = ptrtoint i8* [[TMP1]] to i64
3712 // CHECK18-NEXT: [[TMP5:%.*]] = sub i64 [[TMP3]], [[TMP4]]
3713 // CHECK18-NEXT: [[TMP6:%.*]] = sdiv exact i64 [[TMP5]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
3714 // CHECK18-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3715 // CHECK18-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to %struct.SS**
3716 // CHECK18-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP8]], align 8
3717 // CHECK18-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3718 // CHECK18-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [123 x i32]**
3719 // CHECK18-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP10]], align 8
3720 // CHECK18-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3721 // CHECK18-NEXT: store i64 [[TMP6]], i64* [[TMP11]], align 8
3722 // CHECK18-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3723 // CHECK18-NEXT: store i8* null, i8** [[TMP12]], align 8
3724 // CHECK18-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3725 // CHECK18-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to %struct.SS**
3726 // CHECK18-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP14]], align 8
3727 // CHECK18-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3728 // CHECK18-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to float**
3729 // CHECK18-NEXT: store float* [[B]], float** [[TMP16]], align 8
3730 // CHECK18-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
3731 // CHECK18-NEXT: store i64 4, i64* [[TMP17]], align 8
3732 // CHECK18-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
3733 // CHECK18-NEXT: store i8* null, i8** [[TMP18]], align 8
3734 // CHECK18-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3735 // CHECK18-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to %struct.SS**
3736 // CHECK18-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP20]], align 8
3737 // CHECK18-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3738 // CHECK18-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [123 x i32]**
3739 // CHECK18-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP22]], align 8
3740 // CHECK18-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
3741 // CHECK18-NEXT: store i64 492, i64* [[TMP23]], align 8
3742 // CHECK18-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
3743 // CHECK18-NEXT: store i8* null, i8** [[TMP24]], align 8
3744 // CHECK18-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3745 // CHECK18-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3746 // CHECK18-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3747 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123)
3748 // CHECK18-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123.region_id, i32 3, i8** [[TMP25]], i8** [[TMP26]], i64* [[TMP27]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
3749 // CHECK18-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
3750 // CHECK18-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3751 // CHECK18: omp_offload.failed:
3752 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
3753 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]]
3754 // CHECK18: omp_offload.cont:
3755 // CHECK18-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3756 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i64 0, i64 0
3757 // CHECK18-NEXT: [[TMP30:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
3758 // CHECK18-NEXT: ret i32 [[TMP30]]
3759 //
3760 //
3761 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123
3762 // CHECK18-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
3763 // CHECK18-NEXT: entry:
3764 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3765 // CHECK18-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3766 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3767 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3768 // CHECK18-NEXT: ret void
3769 //
3770 //
3771 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined.
3772 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3773 // CHECK18-NEXT: entry:
3774 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3775 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3776 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3777 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3778 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
3779 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3780 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3781 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3782 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3783 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
3784 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3785 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3786 // CHECK18-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3787 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3788 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3789 // CHECK18-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
3790 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3791 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3792 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3793 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3794 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3795 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3796 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3797 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3798 // CHECK18: cond.true:
3799 // CHECK18-NEXT: br label [[COND_END:%.*]]
3800 // CHECK18: cond.false:
3801 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3802 // CHECK18-NEXT: br label [[COND_END]]
3803 // CHECK18: cond.end:
3804 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3805 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3806 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3807 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3808 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3809 // CHECK18: omp.inner.for.cond:
3810 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
3811 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !4
3812 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3813 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3814 // CHECK18: omp.inner.for.body:
3815 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
3816 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3817 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3818 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !4
3819 // CHECK18-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1
3820 // CHECK18-NEXT: [[TMP9:%.*]] = load float, float* [[B]], align 4, !llvm.access.group !4
3821 // CHECK18-NEXT: [[CONV:%.*]] = fptosi float [[TMP9]] to i32
3822 // CHECK18-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0
3823 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !4
3824 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64
3825 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
3826 // CHECK18-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !4
3827 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3828 // CHECK18: omp.body.continue:
3829 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3830 // CHECK18: omp.inner.for.inc:
3831 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
3832 // CHECK18-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
3833 // CHECK18-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
3834 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
3835 // CHECK18: omp.inner.for.end:
3836 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3837 // CHECK18: omp.loop.exit:
3838 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3839 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3840 // CHECK18-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
3841 // CHECK18-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3842 // CHECK18: .omp.final.then:
3843 // CHECK18-NEXT: store i32 123, i32* [[I]], align 4
3844 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
3845 // CHECK18: .omp.final.done:
3846 // CHECK18-NEXT: ret void
3847 //
3848 //
3849 // CHECK18-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3850 // CHECK18-SAME: () #[[ATTR3:[0-9]+]] {
3851 // CHECK18-NEXT: entry:
3852 // CHECK18-NEXT: call void @__tgt_register_requires(i64 1)
3853 // CHECK18-NEXT: ret void
3854 //
3855 //
3856 // CHECK19-LABEL: define {{[^@]+}}@_Z21teams_template_structv
3857 // CHECK19-SAME: () #[[ATTR0:[0-9]+]] {
3858 // CHECK19-NEXT: entry:
3859 // CHECK19-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
3860 // CHECK19-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
3861 // CHECK19-NEXT: ret i32 [[CALL]]
3862 //
3863 //
3864 // CHECK19-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
3865 // CHECK19-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
3866 // CHECK19-NEXT: entry:
3867 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3868 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
3869 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
3870 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
3871 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
3872 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
3873 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3874 // CHECK19-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3875 // CHECK19-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 1
3876 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3877 // CHECK19-NEXT: [[TMP0:%.*]] = getelementptr float, float* [[B]], i32 1
3878 // CHECK19-NEXT: [[TMP1:%.*]] = bitcast [123 x i32]* [[A]] to i8*
3879 // CHECK19-NEXT: [[TMP2:%.*]] = bitcast float* [[TMP0]] to i8*
3880 // CHECK19-NEXT: [[TMP3:%.*]] = ptrtoint i8* [[TMP2]] to i64
3881 // CHECK19-NEXT: [[TMP4:%.*]] = ptrtoint i8* [[TMP1]] to i64
3882 // CHECK19-NEXT: [[TMP5:%.*]] = sub i64 [[TMP3]], [[TMP4]]
3883 // CHECK19-NEXT: [[TMP6:%.*]] = sdiv exact i64 [[TMP5]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
3884 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3885 // CHECK19-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to %struct.SS**
3886 // CHECK19-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP8]], align 4
3887 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3888 // CHECK19-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [123 x i32]**
3889 // CHECK19-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP10]], align 4
3890 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3891 // CHECK19-NEXT: store i64 [[TMP6]], i64* [[TMP11]], align 4
3892 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3893 // CHECK19-NEXT: store i8* null, i8** [[TMP12]], align 4
3894 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3895 // CHECK19-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to %struct.SS**
3896 // CHECK19-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP14]], align 4
3897 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3898 // CHECK19-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to float**
3899 // CHECK19-NEXT: store float* [[B]], float** [[TMP16]], align 4
3900 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
3901 // CHECK19-NEXT: store i64 4, i64* [[TMP17]], align 4
3902 // CHECK19-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
3903 // CHECK19-NEXT: store i8* null, i8** [[TMP18]], align 4
3904 // CHECK19-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3905 // CHECK19-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to %struct.SS**
3906 // CHECK19-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP20]], align 4
3907 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3908 // CHECK19-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [123 x i32]**
3909 // CHECK19-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP22]], align 4
3910 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
3911 // CHECK19-NEXT: store i64 492, i64* [[TMP23]], align 4
3912 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
3913 // CHECK19-NEXT: store i8* null, i8** [[TMP24]], align 4
3914 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3915 // CHECK19-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3916 // CHECK19-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3917 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123)
3918 // CHECK19-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123.region_id, i32 3, i8** [[TMP25]], i8** [[TMP26]], i64* [[TMP27]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
3919 // CHECK19-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
3920 // CHECK19-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3921 // CHECK19: omp_offload.failed:
3922 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
3923 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]]
3924 // CHECK19: omp_offload.cont:
3925 // CHECK19-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3926 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i32 0, i32 0
3927 // CHECK19-NEXT: [[TMP30:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
3928 // CHECK19-NEXT: ret i32 [[TMP30]]
3929 //
3930 //
3931 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123
3932 // CHECK19-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
3933 // CHECK19-NEXT: entry:
3934 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3935 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3936 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3937 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3938 // CHECK19-NEXT: ret void
3939 //
3940 //
3941 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined.
3942 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3943 // CHECK19-NEXT: entry:
3944 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3945 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3946 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3947 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3948 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
3949 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3950 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3951 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3952 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3953 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
3954 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3955 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3956 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3957 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3958 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3959 // CHECK19-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
3960 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3961 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3962 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3963 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3964 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3965 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3966 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3967 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3968 // CHECK19: cond.true:
3969 // CHECK19-NEXT: br label [[COND_END:%.*]]
3970 // CHECK19: cond.false:
3971 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3972 // CHECK19-NEXT: br label [[COND_END]]
3973 // CHECK19: cond.end:
3974 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3975 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3976 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3977 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3978 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3979 // CHECK19: omp.inner.for.cond:
3980 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
3981 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5
3982 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3983 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3984 // CHECK19: omp.inner.for.body:
3985 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
3986 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3987 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3988 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5
3989 // CHECK19-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1
3990 // CHECK19-NEXT: [[TMP9:%.*]] = load float, float* [[B]], align 4, !llvm.access.group !5
3991 // CHECK19-NEXT: [[CONV:%.*]] = fptosi float [[TMP9]] to i32
3992 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0
3993 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5
3994 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP10]]
3995 // CHECK19-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !5
3996 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3997 // CHECK19: omp.body.continue:
3998 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3999 // CHECK19: omp.inner.for.inc:
4000 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
4001 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
4002 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
4003 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
4004 // CHECK19: omp.inner.for.end:
4005 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4006 // CHECK19: omp.loop.exit:
4007 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4008 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4009 // CHECK19-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
4010 // CHECK19-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4011 // CHECK19: .omp.final.then:
4012 // CHECK19-NEXT: store i32 123, i32* [[I]], align 4
4013 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
4014 // CHECK19: .omp.final.done:
4015 // CHECK19-NEXT: ret void
4016 //
4017 //
4018 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4019 // CHECK19-SAME: () #[[ATTR3:[0-9]+]] {
4020 // CHECK19-NEXT: entry:
4021 // CHECK19-NEXT: call void @__tgt_register_requires(i64 1)
4022 // CHECK19-NEXT: ret void
4023 //
4024 //
4025 // CHECK20-LABEL: define {{[^@]+}}@_Z21teams_template_structv
4026 // CHECK20-SAME: () #[[ATTR0:[0-9]+]] {
4027 // CHECK20-NEXT: entry:
4028 // CHECK20-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
4029 // CHECK20-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
4030 // CHECK20-NEXT: ret i32 [[CALL]]
4031 //
4032 //
4033 // CHECK20-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
4034 // CHECK20-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
4035 // CHECK20-NEXT: entry:
4036 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4037 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
4038 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
4039 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
4040 // CHECK20-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
4041 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
4042 // CHECK20-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4043 // CHECK20-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4044 // CHECK20-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 1
4045 // CHECK20-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4046 // CHECK20-NEXT: [[TMP0:%.*]] = getelementptr float, float* [[B]], i32 1
4047 // CHECK20-NEXT: [[TMP1:%.*]] = bitcast [123 x i32]* [[A]] to i8*
4048 // CHECK20-NEXT: [[TMP2:%.*]] = bitcast float* [[TMP0]] to i8*
4049 // CHECK20-NEXT: [[TMP3:%.*]] = ptrtoint i8* [[TMP2]] to i64
4050 // CHECK20-NEXT: [[TMP4:%.*]] = ptrtoint i8* [[TMP1]] to i64
4051 // CHECK20-NEXT: [[TMP5:%.*]] = sub i64 [[TMP3]], [[TMP4]]
4052 // CHECK20-NEXT: [[TMP6:%.*]] = sdiv exact i64 [[TMP5]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
4053 // CHECK20-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4054 // CHECK20-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to %struct.SS**
4055 // CHECK20-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP8]], align 4
4056 // CHECK20-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4057 // CHECK20-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [123 x i32]**
4058 // CHECK20-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP10]], align 4
4059 // CHECK20-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4060 // CHECK20-NEXT: store i64 [[TMP6]], i64* [[TMP11]], align 4
4061 // CHECK20-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4062 // CHECK20-NEXT: store i8* null, i8** [[TMP12]], align 4
4063 // CHECK20-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4064 // CHECK20-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to %struct.SS**
4065 // CHECK20-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP14]], align 4
4066 // CHECK20-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4067 // CHECK20-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to float**
4068 // CHECK20-NEXT: store float* [[B]], float** [[TMP16]], align 4
4069 // CHECK20-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
4070 // CHECK20-NEXT: store i64 4, i64* [[TMP17]], align 4
4071 // CHECK20-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
4072 // CHECK20-NEXT: store i8* null, i8** [[TMP18]], align 4
4073 // CHECK20-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4074 // CHECK20-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to %struct.SS**
4075 // CHECK20-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP20]], align 4
4076 // CHECK20-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4077 // CHECK20-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [123 x i32]**
4078 // CHECK20-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP22]], align 4
4079 // CHECK20-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
4080 // CHECK20-NEXT: store i64 492, i64* [[TMP23]], align 4
4081 // CHECK20-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
4082 // CHECK20-NEXT: store i8* null, i8** [[TMP24]], align 4
4083 // CHECK20-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4084 // CHECK20-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4085 // CHECK20-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4086 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123)
4087 // CHECK20-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123.region_id, i32 3, i8** [[TMP25]], i8** [[TMP26]], i64* [[TMP27]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
4088 // CHECK20-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
4089 // CHECK20-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4090 // CHECK20: omp_offload.failed:
4091 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
4092 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]]
4093 // CHECK20: omp_offload.cont:
4094 // CHECK20-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4095 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i32 0, i32 0
4096 // CHECK20-NEXT: [[TMP30:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
4097 // CHECK20-NEXT: ret i32 [[TMP30]]
4098 //
4099 //
4100 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123
4101 // CHECK20-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
4102 // CHECK20-NEXT: entry:
4103 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4104 // CHECK20-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4105 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4106 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4107 // CHECK20-NEXT: ret void
4108 //
4109 //
4110 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined.
4111 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4112 // CHECK20-NEXT: entry:
4113 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4114 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4115 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4116 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4117 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
4118 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4119 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4120 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4121 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4122 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
4123 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4124 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4125 // CHECK20-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4126 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4127 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4128 // CHECK20-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
4129 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4130 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4131 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4132 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4133 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4134 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4135 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4136 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4137 // CHECK20: cond.true:
4138 // CHECK20-NEXT: br label [[COND_END:%.*]]
4139 // CHECK20: cond.false:
4140 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4141 // CHECK20-NEXT: br label [[COND_END]]
4142 // CHECK20: cond.end:
4143 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4144 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4145 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4146 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4147 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4148 // CHECK20: omp.inner.for.cond:
4149 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
4150 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5
4151 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4152 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4153 // CHECK20: omp.inner.for.body:
4154 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
4155 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
4156 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4157 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5
4158 // CHECK20-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1
4159 // CHECK20-NEXT: [[TMP9:%.*]] = load float, float* [[B]], align 4, !llvm.access.group !5
4160 // CHECK20-NEXT: [[CONV:%.*]] = fptosi float [[TMP9]] to i32
4161 // CHECK20-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0
4162 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5
4163 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP10]]
4164 // CHECK20-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !5
4165 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4166 // CHECK20: omp.body.continue:
4167 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4168 // CHECK20: omp.inner.for.inc:
4169 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
4170 // CHECK20-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1
4171 // CHECK20-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
4172 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
4173 // CHECK20: omp.inner.for.end:
4174 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4175 // CHECK20: omp.loop.exit:
4176 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4177 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4178 // CHECK20-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
4179 // CHECK20-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4180 // CHECK20: .omp.final.then:
4181 // CHECK20-NEXT: store i32 123, i32* [[I]], align 4
4182 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
4183 // CHECK20: .omp.final.done:
4184 // CHECK20-NEXT: ret void
4185 //
4186 //
4187 // CHECK20-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4188 // CHECK20-SAME: () #[[ATTR3:[0-9]+]] {
4189 // CHECK20-NEXT: entry:
4190 // CHECK20-NEXT: call void @__tgt_register_requires(i64 1)
4191 // CHECK20-NEXT: ret void
4192 //
4193 //
4194 // CHECK21-LABEL: define {{[^@]+}}@_Z21teams_template_structv
4195 // CHECK21-SAME: () #[[ATTR0:[0-9]+]] {
4196 // CHECK21-NEXT: entry:
4197 // CHECK21-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
4198 // CHECK21-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
4199 // CHECK21-NEXT: ret i32 [[CALL]]
4200 //
4201 //
4202 // CHECK21-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
4203 // CHECK21-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
4204 // CHECK21-NEXT: entry:
4205 // CHECK21-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4206 // CHECK21-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
4207 // CHECK21-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
4208 // CHECK21-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
4209 // CHECK21-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
4210 // CHECK21-NEXT: [[TMP:%.*]] = alloca i32, align 4
4211 // CHECK21-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4212 // CHECK21-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4213 // CHECK21-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 1
4214 // CHECK21-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4215 // CHECK21-NEXT: [[TMP0:%.*]] = getelementptr float, float* [[B]], i32 1
4216 // CHECK21-NEXT: [[TMP1:%.*]] = bitcast [123 x i32]* [[A]] to i8*
4217 // CHECK21-NEXT: [[TMP2:%.*]] = bitcast float* [[TMP0]] to i8*
4218 // CHECK21-NEXT: [[TMP3:%.*]] = ptrtoint i8* [[TMP2]] to i64
4219 // CHECK21-NEXT: [[TMP4:%.*]] = ptrtoint i8* [[TMP1]] to i64
4220 // CHECK21-NEXT: [[TMP5:%.*]] = sub i64 [[TMP3]], [[TMP4]]
4221 // CHECK21-NEXT: [[TMP6:%.*]] = sdiv exact i64 [[TMP5]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
4222 // CHECK21-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4223 // CHECK21-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to %struct.SS**
4224 // CHECK21-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP8]], align 8
4225 // CHECK21-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4226 // CHECK21-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [123 x i32]**
4227 // CHECK21-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP10]], align 8
4228 // CHECK21-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4229 // CHECK21-NEXT: store i64 [[TMP6]], i64* [[TMP11]], align 8
4230 // CHECK21-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4231 // CHECK21-NEXT: store i8* null, i8** [[TMP12]], align 8
4232 // CHECK21-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4233 // CHECK21-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to %struct.SS**
4234 // CHECK21-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP14]], align 8
4235 // CHECK21-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4236 // CHECK21-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to float**
4237 // CHECK21-NEXT: store float* [[B]], float** [[TMP16]], align 8
4238 // CHECK21-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
4239 // CHECK21-NEXT: store i64 4, i64* [[TMP17]], align 8
4240 // CHECK21-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
4241 // CHECK21-NEXT: store i8* null, i8** [[TMP18]], align 8
4242 // CHECK21-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4243 // CHECK21-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to %struct.SS**
4244 // CHECK21-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP20]], align 8
4245 // CHECK21-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4246 // CHECK21-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [123 x i32]**
4247 // CHECK21-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP22]], align 8
4248 // CHECK21-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
4249 // CHECK21-NEXT: store i64 492, i64* [[TMP23]], align 8
4250 // CHECK21-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
4251 // CHECK21-NEXT: store i8* null, i8** [[TMP24]], align 8
4252 // CHECK21-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4253 // CHECK21-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4254 // CHECK21-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4255 // CHECK21-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123)
4256 // CHECK21-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123.region_id, i32 3, i8** [[TMP25]], i8** [[TMP26]], i64* [[TMP27]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
4257 // CHECK21-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
4258 // CHECK21-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4259 // CHECK21: omp_offload.failed:
4260 // CHECK21-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
4261 // CHECK21-NEXT: br label [[OMP_OFFLOAD_CONT]]
4262 // CHECK21: omp_offload.cont:
4263 // CHECK21-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4264 // CHECK21-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i64 0, i64 0
4265 // CHECK21-NEXT: [[TMP30:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
4266 // CHECK21-NEXT: ret i32 [[TMP30]]
4267 //
4268 //
4269 // CHECK21-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123
4270 // CHECK21-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
4271 // CHECK21-NEXT: entry:
4272 // CHECK21-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4273 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
4274 // CHECK21-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
4275 // CHECK21-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4276 // CHECK21-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4277 // CHECK21-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1
4278 // CHECK21-NEXT: [[TMP1:%.*]] = load float, float* [[B]], align 4
4279 // CHECK21-NEXT: [[TOBOOL:%.*]] = fcmp une float [[TMP1]], 0.000000e+00
4280 // CHECK21-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
4281 // CHECK21-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
4282 // CHECK21-NEXT: [[TMP2:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4283 // CHECK21-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP2]] to i1
4284 // CHECK21-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
4285 // CHECK21-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
4286 // CHECK21-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
4287 // CHECK21-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
4288 // CHECK21-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]], i64 [[TMP3]])
4289 // CHECK21-NEXT: ret void
4290 //
4291 //
4292 // CHECK21-LABEL: define {{[^@]+}}@.omp_outlined.
4293 // CHECK21-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
4294 // CHECK21-NEXT: entry:
4295 // CHECK21-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4296 // CHECK21-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4297 // CHECK21-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4298 // CHECK21-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
4299 // CHECK21-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4300 // CHECK21-NEXT: [[TMP:%.*]] = alloca i32, align 4
4301 // CHECK21-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4302 // CHECK21-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4303 // CHECK21-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4304 // CHECK21-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4305 // CHECK21-NEXT: [[I:%.*]] = alloca i32, align 4
4306 // CHECK21-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4307 // CHECK21-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4308 // CHECK21-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4309 // CHECK21-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4310 // CHECK21-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4311 // CHECK21-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
4312 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4313 // CHECK21-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
4314 // CHECK21-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4315 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4316 // CHECK21-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4317 // CHECK21-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4318 // CHECK21-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4319 // CHECK21-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4320 // CHECK21-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4321 // CHECK21-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4322 // CHECK21: cond.true:
4323 // CHECK21-NEXT: br label [[COND_END:%.*]]
4324 // CHECK21: cond.false:
4325 // CHECK21-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4326 // CHECK21-NEXT: br label [[COND_END]]
4327 // CHECK21: cond.end:
4328 // CHECK21-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4329 // CHECK21-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4330 // CHECK21-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4331 // CHECK21-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4332 // CHECK21-NEXT: [[TMP6:%.*]] = load i8, i8* [[CONV]], align 8
4333 // CHECK21-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP6]] to i1
4334 // CHECK21-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4335 // CHECK21: omp_if.then:
4336 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4337 // CHECK21: omp.inner.for.cond:
4338 // CHECK21-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
4339 // CHECK21-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !4
4340 // CHECK21-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4341 // CHECK21-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4342 // CHECK21: omp.inner.for.body:
4343 // CHECK21-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
4344 // CHECK21-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4345 // CHECK21-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4346 // CHECK21-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !4
4347 // CHECK21-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1
4348 // CHECK21-NEXT: [[TMP10:%.*]] = load float, float* [[B]], align 4, !nontemporal !5, !llvm.access.group !4
4349 // CHECK21-NEXT: [[CONV2:%.*]] = fptosi float [[TMP10]] to i32
4350 // CHECK21-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0
4351 // CHECK21-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !4
4352 // CHECK21-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
4353 // CHECK21-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
4354 // CHECK21-NEXT: store i32 [[CONV2]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !4
4355 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4356 // CHECK21: omp.body.continue:
4357 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4358 // CHECK21: omp.inner.for.inc:
4359 // CHECK21-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
4360 // CHECK21-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
4361 // CHECK21-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
4362 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
4363 // CHECK21: omp.inner.for.end:
4364 // CHECK21-NEXT: br label [[OMP_IF_END:%.*]]
4365 // CHECK21: omp_if.else:
4366 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND4:%.*]]
4367 // CHECK21: omp.inner.for.cond4:
4368 // CHECK21-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4369 // CHECK21-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4370 // CHECK21-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
4371 // CHECK21-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY6:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
4372 // CHECK21: omp.inner.for.body6:
4373 // CHECK21-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4374 // CHECK21-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP15]], 1
4375 // CHECK21-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]]
4376 // CHECK21-NEXT: store i32 [[ADD8]], i32* [[I]], align 4
4377 // CHECK21-NEXT: [[B9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 1
4378 // CHECK21-NEXT: [[TMP16:%.*]] = load float, float* [[B9]], align 4
4379 // CHECK21-NEXT: [[CONV10:%.*]] = fptosi float [[TMP16]] to i32
4380 // CHECK21-NEXT: [[A11:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0
4381 // CHECK21-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4
4382 // CHECK21-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP17]] to i64
4383 // CHECK21-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A11]], i64 0, i64 [[IDXPROM12]]
4384 // CHECK21-NEXT: store i32 [[CONV10]], i32* [[ARRAYIDX13]], align 4
4385 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]]
4386 // CHECK21: omp.body.continue14:
4387 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]]
4388 // CHECK21: omp.inner.for.inc15:
4389 // CHECK21-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4390 // CHECK21-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP18]], 1
4391 // CHECK21-NEXT: store i32 [[ADD16]], i32* [[DOTOMP_IV]], align 4
4392 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND4]], !llvm.loop [[LOOP9:![0-9]+]]
4393 // CHECK21: omp.inner.for.end17:
4394 // CHECK21-NEXT: br label [[OMP_IF_END]]
4395 // CHECK21: omp_if.end:
4396 // CHECK21-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4397 // CHECK21: omp.loop.exit:
4398 // CHECK21-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4399 // CHECK21-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4400 // CHECK21-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
4401 // CHECK21-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4402 // CHECK21: .omp.final.then:
4403 // CHECK21-NEXT: store i32 123, i32* [[I]], align 4
4404 // CHECK21-NEXT: br label [[DOTOMP_FINAL_DONE]]
4405 // CHECK21: .omp.final.done:
4406 // CHECK21-NEXT: ret void
4407 //
4408 //
4409 // CHECK21-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4410 // CHECK21-SAME: () #[[ATTR3:[0-9]+]] {
4411 // CHECK21-NEXT: entry:
4412 // CHECK21-NEXT: call void @__tgt_register_requires(i64 1)
4413 // CHECK21-NEXT: ret void
4414 //
4415 //
4416 // CHECK22-LABEL: define {{[^@]+}}@_Z21teams_template_structv
4417 // CHECK22-SAME: () #[[ATTR0:[0-9]+]] {
4418 // CHECK22-NEXT: entry:
4419 // CHECK22-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
4420 // CHECK22-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
4421 // CHECK22-NEXT: ret i32 [[CALL]]
4422 //
4423 //
4424 // CHECK22-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
4425 // CHECK22-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
4426 // CHECK22-NEXT: entry:
4427 // CHECK22-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4428 // CHECK22-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
4429 // CHECK22-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
4430 // CHECK22-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
4431 // CHECK22-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
4432 // CHECK22-NEXT: [[TMP:%.*]] = alloca i32, align 4
4433 // CHECK22-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4434 // CHECK22-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4435 // CHECK22-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 1
4436 // CHECK22-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4437 // CHECK22-NEXT: [[TMP0:%.*]] = getelementptr float, float* [[B]], i32 1
4438 // CHECK22-NEXT: [[TMP1:%.*]] = bitcast [123 x i32]* [[A]] to i8*
4439 // CHECK22-NEXT: [[TMP2:%.*]] = bitcast float* [[TMP0]] to i8*
4440 // CHECK22-NEXT: [[TMP3:%.*]] = ptrtoint i8* [[TMP2]] to i64
4441 // CHECK22-NEXT: [[TMP4:%.*]] = ptrtoint i8* [[TMP1]] to i64
4442 // CHECK22-NEXT: [[TMP5:%.*]] = sub i64 [[TMP3]], [[TMP4]]
4443 // CHECK22-NEXT: [[TMP6:%.*]] = sdiv exact i64 [[TMP5]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
4444 // CHECK22-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4445 // CHECK22-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to %struct.SS**
4446 // CHECK22-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP8]], align 8
4447 // CHECK22-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4448 // CHECK22-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [123 x i32]**
4449 // CHECK22-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP10]], align 8
4450 // CHECK22-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4451 // CHECK22-NEXT: store i64 [[TMP6]], i64* [[TMP11]], align 8
4452 // CHECK22-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4453 // CHECK22-NEXT: store i8* null, i8** [[TMP12]], align 8
4454 // CHECK22-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4455 // CHECK22-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to %struct.SS**
4456 // CHECK22-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP14]], align 8
4457 // CHECK22-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4458 // CHECK22-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to float**
4459 // CHECK22-NEXT: store float* [[B]], float** [[TMP16]], align 8
4460 // CHECK22-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
4461 // CHECK22-NEXT: store i64 4, i64* [[TMP17]], align 8
4462 // CHECK22-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
4463 // CHECK22-NEXT: store i8* null, i8** [[TMP18]], align 8
4464 // CHECK22-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4465 // CHECK22-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to %struct.SS**
4466 // CHECK22-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP20]], align 8
4467 // CHECK22-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4468 // CHECK22-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [123 x i32]**
4469 // CHECK22-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP22]], align 8
4470 // CHECK22-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
4471 // CHECK22-NEXT: store i64 492, i64* [[TMP23]], align 8
4472 // CHECK22-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
4473 // CHECK22-NEXT: store i8* null, i8** [[TMP24]], align 8
4474 // CHECK22-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4475 // CHECK22-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4476 // CHECK22-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4477 // CHECK22-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123)
4478 // CHECK22-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123.region_id, i32 3, i8** [[TMP25]], i8** [[TMP26]], i64* [[TMP27]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
4479 // CHECK22-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
4480 // CHECK22-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4481 // CHECK22: omp_offload.failed:
4482 // CHECK22-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
4483 // CHECK22-NEXT: br label [[OMP_OFFLOAD_CONT]]
4484 // CHECK22: omp_offload.cont:
4485 // CHECK22-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4486 // CHECK22-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i64 0, i64 0
4487 // CHECK22-NEXT: [[TMP30:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
4488 // CHECK22-NEXT: ret i32 [[TMP30]]
4489 //
4490 //
4491 // CHECK22-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123
4492 // CHECK22-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
4493 // CHECK22-NEXT: entry:
4494 // CHECK22-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4495 // CHECK22-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
4496 // CHECK22-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
4497 // CHECK22-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4498 // CHECK22-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4499 // CHECK22-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1
4500 // CHECK22-NEXT: [[TMP1:%.*]] = load float, float* [[B]], align 4
4501 // CHECK22-NEXT: [[TOBOOL:%.*]] = fcmp une float [[TMP1]], 0.000000e+00
4502 // CHECK22-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
4503 // CHECK22-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
4504 // CHECK22-NEXT: [[TMP2:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4505 // CHECK22-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP2]] to i1
4506 // CHECK22-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
4507 // CHECK22-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
4508 // CHECK22-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
4509 // CHECK22-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
4510 // CHECK22-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]], i64 [[TMP3]])
4511 // CHECK22-NEXT: ret void
4512 //
4513 //
4514 // CHECK22-LABEL: define {{[^@]+}}@.omp_outlined.
4515 // CHECK22-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
4516 // CHECK22-NEXT: entry:
4517 // CHECK22-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4518 // CHECK22-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4519 // CHECK22-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4520 // CHECK22-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
4521 // CHECK22-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4522 // CHECK22-NEXT: [[TMP:%.*]] = alloca i32, align 4
4523 // CHECK22-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4524 // CHECK22-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4525 // CHECK22-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4526 // CHECK22-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4527 // CHECK22-NEXT: [[I:%.*]] = alloca i32, align 4
4528 // CHECK22-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4529 // CHECK22-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4530 // CHECK22-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4531 // CHECK22-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4532 // CHECK22-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4533 // CHECK22-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
4534 // CHECK22-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4535 // CHECK22-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
4536 // CHECK22-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4537 // CHECK22-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4538 // CHECK22-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4539 // CHECK22-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4540 // CHECK22-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4541 // CHECK22-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4542 // CHECK22-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4543 // CHECK22-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4544 // CHECK22: cond.true:
4545 // CHECK22-NEXT: br label [[COND_END:%.*]]
4546 // CHECK22: cond.false:
4547 // CHECK22-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4548 // CHECK22-NEXT: br label [[COND_END]]
4549 // CHECK22: cond.end:
4550 // CHECK22-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4551 // CHECK22-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4552 // CHECK22-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4553 // CHECK22-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4554 // CHECK22-NEXT: [[TMP6:%.*]] = load i8, i8* [[CONV]], align 8
4555 // CHECK22-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP6]] to i1
4556 // CHECK22-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4557 // CHECK22: omp_if.then:
4558 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4559 // CHECK22: omp.inner.for.cond:
4560 // CHECK22-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
4561 // CHECK22-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !4
4562 // CHECK22-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4563 // CHECK22-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4564 // CHECK22: omp.inner.for.body:
4565 // CHECK22-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
4566 // CHECK22-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4567 // CHECK22-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4568 // CHECK22-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !4
4569 // CHECK22-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1
4570 // CHECK22-NEXT: [[TMP10:%.*]] = load float, float* [[B]], align 4, !nontemporal !5, !llvm.access.group !4
4571 // CHECK22-NEXT: [[CONV2:%.*]] = fptosi float [[TMP10]] to i32
4572 // CHECK22-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0
4573 // CHECK22-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !4
4574 // CHECK22-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
4575 // CHECK22-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
4576 // CHECK22-NEXT: store i32 [[CONV2]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !4
4577 // CHECK22-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4578 // CHECK22: omp.body.continue:
4579 // CHECK22-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4580 // CHECK22: omp.inner.for.inc:
4581 // CHECK22-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
4582 // CHECK22-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
4583 // CHECK22-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
4584 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
4585 // CHECK22: omp.inner.for.end:
4586 // CHECK22-NEXT: br label [[OMP_IF_END:%.*]]
4587 // CHECK22: omp_if.else:
4588 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND4:%.*]]
4589 // CHECK22: omp.inner.for.cond4:
4590 // CHECK22-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4591 // CHECK22-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4592 // CHECK22-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
4593 // CHECK22-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY6:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
4594 // CHECK22: omp.inner.for.body6:
4595 // CHECK22-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4596 // CHECK22-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP15]], 1
4597 // CHECK22-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]]
4598 // CHECK22-NEXT: store i32 [[ADD8]], i32* [[I]], align 4
4599 // CHECK22-NEXT: [[B9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 1
4600 // CHECK22-NEXT: [[TMP16:%.*]] = load float, float* [[B9]], align 4
4601 // CHECK22-NEXT: [[CONV10:%.*]] = fptosi float [[TMP16]] to i32
4602 // CHECK22-NEXT: [[A11:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0
4603 // CHECK22-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4
4604 // CHECK22-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP17]] to i64
4605 // CHECK22-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A11]], i64 0, i64 [[IDXPROM12]]
4606 // CHECK22-NEXT: store i32 [[CONV10]], i32* [[ARRAYIDX13]], align 4
4607 // CHECK22-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]]
4608 // CHECK22: omp.body.continue14:
4609 // CHECK22-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]]
4610 // CHECK22: omp.inner.for.inc15:
4611 // CHECK22-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4612 // CHECK22-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP18]], 1
4613 // CHECK22-NEXT: store i32 [[ADD16]], i32* [[DOTOMP_IV]], align 4
4614 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND4]], !llvm.loop [[LOOP9:![0-9]+]]
4615 // CHECK22: omp.inner.for.end17:
4616 // CHECK22-NEXT: br label [[OMP_IF_END]]
4617 // CHECK22: omp_if.end:
4618 // CHECK22-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4619 // CHECK22: omp.loop.exit:
4620 // CHECK22-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4621 // CHECK22-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4622 // CHECK22-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
4623 // CHECK22-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4624 // CHECK22: .omp.final.then:
4625 // CHECK22-NEXT: store i32 123, i32* [[I]], align 4
4626 // CHECK22-NEXT: br label [[DOTOMP_FINAL_DONE]]
4627 // CHECK22: .omp.final.done:
4628 // CHECK22-NEXT: ret void
4629 //
4630 //
4631 // CHECK22-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4632 // CHECK22-SAME: () #[[ATTR3:[0-9]+]] {
4633 // CHECK22-NEXT: entry:
4634 // CHECK22-NEXT: call void @__tgt_register_requires(i64 1)
4635 // CHECK22-NEXT: ret void
4636 //
4637 //
4638 // CHECK23-LABEL: define {{[^@]+}}@_Z21teams_template_structv
4639 // CHECK23-SAME: () #[[ATTR0:[0-9]+]] {
4640 // CHECK23-NEXT: entry:
4641 // CHECK23-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
4642 // CHECK23-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
4643 // CHECK23-NEXT: ret i32 [[CALL]]
4644 //
4645 //
4646 // CHECK23-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
4647 // CHECK23-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
4648 // CHECK23-NEXT: entry:
4649 // CHECK23-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4650 // CHECK23-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
4651 // CHECK23-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
4652 // CHECK23-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
4653 // CHECK23-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
4654 // CHECK23-NEXT: [[TMP:%.*]] = alloca i32, align 4
4655 // CHECK23-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4656 // CHECK23-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4657 // CHECK23-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 1
4658 // CHECK23-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4659 // CHECK23-NEXT: [[TMP0:%.*]] = getelementptr float, float* [[B]], i32 1
4660 // CHECK23-NEXT: [[TMP1:%.*]] = bitcast [123 x i32]* [[A]] to i8*
4661 // CHECK23-NEXT: [[TMP2:%.*]] = bitcast float* [[TMP0]] to i8*
4662 // CHECK23-NEXT: [[TMP3:%.*]] = ptrtoint i8* [[TMP2]] to i64
4663 // CHECK23-NEXT: [[TMP4:%.*]] = ptrtoint i8* [[TMP1]] to i64
4664 // CHECK23-NEXT: [[TMP5:%.*]] = sub i64 [[TMP3]], [[TMP4]]
4665 // CHECK23-NEXT: [[TMP6:%.*]] = sdiv exact i64 [[TMP5]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
4666 // CHECK23-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4667 // CHECK23-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to %struct.SS**
4668 // CHECK23-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP8]], align 4
4669 // CHECK23-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4670 // CHECK23-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [123 x i32]**
4671 // CHECK23-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP10]], align 4
4672 // CHECK23-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4673 // CHECK23-NEXT: store i64 [[TMP6]], i64* [[TMP11]], align 4
4674 // CHECK23-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4675 // CHECK23-NEXT: store i8* null, i8** [[TMP12]], align 4
4676 // CHECK23-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4677 // CHECK23-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to %struct.SS**
4678 // CHECK23-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP14]], align 4
4679 // CHECK23-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4680 // CHECK23-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to float**
4681 // CHECK23-NEXT: store float* [[B]], float** [[TMP16]], align 4
4682 // CHECK23-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
4683 // CHECK23-NEXT: store i64 4, i64* [[TMP17]], align 4
4684 // CHECK23-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
4685 // CHECK23-NEXT: store i8* null, i8** [[TMP18]], align 4
4686 // CHECK23-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4687 // CHECK23-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to %struct.SS**
4688 // CHECK23-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP20]], align 4
4689 // CHECK23-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4690 // CHECK23-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [123 x i32]**
4691 // CHECK23-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP22]], align 4
4692 // CHECK23-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
4693 // CHECK23-NEXT: store i64 492, i64* [[TMP23]], align 4
4694 // CHECK23-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
4695 // CHECK23-NEXT: store i8* null, i8** [[TMP24]], align 4
4696 // CHECK23-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4697 // CHECK23-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4698 // CHECK23-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4699 // CHECK23-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123)
4700 // CHECK23-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123.region_id, i32 3, i8** [[TMP25]], i8** [[TMP26]], i64* [[TMP27]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
4701 // CHECK23-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
4702 // CHECK23-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4703 // CHECK23: omp_offload.failed:
4704 // CHECK23-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
4705 // CHECK23-NEXT: br label [[OMP_OFFLOAD_CONT]]
4706 // CHECK23: omp_offload.cont:
4707 // CHECK23-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4708 // CHECK23-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i32 0, i32 0
4709 // CHECK23-NEXT: [[TMP30:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
4710 // CHECK23-NEXT: ret i32 [[TMP30]]
4711 //
4712 //
4713 // CHECK23-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123
4714 // CHECK23-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
4715 // CHECK23-NEXT: entry:
4716 // CHECK23-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4717 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
4718 // CHECK23-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
4719 // CHECK23-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4720 // CHECK23-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4721 // CHECK23-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1
4722 // CHECK23-NEXT: [[TMP1:%.*]] = load float, float* [[B]], align 4
4723 // CHECK23-NEXT: [[TOBOOL:%.*]] = fcmp une float [[TMP1]], 0.000000e+00
4724 // CHECK23-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
4725 // CHECK23-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
4726 // CHECK23-NEXT: [[TMP2:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4727 // CHECK23-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP2]] to i1
4728 // CHECK23-NEXT: [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED]] to i8*
4729 // CHECK23-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
4730 // CHECK23-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
4731 // CHECK23-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
4732 // CHECK23-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]], i32 [[TMP3]])
4733 // CHECK23-NEXT: ret void
4734 //
4735 //
4736 // CHECK23-LABEL: define {{[^@]+}}@.omp_outlined.
4737 // CHECK23-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
4738 // CHECK23-NEXT: entry:
4739 // CHECK23-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4740 // CHECK23-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4741 // CHECK23-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4742 // CHECK23-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
4743 // CHECK23-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4744 // CHECK23-NEXT: [[TMP:%.*]] = alloca i32, align 4
4745 // CHECK23-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4746 // CHECK23-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4747 // CHECK23-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4748 // CHECK23-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4749 // CHECK23-NEXT: [[I:%.*]] = alloca i32, align 4
4750 // CHECK23-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4751 // CHECK23-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4752 // CHECK23-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4753 // CHECK23-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4754 // CHECK23-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4755 // CHECK23-NEXT: [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
4756 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4757 // CHECK23-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
4758 // CHECK23-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4759 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4760 // CHECK23-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4761 // CHECK23-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4762 // CHECK23-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4763 // CHECK23-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4764 // CHECK23-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4765 // CHECK23-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4766 // CHECK23: cond.true:
4767 // CHECK23-NEXT: br label [[COND_END:%.*]]
4768 // CHECK23: cond.false:
4769 // CHECK23-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4770 // CHECK23-NEXT: br label [[COND_END]]
4771 // CHECK23: cond.end:
4772 // CHECK23-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4773 // CHECK23-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4774 // CHECK23-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4775 // CHECK23-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4776 // CHECK23-NEXT: [[TMP6:%.*]] = load i8, i8* [[CONV]], align 4
4777 // CHECK23-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP6]] to i1
4778 // CHECK23-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4779 // CHECK23: omp_if.then:
4780 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4781 // CHECK23: omp.inner.for.cond:
4782 // CHECK23-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
4783 // CHECK23-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5
4784 // CHECK23-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4785 // CHECK23-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4786 // CHECK23: omp.inner.for.body:
4787 // CHECK23-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
4788 // CHECK23-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4789 // CHECK23-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4790 // CHECK23-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5
4791 // CHECK23-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1
4792 // CHECK23-NEXT: [[TMP10:%.*]] = load float, float* [[B]], align 4, !nontemporal !6, !llvm.access.group !5
4793 // CHECK23-NEXT: [[CONV2:%.*]] = fptosi float [[TMP10]] to i32
4794 // CHECK23-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0
4795 // CHECK23-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5
4796 // CHECK23-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
4797 // CHECK23-NEXT: store i32 [[CONV2]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !5
4798 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4799 // CHECK23: omp.body.continue:
4800 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4801 // CHECK23: omp.inner.for.inc:
4802 // CHECK23-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
4803 // CHECK23-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
4804 // CHECK23-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
4805 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
4806 // CHECK23: omp.inner.for.end:
4807 // CHECK23-NEXT: br label [[OMP_IF_END:%.*]]
4808 // CHECK23: omp_if.else:
4809 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND4:%.*]]
4810 // CHECK23: omp.inner.for.cond4:
4811 // CHECK23-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4812 // CHECK23-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4813 // CHECK23-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
4814 // CHECK23-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY6:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
4815 // CHECK23: omp.inner.for.body6:
4816 // CHECK23-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4817 // CHECK23-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP15]], 1
4818 // CHECK23-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]]
4819 // CHECK23-NEXT: store i32 [[ADD8]], i32* [[I]], align 4
4820 // CHECK23-NEXT: [[B9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 1
4821 // CHECK23-NEXT: [[TMP16:%.*]] = load float, float* [[B9]], align 4
4822 // CHECK23-NEXT: [[CONV10:%.*]] = fptosi float [[TMP16]] to i32
4823 // CHECK23-NEXT: [[A11:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0
4824 // CHECK23-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4
4825 // CHECK23-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A11]], i32 0, i32 [[TMP17]]
4826 // CHECK23-NEXT: store i32 [[CONV10]], i32* [[ARRAYIDX12]], align 4
4827 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE13:%.*]]
4828 // CHECK23: omp.body.continue13:
4829 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC14:%.*]]
4830 // CHECK23: omp.inner.for.inc14:
4831 // CHECK23-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4832 // CHECK23-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP18]], 1
4833 // CHECK23-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV]], align 4
4834 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND4]], !llvm.loop [[LOOP10:![0-9]+]]
4835 // CHECK23: omp.inner.for.end16:
4836 // CHECK23-NEXT: br label [[OMP_IF_END]]
4837 // CHECK23: omp_if.end:
4838 // CHECK23-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4839 // CHECK23: omp.loop.exit:
4840 // CHECK23-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4841 // CHECK23-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4842 // CHECK23-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
4843 // CHECK23-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4844 // CHECK23: .omp.final.then:
4845 // CHECK23-NEXT: store i32 123, i32* [[I]], align 4
4846 // CHECK23-NEXT: br label [[DOTOMP_FINAL_DONE]]
4847 // CHECK23: .omp.final.done:
4848 // CHECK23-NEXT: ret void
4849 //
4850 //
4851 // CHECK23-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4852 // CHECK23-SAME: () #[[ATTR3:[0-9]+]] {
4853 // CHECK23-NEXT: entry:
4854 // CHECK23-NEXT: call void @__tgt_register_requires(i64 1)
4855 // CHECK23-NEXT: ret void
4856 //
4857 //
4858 // CHECK24-LABEL: define {{[^@]+}}@_Z21teams_template_structv
4859 // CHECK24-SAME: () #[[ATTR0:[0-9]+]] {
4860 // CHECK24-NEXT: entry:
4861 // CHECK24-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
4862 // CHECK24-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
4863 // CHECK24-NEXT: ret i32 [[CALL]]
4864 //
4865 //
4866 // CHECK24-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
4867 // CHECK24-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
4868 // CHECK24-NEXT: entry:
4869 // CHECK24-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4870 // CHECK24-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
4871 // CHECK24-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
4872 // CHECK24-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
4873 // CHECK24-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
4874 // CHECK24-NEXT: [[TMP:%.*]] = alloca i32, align 4
4875 // CHECK24-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4876 // CHECK24-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4877 // CHECK24-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 1
4878 // CHECK24-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4879 // CHECK24-NEXT: [[TMP0:%.*]] = getelementptr float, float* [[B]], i32 1
4880 // CHECK24-NEXT: [[TMP1:%.*]] = bitcast [123 x i32]* [[A]] to i8*
4881 // CHECK24-NEXT: [[TMP2:%.*]] = bitcast float* [[TMP0]] to i8*
4882 // CHECK24-NEXT: [[TMP3:%.*]] = ptrtoint i8* [[TMP2]] to i64
4883 // CHECK24-NEXT: [[TMP4:%.*]] = ptrtoint i8* [[TMP1]] to i64
4884 // CHECK24-NEXT: [[TMP5:%.*]] = sub i64 [[TMP3]], [[TMP4]]
4885 // CHECK24-NEXT: [[TMP6:%.*]] = sdiv exact i64 [[TMP5]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
4886 // CHECK24-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4887 // CHECK24-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to %struct.SS**
4888 // CHECK24-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP8]], align 4
4889 // CHECK24-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4890 // CHECK24-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [123 x i32]**
4891 // CHECK24-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP10]], align 4
4892 // CHECK24-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4893 // CHECK24-NEXT: store i64 [[TMP6]], i64* [[TMP11]], align 4
4894 // CHECK24-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4895 // CHECK24-NEXT: store i8* null, i8** [[TMP12]], align 4
4896 // CHECK24-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4897 // CHECK24-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to %struct.SS**
4898 // CHECK24-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP14]], align 4
4899 // CHECK24-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4900 // CHECK24-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to float**
4901 // CHECK24-NEXT: store float* [[B]], float** [[TMP16]], align 4
4902 // CHECK24-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
4903 // CHECK24-NEXT: store i64 4, i64* [[TMP17]], align 4
4904 // CHECK24-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
4905 // CHECK24-NEXT: store i8* null, i8** [[TMP18]], align 4
4906 // CHECK24-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4907 // CHECK24-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to %struct.SS**
4908 // CHECK24-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP20]], align 4
4909 // CHECK24-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4910 // CHECK24-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [123 x i32]**
4911 // CHECK24-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP22]], align 4
4912 // CHECK24-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
4913 // CHECK24-NEXT: store i64 492, i64* [[TMP23]], align 4
4914 // CHECK24-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
4915 // CHECK24-NEXT: store i8* null, i8** [[TMP24]], align 4
4916 // CHECK24-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4917 // CHECK24-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4918 // CHECK24-NEXT: [[TMP27:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4919 // CHECK24-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123)
4920 // CHECK24-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123.region_id, i32 3, i8** [[TMP25]], i8** [[TMP26]], i64* [[TMP27]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
4921 // CHECK24-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
4922 // CHECK24-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4923 // CHECK24: omp_offload.failed:
4924 // CHECK24-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
4925 // CHECK24-NEXT: br label [[OMP_OFFLOAD_CONT]]
4926 // CHECK24: omp_offload.cont:
4927 // CHECK24-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4928 // CHECK24-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i32 0, i32 0
4929 // CHECK24-NEXT: [[TMP30:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
4930 // CHECK24-NEXT: ret i32 [[TMP30]]
4931 //
4932 //
4933 // CHECK24-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l123
4934 // CHECK24-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
4935 // CHECK24-NEXT: entry:
4936 // CHECK24-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4937 // CHECK24-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
4938 // CHECK24-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
4939 // CHECK24-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4940 // CHECK24-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4941 // CHECK24-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1
4942 // CHECK24-NEXT: [[TMP1:%.*]] = load float, float* [[B]], align 4
4943 // CHECK24-NEXT: [[TOBOOL:%.*]] = fcmp une float [[TMP1]], 0.000000e+00
4944 // CHECK24-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
4945 // CHECK24-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
4946 // CHECK24-NEXT: [[TMP2:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4947 // CHECK24-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP2]] to i1
4948 // CHECK24-NEXT: [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED]] to i8*
4949 // CHECK24-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
4950 // CHECK24-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
4951 // CHECK24-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
4952 // CHECK24-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]], i32 [[TMP3]])
4953 // CHECK24-NEXT: ret void
4954 //
4955 //
4956 // CHECK24-LABEL: define {{[^@]+}}@.omp_outlined.
4957 // CHECK24-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
4958 // CHECK24-NEXT: entry:
4959 // CHECK24-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4960 // CHECK24-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4961 // CHECK24-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4962 // CHECK24-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
4963 // CHECK24-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4964 // CHECK24-NEXT: [[TMP:%.*]] = alloca i32, align 4
4965 // CHECK24-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4966 // CHECK24-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4967 // CHECK24-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4968 // CHECK24-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4969 // CHECK24-NEXT: [[I:%.*]] = alloca i32, align 4
4970 // CHECK24-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4971 // CHECK24-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4972 // CHECK24-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4973 // CHECK24-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4974 // CHECK24-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4975 // CHECK24-NEXT: [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
4976 // CHECK24-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4977 // CHECK24-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
4978 // CHECK24-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4979 // CHECK24-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4980 // CHECK24-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4981 // CHECK24-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4982 // CHECK24-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4983 // CHECK24-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4984 // CHECK24-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4985 // CHECK24-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4986 // CHECK24: cond.true:
4987 // CHECK24-NEXT: br label [[COND_END:%.*]]
4988 // CHECK24: cond.false:
4989 // CHECK24-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4990 // CHECK24-NEXT: br label [[COND_END]]
4991 // CHECK24: cond.end:
4992 // CHECK24-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4993 // CHECK24-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4994 // CHECK24-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4995 // CHECK24-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4996 // CHECK24-NEXT: [[TMP6:%.*]] = load i8, i8* [[CONV]], align 4
4997 // CHECK24-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP6]] to i1
4998 // CHECK24-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4999 // CHECK24: omp_if.then:
5000 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5001 // CHECK24: omp.inner.for.cond:
5002 // CHECK24-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
5003 // CHECK24-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5
5004 // CHECK24-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5005 // CHECK24-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5006 // CHECK24: omp.inner.for.body:
5007 // CHECK24-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
5008 // CHECK24-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5009 // CHECK24-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5010 // CHECK24-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5
5011 // CHECK24-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1
5012 // CHECK24-NEXT: [[TMP10:%.*]] = load float, float* [[B]], align 4, !nontemporal !6, !llvm.access.group !5
5013 // CHECK24-NEXT: [[CONV2:%.*]] = fptosi float [[TMP10]] to i32
5014 // CHECK24-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0
5015 // CHECK24-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5
5016 // CHECK24-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
5017 // CHECK24-NEXT: store i32 [[CONV2]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !5
5018 // CHECK24-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5019 // CHECK24: omp.body.continue:
5020 // CHECK24-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5021 // CHECK24: omp.inner.for.inc:
5022 // CHECK24-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
5023 // CHECK24-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
5024 // CHECK24-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
5025 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
5026 // CHECK24: omp.inner.for.end:
5027 // CHECK24-NEXT: br label [[OMP_IF_END:%.*]]
5028 // CHECK24: omp_if.else:
5029 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND4:%.*]]
5030 // CHECK24: omp.inner.for.cond4:
5031 // CHECK24-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5032 // CHECK24-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5033 // CHECK24-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
5034 // CHECK24-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY6:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
5035 // CHECK24: omp.inner.for.body6:
5036 // CHECK24-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5037 // CHECK24-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP15]], 1
5038 // CHECK24-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]]
5039 // CHECK24-NEXT: store i32 [[ADD8]], i32* [[I]], align 4
5040 // CHECK24-NEXT: [[B9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 1
5041 // CHECK24-NEXT: [[TMP16:%.*]] = load float, float* [[B9]], align 4
5042 // CHECK24-NEXT: [[CONV10:%.*]] = fptosi float [[TMP16]] to i32
5043 // CHECK24-NEXT: [[A11:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0
5044 // CHECK24-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4
5045 // CHECK24-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A11]], i32 0, i32 [[TMP17]]
5046 // CHECK24-NEXT: store i32 [[CONV10]], i32* [[ARRAYIDX12]], align 4
5047 // CHECK24-NEXT: br label [[OMP_BODY_CONTINUE13:%.*]]
5048 // CHECK24: omp.body.continue13:
5049 // CHECK24-NEXT: br label [[OMP_INNER_FOR_INC14:%.*]]
5050 // CHECK24: omp.inner.for.inc14:
5051 // CHECK24-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5052 // CHECK24-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP18]], 1
5053 // CHECK24-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV]], align 4
5054 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND4]], !llvm.loop [[LOOP10:![0-9]+]]
5055 // CHECK24: omp.inner.for.end16:
5056 // CHECK24-NEXT: br label [[OMP_IF_END]]
5057 // CHECK24: omp_if.end:
5058 // CHECK24-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5059 // CHECK24: omp.loop.exit:
5060 // CHECK24-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5061 // CHECK24-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5062 // CHECK24-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
5063 // CHECK24-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5064 // CHECK24: .omp.final.then:
5065 // CHECK24-NEXT: store i32 123, i32* [[I]], align 4
5066 // CHECK24-NEXT: br label [[DOTOMP_FINAL_DONE]]
5067 // CHECK24: .omp.final.done:
5068 // CHECK24-NEXT: ret void
5069 //
5070 //
5071 // CHECK24-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
5072 // CHECK24-SAME: () #[[ATTR3:[0-9]+]] {
5073 // CHECK24-NEXT: entry:
5074 // CHECK24-NEXT: call void @__tgt_register_requires(i64 1)
5075 // CHECK24-NEXT: ret void
5076 //
5077 //
5078 // CHECK25-LABEL: define {{[^@]+}}@_Z21teams_template_structv
5079 // CHECK25-SAME: () #[[ATTR0:[0-9]+]] {
5080 // CHECK25-NEXT: entry:
5081 // CHECK25-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
5082 // CHECK25-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
5083 // CHECK25-NEXT: ret i32 [[CALL]]
5084 //
5085 //
5086 // CHECK25-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
5087 // CHECK25-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
5088 // CHECK25-NEXT: entry:
5089 // CHECK25-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5090 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4
5091 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5092 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5093 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5094 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4
5095 // CHECK25-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5096 // CHECK25-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5097 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5098 // CHECK25-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
5099 // CHECK25-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5100 // CHECK25-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
5101 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5102 // CHECK25: omp.inner.for.cond:
5103 // CHECK25-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5104 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
5105 // CHECK25-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
5106 // CHECK25-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5107 // CHECK25: omp.inner.for.body:
5108 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5109 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
5110 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5111 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
5112 // CHECK25-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 1
5113 // CHECK25-NEXT: [[TMP4:%.*]] = load float, float* [[B]], align 4, !llvm.access.group !2
5114 // CHECK25-NEXT: [[CONV:%.*]] = fptosi float [[TMP4]] to i32
5115 // CHECK25-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5116 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
5117 // CHECK25-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64
5118 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
5119 // CHECK25-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
5120 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5121 // CHECK25: omp.body.continue:
5122 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5123 // CHECK25: omp.inner.for.inc:
5124 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5125 // CHECK25-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], 1
5126 // CHECK25-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5127 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
5128 // CHECK25: omp.inner.for.end:
5129 // CHECK25-NEXT: store i32 123, i32* [[I]], align 4
5130 // CHECK25-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5131 // CHECK25-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A3]], i64 0, i64 0
5132 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
5133 // CHECK25-NEXT: ret i32 [[TMP7]]
5134 //
5135 //
5136 // CHECK26-LABEL: define {{[^@]+}}@_Z21teams_template_structv
5137 // CHECK26-SAME: () #[[ATTR0:[0-9]+]] {
5138 // CHECK26-NEXT: entry:
5139 // CHECK26-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
5140 // CHECK26-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
5141 // CHECK26-NEXT: ret i32 [[CALL]]
5142 //
5143 //
5144 // CHECK26-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
5145 // CHECK26-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
5146 // CHECK26-NEXT: entry:
5147 // CHECK26-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5148 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4
5149 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5150 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5151 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5152 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4
5153 // CHECK26-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5154 // CHECK26-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5155 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5156 // CHECK26-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
5157 // CHECK26-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5158 // CHECK26-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
5159 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5160 // CHECK26: omp.inner.for.cond:
5161 // CHECK26-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5162 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
5163 // CHECK26-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
5164 // CHECK26-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5165 // CHECK26: omp.inner.for.body:
5166 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5167 // CHECK26-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
5168 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5169 // CHECK26-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
5170 // CHECK26-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 1
5171 // CHECK26-NEXT: [[TMP4:%.*]] = load float, float* [[B]], align 4, !llvm.access.group !2
5172 // CHECK26-NEXT: [[CONV:%.*]] = fptosi float [[TMP4]] to i32
5173 // CHECK26-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5174 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
5175 // CHECK26-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64
5176 // CHECK26-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
5177 // CHECK26-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
5178 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5179 // CHECK26: omp.body.continue:
5180 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5181 // CHECK26: omp.inner.for.inc:
5182 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5183 // CHECK26-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], 1
5184 // CHECK26-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5185 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
5186 // CHECK26: omp.inner.for.end:
5187 // CHECK26-NEXT: store i32 123, i32* [[I]], align 4
5188 // CHECK26-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5189 // CHECK26-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A3]], i64 0, i64 0
5190 // CHECK26-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
5191 // CHECK26-NEXT: ret i32 [[TMP7]]
5192 //
5193 //
5194 // CHECK27-LABEL: define {{[^@]+}}@_Z21teams_template_structv
5195 // CHECK27-SAME: () #[[ATTR0:[0-9]+]] {
5196 // CHECK27-NEXT: entry:
5197 // CHECK27-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
5198 // CHECK27-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
5199 // CHECK27-NEXT: ret i32 [[CALL]]
5200 //
5201 //
5202 // CHECK27-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
5203 // CHECK27-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
5204 // CHECK27-NEXT: entry:
5205 // CHECK27-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5206 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4
5207 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5208 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5209 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5210 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4
5211 // CHECK27-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5212 // CHECK27-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5213 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5214 // CHECK27-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
5215 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5216 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
5217 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5218 // CHECK27: omp.inner.for.cond:
5219 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5220 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
5221 // CHECK27-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
5222 // CHECK27-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5223 // CHECK27: omp.inner.for.body:
5224 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5225 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
5226 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5227 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
5228 // CHECK27-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 1
5229 // CHECK27-NEXT: [[TMP4:%.*]] = load float, float* [[B]], align 4, !llvm.access.group !3
5230 // CHECK27-NEXT: [[CONV:%.*]] = fptosi float [[TMP4]] to i32
5231 // CHECK27-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5232 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
5233 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP5]]
5234 // CHECK27-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
5235 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5236 // CHECK27: omp.body.continue:
5237 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5238 // CHECK27: omp.inner.for.inc:
5239 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5240 // CHECK27-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], 1
5241 // CHECK27-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5242 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
5243 // CHECK27: omp.inner.for.end:
5244 // CHECK27-NEXT: store i32 123, i32* [[I]], align 4
5245 // CHECK27-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5246 // CHECK27-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A3]], i32 0, i32 0
5247 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
5248 // CHECK27-NEXT: ret i32 [[TMP7]]
5249 //
5250 //
5251 // CHECK28-LABEL: define {{[^@]+}}@_Z21teams_template_structv
5252 // CHECK28-SAME: () #[[ATTR0:[0-9]+]] {
5253 // CHECK28-NEXT: entry:
5254 // CHECK28-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
5255 // CHECK28-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
5256 // CHECK28-NEXT: ret i32 [[CALL]]
5257 //
5258 //
5259 // CHECK28-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
5260 // CHECK28-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
5261 // CHECK28-NEXT: entry:
5262 // CHECK28-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5263 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4
5264 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5265 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5266 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5267 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4
5268 // CHECK28-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5269 // CHECK28-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5270 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5271 // CHECK28-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
5272 // CHECK28-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5273 // CHECK28-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
5274 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5275 // CHECK28: omp.inner.for.cond:
5276 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5277 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
5278 // CHECK28-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
5279 // CHECK28-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5280 // CHECK28: omp.inner.for.body:
5281 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5282 // CHECK28-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
5283 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5284 // CHECK28-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
5285 // CHECK28-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 1
5286 // CHECK28-NEXT: [[TMP4:%.*]] = load float, float* [[B]], align 4, !llvm.access.group !3
5287 // CHECK28-NEXT: [[CONV:%.*]] = fptosi float [[TMP4]] to i32
5288 // CHECK28-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5289 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
5290 // CHECK28-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP5]]
5291 // CHECK28-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
5292 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5293 // CHECK28: omp.body.continue:
5294 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5295 // CHECK28: omp.inner.for.inc:
5296 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5297 // CHECK28-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], 1
5298 // CHECK28-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5299 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
5300 // CHECK28: omp.inner.for.end:
5301 // CHECK28-NEXT: store i32 123, i32* [[I]], align 4
5302 // CHECK28-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5303 // CHECK28-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A3]], i32 0, i32 0
5304 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
5305 // CHECK28-NEXT: ret i32 [[TMP7]]
5306 //
5307 //
5308 // CHECK29-LABEL: define {{[^@]+}}@_Z21teams_template_structv
5309 // CHECK29-SAME: () #[[ATTR0:[0-9]+]] {
5310 // CHECK29-NEXT: entry:
5311 // CHECK29-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
5312 // CHECK29-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
5313 // CHECK29-NEXT: ret i32 [[CALL]]
5314 //
5315 //
5316 // CHECK29-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
5317 // CHECK29-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
5318 // CHECK29-NEXT: entry:
5319 // CHECK29-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5320 // CHECK29-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
5321 // CHECK29-NEXT: [[TMP:%.*]] = alloca i32, align 4
5322 // CHECK29-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5323 // CHECK29-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5324 // CHECK29-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5325 // CHECK29-NEXT: [[I:%.*]] = alloca i32, align 4
5326 // CHECK29-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5327 // CHECK29-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5328 // CHECK29-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 1
5329 // CHECK29-NEXT: [[TMP0:%.*]] = load float, float* [[B]], align 4
5330 // CHECK29-NEXT: [[TOBOOL:%.*]] = fcmp une float [[TMP0]], 0.000000e+00
5331 // CHECK29-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
5332 // CHECK29-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
5333 // CHECK29-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5334 // CHECK29-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
5335 // CHECK29-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5336 // CHECK29-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4
5337 // CHECK29-NEXT: [[TMP2:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
5338 // CHECK29-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP2]] to i1
5339 // CHECK29-NEXT: br i1 [[TOBOOL2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5340 // CHECK29: omp_if.then:
5341 // CHECK29-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5342 // CHECK29: omp.inner.for.cond:
5343 // CHECK29-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5344 // CHECK29-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
5345 // CHECK29-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP3]], [[TMP4]]
5346 // CHECK29-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5347 // CHECK29: omp.inner.for.body:
5348 // CHECK29-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5349 // CHECK29-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP5]], 1
5350 // CHECK29-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5351 // CHECK29-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
5352 // CHECK29-NEXT: [[B3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
5353 // CHECK29-NEXT: [[TMP6:%.*]] = load float, float* [[B3]], align 4, !nontemporal !3, !llvm.access.group !2
5354 // CHECK29-NEXT: [[CONV:%.*]] = fptosi float [[TMP6]] to i32
5355 // CHECK29-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5356 // CHECK29-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
5357 // CHECK29-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP7]] to i64
5358 // CHECK29-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
5359 // CHECK29-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
5360 // CHECK29-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5361 // CHECK29: omp.body.continue:
5362 // CHECK29-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5363 // CHECK29: omp.inner.for.inc:
5364 // CHECK29-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5365 // CHECK29-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP8]], 1
5366 // CHECK29-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5367 // CHECK29-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
5368 // CHECK29: omp.inner.for.end:
5369 // CHECK29-NEXT: br label [[OMP_IF_END:%.*]]
5370 // CHECK29: omp_if.else:
5371 // CHECK29-NEXT: br label [[OMP_INNER_FOR_COND5:%.*]]
5372 // CHECK29: omp.inner.for.cond5:
5373 // CHECK29-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5374 // CHECK29-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5375 // CHECK29-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
5376 // CHECK29-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY7:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
5377 // CHECK29: omp.inner.for.body7:
5378 // CHECK29-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5379 // CHECK29-NEXT: [[MUL8:%.*]] = mul nsw i32 [[TMP11]], 1
5380 // CHECK29-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
5381 // CHECK29-NEXT: store i32 [[ADD9]], i32* [[I]], align 4
5382 // CHECK29-NEXT: [[B10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
5383 // CHECK29-NEXT: [[TMP12:%.*]] = load float, float* [[B10]], align 4
5384 // CHECK29-NEXT: [[CONV11:%.*]] = fptosi float [[TMP12]] to i32
5385 // CHECK29-NEXT: [[A12:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5386 // CHECK29-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
5387 // CHECK29-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP13]] to i64
5388 // CHECK29-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A12]], i64 0, i64 [[IDXPROM13]]
5389 // CHECK29-NEXT: store i32 [[CONV11]], i32* [[ARRAYIDX14]], align 4
5390 // CHECK29-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
5391 // CHECK29: omp.body.continue15:
5392 // CHECK29-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
5393 // CHECK29: omp.inner.for.inc16:
5394 // CHECK29-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5395 // CHECK29-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP14]], 1
5396 // CHECK29-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
5397 // CHECK29-NEXT: br label [[OMP_INNER_FOR_COND5]], !llvm.loop [[LOOP7:![0-9]+]]
5398 // CHECK29: omp.inner.for.end18:
5399 // CHECK29-NEXT: br label [[OMP_IF_END]]
5400 // CHECK29: omp_if.end:
5401 // CHECK29-NEXT: store i32 123, i32* [[I]], align 4
5402 // CHECK29-NEXT: [[A19:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5403 // CHECK29-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A19]], i64 0, i64 0
5404 // CHECK29-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX20]], align 4
5405 // CHECK29-NEXT: ret i32 [[TMP15]]
5406 //
5407 //
5408 // CHECK30-LABEL: define {{[^@]+}}@_Z21teams_template_structv
5409 // CHECK30-SAME: () #[[ATTR0:[0-9]+]] {
5410 // CHECK30-NEXT: entry:
5411 // CHECK30-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
5412 // CHECK30-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
5413 // CHECK30-NEXT: ret i32 [[CALL]]
5414 //
5415 //
5416 // CHECK30-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
5417 // CHECK30-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
5418 // CHECK30-NEXT: entry:
5419 // CHECK30-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5420 // CHECK30-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
5421 // CHECK30-NEXT: [[TMP:%.*]] = alloca i32, align 4
5422 // CHECK30-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5423 // CHECK30-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5424 // CHECK30-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5425 // CHECK30-NEXT: [[I:%.*]] = alloca i32, align 4
5426 // CHECK30-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5427 // CHECK30-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5428 // CHECK30-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 1
5429 // CHECK30-NEXT: [[TMP0:%.*]] = load float, float* [[B]], align 4
5430 // CHECK30-NEXT: [[TOBOOL:%.*]] = fcmp une float [[TMP0]], 0.000000e+00
5431 // CHECK30-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
5432 // CHECK30-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
5433 // CHECK30-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5434 // CHECK30-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
5435 // CHECK30-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5436 // CHECK30-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4
5437 // CHECK30-NEXT: [[TMP2:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
5438 // CHECK30-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP2]] to i1
5439 // CHECK30-NEXT: br i1 [[TOBOOL2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5440 // CHECK30: omp_if.then:
5441 // CHECK30-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5442 // CHECK30: omp.inner.for.cond:
5443 // CHECK30-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5444 // CHECK30-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
5445 // CHECK30-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP3]], [[TMP4]]
5446 // CHECK30-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5447 // CHECK30: omp.inner.for.body:
5448 // CHECK30-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5449 // CHECK30-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP5]], 1
5450 // CHECK30-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5451 // CHECK30-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
5452 // CHECK30-NEXT: [[B3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
5453 // CHECK30-NEXT: [[TMP6:%.*]] = load float, float* [[B3]], align 4, !nontemporal !3, !llvm.access.group !2
5454 // CHECK30-NEXT: [[CONV:%.*]] = fptosi float [[TMP6]] to i32
5455 // CHECK30-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5456 // CHECK30-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
5457 // CHECK30-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP7]] to i64
5458 // CHECK30-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
5459 // CHECK30-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
5460 // CHECK30-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5461 // CHECK30: omp.body.continue:
5462 // CHECK30-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5463 // CHECK30: omp.inner.for.inc:
5464 // CHECK30-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5465 // CHECK30-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP8]], 1
5466 // CHECK30-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
5467 // CHECK30-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
5468 // CHECK30: omp.inner.for.end:
5469 // CHECK30-NEXT: br label [[OMP_IF_END:%.*]]
5470 // CHECK30: omp_if.else:
5471 // CHECK30-NEXT: br label [[OMP_INNER_FOR_COND5:%.*]]
5472 // CHECK30: omp.inner.for.cond5:
5473 // CHECK30-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5474 // CHECK30-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5475 // CHECK30-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
5476 // CHECK30-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY7:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
5477 // CHECK30: omp.inner.for.body7:
5478 // CHECK30-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5479 // CHECK30-NEXT: [[MUL8:%.*]] = mul nsw i32 [[TMP11]], 1
5480 // CHECK30-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
5481 // CHECK30-NEXT: store i32 [[ADD9]], i32* [[I]], align 4
5482 // CHECK30-NEXT: [[B10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
5483 // CHECK30-NEXT: [[TMP12:%.*]] = load float, float* [[B10]], align 4
5484 // CHECK30-NEXT: [[CONV11:%.*]] = fptosi float [[TMP12]] to i32
5485 // CHECK30-NEXT: [[A12:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5486 // CHECK30-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
5487 // CHECK30-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP13]] to i64
5488 // CHECK30-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A12]], i64 0, i64 [[IDXPROM13]]
5489 // CHECK30-NEXT: store i32 [[CONV11]], i32* [[ARRAYIDX14]], align 4
5490 // CHECK30-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
5491 // CHECK30: omp.body.continue15:
5492 // CHECK30-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
5493 // CHECK30: omp.inner.for.inc16:
5494 // CHECK30-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5495 // CHECK30-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP14]], 1
5496 // CHECK30-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
5497 // CHECK30-NEXT: br label [[OMP_INNER_FOR_COND5]], !llvm.loop [[LOOP7:![0-9]+]]
5498 // CHECK30: omp.inner.for.end18:
5499 // CHECK30-NEXT: br label [[OMP_IF_END]]
5500 // CHECK30: omp_if.end:
5501 // CHECK30-NEXT: store i32 123, i32* [[I]], align 4
5502 // CHECK30-NEXT: [[A19:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5503 // CHECK30-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A19]], i64 0, i64 0
5504 // CHECK30-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX20]], align 4
5505 // CHECK30-NEXT: ret i32 [[TMP15]]
5506 //
5507 //
5508 // CHECK31-LABEL: define {{[^@]+}}@_Z21teams_template_structv
5509 // CHECK31-SAME: () #[[ATTR0:[0-9]+]] {
5510 // CHECK31-NEXT: entry:
5511 // CHECK31-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
5512 // CHECK31-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
5513 // CHECK31-NEXT: ret i32 [[CALL]]
5514 //
5515 //
5516 // CHECK31-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
5517 // CHECK31-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
5518 // CHECK31-NEXT: entry:
5519 // CHECK31-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5520 // CHECK31-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
5521 // CHECK31-NEXT: [[TMP:%.*]] = alloca i32, align 4
5522 // CHECK31-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5523 // CHECK31-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5524 // CHECK31-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5525 // CHECK31-NEXT: [[I:%.*]] = alloca i32, align 4
5526 // CHECK31-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5527 // CHECK31-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5528 // CHECK31-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 1
5529 // CHECK31-NEXT: [[TMP0:%.*]] = load float, float* [[B]], align 4
5530 // CHECK31-NEXT: [[TOBOOL:%.*]] = fcmp une float [[TMP0]], 0.000000e+00
5531 // CHECK31-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
5532 // CHECK31-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
5533 // CHECK31-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5534 // CHECK31-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
5535 // CHECK31-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5536 // CHECK31-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4
5537 // CHECK31-NEXT: [[TMP2:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
5538 // CHECK31-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP2]] to i1
5539 // CHECK31-NEXT: br i1 [[TOBOOL2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5540 // CHECK31: omp_if.then:
5541 // CHECK31-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5542 // CHECK31: omp.inner.for.cond:
5543 // CHECK31-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5544 // CHECK31-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
5545 // CHECK31-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP3]], [[TMP4]]
5546 // CHECK31-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5547 // CHECK31: omp.inner.for.body:
5548 // CHECK31-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5549 // CHECK31-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP5]], 1
5550 // CHECK31-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5551 // CHECK31-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
5552 // CHECK31-NEXT: [[B3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
5553 // CHECK31-NEXT: [[TMP6:%.*]] = load float, float* [[B3]], align 4, !nontemporal !4, !llvm.access.group !3
5554 // CHECK31-NEXT: [[CONV:%.*]] = fptosi float [[TMP6]] to i32
5555 // CHECK31-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5556 // CHECK31-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
5557 // CHECK31-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP7]]
5558 // CHECK31-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
5559 // CHECK31-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5560 // CHECK31: omp.body.continue:
5561 // CHECK31-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5562 // CHECK31: omp.inner.for.inc:
5563 // CHECK31-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5564 // CHECK31-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP8]], 1
5565 // CHECK31-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5566 // CHECK31-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
5567 // CHECK31: omp.inner.for.end:
5568 // CHECK31-NEXT: br label [[OMP_IF_END:%.*]]
5569 // CHECK31: omp_if.else:
5570 // CHECK31-NEXT: br label [[OMP_INNER_FOR_COND5:%.*]]
5571 // CHECK31: omp.inner.for.cond5:
5572 // CHECK31-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5573 // CHECK31-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5574 // CHECK31-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
5575 // CHECK31-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY7:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
5576 // CHECK31: omp.inner.for.body7:
5577 // CHECK31-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5578 // CHECK31-NEXT: [[MUL8:%.*]] = mul nsw i32 [[TMP11]], 1
5579 // CHECK31-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
5580 // CHECK31-NEXT: store i32 [[ADD9]], i32* [[I]], align 4
5581 // CHECK31-NEXT: [[B10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
5582 // CHECK31-NEXT: [[TMP12:%.*]] = load float, float* [[B10]], align 4
5583 // CHECK31-NEXT: [[CONV11:%.*]] = fptosi float [[TMP12]] to i32
5584 // CHECK31-NEXT: [[A12:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5585 // CHECK31-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
5586 // CHECK31-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A12]], i32 0, i32 [[TMP13]]
5587 // CHECK31-NEXT: store i32 [[CONV11]], i32* [[ARRAYIDX13]], align 4
5588 // CHECK31-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]]
5589 // CHECK31: omp.body.continue14:
5590 // CHECK31-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]]
5591 // CHECK31: omp.inner.for.inc15:
5592 // CHECK31-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5593 // CHECK31-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP14]], 1
5594 // CHECK31-NEXT: store i32 [[ADD16]], i32* [[DOTOMP_IV]], align 4
5595 // CHECK31-NEXT: br label [[OMP_INNER_FOR_COND5]], !llvm.loop [[LOOP8:![0-9]+]]
5596 // CHECK31: omp.inner.for.end17:
5597 // CHECK31-NEXT: br label [[OMP_IF_END]]
5598 // CHECK31: omp_if.end:
5599 // CHECK31-NEXT: store i32 123, i32* [[I]], align 4
5600 // CHECK31-NEXT: [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5601 // CHECK31-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A18]], i32 0, i32 0
5602 // CHECK31-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX19]], align 4
5603 // CHECK31-NEXT: ret i32 [[TMP15]]
5604 //
5605 //
5606 // CHECK32-LABEL: define {{[^@]+}}@_Z21teams_template_structv
5607 // CHECK32-SAME: () #[[ATTR0:[0-9]+]] {
5608 // CHECK32-NEXT: entry:
5609 // CHECK32-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
5610 // CHECK32-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
5611 // CHECK32-NEXT: ret i32 [[CALL]]
5612 //
5613 //
5614 // CHECK32-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
5615 // CHECK32-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
5616 // CHECK32-NEXT: entry:
5617 // CHECK32-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5618 // CHECK32-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
5619 // CHECK32-NEXT: [[TMP:%.*]] = alloca i32, align 4
5620 // CHECK32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5621 // CHECK32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5622 // CHECK32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5623 // CHECK32-NEXT: [[I:%.*]] = alloca i32, align 4
5624 // CHECK32-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5625 // CHECK32-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5626 // CHECK32-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 1
5627 // CHECK32-NEXT: [[TMP0:%.*]] = load float, float* [[B]], align 4
5628 // CHECK32-NEXT: [[TOBOOL:%.*]] = fcmp une float [[TMP0]], 0.000000e+00
5629 // CHECK32-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
5630 // CHECK32-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
5631 // CHECK32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5632 // CHECK32-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
5633 // CHECK32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5634 // CHECK32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4
5635 // CHECK32-NEXT: [[TMP2:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
5636 // CHECK32-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP2]] to i1
5637 // CHECK32-NEXT: br i1 [[TOBOOL2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5638 // CHECK32: omp_if.then:
5639 // CHECK32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5640 // CHECK32: omp.inner.for.cond:
5641 // CHECK32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5642 // CHECK32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
5643 // CHECK32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP3]], [[TMP4]]
5644 // CHECK32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5645 // CHECK32: omp.inner.for.body:
5646 // CHECK32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5647 // CHECK32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP5]], 1
5648 // CHECK32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5649 // CHECK32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
5650 // CHECK32-NEXT: [[B3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
5651 // CHECK32-NEXT: [[TMP6:%.*]] = load float, float* [[B3]], align 4, !nontemporal !4, !llvm.access.group !3
5652 // CHECK32-NEXT: [[CONV:%.*]] = fptosi float [[TMP6]] to i32
5653 // CHECK32-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5654 // CHECK32-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
5655 // CHECK32-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP7]]
5656 // CHECK32-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
5657 // CHECK32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5658 // CHECK32: omp.body.continue:
5659 // CHECK32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5660 // CHECK32: omp.inner.for.inc:
5661 // CHECK32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5662 // CHECK32-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP8]], 1
5663 // CHECK32-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
5664 // CHECK32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
5665 // CHECK32: omp.inner.for.end:
5666 // CHECK32-NEXT: br label [[OMP_IF_END:%.*]]
5667 // CHECK32: omp_if.else:
5668 // CHECK32-NEXT: br label [[OMP_INNER_FOR_COND5:%.*]]
5669 // CHECK32: omp.inner.for.cond5:
5670 // CHECK32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5671 // CHECK32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5672 // CHECK32-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
5673 // CHECK32-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY7:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
5674 // CHECK32: omp.inner.for.body7:
5675 // CHECK32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5676 // CHECK32-NEXT: [[MUL8:%.*]] = mul nsw i32 [[TMP11]], 1
5677 // CHECK32-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
5678 // CHECK32-NEXT: store i32 [[ADD9]], i32* [[I]], align 4
5679 // CHECK32-NEXT: [[B10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
5680 // CHECK32-NEXT: [[TMP12:%.*]] = load float, float* [[B10]], align 4
5681 // CHECK32-NEXT: [[CONV11:%.*]] = fptosi float [[TMP12]] to i32
5682 // CHECK32-NEXT: [[A12:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5683 // CHECK32-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
5684 // CHECK32-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A12]], i32 0, i32 [[TMP13]]
5685 // CHECK32-NEXT: store i32 [[CONV11]], i32* [[ARRAYIDX13]], align 4
5686 // CHECK32-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]]
5687 // CHECK32: omp.body.continue14:
5688 // CHECK32-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]]
5689 // CHECK32: omp.inner.for.inc15:
5690 // CHECK32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5691 // CHECK32-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP14]], 1
5692 // CHECK32-NEXT: store i32 [[ADD16]], i32* [[DOTOMP_IV]], align 4
5693 // CHECK32-NEXT: br label [[OMP_INNER_FOR_COND5]], !llvm.loop [[LOOP8:![0-9]+]]
5694 // CHECK32: omp.inner.for.end17:
5695 // CHECK32-NEXT: br label [[OMP_IF_END]]
5696 // CHECK32: omp_if.end:
5697 // CHECK32-NEXT: store i32 123, i32* [[I]], align 4
5698 // CHECK32-NEXT: [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5699 // CHECK32-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A18]], i32 0, i32 0
5700 // CHECK32-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX19]], align 4
5701 // CHECK32-NEXT: ret i32 [[TMP15]]
5702 //
5703 //
5704 // CHECK33-LABEL: define {{[^@]+}}@main
5705 // CHECK33-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
5706 // CHECK33-NEXT: entry:
5707 // CHECK33-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
5708 // CHECK33-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
5709 // CHECK33-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
5710 // CHECK33-NEXT: [[N:%.*]] = alloca i32, align 4
5711 // CHECK33-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
5712 // CHECK33-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
5713 // CHECK33-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
5714 // CHECK33-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
5715 // CHECK33-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
5716 // CHECK33-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
5717 // CHECK33-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
5718 // CHECK33-NEXT: [[TMP:%.*]] = alloca i32, align 4
5719 // CHECK33-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5720 // CHECK33-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5721 // CHECK33-NEXT: store i32 0, i32* [[RETVAL]], align 4
5722 // CHECK33-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
5723 // CHECK33-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
5724 // CHECK33-NEXT: store i32 100, i32* [[N]], align 4
5725 // CHECK33-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
5726 // CHECK33-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
5727 // CHECK33-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
5728 // CHECK33-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
5729 // CHECK33-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
5730 // CHECK33-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
5731 // CHECK33-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
5732 // CHECK33-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
5733 // CHECK33-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
5734 // CHECK33-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
5735 // CHECK33-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
5736 // CHECK33-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5737 // CHECK33-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
5738 // CHECK33-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8
5739 // CHECK33-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5740 // CHECK33-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
5741 // CHECK33-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8
5742 // CHECK33-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
5743 // CHECK33-NEXT: store i64 4, i64* [[TMP10]], align 8
5744 // CHECK33-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
5745 // CHECK33-NEXT: store i8* null, i8** [[TMP11]], align 8
5746 // CHECK33-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
5747 // CHECK33-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
5748 // CHECK33-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8
5749 // CHECK33-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
5750 // CHECK33-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
5751 // CHECK33-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8
5752 // CHECK33-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
5753 // CHECK33-NEXT: store i64 8, i64* [[TMP16]], align 8
5754 // CHECK33-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
5755 // CHECK33-NEXT: store i8* null, i8** [[TMP17]], align 8
5756 // CHECK33-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
5757 // CHECK33-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
5758 // CHECK33-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8
5759 // CHECK33-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
5760 // CHECK33-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
5761 // CHECK33-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8
5762 // CHECK33-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
5763 // CHECK33-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8
5764 // CHECK33-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
5765 // CHECK33-NEXT: store i8* null, i8** [[TMP23]], align 8
5766 // CHECK33-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5767 // CHECK33-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5768 // CHECK33-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
5769 // CHECK33-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
5770 // CHECK33-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
5771 // CHECK33-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5772 // CHECK33-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
5773 // CHECK33-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5774 // CHECK33-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5775 // CHECK33-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5776 // CHECK33-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5777 // CHECK33-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
5778 // CHECK33-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
5779 // CHECK33-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]])
5780 // CHECK33-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
5781 // CHECK33-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
5782 // CHECK33-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5783 // CHECK33: omp_offload.failed:
5784 // CHECK33-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
5785 // CHECK33-NEXT: br label [[OMP_OFFLOAD_CONT]]
5786 // CHECK33: omp_offload.cont:
5787 // CHECK33-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
5788 // CHECK33-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP33]])
5789 // CHECK33-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
5790 // CHECK33-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
5791 // CHECK33-NEXT: call void @llvm.stackrestore(i8* [[TMP34]])
5792 // CHECK33-NEXT: [[TMP35:%.*]] = load i32, i32* [[RETVAL]], align 4
5793 // CHECK33-NEXT: ret i32 [[TMP35]]
5794 //
5795 //
5796 // CHECK33-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192
5797 // CHECK33-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
5798 // CHECK33-NEXT: entry:
5799 // CHECK33-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
5800 // CHECK33-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5801 // CHECK33-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5802 // CHECK33-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
5803 // CHECK33-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5804 // CHECK33-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5805 // CHECK33-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
5806 // CHECK33-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5807 // CHECK33-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5808 // CHECK33-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
5809 // CHECK33-NEXT: ret void
5810 //
5811 //
5812 // CHECK33-LABEL: define {{[^@]+}}@.omp_outlined.
5813 // CHECK33-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
5814 // CHECK33-NEXT: entry:
5815 // CHECK33-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5816 // CHECK33-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5817 // CHECK33-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
5818 // CHECK33-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5819 // CHECK33-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5820 // CHECK33-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5821 // CHECK33-NEXT: [[TMP:%.*]] = alloca i32, align 4
5822 // CHECK33-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5823 // CHECK33-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5824 // CHECK33-NEXT: [[I:%.*]] = alloca i32, align 4
5825 // CHECK33-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5826 // CHECK33-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5827 // CHECK33-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5828 // CHECK33-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5829 // CHECK33-NEXT: [[I3:%.*]] = alloca i32, align 4
5830 // CHECK33-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5831 // CHECK33-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5832 // CHECK33-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
5833 // CHECK33-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5834 // CHECK33-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5835 // CHECK33-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
5836 // CHECK33-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5837 // CHECK33-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5838 // CHECK33-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
5839 // CHECK33-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
5840 // CHECK33-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5841 // CHECK33-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
5842 // CHECK33-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5843 // CHECK33-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5844 // CHECK33-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5845 // CHECK33-NEXT: store i32 0, i32* [[I]], align 4
5846 // CHECK33-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5847 // CHECK33-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
5848 // CHECK33-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5849 // CHECK33: omp.precond.then:
5850 // CHECK33-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5851 // CHECK33-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5852 // CHECK33-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
5853 // CHECK33-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5854 // CHECK33-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5855 // CHECK33-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5856 // CHECK33-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
5857 // CHECK33-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5858 // CHECK33-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5859 // CHECK33-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5860 // CHECK33-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
5861 // CHECK33-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5862 // CHECK33: cond.true:
5863 // CHECK33-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5864 // CHECK33-NEXT: br label [[COND_END:%.*]]
5865 // CHECK33: cond.false:
5866 // CHECK33-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5867 // CHECK33-NEXT: br label [[COND_END]]
5868 // CHECK33: cond.end:
5869 // CHECK33-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
5870 // CHECK33-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5871 // CHECK33-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5872 // CHECK33-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
5873 // CHECK33-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5874 // CHECK33: omp.inner.for.cond:
5875 // CHECK33-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
5876 // CHECK33-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5
5877 // CHECK33-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
5878 // CHECK33-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5879 // CHECK33: omp.inner.for.body:
5880 // CHECK33-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
5881 // CHECK33-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
5882 // CHECK33-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5883 // CHECK33-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !5
5884 // CHECK33-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !5
5885 // CHECK33-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
5886 // CHECK33-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
5887 // CHECK33-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !5
5888 // CHECK33-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5889 // CHECK33: omp.body.continue:
5890 // CHECK33-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5891 // CHECK33: omp.inner.for.inc:
5892 // CHECK33-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
5893 // CHECK33-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1
5894 // CHECK33-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
5895 // CHECK33-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
5896 // CHECK33: omp.inner.for.end:
5897 // CHECK33-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5898 // CHECK33: omp.loop.exit:
5899 // CHECK33-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5900 // CHECK33-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
5901 // CHECK33-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
5902 // CHECK33-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5903 // CHECK33-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
5904 // CHECK33-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5905 // CHECK33: .omp.final.then:
5906 // CHECK33-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5907 // CHECK33-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 0
5908 // CHECK33-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
5909 // CHECK33-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
5910 // CHECK33-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
5911 // CHECK33-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
5912 // CHECK33-NEXT: br label [[DOTOMP_FINAL_DONE]]
5913 // CHECK33: .omp.final.done:
5914 // CHECK33-NEXT: br label [[OMP_PRECOND_END]]
5915 // CHECK33: omp.precond.end:
5916 // CHECK33-NEXT: ret void
5917 //
5918 //
5919 // CHECK33-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
5920 // CHECK33-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
5921 // CHECK33-NEXT: entry:
5922 // CHECK33-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
5923 // CHECK33-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
5924 // CHECK33-NEXT: [[TE:%.*]] = alloca i32, align 4
5925 // CHECK33-NEXT: [[TH:%.*]] = alloca i32, align 4
5926 // CHECK33-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8
5927 // CHECK33-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8
5928 // CHECK33-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
5929 // CHECK33-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
5930 // CHECK33-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
5931 // CHECK33-NEXT: [[TMP:%.*]] = alloca i32, align 4
5932 // CHECK33-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
5933 // CHECK33-NEXT: store i32 0, i32* [[TE]], align 4
5934 // CHECK33-NEXT: store i32 128, i32* [[TH]], align 4
5935 // CHECK33-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4
5936 // CHECK33-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32*
5937 // CHECK33-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
5938 // CHECK33-NEXT: [[TMP1:%.*]] = load i64, i64* [[TE_CASTED]], align 8
5939 // CHECK33-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
5940 // CHECK33-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32*
5941 // CHECK33-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
5942 // CHECK33-NEXT: [[TMP3:%.*]] = load i64, i64* [[TH_CASTED]], align 8
5943 // CHECK33-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5944 // CHECK33-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
5945 // CHECK33-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
5946 // CHECK33-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5947 // CHECK33-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
5948 // CHECK33-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8
5949 // CHECK33-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
5950 // CHECK33-NEXT: store i8* null, i8** [[TMP8]], align 8
5951 // CHECK33-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
5952 // CHECK33-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
5953 // CHECK33-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
5954 // CHECK33-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
5955 // CHECK33-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
5956 // CHECK33-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8
5957 // CHECK33-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
5958 // CHECK33-NEXT: store i8* null, i8** [[TMP13]], align 8
5959 // CHECK33-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
5960 // CHECK33-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]**
5961 // CHECK33-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 8
5962 // CHECK33-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
5963 // CHECK33-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]**
5964 // CHECK33-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 8
5965 // CHECK33-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
5966 // CHECK33-NEXT: store i8* null, i8** [[TMP18]], align 8
5967 // CHECK33-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5968 // CHECK33-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5969 // CHECK33-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4
5970 // CHECK33-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
5971 // CHECK33-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 1)
5972 // CHECK33-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
5973 // CHECK33-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5974 // CHECK33: omp_offload.failed:
5975 // CHECK33-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR3]]
5976 // CHECK33-NEXT: br label [[OMP_OFFLOAD_CONT]]
5977 // CHECK33: omp_offload.cont:
5978 // CHECK33-NEXT: ret i32 0
5979 //
5980 //
5981 // CHECK33-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181
5982 // CHECK33-SAME: (i64 [[TE:%.*]], i64 [[TH:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
5983 // CHECK33-NEXT: entry:
5984 // CHECK33-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8
5985 // CHECK33-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8
5986 // CHECK33-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
5987 // CHECK33-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
5988 // CHECK33-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8
5989 // CHECK33-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8
5990 // CHECK33-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
5991 // CHECK33-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32*
5992 // CHECK33-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32*
5993 // CHECK33-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
5994 // CHECK33-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
5995 // CHECK33-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8
5996 // CHECK33-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
5997 // CHECK33-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]])
5998 // CHECK33-NEXT: ret void
5999 //
6000 //
6001 // CHECK33-LABEL: define {{[^@]+}}@.omp_outlined..1
6002 // CHECK33-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6003 // CHECK33-NEXT: entry:
6004 // CHECK33-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6005 // CHECK33-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6006 // CHECK33-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6007 // CHECK33-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6008 // CHECK33-NEXT: [[TMP:%.*]] = alloca i32, align 4
6009 // CHECK33-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6010 // CHECK33-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6011 // CHECK33-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6012 // CHECK33-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6013 // CHECK33-NEXT: [[I:%.*]] = alloca i32, align 4
6014 // CHECK33-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6015 // CHECK33-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6016 // CHECK33-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6017 // CHECK33-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6018 // CHECK33-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6019 // CHECK33-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6020 // CHECK33-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6021 // CHECK33-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6022 // CHECK33-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6023 // CHECK33-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6024 // CHECK33-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6025 // CHECK33-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6026 // CHECK33-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6027 // CHECK33-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6028 // CHECK33: cond.true:
6029 // CHECK33-NEXT: br label [[COND_END:%.*]]
6030 // CHECK33: cond.false:
6031 // CHECK33-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6032 // CHECK33-NEXT: br label [[COND_END]]
6033 // CHECK33: cond.end:
6034 // CHECK33-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6035 // CHECK33-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6036 // CHECK33-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6037 // CHECK33-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6038 // CHECK33-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6039 // CHECK33: omp.inner.for.cond:
6040 // CHECK33-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
6041 // CHECK33-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
6042 // CHECK33-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6043 // CHECK33-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6044 // CHECK33: omp.inner.for.body:
6045 // CHECK33-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
6046 // CHECK33-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
6047 // CHECK33-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6048 // CHECK33-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11
6049 // CHECK33-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11
6050 // CHECK33-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
6051 // CHECK33-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
6052 // CHECK33-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
6053 // CHECK33-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6054 // CHECK33: omp.body.continue:
6055 // CHECK33-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6056 // CHECK33: omp.inner.for.inc:
6057 // CHECK33-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
6058 // CHECK33-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
6059 // CHECK33-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
6060 // CHECK33-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
6061 // CHECK33: omp.inner.for.end:
6062 // CHECK33-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6063 // CHECK33: omp.loop.exit:
6064 // CHECK33-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6065 // CHECK33-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6066 // CHECK33-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6067 // CHECK33-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6068 // CHECK33: .omp.final.then:
6069 // CHECK33-NEXT: store i32 10, i32* [[I]], align 4
6070 // CHECK33-NEXT: br label [[DOTOMP_FINAL_DONE]]
6071 // CHECK33: .omp.final.done:
6072 // CHECK33-NEXT: ret void
6073 //
6074 //
6075 // CHECK33-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
6076 // CHECK33-SAME: () #[[ATTR5:[0-9]+]] {
6077 // CHECK33-NEXT: entry:
6078 // CHECK33-NEXT: call void @__tgt_register_requires(i64 1)
6079 // CHECK33-NEXT: ret void
6080 //
6081 //
6082 // CHECK34-LABEL: define {{[^@]+}}@main
6083 // CHECK34-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
6084 // CHECK34-NEXT: entry:
6085 // CHECK34-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
6086 // CHECK34-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
6087 // CHECK34-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
6088 // CHECK34-NEXT: [[N:%.*]] = alloca i32, align 4
6089 // CHECK34-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
6090 // CHECK34-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
6091 // CHECK34-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
6092 // CHECK34-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
6093 // CHECK34-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
6094 // CHECK34-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
6095 // CHECK34-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
6096 // CHECK34-NEXT: [[TMP:%.*]] = alloca i32, align 4
6097 // CHECK34-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6098 // CHECK34-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
6099 // CHECK34-NEXT: store i32 0, i32* [[RETVAL]], align 4
6100 // CHECK34-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
6101 // CHECK34-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
6102 // CHECK34-NEXT: store i32 100, i32* [[N]], align 4
6103 // CHECK34-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
6104 // CHECK34-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
6105 // CHECK34-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
6106 // CHECK34-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
6107 // CHECK34-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
6108 // CHECK34-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
6109 // CHECK34-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
6110 // CHECK34-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
6111 // CHECK34-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
6112 // CHECK34-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
6113 // CHECK34-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
6114 // CHECK34-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6115 // CHECK34-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
6116 // CHECK34-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8
6117 // CHECK34-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6118 // CHECK34-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
6119 // CHECK34-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8
6120 // CHECK34-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
6121 // CHECK34-NEXT: store i64 4, i64* [[TMP10]], align 8
6122 // CHECK34-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
6123 // CHECK34-NEXT: store i8* null, i8** [[TMP11]], align 8
6124 // CHECK34-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
6125 // CHECK34-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
6126 // CHECK34-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8
6127 // CHECK34-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
6128 // CHECK34-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
6129 // CHECK34-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8
6130 // CHECK34-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
6131 // CHECK34-NEXT: store i64 8, i64* [[TMP16]], align 8
6132 // CHECK34-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
6133 // CHECK34-NEXT: store i8* null, i8** [[TMP17]], align 8
6134 // CHECK34-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
6135 // CHECK34-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
6136 // CHECK34-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8
6137 // CHECK34-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
6138 // CHECK34-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
6139 // CHECK34-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8
6140 // CHECK34-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
6141 // CHECK34-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8
6142 // CHECK34-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
6143 // CHECK34-NEXT: store i8* null, i8** [[TMP23]], align 8
6144 // CHECK34-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6145 // CHECK34-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6146 // CHECK34-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
6147 // CHECK34-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
6148 // CHECK34-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
6149 // CHECK34-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6150 // CHECK34-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
6151 // CHECK34-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6152 // CHECK34-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
6153 // CHECK34-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
6154 // CHECK34-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6155 // CHECK34-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
6156 // CHECK34-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
6157 // CHECK34-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]])
6158 // CHECK34-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
6159 // CHECK34-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
6160 // CHECK34-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6161 // CHECK34: omp_offload.failed:
6162 // CHECK34-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
6163 // CHECK34-NEXT: br label [[OMP_OFFLOAD_CONT]]
6164 // CHECK34: omp_offload.cont:
6165 // CHECK34-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
6166 // CHECK34-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP33]])
6167 // CHECK34-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
6168 // CHECK34-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
6169 // CHECK34-NEXT: call void @llvm.stackrestore(i8* [[TMP34]])
6170 // CHECK34-NEXT: [[TMP35:%.*]] = load i32, i32* [[RETVAL]], align 4
6171 // CHECK34-NEXT: ret i32 [[TMP35]]
6172 //
6173 //
6174 // CHECK34-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192
6175 // CHECK34-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
6176 // CHECK34-NEXT: entry:
6177 // CHECK34-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
6178 // CHECK34-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
6179 // CHECK34-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
6180 // CHECK34-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
6181 // CHECK34-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
6182 // CHECK34-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
6183 // CHECK34-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
6184 // CHECK34-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
6185 // CHECK34-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
6186 // CHECK34-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
6187 // CHECK34-NEXT: ret void
6188 //
6189 //
6190 // CHECK34-LABEL: define {{[^@]+}}@.omp_outlined.
6191 // CHECK34-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
6192 // CHECK34-NEXT: entry:
6193 // CHECK34-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6194 // CHECK34-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6195 // CHECK34-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
6196 // CHECK34-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
6197 // CHECK34-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
6198 // CHECK34-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6199 // CHECK34-NEXT: [[TMP:%.*]] = alloca i32, align 4
6200 // CHECK34-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6201 // CHECK34-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
6202 // CHECK34-NEXT: [[I:%.*]] = alloca i32, align 4
6203 // CHECK34-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6204 // CHECK34-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6205 // CHECK34-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6206 // CHECK34-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6207 // CHECK34-NEXT: [[I3:%.*]] = alloca i32, align 4
6208 // CHECK34-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6209 // CHECK34-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6210 // CHECK34-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
6211 // CHECK34-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
6212 // CHECK34-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
6213 // CHECK34-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
6214 // CHECK34-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
6215 // CHECK34-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
6216 // CHECK34-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
6217 // CHECK34-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
6218 // CHECK34-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6219 // CHECK34-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
6220 // CHECK34-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6221 // CHECK34-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
6222 // CHECK34-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
6223 // CHECK34-NEXT: store i32 0, i32* [[I]], align 4
6224 // CHECK34-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6225 // CHECK34-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
6226 // CHECK34-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
6227 // CHECK34: omp.precond.then:
6228 // CHECK34-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6229 // CHECK34-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6230 // CHECK34-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
6231 // CHECK34-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6232 // CHECK34-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6233 // CHECK34-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6234 // CHECK34-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
6235 // CHECK34-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6236 // CHECK34-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6237 // CHECK34-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6238 // CHECK34-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
6239 // CHECK34-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6240 // CHECK34: cond.true:
6241 // CHECK34-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6242 // CHECK34-NEXT: br label [[COND_END:%.*]]
6243 // CHECK34: cond.false:
6244 // CHECK34-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6245 // CHECK34-NEXT: br label [[COND_END]]
6246 // CHECK34: cond.end:
6247 // CHECK34-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
6248 // CHECK34-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6249 // CHECK34-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6250 // CHECK34-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
6251 // CHECK34-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6252 // CHECK34: omp.inner.for.cond:
6253 // CHECK34-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
6254 // CHECK34-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5
6255 // CHECK34-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
6256 // CHECK34-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6257 // CHECK34: omp.inner.for.body:
6258 // CHECK34-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
6259 // CHECK34-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
6260 // CHECK34-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6261 // CHECK34-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !5
6262 // CHECK34-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !5
6263 // CHECK34-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
6264 // CHECK34-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
6265 // CHECK34-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !5
6266 // CHECK34-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6267 // CHECK34: omp.body.continue:
6268 // CHECK34-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6269 // CHECK34: omp.inner.for.inc:
6270 // CHECK34-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
6271 // CHECK34-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1
6272 // CHECK34-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
6273 // CHECK34-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
6274 // CHECK34: omp.inner.for.end:
6275 // CHECK34-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6276 // CHECK34: omp.loop.exit:
6277 // CHECK34-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6278 // CHECK34-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
6279 // CHECK34-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
6280 // CHECK34-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6281 // CHECK34-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
6282 // CHECK34-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6283 // CHECK34: .omp.final.then:
6284 // CHECK34-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6285 // CHECK34-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 0
6286 // CHECK34-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
6287 // CHECK34-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
6288 // CHECK34-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
6289 // CHECK34-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
6290 // CHECK34-NEXT: br label [[DOTOMP_FINAL_DONE]]
6291 // CHECK34: .omp.final.done:
6292 // CHECK34-NEXT: br label [[OMP_PRECOND_END]]
6293 // CHECK34: omp.precond.end:
6294 // CHECK34-NEXT: ret void
6295 //
6296 //
6297 // CHECK34-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
6298 // CHECK34-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
6299 // CHECK34-NEXT: entry:
6300 // CHECK34-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
6301 // CHECK34-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
6302 // CHECK34-NEXT: [[TE:%.*]] = alloca i32, align 4
6303 // CHECK34-NEXT: [[TH:%.*]] = alloca i32, align 4
6304 // CHECK34-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8
6305 // CHECK34-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8
6306 // CHECK34-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
6307 // CHECK34-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
6308 // CHECK34-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
6309 // CHECK34-NEXT: [[TMP:%.*]] = alloca i32, align 4
6310 // CHECK34-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
6311 // CHECK34-NEXT: store i32 0, i32* [[TE]], align 4
6312 // CHECK34-NEXT: store i32 128, i32* [[TH]], align 4
6313 // CHECK34-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4
6314 // CHECK34-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32*
6315 // CHECK34-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
6316 // CHECK34-NEXT: [[TMP1:%.*]] = load i64, i64* [[TE_CASTED]], align 8
6317 // CHECK34-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
6318 // CHECK34-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32*
6319 // CHECK34-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
6320 // CHECK34-NEXT: [[TMP3:%.*]] = load i64, i64* [[TH_CASTED]], align 8
6321 // CHECK34-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6322 // CHECK34-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
6323 // CHECK34-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
6324 // CHECK34-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6325 // CHECK34-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
6326 // CHECK34-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8
6327 // CHECK34-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
6328 // CHECK34-NEXT: store i8* null, i8** [[TMP8]], align 8
6329 // CHECK34-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
6330 // CHECK34-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
6331 // CHECK34-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
6332 // CHECK34-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
6333 // CHECK34-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
6334 // CHECK34-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8
6335 // CHECK34-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
6336 // CHECK34-NEXT: store i8* null, i8** [[TMP13]], align 8
6337 // CHECK34-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
6338 // CHECK34-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]**
6339 // CHECK34-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 8
6340 // CHECK34-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
6341 // CHECK34-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]**
6342 // CHECK34-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 8
6343 // CHECK34-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
6344 // CHECK34-NEXT: store i8* null, i8** [[TMP18]], align 8
6345 // CHECK34-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6346 // CHECK34-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6347 // CHECK34-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4
6348 // CHECK34-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
6349 // CHECK34-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 1)
6350 // CHECK34-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
6351 // CHECK34-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6352 // CHECK34: omp_offload.failed:
6353 // CHECK34-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR3]]
6354 // CHECK34-NEXT: br label [[OMP_OFFLOAD_CONT]]
6355 // CHECK34: omp_offload.cont:
6356 // CHECK34-NEXT: ret i32 0
6357 //
6358 //
6359 // CHECK34-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181
6360 // CHECK34-SAME: (i64 [[TE:%.*]], i64 [[TH:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6361 // CHECK34-NEXT: entry:
6362 // CHECK34-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8
6363 // CHECK34-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8
6364 // CHECK34-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6365 // CHECK34-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
6366 // CHECK34-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8
6367 // CHECK34-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8
6368 // CHECK34-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6369 // CHECK34-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32*
6370 // CHECK34-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32*
6371 // CHECK34-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6372 // CHECK34-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
6373 // CHECK34-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8
6374 // CHECK34-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
6375 // CHECK34-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]])
6376 // CHECK34-NEXT: ret void
6377 //
6378 //
6379 // CHECK34-LABEL: define {{[^@]+}}@.omp_outlined..1
6380 // CHECK34-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6381 // CHECK34-NEXT: entry:
6382 // CHECK34-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6383 // CHECK34-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6384 // CHECK34-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6385 // CHECK34-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6386 // CHECK34-NEXT: [[TMP:%.*]] = alloca i32, align 4
6387 // CHECK34-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6388 // CHECK34-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6389 // CHECK34-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6390 // CHECK34-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6391 // CHECK34-NEXT: [[I:%.*]] = alloca i32, align 4
6392 // CHECK34-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6393 // CHECK34-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6394 // CHECK34-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6395 // CHECK34-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6396 // CHECK34-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6397 // CHECK34-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6398 // CHECK34-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6399 // CHECK34-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6400 // CHECK34-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6401 // CHECK34-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6402 // CHECK34-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6403 // CHECK34-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6404 // CHECK34-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6405 // CHECK34-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6406 // CHECK34: cond.true:
6407 // CHECK34-NEXT: br label [[COND_END:%.*]]
6408 // CHECK34: cond.false:
6409 // CHECK34-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6410 // CHECK34-NEXT: br label [[COND_END]]
6411 // CHECK34: cond.end:
6412 // CHECK34-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6413 // CHECK34-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6414 // CHECK34-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6415 // CHECK34-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6416 // CHECK34-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6417 // CHECK34: omp.inner.for.cond:
6418 // CHECK34-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
6419 // CHECK34-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
6420 // CHECK34-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6421 // CHECK34-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6422 // CHECK34: omp.inner.for.body:
6423 // CHECK34-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
6424 // CHECK34-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
6425 // CHECK34-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6426 // CHECK34-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11
6427 // CHECK34-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11
6428 // CHECK34-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
6429 // CHECK34-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
6430 // CHECK34-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
6431 // CHECK34-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6432 // CHECK34: omp.body.continue:
6433 // CHECK34-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6434 // CHECK34: omp.inner.for.inc:
6435 // CHECK34-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
6436 // CHECK34-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
6437 // CHECK34-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
6438 // CHECK34-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
6439 // CHECK34: omp.inner.for.end:
6440 // CHECK34-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6441 // CHECK34: omp.loop.exit:
6442 // CHECK34-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6443 // CHECK34-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6444 // CHECK34-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6445 // CHECK34-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6446 // CHECK34: .omp.final.then:
6447 // CHECK34-NEXT: store i32 10, i32* [[I]], align 4
6448 // CHECK34-NEXT: br label [[DOTOMP_FINAL_DONE]]
6449 // CHECK34: .omp.final.done:
6450 // CHECK34-NEXT: ret void
6451 //
6452 //
6453 // CHECK34-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
6454 // CHECK34-SAME: () #[[ATTR5:[0-9]+]] {
6455 // CHECK34-NEXT: entry:
6456 // CHECK34-NEXT: call void @__tgt_register_requires(i64 1)
6457 // CHECK34-NEXT: ret void
6458 //
6459 //
6460 // CHECK35-LABEL: define {{[^@]+}}@main
6461 // CHECK35-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
6462 // CHECK35-NEXT: entry:
6463 // CHECK35-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
6464 // CHECK35-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
6465 // CHECK35-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
6466 // CHECK35-NEXT: [[N:%.*]] = alloca i32, align 4
6467 // CHECK35-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
6468 // CHECK35-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
6469 // CHECK35-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
6470 // CHECK35-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
6471 // CHECK35-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
6472 // CHECK35-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
6473 // CHECK35-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
6474 // CHECK35-NEXT: [[TMP:%.*]] = alloca i32, align 4
6475 // CHECK35-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6476 // CHECK35-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
6477 // CHECK35-NEXT: store i32 0, i32* [[RETVAL]], align 4
6478 // CHECK35-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
6479 // CHECK35-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
6480 // CHECK35-NEXT: store i32 100, i32* [[N]], align 4
6481 // CHECK35-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
6482 // CHECK35-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
6483 // CHECK35-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
6484 // CHECK35-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
6485 // CHECK35-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
6486 // CHECK35-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
6487 // CHECK35-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
6488 // CHECK35-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
6489 // CHECK35-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
6490 // CHECK35-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
6491 // CHECK35-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6492 // CHECK35-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
6493 // CHECK35-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4
6494 // CHECK35-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6495 // CHECK35-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
6496 // CHECK35-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4
6497 // CHECK35-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
6498 // CHECK35-NEXT: store i64 4, i64* [[TMP10]], align 4
6499 // CHECK35-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
6500 // CHECK35-NEXT: store i8* null, i8** [[TMP11]], align 4
6501 // CHECK35-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
6502 // CHECK35-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
6503 // CHECK35-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4
6504 // CHECK35-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
6505 // CHECK35-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
6506 // CHECK35-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4
6507 // CHECK35-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
6508 // CHECK35-NEXT: store i64 4, i64* [[TMP16]], align 4
6509 // CHECK35-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
6510 // CHECK35-NEXT: store i8* null, i8** [[TMP17]], align 4
6511 // CHECK35-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
6512 // CHECK35-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
6513 // CHECK35-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4
6514 // CHECK35-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
6515 // CHECK35-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
6516 // CHECK35-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4
6517 // CHECK35-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
6518 // CHECK35-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4
6519 // CHECK35-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
6520 // CHECK35-NEXT: store i8* null, i8** [[TMP23]], align 4
6521 // CHECK35-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6522 // CHECK35-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6523 // CHECK35-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
6524 // CHECK35-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
6525 // CHECK35-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
6526 // CHECK35-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6527 // CHECK35-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
6528 // CHECK35-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6529 // CHECK35-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
6530 // CHECK35-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
6531 // CHECK35-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6532 // CHECK35-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
6533 // CHECK35-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
6534 // CHECK35-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]])
6535 // CHECK35-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
6536 // CHECK35-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
6537 // CHECK35-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6538 // CHECK35: omp_offload.failed:
6539 // CHECK35-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
6540 // CHECK35-NEXT: br label [[OMP_OFFLOAD_CONT]]
6541 // CHECK35: omp_offload.cont:
6542 // CHECK35-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
6543 // CHECK35-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP33]])
6544 // CHECK35-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
6545 // CHECK35-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
6546 // CHECK35-NEXT: call void @llvm.stackrestore(i8* [[TMP34]])
6547 // CHECK35-NEXT: [[TMP35:%.*]] = load i32, i32* [[RETVAL]], align 4
6548 // CHECK35-NEXT: ret i32 [[TMP35]]
6549 //
6550 //
6551 // CHECK35-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192
6552 // CHECK35-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
6553 // CHECK35-NEXT: entry:
6554 // CHECK35-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
6555 // CHECK35-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
6556 // CHECK35-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
6557 // CHECK35-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
6558 // CHECK35-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
6559 // CHECK35-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
6560 // CHECK35-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
6561 // CHECK35-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
6562 // CHECK35-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
6563 // CHECK35-NEXT: ret void
6564 //
6565 //
6566 // CHECK35-LABEL: define {{[^@]+}}@.omp_outlined.
6567 // CHECK35-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
6568 // CHECK35-NEXT: entry:
6569 // CHECK35-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6570 // CHECK35-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6571 // CHECK35-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
6572 // CHECK35-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
6573 // CHECK35-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
6574 // CHECK35-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6575 // CHECK35-NEXT: [[TMP:%.*]] = alloca i32, align 4
6576 // CHECK35-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6577 // CHECK35-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
6578 // CHECK35-NEXT: [[I:%.*]] = alloca i32, align 4
6579 // CHECK35-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6580 // CHECK35-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6581 // CHECK35-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6582 // CHECK35-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6583 // CHECK35-NEXT: [[I3:%.*]] = alloca i32, align 4
6584 // CHECK35-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6585 // CHECK35-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6586 // CHECK35-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
6587 // CHECK35-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
6588 // CHECK35-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
6589 // CHECK35-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
6590 // CHECK35-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
6591 // CHECK35-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
6592 // CHECK35-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
6593 // CHECK35-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
6594 // CHECK35-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6595 // CHECK35-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
6596 // CHECK35-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6597 // CHECK35-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
6598 // CHECK35-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
6599 // CHECK35-NEXT: store i32 0, i32* [[I]], align 4
6600 // CHECK35-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6601 // CHECK35-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
6602 // CHECK35-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
6603 // CHECK35: omp.precond.then:
6604 // CHECK35-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6605 // CHECK35-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6606 // CHECK35-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
6607 // CHECK35-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6608 // CHECK35-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6609 // CHECK35-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6610 // CHECK35-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
6611 // CHECK35-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6612 // CHECK35-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6613 // CHECK35-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6614 // CHECK35-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
6615 // CHECK35-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6616 // CHECK35: cond.true:
6617 // CHECK35-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6618 // CHECK35-NEXT: br label [[COND_END:%.*]]
6619 // CHECK35: cond.false:
6620 // CHECK35-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6621 // CHECK35-NEXT: br label [[COND_END]]
6622 // CHECK35: cond.end:
6623 // CHECK35-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
6624 // CHECK35-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6625 // CHECK35-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6626 // CHECK35-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
6627 // CHECK35-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6628 // CHECK35: omp.inner.for.cond:
6629 // CHECK35-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
6630 // CHECK35-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
6631 // CHECK35-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
6632 // CHECK35-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6633 // CHECK35: omp.inner.for.body:
6634 // CHECK35-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
6635 // CHECK35-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
6636 // CHECK35-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6637 // CHECK35-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !6
6638 // CHECK35-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !6
6639 // CHECK35-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]]
6640 // CHECK35-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
6641 // CHECK35-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6642 // CHECK35: omp.body.continue:
6643 // CHECK35-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6644 // CHECK35: omp.inner.for.inc:
6645 // CHECK35-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
6646 // CHECK35-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1
6647 // CHECK35-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
6648 // CHECK35-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
6649 // CHECK35: omp.inner.for.end:
6650 // CHECK35-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6651 // CHECK35: omp.loop.exit:
6652 // CHECK35-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6653 // CHECK35-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
6654 // CHECK35-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
6655 // CHECK35-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6656 // CHECK35-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
6657 // CHECK35-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6658 // CHECK35: .omp.final.then:
6659 // CHECK35-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6660 // CHECK35-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 0
6661 // CHECK35-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
6662 // CHECK35-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
6663 // CHECK35-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
6664 // CHECK35-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
6665 // CHECK35-NEXT: br label [[DOTOMP_FINAL_DONE]]
6666 // CHECK35: .omp.final.done:
6667 // CHECK35-NEXT: br label [[OMP_PRECOND_END]]
6668 // CHECK35: omp.precond.end:
6669 // CHECK35-NEXT: ret void
6670 //
6671 //
6672 // CHECK35-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
6673 // CHECK35-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
6674 // CHECK35-NEXT: entry:
6675 // CHECK35-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
6676 // CHECK35-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
6677 // CHECK35-NEXT: [[TE:%.*]] = alloca i32, align 4
6678 // CHECK35-NEXT: [[TH:%.*]] = alloca i32, align 4
6679 // CHECK35-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4
6680 // CHECK35-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4
6681 // CHECK35-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
6682 // CHECK35-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
6683 // CHECK35-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
6684 // CHECK35-NEXT: [[TMP:%.*]] = alloca i32, align 4
6685 // CHECK35-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
6686 // CHECK35-NEXT: store i32 0, i32* [[TE]], align 4
6687 // CHECK35-NEXT: store i32 128, i32* [[TH]], align 4
6688 // CHECK35-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4
6689 // CHECK35-NEXT: store i32 [[TMP0]], i32* [[TE_CASTED]], align 4
6690 // CHECK35-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE_CASTED]], align 4
6691 // CHECK35-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
6692 // CHECK35-NEXT: store i32 [[TMP2]], i32* [[TH_CASTED]], align 4
6693 // CHECK35-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_CASTED]], align 4
6694 // CHECK35-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6695 // CHECK35-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*
6696 // CHECK35-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4
6697 // CHECK35-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6698 // CHECK35-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
6699 // CHECK35-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4
6700 // CHECK35-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
6701 // CHECK35-NEXT: store i8* null, i8** [[TMP8]], align 4
6702 // CHECK35-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
6703 // CHECK35-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
6704 // CHECK35-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
6705 // CHECK35-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
6706 // CHECK35-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
6707 // CHECK35-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4
6708 // CHECK35-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
6709 // CHECK35-NEXT: store i8* null, i8** [[TMP13]], align 4
6710 // CHECK35-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
6711 // CHECK35-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]**
6712 // CHECK35-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 4
6713 // CHECK35-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
6714 // CHECK35-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]**
6715 // CHECK35-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 4
6716 // CHECK35-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
6717 // CHECK35-NEXT: store i8* null, i8** [[TMP18]], align 4
6718 // CHECK35-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6719 // CHECK35-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6720 // CHECK35-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4
6721 // CHECK35-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
6722 // CHECK35-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 1)
6723 // CHECK35-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
6724 // CHECK35-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6725 // CHECK35: omp_offload.failed:
6726 // CHECK35-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR3]]
6727 // CHECK35-NEXT: br label [[OMP_OFFLOAD_CONT]]
6728 // CHECK35: omp_offload.cont:
6729 // CHECK35-NEXT: ret i32 0
6730 //
6731 //
6732 // CHECK35-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181
6733 // CHECK35-SAME: (i32 [[TE:%.*]], i32 [[TH:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6734 // CHECK35-NEXT: entry:
6735 // CHECK35-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4
6736 // CHECK35-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4
6737 // CHECK35-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
6738 // CHECK35-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
6739 // CHECK35-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4
6740 // CHECK35-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4
6741 // CHECK35-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
6742 // CHECK35-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
6743 // CHECK35-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4
6744 // CHECK35-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4
6745 // CHECK35-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
6746 // CHECK35-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]])
6747 // CHECK35-NEXT: ret void
6748 //
6749 //
6750 // CHECK35-LABEL: define {{[^@]+}}@.omp_outlined..1
6751 // CHECK35-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6752 // CHECK35-NEXT: entry:
6753 // CHECK35-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6754 // CHECK35-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6755 // CHECK35-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
6756 // CHECK35-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6757 // CHECK35-NEXT: [[TMP:%.*]] = alloca i32, align 4
6758 // CHECK35-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6759 // CHECK35-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6760 // CHECK35-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6761 // CHECK35-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6762 // CHECK35-NEXT: [[I:%.*]] = alloca i32, align 4
6763 // CHECK35-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6764 // CHECK35-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6765 // CHECK35-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
6766 // CHECK35-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
6767 // CHECK35-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6768 // CHECK35-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6769 // CHECK35-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6770 // CHECK35-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6771 // CHECK35-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6772 // CHECK35-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6773 // CHECK35-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6774 // CHECK35-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6775 // CHECK35-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6776 // CHECK35-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6777 // CHECK35: cond.true:
6778 // CHECK35-NEXT: br label [[COND_END:%.*]]
6779 // CHECK35: cond.false:
6780 // CHECK35-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6781 // CHECK35-NEXT: br label [[COND_END]]
6782 // CHECK35: cond.end:
6783 // CHECK35-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6784 // CHECK35-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6785 // CHECK35-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6786 // CHECK35-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6787 // CHECK35-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6788 // CHECK35: omp.inner.for.cond:
6789 // CHECK35-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
6790 // CHECK35-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
6791 // CHECK35-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6792 // CHECK35-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6793 // CHECK35: omp.inner.for.body:
6794 // CHECK35-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
6795 // CHECK35-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
6796 // CHECK35-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6797 // CHECK35-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12
6798 // CHECK35-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
6799 // CHECK35-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
6800 // CHECK35-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
6801 // CHECK35-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6802 // CHECK35: omp.body.continue:
6803 // CHECK35-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6804 // CHECK35: omp.inner.for.inc:
6805 // CHECK35-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
6806 // CHECK35-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
6807 // CHECK35-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
6808 // CHECK35-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
6809 // CHECK35: omp.inner.for.end:
6810 // CHECK35-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6811 // CHECK35: omp.loop.exit:
6812 // CHECK35-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6813 // CHECK35-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6814 // CHECK35-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6815 // CHECK35-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6816 // CHECK35: .omp.final.then:
6817 // CHECK35-NEXT: store i32 10, i32* [[I]], align 4
6818 // CHECK35-NEXT: br label [[DOTOMP_FINAL_DONE]]
6819 // CHECK35: .omp.final.done:
6820 // CHECK35-NEXT: ret void
6821 //
6822 //
6823 // CHECK35-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
6824 // CHECK35-SAME: () #[[ATTR5:[0-9]+]] {
6825 // CHECK35-NEXT: entry:
6826 // CHECK35-NEXT: call void @__tgt_register_requires(i64 1)
6827 // CHECK35-NEXT: ret void
6828 //
6829 //
6830 // CHECK36-LABEL: define {{[^@]+}}@main
6831 // CHECK36-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
6832 // CHECK36-NEXT: entry:
6833 // CHECK36-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
6834 // CHECK36-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
6835 // CHECK36-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
6836 // CHECK36-NEXT: [[N:%.*]] = alloca i32, align 4
6837 // CHECK36-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
6838 // CHECK36-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
6839 // CHECK36-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
6840 // CHECK36-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
6841 // CHECK36-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
6842 // CHECK36-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
6843 // CHECK36-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
6844 // CHECK36-NEXT: [[TMP:%.*]] = alloca i32, align 4
6845 // CHECK36-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6846 // CHECK36-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
6847 // CHECK36-NEXT: store i32 0, i32* [[RETVAL]], align 4
6848 // CHECK36-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
6849 // CHECK36-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
6850 // CHECK36-NEXT: store i32 100, i32* [[N]], align 4
6851 // CHECK36-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
6852 // CHECK36-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
6853 // CHECK36-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
6854 // CHECK36-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
6855 // CHECK36-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
6856 // CHECK36-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
6857 // CHECK36-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
6858 // CHECK36-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
6859 // CHECK36-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
6860 // CHECK36-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
6861 // CHECK36-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6862 // CHECK36-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
6863 // CHECK36-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4
6864 // CHECK36-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6865 // CHECK36-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
6866 // CHECK36-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4
6867 // CHECK36-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
6868 // CHECK36-NEXT: store i64 4, i64* [[TMP10]], align 4
6869 // CHECK36-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
6870 // CHECK36-NEXT: store i8* null, i8** [[TMP11]], align 4
6871 // CHECK36-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
6872 // CHECK36-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
6873 // CHECK36-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4
6874 // CHECK36-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
6875 // CHECK36-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
6876 // CHECK36-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4
6877 // CHECK36-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
6878 // CHECK36-NEXT: store i64 4, i64* [[TMP16]], align 4
6879 // CHECK36-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
6880 // CHECK36-NEXT: store i8* null, i8** [[TMP17]], align 4
6881 // CHECK36-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
6882 // CHECK36-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
6883 // CHECK36-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4
6884 // CHECK36-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
6885 // CHECK36-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
6886 // CHECK36-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4
6887 // CHECK36-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
6888 // CHECK36-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4
6889 // CHECK36-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
6890 // CHECK36-NEXT: store i8* null, i8** [[TMP23]], align 4
6891 // CHECK36-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6892 // CHECK36-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6893 // CHECK36-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
6894 // CHECK36-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
6895 // CHECK36-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
6896 // CHECK36-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6897 // CHECK36-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
6898 // CHECK36-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6899 // CHECK36-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
6900 // CHECK36-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
6901 // CHECK36-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6902 // CHECK36-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
6903 // CHECK36-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
6904 // CHECK36-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]])
6905 // CHECK36-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
6906 // CHECK36-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
6907 // CHECK36-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6908 // CHECK36: omp_offload.failed:
6909 // CHECK36-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
6910 // CHECK36-NEXT: br label [[OMP_OFFLOAD_CONT]]
6911 // CHECK36: omp_offload.cont:
6912 // CHECK36-NEXT: [[TMP33:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
6913 // CHECK36-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP33]])
6914 // CHECK36-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
6915 // CHECK36-NEXT: [[TMP34:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
6916 // CHECK36-NEXT: call void @llvm.stackrestore(i8* [[TMP34]])
6917 // CHECK36-NEXT: [[TMP35:%.*]] = load i32, i32* [[RETVAL]], align 4
6918 // CHECK36-NEXT: ret i32 [[TMP35]]
6919 //
6920 //
6921 // CHECK36-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192
6922 // CHECK36-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
6923 // CHECK36-NEXT: entry:
6924 // CHECK36-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
6925 // CHECK36-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
6926 // CHECK36-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
6927 // CHECK36-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
6928 // CHECK36-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
6929 // CHECK36-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
6930 // CHECK36-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
6931 // CHECK36-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
6932 // CHECK36-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
6933 // CHECK36-NEXT: ret void
6934 //
6935 //
6936 // CHECK36-LABEL: define {{[^@]+}}@.omp_outlined.
6937 // CHECK36-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
6938 // CHECK36-NEXT: entry:
6939 // CHECK36-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6940 // CHECK36-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6941 // CHECK36-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
6942 // CHECK36-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
6943 // CHECK36-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
6944 // CHECK36-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6945 // CHECK36-NEXT: [[TMP:%.*]] = alloca i32, align 4
6946 // CHECK36-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6947 // CHECK36-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
6948 // CHECK36-NEXT: [[I:%.*]] = alloca i32, align 4
6949 // CHECK36-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6950 // CHECK36-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6951 // CHECK36-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6952 // CHECK36-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6953 // CHECK36-NEXT: [[I3:%.*]] = alloca i32, align 4
6954 // CHECK36-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6955 // CHECK36-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6956 // CHECK36-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
6957 // CHECK36-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
6958 // CHECK36-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
6959 // CHECK36-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
6960 // CHECK36-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
6961 // CHECK36-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
6962 // CHECK36-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
6963 // CHECK36-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
6964 // CHECK36-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6965 // CHECK36-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
6966 // CHECK36-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6967 // CHECK36-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
6968 // CHECK36-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
6969 // CHECK36-NEXT: store i32 0, i32* [[I]], align 4
6970 // CHECK36-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6971 // CHECK36-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
6972 // CHECK36-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
6973 // CHECK36: omp.precond.then:
6974 // CHECK36-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6975 // CHECK36-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6976 // CHECK36-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
6977 // CHECK36-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6978 // CHECK36-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6979 // CHECK36-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6980 // CHECK36-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
6981 // CHECK36-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6982 // CHECK36-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6983 // CHECK36-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6984 // CHECK36-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
6985 // CHECK36-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6986 // CHECK36: cond.true:
6987 // CHECK36-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6988 // CHECK36-NEXT: br label [[COND_END:%.*]]
6989 // CHECK36: cond.false:
6990 // CHECK36-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6991 // CHECK36-NEXT: br label [[COND_END]]
6992 // CHECK36: cond.end:
6993 // CHECK36-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
6994 // CHECK36-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6995 // CHECK36-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6996 // CHECK36-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
6997 // CHECK36-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6998 // CHECK36: omp.inner.for.cond:
6999 // CHECK36-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
7000 // CHECK36-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
7001 // CHECK36-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
7002 // CHECK36-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7003 // CHECK36: omp.inner.for.body:
7004 // CHECK36-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
7005 // CHECK36-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
7006 // CHECK36-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7007 // CHECK36-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !6
7008 // CHECK36-NEXT: [[TMP17:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !6
7009 // CHECK36-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP17]]
7010 // CHECK36-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
7011 // CHECK36-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7012 // CHECK36: omp.body.continue:
7013 // CHECK36-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7014 // CHECK36: omp.inner.for.inc:
7015 // CHECK36-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
7016 // CHECK36-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1
7017 // CHECK36-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
7018 // CHECK36-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
7019 // CHECK36: omp.inner.for.end:
7020 // CHECK36-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7021 // CHECK36: omp.loop.exit:
7022 // CHECK36-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7023 // CHECK36-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
7024 // CHECK36-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
7025 // CHECK36-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7026 // CHECK36-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
7027 // CHECK36-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7028 // CHECK36: .omp.final.then:
7029 // CHECK36-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7030 // CHECK36-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 0
7031 // CHECK36-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
7032 // CHECK36-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
7033 // CHECK36-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
7034 // CHECK36-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
7035 // CHECK36-NEXT: br label [[DOTOMP_FINAL_DONE]]
7036 // CHECK36: .omp.final.done:
7037 // CHECK36-NEXT: br label [[OMP_PRECOND_END]]
7038 // CHECK36: omp.precond.end:
7039 // CHECK36-NEXT: ret void
7040 //
7041 //
7042 // CHECK36-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
7043 // CHECK36-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
7044 // CHECK36-NEXT: entry:
7045 // CHECK36-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
7046 // CHECK36-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
7047 // CHECK36-NEXT: [[TE:%.*]] = alloca i32, align 4
7048 // CHECK36-NEXT: [[TH:%.*]] = alloca i32, align 4
7049 // CHECK36-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4
7050 // CHECK36-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4
7051 // CHECK36-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
7052 // CHECK36-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
7053 // CHECK36-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
7054 // CHECK36-NEXT: [[TMP:%.*]] = alloca i32, align 4
7055 // CHECK36-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
7056 // CHECK36-NEXT: store i32 0, i32* [[TE]], align 4
7057 // CHECK36-NEXT: store i32 128, i32* [[TH]], align 4
7058 // CHECK36-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4
7059 // CHECK36-NEXT: store i32 [[TMP0]], i32* [[TE_CASTED]], align 4
7060 // CHECK36-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE_CASTED]], align 4
7061 // CHECK36-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
7062 // CHECK36-NEXT: store i32 [[TMP2]], i32* [[TH_CASTED]], align 4
7063 // CHECK36-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_CASTED]], align 4
7064 // CHECK36-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7065 // CHECK36-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*
7066 // CHECK36-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4
7067 // CHECK36-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7068 // CHECK36-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
7069 // CHECK36-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4
7070 // CHECK36-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
7071 // CHECK36-NEXT: store i8* null, i8** [[TMP8]], align 4
7072 // CHECK36-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
7073 // CHECK36-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
7074 // CHECK36-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
7075 // CHECK36-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
7076 // CHECK36-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
7077 // CHECK36-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4
7078 // CHECK36-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
7079 // CHECK36-NEXT: store i8* null, i8** [[TMP13]], align 4
7080 // CHECK36-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
7081 // CHECK36-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]**
7082 // CHECK36-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 4
7083 // CHECK36-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
7084 // CHECK36-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]**
7085 // CHECK36-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 4
7086 // CHECK36-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
7087 // CHECK36-NEXT: store i8* null, i8** [[TMP18]], align 4
7088 // CHECK36-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7089 // CHECK36-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7090 // CHECK36-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4
7091 // CHECK36-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
7092 // CHECK36-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 1)
7093 // CHECK36-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
7094 // CHECK36-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7095 // CHECK36: omp_offload.failed:
7096 // CHECK36-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR3]]
7097 // CHECK36-NEXT: br label [[OMP_OFFLOAD_CONT]]
7098 // CHECK36: omp_offload.cont:
7099 // CHECK36-NEXT: ret i32 0
7100 //
7101 //
7102 // CHECK36-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181
7103 // CHECK36-SAME: (i32 [[TE:%.*]], i32 [[TH:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
7104 // CHECK36-NEXT: entry:
7105 // CHECK36-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4
7106 // CHECK36-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4
7107 // CHECK36-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
7108 // CHECK36-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
7109 // CHECK36-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4
7110 // CHECK36-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4
7111 // CHECK36-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
7112 // CHECK36-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
7113 // CHECK36-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4
7114 // CHECK36-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4
7115 // CHECK36-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
7116 // CHECK36-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]])
7117 // CHECK36-NEXT: ret void
7118 //
7119 //
7120 // CHECK36-LABEL: define {{[^@]+}}@.omp_outlined..1
7121 // CHECK36-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
7122 // CHECK36-NEXT: entry:
7123 // CHECK36-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7124 // CHECK36-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7125 // CHECK36-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
7126 // CHECK36-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7127 // CHECK36-NEXT: [[TMP:%.*]] = alloca i32, align 4
7128 // CHECK36-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7129 // CHECK36-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7130 // CHECK36-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7131 // CHECK36-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7132 // CHECK36-NEXT: [[I:%.*]] = alloca i32, align 4
7133 // CHECK36-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7134 // CHECK36-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7135 // CHECK36-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
7136 // CHECK36-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
7137 // CHECK36-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7138 // CHECK36-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
7139 // CHECK36-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7140 // CHECK36-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7141 // CHECK36-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7142 // CHECK36-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7143 // CHECK36-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7144 // CHECK36-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7145 // CHECK36-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
7146 // CHECK36-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7147 // CHECK36: cond.true:
7148 // CHECK36-NEXT: br label [[COND_END:%.*]]
7149 // CHECK36: cond.false:
7150 // CHECK36-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7151 // CHECK36-NEXT: br label [[COND_END]]
7152 // CHECK36: cond.end:
7153 // CHECK36-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7154 // CHECK36-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7155 // CHECK36-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7156 // CHECK36-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7157 // CHECK36-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7158 // CHECK36: omp.inner.for.cond:
7159 // CHECK36-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
7160 // CHECK36-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
7161 // CHECK36-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7162 // CHECK36-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7163 // CHECK36: omp.inner.for.body:
7164 // CHECK36-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
7165 // CHECK36-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
7166 // CHECK36-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7167 // CHECK36-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12
7168 // CHECK36-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
7169 // CHECK36-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
7170 // CHECK36-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
7171 // CHECK36-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7172 // CHECK36: omp.body.continue:
7173 // CHECK36-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7174 // CHECK36: omp.inner.for.inc:
7175 // CHECK36-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
7176 // CHECK36-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
7177 // CHECK36-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
7178 // CHECK36-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
7179 // CHECK36: omp.inner.for.end:
7180 // CHECK36-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7181 // CHECK36: omp.loop.exit:
7182 // CHECK36-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7183 // CHECK36-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7184 // CHECK36-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7185 // CHECK36-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7186 // CHECK36: .omp.final.then:
7187 // CHECK36-NEXT: store i32 10, i32* [[I]], align 4
7188 // CHECK36-NEXT: br label [[DOTOMP_FINAL_DONE]]
7189 // CHECK36: .omp.final.done:
7190 // CHECK36-NEXT: ret void
7191 //
7192 //
7193 // CHECK36-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
7194 // CHECK36-SAME: () #[[ATTR5:[0-9]+]] {
7195 // CHECK36-NEXT: entry:
7196 // CHECK36-NEXT: call void @__tgt_register_requires(i64 1)
7197 // CHECK36-NEXT: ret void
7198 //
7199 //
7200 // CHECK37-LABEL: define {{[^@]+}}@main
7201 // CHECK37-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
7202 // CHECK37-NEXT: entry:
7203 // CHECK37-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
7204 // CHECK37-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
7205 // CHECK37-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
7206 // CHECK37-NEXT: [[N:%.*]] = alloca i32, align 4
7207 // CHECK37-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
7208 // CHECK37-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
7209 // CHECK37-NEXT: [[ARGC_CASTED:%.*]] = alloca i64, align 8
7210 // CHECK37-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
7211 // CHECK37-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
7212 // CHECK37-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
7213 // CHECK37-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
7214 // CHECK37-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 8
7215 // CHECK37-NEXT: [[TMP:%.*]] = alloca i32, align 4
7216 // CHECK37-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7217 // CHECK37-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
7218 // CHECK37-NEXT: store i32 0, i32* [[RETVAL]], align 4
7219 // CHECK37-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
7220 // CHECK37-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
7221 // CHECK37-NEXT: store i32 100, i32* [[N]], align 4
7222 // CHECK37-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
7223 // CHECK37-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
7224 // CHECK37-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
7225 // CHECK37-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
7226 // CHECK37-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
7227 // CHECK37-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
7228 // CHECK37-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
7229 // CHECK37-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_CASTED]] to i32*
7230 // CHECK37-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
7231 // CHECK37-NEXT: [[TMP4:%.*]] = load i64, i64* [[ARGC_CASTED]], align 8
7232 // CHECK37-NEXT: [[TMP5:%.*]] = load i32, i32* [[N]], align 4
7233 // CHECK37-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
7234 // CHECK37-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4
7235 // CHECK37-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8
7236 // CHECK37-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP1]], 4
7237 // CHECK37-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7238 // CHECK37-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
7239 // CHECK37-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8
7240 // CHECK37-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7241 // CHECK37-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64*
7242 // CHECK37-NEXT: store i64 [[TMP4]], i64* [[TMP11]], align 8
7243 // CHECK37-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
7244 // CHECK37-NEXT: store i64 4, i64* [[TMP12]], align 8
7245 // CHECK37-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
7246 // CHECK37-NEXT: store i8* null, i8** [[TMP13]], align 8
7247 // CHECK37-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
7248 // CHECK37-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
7249 // CHECK37-NEXT: store i64 [[TMP6]], i64* [[TMP15]], align 8
7250 // CHECK37-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
7251 // CHECK37-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
7252 // CHECK37-NEXT: store i64 [[TMP6]], i64* [[TMP17]], align 8
7253 // CHECK37-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
7254 // CHECK37-NEXT: store i64 4, i64* [[TMP18]], align 8
7255 // CHECK37-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
7256 // CHECK37-NEXT: store i8* null, i8** [[TMP19]], align 8
7257 // CHECK37-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
7258 // CHECK37-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
7259 // CHECK37-NEXT: store i64 [[TMP1]], i64* [[TMP21]], align 8
7260 // CHECK37-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
7261 // CHECK37-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
7262 // CHECK37-NEXT: store i64 [[TMP1]], i64* [[TMP23]], align 8
7263 // CHECK37-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
7264 // CHECK37-NEXT: store i64 8, i64* [[TMP24]], align 8
7265 // CHECK37-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
7266 // CHECK37-NEXT: store i8* null, i8** [[TMP25]], align 8
7267 // CHECK37-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
7268 // CHECK37-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32**
7269 // CHECK37-NEXT: store i32* [[VLA]], i32** [[TMP27]], align 8
7270 // CHECK37-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
7271 // CHECK37-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32**
7272 // CHECK37-NEXT: store i32* [[VLA]], i32** [[TMP29]], align 8
7273 // CHECK37-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
7274 // CHECK37-NEXT: store i64 [[TMP7]], i64* [[TMP30]], align 8
7275 // CHECK37-NEXT: [[TMP31:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
7276 // CHECK37-NEXT: store i8* null, i8** [[TMP31]], align 8
7277 // CHECK37-NEXT: [[TMP32:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7278 // CHECK37-NEXT: [[TMP33:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7279 // CHECK37-NEXT: [[TMP34:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
7280 // CHECK37-NEXT: [[TMP35:%.*]] = load i32, i32* [[N]], align 4
7281 // CHECK37-NEXT: store i32 [[TMP35]], i32* [[DOTCAPTURE_EXPR_]], align 4
7282 // CHECK37-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7283 // CHECK37-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP36]], 0
7284 // CHECK37-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7285 // CHECK37-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
7286 // CHECK37-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
7287 // CHECK37-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7288 // CHECK37-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP37]], 1
7289 // CHECK37-NEXT: [[TMP38:%.*]] = zext i32 [[ADD]] to i64
7290 // CHECK37-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP38]])
7291 // CHECK37-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192.region_id, i32 4, i8** [[TMP32]], i8** [[TMP33]], i64* [[TMP34]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
7292 // CHECK37-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
7293 // CHECK37-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7294 // CHECK37: omp_offload.failed:
7295 // CHECK37-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192(i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
7296 // CHECK37-NEXT: br label [[OMP_OFFLOAD_CONT]]
7297 // CHECK37: omp_offload.cont:
7298 // CHECK37-NEXT: [[TMP41:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
7299 // CHECK37-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP41]])
7300 // CHECK37-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
7301 // CHECK37-NEXT: [[TMP42:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
7302 // CHECK37-NEXT: call void @llvm.stackrestore(i8* [[TMP42]])
7303 // CHECK37-NEXT: [[TMP43:%.*]] = load i32, i32* [[RETVAL]], align 4
7304 // CHECK37-NEXT: ret i32 [[TMP43]]
7305 //
7306 //
7307 // CHECK37-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192
7308 // CHECK37-SAME: (i64 [[ARGC:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
7309 // CHECK37-NEXT: entry:
7310 // CHECK37-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8
7311 // CHECK37-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
7312 // CHECK37-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
7313 // CHECK37-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
7314 // CHECK37-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7315 // CHECK37-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
7316 // CHECK37-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8
7317 // CHECK37-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
7318 // CHECK37-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
7319 // CHECK37-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
7320 // CHECK37-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32*
7321 // CHECK37-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
7322 // CHECK37-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
7323 // CHECK37-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
7324 // CHECK37-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
7325 // CHECK37-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
7326 // CHECK37-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7327 // CHECK37-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
7328 // CHECK37-NEXT: [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
7329 // CHECK37-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP3]] to i1
7330 // CHECK37-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
7331 // CHECK37-NEXT: [[FROMBOOL4:%.*]] = zext i1 [[TOBOOL2]] to i8
7332 // CHECK37-NEXT: store i8 [[FROMBOOL4]], i8* [[CONV3]], align 1
7333 // CHECK37-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
7334 // CHECK37-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
7335 // CHECK37-NEXT: ret void
7336 //
7337 //
7338 // CHECK37-LABEL: define {{[^@]+}}@.omp_outlined.
7339 // CHECK37-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
7340 // CHECK37-NEXT: entry:
7341 // CHECK37-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7342 // CHECK37-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7343 // CHECK37-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
7344 // CHECK37-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
7345 // CHECK37-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
7346 // CHECK37-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
7347 // CHECK37-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7348 // CHECK37-NEXT: [[TMP:%.*]] = alloca i32, align 4
7349 // CHECK37-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7350 // CHECK37-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
7351 // CHECK37-NEXT: [[I:%.*]] = alloca i32, align 4
7352 // CHECK37-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7353 // CHECK37-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7354 // CHECK37-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7355 // CHECK37-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7356 // CHECK37-NEXT: [[I4:%.*]] = alloca i32, align 4
7357 // CHECK37-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7358 // CHECK37-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7359 // CHECK37-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
7360 // CHECK37-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
7361 // CHECK37-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
7362 // CHECK37-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
7363 // CHECK37-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
7364 // CHECK37-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
7365 // CHECK37-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
7366 // CHECK37-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
7367 // CHECK37-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
7368 // CHECK37-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7369 // CHECK37-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7370 // CHECK37-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
7371 // CHECK37-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7372 // CHECK37-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
7373 // CHECK37-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
7374 // CHECK37-NEXT: store i32 0, i32* [[I]], align 4
7375 // CHECK37-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7376 // CHECK37-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
7377 // CHECK37-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7378 // CHECK37: omp.precond.then:
7379 // CHECK37-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7380 // CHECK37-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7381 // CHECK37-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
7382 // CHECK37-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7383 // CHECK37-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7384 // CHECK37-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7385 // CHECK37-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
7386 // CHECK37-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7387 // CHECK37-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7388 // CHECK37-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7389 // CHECK37-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
7390 // CHECK37-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7391 // CHECK37: cond.true:
7392 // CHECK37-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7393 // CHECK37-NEXT: br label [[COND_END:%.*]]
7394 // CHECK37: cond.false:
7395 // CHECK37-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7396 // CHECK37-NEXT: br label [[COND_END]]
7397 // CHECK37: cond.end:
7398 // CHECK37-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
7399 // CHECK37-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7400 // CHECK37-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7401 // CHECK37-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
7402 // CHECK37-NEXT: [[TMP14:%.*]] = load i8, i8* [[CONV]], align 8
7403 // CHECK37-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP14]] to i1
7404 // CHECK37-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
7405 // CHECK37: omp_if.then:
7406 // CHECK37-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7407 // CHECK37: omp.inner.for.cond:
7408 // CHECK37-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
7409 // CHECK37-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5
7410 // CHECK37-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
7411 // CHECK37-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7412 // CHECK37: omp.inner.for.body:
7413 // CHECK37-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
7414 // CHECK37-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
7415 // CHECK37-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7416 // CHECK37-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !5
7417 // CHECK37-NEXT: [[TMP18:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !5
7418 // CHECK37-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
7419 // CHECK37-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
7420 // CHECK37-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !5
7421 // CHECK37-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7422 // CHECK37: omp.body.continue:
7423 // CHECK37-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7424 // CHECK37: omp.inner.for.inc:
7425 // CHECK37-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
7426 // CHECK37-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
7427 // CHECK37-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
7428 // CHECK37-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
7429 // CHECK37: omp.inner.for.end:
7430 // CHECK37-NEXT: br label [[OMP_IF_END:%.*]]
7431 // CHECK37: omp_if.else:
7432 // CHECK37-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
7433 // CHECK37: omp.inner.for.cond8:
7434 // CHECK37-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7435 // CHECK37-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7436 // CHECK37-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
7437 // CHECK37-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
7438 // CHECK37: omp.inner.for.body10:
7439 // CHECK37-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7440 // CHECK37-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP22]], 1
7441 // CHECK37-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
7442 // CHECK37-NEXT: store i32 [[ADD12]], i32* [[I4]], align 4
7443 // CHECK37-NEXT: [[TMP23:%.*]] = load i32, i32* [[I4]], align 4
7444 // CHECK37-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP23]] to i64
7445 // CHECK37-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM13]]
7446 // CHECK37-NEXT: store i32 0, i32* [[ARRAYIDX14]], align 4
7447 // CHECK37-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
7448 // CHECK37: omp.body.continue15:
7449 // CHECK37-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
7450 // CHECK37: omp.inner.for.inc16:
7451 // CHECK37-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7452 // CHECK37-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP24]], 1
7453 // CHECK37-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
7454 // CHECK37-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP9:![0-9]+]]
7455 // CHECK37: omp.inner.for.end18:
7456 // CHECK37-NEXT: br label [[OMP_IF_END]]
7457 // CHECK37: omp_if.end:
7458 // CHECK37-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7459 // CHECK37: omp.loop.exit:
7460 // CHECK37-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7461 // CHECK37-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
7462 // CHECK37-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
7463 // CHECK37-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7464 // CHECK37-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
7465 // CHECK37-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7466 // CHECK37: .omp.final.then:
7467 // CHECK37-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7468 // CHECK37-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP29]], 0
7469 // CHECK37-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
7470 // CHECK37-NEXT: [[MUL21:%.*]] = mul nsw i32 [[DIV20]], 1
7471 // CHECK37-NEXT: [[ADD22:%.*]] = add nsw i32 0, [[MUL21]]
7472 // CHECK37-NEXT: store i32 [[ADD22]], i32* [[I4]], align 4
7473 // CHECK37-NEXT: br label [[DOTOMP_FINAL_DONE]]
7474 // CHECK37: .omp.final.done:
7475 // CHECK37-NEXT: br label [[OMP_PRECOND_END]]
7476 // CHECK37: omp.precond.end:
7477 // CHECK37-NEXT: ret void
7478 //
7479 //
7480 // CHECK37-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
7481 // CHECK37-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
7482 // CHECK37-NEXT: entry:
7483 // CHECK37-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
7484 // CHECK37-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
7485 // CHECK37-NEXT: [[TE:%.*]] = alloca i32, align 4
7486 // CHECK37-NEXT: [[TH:%.*]] = alloca i32, align 4
7487 // CHECK37-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8
7488 // CHECK37-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8
7489 // CHECK37-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
7490 // CHECK37-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
7491 // CHECK37-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
7492 // CHECK37-NEXT: [[TMP:%.*]] = alloca i32, align 4
7493 // CHECK37-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
7494 // CHECK37-NEXT: store i32 0, i32* [[TE]], align 4
7495 // CHECK37-NEXT: store i32 128, i32* [[TH]], align 4
7496 // CHECK37-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4
7497 // CHECK37-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32*
7498 // CHECK37-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
7499 // CHECK37-NEXT: [[TMP1:%.*]] = load i64, i64* [[TE_CASTED]], align 8
7500 // CHECK37-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
7501 // CHECK37-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32*
7502 // CHECK37-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
7503 // CHECK37-NEXT: [[TMP3:%.*]] = load i64, i64* [[TH_CASTED]], align 8
7504 // CHECK37-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7505 // CHECK37-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
7506 // CHECK37-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
7507 // CHECK37-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7508 // CHECK37-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
7509 // CHECK37-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8
7510 // CHECK37-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
7511 // CHECK37-NEXT: store i8* null, i8** [[TMP8]], align 8
7512 // CHECK37-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
7513 // CHECK37-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
7514 // CHECK37-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
7515 // CHECK37-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
7516 // CHECK37-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
7517 // CHECK37-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8
7518 // CHECK37-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
7519 // CHECK37-NEXT: store i8* null, i8** [[TMP13]], align 8
7520 // CHECK37-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
7521 // CHECK37-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]**
7522 // CHECK37-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 8
7523 // CHECK37-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
7524 // CHECK37-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]**
7525 // CHECK37-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 8
7526 // CHECK37-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
7527 // CHECK37-NEXT: store i8* null, i8** [[TMP18]], align 8
7528 // CHECK37-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7529 // CHECK37-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7530 // CHECK37-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4
7531 // CHECK37-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
7532 // CHECK37-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 1)
7533 // CHECK37-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
7534 // CHECK37-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7535 // CHECK37: omp_offload.failed:
7536 // CHECK37-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR3]]
7537 // CHECK37-NEXT: br label [[OMP_OFFLOAD_CONT]]
7538 // CHECK37: omp_offload.cont:
7539 // CHECK37-NEXT: ret i32 0
7540 //
7541 //
7542 // CHECK37-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181
7543 // CHECK37-SAME: (i64 [[TE:%.*]], i64 [[TH:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
7544 // CHECK37-NEXT: entry:
7545 // CHECK37-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8
7546 // CHECK37-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8
7547 // CHECK37-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
7548 // CHECK37-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
7549 // CHECK37-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8
7550 // CHECK37-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8
7551 // CHECK37-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
7552 // CHECK37-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32*
7553 // CHECK37-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32*
7554 // CHECK37-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
7555 // CHECK37-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
7556 // CHECK37-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8
7557 // CHECK37-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
7558 // CHECK37-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]])
7559 // CHECK37-NEXT: ret void
7560 //
7561 //
7562 // CHECK37-LABEL: define {{[^@]+}}@.omp_outlined..1
7563 // CHECK37-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
7564 // CHECK37-NEXT: entry:
7565 // CHECK37-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7566 // CHECK37-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7567 // CHECK37-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
7568 // CHECK37-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7569 // CHECK37-NEXT: [[TMP:%.*]] = alloca i32, align 4
7570 // CHECK37-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7571 // CHECK37-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7572 // CHECK37-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7573 // CHECK37-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7574 // CHECK37-NEXT: [[I:%.*]] = alloca i32, align 4
7575 // CHECK37-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7576 // CHECK37-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7577 // CHECK37-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
7578 // CHECK37-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
7579 // CHECK37-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7580 // CHECK37-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
7581 // CHECK37-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7582 // CHECK37-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7583 // CHECK37-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7584 // CHECK37-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7585 // CHECK37-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7586 // CHECK37-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7587 // CHECK37-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
7588 // CHECK37-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7589 // CHECK37: cond.true:
7590 // CHECK37-NEXT: br label [[COND_END:%.*]]
7591 // CHECK37: cond.false:
7592 // CHECK37-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7593 // CHECK37-NEXT: br label [[COND_END]]
7594 // CHECK37: cond.end:
7595 // CHECK37-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7596 // CHECK37-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7597 // CHECK37-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7598 // CHECK37-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7599 // CHECK37-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7600 // CHECK37: omp.inner.for.cond:
7601 // CHECK37-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7602 // CHECK37-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
7603 // CHECK37-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7604 // CHECK37-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7605 // CHECK37: omp.inner.for.body:
7606 // CHECK37-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7607 // CHECK37-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
7608 // CHECK37-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7609 // CHECK37-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
7610 // CHECK37-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
7611 // CHECK37-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
7612 // CHECK37-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
7613 // CHECK37-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
7614 // CHECK37-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7615 // CHECK37: omp.body.continue:
7616 // CHECK37-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7617 // CHECK37: omp.inner.for.inc:
7618 // CHECK37-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7619 // CHECK37-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
7620 // CHECK37-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7621 // CHECK37-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
7622 // CHECK37: omp.inner.for.end:
7623 // CHECK37-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7624 // CHECK37: omp.loop.exit:
7625 // CHECK37-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7626 // CHECK37-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7627 // CHECK37-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7628 // CHECK37-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7629 // CHECK37: .omp.final.then:
7630 // CHECK37-NEXT: store i32 10, i32* [[I]], align 4
7631 // CHECK37-NEXT: br label [[DOTOMP_FINAL_DONE]]
7632 // CHECK37: .omp.final.done:
7633 // CHECK37-NEXT: ret void
7634 //
7635 //
7636 // CHECK37-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
7637 // CHECK37-SAME: () #[[ATTR5:[0-9]+]] {
7638 // CHECK37-NEXT: entry:
7639 // CHECK37-NEXT: call void @__tgt_register_requires(i64 1)
7640 // CHECK37-NEXT: ret void
7641 //
7642 //
7643 // CHECK38-LABEL: define {{[^@]+}}@main
7644 // CHECK38-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
7645 // CHECK38-NEXT: entry:
7646 // CHECK38-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
7647 // CHECK38-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
7648 // CHECK38-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
7649 // CHECK38-NEXT: [[N:%.*]] = alloca i32, align 4
7650 // CHECK38-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
7651 // CHECK38-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
7652 // CHECK38-NEXT: [[ARGC_CASTED:%.*]] = alloca i64, align 8
7653 // CHECK38-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
7654 // CHECK38-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
7655 // CHECK38-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
7656 // CHECK38-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
7657 // CHECK38-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 8
7658 // CHECK38-NEXT: [[TMP:%.*]] = alloca i32, align 4
7659 // CHECK38-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7660 // CHECK38-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
7661 // CHECK38-NEXT: store i32 0, i32* [[RETVAL]], align 4
7662 // CHECK38-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
7663 // CHECK38-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
7664 // CHECK38-NEXT: store i32 100, i32* [[N]], align 4
7665 // CHECK38-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
7666 // CHECK38-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
7667 // CHECK38-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
7668 // CHECK38-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
7669 // CHECK38-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
7670 // CHECK38-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
7671 // CHECK38-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
7672 // CHECK38-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_CASTED]] to i32*
7673 // CHECK38-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
7674 // CHECK38-NEXT: [[TMP4:%.*]] = load i64, i64* [[ARGC_CASTED]], align 8
7675 // CHECK38-NEXT: [[TMP5:%.*]] = load i32, i32* [[N]], align 4
7676 // CHECK38-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
7677 // CHECK38-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4
7678 // CHECK38-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8
7679 // CHECK38-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP1]], 4
7680 // CHECK38-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7681 // CHECK38-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
7682 // CHECK38-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8
7683 // CHECK38-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7684 // CHECK38-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64*
7685 // CHECK38-NEXT: store i64 [[TMP4]], i64* [[TMP11]], align 8
7686 // CHECK38-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
7687 // CHECK38-NEXT: store i64 4, i64* [[TMP12]], align 8
7688 // CHECK38-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
7689 // CHECK38-NEXT: store i8* null, i8** [[TMP13]], align 8
7690 // CHECK38-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
7691 // CHECK38-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
7692 // CHECK38-NEXT: store i64 [[TMP6]], i64* [[TMP15]], align 8
7693 // CHECK38-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
7694 // CHECK38-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
7695 // CHECK38-NEXT: store i64 [[TMP6]], i64* [[TMP17]], align 8
7696 // CHECK38-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
7697 // CHECK38-NEXT: store i64 4, i64* [[TMP18]], align 8
7698 // CHECK38-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
7699 // CHECK38-NEXT: store i8* null, i8** [[TMP19]], align 8
7700 // CHECK38-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
7701 // CHECK38-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
7702 // CHECK38-NEXT: store i64 [[TMP1]], i64* [[TMP21]], align 8
7703 // CHECK38-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
7704 // CHECK38-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
7705 // CHECK38-NEXT: store i64 [[TMP1]], i64* [[TMP23]], align 8
7706 // CHECK38-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
7707 // CHECK38-NEXT: store i64 8, i64* [[TMP24]], align 8
7708 // CHECK38-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
7709 // CHECK38-NEXT: store i8* null, i8** [[TMP25]], align 8
7710 // CHECK38-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
7711 // CHECK38-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32**
7712 // CHECK38-NEXT: store i32* [[VLA]], i32** [[TMP27]], align 8
7713 // CHECK38-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
7714 // CHECK38-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32**
7715 // CHECK38-NEXT: store i32* [[VLA]], i32** [[TMP29]], align 8
7716 // CHECK38-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
7717 // CHECK38-NEXT: store i64 [[TMP7]], i64* [[TMP30]], align 8
7718 // CHECK38-NEXT: [[TMP31:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
7719 // CHECK38-NEXT: store i8* null, i8** [[TMP31]], align 8
7720 // CHECK38-NEXT: [[TMP32:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7721 // CHECK38-NEXT: [[TMP33:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7722 // CHECK38-NEXT: [[TMP34:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
7723 // CHECK38-NEXT: [[TMP35:%.*]] = load i32, i32* [[N]], align 4
7724 // CHECK38-NEXT: store i32 [[TMP35]], i32* [[DOTCAPTURE_EXPR_]], align 4
7725 // CHECK38-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7726 // CHECK38-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP36]], 0
7727 // CHECK38-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7728 // CHECK38-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
7729 // CHECK38-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
7730 // CHECK38-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7731 // CHECK38-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP37]], 1
7732 // CHECK38-NEXT: [[TMP38:%.*]] = zext i32 [[ADD]] to i64
7733 // CHECK38-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP38]])
7734 // CHECK38-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192.region_id, i32 4, i8** [[TMP32]], i8** [[TMP33]], i64* [[TMP34]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
7735 // CHECK38-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
7736 // CHECK38-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7737 // CHECK38: omp_offload.failed:
7738 // CHECK38-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192(i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
7739 // CHECK38-NEXT: br label [[OMP_OFFLOAD_CONT]]
7740 // CHECK38: omp_offload.cont:
7741 // CHECK38-NEXT: [[TMP41:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
7742 // CHECK38-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP41]])
7743 // CHECK38-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
7744 // CHECK38-NEXT: [[TMP42:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
7745 // CHECK38-NEXT: call void @llvm.stackrestore(i8* [[TMP42]])
7746 // CHECK38-NEXT: [[TMP43:%.*]] = load i32, i32* [[RETVAL]], align 4
7747 // CHECK38-NEXT: ret i32 [[TMP43]]
7748 //
7749 //
7750 // CHECK38-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192
7751 // CHECK38-SAME: (i64 [[ARGC:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
7752 // CHECK38-NEXT: entry:
7753 // CHECK38-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8
7754 // CHECK38-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
7755 // CHECK38-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
7756 // CHECK38-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
7757 // CHECK38-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7758 // CHECK38-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
7759 // CHECK38-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8
7760 // CHECK38-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
7761 // CHECK38-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
7762 // CHECK38-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
7763 // CHECK38-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32*
7764 // CHECK38-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
7765 // CHECK38-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
7766 // CHECK38-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
7767 // CHECK38-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
7768 // CHECK38-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
7769 // CHECK38-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7770 // CHECK38-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
7771 // CHECK38-NEXT: [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
7772 // CHECK38-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP3]] to i1
7773 // CHECK38-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
7774 // CHECK38-NEXT: [[FROMBOOL4:%.*]] = zext i1 [[TOBOOL2]] to i8
7775 // CHECK38-NEXT: store i8 [[FROMBOOL4]], i8* [[CONV3]], align 1
7776 // CHECK38-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
7777 // CHECK38-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
7778 // CHECK38-NEXT: ret void
7779 //
7780 //
7781 // CHECK38-LABEL: define {{[^@]+}}@.omp_outlined.
7782 // CHECK38-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
7783 // CHECK38-NEXT: entry:
7784 // CHECK38-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7785 // CHECK38-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7786 // CHECK38-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
7787 // CHECK38-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
7788 // CHECK38-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
7789 // CHECK38-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
7790 // CHECK38-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7791 // CHECK38-NEXT: [[TMP:%.*]] = alloca i32, align 4
7792 // CHECK38-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7793 // CHECK38-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
7794 // CHECK38-NEXT: [[I:%.*]] = alloca i32, align 4
7795 // CHECK38-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7796 // CHECK38-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7797 // CHECK38-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7798 // CHECK38-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7799 // CHECK38-NEXT: [[I4:%.*]] = alloca i32, align 4
7800 // CHECK38-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7801 // CHECK38-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7802 // CHECK38-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
7803 // CHECK38-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
7804 // CHECK38-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
7805 // CHECK38-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
7806 // CHECK38-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
7807 // CHECK38-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
7808 // CHECK38-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
7809 // CHECK38-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
7810 // CHECK38-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
7811 // CHECK38-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7812 // CHECK38-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7813 // CHECK38-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
7814 // CHECK38-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7815 // CHECK38-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
7816 // CHECK38-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
7817 // CHECK38-NEXT: store i32 0, i32* [[I]], align 4
7818 // CHECK38-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7819 // CHECK38-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
7820 // CHECK38-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7821 // CHECK38: omp.precond.then:
7822 // CHECK38-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7823 // CHECK38-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7824 // CHECK38-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
7825 // CHECK38-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7826 // CHECK38-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7827 // CHECK38-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7828 // CHECK38-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
7829 // CHECK38-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7830 // CHECK38-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7831 // CHECK38-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7832 // CHECK38-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
7833 // CHECK38-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7834 // CHECK38: cond.true:
7835 // CHECK38-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7836 // CHECK38-NEXT: br label [[COND_END:%.*]]
7837 // CHECK38: cond.false:
7838 // CHECK38-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7839 // CHECK38-NEXT: br label [[COND_END]]
7840 // CHECK38: cond.end:
7841 // CHECK38-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
7842 // CHECK38-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7843 // CHECK38-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7844 // CHECK38-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
7845 // CHECK38-NEXT: [[TMP14:%.*]] = load i8, i8* [[CONV]], align 8
7846 // CHECK38-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP14]] to i1
7847 // CHECK38-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
7848 // CHECK38: omp_if.then:
7849 // CHECK38-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7850 // CHECK38: omp.inner.for.cond:
7851 // CHECK38-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
7852 // CHECK38-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5
7853 // CHECK38-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
7854 // CHECK38-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7855 // CHECK38: omp.inner.for.body:
7856 // CHECK38-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
7857 // CHECK38-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
7858 // CHECK38-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7859 // CHECK38-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !5
7860 // CHECK38-NEXT: [[TMP18:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !5
7861 // CHECK38-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
7862 // CHECK38-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
7863 // CHECK38-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !5
7864 // CHECK38-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7865 // CHECK38: omp.body.continue:
7866 // CHECK38-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7867 // CHECK38: omp.inner.for.inc:
7868 // CHECK38-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
7869 // CHECK38-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
7870 // CHECK38-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
7871 // CHECK38-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
7872 // CHECK38: omp.inner.for.end:
7873 // CHECK38-NEXT: br label [[OMP_IF_END:%.*]]
7874 // CHECK38: omp_if.else:
7875 // CHECK38-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
7876 // CHECK38: omp.inner.for.cond8:
7877 // CHECK38-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7878 // CHECK38-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7879 // CHECK38-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
7880 // CHECK38-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
7881 // CHECK38: omp.inner.for.body10:
7882 // CHECK38-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7883 // CHECK38-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP22]], 1
7884 // CHECK38-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
7885 // CHECK38-NEXT: store i32 [[ADD12]], i32* [[I4]], align 4
7886 // CHECK38-NEXT: [[TMP23:%.*]] = load i32, i32* [[I4]], align 4
7887 // CHECK38-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP23]] to i64
7888 // CHECK38-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM13]]
7889 // CHECK38-NEXT: store i32 0, i32* [[ARRAYIDX14]], align 4
7890 // CHECK38-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
7891 // CHECK38: omp.body.continue15:
7892 // CHECK38-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
7893 // CHECK38: omp.inner.for.inc16:
7894 // CHECK38-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7895 // CHECK38-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP24]], 1
7896 // CHECK38-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
7897 // CHECK38-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP9:![0-9]+]]
7898 // CHECK38: omp.inner.for.end18:
7899 // CHECK38-NEXT: br label [[OMP_IF_END]]
7900 // CHECK38: omp_if.end:
7901 // CHECK38-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7902 // CHECK38: omp.loop.exit:
7903 // CHECK38-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7904 // CHECK38-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
7905 // CHECK38-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
7906 // CHECK38-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7907 // CHECK38-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
7908 // CHECK38-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7909 // CHECK38: .omp.final.then:
7910 // CHECK38-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7911 // CHECK38-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP29]], 0
7912 // CHECK38-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
7913 // CHECK38-NEXT: [[MUL21:%.*]] = mul nsw i32 [[DIV20]], 1
7914 // CHECK38-NEXT: [[ADD22:%.*]] = add nsw i32 0, [[MUL21]]
7915 // CHECK38-NEXT: store i32 [[ADD22]], i32* [[I4]], align 4
7916 // CHECK38-NEXT: br label [[DOTOMP_FINAL_DONE]]
7917 // CHECK38: .omp.final.done:
7918 // CHECK38-NEXT: br label [[OMP_PRECOND_END]]
7919 // CHECK38: omp.precond.end:
7920 // CHECK38-NEXT: ret void
7921 //
7922 //
7923 // CHECK38-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
7924 // CHECK38-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
7925 // CHECK38-NEXT: entry:
7926 // CHECK38-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
7927 // CHECK38-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
7928 // CHECK38-NEXT: [[TE:%.*]] = alloca i32, align 4
7929 // CHECK38-NEXT: [[TH:%.*]] = alloca i32, align 4
7930 // CHECK38-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8
7931 // CHECK38-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8
7932 // CHECK38-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
7933 // CHECK38-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
7934 // CHECK38-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
7935 // CHECK38-NEXT: [[TMP:%.*]] = alloca i32, align 4
7936 // CHECK38-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
7937 // CHECK38-NEXT: store i32 0, i32* [[TE]], align 4
7938 // CHECK38-NEXT: store i32 128, i32* [[TH]], align 4
7939 // CHECK38-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4
7940 // CHECK38-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32*
7941 // CHECK38-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
7942 // CHECK38-NEXT: [[TMP1:%.*]] = load i64, i64* [[TE_CASTED]], align 8
7943 // CHECK38-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
7944 // CHECK38-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32*
7945 // CHECK38-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
7946 // CHECK38-NEXT: [[TMP3:%.*]] = load i64, i64* [[TH_CASTED]], align 8
7947 // CHECK38-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7948 // CHECK38-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
7949 // CHECK38-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
7950 // CHECK38-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7951 // CHECK38-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
7952 // CHECK38-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8
7953 // CHECK38-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
7954 // CHECK38-NEXT: store i8* null, i8** [[TMP8]], align 8
7955 // CHECK38-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
7956 // CHECK38-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
7957 // CHECK38-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
7958 // CHECK38-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
7959 // CHECK38-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
7960 // CHECK38-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8
7961 // CHECK38-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
7962 // CHECK38-NEXT: store i8* null, i8** [[TMP13]], align 8
7963 // CHECK38-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
7964 // CHECK38-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]**
7965 // CHECK38-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 8
7966 // CHECK38-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
7967 // CHECK38-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]**
7968 // CHECK38-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 8
7969 // CHECK38-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
7970 // CHECK38-NEXT: store i8* null, i8** [[TMP18]], align 8
7971 // CHECK38-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7972 // CHECK38-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7973 // CHECK38-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4
7974 // CHECK38-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
7975 // CHECK38-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 1)
7976 // CHECK38-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
7977 // CHECK38-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7978 // CHECK38: omp_offload.failed:
7979 // CHECK38-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR3]]
7980 // CHECK38-NEXT: br label [[OMP_OFFLOAD_CONT]]
7981 // CHECK38: omp_offload.cont:
7982 // CHECK38-NEXT: ret i32 0
7983 //
7984 //
7985 // CHECK38-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181
7986 // CHECK38-SAME: (i64 [[TE:%.*]], i64 [[TH:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
7987 // CHECK38-NEXT: entry:
7988 // CHECK38-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8
7989 // CHECK38-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8
7990 // CHECK38-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
7991 // CHECK38-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
7992 // CHECK38-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8
7993 // CHECK38-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8
7994 // CHECK38-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
7995 // CHECK38-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32*
7996 // CHECK38-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32*
7997 // CHECK38-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
7998 // CHECK38-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
7999 // CHECK38-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8
8000 // CHECK38-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
8001 // CHECK38-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]])
8002 // CHECK38-NEXT: ret void
8003 //
8004 //
8005 // CHECK38-LABEL: define {{[^@]+}}@.omp_outlined..1
8006 // CHECK38-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8007 // CHECK38-NEXT: entry:
8008 // CHECK38-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8009 // CHECK38-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8010 // CHECK38-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
8011 // CHECK38-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8012 // CHECK38-NEXT: [[TMP:%.*]] = alloca i32, align 4
8013 // CHECK38-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8014 // CHECK38-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8015 // CHECK38-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8016 // CHECK38-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8017 // CHECK38-NEXT: [[I:%.*]] = alloca i32, align 4
8018 // CHECK38-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8019 // CHECK38-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8020 // CHECK38-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
8021 // CHECK38-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
8022 // CHECK38-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8023 // CHECK38-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
8024 // CHECK38-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8025 // CHECK38-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8026 // CHECK38-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8027 // CHECK38-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
8028 // CHECK38-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8029 // CHECK38-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8030 // CHECK38-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
8031 // CHECK38-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8032 // CHECK38: cond.true:
8033 // CHECK38-NEXT: br label [[COND_END:%.*]]
8034 // CHECK38: cond.false:
8035 // CHECK38-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8036 // CHECK38-NEXT: br label [[COND_END]]
8037 // CHECK38: cond.end:
8038 // CHECK38-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
8039 // CHECK38-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8040 // CHECK38-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8041 // CHECK38-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
8042 // CHECK38-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8043 // CHECK38: omp.inner.for.cond:
8044 // CHECK38-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
8045 // CHECK38-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
8046 // CHECK38-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8047 // CHECK38-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8048 // CHECK38: omp.inner.for.body:
8049 // CHECK38-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
8050 // CHECK38-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
8051 // CHECK38-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8052 // CHECK38-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
8053 // CHECK38-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
8054 // CHECK38-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
8055 // CHECK38-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
8056 // CHECK38-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
8057 // CHECK38-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8058 // CHECK38: omp.body.continue:
8059 // CHECK38-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8060 // CHECK38: omp.inner.for.inc:
8061 // CHECK38-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
8062 // CHECK38-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
8063 // CHECK38-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
8064 // CHECK38-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
8065 // CHECK38: omp.inner.for.end:
8066 // CHECK38-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8067 // CHECK38: omp.loop.exit:
8068 // CHECK38-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
8069 // CHECK38-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8070 // CHECK38-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
8071 // CHECK38-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8072 // CHECK38: .omp.final.then:
8073 // CHECK38-NEXT: store i32 10, i32* [[I]], align 4
8074 // CHECK38-NEXT: br label [[DOTOMP_FINAL_DONE]]
8075 // CHECK38: .omp.final.done:
8076 // CHECK38-NEXT: ret void
8077 //
8078 //
8079 // CHECK38-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
8080 // CHECK38-SAME: () #[[ATTR5:[0-9]+]] {
8081 // CHECK38-NEXT: entry:
8082 // CHECK38-NEXT: call void @__tgt_register_requires(i64 1)
8083 // CHECK38-NEXT: ret void
8084 //
8085 //
8086 // CHECK39-LABEL: define {{[^@]+}}@main
8087 // CHECK39-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
8088 // CHECK39-NEXT: entry:
8089 // CHECK39-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
8090 // CHECK39-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
8091 // CHECK39-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
8092 // CHECK39-NEXT: [[N:%.*]] = alloca i32, align 4
8093 // CHECK39-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
8094 // CHECK39-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
8095 // CHECK39-NEXT: [[ARGC_CASTED:%.*]] = alloca i32, align 4
8096 // CHECK39-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
8097 // CHECK39-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
8098 // CHECK39-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
8099 // CHECK39-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
8100 // CHECK39-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 4
8101 // CHECK39-NEXT: [[TMP:%.*]] = alloca i32, align 4
8102 // CHECK39-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8103 // CHECK39-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8104 // CHECK39-NEXT: store i32 0, i32* [[RETVAL]], align 4
8105 // CHECK39-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
8106 // CHECK39-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
8107 // CHECK39-NEXT: store i32 100, i32* [[N]], align 4
8108 // CHECK39-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
8109 // CHECK39-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
8110 // CHECK39-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
8111 // CHECK39-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
8112 // CHECK39-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
8113 // CHECK39-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
8114 // CHECK39-NEXT: store i32 [[TMP2]], i32* [[ARGC_CASTED]], align 4
8115 // CHECK39-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARGC_CASTED]], align 4
8116 // CHECK39-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4
8117 // CHECK39-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4
8118 // CHECK39-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4
8119 // CHECK39-NEXT: [[TMP6:%.*]] = mul nuw i32 [[TMP0]], 4
8120 // CHECK39-NEXT: [[TMP7:%.*]] = sext i32 [[TMP6]] to i64
8121 // CHECK39-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8122 // CHECK39-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
8123 // CHECK39-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4
8124 // CHECK39-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8125 // CHECK39-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32*
8126 // CHECK39-NEXT: store i32 [[TMP3]], i32* [[TMP11]], align 4
8127 // CHECK39-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
8128 // CHECK39-NEXT: store i64 4, i64* [[TMP12]], align 4
8129 // CHECK39-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
8130 // CHECK39-NEXT: store i8* null, i8** [[TMP13]], align 4
8131 // CHECK39-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
8132 // CHECK39-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
8133 // CHECK39-NEXT: store i32 [[TMP5]], i32* [[TMP15]], align 4
8134 // CHECK39-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
8135 // CHECK39-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
8136 // CHECK39-NEXT: store i32 [[TMP5]], i32* [[TMP17]], align 4
8137 // CHECK39-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
8138 // CHECK39-NEXT: store i64 4, i64* [[TMP18]], align 4
8139 // CHECK39-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
8140 // CHECK39-NEXT: store i8* null, i8** [[TMP19]], align 4
8141 // CHECK39-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
8142 // CHECK39-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
8143 // CHECK39-NEXT: store i32 [[TMP0]], i32* [[TMP21]], align 4
8144 // CHECK39-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
8145 // CHECK39-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
8146 // CHECK39-NEXT: store i32 [[TMP0]], i32* [[TMP23]], align 4
8147 // CHECK39-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
8148 // CHECK39-NEXT: store i64 4, i64* [[TMP24]], align 4
8149 // CHECK39-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
8150 // CHECK39-NEXT: store i8* null, i8** [[TMP25]], align 4
8151 // CHECK39-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
8152 // CHECK39-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32**
8153 // CHECK39-NEXT: store i32* [[VLA]], i32** [[TMP27]], align 4
8154 // CHECK39-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
8155 // CHECK39-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32**
8156 // CHECK39-NEXT: store i32* [[VLA]], i32** [[TMP29]], align 4
8157 // CHECK39-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
8158 // CHECK39-NEXT: store i64 [[TMP7]], i64* [[TMP30]], align 4
8159 // CHECK39-NEXT: [[TMP31:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
8160 // CHECK39-NEXT: store i8* null, i8** [[TMP31]], align 4
8161 // CHECK39-NEXT: [[TMP32:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8162 // CHECK39-NEXT: [[TMP33:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8163 // CHECK39-NEXT: [[TMP34:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
8164 // CHECK39-NEXT: [[TMP35:%.*]] = load i32, i32* [[N]], align 4
8165 // CHECK39-NEXT: store i32 [[TMP35]], i32* [[DOTCAPTURE_EXPR_]], align 4
8166 // CHECK39-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8167 // CHECK39-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP36]], 0
8168 // CHECK39-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8169 // CHECK39-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8170 // CHECK39-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8171 // CHECK39-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8172 // CHECK39-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP37]], 1
8173 // CHECK39-NEXT: [[TMP38:%.*]] = zext i32 [[ADD]] to i64
8174 // CHECK39-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP38]])
8175 // CHECK39-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192.region_id, i32 4, i8** [[TMP32]], i8** [[TMP33]], i64* [[TMP34]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
8176 // CHECK39-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
8177 // CHECK39-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
8178 // CHECK39: omp_offload.failed:
8179 // CHECK39-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192(i32 [[TMP3]], i32 [[TMP5]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
8180 // CHECK39-NEXT: br label [[OMP_OFFLOAD_CONT]]
8181 // CHECK39: omp_offload.cont:
8182 // CHECK39-NEXT: [[TMP41:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
8183 // CHECK39-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP41]])
8184 // CHECK39-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
8185 // CHECK39-NEXT: [[TMP42:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
8186 // CHECK39-NEXT: call void @llvm.stackrestore(i8* [[TMP42]])
8187 // CHECK39-NEXT: [[TMP43:%.*]] = load i32, i32* [[RETVAL]], align 4
8188 // CHECK39-NEXT: ret i32 [[TMP43]]
8189 //
8190 //
8191 // CHECK39-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192
8192 // CHECK39-SAME: (i32 [[ARGC:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
8193 // CHECK39-NEXT: entry:
8194 // CHECK39-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
8195 // CHECK39-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8196 // CHECK39-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8197 // CHECK39-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8198 // CHECK39-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
8199 // CHECK39-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
8200 // CHECK39-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
8201 // CHECK39-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8202 // CHECK39-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8203 // CHECK39-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8204 // CHECK39-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8205 // CHECK39-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8206 // CHECK39-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
8207 // CHECK39-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
8208 // CHECK39-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
8209 // CHECK39-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
8210 // CHECK39-NEXT: [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
8211 // CHECK39-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP3]] to i1
8212 // CHECK39-NEXT: [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED]] to i8*
8213 // CHECK39-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
8214 // CHECK39-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
8215 // CHECK39-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
8216 // CHECK39-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
8217 // CHECK39-NEXT: ret void
8218 //
8219 //
8220 // CHECK39-LABEL: define {{[^@]+}}@.omp_outlined.
8221 // CHECK39-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8222 // CHECK39-NEXT: entry:
8223 // CHECK39-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8224 // CHECK39-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8225 // CHECK39-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
8226 // CHECK39-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8227 // CHECK39-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8228 // CHECK39-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
8229 // CHECK39-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8230 // CHECK39-NEXT: [[TMP:%.*]] = alloca i32, align 4
8231 // CHECK39-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8232 // CHECK39-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8233 // CHECK39-NEXT: [[I:%.*]] = alloca i32, align 4
8234 // CHECK39-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8235 // CHECK39-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8236 // CHECK39-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8237 // CHECK39-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8238 // CHECK39-NEXT: [[I4:%.*]] = alloca i32, align 4
8239 // CHECK39-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8240 // CHECK39-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8241 // CHECK39-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
8242 // CHECK39-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8243 // CHECK39-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8244 // CHECK39-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8245 // CHECK39-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
8246 // CHECK39-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8247 // CHECK39-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8248 // CHECK39-NEXT: [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
8249 // CHECK39-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
8250 // CHECK39-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8251 // CHECK39-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8252 // CHECK39-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8253 // CHECK39-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8254 // CHECK39-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
8255 // CHECK39-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
8256 // CHECK39-NEXT: store i32 0, i32* [[I]], align 4
8257 // CHECK39-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8258 // CHECK39-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8259 // CHECK39-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8260 // CHECK39: omp.precond.then:
8261 // CHECK39-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8262 // CHECK39-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8263 // CHECK39-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
8264 // CHECK39-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8265 // CHECK39-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8266 // CHECK39-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8267 // CHECK39-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
8268 // CHECK39-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8269 // CHECK39-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8270 // CHECK39-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8271 // CHECK39-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
8272 // CHECK39-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8273 // CHECK39: cond.true:
8274 // CHECK39-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8275 // CHECK39-NEXT: br label [[COND_END:%.*]]
8276 // CHECK39: cond.false:
8277 // CHECK39-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8278 // CHECK39-NEXT: br label [[COND_END]]
8279 // CHECK39: cond.end:
8280 // CHECK39-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
8281 // CHECK39-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8282 // CHECK39-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8283 // CHECK39-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
8284 // CHECK39-NEXT: [[TMP14:%.*]] = load i8, i8* [[CONV]], align 4
8285 // CHECK39-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP14]] to i1
8286 // CHECK39-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
8287 // CHECK39: omp_if.then:
8288 // CHECK39-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8289 // CHECK39: omp.inner.for.cond:
8290 // CHECK39-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
8291 // CHECK39-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
8292 // CHECK39-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
8293 // CHECK39-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8294 // CHECK39: omp.inner.for.body:
8295 // CHECK39-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
8296 // CHECK39-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
8297 // CHECK39-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8298 // CHECK39-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !6
8299 // CHECK39-NEXT: [[TMP18:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !6
8300 // CHECK39-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP18]]
8301 // CHECK39-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
8302 // CHECK39-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8303 // CHECK39: omp.body.continue:
8304 // CHECK39-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8305 // CHECK39: omp.inner.for.inc:
8306 // CHECK39-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
8307 // CHECK39-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
8308 // CHECK39-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
8309 // CHECK39-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
8310 // CHECK39: omp.inner.for.end:
8311 // CHECK39-NEXT: br label [[OMP_IF_END:%.*]]
8312 // CHECK39: omp_if.else:
8313 // CHECK39-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
8314 // CHECK39: omp.inner.for.cond8:
8315 // CHECK39-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8316 // CHECK39-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8317 // CHECK39-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
8318 // CHECK39-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
8319 // CHECK39: omp.inner.for.body10:
8320 // CHECK39-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8321 // CHECK39-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP22]], 1
8322 // CHECK39-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
8323 // CHECK39-NEXT: store i32 [[ADD12]], i32* [[I4]], align 4
8324 // CHECK39-NEXT: [[TMP23:%.*]] = load i32, i32* [[I4]], align 4
8325 // CHECK39-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP23]]
8326 // CHECK39-NEXT: store i32 0, i32* [[ARRAYIDX13]], align 4
8327 // CHECK39-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]]
8328 // CHECK39: omp.body.continue14:
8329 // CHECK39-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]]
8330 // CHECK39: omp.inner.for.inc15:
8331 // CHECK39-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8332 // CHECK39-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP24]], 1
8333 // CHECK39-NEXT: store i32 [[ADD16]], i32* [[DOTOMP_IV]], align 4
8334 // CHECK39-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP10:![0-9]+]]
8335 // CHECK39: omp.inner.for.end17:
8336 // CHECK39-NEXT: br label [[OMP_IF_END]]
8337 // CHECK39: omp_if.end:
8338 // CHECK39-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8339 // CHECK39: omp.loop.exit:
8340 // CHECK39-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8341 // CHECK39-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
8342 // CHECK39-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
8343 // CHECK39-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8344 // CHECK39-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
8345 // CHECK39-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8346 // CHECK39: .omp.final.then:
8347 // CHECK39-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8348 // CHECK39-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP29]], 0
8349 // CHECK39-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
8350 // CHECK39-NEXT: [[MUL20:%.*]] = mul nsw i32 [[DIV19]], 1
8351 // CHECK39-NEXT: [[ADD21:%.*]] = add nsw i32 0, [[MUL20]]
8352 // CHECK39-NEXT: store i32 [[ADD21]], i32* [[I4]], align 4
8353 // CHECK39-NEXT: br label [[DOTOMP_FINAL_DONE]]
8354 // CHECK39: .omp.final.done:
8355 // CHECK39-NEXT: br label [[OMP_PRECOND_END]]
8356 // CHECK39: omp.precond.end:
8357 // CHECK39-NEXT: ret void
8358 //
8359 //
8360 // CHECK39-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
8361 // CHECK39-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
8362 // CHECK39-NEXT: entry:
8363 // CHECK39-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
8364 // CHECK39-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
8365 // CHECK39-NEXT: [[TE:%.*]] = alloca i32, align 4
8366 // CHECK39-NEXT: [[TH:%.*]] = alloca i32, align 4
8367 // CHECK39-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4
8368 // CHECK39-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4
8369 // CHECK39-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
8370 // CHECK39-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
8371 // CHECK39-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
8372 // CHECK39-NEXT: [[TMP:%.*]] = alloca i32, align 4
8373 // CHECK39-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
8374 // CHECK39-NEXT: store i32 0, i32* [[TE]], align 4
8375 // CHECK39-NEXT: store i32 128, i32* [[TH]], align 4
8376 // CHECK39-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4
8377 // CHECK39-NEXT: store i32 [[TMP0]], i32* [[TE_CASTED]], align 4
8378 // CHECK39-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE_CASTED]], align 4
8379 // CHECK39-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
8380 // CHECK39-NEXT: store i32 [[TMP2]], i32* [[TH_CASTED]], align 4
8381 // CHECK39-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_CASTED]], align 4
8382 // CHECK39-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8383 // CHECK39-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*
8384 // CHECK39-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4
8385 // CHECK39-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8386 // CHECK39-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
8387 // CHECK39-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4
8388 // CHECK39-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
8389 // CHECK39-NEXT: store i8* null, i8** [[TMP8]], align 4
8390 // CHECK39-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
8391 // CHECK39-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
8392 // CHECK39-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
8393 // CHECK39-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
8394 // CHECK39-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
8395 // CHECK39-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4
8396 // CHECK39-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
8397 // CHECK39-NEXT: store i8* null, i8** [[TMP13]], align 4
8398 // CHECK39-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
8399 // CHECK39-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]**
8400 // CHECK39-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 4
8401 // CHECK39-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
8402 // CHECK39-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]**
8403 // CHECK39-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 4
8404 // CHECK39-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
8405 // CHECK39-NEXT: store i8* null, i8** [[TMP18]], align 4
8406 // CHECK39-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8407 // CHECK39-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8408 // CHECK39-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4
8409 // CHECK39-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
8410 // CHECK39-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 1)
8411 // CHECK39-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
8412 // CHECK39-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
8413 // CHECK39: omp_offload.failed:
8414 // CHECK39-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR3]]
8415 // CHECK39-NEXT: br label [[OMP_OFFLOAD_CONT]]
8416 // CHECK39: omp_offload.cont:
8417 // CHECK39-NEXT: ret i32 0
8418 //
8419 //
8420 // CHECK39-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181
8421 // CHECK39-SAME: (i32 [[TE:%.*]], i32 [[TH:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8422 // CHECK39-NEXT: entry:
8423 // CHECK39-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4
8424 // CHECK39-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4
8425 // CHECK39-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8426 // CHECK39-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
8427 // CHECK39-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4
8428 // CHECK39-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4
8429 // CHECK39-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8430 // CHECK39-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8431 // CHECK39-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4
8432 // CHECK39-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4
8433 // CHECK39-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
8434 // CHECK39-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]])
8435 // CHECK39-NEXT: ret void
8436 //
8437 //
8438 // CHECK39-LABEL: define {{[^@]+}}@.omp_outlined..1
8439 // CHECK39-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8440 // CHECK39-NEXT: entry:
8441 // CHECK39-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8442 // CHECK39-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8443 // CHECK39-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8444 // CHECK39-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8445 // CHECK39-NEXT: [[TMP:%.*]] = alloca i32, align 4
8446 // CHECK39-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8447 // CHECK39-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8448 // CHECK39-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8449 // CHECK39-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8450 // CHECK39-NEXT: [[I:%.*]] = alloca i32, align 4
8451 // CHECK39-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8452 // CHECK39-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8453 // CHECK39-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8454 // CHECK39-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8455 // CHECK39-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8456 // CHECK39-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
8457 // CHECK39-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8458 // CHECK39-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8459 // CHECK39-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8460 // CHECK39-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
8461 // CHECK39-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8462 // CHECK39-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8463 // CHECK39-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
8464 // CHECK39-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8465 // CHECK39: cond.true:
8466 // CHECK39-NEXT: br label [[COND_END:%.*]]
8467 // CHECK39: cond.false:
8468 // CHECK39-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8469 // CHECK39-NEXT: br label [[COND_END]]
8470 // CHECK39: cond.end:
8471 // CHECK39-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
8472 // CHECK39-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8473 // CHECK39-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8474 // CHECK39-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
8475 // CHECK39-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8476 // CHECK39: omp.inner.for.cond:
8477 // CHECK39-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
8478 // CHECK39-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
8479 // CHECK39-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8480 // CHECK39-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8481 // CHECK39: omp.inner.for.body:
8482 // CHECK39-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
8483 // CHECK39-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
8484 // CHECK39-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8485 // CHECK39-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
8486 // CHECK39-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14
8487 // CHECK39-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
8488 // CHECK39-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
8489 // CHECK39-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8490 // CHECK39: omp.body.continue:
8491 // CHECK39-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8492 // CHECK39: omp.inner.for.inc:
8493 // CHECK39-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
8494 // CHECK39-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
8495 // CHECK39-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
8496 // CHECK39-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
8497 // CHECK39: omp.inner.for.end:
8498 // CHECK39-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8499 // CHECK39: omp.loop.exit:
8500 // CHECK39-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
8501 // CHECK39-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8502 // CHECK39-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
8503 // CHECK39-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8504 // CHECK39: .omp.final.then:
8505 // CHECK39-NEXT: store i32 10, i32* [[I]], align 4
8506 // CHECK39-NEXT: br label [[DOTOMP_FINAL_DONE]]
8507 // CHECK39: .omp.final.done:
8508 // CHECK39-NEXT: ret void
8509 //
8510 //
8511 // CHECK39-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
8512 // CHECK39-SAME: () #[[ATTR5:[0-9]+]] {
8513 // CHECK39-NEXT: entry:
8514 // CHECK39-NEXT: call void @__tgt_register_requires(i64 1)
8515 // CHECK39-NEXT: ret void
8516 //
8517 //
8518 // CHECK40-LABEL: define {{[^@]+}}@main
8519 // CHECK40-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
8520 // CHECK40-NEXT: entry:
8521 // CHECK40-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
8522 // CHECK40-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
8523 // CHECK40-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
8524 // CHECK40-NEXT: [[N:%.*]] = alloca i32, align 4
8525 // CHECK40-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
8526 // CHECK40-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
8527 // CHECK40-NEXT: [[ARGC_CASTED:%.*]] = alloca i32, align 4
8528 // CHECK40-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
8529 // CHECK40-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
8530 // CHECK40-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
8531 // CHECK40-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
8532 // CHECK40-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 4
8533 // CHECK40-NEXT: [[TMP:%.*]] = alloca i32, align 4
8534 // CHECK40-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8535 // CHECK40-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8536 // CHECK40-NEXT: store i32 0, i32* [[RETVAL]], align 4
8537 // CHECK40-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
8538 // CHECK40-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
8539 // CHECK40-NEXT: store i32 100, i32* [[N]], align 4
8540 // CHECK40-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
8541 // CHECK40-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
8542 // CHECK40-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
8543 // CHECK40-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
8544 // CHECK40-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
8545 // CHECK40-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
8546 // CHECK40-NEXT: store i32 [[TMP2]], i32* [[ARGC_CASTED]], align 4
8547 // CHECK40-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARGC_CASTED]], align 4
8548 // CHECK40-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4
8549 // CHECK40-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4
8550 // CHECK40-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4
8551 // CHECK40-NEXT: [[TMP6:%.*]] = mul nuw i32 [[TMP0]], 4
8552 // CHECK40-NEXT: [[TMP7:%.*]] = sext i32 [[TMP6]] to i64
8553 // CHECK40-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8554 // CHECK40-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
8555 // CHECK40-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4
8556 // CHECK40-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8557 // CHECK40-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32*
8558 // CHECK40-NEXT: store i32 [[TMP3]], i32* [[TMP11]], align 4
8559 // CHECK40-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
8560 // CHECK40-NEXT: store i64 4, i64* [[TMP12]], align 4
8561 // CHECK40-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
8562 // CHECK40-NEXT: store i8* null, i8** [[TMP13]], align 4
8563 // CHECK40-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
8564 // CHECK40-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
8565 // CHECK40-NEXT: store i32 [[TMP5]], i32* [[TMP15]], align 4
8566 // CHECK40-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
8567 // CHECK40-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
8568 // CHECK40-NEXT: store i32 [[TMP5]], i32* [[TMP17]], align 4
8569 // CHECK40-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
8570 // CHECK40-NEXT: store i64 4, i64* [[TMP18]], align 4
8571 // CHECK40-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
8572 // CHECK40-NEXT: store i8* null, i8** [[TMP19]], align 4
8573 // CHECK40-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
8574 // CHECK40-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
8575 // CHECK40-NEXT: store i32 [[TMP0]], i32* [[TMP21]], align 4
8576 // CHECK40-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
8577 // CHECK40-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
8578 // CHECK40-NEXT: store i32 [[TMP0]], i32* [[TMP23]], align 4
8579 // CHECK40-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
8580 // CHECK40-NEXT: store i64 4, i64* [[TMP24]], align 4
8581 // CHECK40-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
8582 // CHECK40-NEXT: store i8* null, i8** [[TMP25]], align 4
8583 // CHECK40-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
8584 // CHECK40-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32**
8585 // CHECK40-NEXT: store i32* [[VLA]], i32** [[TMP27]], align 4
8586 // CHECK40-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
8587 // CHECK40-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32**
8588 // CHECK40-NEXT: store i32* [[VLA]], i32** [[TMP29]], align 4
8589 // CHECK40-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
8590 // CHECK40-NEXT: store i64 [[TMP7]], i64* [[TMP30]], align 4
8591 // CHECK40-NEXT: [[TMP31:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
8592 // CHECK40-NEXT: store i8* null, i8** [[TMP31]], align 4
8593 // CHECK40-NEXT: [[TMP32:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8594 // CHECK40-NEXT: [[TMP33:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8595 // CHECK40-NEXT: [[TMP34:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
8596 // CHECK40-NEXT: [[TMP35:%.*]] = load i32, i32* [[N]], align 4
8597 // CHECK40-NEXT: store i32 [[TMP35]], i32* [[DOTCAPTURE_EXPR_]], align 4
8598 // CHECK40-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8599 // CHECK40-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP36]], 0
8600 // CHECK40-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8601 // CHECK40-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8602 // CHECK40-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8603 // CHECK40-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8604 // CHECK40-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP37]], 1
8605 // CHECK40-NEXT: [[TMP38:%.*]] = zext i32 [[ADD]] to i64
8606 // CHECK40-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP38]])
8607 // CHECK40-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192.region_id, i32 4, i8** [[TMP32]], i8** [[TMP33]], i64* [[TMP34]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1)
8608 // CHECK40-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
8609 // CHECK40-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
8610 // CHECK40: omp_offload.failed:
8611 // CHECK40-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192(i32 [[TMP3]], i32 [[TMP5]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
8612 // CHECK40-NEXT: br label [[OMP_OFFLOAD_CONT]]
8613 // CHECK40: omp_offload.cont:
8614 // CHECK40-NEXT: [[TMP41:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
8615 // CHECK40-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP41]])
8616 // CHECK40-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
8617 // CHECK40-NEXT: [[TMP42:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
8618 // CHECK40-NEXT: call void @llvm.stackrestore(i8* [[TMP42]])
8619 // CHECK40-NEXT: [[TMP43:%.*]] = load i32, i32* [[RETVAL]], align 4
8620 // CHECK40-NEXT: ret i32 [[TMP43]]
8621 //
8622 //
8623 // CHECK40-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l192
8624 // CHECK40-SAME: (i32 [[ARGC:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
8625 // CHECK40-NEXT: entry:
8626 // CHECK40-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
8627 // CHECK40-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8628 // CHECK40-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8629 // CHECK40-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8630 // CHECK40-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
8631 // CHECK40-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
8632 // CHECK40-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
8633 // CHECK40-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8634 // CHECK40-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8635 // CHECK40-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8636 // CHECK40-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8637 // CHECK40-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8638 // CHECK40-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
8639 // CHECK40-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
8640 // CHECK40-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
8641 // CHECK40-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
8642 // CHECK40-NEXT: [[TMP3:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
8643 // CHECK40-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP3]] to i1
8644 // CHECK40-NEXT: [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED]] to i8*
8645 // CHECK40-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
8646 // CHECK40-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
8647 // CHECK40-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
8648 // CHECK40-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
8649 // CHECK40-NEXT: ret void
8650 //
8651 //
8652 // CHECK40-LABEL: define {{[^@]+}}@.omp_outlined.
8653 // CHECK40-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8654 // CHECK40-NEXT: entry:
8655 // CHECK40-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8656 // CHECK40-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8657 // CHECK40-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
8658 // CHECK40-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8659 // CHECK40-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8660 // CHECK40-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
8661 // CHECK40-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8662 // CHECK40-NEXT: [[TMP:%.*]] = alloca i32, align 4
8663 // CHECK40-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8664 // CHECK40-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8665 // CHECK40-NEXT: [[I:%.*]] = alloca i32, align 4
8666 // CHECK40-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8667 // CHECK40-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8668 // CHECK40-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8669 // CHECK40-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8670 // CHECK40-NEXT: [[I4:%.*]] = alloca i32, align 4
8671 // CHECK40-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8672 // CHECK40-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8673 // CHECK40-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
8674 // CHECK40-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8675 // CHECK40-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8676 // CHECK40-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8677 // CHECK40-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
8678 // CHECK40-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8679 // CHECK40-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8680 // CHECK40-NEXT: [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8*
8681 // CHECK40-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
8682 // CHECK40-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8683 // CHECK40-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8684 // CHECK40-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8685 // CHECK40-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8686 // CHECK40-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
8687 // CHECK40-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
8688 // CHECK40-NEXT: store i32 0, i32* [[I]], align 4
8689 // CHECK40-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8690 // CHECK40-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8691 // CHECK40-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8692 // CHECK40: omp.precond.then:
8693 // CHECK40-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8694 // CHECK40-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8695 // CHECK40-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
8696 // CHECK40-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8697 // CHECK40-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8698 // CHECK40-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8699 // CHECK40-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
8700 // CHECK40-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8701 // CHECK40-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8702 // CHECK40-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8703 // CHECK40-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
8704 // CHECK40-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8705 // CHECK40: cond.true:
8706 // CHECK40-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8707 // CHECK40-NEXT: br label [[COND_END:%.*]]
8708 // CHECK40: cond.false:
8709 // CHECK40-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8710 // CHECK40-NEXT: br label [[COND_END]]
8711 // CHECK40: cond.end:
8712 // CHECK40-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
8713 // CHECK40-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8714 // CHECK40-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8715 // CHECK40-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
8716 // CHECK40-NEXT: [[TMP14:%.*]] = load i8, i8* [[CONV]], align 4
8717 // CHECK40-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP14]] to i1
8718 // CHECK40-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
8719 // CHECK40: omp_if.then:
8720 // CHECK40-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8721 // CHECK40: omp.inner.for.cond:
8722 // CHECK40-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
8723 // CHECK40-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
8724 // CHECK40-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
8725 // CHECK40-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8726 // CHECK40: omp.inner.for.body:
8727 // CHECK40-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
8728 // CHECK40-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
8729 // CHECK40-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8730 // CHECK40-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !6
8731 // CHECK40-NEXT: [[TMP18:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !6
8732 // CHECK40-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP18]]
8733 // CHECK40-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
8734 // CHECK40-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8735 // CHECK40: omp.body.continue:
8736 // CHECK40-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8737 // CHECK40: omp.inner.for.inc:
8738 // CHECK40-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
8739 // CHECK40-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
8740 // CHECK40-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
8741 // CHECK40-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
8742 // CHECK40: omp.inner.for.end:
8743 // CHECK40-NEXT: br label [[OMP_IF_END:%.*]]
8744 // CHECK40: omp_if.else:
8745 // CHECK40-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
8746 // CHECK40: omp.inner.for.cond8:
8747 // CHECK40-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8748 // CHECK40-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8749 // CHECK40-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
8750 // CHECK40-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
8751 // CHECK40: omp.inner.for.body10:
8752 // CHECK40-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8753 // CHECK40-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP22]], 1
8754 // CHECK40-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
8755 // CHECK40-NEXT: store i32 [[ADD12]], i32* [[I4]], align 4
8756 // CHECK40-NEXT: [[TMP23:%.*]] = load i32, i32* [[I4]], align 4
8757 // CHECK40-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP23]]
8758 // CHECK40-NEXT: store i32 0, i32* [[ARRAYIDX13]], align 4
8759 // CHECK40-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]]
8760 // CHECK40: omp.body.continue14:
8761 // CHECK40-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]]
8762 // CHECK40: omp.inner.for.inc15:
8763 // CHECK40-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8764 // CHECK40-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP24]], 1
8765 // CHECK40-NEXT: store i32 [[ADD16]], i32* [[DOTOMP_IV]], align 4
8766 // CHECK40-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP10:![0-9]+]]
8767 // CHECK40: omp.inner.for.end17:
8768 // CHECK40-NEXT: br label [[OMP_IF_END]]
8769 // CHECK40: omp_if.end:
8770 // CHECK40-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8771 // CHECK40: omp.loop.exit:
8772 // CHECK40-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8773 // CHECK40-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
8774 // CHECK40-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
8775 // CHECK40-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8776 // CHECK40-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
8777 // CHECK40-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8778 // CHECK40: .omp.final.then:
8779 // CHECK40-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8780 // CHECK40-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP29]], 0
8781 // CHECK40-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
8782 // CHECK40-NEXT: [[MUL20:%.*]] = mul nsw i32 [[DIV19]], 1
8783 // CHECK40-NEXT: [[ADD21:%.*]] = add nsw i32 0, [[MUL20]]
8784 // CHECK40-NEXT: store i32 [[ADD21]], i32* [[I4]], align 4
8785 // CHECK40-NEXT: br label [[DOTOMP_FINAL_DONE]]
8786 // CHECK40: .omp.final.done:
8787 // CHECK40-NEXT: br label [[OMP_PRECOND_END]]
8788 // CHECK40: omp.precond.end:
8789 // CHECK40-NEXT: ret void
8790 //
8791 //
8792 // CHECK40-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
8793 // CHECK40-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
8794 // CHECK40-NEXT: entry:
8795 // CHECK40-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
8796 // CHECK40-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
8797 // CHECK40-NEXT: [[TE:%.*]] = alloca i32, align 4
8798 // CHECK40-NEXT: [[TH:%.*]] = alloca i32, align 4
8799 // CHECK40-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4
8800 // CHECK40-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4
8801 // CHECK40-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
8802 // CHECK40-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
8803 // CHECK40-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
8804 // CHECK40-NEXT: [[TMP:%.*]] = alloca i32, align 4
8805 // CHECK40-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
8806 // CHECK40-NEXT: store i32 0, i32* [[TE]], align 4
8807 // CHECK40-NEXT: store i32 128, i32* [[TH]], align 4
8808 // CHECK40-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4
8809 // CHECK40-NEXT: store i32 [[TMP0]], i32* [[TE_CASTED]], align 4
8810 // CHECK40-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE_CASTED]], align 4
8811 // CHECK40-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
8812 // CHECK40-NEXT: store i32 [[TMP2]], i32* [[TH_CASTED]], align 4
8813 // CHECK40-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_CASTED]], align 4
8814 // CHECK40-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8815 // CHECK40-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*
8816 // CHECK40-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4
8817 // CHECK40-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8818 // CHECK40-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
8819 // CHECK40-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4
8820 // CHECK40-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
8821 // CHECK40-NEXT: store i8* null, i8** [[TMP8]], align 4
8822 // CHECK40-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
8823 // CHECK40-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
8824 // CHECK40-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
8825 // CHECK40-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
8826 // CHECK40-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
8827 // CHECK40-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4
8828 // CHECK40-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
8829 // CHECK40-NEXT: store i8* null, i8** [[TMP13]], align 4
8830 // CHECK40-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
8831 // CHECK40-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]**
8832 // CHECK40-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 4
8833 // CHECK40-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
8834 // CHECK40-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]**
8835 // CHECK40-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 4
8836 // CHECK40-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
8837 // CHECK40-NEXT: store i8* null, i8** [[TMP18]], align 4
8838 // CHECK40-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8839 // CHECK40-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8840 // CHECK40-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4
8841 // CHECK40-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
8842 // CHECK40-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 1)
8843 // CHECK40-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
8844 // CHECK40-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
8845 // CHECK40: omp_offload.failed:
8846 // CHECK40-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR3]]
8847 // CHECK40-NEXT: br label [[OMP_OFFLOAD_CONT]]
8848 // CHECK40: omp_offload.cont:
8849 // CHECK40-NEXT: ret i32 0
8850 //
8851 //
8852 // CHECK40-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l181
8853 // CHECK40-SAME: (i32 [[TE:%.*]], i32 [[TH:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8854 // CHECK40-NEXT: entry:
8855 // CHECK40-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4
8856 // CHECK40-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4
8857 // CHECK40-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8858 // CHECK40-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
8859 // CHECK40-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4
8860 // CHECK40-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4
8861 // CHECK40-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8862 // CHECK40-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8863 // CHECK40-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4
8864 // CHECK40-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4
8865 // CHECK40-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
8866 // CHECK40-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]])
8867 // CHECK40-NEXT: ret void
8868 //
8869 //
8870 // CHECK40-LABEL: define {{[^@]+}}@.omp_outlined..1
8871 // CHECK40-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8872 // CHECK40-NEXT: entry:
8873 // CHECK40-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8874 // CHECK40-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8875 // CHECK40-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8876 // CHECK40-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8877 // CHECK40-NEXT: [[TMP:%.*]] = alloca i32, align 4
8878 // CHECK40-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8879 // CHECK40-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8880 // CHECK40-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8881 // CHECK40-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8882 // CHECK40-NEXT: [[I:%.*]] = alloca i32, align 4
8883 // CHECK40-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8884 // CHECK40-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8885 // CHECK40-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8886 // CHECK40-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8887 // CHECK40-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8888 // CHECK40-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
8889 // CHECK40-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8890 // CHECK40-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8891 // CHECK40-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8892 // CHECK40-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
8893 // CHECK40-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8894 // CHECK40-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8895 // CHECK40-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
8896 // CHECK40-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8897 // CHECK40: cond.true:
8898 // CHECK40-NEXT: br label [[COND_END:%.*]]
8899 // CHECK40: cond.false:
8900 // CHECK40-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8901 // CHECK40-NEXT: br label [[COND_END]]
8902 // CHECK40: cond.end:
8903 // CHECK40-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
8904 // CHECK40-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8905 // CHECK40-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8906 // CHECK40-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
8907 // CHECK40-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8908 // CHECK40: omp.inner.for.cond:
8909 // CHECK40-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
8910 // CHECK40-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
8911 // CHECK40-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8912 // CHECK40-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8913 // CHECK40: omp.inner.for.body:
8914 // CHECK40-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
8915 // CHECK40-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
8916 // CHECK40-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8917 // CHECK40-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
8918 // CHECK40-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14
8919 // CHECK40-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
8920 // CHECK40-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
8921 // CHECK40-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8922 // CHECK40: omp.body.continue:
8923 // CHECK40-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8924 // CHECK40: omp.inner.for.inc:
8925 // CHECK40-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
8926 // CHECK40-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
8927 // CHECK40-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
8928 // CHECK40-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
8929 // CHECK40: omp.inner.for.end:
8930 // CHECK40-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8931 // CHECK40: omp.loop.exit:
8932 // CHECK40-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
8933 // CHECK40-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8934 // CHECK40-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
8935 // CHECK40-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8936 // CHECK40: .omp.final.then:
8937 // CHECK40-NEXT: store i32 10, i32* [[I]], align 4
8938 // CHECK40-NEXT: br label [[DOTOMP_FINAL_DONE]]
8939 // CHECK40: .omp.final.done:
8940 // CHECK40-NEXT: ret void
8941 //
8942 //
8943 // CHECK40-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
8944 // CHECK40-SAME: () #[[ATTR5:[0-9]+]] {
8945 // CHECK40-NEXT: entry:
8946 // CHECK40-NEXT: call void @__tgt_register_requires(i64 1)
8947 // CHECK40-NEXT: ret void
8948 //
8949 //
8950 // CHECK41-LABEL: define {{[^@]+}}@main
8951 // CHECK41-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
8952 // CHECK41-NEXT: entry:
8953 // CHECK41-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
8954 // CHECK41-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
8955 // CHECK41-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
8956 // CHECK41-NEXT: [[N:%.*]] = alloca i32, align 4
8957 // CHECK41-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
8958 // CHECK41-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
8959 // CHECK41-NEXT: [[TMP:%.*]] = alloca i32, align 4
8960 // CHECK41-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8961 // CHECK41-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8962 // CHECK41-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8963 // CHECK41-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8964 // CHECK41-NEXT: [[I:%.*]] = alloca i32, align 4
8965 // CHECK41-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8966 // CHECK41-NEXT: [[I3:%.*]] = alloca i32, align 4
8967 // CHECK41-NEXT: store i32 0, i32* [[RETVAL]], align 4
8968 // CHECK41-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
8969 // CHECK41-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
8970 // CHECK41-NEXT: store i32 100, i32* [[N]], align 4
8971 // CHECK41-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
8972 // CHECK41-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
8973 // CHECK41-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
8974 // CHECK41-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
8975 // CHECK41-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
8976 // CHECK41-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
8977 // CHECK41-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
8978 // CHECK41-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
8979 // CHECK41-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8980 // CHECK41-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8981 // CHECK41-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8982 // CHECK41-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8983 // CHECK41-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8984 // CHECK41-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8985 // CHECK41-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8986 // CHECK41-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
8987 // CHECK41-NEXT: store i32 0, i32* [[I]], align 4
8988 // CHECK41-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8989 // CHECK41-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
8990 // CHECK41-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
8991 // CHECK41: simd.if.then:
8992 // CHECK41-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8993 // CHECK41-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
8994 // CHECK41-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8995 // CHECK41: omp.inner.for.cond:
8996 // CHECK41-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
8997 // CHECK41-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
8998 // CHECK41-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
8999 // CHECK41-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9000 // CHECK41: omp.inner.for.body:
9001 // CHECK41-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
9002 // CHECK41-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
9003 // CHECK41-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9004 // CHECK41-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !2
9005 // CHECK41-NEXT: [[TMP11:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !2
9006 // CHECK41-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
9007 // CHECK41-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]]
9008 // CHECK41-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
9009 // CHECK41-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9010 // CHECK41: omp.body.continue:
9011 // CHECK41-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9012 // CHECK41: omp.inner.for.inc:
9013 // CHECK41-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
9014 // CHECK41-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], 1
9015 // CHECK41-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
9016 // CHECK41-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
9017 // CHECK41: omp.inner.for.end:
9018 // CHECK41-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9019 // CHECK41-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP13]], 0
9020 // CHECK41-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
9021 // CHECK41-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
9022 // CHECK41-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
9023 // CHECK41-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
9024 // CHECK41-NEXT: br label [[SIMD_IF_END]]
9025 // CHECK41: simd.if.end:
9026 // CHECK41-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
9027 // CHECK41-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP14]])
9028 // CHECK41-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
9029 // CHECK41-NEXT: [[TMP15:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
9030 // CHECK41-NEXT: call void @llvm.stackrestore(i8* [[TMP15]])
9031 // CHECK41-NEXT: [[TMP16:%.*]] = load i32, i32* [[RETVAL]], align 4
9032 // CHECK41-NEXT: ret i32 [[TMP16]]
9033 //
9034 //
9035 // CHECK41-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
9036 // CHECK41-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
9037 // CHECK41-NEXT: entry:
9038 // CHECK41-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
9039 // CHECK41-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
9040 // CHECK41-NEXT: [[TE:%.*]] = alloca i32, align 4
9041 // CHECK41-NEXT: [[TH:%.*]] = alloca i32, align 4
9042 // CHECK41-NEXT: [[TMP:%.*]] = alloca i32, align 4
9043 // CHECK41-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9044 // CHECK41-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9045 // CHECK41-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9046 // CHECK41-NEXT: [[I:%.*]] = alloca i32, align 4
9047 // CHECK41-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9048 // CHECK41-NEXT: store i32 0, i32* [[TE]], align 4
9049 // CHECK41-NEXT: store i32 128, i32* [[TH]], align 4
9050 // CHECK41-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9051 // CHECK41-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9052 // CHECK41-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9053 // CHECK41-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
9054 // CHECK41-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9055 // CHECK41: omp.inner.for.cond:
9056 // CHECK41-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
9057 // CHECK41-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
9058 // CHECK41-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
9059 // CHECK41-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9060 // CHECK41: omp.inner.for.body:
9061 // CHECK41-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
9062 // CHECK41-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
9063 // CHECK41-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9064 // CHECK41-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
9065 // CHECK41-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
9066 // CHECK41-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
9067 // CHECK41-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
9068 // CHECK41-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
9069 // CHECK41-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9070 // CHECK41: omp.body.continue:
9071 // CHECK41-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9072 // CHECK41: omp.inner.for.inc:
9073 // CHECK41-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
9074 // CHECK41-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
9075 // CHECK41-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
9076 // CHECK41-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
9077 // CHECK41: omp.inner.for.end:
9078 // CHECK41-NEXT: store i32 10, i32* [[I]], align 4
9079 // CHECK41-NEXT: ret i32 0
9080 //
9081 //
9082 // CHECK42-LABEL: define {{[^@]+}}@main
9083 // CHECK42-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
9084 // CHECK42-NEXT: entry:
9085 // CHECK42-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
9086 // CHECK42-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
9087 // CHECK42-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
9088 // CHECK42-NEXT: [[N:%.*]] = alloca i32, align 4
9089 // CHECK42-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
9090 // CHECK42-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
9091 // CHECK42-NEXT: [[TMP:%.*]] = alloca i32, align 4
9092 // CHECK42-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9093 // CHECK42-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9094 // CHECK42-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9095 // CHECK42-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9096 // CHECK42-NEXT: [[I:%.*]] = alloca i32, align 4
9097 // CHECK42-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9098 // CHECK42-NEXT: [[I3:%.*]] = alloca i32, align 4
9099 // CHECK42-NEXT: store i32 0, i32* [[RETVAL]], align 4
9100 // CHECK42-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9101 // CHECK42-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
9102 // CHECK42-NEXT: store i32 100, i32* [[N]], align 4
9103 // CHECK42-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
9104 // CHECK42-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
9105 // CHECK42-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
9106 // CHECK42-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
9107 // CHECK42-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
9108 // CHECK42-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
9109 // CHECK42-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
9110 // CHECK42-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
9111 // CHECK42-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9112 // CHECK42-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
9113 // CHECK42-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9114 // CHECK42-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9115 // CHECK42-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9116 // CHECK42-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9117 // CHECK42-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9118 // CHECK42-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
9119 // CHECK42-NEXT: store i32 0, i32* [[I]], align 4
9120 // CHECK42-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9121 // CHECK42-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
9122 // CHECK42-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
9123 // CHECK42: simd.if.then:
9124 // CHECK42-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9125 // CHECK42-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
9126 // CHECK42-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9127 // CHECK42: omp.inner.for.cond:
9128 // CHECK42-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
9129 // CHECK42-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
9130 // CHECK42-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
9131 // CHECK42-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9132 // CHECK42: omp.inner.for.body:
9133 // CHECK42-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
9134 // CHECK42-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
9135 // CHECK42-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9136 // CHECK42-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !2
9137 // CHECK42-NEXT: [[TMP11:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !2
9138 // CHECK42-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
9139 // CHECK42-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]]
9140 // CHECK42-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
9141 // CHECK42-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9142 // CHECK42: omp.body.continue:
9143 // CHECK42-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9144 // CHECK42: omp.inner.for.inc:
9145 // CHECK42-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
9146 // CHECK42-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], 1
9147 // CHECK42-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
9148 // CHECK42-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
9149 // CHECK42: omp.inner.for.end:
9150 // CHECK42-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9151 // CHECK42-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP13]], 0
9152 // CHECK42-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
9153 // CHECK42-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
9154 // CHECK42-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
9155 // CHECK42-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
9156 // CHECK42-NEXT: br label [[SIMD_IF_END]]
9157 // CHECK42: simd.if.end:
9158 // CHECK42-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
9159 // CHECK42-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP14]])
9160 // CHECK42-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
9161 // CHECK42-NEXT: [[TMP15:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
9162 // CHECK42-NEXT: call void @llvm.stackrestore(i8* [[TMP15]])
9163 // CHECK42-NEXT: [[TMP16:%.*]] = load i32, i32* [[RETVAL]], align 4
9164 // CHECK42-NEXT: ret i32 [[TMP16]]
9165 //
9166 //
9167 // CHECK42-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
9168 // CHECK42-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
9169 // CHECK42-NEXT: entry:
9170 // CHECK42-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
9171 // CHECK42-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
9172 // CHECK42-NEXT: [[TE:%.*]] = alloca i32, align 4
9173 // CHECK42-NEXT: [[TH:%.*]] = alloca i32, align 4
9174 // CHECK42-NEXT: [[TMP:%.*]] = alloca i32, align 4
9175 // CHECK42-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9176 // CHECK42-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9177 // CHECK42-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9178 // CHECK42-NEXT: [[I:%.*]] = alloca i32, align 4
9179 // CHECK42-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9180 // CHECK42-NEXT: store i32 0, i32* [[TE]], align 4
9181 // CHECK42-NEXT: store i32 128, i32* [[TH]], align 4
9182 // CHECK42-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9183 // CHECK42-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9184 // CHECK42-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9185 // CHECK42-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
9186 // CHECK42-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9187 // CHECK42: omp.inner.for.cond:
9188 // CHECK42-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
9189 // CHECK42-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
9190 // CHECK42-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
9191 // CHECK42-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9192 // CHECK42: omp.inner.for.body:
9193 // CHECK42-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
9194 // CHECK42-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
9195 // CHECK42-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9196 // CHECK42-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
9197 // CHECK42-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
9198 // CHECK42-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
9199 // CHECK42-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
9200 // CHECK42-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
9201 // CHECK42-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9202 // CHECK42: omp.body.continue:
9203 // CHECK42-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9204 // CHECK42: omp.inner.for.inc:
9205 // CHECK42-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
9206 // CHECK42-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
9207 // CHECK42-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
9208 // CHECK42-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
9209 // CHECK42: omp.inner.for.end:
9210 // CHECK42-NEXT: store i32 10, i32* [[I]], align 4
9211 // CHECK42-NEXT: ret i32 0
9212 //
9213 //
9214 // CHECK43-LABEL: define {{[^@]+}}@main
9215 // CHECK43-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
9216 // CHECK43-NEXT: entry:
9217 // CHECK43-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
9218 // CHECK43-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
9219 // CHECK43-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
9220 // CHECK43-NEXT: [[N:%.*]] = alloca i32, align 4
9221 // CHECK43-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
9222 // CHECK43-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
9223 // CHECK43-NEXT: [[TMP:%.*]] = alloca i32, align 4
9224 // CHECK43-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9225 // CHECK43-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9226 // CHECK43-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9227 // CHECK43-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9228 // CHECK43-NEXT: [[I:%.*]] = alloca i32, align 4
9229 // CHECK43-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9230 // CHECK43-NEXT: [[I3:%.*]] = alloca i32, align 4
9231 // CHECK43-NEXT: store i32 0, i32* [[RETVAL]], align 4
9232 // CHECK43-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9233 // CHECK43-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
9234 // CHECK43-NEXT: store i32 100, i32* [[N]], align 4
9235 // CHECK43-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
9236 // CHECK43-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
9237 // CHECK43-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
9238 // CHECK43-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
9239 // CHECK43-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
9240 // CHECK43-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
9241 // CHECK43-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
9242 // CHECK43-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9243 // CHECK43-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
9244 // CHECK43-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9245 // CHECK43-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9246 // CHECK43-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9247 // CHECK43-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9248 // CHECK43-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9249 // CHECK43-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
9250 // CHECK43-NEXT: store i32 0, i32* [[I]], align 4
9251 // CHECK43-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9252 // CHECK43-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
9253 // CHECK43-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
9254 // CHECK43: simd.if.then:
9255 // CHECK43-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9256 // CHECK43-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
9257 // CHECK43-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9258 // CHECK43: omp.inner.for.cond:
9259 // CHECK43-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
9260 // CHECK43-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
9261 // CHECK43-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
9262 // CHECK43-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9263 // CHECK43: omp.inner.for.body:
9264 // CHECK43-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
9265 // CHECK43-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
9266 // CHECK43-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9267 // CHECK43-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !3
9268 // CHECK43-NEXT: [[TMP10:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !3
9269 // CHECK43-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP10]]
9270 // CHECK43-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
9271 // CHECK43-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9272 // CHECK43: omp.body.continue:
9273 // CHECK43-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9274 // CHECK43: omp.inner.for.inc:
9275 // CHECK43-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
9276 // CHECK43-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP11]], 1
9277 // CHECK43-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
9278 // CHECK43-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
9279 // CHECK43: omp.inner.for.end:
9280 // CHECK43-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9281 // CHECK43-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP12]], 0
9282 // CHECK43-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
9283 // CHECK43-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
9284 // CHECK43-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
9285 // CHECK43-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
9286 // CHECK43-NEXT: br label [[SIMD_IF_END]]
9287 // CHECK43: simd.if.end:
9288 // CHECK43-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
9289 // CHECK43-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP13]])
9290 // CHECK43-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
9291 // CHECK43-NEXT: [[TMP14:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
9292 // CHECK43-NEXT: call void @llvm.stackrestore(i8* [[TMP14]])
9293 // CHECK43-NEXT: [[TMP15:%.*]] = load i32, i32* [[RETVAL]], align 4
9294 // CHECK43-NEXT: ret i32 [[TMP15]]
9295 //
9296 //
9297 // CHECK43-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
9298 // CHECK43-SAME: (i32 [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
9299 // CHECK43-NEXT: entry:
9300 // CHECK43-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
9301 // CHECK43-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
9302 // CHECK43-NEXT: [[TE:%.*]] = alloca i32, align 4
9303 // CHECK43-NEXT: [[TH:%.*]] = alloca i32, align 4
9304 // CHECK43-NEXT: [[TMP:%.*]] = alloca i32, align 4
9305 // CHECK43-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9306 // CHECK43-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9307 // CHECK43-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9308 // CHECK43-NEXT: [[I:%.*]] = alloca i32, align 4
9309 // CHECK43-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9310 // CHECK43-NEXT: store i32 0, i32* [[TE]], align 4
9311 // CHECK43-NEXT: store i32 128, i32* [[TH]], align 4
9312 // CHECK43-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9313 // CHECK43-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9314 // CHECK43-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9315 // CHECK43-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
9316 // CHECK43-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9317 // CHECK43: omp.inner.for.cond:
9318 // CHECK43-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
9319 // CHECK43-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
9320 // CHECK43-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
9321 // CHECK43-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9322 // CHECK43: omp.inner.for.body:
9323 // CHECK43-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
9324 // CHECK43-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
9325 // CHECK43-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9326 // CHECK43-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
9327 // CHECK43-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
9328 // CHECK43-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]]
9329 // CHECK43-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !7
9330 // CHECK43-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9331 // CHECK43: omp.body.continue:
9332 // CHECK43-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9333 // CHECK43: omp.inner.for.inc:
9334 // CHECK43-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
9335 // CHECK43-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
9336 // CHECK43-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
9337 // CHECK43-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
9338 // CHECK43: omp.inner.for.end:
9339 // CHECK43-NEXT: store i32 10, i32* [[I]], align 4
9340 // CHECK43-NEXT: ret i32 0
9341 //
9342 //
9343 // CHECK44-LABEL: define {{[^@]+}}@main
9344 // CHECK44-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
9345 // CHECK44-NEXT: entry:
9346 // CHECK44-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
9347 // CHECK44-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
9348 // CHECK44-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
9349 // CHECK44-NEXT: [[N:%.*]] = alloca i32, align 4
9350 // CHECK44-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
9351 // CHECK44-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
9352 // CHECK44-NEXT: [[TMP:%.*]] = alloca i32, align 4
9353 // CHECK44-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9354 // CHECK44-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9355 // CHECK44-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9356 // CHECK44-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9357 // CHECK44-NEXT: [[I:%.*]] = alloca i32, align 4
9358 // CHECK44-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9359 // CHECK44-NEXT: [[I3:%.*]] = alloca i32, align 4
9360 // CHECK44-NEXT: store i32 0, i32* [[RETVAL]], align 4
9361 // CHECK44-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9362 // CHECK44-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
9363 // CHECK44-NEXT: store i32 100, i32* [[N]], align 4
9364 // CHECK44-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
9365 // CHECK44-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
9366 // CHECK44-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
9367 // CHECK44-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
9368 // CHECK44-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
9369 // CHECK44-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
9370 // CHECK44-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
9371 // CHECK44-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9372 // CHECK44-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
9373 // CHECK44-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9374 // CHECK44-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9375 // CHECK44-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9376 // CHECK44-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9377 // CHECK44-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9378 // CHECK44-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
9379 // CHECK44-NEXT: store i32 0, i32* [[I]], align 4
9380 // CHECK44-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9381 // CHECK44-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
9382 // CHECK44-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
9383 // CHECK44: simd.if.then:
9384 // CHECK44-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9385 // CHECK44-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
9386 // CHECK44-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9387 // CHECK44: omp.inner.for.cond:
9388 // CHECK44-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
9389 // CHECK44-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
9390 // CHECK44-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
9391 // CHECK44-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9392 // CHECK44: omp.inner.for.body:
9393 // CHECK44-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
9394 // CHECK44-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
9395 // CHECK44-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9396 // CHECK44-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !3
9397 // CHECK44-NEXT: [[TMP10:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !3
9398 // CHECK44-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP10]]
9399 // CHECK44-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
9400 // CHECK44-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9401 // CHECK44: omp.body.continue:
9402 // CHECK44-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9403 // CHECK44: omp.inner.for.inc:
9404 // CHECK44-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
9405 // CHECK44-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP11]], 1
9406 // CHECK44-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
9407 // CHECK44-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
9408 // CHECK44: omp.inner.for.end:
9409 // CHECK44-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9410 // CHECK44-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP12]], 0
9411 // CHECK44-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
9412 // CHECK44-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
9413 // CHECK44-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
9414 // CHECK44-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
9415 // CHECK44-NEXT: br label [[SIMD_IF_END]]
9416 // CHECK44: simd.if.end:
9417 // CHECK44-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
9418 // CHECK44-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP13]])
9419 // CHECK44-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
9420 // CHECK44-NEXT: [[TMP14:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
9421 // CHECK44-NEXT: call void @llvm.stackrestore(i8* [[TMP14]])
9422 // CHECK44-NEXT: [[TMP15:%.*]] = load i32, i32* [[RETVAL]], align 4
9423 // CHECK44-NEXT: ret i32 [[TMP15]]
9424 //
9425 //
9426 // CHECK44-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
9427 // CHECK44-SAME: (i32 [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
9428 // CHECK44-NEXT: entry:
9429 // CHECK44-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
9430 // CHECK44-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
9431 // CHECK44-NEXT: [[TE:%.*]] = alloca i32, align 4
9432 // CHECK44-NEXT: [[TH:%.*]] = alloca i32, align 4
9433 // CHECK44-NEXT: [[TMP:%.*]] = alloca i32, align 4
9434 // CHECK44-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9435 // CHECK44-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9436 // CHECK44-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9437 // CHECK44-NEXT: [[I:%.*]] = alloca i32, align 4
9438 // CHECK44-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9439 // CHECK44-NEXT: store i32 0, i32* [[TE]], align 4
9440 // CHECK44-NEXT: store i32 128, i32* [[TH]], align 4
9441 // CHECK44-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9442 // CHECK44-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9443 // CHECK44-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9444 // CHECK44-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
9445 // CHECK44-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9446 // CHECK44: omp.inner.for.cond:
9447 // CHECK44-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
9448 // CHECK44-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
9449 // CHECK44-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
9450 // CHECK44-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9451 // CHECK44: omp.inner.for.body:
9452 // CHECK44-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
9453 // CHECK44-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
9454 // CHECK44-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9455 // CHECK44-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
9456 // CHECK44-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
9457 // CHECK44-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]]
9458 // CHECK44-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !7
9459 // CHECK44-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9460 // CHECK44: omp.body.continue:
9461 // CHECK44-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9462 // CHECK44: omp.inner.for.inc:
9463 // CHECK44-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
9464 // CHECK44-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
9465 // CHECK44-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
9466 // CHECK44-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
9467 // CHECK44: omp.inner.for.end:
9468 // CHECK44-NEXT: store i32 10, i32* [[I]], align 4
9469 // CHECK44-NEXT: ret i32 0
9470 //
9471 //
9472 // CHECK45-LABEL: define {{[^@]+}}@main
9473 // CHECK45-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
9474 // CHECK45-NEXT: entry:
9475 // CHECK45-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
9476 // CHECK45-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
9477 // CHECK45-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
9478 // CHECK45-NEXT: [[N:%.*]] = alloca i32, align 4
9479 // CHECK45-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
9480 // CHECK45-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
9481 // CHECK45-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
9482 // CHECK45-NEXT: [[TMP:%.*]] = alloca i32, align 4
9483 // CHECK45-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9484 // CHECK45-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
9485 // CHECK45-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9486 // CHECK45-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9487 // CHECK45-NEXT: [[I:%.*]] = alloca i32, align 4
9488 // CHECK45-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9489 // CHECK45-NEXT: [[I4:%.*]] = alloca i32, align 4
9490 // CHECK45-NEXT: store i32 0, i32* [[RETVAL]], align 4
9491 // CHECK45-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9492 // CHECK45-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
9493 // CHECK45-NEXT: store i32 100, i32* [[N]], align 4
9494 // CHECK45-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
9495 // CHECK45-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
9496 // CHECK45-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
9497 // CHECK45-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
9498 // CHECK45-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
9499 // CHECK45-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
9500 // CHECK45-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
9501 // CHECK45-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP3]], 0
9502 // CHECK45-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
9503 // CHECK45-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
9504 // CHECK45-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4
9505 // CHECK45-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9506 // CHECK45-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9507 // CHECK45-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
9508 // CHECK45-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9509 // CHECK45-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
9510 // CHECK45-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
9511 // CHECK45-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9512 // CHECK45-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
9513 // CHECK45-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
9514 // CHECK45-NEXT: store i32 0, i32* [[I]], align 4
9515 // CHECK45-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9516 // CHECK45-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]
9517 // CHECK45-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
9518 // CHECK45: simd.if.then:
9519 // CHECK45-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9520 // CHECK45-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
9521 // CHECK45-NEXT: [[TMP9:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
9522 // CHECK45-NEXT: [[TOBOOL5:%.*]] = trunc i8 [[TMP9]] to i1
9523 // CHECK45-NEXT: br i1 [[TOBOOL5]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
9524 // CHECK45: omp_if.then:
9525 // CHECK45-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9526 // CHECK45: omp.inner.for.cond:
9527 // CHECK45-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
9528 // CHECK45-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
9529 // CHECK45-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
9530 // CHECK45-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9531 // CHECK45: omp.inner.for.body:
9532 // CHECK45-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
9533 // CHECK45-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
9534 // CHECK45-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9535 // CHECK45-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !2
9536 // CHECK45-NEXT: [[TMP13:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !2
9537 // CHECK45-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
9538 // CHECK45-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]]
9539 // CHECK45-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
9540 // CHECK45-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9541 // CHECK45: omp.body.continue:
9542 // CHECK45-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9543 // CHECK45: omp.inner.for.inc:
9544 // CHECK45-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
9545 // CHECK45-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP14]], 1
9546 // CHECK45-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
9547 // CHECK45-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
9548 // CHECK45: omp.inner.for.end:
9549 // CHECK45-NEXT: br label [[OMP_IF_END:%.*]]
9550 // CHECK45: omp_if.else:
9551 // CHECK45-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
9552 // CHECK45: omp.inner.for.cond8:
9553 // CHECK45-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9554 // CHECK45-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9555 // CHECK45-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
9556 // CHECK45-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
9557 // CHECK45: omp.inner.for.body10:
9558 // CHECK45-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9559 // CHECK45-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP17]], 1
9560 // CHECK45-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
9561 // CHECK45-NEXT: store i32 [[ADD12]], i32* [[I4]], align 4
9562 // CHECK45-NEXT: [[TMP18:%.*]] = load i32, i32* [[I4]], align 4
9563 // CHECK45-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP18]] to i64
9564 // CHECK45-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM13]]
9565 // CHECK45-NEXT: store i32 0, i32* [[ARRAYIDX14]], align 4
9566 // CHECK45-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
9567 // CHECK45: omp.body.continue15:
9568 // CHECK45-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
9569 // CHECK45: omp.inner.for.inc16:
9570 // CHECK45-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9571 // CHECK45-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP19]], 1
9572 // CHECK45-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
9573 // CHECK45-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP6:![0-9]+]]
9574 // CHECK45: omp.inner.for.end18:
9575 // CHECK45-NEXT: br label [[OMP_IF_END]]
9576 // CHECK45: omp_if.end:
9577 // CHECK45-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9578 // CHECK45-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP20]], 0
9579 // CHECK45-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
9580 // CHECK45-NEXT: [[MUL21:%.*]] = mul nsw i32 [[DIV20]], 1
9581 // CHECK45-NEXT: [[ADD22:%.*]] = add nsw i32 0, [[MUL21]]
9582 // CHECK45-NEXT: store i32 [[ADD22]], i32* [[I4]], align 4
9583 // CHECK45-NEXT: br label [[SIMD_IF_END]]
9584 // CHECK45: simd.if.end:
9585 // CHECK45-NEXT: [[TMP21:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
9586 // CHECK45-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP21]])
9587 // CHECK45-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
9588 // CHECK45-NEXT: [[TMP22:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
9589 // CHECK45-NEXT: call void @llvm.stackrestore(i8* [[TMP22]])
9590 // CHECK45-NEXT: [[TMP23:%.*]] = load i32, i32* [[RETVAL]], align 4
9591 // CHECK45-NEXT: ret i32 [[TMP23]]
9592 //
9593 //
9594 // CHECK45-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
9595 // CHECK45-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
9596 // CHECK45-NEXT: entry:
9597 // CHECK45-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
9598 // CHECK45-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
9599 // CHECK45-NEXT: [[TE:%.*]] = alloca i32, align 4
9600 // CHECK45-NEXT: [[TH:%.*]] = alloca i32, align 4
9601 // CHECK45-NEXT: [[TMP:%.*]] = alloca i32, align 4
9602 // CHECK45-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9603 // CHECK45-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9604 // CHECK45-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9605 // CHECK45-NEXT: [[I:%.*]] = alloca i32, align 4
9606 // CHECK45-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9607 // CHECK45-NEXT: store i32 0, i32* [[TE]], align 4
9608 // CHECK45-NEXT: store i32 128, i32* [[TH]], align 4
9609 // CHECK45-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9610 // CHECK45-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9611 // CHECK45-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9612 // CHECK45-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
9613 // CHECK45-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9614 // CHECK45: omp.inner.for.cond:
9615 // CHECK45-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
9616 // CHECK45-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !8
9617 // CHECK45-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
9618 // CHECK45-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9619 // CHECK45: omp.inner.for.body:
9620 // CHECK45-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
9621 // CHECK45-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
9622 // CHECK45-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9623 // CHECK45-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !8
9624 // CHECK45-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !8
9625 // CHECK45-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
9626 // CHECK45-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
9627 // CHECK45-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !8
9628 // CHECK45-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9629 // CHECK45: omp.body.continue:
9630 // CHECK45-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9631 // CHECK45: omp.inner.for.inc:
9632 // CHECK45-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
9633 // CHECK45-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
9634 // CHECK45-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
9635 // CHECK45-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
9636 // CHECK45: omp.inner.for.end:
9637 // CHECK45-NEXT: store i32 10, i32* [[I]], align 4
9638 // CHECK45-NEXT: ret i32 0
9639 //
9640 //
9641 // CHECK46-LABEL: define {{[^@]+}}@main
9642 // CHECK46-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
9643 // CHECK46-NEXT: entry:
9644 // CHECK46-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
9645 // CHECK46-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
9646 // CHECK46-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
9647 // CHECK46-NEXT: [[N:%.*]] = alloca i32, align 4
9648 // CHECK46-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
9649 // CHECK46-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
9650 // CHECK46-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
9651 // CHECK46-NEXT: [[TMP:%.*]] = alloca i32, align 4
9652 // CHECK46-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9653 // CHECK46-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
9654 // CHECK46-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9655 // CHECK46-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9656 // CHECK46-NEXT: [[I:%.*]] = alloca i32, align 4
9657 // CHECK46-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9658 // CHECK46-NEXT: [[I4:%.*]] = alloca i32, align 4
9659 // CHECK46-NEXT: store i32 0, i32* [[RETVAL]], align 4
9660 // CHECK46-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9661 // CHECK46-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
9662 // CHECK46-NEXT: store i32 100, i32* [[N]], align 4
9663 // CHECK46-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
9664 // CHECK46-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
9665 // CHECK46-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
9666 // CHECK46-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
9667 // CHECK46-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
9668 // CHECK46-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
9669 // CHECK46-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
9670 // CHECK46-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP3]], 0
9671 // CHECK46-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
9672 // CHECK46-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
9673 // CHECK46-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4
9674 // CHECK46-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9675 // CHECK46-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9676 // CHECK46-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
9677 // CHECK46-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9678 // CHECK46-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
9679 // CHECK46-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
9680 // CHECK46-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9681 // CHECK46-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
9682 // CHECK46-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
9683 // CHECK46-NEXT: store i32 0, i32* [[I]], align 4
9684 // CHECK46-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9685 // CHECK46-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]
9686 // CHECK46-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
9687 // CHECK46: simd.if.then:
9688 // CHECK46-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9689 // CHECK46-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
9690 // CHECK46-NEXT: [[TMP9:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
9691 // CHECK46-NEXT: [[TOBOOL5:%.*]] = trunc i8 [[TMP9]] to i1
9692 // CHECK46-NEXT: br i1 [[TOBOOL5]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
9693 // CHECK46: omp_if.then:
9694 // CHECK46-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9695 // CHECK46: omp.inner.for.cond:
9696 // CHECK46-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
9697 // CHECK46-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
9698 // CHECK46-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
9699 // CHECK46-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9700 // CHECK46: omp.inner.for.body:
9701 // CHECK46-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
9702 // CHECK46-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
9703 // CHECK46-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9704 // CHECK46-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !2
9705 // CHECK46-NEXT: [[TMP13:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !2
9706 // CHECK46-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
9707 // CHECK46-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]]
9708 // CHECK46-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
9709 // CHECK46-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9710 // CHECK46: omp.body.continue:
9711 // CHECK46-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9712 // CHECK46: omp.inner.for.inc:
9713 // CHECK46-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
9714 // CHECK46-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP14]], 1
9715 // CHECK46-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
9716 // CHECK46-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
9717 // CHECK46: omp.inner.for.end:
9718 // CHECK46-NEXT: br label [[OMP_IF_END:%.*]]
9719 // CHECK46: omp_if.else:
9720 // CHECK46-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
9721 // CHECK46: omp.inner.for.cond8:
9722 // CHECK46-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9723 // CHECK46-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9724 // CHECK46-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
9725 // CHECK46-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
9726 // CHECK46: omp.inner.for.body10:
9727 // CHECK46-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9728 // CHECK46-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP17]], 1
9729 // CHECK46-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
9730 // CHECK46-NEXT: store i32 [[ADD12]], i32* [[I4]], align 4
9731 // CHECK46-NEXT: [[TMP18:%.*]] = load i32, i32* [[I4]], align 4
9732 // CHECK46-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP18]] to i64
9733 // CHECK46-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM13]]
9734 // CHECK46-NEXT: store i32 0, i32* [[ARRAYIDX14]], align 4
9735 // CHECK46-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
9736 // CHECK46: omp.body.continue15:
9737 // CHECK46-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
9738 // CHECK46: omp.inner.for.inc16:
9739 // CHECK46-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9740 // CHECK46-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP19]], 1
9741 // CHECK46-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
9742 // CHECK46-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP6:![0-9]+]]
9743 // CHECK46: omp.inner.for.end18:
9744 // CHECK46-NEXT: br label [[OMP_IF_END]]
9745 // CHECK46: omp_if.end:
9746 // CHECK46-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9747 // CHECK46-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP20]], 0
9748 // CHECK46-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
9749 // CHECK46-NEXT: [[MUL21:%.*]] = mul nsw i32 [[DIV20]], 1
9750 // CHECK46-NEXT: [[ADD22:%.*]] = add nsw i32 0, [[MUL21]]
9751 // CHECK46-NEXT: store i32 [[ADD22]], i32* [[I4]], align 4
9752 // CHECK46-NEXT: br label [[SIMD_IF_END]]
9753 // CHECK46: simd.if.end:
9754 // CHECK46-NEXT: [[TMP21:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
9755 // CHECK46-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP21]])
9756 // CHECK46-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
9757 // CHECK46-NEXT: [[TMP22:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
9758 // CHECK46-NEXT: call void @llvm.stackrestore(i8* [[TMP22]])
9759 // CHECK46-NEXT: [[TMP23:%.*]] = load i32, i32* [[RETVAL]], align 4
9760 // CHECK46-NEXT: ret i32 [[TMP23]]
9761 //
9762 //
9763 // CHECK46-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
9764 // CHECK46-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
9765 // CHECK46-NEXT: entry:
9766 // CHECK46-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
9767 // CHECK46-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
9768 // CHECK46-NEXT: [[TE:%.*]] = alloca i32, align 4
9769 // CHECK46-NEXT: [[TH:%.*]] = alloca i32, align 4
9770 // CHECK46-NEXT: [[TMP:%.*]] = alloca i32, align 4
9771 // CHECK46-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9772 // CHECK46-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9773 // CHECK46-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9774 // CHECK46-NEXT: [[I:%.*]] = alloca i32, align 4
9775 // CHECK46-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9776 // CHECK46-NEXT: store i32 0, i32* [[TE]], align 4
9777 // CHECK46-NEXT: store i32 128, i32* [[TH]], align 4
9778 // CHECK46-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9779 // CHECK46-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9780 // CHECK46-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9781 // CHECK46-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
9782 // CHECK46-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9783 // CHECK46: omp.inner.for.cond:
9784 // CHECK46-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
9785 // CHECK46-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !8
9786 // CHECK46-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
9787 // CHECK46-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9788 // CHECK46: omp.inner.for.body:
9789 // CHECK46-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
9790 // CHECK46-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
9791 // CHECK46-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9792 // CHECK46-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !8
9793 // CHECK46-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !8
9794 // CHECK46-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
9795 // CHECK46-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
9796 // CHECK46-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !8
9797 // CHECK46-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9798 // CHECK46: omp.body.continue:
9799 // CHECK46-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9800 // CHECK46: omp.inner.for.inc:
9801 // CHECK46-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
9802 // CHECK46-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
9803 // CHECK46-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
9804 // CHECK46-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
9805 // CHECK46: omp.inner.for.end:
9806 // CHECK46-NEXT: store i32 10, i32* [[I]], align 4
9807 // CHECK46-NEXT: ret i32 0
9808 //
9809 //
9810 // CHECK47-LABEL: define {{[^@]+}}@main
9811 // CHECK47-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
9812 // CHECK47-NEXT: entry:
9813 // CHECK47-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
9814 // CHECK47-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
9815 // CHECK47-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
9816 // CHECK47-NEXT: [[N:%.*]] = alloca i32, align 4
9817 // CHECK47-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
9818 // CHECK47-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
9819 // CHECK47-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
9820 // CHECK47-NEXT: [[TMP:%.*]] = alloca i32, align 4
9821 // CHECK47-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9822 // CHECK47-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
9823 // CHECK47-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9824 // CHECK47-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9825 // CHECK47-NEXT: [[I:%.*]] = alloca i32, align 4
9826 // CHECK47-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9827 // CHECK47-NEXT: [[I4:%.*]] = alloca i32, align 4
9828 // CHECK47-NEXT: store i32 0, i32* [[RETVAL]], align 4
9829 // CHECK47-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9830 // CHECK47-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
9831 // CHECK47-NEXT: store i32 100, i32* [[N]], align 4
9832 // CHECK47-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
9833 // CHECK47-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
9834 // CHECK47-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
9835 // CHECK47-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
9836 // CHECK47-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
9837 // CHECK47-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
9838 // CHECK47-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
9839 // CHECK47-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
9840 // CHECK47-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
9841 // CHECK47-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
9842 // CHECK47-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9843 // CHECK47-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9844 // CHECK47-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
9845 // CHECK47-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9846 // CHECK47-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
9847 // CHECK47-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
9848 // CHECK47-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9849 // CHECK47-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
9850 // CHECK47-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
9851 // CHECK47-NEXT: store i32 0, i32* [[I]], align 4
9852 // CHECK47-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9853 // CHECK47-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
9854 // CHECK47-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
9855 // CHECK47: simd.if.then:
9856 // CHECK47-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9857 // CHECK47-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
9858 // CHECK47-NEXT: [[TMP8:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
9859 // CHECK47-NEXT: [[TOBOOL5:%.*]] = trunc i8 [[TMP8]] to i1
9860 // CHECK47-NEXT: br i1 [[TOBOOL5]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
9861 // CHECK47: omp_if.then:
9862 // CHECK47-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9863 // CHECK47: omp.inner.for.cond:
9864 // CHECK47-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
9865 // CHECK47-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
9866 // CHECK47-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
9867 // CHECK47-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9868 // CHECK47: omp.inner.for.body:
9869 // CHECK47-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
9870 // CHECK47-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
9871 // CHECK47-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9872 // CHECK47-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !3
9873 // CHECK47-NEXT: [[TMP12:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !3
9874 // CHECK47-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP12]]
9875 // CHECK47-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
9876 // CHECK47-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9877 // CHECK47: omp.body.continue:
9878 // CHECK47-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9879 // CHECK47: omp.inner.for.inc:
9880 // CHECK47-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
9881 // CHECK47-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP13]], 1
9882 // CHECK47-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
9883 // CHECK47-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
9884 // CHECK47: omp.inner.for.end:
9885 // CHECK47-NEXT: br label [[OMP_IF_END:%.*]]
9886 // CHECK47: omp_if.else:
9887 // CHECK47-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
9888 // CHECK47: omp.inner.for.cond8:
9889 // CHECK47-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9890 // CHECK47-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9891 // CHECK47-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
9892 // CHECK47-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
9893 // CHECK47: omp.inner.for.body10:
9894 // CHECK47-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9895 // CHECK47-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP16]], 1
9896 // CHECK47-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
9897 // CHECK47-NEXT: store i32 [[ADD12]], i32* [[I4]], align 4
9898 // CHECK47-NEXT: [[TMP17:%.*]] = load i32, i32* [[I4]], align 4
9899 // CHECK47-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP17]]
9900 // CHECK47-NEXT: store i32 0, i32* [[ARRAYIDX13]], align 4
9901 // CHECK47-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]]
9902 // CHECK47: omp.body.continue14:
9903 // CHECK47-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]]
9904 // CHECK47: omp.inner.for.inc15:
9905 // CHECK47-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9906 // CHECK47-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP18]], 1
9907 // CHECK47-NEXT: store i32 [[ADD16]], i32* [[DOTOMP_IV]], align 4
9908 // CHECK47-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]]
9909 // CHECK47: omp.inner.for.end17:
9910 // CHECK47-NEXT: br label [[OMP_IF_END]]
9911 // CHECK47: omp_if.end:
9912 // CHECK47-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9913 // CHECK47-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP19]], 0
9914 // CHECK47-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
9915 // CHECK47-NEXT: [[MUL20:%.*]] = mul nsw i32 [[DIV19]], 1
9916 // CHECK47-NEXT: [[ADD21:%.*]] = add nsw i32 0, [[MUL20]]
9917 // CHECK47-NEXT: store i32 [[ADD21]], i32* [[I4]], align 4
9918 // CHECK47-NEXT: br label [[SIMD_IF_END]]
9919 // CHECK47: simd.if.end:
9920 // CHECK47-NEXT: [[TMP20:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
9921 // CHECK47-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP20]])
9922 // CHECK47-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
9923 // CHECK47-NEXT: [[TMP21:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
9924 // CHECK47-NEXT: call void @llvm.stackrestore(i8* [[TMP21]])
9925 // CHECK47-NEXT: [[TMP22:%.*]] = load i32, i32* [[RETVAL]], align 4
9926 // CHECK47-NEXT: ret i32 [[TMP22]]
9927 //
9928 //
9929 // CHECK47-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
9930 // CHECK47-SAME: (i32 [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
9931 // CHECK47-NEXT: entry:
9932 // CHECK47-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
9933 // CHECK47-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
9934 // CHECK47-NEXT: [[TE:%.*]] = alloca i32, align 4
9935 // CHECK47-NEXT: [[TH:%.*]] = alloca i32, align 4
9936 // CHECK47-NEXT: [[TMP:%.*]] = alloca i32, align 4
9937 // CHECK47-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9938 // CHECK47-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9939 // CHECK47-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9940 // CHECK47-NEXT: [[I:%.*]] = alloca i32, align 4
9941 // CHECK47-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9942 // CHECK47-NEXT: store i32 0, i32* [[TE]], align 4
9943 // CHECK47-NEXT: store i32 128, i32* [[TH]], align 4
9944 // CHECK47-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9945 // CHECK47-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9946 // CHECK47-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9947 // CHECK47-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
9948 // CHECK47-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9949 // CHECK47: omp.inner.for.cond:
9950 // CHECK47-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
9951 // CHECK47-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
9952 // CHECK47-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
9953 // CHECK47-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9954 // CHECK47: omp.inner.for.body:
9955 // CHECK47-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
9956 // CHECK47-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
9957 // CHECK47-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9958 // CHECK47-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9
9959 // CHECK47-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9
9960 // CHECK47-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]]
9961 // CHECK47-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9
9962 // CHECK47-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9963 // CHECK47: omp.body.continue:
9964 // CHECK47-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9965 // CHECK47: omp.inner.for.inc:
9966 // CHECK47-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
9967 // CHECK47-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
9968 // CHECK47-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
9969 // CHECK47-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
9970 // CHECK47: omp.inner.for.end:
9971 // CHECK47-NEXT: store i32 10, i32* [[I]], align 4
9972 // CHECK47-NEXT: ret i32 0
9973 //
9974 //
9975 // CHECK48-LABEL: define {{[^@]+}}@main
9976 // CHECK48-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
9977 // CHECK48-NEXT: entry:
9978 // CHECK48-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
9979 // CHECK48-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
9980 // CHECK48-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
9981 // CHECK48-NEXT: [[N:%.*]] = alloca i32, align 4
9982 // CHECK48-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
9983 // CHECK48-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
9984 // CHECK48-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
9985 // CHECK48-NEXT: [[TMP:%.*]] = alloca i32, align 4
9986 // CHECK48-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9987 // CHECK48-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
9988 // CHECK48-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9989 // CHECK48-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9990 // CHECK48-NEXT: [[I:%.*]] = alloca i32, align 4
9991 // CHECK48-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9992 // CHECK48-NEXT: [[I4:%.*]] = alloca i32, align 4
9993 // CHECK48-NEXT: store i32 0, i32* [[RETVAL]], align 4
9994 // CHECK48-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9995 // CHECK48-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
9996 // CHECK48-NEXT: store i32 100, i32* [[N]], align 4
9997 // CHECK48-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
9998 // CHECK48-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
9999 // CHECK48-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
10000 // CHECK48-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
10001 // CHECK48-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
10002 // CHECK48-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
10003 // CHECK48-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0
10004 // CHECK48-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
10005 // CHECK48-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
10006 // CHECK48-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
10007 // CHECK48-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10008 // CHECK48-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10009 // CHECK48-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10010 // CHECK48-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10011 // CHECK48-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
10012 // CHECK48-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
10013 // CHECK48-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10014 // CHECK48-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10015 // CHECK48-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
10016 // CHECK48-NEXT: store i32 0, i32* [[I]], align 4
10017 // CHECK48-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10018 // CHECK48-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
10019 // CHECK48-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
10020 // CHECK48: simd.if.then:
10021 // CHECK48-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10022 // CHECK48-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
10023 // CHECK48-NEXT: [[TMP8:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
10024 // CHECK48-NEXT: [[TOBOOL5:%.*]] = trunc i8 [[TMP8]] to i1
10025 // CHECK48-NEXT: br i1 [[TOBOOL5]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
10026 // CHECK48: omp_if.then:
10027 // CHECK48-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10028 // CHECK48: omp.inner.for.cond:
10029 // CHECK48-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
10030 // CHECK48-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
10031 // CHECK48-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
10032 // CHECK48-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10033 // CHECK48: omp.inner.for.body:
10034 // CHECK48-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
10035 // CHECK48-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
10036 // CHECK48-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10037 // CHECK48-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !3
10038 // CHECK48-NEXT: [[TMP12:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !3
10039 // CHECK48-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP12]]
10040 // CHECK48-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
10041 // CHECK48-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10042 // CHECK48: omp.body.continue:
10043 // CHECK48-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10044 // CHECK48: omp.inner.for.inc:
10045 // CHECK48-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
10046 // CHECK48-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP13]], 1
10047 // CHECK48-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
10048 // CHECK48-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
10049 // CHECK48: omp.inner.for.end:
10050 // CHECK48-NEXT: br label [[OMP_IF_END:%.*]]
10051 // CHECK48: omp_if.else:
10052 // CHECK48-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
10053 // CHECK48: omp.inner.for.cond8:
10054 // CHECK48-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10055 // CHECK48-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10056 // CHECK48-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
10057 // CHECK48-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
10058 // CHECK48: omp.inner.for.body10:
10059 // CHECK48-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10060 // CHECK48-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP16]], 1
10061 // CHECK48-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
10062 // CHECK48-NEXT: store i32 [[ADD12]], i32* [[I4]], align 4
10063 // CHECK48-NEXT: [[TMP17:%.*]] = load i32, i32* [[I4]], align 4
10064 // CHECK48-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP17]]
10065 // CHECK48-NEXT: store i32 0, i32* [[ARRAYIDX13]], align 4
10066 // CHECK48-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]]
10067 // CHECK48: omp.body.continue14:
10068 // CHECK48-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]]
10069 // CHECK48: omp.inner.for.inc15:
10070 // CHECK48-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10071 // CHECK48-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP18]], 1
10072 // CHECK48-NEXT: store i32 [[ADD16]], i32* [[DOTOMP_IV]], align 4
10073 // CHECK48-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]]
10074 // CHECK48: omp.inner.for.end17:
10075 // CHECK48-NEXT: br label [[OMP_IF_END]]
10076 // CHECK48: omp_if.end:
10077 // CHECK48-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10078 // CHECK48-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP19]], 0
10079 // CHECK48-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
10080 // CHECK48-NEXT: [[MUL20:%.*]] = mul nsw i32 [[DIV19]], 1
10081 // CHECK48-NEXT: [[ADD21:%.*]] = add nsw i32 0, [[MUL20]]
10082 // CHECK48-NEXT: store i32 [[ADD21]], i32* [[I4]], align 4
10083 // CHECK48-NEXT: br label [[SIMD_IF_END]]
10084 // CHECK48: simd.if.end:
10085 // CHECK48-NEXT: [[TMP20:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
10086 // CHECK48-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP20]])
10087 // CHECK48-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
10088 // CHECK48-NEXT: [[TMP21:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
10089 // CHECK48-NEXT: call void @llvm.stackrestore(i8* [[TMP21]])
10090 // CHECK48-NEXT: [[TMP22:%.*]] = load i32, i32* [[RETVAL]], align 4
10091 // CHECK48-NEXT: ret i32 [[TMP22]]
10092 //
10093 //
10094 // CHECK48-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
10095 // CHECK48-SAME: (i32 [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
10096 // CHECK48-NEXT: entry:
10097 // CHECK48-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
10098 // CHECK48-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
10099 // CHECK48-NEXT: [[TE:%.*]] = alloca i32, align 4
10100 // CHECK48-NEXT: [[TH:%.*]] = alloca i32, align 4
10101 // CHECK48-NEXT: [[TMP:%.*]] = alloca i32, align 4
10102 // CHECK48-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10103 // CHECK48-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10104 // CHECK48-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10105 // CHECK48-NEXT: [[I:%.*]] = alloca i32, align 4
10106 // CHECK48-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
10107 // CHECK48-NEXT: store i32 0, i32* [[TE]], align 4
10108 // CHECK48-NEXT: store i32 128, i32* [[TH]], align 4
10109 // CHECK48-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10110 // CHECK48-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
10111 // CHECK48-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10112 // CHECK48-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
10113 // CHECK48-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10114 // CHECK48: omp.inner.for.cond:
10115 // CHECK48-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
10116 // CHECK48-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
10117 // CHECK48-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
10118 // CHECK48-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10119 // CHECK48: omp.inner.for.body:
10120 // CHECK48-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
10121 // CHECK48-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
10122 // CHECK48-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10123 // CHECK48-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9
10124 // CHECK48-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9
10125 // CHECK48-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]]
10126 // CHECK48-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9
10127 // CHECK48-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10128 // CHECK48: omp.body.continue:
10129 // CHECK48-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10130 // CHECK48: omp.inner.for.inc:
10131 // CHECK48-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
10132 // CHECK48-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
10133 // CHECK48-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
10134 // CHECK48-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
10135 // CHECK48: omp.inner.for.end:
10136 // CHECK48-NEXT: store i32 10, i32* [[I]], align 4
10137 // CHECK48-NEXT: ret i32 0
10138 //
10139