1/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
2   Copyright (C) 2012-2020 Free Software Foundation, Inc.
3   Contributed by Andes Technology Corporation.
4
5   This file is part of GCC.
6
7   GCC is free software; you can redistribute it and/or modify it
8   under the terms of the GNU General Public License as published
9   by the Free Software Foundation; either version 3, or (at your
10   option) any later version.
11
12   GCC is distributed in the hope that it will be useful, but WITHOUT
13   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
15   License for more details.
16
17   Under Section 7 of GPL version 3, you are granted additional
18   permissions described in the GCC Runtime Library Exception, version
19   3.1, as published by the Free Software Foundation.
20
21   You should have received a copy of the GNU General Public License and
22   a copy of the GCC Runtime Library Exception along with this program;
23   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
24   <http://www.gnu.org/licenses/>.  */
25
26#if __NDS32_ISR_VECTOR_SIZE_4__
27
28/* If vector size is 4-byte, we have to save registers
29   in the macro implementation.  */
30.macro SAVE_PARTIAL
31#if __NDS32_REDUCED_REGS__ || __NDS32_REDUCE_REGS
32	smw.adm $r15, [$sp], $r15, #0x2
33#else
34	smw.adm $r15, [$sp], $r27, #0x2
35#endif
36	smw.adm $r0, [$sp], $r5, #0x0
37  SAVE_USR_REGS
38  SAVE_MAC_REGS
39  SAVE_FPU_REGS
40#if defined(NDS32_NESTED) || defined(NDS32_NESTED_READY)
41       mfsr    $r1, $IPC       /* Get IPC.  */
42       mfsr    $r2, $IPSW      /* Get IPSW.  */
43       smw.adm $r1, [$sp], $r2, #0x0   /* Push IPC, IPSW.  */
44#endif
45	mfsr	$r0, $ITYPE	/* Get VID to $r0.  */
46	srli	$r0, $r0, #5
47	andi	$r0, $r0, #127
48.endm
49
50#else /* not __NDS32_ISR_VECTOR_SIZE_4__ */
51
52/* If vector size is 16-byte, some works can be done in
53   the vector section generated by compiler, so that we
54   can implement less in the macro.  */
55
56.macro SAVE_PARTIAL
57  SAVE_USR_REGS
58  SAVE_MAC_REGS
59  SAVE_FPU_REGS
60#if defined(NDS32_NESTED) || defined(NDS32_NESTED_READY)
61       mfsr    $r1, $IPC       /* Get IPC.  */
62       mfsr    $r2, $IPSW      /* Get IPSW.  */
63       smw.adm $r1, [$sp], $r2, #0x0   /* Push IPC, IPSW.  */
64#endif
65.endm
66
67#endif /* not __NDS32_ISR_VECTOR_SIZE_4__ */
68