1 /* Copyright (C) 2008-2020 Free Software Foundation, Inc.
2 Contributed by Richard Henderson <rth@redhat.com>.
3
4 This file is part of the GNU Transactional Memory Library (libitm).
5
6 Libitm is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 Libitm is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
13 FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 Under Section 7 of GPL version 3, you are granted additional
17 permissions described in the GCC Runtime Library Exception, version
18 3.1, as published by the Free Software Foundation.
19
20 You should have received a copy of the GNU General Public License and
21 a copy of the GCC Runtime Library Exception along with this program;
22 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
23 <http://www.gnu.org/licenses/>. */
24
25 #ifndef LIBITM_X86_TLS_H
26 #define LIBITM_X86_TLS_H 1
27
28 #if defined(__GLIBC_PREREQ)
29 #if __GLIBC_PREREQ(2, 10)
30 /* Use slots in the TCB head rather than __thread lookups.
31 GLIBC has reserved words 10 through 13 for TM. */
32 #define HAVE_ARCH_GTM_THREAD 1
33 #define HAVE_ARCH_GTM_THREAD_DISP 1
34 #endif
35 #endif
36
37 #include "config/generic/tls.h"
38
39 #if defined(__GLIBC_PREREQ)
40 #if __GLIBC_PREREQ(2, 10)
41 namespace GTM HIDDEN {
42
43 #ifdef __x86_64__
44 #ifdef __LP64__
45 # define SEG_READ(OFS) "movq\t%%fs:(80+" #OFS "*8),%0"
46 # define SEG_WRITE(OFS) "movq\t%0,%%fs:(80+" #OFS "*8)"
47 # define SEG_DECODE_READ(OFS) SEG_READ(OFS) "\n\t" \
48 "rorq\t$17,%0\n\t" \
49 "xorq\t%%fs:48,%0"
50 # define SEG_ENCODE_WRITE(OFS) "xorq\t%%fs:48,%0\n\t" \
51 "rolq\t$17,%0\n\t" \
52 SEG_WRITE(OFS)
53 #else
54 // For X32.
55 # define SEG_READ(OFS) "movl\t%%fs:(48+" #OFS "*4),%0"
56 # define SEG_WRITE(OFS) "movl\t%0,%%fs:(48+" #OFS "*4)"
57 # define SEG_DECODE_READ(OFS) SEG_READ(OFS) "\n\t" \
58 "rorl\t$9,%0\n\t" \
59 "xorl\t%%fs:28,%0"
60 # define SEG_ENCODE_WRITE(OFS) "xorl\t%%fs:28,%0\n\t" \
61 "roll\t$9,%0\n\t" \
62 SEG_WRITE(OFS)
63 #endif
64 #else
65 # define SEG_READ(OFS) "movl\t%%gs:(36+" #OFS "*4),%0"
66 # define SEG_WRITE(OFS) "movl\t%0,%%gs:(36+" #OFS "*4)"
67 # define SEG_DECODE_READ(OFS) SEG_READ(OFS) "\n\t" \
68 "rorl\t$9,%0\n\t" \
69 "xorl\t%%gs:24,%0"
70 # define SEG_ENCODE_WRITE(OFS) "xorl\t%%gs:24,%0\n\t" \
71 "roll\t$9,%0\n\t" \
72 SEG_WRITE(OFS)
73 #endif
74
gtm_thr(void)75 static inline struct gtm_thread *gtm_thr(void)
76 {
77 struct gtm_thread *r;
78 asm volatile (SEG_READ(0) : "=r"(r));
79 return r;
80 }
81
set_gtm_thr(struct gtm_thread * x)82 static inline void set_gtm_thr(struct gtm_thread *x)
83 {
84 asm volatile (SEG_WRITE(0) : : "r"(x));
85 }
86
abi_disp(void)87 static inline struct abi_dispatch *abi_disp(void)
88 {
89 struct abi_dispatch *r;
90 asm volatile (SEG_DECODE_READ(1) : "=r"(r));
91 return r;
92 }
93
set_abi_disp(struct abi_dispatch * x)94 static inline void set_abi_disp(struct abi_dispatch *x)
95 {
96 void *scratch;
97 asm volatile (SEG_ENCODE_WRITE(1) : "=r"(scratch) : "0"(x));
98 }
99
100 #undef SEG_READ
101 #undef SEG_WRITE
102 #undef SEG_DECODE_READ
103 #undef SEG_ENCODE_WRITE
104
105 } // namespace GTM
106 #endif /* >= GLIBC 2.10 */
107 #endif
108
109 #endif // LIBITM_X86_TLS_H
110