1 /* { dg-do compile } */ 2 /* { dg-options "-march=k8-sse3" { target i?86-*-* x86_64-*-* } } */ 3 4 struct alu_bank_swizzle { 5 int hw_gpr[3][4]; 6 int hw_cfile_addr[4]; 7 }; 8 void check_vector (struct alu_bank_swizzle *); init_bank_swizzle(struct alu_bank_swizzle * bs)9static void init_bank_swizzle(struct alu_bank_swizzle *bs) 10 { 11 int i, cycle, component; 12 for (cycle = 0; cycle < 3; cycle++) 13 for (component = 0; component < 4; component++) 14 bs->hw_gpr[cycle][component] = -1; 15 for (i = 0; i < 4; i++) 16 bs->hw_cfile_addr[i] = -1; 17 } check_and_set_bank_swizzle(int max_slots,int * slots)18int check_and_set_bank_swizzle(int max_slots, int *slots) 19 { 20 struct alu_bank_swizzle bs; 21 int i; 22 for (i = 0; i < max_slots; i++) 23 { 24 init_bank_swizzle(&bs); 25 if (slots[i]) 26 check_vector(&bs); 27 } 28 } 29 30