1/* Definitions of target machine for GCC for IA-32.
2   Copyright (C) 2002-2021 Free Software Foundation, Inc.
3
4This file is part of GCC.
5
6GCC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 3, or (at your option)
9any later version.
10
11GCC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GCC; see the file COPYING3.  If not see
18<http://www.gnu.org/licenses/>.  */
19
20/* The x86_64 ABI specifies both XF and TF modes.
21   XFmode is __float80 is IEEE extended; TFmode is __float128
22   is IEEE quad.  */
23
24FRACTIONAL_FLOAT_MODE (XF, 80, 12, ieee_extended_intel_96_format);
25FLOAT_MODE (TF, 16, ieee_quad_format);
26FLOAT_MODE (HF, 2, ieee_half_format);
27
28/* In ILP32 mode, XFmode has size 12 and alignment 4.
29   In LP64 mode, XFmode has size and alignment 16.  */
30ADJUST_FLOAT_FORMAT (XF, (TARGET_128BIT_LONG_DOUBLE
31			  ? &ieee_extended_intel_128_format
32			  : TARGET_96_ROUND_53_LONG_DOUBLE
33			  ? &ieee_extended_intel_96_round_53_format
34			  : &ieee_extended_intel_96_format));
35ADJUST_BYTESIZE  (XF, TARGET_128BIT_LONG_DOUBLE ? 16 : 12);
36ADJUST_ALIGNMENT (XF, TARGET_128BIT_LONG_DOUBLE ? 16 : 4);
37
38/* Add any extra modes needed to represent the condition code.
39
40   For the i386, we need separate modes when floating-point
41   equality comparisons are being done.
42
43   Add CCNO to indicate comparisons against zero that require
44   Overflow flag to be unset.  Sign bit test is used instead and
45   thus can be used to form "a&b>0" type of tests.
46
47   Add CCGC to indicate comparisons against zero that allow
48   unspecified garbage in the Carry flag.  This mode is used
49   by inc/dec instructions.
50
51   Add CCGOC to indicate comparisons against zero that allow
52   unspecified garbage in the Carry and Overflow flag. This
53   mode is used to simulate comparisons of (a-b) and (a+b)
54   against zero using sub/cmp/add operations.
55
56   Add CCGZ to indicate comparisons that allow unspecified garbage
57   in the Zero flag.  This mode is used in double-word comparisons.
58
59   Add CCA to indicate that only the Above flag is valid.
60   Add CCC to indicate that only the Carry flag is valid.
61   Add CCO to indicate that only the Overflow flag is valid.
62   Add CCP to indicate that only the Parity flag is valid.
63   Add CCS to indicate that only the Sign flag is valid.
64   Add CCZ to indicate that only the Zero flag is valid.  */
65
66CC_MODE (CCGC);
67CC_MODE (CCGOC);
68CC_MODE (CCNO);
69CC_MODE (CCGZ);
70CC_MODE (CCA);
71CC_MODE (CCC);
72CC_MODE (CCO);
73CC_MODE (CCP);
74CC_MODE (CCS);
75CC_MODE (CCZ);
76
77CC_MODE (CCFP);
78
79/* Vector modes.  Note that VEC_CONCAT patterns require vector
80   sizes twice as big as implemented in hardware.  */
81VECTOR_MODES (INT, 4);        /*              V4QI V2HI */
82VECTOR_MODES (INT, 8);        /*         V8QI V4HI V2SI */
83VECTOR_MODES (INT, 16);       /*   V16QI V8HI V4SI V2DI */
84VECTOR_MODES (INT, 32);       /*  V32QI V16HI V8SI V4DI */
85VECTOR_MODES (INT, 64);       /* V64QI V32HI V16SI V8DI */
86VECTOR_MODES (INT, 128);      /* V128QI V64HI V32SI V16DI */
87VECTOR_MODES (FLOAT, 8);      /*              V4HF V2SF */
88VECTOR_MODES (FLOAT, 16);     /*         V8HF V4SF V2DF */
89VECTOR_MODES (FLOAT, 32);     /*   V16HF V8SF V4DF V2TF */
90VECTOR_MODES (FLOAT, 64);     /*  V32HF V16SF V8DF V4TF */
91VECTOR_MODES (FLOAT, 128);    /* V64HF V32SF V16DF V8TF */
92VECTOR_MODES (FLOAT, 256);    /* V128HF V64SF V32DF V16TF */
93VECTOR_MODE (FLOAT, HF, 2);   /* 	      	   V2HF */
94VECTOR_MODE (FLOAT, HF, 6);   /*		   V6HF */
95VECTOR_MODE (INT, TI, 1);     /*                   V1TI */
96VECTOR_MODE (INT, DI, 1);     /*                   V1DI */
97VECTOR_MODE (INT, SI, 1);     /*                   V1SI */
98VECTOR_MODE (INT, QI, 2);     /*                   V2QI */
99VECTOR_MODE (INT, QI, 12);    /*                  V12QI */
100VECTOR_MODE (INT, QI, 14);    /*                  V14QI */
101VECTOR_MODE (INT, HI, 6);     /*                   V6HI */
102VECTOR_MODE (INT, SI, 64);    /* 		  V64SI */
103
104INT_MODE (OI, 32);
105INT_MODE (XI, 64);
106
107/* Modes needs a consecutive register pair.
108   Note that Using PARTIAL_INT_MODE but not INT_MODE is to avoid mode promotion
109   issues.  */
110PARTIAL_INT_MODE (HI, 16, P2QI);
111PARTIAL_INT_MODE (SI, 32, P2HI);
112
113/* Mode used for signed overflow checking of TImode.  For the overflow
114   checking we actually need just 1 or 2 bits beyond TImode precision.
115   Use 160 bits to have a multiple of 32.  */
116PARTIAL_INT_MODE (OI, 160, POI);
117
118/* The symbol Pmode stands for one of the above machine modes (usually SImode).
119   The tm.h file specifies which one.  It is not a distinct mode.  */
120