1; Options for the SPARC port of the compiler 2; 3; Copyright (C) 2005-2021 Free Software Foundation, Inc. 4; 5; This file is part of GCC. 6; 7; GCC is free software; you can redistribute it and/or modify it under 8; the terms of the GNU General Public License as published by the Free 9; Software Foundation; either version 3, or (at your option) any later 10; version. 11; 12; GCC is distributed in the hope that it will be useful, but WITHOUT 13; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15; License for more details. 16; 17; You should have received a copy of the GNU General Public License 18; along with GCC; see the file COPYING3. If not see 19; <http://www.gnu.org/licenses/>. 20 21HeaderInclude 22config/sparc/sparc-opts.h 23 24;; Debug flags 25TargetVariable 26unsigned int sparc_debug 27 28mfpu 29Target Mask(FPU) 30Use hardware FP. 31 32mhard-float 33Target RejectNegative Mask(FPU) 34Use hardware FP. 35 36msoft-float 37Target RejectNegative InverseMask(FPU) 38Do not use hardware FP. 39 40mflat 41Target Mask(FLAT) 42Use flat register window model. 43 44munaligned-doubles 45Target Mask(UNALIGNED_DOUBLES) 46Assume possible double misalignment. 47 48mapp-regs 49Target Mask(APP_REGS) 50Use ABI reserved registers. 51 52mhard-quad-float 53Target RejectNegative Mask(HARD_QUAD) 54Use hardware quad FP instructions. 55 56msoft-quad-float 57Target RejectNegative InverseMask(HARD_QUAD) 58Do not use hardware quad fp instructions. 59 60mlra 61Target Mask(LRA) 62Enable Local Register Allocation. 63 64mv8plus 65Target Mask(V8PLUS) 66Compile for V8+ ABI. 67 68mvis 69Target Mask(VIS) 70Use UltraSPARC Visual Instruction Set version 1.0 extensions. 71 72mvis2 73Target Mask(VIS2) 74Use UltraSPARC Visual Instruction Set version 2.0 extensions. 75 76mvis3 77Target Mask(VIS3) 78Use UltraSPARC Visual Instruction Set version 3.0 extensions. 79 80mvis4 81Target Mask(VIS4) 82Use UltraSPARC Visual Instruction Set version 4.0 extensions. 83 84mvis4b 85Target Mask(VIS4B) 86Use additional VIS instructions introduced in OSA2017. 87 88mcbcond 89Target Mask(CBCOND) 90Use UltraSPARC Compare-and-Branch extensions. 91 92mfmaf 93Target Mask(FMAF) 94Use UltraSPARC Fused Multiply-Add extensions. 95 96mfsmuld 97Target Mask(FSMULD) 98Use Floating-point Multiply Single to Double (FsMULd) instruction. 99 100mpopc 101Target Mask(POPC) 102Use UltraSPARC Population-Count instruction. 103 104msubxc 105Target Mask(SUBXC) 106Use UltraSPARC Subtract-Extended-with-Carry instruction. 107 108mptr64 109Target RejectNegative Mask(PTR64) 110Pointers are 64-bit. 111 112mptr32 113Target RejectNegative InverseMask(PTR64) 114Pointers are 32-bit. 115 116m64 117Target RejectNegative Mask(64BIT) 118Use 64-bit ABI. 119 120m32 121Target RejectNegative InverseMask(64BIT) 122Use 32-bit ABI. 123 124mstack-bias 125Target Mask(STACK_BIAS) 126Use stack bias. 127 128mfaster-structs 129Target Mask(FASTER_STRUCTS) 130Use structs on stronger alignment for double-word copies. 131 132mrelax 133Target 134Optimize tail call instructions in assembler and linker. 135 136muser-mode 137Target InverseMask(SV_MODE) 138Do not generate code that can only run in supervisor mode (default). 139 140mcpu= 141Target RejectNegative Joined Var(sparc_cpu_and_features) Enum(sparc_processor) Init(PROCESSOR_V7) 142Use instructions of and schedule code for given CPU. 143 144mtune= 145Target RejectNegative Joined Var(sparc_cpu) Enum(sparc_processor) Init(PROCESSOR_V7) 146Schedule code for given CPU. 147 148Enum 149Name(sparc_processor) Type(enum sparc_processor_type) 150 151EnumValue 152Enum(sparc_processor) String(native) Value(PROCESSOR_NATIVE) DriverOnly 153 154EnumValue 155Enum(sparc_processor) String(v7) Value(PROCESSOR_V7) 156 157EnumValue 158Enum(sparc_processor) String(cypress) Value(PROCESSOR_CYPRESS) 159 160EnumValue 161Enum(sparc_processor) String(v8) Value(PROCESSOR_V8) 162 163EnumValue 164Enum(sparc_processor) String(supersparc) Value(PROCESSOR_SUPERSPARC) 165 166EnumValue 167Enum(sparc_processor) String(hypersparc) Value(PROCESSOR_HYPERSPARC) 168 169EnumValue 170Enum(sparc_processor) String(leon) Value(PROCESSOR_LEON) 171 172EnumValue 173Enum(sparc_processor) String(leon3) Value(PROCESSOR_LEON3) 174 175EnumValue 176Enum(sparc_processor) String(leon3v7) Value(PROCESSOR_LEON3V7) 177 178EnumValue 179Enum(sparc_processor) String(leon5) Value(PROCESSOR_LEON5) 180 181EnumValue 182Enum(sparc_processor) String(sparclite) Value(PROCESSOR_SPARCLITE) 183 184EnumValue 185Enum(sparc_processor) String(f930) Value(PROCESSOR_F930) 186 187EnumValue 188Enum(sparc_processor) String(f934) Value(PROCESSOR_F934) 189 190EnumValue 191Enum(sparc_processor) String(sparclite86x) Value(PROCESSOR_SPARCLITE86X) 192 193EnumValue 194Enum(sparc_processor) String(sparclet) Value(PROCESSOR_SPARCLET) 195 196EnumValue 197Enum(sparc_processor) String(tsc701) Value(PROCESSOR_TSC701) 198 199EnumValue 200Enum(sparc_processor) String(v9) Value(PROCESSOR_V9) 201 202EnumValue 203Enum(sparc_processor) String(ultrasparc) Value(PROCESSOR_ULTRASPARC) 204 205EnumValue 206Enum(sparc_processor) String(ultrasparc3) Value(PROCESSOR_ULTRASPARC3) 207 208EnumValue 209Enum(sparc_processor) String(niagara) Value(PROCESSOR_NIAGARA) 210 211EnumValue 212Enum(sparc_processor) String(niagara2) Value(PROCESSOR_NIAGARA2) 213 214EnumValue 215Enum(sparc_processor) String(niagara3) Value(PROCESSOR_NIAGARA3) 216 217EnumValue 218Enum(sparc_processor) String(niagara4) Value(PROCESSOR_NIAGARA4) 219 220EnumValue 221Enum(sparc_processor) String(niagara7) Value(PROCESSOR_NIAGARA7) 222 223EnumValue 224Enum(sparc_processor) String(m8) Value(PROCESSOR_M8) 225 226mcmodel= 227Target RejectNegative Joined Var(sparc_code_model) Enum(sparc_code_model) Init(CM_32) 228Use given SPARC-V9 code model. 229 230Enum 231Name(sparc_code_model) Type(enum sparc_code_model_type) 232 233EnumValue 234Enum(sparc_code_model) String(32) Value(CM_32) 235 236EnumValue 237Enum(sparc_code_model) String(medlow) Value(CM_MEDLOW) 238 239EnumValue 240Enum(sparc_code_model) String(medmid) Value(CM_MEDMID) 241 242EnumValue 243Enum(sparc_code_model) String(medany) Value(CM_MEDANY) 244 245EnumValue 246Enum(sparc_code_model) String(embmedany) Value(CM_EMBMEDANY) 247 248mdebug= 249Target RejectNegative Joined Undocumented Var(sparc_debug_string) 250Enable debug output. 251 252mstd-struct-return 253Target Var(sparc_std_struct_return) 254Enable strict 32-bit psABI struct return checking. 255 256mfix-at697f 257Target RejectNegative Var(sparc_fix_at697f) 258Enable workaround for single erratum of AT697F processor 259(corresponding to erratum #13 of AT697E processor). 260 261mfix-ut699 262Target RejectNegative Var(sparc_fix_ut699) 263Enable workarounds for the errata of the UT699 processor. 264 265mfix-ut700 266Target RejectNegative Var(sparc_fix_ut700) 267Enable workarounds for the errata of the UT699E/UT700 processor. 268 269mfix-gr712rc 270Target RejectNegative Var(sparc_fix_gr712rc) 271Enable workarounds for the errata of the GR712RC processor. 272 273;; Enable workaround for back-to-back store errata 274TargetVariable 275unsigned int sparc_fix_b2bst 276 277;; Enable workaround for GRLIB-TN-0013 errata 278TargetVariable 279unsigned int sparc_fix_lost_divsqrt 280 281Mask(LONG_DOUBLE_128) 282;; Use 128-bit long double 283 284Mask(LEON) 285;; Generate code for LEON 286 287Mask(LEON3) 288;; Generate code for LEON3 289 290Mask(SPARCLITE) 291;; Generate code for SPARClite 292 293Mask(SPARCLET) 294;; Generate code for SPARClet 295 296Mask(V8) 297;; Generate code for SPARC-V8 298 299Mask(V9) 300;; Generate code for SPARC-V9 301 302Mask(DEPRECATED_V8_INSNS) 303;; Generate code that uses the V8 instructions deprecated 304;; in the V9 architecture. 305 306mmemory-model= 307Target RejectNegative Joined Var(sparc_memory_model) Enum(sparc_memory_model) Init(SMM_DEFAULT) 308Specify the memory model in effect for the program. 309 310Enum 311Name(sparc_memory_model) Type(enum sparc_memory_model_type) 312 313EnumValue 314Enum(sparc_memory_model) String(default) Value(SMM_DEFAULT) 315 316EnumValue 317Enum(sparc_memory_model) String(rmo) Value(SMM_RMO) 318 319EnumValue 320Enum(sparc_memory_model) String(pso) Value(SMM_PSO) 321 322EnumValue 323Enum(sparc_memory_model) String(tso) Value(SMM_TSO) 324 325EnumValue 326Enum(sparc_memory_model) String(sc) Value(SMM_SC) 327