1 #include <arm_neon.h>
2 #include "arm-neon-ref.h"
3 #include "compute-ref-data.h"
4
5 /* Expected results with input=0. */
6 VECT_VAR_DECL(expected_0,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
7 0x0, 0x0, 0x0, 0x0 };
8 VECT_VAR_DECL(expected_0,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
9 VECT_VAR_DECL(expected_0,int,32,2) [] = { 0x0, 0x0 };
10 VECT_VAR_DECL(expected_0,int,64,1) [] = { 0x0 };
11 VECT_VAR_DECL(expected_0,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
12 0x0, 0x0, 0x0, 0x0 };
13 VECT_VAR_DECL(expected_0,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
14 VECT_VAR_DECL(expected_0,uint,32,2) [] = { 0x0, 0x0 };
15 VECT_VAR_DECL(expected_0,uint,64,1) [] = { 0x0 };
16 VECT_VAR_DECL(expected_0,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
17 0x0, 0x0, 0x0, 0x0,
18 0x0, 0x0, 0x0, 0x0,
19 0x0, 0x0, 0x0, 0x0 };
20 VECT_VAR_DECL(expected_0,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
21 0x0, 0x0, 0x0, 0x0 };
22 VECT_VAR_DECL(expected_0,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
23 VECT_VAR_DECL(expected_0,int,64,2) [] = { 0x0, 0x0 };
24 VECT_VAR_DECL(expected_0,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
25 0x0, 0x0, 0x0, 0x0,
26 0x0, 0x0, 0x0, 0x0,
27 0x0, 0x0, 0x0, 0x0 };
28 VECT_VAR_DECL(expected_0,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
29 0x0, 0x0, 0x0, 0x0 };
30 VECT_VAR_DECL(expected_0,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
31 VECT_VAR_DECL(expected_0,uint,64,2) [] = { 0x0, 0x0 };
32
33 /* Expected results with input=0 and negative shift amount. */
34 VECT_VAR_DECL(expected_0_sh_neg,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
35 0x0, 0x0, 0x0, 0x0 };
36 VECT_VAR_DECL(expected_0_sh_neg,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
37 VECT_VAR_DECL(expected_0_sh_neg,int,32,2) [] = { 0x0, 0x0 };
38 VECT_VAR_DECL(expected_0_sh_neg,int,64,1) [] = { 0x0 };
39 VECT_VAR_DECL(expected_0_sh_neg,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
40 0x0, 0x0, 0x0, 0x0 };
41 VECT_VAR_DECL(expected_0_sh_neg,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
42 VECT_VAR_DECL(expected_0_sh_neg,uint,32,2) [] = { 0x0, 0x0 };
43 VECT_VAR_DECL(expected_0_sh_neg,uint,64,1) [] = { 0x0 };
44 VECT_VAR_DECL(expected_0_sh_neg,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
45 0x0, 0x0, 0x0, 0x0,
46 0x0, 0x0, 0x0, 0x0,
47 0x0, 0x0, 0x0, 0x0 };
48 VECT_VAR_DECL(expected_0_sh_neg,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
49 0x0, 0x0, 0x0, 0x0 };
50 VECT_VAR_DECL(expected_0_sh_neg,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
51 VECT_VAR_DECL(expected_0_sh_neg,int,64,2) [] = { 0x0, 0x0 };
52 VECT_VAR_DECL(expected_0_sh_neg,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
53 0x0, 0x0, 0x0, 0x0,
54 0x0, 0x0, 0x0, 0x0,
55 0x0, 0x0, 0x0, 0x0 };
56 VECT_VAR_DECL(expected_0_sh_neg,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
57 0x0, 0x0, 0x0, 0x0 };
58 VECT_VAR_DECL(expected_0_sh_neg,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
59 VECT_VAR_DECL(expected_0_sh_neg,uint,64,2) [] = { 0x0, 0x0 };
60
61 /* Expected results. */
62 VECT_VAR_DECL(expected,int,8,8) [] = { 0xe0, 0xe2, 0xe4, 0xe6,
63 0xe8, 0xea, 0xec, 0xee };
64 VECT_VAR_DECL(expected,int,16,4) [] = { 0xff80, 0xff88, 0xff90, 0xff98 };
65 VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffff000, 0xfffff100 };
66 VECT_VAR_DECL(expected,int,64,1) [] = { 0xfffffffffffffffe };
67 VECT_VAR_DECL(expected,uint,8,8) [] = { 0xe0, 0xe2, 0xe4, 0xe6,
68 0xe8, 0xea, 0xec, 0xee };
69 VECT_VAR_DECL(expected,uint,16,4) [] = { 0xff80, 0xff88, 0xff90, 0xff98 };
70 VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffff000, 0xfffff100 };
71 VECT_VAR_DECL(expected,uint,64,1) [] = { 0x1ffffffffffffffe };
72 VECT_VAR_DECL(expected,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
73 0x0, 0x0, 0x0, 0x0,
74 0x0, 0x0, 0x0, 0x0,
75 0x0, 0x0, 0x0, 0x0 };
76 VECT_VAR_DECL(expected,int,16,8) [] = { 0x0, 0x1000, 0x2000, 0x3000,
77 0x4000, 0x5000, 0x6000, 0x7000 };
78 VECT_VAR_DECL(expected,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
79 VECT_VAR_DECL(expected,int,64,2) [] = { 0x0, 0x8000000000000000 };
80 VECT_VAR_DECL(expected,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
81 0x0, 0x0, 0x0, 0x0,
82 0x0, 0x0, 0x0, 0x0,
83 0x0, 0x0, 0x0, 0x0 };
84 VECT_VAR_DECL(expected,uint,16,8) [] = { 0x0, 0x1000, 0x2000, 0x3000,
85 0x4000, 0x5000, 0x6000, 0x7000 };
86 VECT_VAR_DECL(expected,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
87 VECT_VAR_DECL(expected,uint,64,2) [] = { 0x0, 0x8000000000000000 };
88
89 /* Expected results with negative shift amount. */
90 VECT_VAR_DECL(expected_sh_neg,int,8,8) [] = { 0xf8, 0xf9, 0xf9, 0xfa,
91 0xfa, 0xfb, 0xfb, 0xfc };
92 VECT_VAR_DECL(expected_sh_neg,int,16,4) [] = { 0xfffc, 0xfffc, 0xfffd, 0xfffd };
93 VECT_VAR_DECL(expected_sh_neg,int,32,2) [] = { 0xfffffffe, 0xfffffffe };
94 VECT_VAR_DECL(expected_sh_neg,int,64,1) [] = { 0xffffffffffffffff };
95 VECT_VAR_DECL(expected_sh_neg,uint,8,8) [] = { 0x78, 0x79, 0x79, 0x7a,
96 0x7a, 0x7b, 0x7b, 0x7c };
97 VECT_VAR_DECL(expected_sh_neg,uint,16,4) [] = { 0x3ffc, 0x3ffc, 0x3ffd, 0x3ffd };
98 VECT_VAR_DECL(expected_sh_neg,uint,32,2) [] = { 0x1ffffffe, 0x1ffffffe };
99 VECT_VAR_DECL(expected_sh_neg,uint,64,1) [] = { 0xfffffffffffffff };
100 VECT_VAR_DECL(expected_sh_neg,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
101 0x0, 0x0, 0x0, 0x0,
102 0x0, 0x0, 0x0, 0x0,
103 0x0, 0x0, 0x0, 0x0 };
104 VECT_VAR_DECL(expected_sh_neg,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
105 0x0, 0x0, 0x0, 0x0 };
106 VECT_VAR_DECL(expected_sh_neg,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
107 VECT_VAR_DECL(expected_sh_neg,int,64,2) [] = { 0x0, 0x0 };
108 VECT_VAR_DECL(expected_sh_neg,uint,8,16) [] = { 0x2, 0x2, 0x2, 0x2,
109 0x2, 0x2, 0x2, 0x2,
110 0x2, 0x2, 0x2, 0x2,
111 0x2, 0x2, 0x2, 0x2 };
112 VECT_VAR_DECL(expected_sh_neg,uint,16,8) [] = { 0x20, 0x20, 0x20, 0x20,
113 0x20, 0x20, 0x20, 0x20 };
114 VECT_VAR_DECL(expected_sh_neg,uint,32,4) [] = { 0x80000, 0x80000,
115 0x80000, 0x80000 };
116 VECT_VAR_DECL(expected_sh_neg,uint,64,2) [] = { 0x100000000000, 0x100000000000 };
117
118 /* Expected results with max input value shifted by -1 to test
119 round_const. */
120 VECT_VAR_DECL(expected_max_sh_minus1,int,8,8) [] = { 0x40, 0x40, 0x40, 0x40,
121 0x40, 0x40, 0x40, 0x40 };
122 VECT_VAR_DECL(expected_max_sh_minus1,int,16,4) [] = { 0x4000, 0x4000,
123 0x4000, 0x4000 };
124 VECT_VAR_DECL(expected_max_sh_minus1,int,32,2) [] = { 0x40000000, 0x40000000 };
125 VECT_VAR_DECL(expected_max_sh_minus1,int,64,1) [] = { 0x4000000000000000 };
126 VECT_VAR_DECL(expected_max_sh_minus1,uint,8,8) [] = { 0x80, 0x80, 0x80, 0x80,
127 0x80, 0x80, 0x80, 0x80 };
128 VECT_VAR_DECL(expected_max_sh_minus1,uint,16,4) [] = { 0x8000, 0x8000,
129 0x8000, 0x8000 };
130 VECT_VAR_DECL(expected_max_sh_minus1,uint,32,2) [] = { 0x80000000, 0x80000000 };
131 VECT_VAR_DECL(expected_max_sh_minus1,uint,64,1) [] = { 0x8000000000000000 };
132 VECT_VAR_DECL(expected_max_sh_minus1,int,8,16) [] = { 0x40, 0x40, 0x40, 0x40,
133 0x40, 0x40, 0x40, 0x40,
134 0x40, 0x40, 0x40, 0x40,
135 0x40, 0x40, 0x40, 0x40 };
136 VECT_VAR_DECL(expected_max_sh_minus1,int,16,8) [] = { 0x4000, 0x4000,
137 0x4000, 0x4000,
138 0x4000, 0x4000,
139 0x4000, 0x4000 };
140 VECT_VAR_DECL(expected_max_sh_minus1,int,32,4) [] = { 0x40000000, 0x40000000,
141 0x40000000, 0x40000000 };
142 VECT_VAR_DECL(expected_max_sh_minus1,int,64,2) [] = { 0x4000000000000000,
143 0x4000000000000000 };
144 VECT_VAR_DECL(expected_max_sh_minus1,uint,8,16) [] = { 0x80, 0x80, 0x80, 0x80,
145 0x80, 0x80, 0x80, 0x80,
146 0x80, 0x80, 0x80, 0x80,
147 0x80, 0x80, 0x80, 0x80 };
148 VECT_VAR_DECL(expected_max_sh_minus1,uint,16,8) [] = { 0x8000, 0x8000,
149 0x8000, 0x8000,
150 0x8000, 0x8000,
151 0x8000, 0x8000 };
152 VECT_VAR_DECL(expected_max_sh_minus1,uint,32,4) [] = { 0x80000000, 0x80000000,
153 0x80000000, 0x80000000 };
154 VECT_VAR_DECL(expected_max_sh_minus1,uint,64,2) [] = { 0x8000000000000000,
155 0x8000000000000000 };
156
157 /* Expected results with max input value shifted by -3 to test
158 round_const. */
159 VECT_VAR_DECL(expected_max_sh_minus3,int,8,8) [] = { 0x10, 0x10, 0x10, 0x10,
160 0x10, 0x10, 0x10, 0x10 };
161 VECT_VAR_DECL(expected_max_sh_minus3,int,16,4) [] = { 0x1000, 0x1000,
162 0x1000, 0x1000 };
163 VECT_VAR_DECL(expected_max_sh_minus3,int,32,2) [] = { 0x10000000, 0x10000000 };
164 VECT_VAR_DECL(expected_max_sh_minus3,int,64,1) [] = { 0x1000000000000000 };
165 VECT_VAR_DECL(expected_max_sh_minus3,uint,8,8) [] = { 0x20, 0x20, 0x20, 0x20,
166 0x20, 0x20, 0x20, 0x20 };
167 VECT_VAR_DECL(expected_max_sh_minus3,uint,16,4) [] = { 0x2000, 0x2000,
168 0x2000, 0x2000 };
169 VECT_VAR_DECL(expected_max_sh_minus3,uint,32,2) [] = { 0x20000000, 0x20000000 };
170 VECT_VAR_DECL(expected_max_sh_minus3,uint,64,1) [] = { 0x2000000000000000 };
171 VECT_VAR_DECL(expected_max_sh_minus3,int,8,16) [] = { 0x10, 0x10, 0x10, 0x10,
172 0x10, 0x10, 0x10, 0x10,
173 0x10, 0x10, 0x10, 0x10,
174 0x10, 0x10, 0x10, 0x10 };
175 VECT_VAR_DECL(expected_max_sh_minus3,int,16,8) [] = { 0x1000, 0x1000,
176 0x1000, 0x1000,
177 0x1000, 0x1000,
178 0x1000, 0x1000 };
179 VECT_VAR_DECL(expected_max_sh_minus3,int,32,4) [] = { 0x10000000, 0x10000000,
180 0x10000000, 0x10000000 };
181 VECT_VAR_DECL(expected_max_sh_minus3,int,64,2) [] = { 0x1000000000000000,
182 0x1000000000000000 };
183 VECT_VAR_DECL(expected_max_sh_minus3,uint,8,16) [] = { 0x20, 0x20, 0x20, 0x20,
184 0x20, 0x20, 0x20, 0x20,
185 0x20, 0x20, 0x20, 0x20,
186 0x20, 0x20, 0x20, 0x20 };
187 VECT_VAR_DECL(expected_max_sh_minus3,uint,16,8) [] = { 0x2000, 0x2000,
188 0x2000, 0x2000,
189 0x2000, 0x2000,
190 0x2000, 0x2000 };
191 VECT_VAR_DECL(expected_max_sh_minus3,uint,32,4) [] = { 0x20000000, 0x20000000,
192 0x20000000, 0x20000000 };
193 VECT_VAR_DECL(expected_max_sh_minus3,uint,64,2) [] = { 0x2000000000000000,
194 0x2000000000000000 };
195
196 /* Expected results with negative shift by vector width. */
197 VECT_VAR_DECL(expected_max_sh_minus_width,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
198 0x0, 0x0, 0x0, 0x0 };
199 VECT_VAR_DECL(expected_max_sh_minus_width,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
200 VECT_VAR_DECL(expected_max_sh_minus_width,int,32,2) [] = { 0x0, 0x0 };
201 VECT_VAR_DECL(expected_max_sh_minus_width,int,64,1) [] = { 0x0 };
202 VECT_VAR_DECL(expected_max_sh_minus_width,uint,8,8) [] = { 0x1, 0x1, 0x1, 0x1,
203 0x1, 0x1, 0x1, 0x1 };
204 VECT_VAR_DECL(expected_max_sh_minus_width,uint,16,4) [] = { 0x1, 0x1, 0x1, 0x1 };
205 VECT_VAR_DECL(expected_max_sh_minus_width,uint,32,2) [] = { 0x1, 0x1 };
206 VECT_VAR_DECL(expected_max_sh_minus_width,uint,64,1) [] = { 0x1 };
207 VECT_VAR_DECL(expected_max_sh_minus_width,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
208 0x0, 0x0, 0x0, 0x0,
209 0x0, 0x0, 0x0, 0x0,
210 0x0, 0x0, 0x0, 0x0 };
211 VECT_VAR_DECL(expected_max_sh_minus_width,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
212 0x0, 0x0, 0x0, 0x0 };
213 VECT_VAR_DECL(expected_max_sh_minus_width,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
214 VECT_VAR_DECL(expected_max_sh_minus_width,int,64,2) [] = { 0x0, 0x0 };
215 VECT_VAR_DECL(expected_max_sh_minus_width,uint,8,16) [] = { 0x1, 0x1, 0x1, 0x1,
216 0x1, 0x1, 0x1, 0x1,
217 0x1, 0x1, 0x1, 0x1,
218 0x1, 0x1, 0x1, 0x1 };
219 VECT_VAR_DECL(expected_max_sh_minus_width,uint,16,8) [] = { 0x1, 0x1, 0x1, 0x1,
220 0x1, 0x1, 0x1, 0x1 };
221 VECT_VAR_DECL(expected_max_sh_minus_width,uint,32,4) [] = { 0x1, 0x1, 0x1, 0x1 };
222 VECT_VAR_DECL(expected_max_sh_minus_width,uint,64,2) [] = { 0x1, 0x1 };
223
224 /* Expected results with large shift amount. */
225 VECT_VAR_DECL(expected_max_sh_large,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
226 0x0, 0x0, 0x0, 0x0 };
227 VECT_VAR_DECL(expected_max_sh_large,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
228 VECT_VAR_DECL(expected_max_sh_large,int,32,2) [] = { 0x0, 0x0 };
229 VECT_VAR_DECL(expected_max_sh_large,int,64,1) [] = { 0x0 };
230 VECT_VAR_DECL(expected_max_sh_large,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
231 0x0, 0x0, 0x0, 0x0 };
232 VECT_VAR_DECL(expected_max_sh_large,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
233 VECT_VAR_DECL(expected_max_sh_large,uint,32,2) [] = { 0x0, 0x0 };
234 VECT_VAR_DECL(expected_max_sh_large,uint,64,1) [] = { 0x0 };
235 VECT_VAR_DECL(expected_max_sh_large,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
236 0x0, 0x0, 0x0, 0x0,
237 0x0, 0x0, 0x0, 0x0,
238 0x0, 0x0, 0x0, 0x0 };
239 VECT_VAR_DECL(expected_max_sh_large,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
240 0x0, 0x0, 0x0, 0x0 };
241 VECT_VAR_DECL(expected_max_sh_large,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
242 VECT_VAR_DECL(expected_max_sh_large,int,64,2) [] = { 0x0, 0x0 };
243 VECT_VAR_DECL(expected_max_sh_large,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
244 0x0, 0x0, 0x0, 0x0,
245 0x0, 0x0, 0x0, 0x0,
246 0x0, 0x0, 0x0, 0x0 };
247 VECT_VAR_DECL(expected_max_sh_large,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
248 0x0, 0x0, 0x0, 0x0 };
249 VECT_VAR_DECL(expected_max_sh_large,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
250 VECT_VAR_DECL(expected_max_sh_large,uint,64,2) [] = { 0x0, 0x0 };
251
252 /* Expected results with large negative shift amount. */
253 VECT_VAR_DECL(expected_max_sh_large_neg,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
254 0x0, 0x0, 0x0, 0x0 };
255 VECT_VAR_DECL(expected_max_sh_large_neg,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
256 VECT_VAR_DECL(expected_max_sh_large_neg,int,32,2) [] = { 0x0, 0x0 };
257 VECT_VAR_DECL(expected_max_sh_large_neg,int,64,1) [] = { 0x0 };
258 VECT_VAR_DECL(expected_max_sh_large_neg,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
259 0x0, 0x0, 0x0, 0x0 };
260 VECT_VAR_DECL(expected_max_sh_large_neg,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
261 VECT_VAR_DECL(expected_max_sh_large_neg,uint,32,2) [] = { 0x0, 0x0 };
262 VECT_VAR_DECL(expected_max_sh_large_neg,uint,64,1) [] = { 0x0 };
263 VECT_VAR_DECL(expected_max_sh_large_neg,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
264 0x0, 0x0, 0x0, 0x0,
265 0x0, 0x0, 0x0, 0x0,
266 0x0, 0x0, 0x0, 0x0 };
267 VECT_VAR_DECL(expected_max_sh_large_neg,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
268 0x0, 0x0, 0x0, 0x0 };
269 VECT_VAR_DECL(expected_max_sh_large_neg,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
270 VECT_VAR_DECL(expected_max_sh_large_neg,int,64,2) [] = { 0x0, 0x0 };
271 VECT_VAR_DECL(expected_max_sh_large_neg,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
272 0x0, 0x0, 0x0, 0x0,
273 0x0, 0x0, 0x0, 0x0,
274 0x0, 0x0, 0x0, 0x0 };
275 VECT_VAR_DECL(expected_max_sh_large_neg,uint,16,8) [] = { 0x1, 0x1, 0x1, 0x1,
276 0x1, 0x1, 0x1, 0x1 };
277 VECT_VAR_DECL(expected_max_sh_large_neg,uint,32,4) [] = { 0x1, 0x1, 0x1, 0x1 };
278 VECT_VAR_DECL(expected_max_sh_large_neg,uint,64,2) [] = { 0x1, 0x1 };
279
280 #define TEST_MSG "VRSHL/VRSHLQ"
exec_vrshl(void)281 void exec_vrshl (void)
282 {
283 /* Basic test: v3=vrshl(v1,v2), then store the result. */
284 #define TEST_VRSHL(T3, Q, T1, T2, W, N) \
285 VECT_VAR(vector_res, T1, W, N) = \
286 vrshl##Q##_##T2##W(VECT_VAR(vector, T1, W, N), \
287 VECT_VAR(vector_shift, T3, W, N)); \
288 vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
289
290 DECL_VARIABLE_ALL_VARIANTS(vector);
291 DECL_VARIABLE_ALL_VARIANTS(vector_res);
292
293 DECL_VARIABLE_SIGNED_VARIANTS(vector_shift);
294
295 clean_results ();
296
297 /* Fill input vector with 0, to check behavior on limits. */
298 VDUP(vector, , int, s, 8, 8, 0);
299 VDUP(vector, , int, s, 16, 4, 0);
300 VDUP(vector, , int, s, 32, 2, 0);
301 VDUP(vector, , int, s, 64, 1, 0);
302 VDUP(vector, , uint, u, 8, 8, 0);
303 VDUP(vector, , uint, u, 16, 4, 0);
304 VDUP(vector, , uint, u, 32, 2, 0);
305 VDUP(vector, , uint, u, 64, 1, 0);
306 VDUP(vector, q, int, s, 8, 16, 0);
307 VDUP(vector, q, int, s, 16, 8, 0);
308 VDUP(vector, q, int, s, 32, 4, 0);
309 VDUP(vector, q, int, s, 64, 2, 0);
310 VDUP(vector, q, uint, u, 8, 16, 0);
311 VDUP(vector, q, uint, u, 16, 8, 0);
312 VDUP(vector, q, uint, u, 32, 4, 0);
313 VDUP(vector, q, uint, u, 64, 2, 0);
314
315 /* Choose init value arbitrarily, will be used as shift amount. */
316 /* Use values equal to one-less-than the type width to check
317 behavior on limits. */
318 VDUP(vector_shift, , int, s, 8, 8, 7);
319 VDUP(vector_shift, , int, s, 16, 4, 15);
320 VDUP(vector_shift, , int, s, 32, 2, 31);
321 VDUP(vector_shift, , int, s, 64, 1, 63);
322 VDUP(vector_shift, q, int, s, 8, 16, 7);
323 VDUP(vector_shift, q, int, s, 16, 8, 15);
324 VDUP(vector_shift, q, int, s, 32, 4, 31);
325 VDUP(vector_shift, q, int, s, 64, 2, 63);
326
327 TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
328
329 #define CMT " (with input = 0)"
330 CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_0, CMT);
331 CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_0, CMT);
332 CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_0, CMT);
333 CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_0, CMT);
334 CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_0, CMT);
335 CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_0, CMT);
336 CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_0, CMT);
337 CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_0, CMT);
338 CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_0, CMT);
339 CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_0, CMT);
340 CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_0, CMT);
341 CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_0, CMT);
342 CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_0, CMT);
343 CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_0, CMT);
344 CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_0, CMT);
345 CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_0, CMT);
346
347
348 /* Use negative shift amounts. */
349 VDUP(vector_shift, , int, s, 8, 8, -1);
350 VDUP(vector_shift, , int, s, 16, 4, -2);
351 VDUP(vector_shift, , int, s, 32, 2, -3);
352 VDUP(vector_shift, , int, s, 64, 1, -4);
353 VDUP(vector_shift, q, int, s, 8, 16, -7);
354 VDUP(vector_shift, q, int, s, 16, 8, -11);
355 VDUP(vector_shift, q, int, s, 32, 4, -13);
356 VDUP(vector_shift, q, int, s, 64, 2, -20);
357
358 TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
359
360 #undef CMT
361 #define CMT " (input 0 and negative shift amount)"
362 CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_0_sh_neg, CMT);
363 CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_0_sh_neg, CMT);
364 CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_0_sh_neg, CMT);
365 CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_0_sh_neg, CMT);
366 CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_0_sh_neg, CMT);
367 CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_0_sh_neg, CMT);
368 CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_0_sh_neg, CMT);
369 CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_0_sh_neg, CMT);
370 CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_0_sh_neg, CMT);
371 CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_0_sh_neg, CMT);
372 CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_0_sh_neg, CMT);
373 CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_0_sh_neg, CMT);
374 CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_0_sh_neg, CMT);
375 CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_0_sh_neg, CMT);
376 CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_0_sh_neg, CMT);
377 CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_0_sh_neg, CMT);
378
379
380 /* Test again, with predefined input values. */
381 TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
382
383 /* Choose init value arbitrarily, will be used as shift amount. */
384 VDUP(vector_shift, , int, s, 8, 8, 1);
385 VDUP(vector_shift, , int, s, 16, 4, 3);
386 VDUP(vector_shift, , int, s, 32, 2, 8);
387 VDUP(vector_shift, , int, s, 64, 1, -3);
388 VDUP(vector_shift, q, int, s, 8, 16, 10);
389 VDUP(vector_shift, q, int, s, 16, 8, 12);
390 VDUP(vector_shift, q, int, s, 32, 4, 32);
391 VDUP(vector_shift, q, int, s, 64, 2, 63);
392
393 TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
394
395 #undef CMT
396 #define CMT ""
397 CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, CMT);
398 CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
399 CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
400 CHECK(TEST_MSG, int, 64, 1, PRIx64, expected, CMT);
401 CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
402 CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
403 CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
404 CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, CMT);
405 CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, CMT);
406 CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, CMT);
407 CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, CMT);
408 CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, CMT);
409 CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, CMT);
410 CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, CMT);
411 CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT);
412 CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, CMT);
413
414
415 /* Use negative shift amounts. */
416 VDUP(vector_shift, , int, s, 8, 8, -1);
417 VDUP(vector_shift, , int, s, 16, 4, -2);
418 VDUP(vector_shift, , int, s, 32, 2, -3);
419 VDUP(vector_shift, , int, s, 64, 1, -4);
420 VDUP(vector_shift, q, int, s, 8, 16, -7);
421 VDUP(vector_shift, q, int, s, 16, 8, -11);
422 VDUP(vector_shift, q, int, s, 32, 4, -13);
423 VDUP(vector_shift, q, int, s, 64, 2, -20);
424
425 TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
426
427 #undef CMT
428 #define CMT " (negative shift amount)"
429 CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_sh_neg, CMT);
430 CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_sh_neg, CMT);
431 CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_sh_neg, CMT);
432 CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_sh_neg, CMT);
433 CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_sh_neg, CMT);
434 CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_sh_neg, CMT);
435 CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_sh_neg, CMT);
436 CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_sh_neg, CMT);
437 CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_sh_neg, CMT);
438 CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_sh_neg, CMT);
439 CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_sh_neg, CMT);
440 CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_sh_neg, CMT);
441 CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_sh_neg, CMT);
442 CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_sh_neg, CMT);
443 CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_sh_neg, CMT);
444 CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_sh_neg, CMT);
445
446 /* Fill input vector with max value, to check behavior on limits. */
447 VDUP(vector, , int, s, 8, 8, 0x7F);
448 VDUP(vector, , int, s, 16, 4, 0x7FFF);
449 VDUP(vector, , int, s, 32, 2, 0x7FFFFFFF);
450 VDUP(vector, , int, s, 64, 1, 0x7FFFFFFFFFFFFFFFLL);
451 VDUP(vector, , uint, u, 8, 8, 0xFF);
452 VDUP(vector, , uint, u, 16, 4, 0xFFFF);
453 VDUP(vector, , uint, u, 32, 2, 0xFFFFFFFF);
454 VDUP(vector, , uint, u, 64, 1, 0xFFFFFFFFFFFFFFFFULL);
455 VDUP(vector, q, int, s, 8, 16, 0x7F);
456 VDUP(vector, q, int, s, 16, 8, 0x7FFF);
457 VDUP(vector, q, int, s, 32, 4, 0x7FFFFFFF);
458 VDUP(vector, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFLL);
459 VDUP(vector, q, uint, u, 8, 16, 0xFF);
460 VDUP(vector, q, uint, u, 16, 8, 0xFFFF);
461 VDUP(vector, q, uint, u, 32, 4, 0xFFFFFFFF);
462 VDUP(vector, q, uint, u, 64, 2, 0xFFFFFFFFFFFFFFFFULL);
463
464 /* Use -1 shift amount to check overflow with round_const. */
465 VDUP(vector_shift, , int, s, 8, 8, -1);
466 VDUP(vector_shift, , int, s, 16, 4, -1);
467 VDUP(vector_shift, , int, s, 32, 2, -1);
468 VDUP(vector_shift, , int, s, 64, 1, -1);
469 VDUP(vector_shift, q, int, s, 8, 16, -1);
470 VDUP(vector_shift, q, int, s, 16, 8, -1);
471 VDUP(vector_shift, q, int, s, 32, 4, -1);
472 VDUP(vector_shift, q, int, s, 64, 2, -1);
473
474 TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
475
476 #undef CMT
477 #define CMT " (max input, shift by -1)"
478 CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh_minus1, CMT);
479 CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh_minus1, CMT);
480 CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh_minus1, CMT);
481 CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh_minus1, CMT);
482 CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh_minus1, CMT);
483 CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh_minus1, CMT);
484 CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh_minus1, CMT);
485 CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh_minus1, CMT);
486 CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh_minus1, CMT);
487 CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh_minus1, CMT);
488 CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh_minus1, CMT);
489 CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh_minus1, CMT);
490 CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh_minus1, CMT);
491 CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh_minus1, CMT);
492 CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh_minus1, CMT);
493 CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh_minus1, CMT);
494
495 /* Use -3 shift amount to check overflow with round_const. */
496 VDUP(vector_shift, , int, s, 8, 8, -3);
497 VDUP(vector_shift, , int, s, 16, 4, -3);
498 VDUP(vector_shift, , int, s, 32, 2, -3);
499 VDUP(vector_shift, , int, s, 64, 1, -3);
500 VDUP(vector_shift, q, int, s, 8, 16, -3);
501 VDUP(vector_shift, q, int, s, 16, 8, -3);
502 VDUP(vector_shift, q, int, s, 32, 4, -3);
503 VDUP(vector_shift, q, int, s, 64, 2, -3);
504
505 TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
506
507 #undef CMT
508 #define CMT " (check rounding constant: max input, shift by -3)"
509 CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh_minus3, CMT);
510 CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh_minus3, CMT);
511 CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh_minus3, CMT);
512 CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh_minus3, CMT);
513 CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh_minus3, CMT);
514 CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh_minus3, CMT);
515 CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh_minus3, CMT);
516 CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh_minus3, CMT);
517 CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh_minus3, CMT);
518 CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh_minus3, CMT);
519 CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh_minus3, CMT);
520 CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh_minus3, CMT);
521 CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh_minus3, CMT);
522 CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh_minus3, CMT);
523 CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh_minus3, CMT);
524 CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh_minus3, CMT);
525
526
527 /* Use negative shift amount as large as input vector width. */
528 VDUP(vector_shift, , int, s, 8, 8, -8);
529 VDUP(vector_shift, , int, s, 16, 4, -16);
530 VDUP(vector_shift, , int, s, 32, 2, -32);
531 VDUP(vector_shift, , int, s, 64, 1, -64);
532 VDUP(vector_shift, q, int, s, 8, 16, -8);
533 VDUP(vector_shift, q, int, s, 16, 8, -16);
534 VDUP(vector_shift, q, int, s, 32, 4, -32);
535 VDUP(vector_shift, q, int, s, 64, 2, -64);
536
537 TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
538
539 #undef CMT
540 #define CMT " (max input, right shift by vector width)"
541 CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh_minus_width, CMT);
542 CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh_minus_width, CMT);
543 CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh_minus_width, CMT);
544 CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh_minus_width, CMT);
545 CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh_minus_width, CMT);
546 CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh_minus_width, CMT);
547 CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh_minus_width, CMT);
548 CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh_minus_width, CMT);
549 CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh_minus_width, CMT);
550 CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh_minus_width, CMT);
551 CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh_minus_width, CMT);
552 CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh_minus_width, CMT);
553 CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh_minus_width, CMT);
554 CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh_minus_width, CMT);
555 CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh_minus_width, CMT);
556 CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh_minus_width, CMT);
557
558
559 /* Test large shift amount. */
560 VDUP(vector_shift, , int, s, 8, 8, 10);
561 VDUP(vector_shift, , int, s, 16, 4, 20);
562 VDUP(vector_shift, , int, s, 32, 2, 33);
563 VDUP(vector_shift, , int, s, 64, 1, 65);
564 VDUP(vector_shift, q, int, s, 8, 16, 9);
565 VDUP(vector_shift, q, int, s, 16, 8, 16);
566 VDUP(vector_shift, q, int, s, 32, 4, 32);
567 VDUP(vector_shift, q, int, s, 64, 2, 64);
568
569 TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
570
571 #undef CMT
572 #define CMT " (max input, large shift amount)"
573 CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh_large, CMT);
574 CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh_large, CMT);
575 CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh_large, CMT);
576 CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh_large, CMT);
577 CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh_large, CMT);
578 CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh_large, CMT);
579 CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh_large, CMT);
580 CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh_large, CMT);
581 CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh_large, CMT);
582 CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh_large, CMT);
583 CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh_large, CMT);
584 CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh_large, CMT);
585 CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh_large, CMT);
586 CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh_large, CMT);
587 CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh_large, CMT);
588 CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh_large, CMT);
589
590
591 /* Test large negative shift amount. */
592 VDUP(vector_shift, , int, s, 8, 8, -10);
593 VDUP(vector_shift, , int, s, 16, 4, -20);
594 VDUP(vector_shift, , int, s, 32, 2, -33);
595 VDUP(vector_shift, , int, s, 64, 1, -65);
596 VDUP(vector_shift, q, int, s, 8, 16, -9);
597 VDUP(vector_shift, q, int, s, 16, 8, -16);
598 VDUP(vector_shift, q, int, s, 32, 4, -32);
599 VDUP(vector_shift, q, int, s, 64, 2, -64);
600
601 TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
602
603 #undef CMT
604 #define CMT " (max input, large negative shift amount)"
605 CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh_large_neg, CMT);
606 CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh_large_neg, CMT);
607 CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh_large_neg, CMT);
608 CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh_large_neg, CMT);
609 CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh_large_neg, CMT);
610 CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh_large_neg, CMT);
611 CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh_large_neg, CMT);
612 CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh_large_neg, CMT);
613 CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh_large_neg, CMT);
614 CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh_large_neg, CMT);
615 CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh_large_neg, CMT);
616 CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh_large_neg, CMT);
617 CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh_large_neg, CMT);
618 CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh_large_neg, CMT);
619 CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh_large_neg, CMT);
620 CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh_large_neg, CMT);
621 }
622
main(void)623 int main (void)
624 {
625 exec_vrshl ();
626 return 0;
627 }
628