1; Options for the DEC Alpha port of the compiler
2;
3; Copyright (C) 2005-2016 Free Software Foundation, Inc.
4;
5; This file is part of GCC.
6;
7; GCC is free software; you can redistribute it and/or modify it under
8; the terms of the GNU General Public License as published by the Free
9; Software Foundation; either version 3, or (at your option) any later
10; version.
11;
12; GCC is distributed in the hope that it will be useful, but WITHOUT
13; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
15; License for more details.
16;
17; You should have received a copy of the GNU General Public License
18; along with GCC; see the file COPYING3.  If not see
19; <http://www.gnu.org/licenses/>.
20
21msoft-float
22Target Report Mask(SOFT_FP)
23Do not use hardware fp.
24
25mfp-regs
26Target Report Mask(FPREGS)
27Use fp registers.
28
29mgas
30Target Ignore
31Does nothing. Preserved for backward compatibility.
32
33mieee-conformant
34Target RejectNegative Mask(IEEE_CONFORMANT)
35Request IEEE-conformant math library routines (OSF/1).
36
37mieee
38Target Report RejectNegative Mask(IEEE)
39Emit IEEE-conformant code, without inexact exceptions.
40
41mieee-with-inexact
42Target Report RejectNegative Mask(IEEE_WITH_INEXACT)
43
44mbuild-constants
45Target Report Mask(BUILD_CONSTANTS)
46Do not emit complex integer constants to read-only memory.
47
48mfloat-vax
49Target Report RejectNegative Mask(FLOAT_VAX)
50Use VAX fp.
51
52mfloat-ieee
53Target Report RejectNegative InverseMask(FLOAT_VAX)
54Do not use VAX fp.
55
56mbwx
57Target Report Mask(BWX)
58Emit code for the byte/word ISA extension.
59
60mmax
61Target Report Mask(MAX)
62Emit code for the motion video ISA extension.
63
64mfix
65Target Report Mask(FIX)
66Emit code for the fp move and sqrt ISA extension.
67
68mcix
69Target Report Mask(CIX)
70Emit code for the counting ISA extension.
71
72mexplicit-relocs
73Target Report Mask(EXPLICIT_RELOCS)
74Emit code using explicit relocation directives.
75
76msmall-data
77Target Report RejectNegative Mask(SMALL_DATA)
78Emit 16-bit relocations to the small data areas.
79
80mlarge-data
81Target Report RejectNegative InverseMask(SMALL_DATA)
82Emit 32-bit relocations to the small data areas.
83
84msmall-text
85Target Report RejectNegative Mask(SMALL_TEXT)
86Emit direct branches to local functions.
87
88mlarge-text
89Target Report RejectNegative InverseMask(SMALL_TEXT)
90Emit indirect branches to local functions.
91
92mtls-kernel
93Target Report Mask(TLS_KERNEL)
94Emit rdval instead of rduniq for thread pointer.
95
96mlong-double-128
97Target Report RejectNegative Mask(LONG_DOUBLE_128)
98Use 128-bit long double.
99
100mlong-double-64
101Target Report RejectNegative InverseMask(LONG_DOUBLE_128)
102Use 64-bit long double.
103
104mcpu=
105Target RejectNegative Joined Var(alpha_cpu_string)
106Use features of and schedule given CPU.
107
108mtune=
109Target RejectNegative Joined Var(alpha_tune_string)
110Schedule given CPU.
111
112mfp-rounding-mode=
113Target RejectNegative Joined Var(alpha_fprm_string)
114Control the generated fp rounding mode.
115
116mfp-trap-mode=
117Target RejectNegative Joined Var(alpha_fptm_string)
118Control the IEEE trap mode.
119
120mtrap-precision=
121Target RejectNegative Joined Var(alpha_tp_string)
122Control the precision given to fp exceptions.
123
124mmemory-latency=
125Target RejectNegative Joined Var(alpha_mlat_string)
126Tune expected memory latency.
127
128mtls-size=
129Target RejectNegative Joined UInteger Var(alpha_tls_size) Init(32)
130Specify bit size of immediate TLS offsets.
131