1module &module:1:0:$full:$large:$default; 2 3/* Test for casting from/to representation of HSA registers. */ 4 5/* HSA registers are untyped but in gccbrig they are presented as */ 6/* variables with a type selected by analysis. Currently, each */ 7/* register variable, per function, has a type as it is used at */ 8/* most. Therefore, register variable can be nearly any type. The */ 9/* tests makes sure the generic/tree expressions have the right casts */ 10/* from/to the register variables. */ 11 12 13/* { dg-do compile } */ 14/* { dg-options "-fdump-tree-original" } */ 15 16prog kernel &Kernel(kernarg_u64 %input_ptr, kernarg_u64 %output_ptr) 17{ 18 private_u64 %foo; 19 private_u64 %bar; 20 private_b128 %baz; 21 22 ld_kernarg_u64 $d0, [%input_ptr]; 23 ld_global_u32 $s0, [$d0]; 24 25 /* Trick gccbrig to set wanted type for the registers. */ 26 27/* $s0 is selected as float... */ 28/* { dg-final { scan-tree-dump "<float:32> s0;" "original"} } */ 29/* ..., therefore, there should not be any casts. */ 30/* { dg-final { scan-tree-dump "s10 = s0 \\\+ s0;" "original"} } */ 31 32 add_f32 $s10, $s0, $s0; 33 add_f32 $s10, $s0, $s0; 34 add_f32 $s10, $s0, $s0; 35 add_f32 $s10, $s0, $s0; 36 add_f32 $s10, $s0, $s0; 37 38/* Expression with other type, a cast is needed. */ 39/* { dg-final { scan-tree-dump "s1 = VIEW_CONVERT_EXPR<unsigned int>.s0. \\\+ 123;" "original"} } */ 40 41 add_u32 $s1, $s0, 123; 42 43/* { dg-final { scan-tree-dump "unsigned int s1;" "original"} } */ 44 45 add_u32 $s10, $s1, 0; 46 add_u32 $s10, $s1, 0; 47 add_u32 $s10, $s1, 0; 48 add_u32 $s10, $s1, 0; 49 add_u32 $s10, $s1, 0; 50 51/* { dg-final { scan-tree-dump "s0 = VIEW_CONVERT_EXPR<<float:32>>.s1.;" "original"} } */ 52 53 mov_b32 $s0, $s1; 54 55/* Rig the election for $d0 to be double. */ 56/* { dg-final { scan-tree-dump "<float:64> d0;" "original"} } */ 57/* { dg-final { scan-tree-dump "d10 = d0 \\\+ d0;" "original"} } */ 58 59 add_f64 $d10, $d0, $d0; 60 add_f64 $d10, $d0, $d0; 61 add_f64 $d10, $d0, $d0; 62 add_f64 $d10, $d0, $d0; 63 add_f64 $d10, $d0, $d0; 64 65/* Make $s2 to be vector type. */ 66/* { dg-final { scan-tree-dump "vector.4. unsigned char s2;" "original"} } */ 67/* { dg-final { scan-tree-dump "s2 = VIEW_CONVERT_EXPR<vector.4. unsigned char>\\\(s1\\\) \\\+ VIEW_CONVERT_EXPR<vector.4. unsigned char>\\\(s1\\\);" "original"} } */ 68 69 add_pp_u8x4 $s2, $s1, $s1; 70 71/* { dg-final { scan-tree-dump "s20 = s2 \\\+ s2;" "original"} } */ 72 73 add_pp_u8x4 $s20, $s2, $s2; 74 add_pp_u8x4 $s20, $s2, $s2; 75 add_pp_u8x4 $s20, $s2, $s2; 76 add_pp_u8x4 $s20, $s2, $s2; 77 78/* { dg-final { scan-tree-dump "d0 = VIEW_CONVERT_EXPR<<float:64>>.{VIEW_CONVERT_EXPR<unsigned int>.s0., VIEW_CONVERT_EXPR<unsigned int>.s2.}.;" "original"} } */ 79 80 combine_v2_b64_b32 $d0, ($s0, $s2); 81 82/* { dg-final { scan-tree-dump "s2 = VIEW_CONVERT_EXPR<vector.4. unsigned char>.BIT_FIELD_REF <d0, 32, 0>.;" "original"} } */ 83/* { dg-final { scan-tree-dump "s1 = BIT_FIELD_REF <d0, 32, 32>;" "original"} } */ 84 85 expand_v2_b32_b64 ($s2, $s1), $d0; 86 87/* { dg-final { scan-tree-dump "s0 = VIEW_CONVERT_EXPR<<float:32>>\\\(.*VIEW_CONVERT_EXPR<unsigned int>.s0\[\)\]*;" "original"} } */ 88 89 cvt_s16_s8 $s0, $s0; 90 91/* { dg-final { scan-tree-dump "c0 = .*VIEW_CONVERT_EXPR<<float:32>>.s2..* != 0;" "original"} } */ 92 93 cvt_b1_f32 $c0, $s2; 94 95/* { dg-final { scan-tree-dump ".*__private_base_addr.* = .*\\\(unsigned char\\\) VIEW_CONVERT_EXPR<unsigned int>\\\(s0\\\)\[\)\]*;" "original"} } */ 96 97 st_private_u8 $s0, [%foo]; 98 99/* { dg-final { scan-tree-dump ".*__private_base_addr.* = .*\\\(unsigned short\\\) VIEW_CONVERT_EXPR<unsigned int>\\\(s2\\\)\[\)\]*;" "original"} } */ 100 101 st_private_u16 $s2, [%bar]; 102 103/* { dg-final { scan-tree-dump "mem_read.\[0-9\]* = \\\*\\\(signed char \\\*\\\) \\\(__private_base_addr .*\\\);\[ \n\]*s2 = VIEW_CONVERT_EXPR<vector.4. unsigned char>\\\(\\\(signed int\\\) mem_read.\[0-9\]*\\\);" "original"} } */ 104 105 ld_private_s8 $s2, [%foo]; 106 107/* { dg-final { scan-tree-dump "mem_read.\[0-9\]* = \\\*\\\(signed short \\\*\\\) \\\(__private_base_addr .*\\\);\[ \n\]*s0 = VIEW_CONVERT_EXPR<<float:32>>\\\(\\\(signed int\\\) mem_read.\[0-9\]*\\\);" "original"} } */ 108 109 ld_private_s16 $s0, [%bar]; 110 111/* { dg-final { scan-tree-dump "\\\*\\\(<float:32> \\\*\\\) \\\(__private_base_addr.*\\\) \\\+ 0 = s0;" "original"} } */ 112/* { dg-final { scan-tree-dump "\\\*\\\(<float:32> \\\*\\\) \\\(__private_base_addr.*\\\) \\\+ 4 = VIEW_CONVERT_EXPR<<float:32>>\\\(s1\\\);" "original"} } */ 113/* { dg-final { scan-tree-dump "\\\*\\\(<float:32> \\\*\\\) \\\(__private_base_addr.*\\\) \\\+ 8 = VIEW_CONVERT_EXPR<<float:32>>\\\(s2\\\);" "original"} } */ 114 115 st_v3_private_f32 ($s0, $s1, $s2), [%baz]; 116 117/* { dg-final { scan-tree-dump "mem_read.\[0-9\]* = \\\*\\\(signed short \\\*\\\) \\\(__private_base_addr.*\\\) \\\+ 0;\[ \n\]*s0 = VIEW_CONVERT_EXPR<<float:32>>\\\(\\\(signed int\\\) mem_read.\[0-9\]*\\\);" "original"} } */ 118/* { dg-final { scan-tree-dump "mem_read.\[0-9\]* = \\\*\\\(signed short \\\*\\\) \\\(__private_base_addr.*\\\) \\\+ 2;\[ \n\]*s1 = VIEW_CONVERT_EXPR<unsigned int>\\\(\\\(signed int\\\) mem_read.\[0-9\]*\\\);" "original"} } */ 119/* { dg-final { scan-tree-dump "mem_read.\[0-9\]* = \\\*\\\(signed short \\\*\\\) \\\(__private_base_addr.*\\\) \\\+ 4;\[ \n\]*s2 = VIEW_CONVERT_EXPR<vector.4. unsigned char>\\\(\\\(signed int\\\) mem_read.\[0-9\]*\\\);" "original"} } */ 120 121 ld_v3_private_s16 ($s0, $s1, $s2), [%baz]; 122 123/* { dg-final { scan-tree-dump "s5 = .*VIEW_CONVERT_EXPR<unsigned int>\\\(s0\\\) == VIEW_CONVERT_EXPR<unsigned int>\\\(s2\\\)\\\) .*;" "original"} } */ 124 125 cmp_eq_s32_u32 $s5, $s0, $s2; 126 127/* { dg-final { scan-tree-dump "s6 = VIEW_CONVERT_EXPR<<float:32>>\\\(.*VIEW_CONVERT_EXPR<vector\\\(2\\\) unsigned short>\\\(s0\\\).*VIEW_CONVERT_EXPR<vector\\\(2\\\) unsigned short>\\\(s2\\\).*;" "original"} } */ 128 129 cmp_eq_pp_u16x2_u16x2 $s6, $s0, $s2; 130 131/* { dg-final { scan-tree-dump "<float:32> s60;" "original"} } */ 132 133 add_f32 $s60, $s6, $s6; 134 add_f32 $s60, $s6, $s6; 135 add_f32 $s60, $s6, $s6; 136 add_f32 $s60, $s6, $s6; 137 138 ld_kernarg_u64 $d0, [%output_ptr]; 139 st_global_u32 $s0, [$d0]; 140 141 ret; 142}; 143 144 145 146 147