1 /* Check that the delay slot of an rts insn is filled, if it follows a cbranch
2    with an unfilled delay slot, as in:
3 	bt	.L3
4 	mov	r7,r0	<<< this insn
5 	rts
6 	nop		<<< should go into this delay slot
7 */
8 /* { dg-do compile }  */
9 /* { dg-options "-O2" }  */
10 /* { dg-final { scan-assembler-not "nop" } }  */
11 
12 int
test_0(const char * x,int a,int b,int c)13 test_0 (const char* x, int a, int b, int c)
14 {
15   if (x[a] == 92)
16     return b;
17   return c;
18 }
19