1;; Machine Descriptions for R8C/M16C/M32C
2;; Copyright (C) 2005-2019 Free Software Foundation, Inc.
3;; Contributed by Red Hat.
4;;
5;; This file is part of GCC.
6;;
7;; GCC is free software; you can redistribute it and/or modify it
8;; under the terms of the GNU General Public License as published
9;; by the Free Software Foundation; either version 3, or (at your
10;; option) any later version.
11;;
12;; GCC is distributed in the hope that it will be useful, but WITHOUT
13;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
15;; License for more details.
16;;
17;; You should have received a copy of the GNU General Public License
18;; along with GCC; see the file COPYING3.  If not see
19;; <http://www.gnu.org/licenses/>.
20
21;; Prologue and epilogue patterns
22
23(define_expand "prologue"
24  [(const_int 1)]
25  ""
26  "m32c_emit_prologue(); DONE;"
27  )
28
29; For the next two, operands[0] is the amount of stack space we want
30; to reserve.
31
32; We assume dwarf2out will process each set in sequence.
33(define_insn "prologue_enter_16"
34  [(set (mem:HI (plus:HI (reg:HI SP_REGNO) (const_int -2)))
35	(reg:HI FB_REGNO))
36   (set (reg:HI FB_REGNO)
37	(plus:HI (reg:HI SP_REGNO) (const_int -2)))
38   (set (reg:HI SP_REGNO)
39	(minus:HI (reg:HI SP_REGNO)
40	           (match_operand 0 "const_int_operand" "i")))
41   ]
42  "TARGET_A16"
43  {
44    /* This is due to binutils bug gas/4659.  */
45    if (INTVAL (operands[0]) == 2)
46      return "enter\t#0";
47    return "enter\t%0-2";
48  }
49  [(set_attr "flags" "x")]
50  )
51
52(define_insn "prologue_enter_24"
53  [(set (mem:SI (plus:PSI (reg:PSI SP_REGNO) (const_int -4)))
54	(reg:SI FB_REGNO))
55   (set (reg:PSI FB_REGNO)
56	(plus:PSI (reg:PSI SP_REGNO) (const_int -4)))
57   (set (reg:PSI SP_REGNO)
58	(minus:PSI (reg:PSI SP_REGNO)
59	           (match_operand 0 "const_int_operand" "i")))
60   ]
61  "TARGET_A24"
62  {
63    /* This is due to binutils bug gas/4659.  */
64    if (INTVAL (operands[0]) == 4)
65      return "enter\t#0";
66    return "enter\t%0-4";
67  }
68  [(set_attr "flags" "x")]
69  )
70
71; Just a comment, for debugging the assembler output.
72(define_insn "prologue_end"
73  [(unspec_volatile [(const_int 0)] UNS_PROLOGUE_END)]
74  ""
75  "; end of prologue"
76  [(set_attr "flags" "n")]
77  )
78
79
80
81(define_expand "epilogue"
82  [(const_int 1)]
83  ""
84  "m32c_emit_epilogue(); DONE;"
85  )
86
87(define_expand "eh_return"
88  [(match_operand:PSI 0 "" "")]
89  ""
90  "m32c_emit_eh_epilogue(operands[0]);
91   emit_barrier ();
92   DONE;"
93  )
94
95(define_insn "eh_epilogue"
96  [(set (pc)
97	(unspec_volatile [(match_operand 0 "m32c_r1_operand" "")
98			  (match_operand 1 "m32c_r0_operand" "")
99			  ] UNS_EH_EPILOGUE))
100   (return)]
101  ""
102  "jmp.a\t__m32c_eh_return"
103  [(set_attr "flags" "x")]
104  )
105
106(define_insn "epilogue_exitd_16"
107  [(set (reg:HI SP_REGNO)
108	(plus:HI (reg:HI FB_REGNO)
109	      (const_int 2)))
110   (set (reg:HI FB_REGNO)
111	(mem:HI (reg:HI FB_REGNO)))
112   (return)
113   ]
114  "TARGET_A16"
115  "exitd"
116  [(set_attr "flags" "x")]
117  )
118
119(define_insn "epilogue_reit_16"
120  [(set (reg:HI SP_REGNO)
121	(plus:HI (reg:HI SP_REGNO)
122	      (const_int 4)))
123   (return)
124   ]
125  "TARGET_A16"
126  "reit"
127  [(set_attr "flags" "x")]
128  )
129
130(define_insn "epilogue_exitd_24"
131  [(set (reg:PSI SP_REGNO)
132	(plus:PSI (reg:PSI FB_REGNO)
133	      (const_int 4)))
134   (set (reg:PSI FB_REGNO)
135	(mem:PSI (reg:PSI FB_REGNO)))
136   (return)
137   ]
138  "TARGET_A24"
139  "exitd"
140  [(set_attr "flags" "x")]
141  )
142
143(define_insn "epilogue_reit_24"
144  [(set (reg:PSI SP_REGNO)
145	(plus:PSI (reg:PSI SP_REGNO)
146	      (const_int 6)))
147   (return)
148   ]
149  "TARGET_A24"
150  "reit"
151  [(set_attr "flags" "x")]
152  )
153
154(define_insn "epilogue_freit"
155  [(unspec [(const_int 0)] UNS_FREIT)
156   (return)
157   ]
158  ""
159  "freit"
160  [(set_attr "flags" "x")]
161  )
162
163(define_insn "epilogue_rts"
164  [(return)
165   ]
166  ""
167  "rts"
168  [(set_attr "flags" "x")]
169  )
170
171(define_insn "epilogue_start"
172  [(unspec_volatile [(const_int 0)] UNS_EPILOGUE_START)]
173  ""
174  "; start of epilogue"
175  [(set_attr "flags" "n")]
176  )
177
178
179; These are used by the prologue/epilogue code.
180
181(define_insn "pushm"
182  [(unspec [(match_operand 0 "const_int_operand" "i")] UNS_PUSHM)]
183  ""
184  "pushm\t%p0"
185  [(set_attr "flags" "n")]
186  )
187
188(define_insn "popm"
189  [(unspec [(match_operand 0 "const_int_operand" "i")] UNS_POPM)]
190  ""
191  "popm\t%p0"
192  [(set_attr "flags" "n")]
193  )
194
195(define_insn "fset_b"
196  [(unspec [(const_int 0)] UNS_FSETB)]
197  ""
198  "fset\tB"
199  [(set_attr "flags" "n")]
200  )
201
202