1 /*
2 * Copyright (C) 2007-2016 Free Software Foundation, Inc.
3 *
4 * This file is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 3, or (at your option) any
7 * later version.
8 *
9 * This file is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * Under Section 7 of GPL version 3, you are granted additional
15 * permissions described in the GCC Runtime Library Exception, version
16 * 3.1, as published by the Free Software Foundation.
17 *
18 * You should have received a copy of the GNU General Public License and
19 * a copy of the GCC Runtime Library Exception along with this program;
20 * see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
21 * <http://www.gnu.org/licenses/>.
22 */
23
24 /* %ecx */
25 #define bit_SSE3 (1 << 0)
26 #define bit_PCLMUL (1 << 1)
27 #define bit_LZCNT (1 << 5)
28 #define bit_SSSE3 (1 << 9)
29 #define bit_FMA (1 << 12)
30 #define bit_CMPXCHG16B (1 << 13)
31 #define bit_SSE4_1 (1 << 19)
32 #define bit_SSE4_2 (1 << 20)
33 #define bit_MOVBE (1 << 22)
34 #define bit_POPCNT (1 << 23)
35 #define bit_AES (1 << 25)
36 #define bit_XSAVE (1 << 26)
37 #define bit_OSXSAVE (1 << 27)
38 #define bit_AVX (1 << 28)
39 #define bit_F16C (1 << 29)
40 #define bit_RDRND (1 << 30)
41
42 /* %edx */
43 #define bit_CMPXCHG8B (1 << 8)
44 #define bit_CMOV (1 << 15)
45 #define bit_MMX (1 << 23)
46 #define bit_FXSAVE (1 << 24)
47 #define bit_SSE (1 << 25)
48 #define bit_SSE2 (1 << 26)
49
50 /* Extended Features */
51 /* %ecx */
52 #define bit_LAHF_LM (1 << 0)
53 #define bit_ABM (1 << 5)
54 #define bit_SSE4a (1 << 6)
55 #define bit_PRFCHW (1 << 8)
56 #define bit_XOP (1 << 11)
57 #define bit_LWP (1 << 15)
58 #define bit_FMA4 (1 << 16)
59 #define bit_TBM (1 << 21)
60 #define bit_MWAITX (1 << 29)
61
62 /* %edx */
63 #define bit_MMXEXT (1 << 22)
64 #define bit_LM (1 << 29)
65 #define bit_3DNOWP (1 << 30)
66 #define bit_3DNOW (1u << 31)
67
68 /* %ebx. */
69 #define bit_CLZERO (1 << 0)
70
71 /* Extended Features (%eax == 7) */
72 /* %ebx */
73 #define bit_FSGSBASE (1 << 0)
74 #define bit_BMI (1 << 3)
75 #define bit_HLE (1 << 4)
76 #define bit_AVX2 (1 << 5)
77 #define bit_BMI2 (1 << 8)
78 #define bit_RTM (1 << 11)
79 #define bit_MPX (1 << 14)
80 #define bit_AVX512F (1 << 16)
81 #define bit_AVX512DQ (1 << 17)
82 #define bit_RDSEED (1 << 18)
83 #define bit_ADX (1 << 19)
84 #define bit_AVX512IFMA (1 << 21)
85 #define bit_CLFLUSHOPT (1 << 23)
86 #define bit_CLWB (1 << 24)
87 #define bit_AVX512PF (1 << 26)
88 #define bit_AVX512ER (1 << 27)
89 #define bit_AVX512CD (1 << 28)
90 #define bit_SHA (1 << 29)
91 #define bit_AVX512BW (1 << 30)
92 #define bit_AVX512VL (1u << 31)
93
94 /* %ecx */
95 #define bit_PREFETCHWT1 (1 << 0)
96 #define bit_AVX512VBMI (1 << 1)
97 #define bit_PKU (1 << 3)
98 #define bit_OSPKE (1 << 4)
99
100 /* XFEATURE_ENABLED_MASK register bits (%eax == 13, %ecx == 0) */
101 #define bit_BNDREGS (1 << 3)
102 #define bit_BNDCSR (1 << 4)
103
104 /* Extended State Enumeration Sub-leaf (%eax == 13, %ecx == 1) */
105 #define bit_XSAVEOPT (1 << 0)
106 #define bit_XSAVEC (1 << 1)
107 #define bit_XSAVES (1 << 3)
108
109 /* Signatures for different CPU implementations as returned in uses
110 of cpuid with level 0. */
111 #define signature_AMD_ebx 0x68747541
112 #define signature_AMD_ecx 0x444d4163
113 #define signature_AMD_edx 0x69746e65
114
115 #define signature_CENTAUR_ebx 0x746e6543
116 #define signature_CENTAUR_ecx 0x736c7561
117 #define signature_CENTAUR_edx 0x48727561
118
119 #define signature_CYRIX_ebx 0x69727943
120 #define signature_CYRIX_ecx 0x64616574
121 #define signature_CYRIX_edx 0x736e4978
122
123 #define signature_INTEL_ebx 0x756e6547
124 #define signature_INTEL_ecx 0x6c65746e
125 #define signature_INTEL_edx 0x49656e69
126
127 #define signature_TM1_ebx 0x6e617254
128 #define signature_TM1_ecx 0x55504361
129 #define signature_TM1_edx 0x74656d73
130
131 #define signature_TM2_ebx 0x756e6547
132 #define signature_TM2_ecx 0x3638784d
133 #define signature_TM2_edx 0x54656e69
134
135 #define signature_NSC_ebx 0x646f6547
136 #define signature_NSC_ecx 0x43534e20
137 #define signature_NSC_edx 0x79622065
138
139 #define signature_NEXGEN_ebx 0x4778654e
140 #define signature_NEXGEN_ecx 0x6e657669
141 #define signature_NEXGEN_edx 0x72446e65
142
143 #define signature_RISE_ebx 0x65736952
144 #define signature_RISE_ecx 0x65736952
145 #define signature_RISE_edx 0x65736952
146
147 #define signature_SIS_ebx 0x20536953
148 #define signature_SIS_ecx 0x20536953
149 #define signature_SIS_edx 0x20536953
150
151 #define signature_UMC_ebx 0x20434d55
152 #define signature_UMC_ecx 0x20434d55
153 #define signature_UMC_edx 0x20434d55
154
155 #define signature_VIA_ebx 0x20414956
156 #define signature_VIA_ecx 0x20414956
157 #define signature_VIA_edx 0x20414956
158
159 #define signature_VORTEX_ebx 0x74726f56
160 #define signature_VORTEX_ecx 0x436f5320
161 #define signature_VORTEX_edx 0x36387865
162
163 #define __cpuid(level, a, b, c, d) \
164 __asm__ ("cpuid\n\t" \
165 : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
166 : "0" (level))
167
168 #define __cpuid_count(level, count, a, b, c, d) \
169 __asm__ ("cpuid\n\t" \
170 : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
171 : "0" (level), "2" (count))
172
173
174 /* Return highest supported input value for cpuid instruction. ext can
175 be either 0x0 or 0x80000000 to return highest supported value for
176 basic or extended cpuid information. Function returns 0 if cpuid
177 is not supported or whatever cpuid returns in eax register. If sig
178 pointer is non-null, then first four bytes of the signature
179 (as found in ebx register) are returned in location pointed by sig. */
180
181 static __inline unsigned int
__get_cpuid_max(unsigned int __ext,unsigned int * __sig)182 __get_cpuid_max (unsigned int __ext, unsigned int *__sig)
183 {
184 unsigned int __eax, __ebx, __ecx, __edx;
185
186 #ifndef __x86_64__
187 /* See if we can use cpuid. On AMD64 we always can. */
188 #if __GNUC__ >= 3
189 __asm__ ("pushf{l|d}\n\t"
190 "pushf{l|d}\n\t"
191 "pop{l}\t%0\n\t"
192 "mov{l}\t{%0, %1|%1, %0}\n\t"
193 "xor{l}\t{%2, %0|%0, %2}\n\t"
194 "push{l}\t%0\n\t"
195 "popf{l|d}\n\t"
196 "pushf{l|d}\n\t"
197 "pop{l}\t%0\n\t"
198 "popf{l|d}\n\t"
199 : "=&r" (__eax), "=&r" (__ebx)
200 : "i" (0x00200000));
201 #else
202 /* Host GCCs older than 3.0 weren't supporting Intel asm syntax
203 nor alternatives in i386 code. */
204 __asm__ ("pushfl\n\t"
205 "pushfl\n\t"
206 "popl\t%0\n\t"
207 "movl\t%0, %1\n\t"
208 "xorl\t%2, %0\n\t"
209 "pushl\t%0\n\t"
210 "popfl\n\t"
211 "pushfl\n\t"
212 "popl\t%0\n\t"
213 "popfl\n\t"
214 : "=&r" (__eax), "=&r" (__ebx)
215 : "i" (0x00200000));
216 #endif
217
218 if (!((__eax ^ __ebx) & 0x00200000))
219 return 0;
220 #endif
221
222 /* Host supports cpuid. Return highest supported cpuid input value. */
223 __cpuid (__ext, __eax, __ebx, __ecx, __edx);
224
225 if (__sig)
226 *__sig = __ebx;
227
228 return __eax;
229 }
230
231 /* Return cpuid data for requested cpuid leaf, as found in returned
232 eax, ebx, ecx and edx registers. The function checks if cpuid is
233 supported and returns 1 for valid cpuid information or 0 for
234 unsupported cpuid leaf. All pointers are required to be non-null. */
235
236 static __inline int
__get_cpuid(unsigned int __leaf,unsigned int * __eax,unsigned int * __ebx,unsigned int * __ecx,unsigned int * __edx)237 __get_cpuid (unsigned int __leaf,
238 unsigned int *__eax, unsigned int *__ebx,
239 unsigned int *__ecx, unsigned int *__edx)
240 {
241 unsigned int __ext = __leaf & 0x80000000;
242 unsigned int __maxlevel = __get_cpuid_max (__ext, 0);
243
244 if (__maxlevel == 0 || __maxlevel < __leaf)
245 return 0;
246
247 __cpuid (__leaf, *__eax, *__ebx, *__ecx, *__edx);
248 return 1;
249 }
250
251 /* Same as above, but sub-leaf can be specified. */
252
253 static __inline int
__get_cpuid_count(unsigned int __leaf,unsigned int __subleaf,unsigned int * __eax,unsigned int * __ebx,unsigned int * __ecx,unsigned int * __edx)254 __get_cpuid_count (unsigned int __leaf, unsigned int __subleaf,
255 unsigned int *__eax, unsigned int *__ebx,
256 unsigned int *__ecx, unsigned int *__edx)
257 {
258 unsigned int __ext = __leaf & 0x80000000;
259 unsigned int __maxlevel = __get_cpuid_max (__ext, 0);
260
261 if (__maxlevel == 0 || __maxlevel < __leaf)
262 return 0;
263
264 __cpuid_count (__leaf, __subleaf, *__eax, *__ebx, *__ecx, *__edx);
265 return 1;
266 }
267