1
2#
3# Try to verify all operand modes for 68HC12
4#
5	sect .text
6	globl start
7
8start:
9	anda	[12,x]		; Indexed indirect
10	ldaa	#10
11	ldx	L1
12L1:	ldy	,x
13	addd	1,y		; Offset from register
14	subd	-1,y
15	eora	15,y
16	eora	-16,y
17	eorb	16,y
18	eorb	-17,y
19	oraa	128,sp
20	orab	-128,sp
21	orab	255,x
22	orab	-256,x
23	anda	256,x
24	andb	-257,x
25	anda	[12,x]		; Indexed indirect (16-bit offset)
26	ldaa	[257,y]
27	ldab	[32767,sp]
28	ldd	[32768,pc]
29	ldd	L1,pc
30	std	a,x		; Two-reg index
31	ldx	b,x
32	stx	d,y
33	addd	1,+x		; Pre-Auto inc
34	addd	2,+x
35	addd	8,+x
36	addd	1,sp+		; Post-Auto inc
37	addd	2,sp+
38	addd	8,sp+
39	subd	1,-y		; Pre-Auto dec
40	subd	2,-y
41	subd	8,-y
42	addd	1,y-		; Post-Auto dec
43	addd	2,y-
44	addd	8,y-
45	std	[d,x]		; Indexed indirect with two reg index
46	std	[d,y]
47	std	[d,sp]
48	std	[d,pc]
49	beq	L1
50	lbeq	start
51	lbcc	L2
52;;
53;; Move insn with various operands
54;;
55	movb	start, 1,x
56	movw	1,x, start
57	movb	start, 1,+x
58	movb	start, 1,-x
59	movb	#23, 1,-sp
60	movb	L1, L2
61	movb	L1, a,x
62	movw	L1, b,x
63	movw	L1, d,x
64	movw	d,x, a,x
65	movw	b,sp, d,pc
66	movw	b,sp, L1
67	movw	b,sp, 1,x
68	movw	d,x, a,y
69	trap	#0x30
70	trap	#0x39
71	trap	#0x40
72	trap	#0x80
73	trap	#255
74L2:
75	movw 1,x,2,x
76	movw -1,-1
77	movw -1,1,x
78	movw #-1,1,x
79	movw 3,8
80	movw #3,3
81	movw #3,1,x
82	movw 3,1,x
83	movw 3,+2,x
84	movw 4,-2,x
85	rts
86;;
87;; Post-index byte with relocation
88;;
89post_indexed_pb:
90t1:
91	leas	abort,x
92t2:
93	leax	t2-t1,y
94	leax	toto,x
95	leas	toto+titi,sp
96	leay	titi,x
97	leas	bb,y
98	leas	min5b,pc
99	leas	max5b,pc
100	leas	min9b,pc
101	leas	max9b,pc
102
103;;
104;; Disassembler bug with movb
105;;
106	movb	#23,0x2345
107	movb	#40,12,sp
108	movb	#39,3,+sp
109	movb	#20,14,sp
110	movw	#0x3210,0x3456
111	movw	#0x4040,12,sp
112	movw	#0x3900,3,+sp
113	movw	#0x2000,14,sp
114#	movb	#111,start
115
116titi = 10
117toto = 100
118min5b= -16
119max5b= 15
120min9b= -256
121max9b= 255
122bb = 10240
123